1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0+
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun * Serial Port driver for Aspeed VUART device
4*4882a593Smuzhiyun *
5*4882a593Smuzhiyun * Copyright (C) 2016 Jeremy Kerr <jk@ozlabs.org>, IBM Corp.
6*4882a593Smuzhiyun * Copyright (C) 2006 Arnd Bergmann <arnd@arndb.de>, IBM Corp.
7*4882a593Smuzhiyun */
8*4882a593Smuzhiyun #include <linux/device.h>
9*4882a593Smuzhiyun #include <linux/module.h>
10*4882a593Smuzhiyun #include <linux/of_address.h>
11*4882a593Smuzhiyun #include <linux/of_irq.h>
12*4882a593Smuzhiyun #include <linux/of_platform.h>
13*4882a593Smuzhiyun #include <linux/regmap.h>
14*4882a593Smuzhiyun #include <linux/mfd/syscon.h>
15*4882a593Smuzhiyun #include <linux/tty.h>
16*4882a593Smuzhiyun #include <linux/tty_flip.h>
17*4882a593Smuzhiyun #include <linux/clk.h>
18*4882a593Smuzhiyun
19*4882a593Smuzhiyun #include "8250.h"
20*4882a593Smuzhiyun
21*4882a593Smuzhiyun #define ASPEED_VUART_GCRA 0x20
22*4882a593Smuzhiyun #define ASPEED_VUART_GCRA_VUART_EN BIT(0)
23*4882a593Smuzhiyun #define ASPEED_VUART_GCRA_HOST_SIRQ_POLARITY BIT(1)
24*4882a593Smuzhiyun #define ASPEED_VUART_GCRA_DISABLE_HOST_TX_DISCARD BIT(5)
25*4882a593Smuzhiyun #define ASPEED_VUART_GCRB 0x24
26*4882a593Smuzhiyun #define ASPEED_VUART_GCRB_HOST_SIRQ_MASK GENMASK(7, 4)
27*4882a593Smuzhiyun #define ASPEED_VUART_GCRB_HOST_SIRQ_SHIFT 4
28*4882a593Smuzhiyun #define ASPEED_VUART_ADDRL 0x28
29*4882a593Smuzhiyun #define ASPEED_VUART_ADDRH 0x2c
30*4882a593Smuzhiyun
31*4882a593Smuzhiyun struct aspeed_vuart {
32*4882a593Smuzhiyun struct device *dev;
33*4882a593Smuzhiyun void __iomem *regs;
34*4882a593Smuzhiyun struct clk *clk;
35*4882a593Smuzhiyun int line;
36*4882a593Smuzhiyun struct timer_list unthrottle_timer;
37*4882a593Smuzhiyun struct uart_8250_port *port;
38*4882a593Smuzhiyun };
39*4882a593Smuzhiyun
40*4882a593Smuzhiyun /*
41*4882a593Smuzhiyun * If we fill the tty flip buffers, we throttle the data ready interrupt
42*4882a593Smuzhiyun * to prevent dropped characters. This timeout defines how long we wait
43*4882a593Smuzhiyun * to (conditionally, depending on buffer state) unthrottle.
44*4882a593Smuzhiyun */
45*4882a593Smuzhiyun static const int unthrottle_timeout = HZ/10;
46*4882a593Smuzhiyun
47*4882a593Smuzhiyun /*
48*4882a593Smuzhiyun * The VUART is basically two UART 'front ends' connected by their FIFO
49*4882a593Smuzhiyun * (no actual serial line in between). One is on the BMC side (management
50*4882a593Smuzhiyun * controller) and one is on the host CPU side.
51*4882a593Smuzhiyun *
52*4882a593Smuzhiyun * It allows the BMC to provide to the host a "UART" that pipes into
53*4882a593Smuzhiyun * the BMC itself and can then be turned by the BMC into a network console
54*4882a593Smuzhiyun * of some sort for example.
55*4882a593Smuzhiyun *
56*4882a593Smuzhiyun * This driver is for the BMC side. The sysfs files allow the BMC
57*4882a593Smuzhiyun * userspace which owns the system configuration policy, to specify
58*4882a593Smuzhiyun * at what IO port and interrupt number the host side will appear
59*4882a593Smuzhiyun * to the host on the Host <-> BMC LPC bus. It could be different on a
60*4882a593Smuzhiyun * different system (though most of them use 3f8/4).
61*4882a593Smuzhiyun */
62*4882a593Smuzhiyun
lpc_address_show(struct device * dev,struct device_attribute * attr,char * buf)63*4882a593Smuzhiyun static ssize_t lpc_address_show(struct device *dev,
64*4882a593Smuzhiyun struct device_attribute *attr, char *buf)
65*4882a593Smuzhiyun {
66*4882a593Smuzhiyun struct aspeed_vuart *vuart = dev_get_drvdata(dev);
67*4882a593Smuzhiyun u16 addr;
68*4882a593Smuzhiyun
69*4882a593Smuzhiyun addr = (readb(vuart->regs + ASPEED_VUART_ADDRH) << 8) |
70*4882a593Smuzhiyun (readb(vuart->regs + ASPEED_VUART_ADDRL));
71*4882a593Smuzhiyun
72*4882a593Smuzhiyun return snprintf(buf, PAGE_SIZE - 1, "0x%x\n", addr);
73*4882a593Smuzhiyun }
74*4882a593Smuzhiyun
lpc_address_store(struct device * dev,struct device_attribute * attr,const char * buf,size_t count)75*4882a593Smuzhiyun static ssize_t lpc_address_store(struct device *dev,
76*4882a593Smuzhiyun struct device_attribute *attr,
77*4882a593Smuzhiyun const char *buf, size_t count)
78*4882a593Smuzhiyun {
79*4882a593Smuzhiyun struct aspeed_vuart *vuart = dev_get_drvdata(dev);
80*4882a593Smuzhiyun unsigned long val;
81*4882a593Smuzhiyun int err;
82*4882a593Smuzhiyun
83*4882a593Smuzhiyun err = kstrtoul(buf, 0, &val);
84*4882a593Smuzhiyun if (err)
85*4882a593Smuzhiyun return err;
86*4882a593Smuzhiyun
87*4882a593Smuzhiyun writeb(val >> 8, vuart->regs + ASPEED_VUART_ADDRH);
88*4882a593Smuzhiyun writeb(val >> 0, vuart->regs + ASPEED_VUART_ADDRL);
89*4882a593Smuzhiyun
90*4882a593Smuzhiyun return count;
91*4882a593Smuzhiyun }
92*4882a593Smuzhiyun
93*4882a593Smuzhiyun static DEVICE_ATTR_RW(lpc_address);
94*4882a593Smuzhiyun
sirq_show(struct device * dev,struct device_attribute * attr,char * buf)95*4882a593Smuzhiyun static ssize_t sirq_show(struct device *dev,
96*4882a593Smuzhiyun struct device_attribute *attr, char *buf)
97*4882a593Smuzhiyun {
98*4882a593Smuzhiyun struct aspeed_vuart *vuart = dev_get_drvdata(dev);
99*4882a593Smuzhiyun u8 reg;
100*4882a593Smuzhiyun
101*4882a593Smuzhiyun reg = readb(vuart->regs + ASPEED_VUART_GCRB);
102*4882a593Smuzhiyun reg &= ASPEED_VUART_GCRB_HOST_SIRQ_MASK;
103*4882a593Smuzhiyun reg >>= ASPEED_VUART_GCRB_HOST_SIRQ_SHIFT;
104*4882a593Smuzhiyun
105*4882a593Smuzhiyun return snprintf(buf, PAGE_SIZE - 1, "%u\n", reg);
106*4882a593Smuzhiyun }
107*4882a593Smuzhiyun
sirq_store(struct device * dev,struct device_attribute * attr,const char * buf,size_t count)108*4882a593Smuzhiyun static ssize_t sirq_store(struct device *dev, struct device_attribute *attr,
109*4882a593Smuzhiyun const char *buf, size_t count)
110*4882a593Smuzhiyun {
111*4882a593Smuzhiyun struct aspeed_vuart *vuart = dev_get_drvdata(dev);
112*4882a593Smuzhiyun unsigned long val;
113*4882a593Smuzhiyun int err;
114*4882a593Smuzhiyun u8 reg;
115*4882a593Smuzhiyun
116*4882a593Smuzhiyun err = kstrtoul(buf, 0, &val);
117*4882a593Smuzhiyun if (err)
118*4882a593Smuzhiyun return err;
119*4882a593Smuzhiyun
120*4882a593Smuzhiyun val <<= ASPEED_VUART_GCRB_HOST_SIRQ_SHIFT;
121*4882a593Smuzhiyun val &= ASPEED_VUART_GCRB_HOST_SIRQ_MASK;
122*4882a593Smuzhiyun
123*4882a593Smuzhiyun reg = readb(vuart->regs + ASPEED_VUART_GCRB);
124*4882a593Smuzhiyun reg &= ~ASPEED_VUART_GCRB_HOST_SIRQ_MASK;
125*4882a593Smuzhiyun reg |= val;
126*4882a593Smuzhiyun writeb(reg, vuart->regs + ASPEED_VUART_GCRB);
127*4882a593Smuzhiyun
128*4882a593Smuzhiyun return count;
129*4882a593Smuzhiyun }
130*4882a593Smuzhiyun
131*4882a593Smuzhiyun static DEVICE_ATTR_RW(sirq);
132*4882a593Smuzhiyun
sirq_polarity_show(struct device * dev,struct device_attribute * attr,char * buf)133*4882a593Smuzhiyun static ssize_t sirq_polarity_show(struct device *dev,
134*4882a593Smuzhiyun struct device_attribute *attr, char *buf)
135*4882a593Smuzhiyun {
136*4882a593Smuzhiyun struct aspeed_vuart *vuart = dev_get_drvdata(dev);
137*4882a593Smuzhiyun u8 reg;
138*4882a593Smuzhiyun
139*4882a593Smuzhiyun reg = readb(vuart->regs + ASPEED_VUART_GCRA);
140*4882a593Smuzhiyun reg &= ASPEED_VUART_GCRA_HOST_SIRQ_POLARITY;
141*4882a593Smuzhiyun
142*4882a593Smuzhiyun return snprintf(buf, PAGE_SIZE - 1, "%u\n", reg ? 1 : 0);
143*4882a593Smuzhiyun }
144*4882a593Smuzhiyun
aspeed_vuart_set_sirq_polarity(struct aspeed_vuart * vuart,bool polarity)145*4882a593Smuzhiyun static void aspeed_vuart_set_sirq_polarity(struct aspeed_vuart *vuart,
146*4882a593Smuzhiyun bool polarity)
147*4882a593Smuzhiyun {
148*4882a593Smuzhiyun u8 reg = readb(vuart->regs + ASPEED_VUART_GCRA);
149*4882a593Smuzhiyun
150*4882a593Smuzhiyun if (polarity)
151*4882a593Smuzhiyun reg |= ASPEED_VUART_GCRA_HOST_SIRQ_POLARITY;
152*4882a593Smuzhiyun else
153*4882a593Smuzhiyun reg &= ~ASPEED_VUART_GCRA_HOST_SIRQ_POLARITY;
154*4882a593Smuzhiyun
155*4882a593Smuzhiyun writeb(reg, vuart->regs + ASPEED_VUART_GCRA);
156*4882a593Smuzhiyun }
157*4882a593Smuzhiyun
sirq_polarity_store(struct device * dev,struct device_attribute * attr,const char * buf,size_t count)158*4882a593Smuzhiyun static ssize_t sirq_polarity_store(struct device *dev,
159*4882a593Smuzhiyun struct device_attribute *attr,
160*4882a593Smuzhiyun const char *buf, size_t count)
161*4882a593Smuzhiyun {
162*4882a593Smuzhiyun struct aspeed_vuart *vuart = dev_get_drvdata(dev);
163*4882a593Smuzhiyun unsigned long val;
164*4882a593Smuzhiyun int err;
165*4882a593Smuzhiyun
166*4882a593Smuzhiyun err = kstrtoul(buf, 0, &val);
167*4882a593Smuzhiyun if (err)
168*4882a593Smuzhiyun return err;
169*4882a593Smuzhiyun
170*4882a593Smuzhiyun aspeed_vuart_set_sirq_polarity(vuart, val != 0);
171*4882a593Smuzhiyun
172*4882a593Smuzhiyun return count;
173*4882a593Smuzhiyun }
174*4882a593Smuzhiyun
175*4882a593Smuzhiyun static DEVICE_ATTR_RW(sirq_polarity);
176*4882a593Smuzhiyun
177*4882a593Smuzhiyun static struct attribute *aspeed_vuart_attrs[] = {
178*4882a593Smuzhiyun &dev_attr_sirq.attr,
179*4882a593Smuzhiyun &dev_attr_sirq_polarity.attr,
180*4882a593Smuzhiyun &dev_attr_lpc_address.attr,
181*4882a593Smuzhiyun NULL,
182*4882a593Smuzhiyun };
183*4882a593Smuzhiyun
184*4882a593Smuzhiyun static const struct attribute_group aspeed_vuart_attr_group = {
185*4882a593Smuzhiyun .attrs = aspeed_vuart_attrs,
186*4882a593Smuzhiyun };
187*4882a593Smuzhiyun
aspeed_vuart_set_enabled(struct aspeed_vuart * vuart,bool enabled)188*4882a593Smuzhiyun static void aspeed_vuart_set_enabled(struct aspeed_vuart *vuart, bool enabled)
189*4882a593Smuzhiyun {
190*4882a593Smuzhiyun u8 reg = readb(vuart->regs + ASPEED_VUART_GCRA);
191*4882a593Smuzhiyun
192*4882a593Smuzhiyun if (enabled)
193*4882a593Smuzhiyun reg |= ASPEED_VUART_GCRA_VUART_EN;
194*4882a593Smuzhiyun else
195*4882a593Smuzhiyun reg &= ~ASPEED_VUART_GCRA_VUART_EN;
196*4882a593Smuzhiyun
197*4882a593Smuzhiyun writeb(reg, vuart->regs + ASPEED_VUART_GCRA);
198*4882a593Smuzhiyun }
199*4882a593Smuzhiyun
aspeed_vuart_set_host_tx_discard(struct aspeed_vuart * vuart,bool discard)200*4882a593Smuzhiyun static void aspeed_vuart_set_host_tx_discard(struct aspeed_vuart *vuart,
201*4882a593Smuzhiyun bool discard)
202*4882a593Smuzhiyun {
203*4882a593Smuzhiyun u8 reg;
204*4882a593Smuzhiyun
205*4882a593Smuzhiyun reg = readb(vuart->regs + ASPEED_VUART_GCRA);
206*4882a593Smuzhiyun
207*4882a593Smuzhiyun /* If the DISABLE_HOST_TX_DISCARD bit is set, discard is disabled */
208*4882a593Smuzhiyun if (!discard)
209*4882a593Smuzhiyun reg |= ASPEED_VUART_GCRA_DISABLE_HOST_TX_DISCARD;
210*4882a593Smuzhiyun else
211*4882a593Smuzhiyun reg &= ~ASPEED_VUART_GCRA_DISABLE_HOST_TX_DISCARD;
212*4882a593Smuzhiyun
213*4882a593Smuzhiyun writeb(reg, vuart->regs + ASPEED_VUART_GCRA);
214*4882a593Smuzhiyun }
215*4882a593Smuzhiyun
aspeed_vuart_startup(struct uart_port * uart_port)216*4882a593Smuzhiyun static int aspeed_vuart_startup(struct uart_port *uart_port)
217*4882a593Smuzhiyun {
218*4882a593Smuzhiyun struct uart_8250_port *uart_8250_port = up_to_u8250p(uart_port);
219*4882a593Smuzhiyun struct aspeed_vuart *vuart = uart_8250_port->port.private_data;
220*4882a593Smuzhiyun int rc;
221*4882a593Smuzhiyun
222*4882a593Smuzhiyun rc = serial8250_do_startup(uart_port);
223*4882a593Smuzhiyun if (rc)
224*4882a593Smuzhiyun return rc;
225*4882a593Smuzhiyun
226*4882a593Smuzhiyun aspeed_vuart_set_host_tx_discard(vuart, false);
227*4882a593Smuzhiyun
228*4882a593Smuzhiyun return 0;
229*4882a593Smuzhiyun }
230*4882a593Smuzhiyun
aspeed_vuart_shutdown(struct uart_port * uart_port)231*4882a593Smuzhiyun static void aspeed_vuart_shutdown(struct uart_port *uart_port)
232*4882a593Smuzhiyun {
233*4882a593Smuzhiyun struct uart_8250_port *uart_8250_port = up_to_u8250p(uart_port);
234*4882a593Smuzhiyun struct aspeed_vuart *vuart = uart_8250_port->port.private_data;
235*4882a593Smuzhiyun
236*4882a593Smuzhiyun aspeed_vuart_set_host_tx_discard(vuart, true);
237*4882a593Smuzhiyun
238*4882a593Smuzhiyun serial8250_do_shutdown(uart_port);
239*4882a593Smuzhiyun }
240*4882a593Smuzhiyun
__aspeed_vuart_set_throttle(struct uart_8250_port * up,bool throttle)241*4882a593Smuzhiyun static void __aspeed_vuart_set_throttle(struct uart_8250_port *up,
242*4882a593Smuzhiyun bool throttle)
243*4882a593Smuzhiyun {
244*4882a593Smuzhiyun unsigned char irqs = UART_IER_RLSI | UART_IER_RDI;
245*4882a593Smuzhiyun
246*4882a593Smuzhiyun up->ier &= ~irqs;
247*4882a593Smuzhiyun if (!throttle)
248*4882a593Smuzhiyun up->ier |= irqs;
249*4882a593Smuzhiyun serial_out(up, UART_IER, up->ier);
250*4882a593Smuzhiyun }
aspeed_vuart_set_throttle(struct uart_port * port,bool throttle)251*4882a593Smuzhiyun static void aspeed_vuart_set_throttle(struct uart_port *port, bool throttle)
252*4882a593Smuzhiyun {
253*4882a593Smuzhiyun struct uart_8250_port *up = up_to_u8250p(port);
254*4882a593Smuzhiyun unsigned long flags;
255*4882a593Smuzhiyun
256*4882a593Smuzhiyun spin_lock_irqsave(&port->lock, flags);
257*4882a593Smuzhiyun __aspeed_vuart_set_throttle(up, throttle);
258*4882a593Smuzhiyun spin_unlock_irqrestore(&port->lock, flags);
259*4882a593Smuzhiyun }
260*4882a593Smuzhiyun
aspeed_vuart_throttle(struct uart_port * port)261*4882a593Smuzhiyun static void aspeed_vuart_throttle(struct uart_port *port)
262*4882a593Smuzhiyun {
263*4882a593Smuzhiyun aspeed_vuart_set_throttle(port, true);
264*4882a593Smuzhiyun }
265*4882a593Smuzhiyun
aspeed_vuart_unthrottle(struct uart_port * port)266*4882a593Smuzhiyun static void aspeed_vuart_unthrottle(struct uart_port *port)
267*4882a593Smuzhiyun {
268*4882a593Smuzhiyun aspeed_vuart_set_throttle(port, false);
269*4882a593Smuzhiyun }
270*4882a593Smuzhiyun
aspeed_vuart_unthrottle_exp(struct timer_list * timer)271*4882a593Smuzhiyun static void aspeed_vuart_unthrottle_exp(struct timer_list *timer)
272*4882a593Smuzhiyun {
273*4882a593Smuzhiyun struct aspeed_vuart *vuart = from_timer(vuart, timer, unthrottle_timer);
274*4882a593Smuzhiyun struct uart_8250_port *up = vuart->port;
275*4882a593Smuzhiyun
276*4882a593Smuzhiyun if (!tty_buffer_space_avail(&up->port.state->port)) {
277*4882a593Smuzhiyun mod_timer(&vuart->unthrottle_timer,
278*4882a593Smuzhiyun jiffies + unthrottle_timeout);
279*4882a593Smuzhiyun return;
280*4882a593Smuzhiyun }
281*4882a593Smuzhiyun
282*4882a593Smuzhiyun aspeed_vuart_unthrottle(&up->port);
283*4882a593Smuzhiyun }
284*4882a593Smuzhiyun
285*4882a593Smuzhiyun /*
286*4882a593Smuzhiyun * Custom interrupt handler to manage finer-grained flow control. Although we
287*4882a593Smuzhiyun * have throttle/unthrottle callbacks, we've seen that the VUART device can
288*4882a593Smuzhiyun * deliver characters faster than the ldisc has a chance to check buffer space
289*4882a593Smuzhiyun * against the throttle threshold. This results in dropped characters before
290*4882a593Smuzhiyun * the throttle.
291*4882a593Smuzhiyun *
292*4882a593Smuzhiyun * We do this by checking for flip buffer space before RX. If we have no space,
293*4882a593Smuzhiyun * throttle now and schedule an unthrottle for later, once the ldisc has had
294*4882a593Smuzhiyun * a chance to drain the buffers.
295*4882a593Smuzhiyun */
aspeed_vuart_handle_irq(struct uart_port * port)296*4882a593Smuzhiyun static int aspeed_vuart_handle_irq(struct uart_port *port)
297*4882a593Smuzhiyun {
298*4882a593Smuzhiyun struct uart_8250_port *up = up_to_u8250p(port);
299*4882a593Smuzhiyun unsigned int iir, lsr;
300*4882a593Smuzhiyun unsigned long flags;
301*4882a593Smuzhiyun int space, count;
302*4882a593Smuzhiyun
303*4882a593Smuzhiyun iir = serial_port_in(port, UART_IIR);
304*4882a593Smuzhiyun
305*4882a593Smuzhiyun if (iir & UART_IIR_NO_INT)
306*4882a593Smuzhiyun return 0;
307*4882a593Smuzhiyun
308*4882a593Smuzhiyun spin_lock_irqsave(&port->lock, flags);
309*4882a593Smuzhiyun
310*4882a593Smuzhiyun lsr = serial_port_in(port, UART_LSR);
311*4882a593Smuzhiyun
312*4882a593Smuzhiyun if (lsr & (UART_LSR_DR | UART_LSR_BI)) {
313*4882a593Smuzhiyun space = tty_buffer_space_avail(&port->state->port);
314*4882a593Smuzhiyun
315*4882a593Smuzhiyun if (!space) {
316*4882a593Smuzhiyun /* throttle and schedule an unthrottle later */
317*4882a593Smuzhiyun struct aspeed_vuart *vuart = port->private_data;
318*4882a593Smuzhiyun __aspeed_vuart_set_throttle(up, true);
319*4882a593Smuzhiyun
320*4882a593Smuzhiyun if (!timer_pending(&vuart->unthrottle_timer)) {
321*4882a593Smuzhiyun vuart->port = up;
322*4882a593Smuzhiyun mod_timer(&vuart->unthrottle_timer,
323*4882a593Smuzhiyun jiffies + unthrottle_timeout);
324*4882a593Smuzhiyun }
325*4882a593Smuzhiyun
326*4882a593Smuzhiyun } else {
327*4882a593Smuzhiyun count = min(space, 256);
328*4882a593Smuzhiyun
329*4882a593Smuzhiyun do {
330*4882a593Smuzhiyun serial8250_read_char(up, lsr);
331*4882a593Smuzhiyun lsr = serial_in(up, UART_LSR);
332*4882a593Smuzhiyun if (--count == 0)
333*4882a593Smuzhiyun break;
334*4882a593Smuzhiyun } while (lsr & (UART_LSR_DR | UART_LSR_BI));
335*4882a593Smuzhiyun
336*4882a593Smuzhiyun tty_flip_buffer_push(&port->state->port);
337*4882a593Smuzhiyun }
338*4882a593Smuzhiyun }
339*4882a593Smuzhiyun
340*4882a593Smuzhiyun serial8250_modem_status(up);
341*4882a593Smuzhiyun if (lsr & UART_LSR_THRE)
342*4882a593Smuzhiyun serial8250_tx_chars(up);
343*4882a593Smuzhiyun
344*4882a593Smuzhiyun uart_unlock_and_check_sysrq(port, flags);
345*4882a593Smuzhiyun
346*4882a593Smuzhiyun return 1;
347*4882a593Smuzhiyun }
348*4882a593Smuzhiyun
aspeed_vuart_auto_configure_sirq_polarity(struct aspeed_vuart * vuart,struct device_node * syscon_np,u32 reg_offset,u32 reg_mask)349*4882a593Smuzhiyun static void aspeed_vuart_auto_configure_sirq_polarity(
350*4882a593Smuzhiyun struct aspeed_vuart *vuart, struct device_node *syscon_np,
351*4882a593Smuzhiyun u32 reg_offset, u32 reg_mask)
352*4882a593Smuzhiyun {
353*4882a593Smuzhiyun struct regmap *regmap;
354*4882a593Smuzhiyun u32 value;
355*4882a593Smuzhiyun
356*4882a593Smuzhiyun regmap = syscon_node_to_regmap(syscon_np);
357*4882a593Smuzhiyun if (IS_ERR(regmap)) {
358*4882a593Smuzhiyun dev_warn(vuart->dev,
359*4882a593Smuzhiyun "could not get regmap for aspeed,sirq-polarity-sense\n");
360*4882a593Smuzhiyun return;
361*4882a593Smuzhiyun }
362*4882a593Smuzhiyun if (regmap_read(regmap, reg_offset, &value)) {
363*4882a593Smuzhiyun dev_warn(vuart->dev, "could not read hw strap table\n");
364*4882a593Smuzhiyun return;
365*4882a593Smuzhiyun }
366*4882a593Smuzhiyun
367*4882a593Smuzhiyun aspeed_vuart_set_sirq_polarity(vuart, (value & reg_mask) == 0);
368*4882a593Smuzhiyun }
369*4882a593Smuzhiyun
aspeed_vuart_probe(struct platform_device * pdev)370*4882a593Smuzhiyun static int aspeed_vuart_probe(struct platform_device *pdev)
371*4882a593Smuzhiyun {
372*4882a593Smuzhiyun struct of_phandle_args sirq_polarity_sense_args;
373*4882a593Smuzhiyun struct uart_8250_port port;
374*4882a593Smuzhiyun struct aspeed_vuart *vuart;
375*4882a593Smuzhiyun struct device_node *np;
376*4882a593Smuzhiyun struct resource *res;
377*4882a593Smuzhiyun u32 clk, prop;
378*4882a593Smuzhiyun int rc;
379*4882a593Smuzhiyun
380*4882a593Smuzhiyun np = pdev->dev.of_node;
381*4882a593Smuzhiyun
382*4882a593Smuzhiyun vuart = devm_kzalloc(&pdev->dev, sizeof(*vuart), GFP_KERNEL);
383*4882a593Smuzhiyun if (!vuart)
384*4882a593Smuzhiyun return -ENOMEM;
385*4882a593Smuzhiyun
386*4882a593Smuzhiyun vuart->dev = &pdev->dev;
387*4882a593Smuzhiyun timer_setup(&vuart->unthrottle_timer, aspeed_vuart_unthrottle_exp, 0);
388*4882a593Smuzhiyun
389*4882a593Smuzhiyun res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
390*4882a593Smuzhiyun vuart->regs = devm_ioremap_resource(&pdev->dev, res);
391*4882a593Smuzhiyun if (IS_ERR(vuart->regs))
392*4882a593Smuzhiyun return PTR_ERR(vuart->regs);
393*4882a593Smuzhiyun
394*4882a593Smuzhiyun memset(&port, 0, sizeof(port));
395*4882a593Smuzhiyun port.port.private_data = vuart;
396*4882a593Smuzhiyun port.port.membase = vuart->regs;
397*4882a593Smuzhiyun port.port.mapbase = res->start;
398*4882a593Smuzhiyun port.port.mapsize = resource_size(res);
399*4882a593Smuzhiyun port.port.startup = aspeed_vuart_startup;
400*4882a593Smuzhiyun port.port.shutdown = aspeed_vuart_shutdown;
401*4882a593Smuzhiyun port.port.throttle = aspeed_vuart_throttle;
402*4882a593Smuzhiyun port.port.unthrottle = aspeed_vuart_unthrottle;
403*4882a593Smuzhiyun port.port.status = UPSTAT_SYNC_FIFO;
404*4882a593Smuzhiyun port.port.dev = &pdev->dev;
405*4882a593Smuzhiyun port.port.has_sysrq = IS_ENABLED(CONFIG_SERIAL_8250_CONSOLE);
406*4882a593Smuzhiyun port.bugs |= UART_BUG_TXRACE;
407*4882a593Smuzhiyun
408*4882a593Smuzhiyun rc = sysfs_create_group(&vuart->dev->kobj, &aspeed_vuart_attr_group);
409*4882a593Smuzhiyun if (rc < 0)
410*4882a593Smuzhiyun return rc;
411*4882a593Smuzhiyun
412*4882a593Smuzhiyun if (of_property_read_u32(np, "clock-frequency", &clk)) {
413*4882a593Smuzhiyun vuart->clk = devm_clk_get(&pdev->dev, NULL);
414*4882a593Smuzhiyun if (IS_ERR(vuart->clk)) {
415*4882a593Smuzhiyun dev_warn(&pdev->dev,
416*4882a593Smuzhiyun "clk or clock-frequency not defined\n");
417*4882a593Smuzhiyun rc = PTR_ERR(vuart->clk);
418*4882a593Smuzhiyun goto err_sysfs_remove;
419*4882a593Smuzhiyun }
420*4882a593Smuzhiyun
421*4882a593Smuzhiyun rc = clk_prepare_enable(vuart->clk);
422*4882a593Smuzhiyun if (rc < 0)
423*4882a593Smuzhiyun goto err_sysfs_remove;
424*4882a593Smuzhiyun
425*4882a593Smuzhiyun clk = clk_get_rate(vuart->clk);
426*4882a593Smuzhiyun }
427*4882a593Smuzhiyun
428*4882a593Smuzhiyun /* If current-speed was set, then try not to change it. */
429*4882a593Smuzhiyun if (of_property_read_u32(np, "current-speed", &prop) == 0)
430*4882a593Smuzhiyun port.port.custom_divisor = clk / (16 * prop);
431*4882a593Smuzhiyun
432*4882a593Smuzhiyun /* Check for shifted address mapping */
433*4882a593Smuzhiyun if (of_property_read_u32(np, "reg-offset", &prop) == 0)
434*4882a593Smuzhiyun port.port.mapbase += prop;
435*4882a593Smuzhiyun
436*4882a593Smuzhiyun /* Check for registers offset within the devices address range */
437*4882a593Smuzhiyun if (of_property_read_u32(np, "reg-shift", &prop) == 0)
438*4882a593Smuzhiyun port.port.regshift = prop;
439*4882a593Smuzhiyun
440*4882a593Smuzhiyun /* Check for fifo size */
441*4882a593Smuzhiyun if (of_property_read_u32(np, "fifo-size", &prop) == 0)
442*4882a593Smuzhiyun port.port.fifosize = prop;
443*4882a593Smuzhiyun
444*4882a593Smuzhiyun /* Check for a fixed line number */
445*4882a593Smuzhiyun rc = of_alias_get_id(np, "serial");
446*4882a593Smuzhiyun if (rc >= 0)
447*4882a593Smuzhiyun port.port.line = rc;
448*4882a593Smuzhiyun
449*4882a593Smuzhiyun port.port.irq = irq_of_parse_and_map(np, 0);
450*4882a593Smuzhiyun port.port.handle_irq = aspeed_vuart_handle_irq;
451*4882a593Smuzhiyun port.port.iotype = UPIO_MEM;
452*4882a593Smuzhiyun port.port.type = PORT_16550A;
453*4882a593Smuzhiyun port.port.uartclk = clk;
454*4882a593Smuzhiyun port.port.flags = UPF_SHARE_IRQ | UPF_BOOT_AUTOCONF
455*4882a593Smuzhiyun | UPF_FIXED_PORT | UPF_FIXED_TYPE | UPF_NO_THRE_TEST;
456*4882a593Smuzhiyun
457*4882a593Smuzhiyun if (of_property_read_bool(np, "no-loopback-test"))
458*4882a593Smuzhiyun port.port.flags |= UPF_SKIP_TEST;
459*4882a593Smuzhiyun
460*4882a593Smuzhiyun if (port.port.fifosize)
461*4882a593Smuzhiyun port.capabilities = UART_CAP_FIFO;
462*4882a593Smuzhiyun
463*4882a593Smuzhiyun if (of_property_read_bool(np, "auto-flow-control"))
464*4882a593Smuzhiyun port.capabilities |= UART_CAP_AFE;
465*4882a593Smuzhiyun
466*4882a593Smuzhiyun rc = serial8250_register_8250_port(&port);
467*4882a593Smuzhiyun if (rc < 0)
468*4882a593Smuzhiyun goto err_clk_disable;
469*4882a593Smuzhiyun
470*4882a593Smuzhiyun vuart->line = rc;
471*4882a593Smuzhiyun
472*4882a593Smuzhiyun rc = of_parse_phandle_with_fixed_args(
473*4882a593Smuzhiyun np, "aspeed,sirq-polarity-sense", 2, 0,
474*4882a593Smuzhiyun &sirq_polarity_sense_args);
475*4882a593Smuzhiyun if (rc < 0) {
476*4882a593Smuzhiyun dev_dbg(&pdev->dev,
477*4882a593Smuzhiyun "aspeed,sirq-polarity-sense property not found\n");
478*4882a593Smuzhiyun } else {
479*4882a593Smuzhiyun aspeed_vuart_auto_configure_sirq_polarity(
480*4882a593Smuzhiyun vuart, sirq_polarity_sense_args.np,
481*4882a593Smuzhiyun sirq_polarity_sense_args.args[0],
482*4882a593Smuzhiyun BIT(sirq_polarity_sense_args.args[1]));
483*4882a593Smuzhiyun of_node_put(sirq_polarity_sense_args.np);
484*4882a593Smuzhiyun }
485*4882a593Smuzhiyun
486*4882a593Smuzhiyun aspeed_vuart_set_enabled(vuart, true);
487*4882a593Smuzhiyun aspeed_vuart_set_host_tx_discard(vuart, true);
488*4882a593Smuzhiyun platform_set_drvdata(pdev, vuart);
489*4882a593Smuzhiyun
490*4882a593Smuzhiyun return 0;
491*4882a593Smuzhiyun
492*4882a593Smuzhiyun err_clk_disable:
493*4882a593Smuzhiyun clk_disable_unprepare(vuart->clk);
494*4882a593Smuzhiyun irq_dispose_mapping(port.port.irq);
495*4882a593Smuzhiyun err_sysfs_remove:
496*4882a593Smuzhiyun sysfs_remove_group(&vuart->dev->kobj, &aspeed_vuart_attr_group);
497*4882a593Smuzhiyun return rc;
498*4882a593Smuzhiyun }
499*4882a593Smuzhiyun
aspeed_vuart_remove(struct platform_device * pdev)500*4882a593Smuzhiyun static int aspeed_vuart_remove(struct platform_device *pdev)
501*4882a593Smuzhiyun {
502*4882a593Smuzhiyun struct aspeed_vuart *vuart = platform_get_drvdata(pdev);
503*4882a593Smuzhiyun
504*4882a593Smuzhiyun del_timer_sync(&vuart->unthrottle_timer);
505*4882a593Smuzhiyun aspeed_vuart_set_enabled(vuart, false);
506*4882a593Smuzhiyun serial8250_unregister_port(vuart->line);
507*4882a593Smuzhiyun sysfs_remove_group(&vuart->dev->kobj, &aspeed_vuart_attr_group);
508*4882a593Smuzhiyun clk_disable_unprepare(vuart->clk);
509*4882a593Smuzhiyun
510*4882a593Smuzhiyun return 0;
511*4882a593Smuzhiyun }
512*4882a593Smuzhiyun
513*4882a593Smuzhiyun static const struct of_device_id aspeed_vuart_table[] = {
514*4882a593Smuzhiyun { .compatible = "aspeed,ast2400-vuart" },
515*4882a593Smuzhiyun { .compatible = "aspeed,ast2500-vuart" },
516*4882a593Smuzhiyun { },
517*4882a593Smuzhiyun };
518*4882a593Smuzhiyun
519*4882a593Smuzhiyun static struct platform_driver aspeed_vuart_driver = {
520*4882a593Smuzhiyun .driver = {
521*4882a593Smuzhiyun .name = "aspeed-vuart",
522*4882a593Smuzhiyun .of_match_table = aspeed_vuart_table,
523*4882a593Smuzhiyun },
524*4882a593Smuzhiyun .probe = aspeed_vuart_probe,
525*4882a593Smuzhiyun .remove = aspeed_vuart_remove,
526*4882a593Smuzhiyun };
527*4882a593Smuzhiyun
528*4882a593Smuzhiyun module_platform_driver(aspeed_vuart_driver);
529*4882a593Smuzhiyun
530*4882a593Smuzhiyun MODULE_AUTHOR("Jeremy Kerr <jk@ozlabs.org>");
531*4882a593Smuzhiyun MODULE_LICENSE("GPL");
532*4882a593Smuzhiyun MODULE_DESCRIPTION("Driver for Aspeed VUART device");
533