1*4882a593Smuzhiyun // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun * nozomi.c -- HSDPA driver Broadband Wireless Data Card - Globe Trotter
4*4882a593Smuzhiyun *
5*4882a593Smuzhiyun * Written by: Ulf Jakobsson,
6*4882a593Smuzhiyun * Jan Åkerfeldt,
7*4882a593Smuzhiyun * Stefan Thomasson,
8*4882a593Smuzhiyun *
9*4882a593Smuzhiyun * Maintained by: Paul Hardwick (p.hardwick@option.com)
10*4882a593Smuzhiyun *
11*4882a593Smuzhiyun * Patches:
12*4882a593Smuzhiyun * Locking code changes for Vodafone by Sphere Systems Ltd,
13*4882a593Smuzhiyun * Andrew Bird (ajb@spheresystems.co.uk )
14*4882a593Smuzhiyun * & Phil Sanderson
15*4882a593Smuzhiyun *
16*4882a593Smuzhiyun * Source has been ported from an implementation made by Filip Aben @ Option
17*4882a593Smuzhiyun *
18*4882a593Smuzhiyun * --------------------------------------------------------------------------
19*4882a593Smuzhiyun *
20*4882a593Smuzhiyun * Copyright (c) 2005,2006 Option Wireless Sweden AB
21*4882a593Smuzhiyun * Copyright (c) 2006 Sphere Systems Ltd
22*4882a593Smuzhiyun * Copyright (c) 2006 Option Wireless n/v
23*4882a593Smuzhiyun * All rights Reserved.
24*4882a593Smuzhiyun *
25*4882a593Smuzhiyun * --------------------------------------------------------------------------
26*4882a593Smuzhiyun */
27*4882a593Smuzhiyun
28*4882a593Smuzhiyun /* Enable this to have a lot of debug printouts */
29*4882a593Smuzhiyun #define DEBUG
30*4882a593Smuzhiyun
31*4882a593Smuzhiyun #include <linux/kernel.h>
32*4882a593Smuzhiyun #include <linux/module.h>
33*4882a593Smuzhiyun #include <linux/pci.h>
34*4882a593Smuzhiyun #include <linux/ioport.h>
35*4882a593Smuzhiyun #include <linux/tty.h>
36*4882a593Smuzhiyun #include <linux/tty_driver.h>
37*4882a593Smuzhiyun #include <linux/tty_flip.h>
38*4882a593Smuzhiyun #include <linux/sched.h>
39*4882a593Smuzhiyun #include <linux/serial.h>
40*4882a593Smuzhiyun #include <linux/interrupt.h>
41*4882a593Smuzhiyun #include <linux/kmod.h>
42*4882a593Smuzhiyun #include <linux/init.h>
43*4882a593Smuzhiyun #include <linux/kfifo.h>
44*4882a593Smuzhiyun #include <linux/uaccess.h>
45*4882a593Smuzhiyun #include <linux/slab.h>
46*4882a593Smuzhiyun #include <asm/byteorder.h>
47*4882a593Smuzhiyun
48*4882a593Smuzhiyun #include <linux/delay.h>
49*4882a593Smuzhiyun
50*4882a593Smuzhiyun
51*4882a593Smuzhiyun #define VERSION_STRING DRIVER_DESC " 2.1d"
52*4882a593Smuzhiyun
53*4882a593Smuzhiyun /* Default debug printout level */
54*4882a593Smuzhiyun #define NOZOMI_DEBUG_LEVEL 0x00
55*4882a593Smuzhiyun static int debug = NOZOMI_DEBUG_LEVEL;
56*4882a593Smuzhiyun module_param(debug, int, S_IRUGO | S_IWUSR);
57*4882a593Smuzhiyun
58*4882a593Smuzhiyun /* Macros definitions */
59*4882a593Smuzhiyun #define DBG_(lvl, fmt, args...) \
60*4882a593Smuzhiyun do { \
61*4882a593Smuzhiyun if (lvl & debug) \
62*4882a593Smuzhiyun pr_debug("[%d] %s(): " fmt "\n", \
63*4882a593Smuzhiyun __LINE__, __func__, ##args); \
64*4882a593Smuzhiyun } while (0)
65*4882a593Smuzhiyun
66*4882a593Smuzhiyun #define DBG1(args...) DBG_(0x01, ##args)
67*4882a593Smuzhiyun #define DBG2(args...) DBG_(0x02, ##args)
68*4882a593Smuzhiyun #define DBG3(args...) DBG_(0x04, ##args)
69*4882a593Smuzhiyun #define DBG4(args...) DBG_(0x08, ##args)
70*4882a593Smuzhiyun
71*4882a593Smuzhiyun /* TODO: rewrite to optimize macros... */
72*4882a593Smuzhiyun
73*4882a593Smuzhiyun #define TMP_BUF_MAX 256
74*4882a593Smuzhiyun
75*4882a593Smuzhiyun #define DUMP(buf__, len__) \
76*4882a593Smuzhiyun do { \
77*4882a593Smuzhiyun char tbuf[TMP_BUF_MAX] = {0}; \
78*4882a593Smuzhiyun if (len__ > 1) { \
79*4882a593Smuzhiyun u32 data_len = min_t(u32, len__, TMP_BUF_MAX); \
80*4882a593Smuzhiyun strscpy(tbuf, buf__, data_len); \
81*4882a593Smuzhiyun if (tbuf[data_len - 2] == '\r') \
82*4882a593Smuzhiyun tbuf[data_len - 2] = 'r'; \
83*4882a593Smuzhiyun DBG1("SENDING: '%s' (%d+n)", tbuf, len__); \
84*4882a593Smuzhiyun } else { \
85*4882a593Smuzhiyun DBG1("SENDING: '%s' (%d)", tbuf, len__); \
86*4882a593Smuzhiyun } \
87*4882a593Smuzhiyun } while (0)
88*4882a593Smuzhiyun
89*4882a593Smuzhiyun /* Defines */
90*4882a593Smuzhiyun #define NOZOMI_NAME "nozomi"
91*4882a593Smuzhiyun #define NOZOMI_NAME_TTY "nozomi_tty"
92*4882a593Smuzhiyun #define DRIVER_DESC "Nozomi driver"
93*4882a593Smuzhiyun
94*4882a593Smuzhiyun #define NTTY_TTY_MAXMINORS 256
95*4882a593Smuzhiyun #define NTTY_FIFO_BUFFER_SIZE 8192
96*4882a593Smuzhiyun
97*4882a593Smuzhiyun /* Must be power of 2 */
98*4882a593Smuzhiyun #define FIFO_BUFFER_SIZE_UL 8192
99*4882a593Smuzhiyun
100*4882a593Smuzhiyun /* Size of tmp send buffer to card */
101*4882a593Smuzhiyun #define SEND_BUF_MAX 1024
102*4882a593Smuzhiyun #define RECEIVE_BUF_MAX 4
103*4882a593Smuzhiyun
104*4882a593Smuzhiyun
105*4882a593Smuzhiyun #define R_IIR 0x0000 /* Interrupt Identity Register */
106*4882a593Smuzhiyun #define R_FCR 0x0000 /* Flow Control Register */
107*4882a593Smuzhiyun #define R_IER 0x0004 /* Interrupt Enable Register */
108*4882a593Smuzhiyun
109*4882a593Smuzhiyun #define NOZOMI_CONFIG_MAGIC 0xEFEFFEFE
110*4882a593Smuzhiyun #define TOGGLE_VALID 0x0000
111*4882a593Smuzhiyun
112*4882a593Smuzhiyun /* Definition of interrupt tokens */
113*4882a593Smuzhiyun #define MDM_DL1 0x0001
114*4882a593Smuzhiyun #define MDM_UL1 0x0002
115*4882a593Smuzhiyun #define MDM_DL2 0x0004
116*4882a593Smuzhiyun #define MDM_UL2 0x0008
117*4882a593Smuzhiyun #define DIAG_DL1 0x0010
118*4882a593Smuzhiyun #define DIAG_DL2 0x0020
119*4882a593Smuzhiyun #define DIAG_UL 0x0040
120*4882a593Smuzhiyun #define APP1_DL 0x0080
121*4882a593Smuzhiyun #define APP1_UL 0x0100
122*4882a593Smuzhiyun #define APP2_DL 0x0200
123*4882a593Smuzhiyun #define APP2_UL 0x0400
124*4882a593Smuzhiyun #define CTRL_DL 0x0800
125*4882a593Smuzhiyun #define CTRL_UL 0x1000
126*4882a593Smuzhiyun #define RESET 0x8000
127*4882a593Smuzhiyun
128*4882a593Smuzhiyun #define MDM_DL (MDM_DL1 | MDM_DL2)
129*4882a593Smuzhiyun #define MDM_UL (MDM_UL1 | MDM_UL2)
130*4882a593Smuzhiyun #define DIAG_DL (DIAG_DL1 | DIAG_DL2)
131*4882a593Smuzhiyun
132*4882a593Smuzhiyun /* modem signal definition */
133*4882a593Smuzhiyun #define CTRL_DSR 0x0001
134*4882a593Smuzhiyun #define CTRL_DCD 0x0002
135*4882a593Smuzhiyun #define CTRL_RI 0x0004
136*4882a593Smuzhiyun #define CTRL_CTS 0x0008
137*4882a593Smuzhiyun
138*4882a593Smuzhiyun #define CTRL_DTR 0x0001
139*4882a593Smuzhiyun #define CTRL_RTS 0x0002
140*4882a593Smuzhiyun
141*4882a593Smuzhiyun #define MAX_PORT 4
142*4882a593Smuzhiyun #define NOZOMI_MAX_PORTS 5
143*4882a593Smuzhiyun #define NOZOMI_MAX_CARDS (NTTY_TTY_MAXMINORS / MAX_PORT)
144*4882a593Smuzhiyun
145*4882a593Smuzhiyun /* Type definitions */
146*4882a593Smuzhiyun
147*4882a593Smuzhiyun /*
148*4882a593Smuzhiyun * There are two types of nozomi cards,
149*4882a593Smuzhiyun * one with 2048 memory and with 8192 memory
150*4882a593Smuzhiyun */
151*4882a593Smuzhiyun enum card_type {
152*4882a593Smuzhiyun F32_2 = 2048, /* 512 bytes downlink + uplink * 2 -> 2048 */
153*4882a593Smuzhiyun F32_8 = 8192, /* 3072 bytes downl. + 1024 bytes uplink * 2 -> 8192 */
154*4882a593Smuzhiyun };
155*4882a593Smuzhiyun
156*4882a593Smuzhiyun /* Initialization states a card can be in */
157*4882a593Smuzhiyun enum card_state {
158*4882a593Smuzhiyun NOZOMI_STATE_UNKNOWN = 0,
159*4882a593Smuzhiyun NOZOMI_STATE_ENABLED = 1, /* pci device enabled */
160*4882a593Smuzhiyun NOZOMI_STATE_ALLOCATED = 2, /* config setup done */
161*4882a593Smuzhiyun NOZOMI_STATE_READY = 3, /* flowcontrols received */
162*4882a593Smuzhiyun };
163*4882a593Smuzhiyun
164*4882a593Smuzhiyun /* Two different toggle channels exist */
165*4882a593Smuzhiyun enum channel_type {
166*4882a593Smuzhiyun CH_A = 0,
167*4882a593Smuzhiyun CH_B = 1,
168*4882a593Smuzhiyun };
169*4882a593Smuzhiyun
170*4882a593Smuzhiyun /* Port definition for the card regarding flow control */
171*4882a593Smuzhiyun enum ctrl_port_type {
172*4882a593Smuzhiyun CTRL_CMD = 0,
173*4882a593Smuzhiyun CTRL_MDM = 1,
174*4882a593Smuzhiyun CTRL_DIAG = 2,
175*4882a593Smuzhiyun CTRL_APP1 = 3,
176*4882a593Smuzhiyun CTRL_APP2 = 4,
177*4882a593Smuzhiyun CTRL_ERROR = -1,
178*4882a593Smuzhiyun };
179*4882a593Smuzhiyun
180*4882a593Smuzhiyun /* Ports that the nozomi has */
181*4882a593Smuzhiyun enum port_type {
182*4882a593Smuzhiyun PORT_MDM = 0,
183*4882a593Smuzhiyun PORT_DIAG = 1,
184*4882a593Smuzhiyun PORT_APP1 = 2,
185*4882a593Smuzhiyun PORT_APP2 = 3,
186*4882a593Smuzhiyun PORT_CTRL = 4,
187*4882a593Smuzhiyun PORT_ERROR = -1,
188*4882a593Smuzhiyun };
189*4882a593Smuzhiyun
190*4882a593Smuzhiyun #ifdef __BIG_ENDIAN
191*4882a593Smuzhiyun /* Big endian */
192*4882a593Smuzhiyun
193*4882a593Smuzhiyun struct toggles {
194*4882a593Smuzhiyun unsigned int enabled:5; /*
195*4882a593Smuzhiyun * Toggle fields are valid if enabled is 0,
196*4882a593Smuzhiyun * else A-channels must always be used.
197*4882a593Smuzhiyun */
198*4882a593Smuzhiyun unsigned int diag_dl:1;
199*4882a593Smuzhiyun unsigned int mdm_dl:1;
200*4882a593Smuzhiyun unsigned int mdm_ul:1;
201*4882a593Smuzhiyun } __attribute__ ((packed));
202*4882a593Smuzhiyun
203*4882a593Smuzhiyun /* Configuration table to read at startup of card */
204*4882a593Smuzhiyun /* Is for now only needed during initialization phase */
205*4882a593Smuzhiyun struct config_table {
206*4882a593Smuzhiyun u32 signature;
207*4882a593Smuzhiyun u16 product_information;
208*4882a593Smuzhiyun u16 version;
209*4882a593Smuzhiyun u8 pad3[3];
210*4882a593Smuzhiyun struct toggles toggle;
211*4882a593Smuzhiyun u8 pad1[4];
212*4882a593Smuzhiyun u16 dl_mdm_len1; /*
213*4882a593Smuzhiyun * If this is 64, it can hold
214*4882a593Smuzhiyun * 60 bytes + 4 that is length field
215*4882a593Smuzhiyun */
216*4882a593Smuzhiyun u16 dl_start;
217*4882a593Smuzhiyun
218*4882a593Smuzhiyun u16 dl_diag_len1;
219*4882a593Smuzhiyun u16 dl_mdm_len2; /*
220*4882a593Smuzhiyun * If this is 64, it can hold
221*4882a593Smuzhiyun * 60 bytes + 4 that is length field
222*4882a593Smuzhiyun */
223*4882a593Smuzhiyun u16 dl_app1_len;
224*4882a593Smuzhiyun
225*4882a593Smuzhiyun u16 dl_diag_len2;
226*4882a593Smuzhiyun u16 dl_ctrl_len;
227*4882a593Smuzhiyun u16 dl_app2_len;
228*4882a593Smuzhiyun u8 pad2[16];
229*4882a593Smuzhiyun u16 ul_mdm_len1;
230*4882a593Smuzhiyun u16 ul_start;
231*4882a593Smuzhiyun u16 ul_diag_len;
232*4882a593Smuzhiyun u16 ul_mdm_len2;
233*4882a593Smuzhiyun u16 ul_app1_len;
234*4882a593Smuzhiyun u16 ul_app2_len;
235*4882a593Smuzhiyun u16 ul_ctrl_len;
236*4882a593Smuzhiyun } __attribute__ ((packed));
237*4882a593Smuzhiyun
238*4882a593Smuzhiyun /* This stores all control downlink flags */
239*4882a593Smuzhiyun struct ctrl_dl {
240*4882a593Smuzhiyun u8 port;
241*4882a593Smuzhiyun unsigned int reserved:4;
242*4882a593Smuzhiyun unsigned int CTS:1;
243*4882a593Smuzhiyun unsigned int RI:1;
244*4882a593Smuzhiyun unsigned int DCD:1;
245*4882a593Smuzhiyun unsigned int DSR:1;
246*4882a593Smuzhiyun } __attribute__ ((packed));
247*4882a593Smuzhiyun
248*4882a593Smuzhiyun /* This stores all control uplink flags */
249*4882a593Smuzhiyun struct ctrl_ul {
250*4882a593Smuzhiyun u8 port;
251*4882a593Smuzhiyun unsigned int reserved:6;
252*4882a593Smuzhiyun unsigned int RTS:1;
253*4882a593Smuzhiyun unsigned int DTR:1;
254*4882a593Smuzhiyun } __attribute__ ((packed));
255*4882a593Smuzhiyun
256*4882a593Smuzhiyun #else
257*4882a593Smuzhiyun /* Little endian */
258*4882a593Smuzhiyun
259*4882a593Smuzhiyun /* This represents the toggle information */
260*4882a593Smuzhiyun struct toggles {
261*4882a593Smuzhiyun unsigned int mdm_ul:1;
262*4882a593Smuzhiyun unsigned int mdm_dl:1;
263*4882a593Smuzhiyun unsigned int diag_dl:1;
264*4882a593Smuzhiyun unsigned int enabled:5; /*
265*4882a593Smuzhiyun * Toggle fields are valid if enabled is 0,
266*4882a593Smuzhiyun * else A-channels must always be used.
267*4882a593Smuzhiyun */
268*4882a593Smuzhiyun } __attribute__ ((packed));
269*4882a593Smuzhiyun
270*4882a593Smuzhiyun /* Configuration table to read at startup of card */
271*4882a593Smuzhiyun struct config_table {
272*4882a593Smuzhiyun u32 signature;
273*4882a593Smuzhiyun u16 version;
274*4882a593Smuzhiyun u16 product_information;
275*4882a593Smuzhiyun struct toggles toggle;
276*4882a593Smuzhiyun u8 pad1[7];
277*4882a593Smuzhiyun u16 dl_start;
278*4882a593Smuzhiyun u16 dl_mdm_len1; /*
279*4882a593Smuzhiyun * If this is 64, it can hold
280*4882a593Smuzhiyun * 60 bytes + 4 that is length field
281*4882a593Smuzhiyun */
282*4882a593Smuzhiyun u16 dl_mdm_len2;
283*4882a593Smuzhiyun u16 dl_diag_len1;
284*4882a593Smuzhiyun u16 dl_diag_len2;
285*4882a593Smuzhiyun u16 dl_app1_len;
286*4882a593Smuzhiyun u16 dl_app2_len;
287*4882a593Smuzhiyun u16 dl_ctrl_len;
288*4882a593Smuzhiyun u8 pad2[16];
289*4882a593Smuzhiyun u16 ul_start;
290*4882a593Smuzhiyun u16 ul_mdm_len2;
291*4882a593Smuzhiyun u16 ul_mdm_len1;
292*4882a593Smuzhiyun u16 ul_diag_len;
293*4882a593Smuzhiyun u16 ul_app1_len;
294*4882a593Smuzhiyun u16 ul_app2_len;
295*4882a593Smuzhiyun u16 ul_ctrl_len;
296*4882a593Smuzhiyun } __attribute__ ((packed));
297*4882a593Smuzhiyun
298*4882a593Smuzhiyun /* This stores all control downlink flags */
299*4882a593Smuzhiyun struct ctrl_dl {
300*4882a593Smuzhiyun unsigned int DSR:1;
301*4882a593Smuzhiyun unsigned int DCD:1;
302*4882a593Smuzhiyun unsigned int RI:1;
303*4882a593Smuzhiyun unsigned int CTS:1;
304*4882a593Smuzhiyun unsigned int reserved:4;
305*4882a593Smuzhiyun u8 port;
306*4882a593Smuzhiyun } __attribute__ ((packed));
307*4882a593Smuzhiyun
308*4882a593Smuzhiyun /* This stores all control uplink flags */
309*4882a593Smuzhiyun struct ctrl_ul {
310*4882a593Smuzhiyun unsigned int DTR:1;
311*4882a593Smuzhiyun unsigned int RTS:1;
312*4882a593Smuzhiyun unsigned int reserved:6;
313*4882a593Smuzhiyun u8 port;
314*4882a593Smuzhiyun } __attribute__ ((packed));
315*4882a593Smuzhiyun #endif
316*4882a593Smuzhiyun
317*4882a593Smuzhiyun /* This holds all information that is needed regarding a port */
318*4882a593Smuzhiyun struct port {
319*4882a593Smuzhiyun struct tty_port port;
320*4882a593Smuzhiyun u8 update_flow_control;
321*4882a593Smuzhiyun struct ctrl_ul ctrl_ul;
322*4882a593Smuzhiyun struct ctrl_dl ctrl_dl;
323*4882a593Smuzhiyun struct kfifo fifo_ul;
324*4882a593Smuzhiyun void __iomem *dl_addr[2];
325*4882a593Smuzhiyun u32 dl_size[2];
326*4882a593Smuzhiyun u8 toggle_dl;
327*4882a593Smuzhiyun void __iomem *ul_addr[2];
328*4882a593Smuzhiyun u32 ul_size[2];
329*4882a593Smuzhiyun u8 toggle_ul;
330*4882a593Smuzhiyun u16 token_dl;
331*4882a593Smuzhiyun
332*4882a593Smuzhiyun wait_queue_head_t tty_wait;
333*4882a593Smuzhiyun struct async_icount tty_icount;
334*4882a593Smuzhiyun
335*4882a593Smuzhiyun struct nozomi *dc;
336*4882a593Smuzhiyun };
337*4882a593Smuzhiyun
338*4882a593Smuzhiyun /* Private data one for each card in the system */
339*4882a593Smuzhiyun struct nozomi {
340*4882a593Smuzhiyun void __iomem *base_addr;
341*4882a593Smuzhiyun unsigned long flip;
342*4882a593Smuzhiyun
343*4882a593Smuzhiyun /* Pointers to registers */
344*4882a593Smuzhiyun void __iomem *reg_iir;
345*4882a593Smuzhiyun void __iomem *reg_fcr;
346*4882a593Smuzhiyun void __iomem *reg_ier;
347*4882a593Smuzhiyun
348*4882a593Smuzhiyun u16 last_ier;
349*4882a593Smuzhiyun enum card_type card_type;
350*4882a593Smuzhiyun struct config_table config_table; /* Configuration table */
351*4882a593Smuzhiyun struct pci_dev *pdev;
352*4882a593Smuzhiyun struct port port[NOZOMI_MAX_PORTS];
353*4882a593Smuzhiyun u8 *send_buf;
354*4882a593Smuzhiyun
355*4882a593Smuzhiyun spinlock_t spin_mutex; /* secures access to registers and tty */
356*4882a593Smuzhiyun
357*4882a593Smuzhiyun unsigned int index_start;
358*4882a593Smuzhiyun enum card_state state;
359*4882a593Smuzhiyun u32 open_ttys;
360*4882a593Smuzhiyun };
361*4882a593Smuzhiyun
362*4882a593Smuzhiyun /* This is a data packet that is read or written to/from card */
363*4882a593Smuzhiyun struct buffer {
364*4882a593Smuzhiyun u32 size; /* size is the length of the data buffer */
365*4882a593Smuzhiyun u8 *data;
366*4882a593Smuzhiyun } __attribute__ ((packed));
367*4882a593Smuzhiyun
368*4882a593Smuzhiyun /* Global variables */
369*4882a593Smuzhiyun static const struct pci_device_id nozomi_pci_tbl[] = {
370*4882a593Smuzhiyun {PCI_DEVICE(0x1931, 0x000c)}, /* Nozomi HSDPA */
371*4882a593Smuzhiyun {},
372*4882a593Smuzhiyun };
373*4882a593Smuzhiyun
374*4882a593Smuzhiyun MODULE_DEVICE_TABLE(pci, nozomi_pci_tbl);
375*4882a593Smuzhiyun
376*4882a593Smuzhiyun static struct nozomi *ndevs[NOZOMI_MAX_CARDS];
377*4882a593Smuzhiyun static struct tty_driver *ntty_driver;
378*4882a593Smuzhiyun
379*4882a593Smuzhiyun static const struct tty_port_operations noz_tty_port_ops;
380*4882a593Smuzhiyun
381*4882a593Smuzhiyun /*
382*4882a593Smuzhiyun * find card by tty_index
383*4882a593Smuzhiyun */
get_dc_by_tty(const struct tty_struct * tty)384*4882a593Smuzhiyun static inline struct nozomi *get_dc_by_tty(const struct tty_struct *tty)
385*4882a593Smuzhiyun {
386*4882a593Smuzhiyun return tty ? ndevs[tty->index / MAX_PORT] : NULL;
387*4882a593Smuzhiyun }
388*4882a593Smuzhiyun
get_port_by_tty(const struct tty_struct * tty)389*4882a593Smuzhiyun static inline struct port *get_port_by_tty(const struct tty_struct *tty)
390*4882a593Smuzhiyun {
391*4882a593Smuzhiyun struct nozomi *ndev = get_dc_by_tty(tty);
392*4882a593Smuzhiyun return ndev ? &ndev->port[tty->index % MAX_PORT] : NULL;
393*4882a593Smuzhiyun }
394*4882a593Smuzhiyun
395*4882a593Smuzhiyun /*
396*4882a593Smuzhiyun * TODO:
397*4882a593Smuzhiyun * -Optimize
398*4882a593Smuzhiyun * -Rewrite cleaner
399*4882a593Smuzhiyun */
400*4882a593Smuzhiyun
read_mem32(u32 * buf,const void __iomem * mem_addr_start,u32 size_bytes)401*4882a593Smuzhiyun static void read_mem32(u32 *buf, const void __iomem *mem_addr_start,
402*4882a593Smuzhiyun u32 size_bytes)
403*4882a593Smuzhiyun {
404*4882a593Smuzhiyun u32 i = 0;
405*4882a593Smuzhiyun const u32 __iomem *ptr = mem_addr_start;
406*4882a593Smuzhiyun u16 *buf16;
407*4882a593Smuzhiyun
408*4882a593Smuzhiyun if (unlikely(!ptr || !buf))
409*4882a593Smuzhiyun goto out;
410*4882a593Smuzhiyun
411*4882a593Smuzhiyun /* shortcut for extremely often used cases */
412*4882a593Smuzhiyun switch (size_bytes) {
413*4882a593Smuzhiyun case 2: /* 2 bytes */
414*4882a593Smuzhiyun buf16 = (u16 *) buf;
415*4882a593Smuzhiyun *buf16 = __le16_to_cpu(readw(ptr));
416*4882a593Smuzhiyun goto out;
417*4882a593Smuzhiyun break;
418*4882a593Smuzhiyun case 4: /* 4 bytes */
419*4882a593Smuzhiyun *(buf) = __le32_to_cpu(readl(ptr));
420*4882a593Smuzhiyun goto out;
421*4882a593Smuzhiyun break;
422*4882a593Smuzhiyun }
423*4882a593Smuzhiyun
424*4882a593Smuzhiyun while (i < size_bytes) {
425*4882a593Smuzhiyun if (size_bytes - i == 2) {
426*4882a593Smuzhiyun /* Handle 2 bytes in the end */
427*4882a593Smuzhiyun buf16 = (u16 *) buf;
428*4882a593Smuzhiyun *(buf16) = __le16_to_cpu(readw(ptr));
429*4882a593Smuzhiyun i += 2;
430*4882a593Smuzhiyun } else {
431*4882a593Smuzhiyun /* Read 4 bytes */
432*4882a593Smuzhiyun *(buf) = __le32_to_cpu(readl(ptr));
433*4882a593Smuzhiyun i += 4;
434*4882a593Smuzhiyun }
435*4882a593Smuzhiyun buf++;
436*4882a593Smuzhiyun ptr++;
437*4882a593Smuzhiyun }
438*4882a593Smuzhiyun out:
439*4882a593Smuzhiyun return;
440*4882a593Smuzhiyun }
441*4882a593Smuzhiyun
442*4882a593Smuzhiyun /*
443*4882a593Smuzhiyun * TODO:
444*4882a593Smuzhiyun * -Optimize
445*4882a593Smuzhiyun * -Rewrite cleaner
446*4882a593Smuzhiyun */
write_mem32(void __iomem * mem_addr_start,const u32 * buf,u32 size_bytes)447*4882a593Smuzhiyun static u32 write_mem32(void __iomem *mem_addr_start, const u32 *buf,
448*4882a593Smuzhiyun u32 size_bytes)
449*4882a593Smuzhiyun {
450*4882a593Smuzhiyun u32 i = 0;
451*4882a593Smuzhiyun u32 __iomem *ptr = mem_addr_start;
452*4882a593Smuzhiyun const u16 *buf16;
453*4882a593Smuzhiyun
454*4882a593Smuzhiyun if (unlikely(!ptr || !buf))
455*4882a593Smuzhiyun return 0;
456*4882a593Smuzhiyun
457*4882a593Smuzhiyun /* shortcut for extremely often used cases */
458*4882a593Smuzhiyun switch (size_bytes) {
459*4882a593Smuzhiyun case 2: /* 2 bytes */
460*4882a593Smuzhiyun buf16 = (const u16 *)buf;
461*4882a593Smuzhiyun writew(__cpu_to_le16(*buf16), ptr);
462*4882a593Smuzhiyun return 2;
463*4882a593Smuzhiyun break;
464*4882a593Smuzhiyun case 1: /*
465*4882a593Smuzhiyun * also needs to write 4 bytes in this case
466*4882a593Smuzhiyun * so falling through..
467*4882a593Smuzhiyun */
468*4882a593Smuzhiyun case 4: /* 4 bytes */
469*4882a593Smuzhiyun writel(__cpu_to_le32(*buf), ptr);
470*4882a593Smuzhiyun return 4;
471*4882a593Smuzhiyun break;
472*4882a593Smuzhiyun }
473*4882a593Smuzhiyun
474*4882a593Smuzhiyun while (i < size_bytes) {
475*4882a593Smuzhiyun if (size_bytes - i == 2) {
476*4882a593Smuzhiyun /* 2 bytes */
477*4882a593Smuzhiyun buf16 = (const u16 *)buf;
478*4882a593Smuzhiyun writew(__cpu_to_le16(*buf16), ptr);
479*4882a593Smuzhiyun i += 2;
480*4882a593Smuzhiyun } else {
481*4882a593Smuzhiyun /* 4 bytes */
482*4882a593Smuzhiyun writel(__cpu_to_le32(*buf), ptr);
483*4882a593Smuzhiyun i += 4;
484*4882a593Smuzhiyun }
485*4882a593Smuzhiyun buf++;
486*4882a593Smuzhiyun ptr++;
487*4882a593Smuzhiyun }
488*4882a593Smuzhiyun return i;
489*4882a593Smuzhiyun }
490*4882a593Smuzhiyun
491*4882a593Smuzhiyun /* Setup pointers to different channels and also setup buffer sizes. */
nozomi_setup_memory(struct nozomi * dc)492*4882a593Smuzhiyun static void nozomi_setup_memory(struct nozomi *dc)
493*4882a593Smuzhiyun {
494*4882a593Smuzhiyun void __iomem *offset = dc->base_addr + dc->config_table.dl_start;
495*4882a593Smuzhiyun /* The length reported is including the length field of 4 bytes,
496*4882a593Smuzhiyun * hence subtract with 4.
497*4882a593Smuzhiyun */
498*4882a593Smuzhiyun const u16 buff_offset = 4;
499*4882a593Smuzhiyun
500*4882a593Smuzhiyun /* Modem port dl configuration */
501*4882a593Smuzhiyun dc->port[PORT_MDM].dl_addr[CH_A] = offset;
502*4882a593Smuzhiyun dc->port[PORT_MDM].dl_addr[CH_B] =
503*4882a593Smuzhiyun (offset += dc->config_table.dl_mdm_len1);
504*4882a593Smuzhiyun dc->port[PORT_MDM].dl_size[CH_A] =
505*4882a593Smuzhiyun dc->config_table.dl_mdm_len1 - buff_offset;
506*4882a593Smuzhiyun dc->port[PORT_MDM].dl_size[CH_B] =
507*4882a593Smuzhiyun dc->config_table.dl_mdm_len2 - buff_offset;
508*4882a593Smuzhiyun
509*4882a593Smuzhiyun /* Diag port dl configuration */
510*4882a593Smuzhiyun dc->port[PORT_DIAG].dl_addr[CH_A] =
511*4882a593Smuzhiyun (offset += dc->config_table.dl_mdm_len2);
512*4882a593Smuzhiyun dc->port[PORT_DIAG].dl_size[CH_A] =
513*4882a593Smuzhiyun dc->config_table.dl_diag_len1 - buff_offset;
514*4882a593Smuzhiyun dc->port[PORT_DIAG].dl_addr[CH_B] =
515*4882a593Smuzhiyun (offset += dc->config_table.dl_diag_len1);
516*4882a593Smuzhiyun dc->port[PORT_DIAG].dl_size[CH_B] =
517*4882a593Smuzhiyun dc->config_table.dl_diag_len2 - buff_offset;
518*4882a593Smuzhiyun
519*4882a593Smuzhiyun /* App1 port dl configuration */
520*4882a593Smuzhiyun dc->port[PORT_APP1].dl_addr[CH_A] =
521*4882a593Smuzhiyun (offset += dc->config_table.dl_diag_len2);
522*4882a593Smuzhiyun dc->port[PORT_APP1].dl_size[CH_A] =
523*4882a593Smuzhiyun dc->config_table.dl_app1_len - buff_offset;
524*4882a593Smuzhiyun
525*4882a593Smuzhiyun /* App2 port dl configuration */
526*4882a593Smuzhiyun dc->port[PORT_APP2].dl_addr[CH_A] =
527*4882a593Smuzhiyun (offset += dc->config_table.dl_app1_len);
528*4882a593Smuzhiyun dc->port[PORT_APP2].dl_size[CH_A] =
529*4882a593Smuzhiyun dc->config_table.dl_app2_len - buff_offset;
530*4882a593Smuzhiyun
531*4882a593Smuzhiyun /* Ctrl dl configuration */
532*4882a593Smuzhiyun dc->port[PORT_CTRL].dl_addr[CH_A] =
533*4882a593Smuzhiyun (offset += dc->config_table.dl_app2_len);
534*4882a593Smuzhiyun dc->port[PORT_CTRL].dl_size[CH_A] =
535*4882a593Smuzhiyun dc->config_table.dl_ctrl_len - buff_offset;
536*4882a593Smuzhiyun
537*4882a593Smuzhiyun offset = dc->base_addr + dc->config_table.ul_start;
538*4882a593Smuzhiyun
539*4882a593Smuzhiyun /* Modem Port ul configuration */
540*4882a593Smuzhiyun dc->port[PORT_MDM].ul_addr[CH_A] = offset;
541*4882a593Smuzhiyun dc->port[PORT_MDM].ul_size[CH_A] =
542*4882a593Smuzhiyun dc->config_table.ul_mdm_len1 - buff_offset;
543*4882a593Smuzhiyun dc->port[PORT_MDM].ul_addr[CH_B] =
544*4882a593Smuzhiyun (offset += dc->config_table.ul_mdm_len1);
545*4882a593Smuzhiyun dc->port[PORT_MDM].ul_size[CH_B] =
546*4882a593Smuzhiyun dc->config_table.ul_mdm_len2 - buff_offset;
547*4882a593Smuzhiyun
548*4882a593Smuzhiyun /* Diag port ul configuration */
549*4882a593Smuzhiyun dc->port[PORT_DIAG].ul_addr[CH_A] =
550*4882a593Smuzhiyun (offset += dc->config_table.ul_mdm_len2);
551*4882a593Smuzhiyun dc->port[PORT_DIAG].ul_size[CH_A] =
552*4882a593Smuzhiyun dc->config_table.ul_diag_len - buff_offset;
553*4882a593Smuzhiyun
554*4882a593Smuzhiyun /* App1 port ul configuration */
555*4882a593Smuzhiyun dc->port[PORT_APP1].ul_addr[CH_A] =
556*4882a593Smuzhiyun (offset += dc->config_table.ul_diag_len);
557*4882a593Smuzhiyun dc->port[PORT_APP1].ul_size[CH_A] =
558*4882a593Smuzhiyun dc->config_table.ul_app1_len - buff_offset;
559*4882a593Smuzhiyun
560*4882a593Smuzhiyun /* App2 port ul configuration */
561*4882a593Smuzhiyun dc->port[PORT_APP2].ul_addr[CH_A] =
562*4882a593Smuzhiyun (offset += dc->config_table.ul_app1_len);
563*4882a593Smuzhiyun dc->port[PORT_APP2].ul_size[CH_A] =
564*4882a593Smuzhiyun dc->config_table.ul_app2_len - buff_offset;
565*4882a593Smuzhiyun
566*4882a593Smuzhiyun /* Ctrl ul configuration */
567*4882a593Smuzhiyun dc->port[PORT_CTRL].ul_addr[CH_A] =
568*4882a593Smuzhiyun (offset += dc->config_table.ul_app2_len);
569*4882a593Smuzhiyun dc->port[PORT_CTRL].ul_size[CH_A] =
570*4882a593Smuzhiyun dc->config_table.ul_ctrl_len - buff_offset;
571*4882a593Smuzhiyun }
572*4882a593Smuzhiyun
573*4882a593Smuzhiyun /* Dump config table under initalization phase */
574*4882a593Smuzhiyun #ifdef DEBUG
dump_table(const struct nozomi * dc)575*4882a593Smuzhiyun static void dump_table(const struct nozomi *dc)
576*4882a593Smuzhiyun {
577*4882a593Smuzhiyun DBG3("signature: 0x%08X", dc->config_table.signature);
578*4882a593Smuzhiyun DBG3("version: 0x%04X", dc->config_table.version);
579*4882a593Smuzhiyun DBG3("product_information: 0x%04X", \
580*4882a593Smuzhiyun dc->config_table.product_information);
581*4882a593Smuzhiyun DBG3("toggle enabled: %d", dc->config_table.toggle.enabled);
582*4882a593Smuzhiyun DBG3("toggle up_mdm: %d", dc->config_table.toggle.mdm_ul);
583*4882a593Smuzhiyun DBG3("toggle dl_mdm: %d", dc->config_table.toggle.mdm_dl);
584*4882a593Smuzhiyun DBG3("toggle dl_dbg: %d", dc->config_table.toggle.diag_dl);
585*4882a593Smuzhiyun
586*4882a593Smuzhiyun DBG3("dl_start: 0x%04X", dc->config_table.dl_start);
587*4882a593Smuzhiyun DBG3("dl_mdm_len0: 0x%04X, %d", dc->config_table.dl_mdm_len1,
588*4882a593Smuzhiyun dc->config_table.dl_mdm_len1);
589*4882a593Smuzhiyun DBG3("dl_mdm_len1: 0x%04X, %d", dc->config_table.dl_mdm_len2,
590*4882a593Smuzhiyun dc->config_table.dl_mdm_len2);
591*4882a593Smuzhiyun DBG3("dl_diag_len0: 0x%04X, %d", dc->config_table.dl_diag_len1,
592*4882a593Smuzhiyun dc->config_table.dl_diag_len1);
593*4882a593Smuzhiyun DBG3("dl_diag_len1: 0x%04X, %d", dc->config_table.dl_diag_len2,
594*4882a593Smuzhiyun dc->config_table.dl_diag_len2);
595*4882a593Smuzhiyun DBG3("dl_app1_len: 0x%04X, %d", dc->config_table.dl_app1_len,
596*4882a593Smuzhiyun dc->config_table.dl_app1_len);
597*4882a593Smuzhiyun DBG3("dl_app2_len: 0x%04X, %d", dc->config_table.dl_app2_len,
598*4882a593Smuzhiyun dc->config_table.dl_app2_len);
599*4882a593Smuzhiyun DBG3("dl_ctrl_len: 0x%04X, %d", dc->config_table.dl_ctrl_len,
600*4882a593Smuzhiyun dc->config_table.dl_ctrl_len);
601*4882a593Smuzhiyun DBG3("ul_start: 0x%04X, %d", dc->config_table.ul_start,
602*4882a593Smuzhiyun dc->config_table.ul_start);
603*4882a593Smuzhiyun DBG3("ul_mdm_len[0]: 0x%04X, %d", dc->config_table.ul_mdm_len1,
604*4882a593Smuzhiyun dc->config_table.ul_mdm_len1);
605*4882a593Smuzhiyun DBG3("ul_mdm_len[1]: 0x%04X, %d", dc->config_table.ul_mdm_len2,
606*4882a593Smuzhiyun dc->config_table.ul_mdm_len2);
607*4882a593Smuzhiyun DBG3("ul_diag_len: 0x%04X, %d", dc->config_table.ul_diag_len,
608*4882a593Smuzhiyun dc->config_table.ul_diag_len);
609*4882a593Smuzhiyun DBG3("ul_app1_len: 0x%04X, %d", dc->config_table.ul_app1_len,
610*4882a593Smuzhiyun dc->config_table.ul_app1_len);
611*4882a593Smuzhiyun DBG3("ul_app2_len: 0x%04X, %d", dc->config_table.ul_app2_len,
612*4882a593Smuzhiyun dc->config_table.ul_app2_len);
613*4882a593Smuzhiyun DBG3("ul_ctrl_len: 0x%04X, %d", dc->config_table.ul_ctrl_len,
614*4882a593Smuzhiyun dc->config_table.ul_ctrl_len);
615*4882a593Smuzhiyun }
616*4882a593Smuzhiyun #else
dump_table(const struct nozomi * dc)617*4882a593Smuzhiyun static inline void dump_table(const struct nozomi *dc) { }
618*4882a593Smuzhiyun #endif
619*4882a593Smuzhiyun
620*4882a593Smuzhiyun /*
621*4882a593Smuzhiyun * Read configuration table from card under intalization phase
622*4882a593Smuzhiyun * Returns 1 if ok, else 0
623*4882a593Smuzhiyun */
nozomi_read_config_table(struct nozomi * dc)624*4882a593Smuzhiyun static int nozomi_read_config_table(struct nozomi *dc)
625*4882a593Smuzhiyun {
626*4882a593Smuzhiyun read_mem32((u32 *) &dc->config_table, dc->base_addr + 0,
627*4882a593Smuzhiyun sizeof(struct config_table));
628*4882a593Smuzhiyun
629*4882a593Smuzhiyun if (dc->config_table.signature != NOZOMI_CONFIG_MAGIC) {
630*4882a593Smuzhiyun dev_err(&dc->pdev->dev, "ConfigTable Bad! 0x%08X != 0x%08X\n",
631*4882a593Smuzhiyun dc->config_table.signature, NOZOMI_CONFIG_MAGIC);
632*4882a593Smuzhiyun return 0;
633*4882a593Smuzhiyun }
634*4882a593Smuzhiyun
635*4882a593Smuzhiyun if ((dc->config_table.version == 0)
636*4882a593Smuzhiyun || (dc->config_table.toggle.enabled == TOGGLE_VALID)) {
637*4882a593Smuzhiyun int i;
638*4882a593Smuzhiyun DBG1("Second phase, configuring card");
639*4882a593Smuzhiyun
640*4882a593Smuzhiyun nozomi_setup_memory(dc);
641*4882a593Smuzhiyun
642*4882a593Smuzhiyun dc->port[PORT_MDM].toggle_ul = dc->config_table.toggle.mdm_ul;
643*4882a593Smuzhiyun dc->port[PORT_MDM].toggle_dl = dc->config_table.toggle.mdm_dl;
644*4882a593Smuzhiyun dc->port[PORT_DIAG].toggle_dl = dc->config_table.toggle.diag_dl;
645*4882a593Smuzhiyun DBG1("toggle ports: MDM UL:%d MDM DL:%d, DIAG DL:%d",
646*4882a593Smuzhiyun dc->port[PORT_MDM].toggle_ul,
647*4882a593Smuzhiyun dc->port[PORT_MDM].toggle_dl, dc->port[PORT_DIAG].toggle_dl);
648*4882a593Smuzhiyun
649*4882a593Smuzhiyun dump_table(dc);
650*4882a593Smuzhiyun
651*4882a593Smuzhiyun for (i = PORT_MDM; i < MAX_PORT; i++) {
652*4882a593Smuzhiyun memset(&dc->port[i].ctrl_dl, 0, sizeof(struct ctrl_dl));
653*4882a593Smuzhiyun memset(&dc->port[i].ctrl_ul, 0, sizeof(struct ctrl_ul));
654*4882a593Smuzhiyun }
655*4882a593Smuzhiyun
656*4882a593Smuzhiyun /* Enable control channel */
657*4882a593Smuzhiyun dc->last_ier = dc->last_ier | CTRL_DL;
658*4882a593Smuzhiyun writew(dc->last_ier, dc->reg_ier);
659*4882a593Smuzhiyun
660*4882a593Smuzhiyun dc->state = NOZOMI_STATE_ALLOCATED;
661*4882a593Smuzhiyun dev_info(&dc->pdev->dev, "Initialization OK!\n");
662*4882a593Smuzhiyun return 1;
663*4882a593Smuzhiyun }
664*4882a593Smuzhiyun
665*4882a593Smuzhiyun if ((dc->config_table.version > 0)
666*4882a593Smuzhiyun && (dc->config_table.toggle.enabled != TOGGLE_VALID)) {
667*4882a593Smuzhiyun u32 offset = 0;
668*4882a593Smuzhiyun DBG1("First phase: pushing upload buffers, clearing download");
669*4882a593Smuzhiyun
670*4882a593Smuzhiyun dev_info(&dc->pdev->dev, "Version of card: %d\n",
671*4882a593Smuzhiyun dc->config_table.version);
672*4882a593Smuzhiyun
673*4882a593Smuzhiyun /* Here we should disable all I/O over F32. */
674*4882a593Smuzhiyun nozomi_setup_memory(dc);
675*4882a593Smuzhiyun
676*4882a593Smuzhiyun /*
677*4882a593Smuzhiyun * We should send ALL channel pair tokens back along
678*4882a593Smuzhiyun * with reset token
679*4882a593Smuzhiyun */
680*4882a593Smuzhiyun
681*4882a593Smuzhiyun /* push upload modem buffers */
682*4882a593Smuzhiyun write_mem32(dc->port[PORT_MDM].ul_addr[CH_A],
683*4882a593Smuzhiyun (u32 *) &offset, 4);
684*4882a593Smuzhiyun write_mem32(dc->port[PORT_MDM].ul_addr[CH_B],
685*4882a593Smuzhiyun (u32 *) &offset, 4);
686*4882a593Smuzhiyun
687*4882a593Smuzhiyun writew(MDM_UL | DIAG_DL | MDM_DL, dc->reg_fcr);
688*4882a593Smuzhiyun
689*4882a593Smuzhiyun DBG1("First phase done");
690*4882a593Smuzhiyun }
691*4882a593Smuzhiyun
692*4882a593Smuzhiyun return 1;
693*4882a593Smuzhiyun }
694*4882a593Smuzhiyun
695*4882a593Smuzhiyun /* Enable uplink interrupts */
enable_transmit_ul(enum port_type port,struct nozomi * dc)696*4882a593Smuzhiyun static void enable_transmit_ul(enum port_type port, struct nozomi *dc)
697*4882a593Smuzhiyun {
698*4882a593Smuzhiyun static const u16 mask[] = {MDM_UL, DIAG_UL, APP1_UL, APP2_UL, CTRL_UL};
699*4882a593Smuzhiyun
700*4882a593Smuzhiyun if (port < NOZOMI_MAX_PORTS) {
701*4882a593Smuzhiyun dc->last_ier |= mask[port];
702*4882a593Smuzhiyun writew(dc->last_ier, dc->reg_ier);
703*4882a593Smuzhiyun } else {
704*4882a593Smuzhiyun dev_err(&dc->pdev->dev, "Called with wrong port?\n");
705*4882a593Smuzhiyun }
706*4882a593Smuzhiyun }
707*4882a593Smuzhiyun
708*4882a593Smuzhiyun /* Disable uplink interrupts */
disable_transmit_ul(enum port_type port,struct nozomi * dc)709*4882a593Smuzhiyun static void disable_transmit_ul(enum port_type port, struct nozomi *dc)
710*4882a593Smuzhiyun {
711*4882a593Smuzhiyun static const u16 mask[] =
712*4882a593Smuzhiyun {~MDM_UL, ~DIAG_UL, ~APP1_UL, ~APP2_UL, ~CTRL_UL};
713*4882a593Smuzhiyun
714*4882a593Smuzhiyun if (port < NOZOMI_MAX_PORTS) {
715*4882a593Smuzhiyun dc->last_ier &= mask[port];
716*4882a593Smuzhiyun writew(dc->last_ier, dc->reg_ier);
717*4882a593Smuzhiyun } else {
718*4882a593Smuzhiyun dev_err(&dc->pdev->dev, "Called with wrong port?\n");
719*4882a593Smuzhiyun }
720*4882a593Smuzhiyun }
721*4882a593Smuzhiyun
722*4882a593Smuzhiyun /* Enable downlink interrupts */
enable_transmit_dl(enum port_type port,struct nozomi * dc)723*4882a593Smuzhiyun static void enable_transmit_dl(enum port_type port, struct nozomi *dc)
724*4882a593Smuzhiyun {
725*4882a593Smuzhiyun static const u16 mask[] = {MDM_DL, DIAG_DL, APP1_DL, APP2_DL, CTRL_DL};
726*4882a593Smuzhiyun
727*4882a593Smuzhiyun if (port < NOZOMI_MAX_PORTS) {
728*4882a593Smuzhiyun dc->last_ier |= mask[port];
729*4882a593Smuzhiyun writew(dc->last_ier, dc->reg_ier);
730*4882a593Smuzhiyun } else {
731*4882a593Smuzhiyun dev_err(&dc->pdev->dev, "Called with wrong port?\n");
732*4882a593Smuzhiyun }
733*4882a593Smuzhiyun }
734*4882a593Smuzhiyun
735*4882a593Smuzhiyun /* Disable downlink interrupts */
disable_transmit_dl(enum port_type port,struct nozomi * dc)736*4882a593Smuzhiyun static void disable_transmit_dl(enum port_type port, struct nozomi *dc)
737*4882a593Smuzhiyun {
738*4882a593Smuzhiyun static const u16 mask[] =
739*4882a593Smuzhiyun {~MDM_DL, ~DIAG_DL, ~APP1_DL, ~APP2_DL, ~CTRL_DL};
740*4882a593Smuzhiyun
741*4882a593Smuzhiyun if (port < NOZOMI_MAX_PORTS) {
742*4882a593Smuzhiyun dc->last_ier &= mask[port];
743*4882a593Smuzhiyun writew(dc->last_ier, dc->reg_ier);
744*4882a593Smuzhiyun } else {
745*4882a593Smuzhiyun dev_err(&dc->pdev->dev, "Called with wrong port?\n");
746*4882a593Smuzhiyun }
747*4882a593Smuzhiyun }
748*4882a593Smuzhiyun
749*4882a593Smuzhiyun /*
750*4882a593Smuzhiyun * Return 1 - send buffer to card and ack.
751*4882a593Smuzhiyun * Return 0 - don't ack, don't send buffer to card.
752*4882a593Smuzhiyun */
send_data(enum port_type index,struct nozomi * dc)753*4882a593Smuzhiyun static int send_data(enum port_type index, struct nozomi *dc)
754*4882a593Smuzhiyun {
755*4882a593Smuzhiyun u32 size = 0;
756*4882a593Smuzhiyun struct port *port = &dc->port[index];
757*4882a593Smuzhiyun const u8 toggle = port->toggle_ul;
758*4882a593Smuzhiyun void __iomem *addr = port->ul_addr[toggle];
759*4882a593Smuzhiyun const u32 ul_size = port->ul_size[toggle];
760*4882a593Smuzhiyun
761*4882a593Smuzhiyun /* Get data from tty and place in buf for now */
762*4882a593Smuzhiyun size = kfifo_out(&port->fifo_ul, dc->send_buf,
763*4882a593Smuzhiyun ul_size < SEND_BUF_MAX ? ul_size : SEND_BUF_MAX);
764*4882a593Smuzhiyun
765*4882a593Smuzhiyun if (size == 0) {
766*4882a593Smuzhiyun DBG4("No more data to send, disable link:");
767*4882a593Smuzhiyun return 0;
768*4882a593Smuzhiyun }
769*4882a593Smuzhiyun
770*4882a593Smuzhiyun /* DUMP(buf, size); */
771*4882a593Smuzhiyun
772*4882a593Smuzhiyun /* Write length + data */
773*4882a593Smuzhiyun write_mem32(addr, (u32 *) &size, 4);
774*4882a593Smuzhiyun write_mem32(addr + 4, (u32 *) dc->send_buf, size);
775*4882a593Smuzhiyun
776*4882a593Smuzhiyun tty_port_tty_wakeup(&port->port);
777*4882a593Smuzhiyun
778*4882a593Smuzhiyun return 1;
779*4882a593Smuzhiyun }
780*4882a593Smuzhiyun
781*4882a593Smuzhiyun /* If all data has been read, return 1, else 0 */
receive_data(enum port_type index,struct nozomi * dc)782*4882a593Smuzhiyun static int receive_data(enum port_type index, struct nozomi *dc)
783*4882a593Smuzhiyun {
784*4882a593Smuzhiyun u8 buf[RECEIVE_BUF_MAX] = { 0 };
785*4882a593Smuzhiyun int size;
786*4882a593Smuzhiyun u32 offset = 4;
787*4882a593Smuzhiyun struct port *port = &dc->port[index];
788*4882a593Smuzhiyun void __iomem *addr = port->dl_addr[port->toggle_dl];
789*4882a593Smuzhiyun struct tty_struct *tty = tty_port_tty_get(&port->port);
790*4882a593Smuzhiyun int i, ret;
791*4882a593Smuzhiyun
792*4882a593Smuzhiyun size = __le32_to_cpu(readl(addr));
793*4882a593Smuzhiyun /* DBG1( "%d bytes port: %d", size, index); */
794*4882a593Smuzhiyun
795*4882a593Smuzhiyun if (tty && tty_throttled(tty)) {
796*4882a593Smuzhiyun DBG1("No room in tty, don't read data, don't ack interrupt, "
797*4882a593Smuzhiyun "disable interrupt");
798*4882a593Smuzhiyun
799*4882a593Smuzhiyun /* disable interrupt in downlink... */
800*4882a593Smuzhiyun disable_transmit_dl(index, dc);
801*4882a593Smuzhiyun ret = 0;
802*4882a593Smuzhiyun goto put;
803*4882a593Smuzhiyun }
804*4882a593Smuzhiyun
805*4882a593Smuzhiyun if (unlikely(size == 0)) {
806*4882a593Smuzhiyun dev_err(&dc->pdev->dev, "size == 0?\n");
807*4882a593Smuzhiyun ret = 1;
808*4882a593Smuzhiyun goto put;
809*4882a593Smuzhiyun }
810*4882a593Smuzhiyun
811*4882a593Smuzhiyun while (size > 0) {
812*4882a593Smuzhiyun read_mem32((u32 *) buf, addr + offset, RECEIVE_BUF_MAX);
813*4882a593Smuzhiyun
814*4882a593Smuzhiyun if (size == 1) {
815*4882a593Smuzhiyun tty_insert_flip_char(&port->port, buf[0], TTY_NORMAL);
816*4882a593Smuzhiyun size = 0;
817*4882a593Smuzhiyun } else if (size < RECEIVE_BUF_MAX) {
818*4882a593Smuzhiyun size -= tty_insert_flip_string(&port->port,
819*4882a593Smuzhiyun (char *)buf, size);
820*4882a593Smuzhiyun } else {
821*4882a593Smuzhiyun i = tty_insert_flip_string(&port->port,
822*4882a593Smuzhiyun (char *)buf, RECEIVE_BUF_MAX);
823*4882a593Smuzhiyun size -= i;
824*4882a593Smuzhiyun offset += i;
825*4882a593Smuzhiyun }
826*4882a593Smuzhiyun }
827*4882a593Smuzhiyun
828*4882a593Smuzhiyun set_bit(index, &dc->flip);
829*4882a593Smuzhiyun ret = 1;
830*4882a593Smuzhiyun put:
831*4882a593Smuzhiyun tty_kref_put(tty);
832*4882a593Smuzhiyun return ret;
833*4882a593Smuzhiyun }
834*4882a593Smuzhiyun
835*4882a593Smuzhiyun /* Debug for interrupts */
836*4882a593Smuzhiyun #ifdef DEBUG
interrupt2str(u16 interrupt)837*4882a593Smuzhiyun static char *interrupt2str(u16 interrupt)
838*4882a593Smuzhiyun {
839*4882a593Smuzhiyun static char buf[TMP_BUF_MAX];
840*4882a593Smuzhiyun char *p = buf;
841*4882a593Smuzhiyun
842*4882a593Smuzhiyun if (interrupt & MDM_DL1)
843*4882a593Smuzhiyun p += scnprintf(p, TMP_BUF_MAX, "MDM_DL1 ");
844*4882a593Smuzhiyun if (interrupt & MDM_DL2)
845*4882a593Smuzhiyun p += scnprintf(p, TMP_BUF_MAX - (p - buf), "MDM_DL2 ");
846*4882a593Smuzhiyun if (interrupt & MDM_UL1)
847*4882a593Smuzhiyun p += scnprintf(p, TMP_BUF_MAX - (p - buf), "MDM_UL1 ");
848*4882a593Smuzhiyun if (interrupt & MDM_UL2)
849*4882a593Smuzhiyun p += scnprintf(p, TMP_BUF_MAX - (p - buf), "MDM_UL2 ");
850*4882a593Smuzhiyun if (interrupt & DIAG_DL1)
851*4882a593Smuzhiyun p += scnprintf(p, TMP_BUF_MAX - (p - buf), "DIAG_DL1 ");
852*4882a593Smuzhiyun if (interrupt & DIAG_DL2)
853*4882a593Smuzhiyun p += scnprintf(p, TMP_BUF_MAX - (p - buf), "DIAG_DL2 ");
854*4882a593Smuzhiyun
855*4882a593Smuzhiyun if (interrupt & DIAG_UL)
856*4882a593Smuzhiyun p += scnprintf(p, TMP_BUF_MAX - (p - buf), "DIAG_UL ");
857*4882a593Smuzhiyun
858*4882a593Smuzhiyun if (interrupt & APP1_DL)
859*4882a593Smuzhiyun p += scnprintf(p, TMP_BUF_MAX - (p - buf), "APP1_DL ");
860*4882a593Smuzhiyun if (interrupt & APP2_DL)
861*4882a593Smuzhiyun p += scnprintf(p, TMP_BUF_MAX - (p - buf), "APP2_DL ");
862*4882a593Smuzhiyun
863*4882a593Smuzhiyun if (interrupt & APP1_UL)
864*4882a593Smuzhiyun p += scnprintf(p, TMP_BUF_MAX - (p - buf), "APP1_UL ");
865*4882a593Smuzhiyun if (interrupt & APP2_UL)
866*4882a593Smuzhiyun p += scnprintf(p, TMP_BUF_MAX - (p - buf), "APP2_UL ");
867*4882a593Smuzhiyun
868*4882a593Smuzhiyun if (interrupt & CTRL_DL)
869*4882a593Smuzhiyun p += scnprintf(p, TMP_BUF_MAX - (p - buf), "CTRL_DL ");
870*4882a593Smuzhiyun if (interrupt & CTRL_UL)
871*4882a593Smuzhiyun p += scnprintf(p, TMP_BUF_MAX - (p - buf), "CTRL_UL ");
872*4882a593Smuzhiyun
873*4882a593Smuzhiyun if (interrupt & RESET)
874*4882a593Smuzhiyun p += scnprintf(p, TMP_BUF_MAX - (p - buf), "RESET ");
875*4882a593Smuzhiyun
876*4882a593Smuzhiyun return buf;
877*4882a593Smuzhiyun }
878*4882a593Smuzhiyun #endif
879*4882a593Smuzhiyun
880*4882a593Smuzhiyun /*
881*4882a593Smuzhiyun * Receive flow control
882*4882a593Smuzhiyun * Return 1 - If ok, else 0
883*4882a593Smuzhiyun */
receive_flow_control(struct nozomi * dc)884*4882a593Smuzhiyun static int receive_flow_control(struct nozomi *dc)
885*4882a593Smuzhiyun {
886*4882a593Smuzhiyun enum port_type port = PORT_MDM;
887*4882a593Smuzhiyun struct ctrl_dl ctrl_dl;
888*4882a593Smuzhiyun struct ctrl_dl old_ctrl;
889*4882a593Smuzhiyun u16 enable_ier = 0;
890*4882a593Smuzhiyun
891*4882a593Smuzhiyun read_mem32((u32 *) &ctrl_dl, dc->port[PORT_CTRL].dl_addr[CH_A], 2);
892*4882a593Smuzhiyun
893*4882a593Smuzhiyun switch (ctrl_dl.port) {
894*4882a593Smuzhiyun case CTRL_CMD:
895*4882a593Smuzhiyun DBG1("The Base Band sends this value as a response to a "
896*4882a593Smuzhiyun "request for IMSI detach sent over the control "
897*4882a593Smuzhiyun "channel uplink (see section 7.6.1).");
898*4882a593Smuzhiyun break;
899*4882a593Smuzhiyun case CTRL_MDM:
900*4882a593Smuzhiyun port = PORT_MDM;
901*4882a593Smuzhiyun enable_ier = MDM_DL;
902*4882a593Smuzhiyun break;
903*4882a593Smuzhiyun case CTRL_DIAG:
904*4882a593Smuzhiyun port = PORT_DIAG;
905*4882a593Smuzhiyun enable_ier = DIAG_DL;
906*4882a593Smuzhiyun break;
907*4882a593Smuzhiyun case CTRL_APP1:
908*4882a593Smuzhiyun port = PORT_APP1;
909*4882a593Smuzhiyun enable_ier = APP1_DL;
910*4882a593Smuzhiyun break;
911*4882a593Smuzhiyun case CTRL_APP2:
912*4882a593Smuzhiyun port = PORT_APP2;
913*4882a593Smuzhiyun enable_ier = APP2_DL;
914*4882a593Smuzhiyun if (dc->state == NOZOMI_STATE_ALLOCATED) {
915*4882a593Smuzhiyun /*
916*4882a593Smuzhiyun * After card initialization the flow control
917*4882a593Smuzhiyun * received for APP2 is always the last
918*4882a593Smuzhiyun */
919*4882a593Smuzhiyun dc->state = NOZOMI_STATE_READY;
920*4882a593Smuzhiyun dev_info(&dc->pdev->dev, "Device READY!\n");
921*4882a593Smuzhiyun }
922*4882a593Smuzhiyun break;
923*4882a593Smuzhiyun default:
924*4882a593Smuzhiyun dev_err(&dc->pdev->dev,
925*4882a593Smuzhiyun "ERROR: flow control received for non-existing port\n");
926*4882a593Smuzhiyun return 0;
927*4882a593Smuzhiyun }
928*4882a593Smuzhiyun
929*4882a593Smuzhiyun DBG1("0x%04X->0x%04X", *((u16 *)&dc->port[port].ctrl_dl),
930*4882a593Smuzhiyun *((u16 *)&ctrl_dl));
931*4882a593Smuzhiyun
932*4882a593Smuzhiyun old_ctrl = dc->port[port].ctrl_dl;
933*4882a593Smuzhiyun dc->port[port].ctrl_dl = ctrl_dl;
934*4882a593Smuzhiyun
935*4882a593Smuzhiyun if (old_ctrl.CTS == 1 && ctrl_dl.CTS == 0) {
936*4882a593Smuzhiyun DBG1("Disable interrupt (0x%04X) on port: %d",
937*4882a593Smuzhiyun enable_ier, port);
938*4882a593Smuzhiyun disable_transmit_ul(port, dc);
939*4882a593Smuzhiyun
940*4882a593Smuzhiyun } else if (old_ctrl.CTS == 0 && ctrl_dl.CTS == 1) {
941*4882a593Smuzhiyun
942*4882a593Smuzhiyun if (kfifo_len(&dc->port[port].fifo_ul)) {
943*4882a593Smuzhiyun DBG1("Enable interrupt (0x%04X) on port: %d",
944*4882a593Smuzhiyun enable_ier, port);
945*4882a593Smuzhiyun DBG1("Data in buffer [%d], enable transmit! ",
946*4882a593Smuzhiyun kfifo_len(&dc->port[port].fifo_ul));
947*4882a593Smuzhiyun enable_transmit_ul(port, dc);
948*4882a593Smuzhiyun } else {
949*4882a593Smuzhiyun DBG1("No data in buffer...");
950*4882a593Smuzhiyun }
951*4882a593Smuzhiyun }
952*4882a593Smuzhiyun
953*4882a593Smuzhiyun if (*(u16 *)&old_ctrl == *(u16 *)&ctrl_dl) {
954*4882a593Smuzhiyun DBG1(" No change in mctrl");
955*4882a593Smuzhiyun return 1;
956*4882a593Smuzhiyun }
957*4882a593Smuzhiyun /* Update statistics */
958*4882a593Smuzhiyun if (old_ctrl.CTS != ctrl_dl.CTS)
959*4882a593Smuzhiyun dc->port[port].tty_icount.cts++;
960*4882a593Smuzhiyun if (old_ctrl.DSR != ctrl_dl.DSR)
961*4882a593Smuzhiyun dc->port[port].tty_icount.dsr++;
962*4882a593Smuzhiyun if (old_ctrl.RI != ctrl_dl.RI)
963*4882a593Smuzhiyun dc->port[port].tty_icount.rng++;
964*4882a593Smuzhiyun if (old_ctrl.DCD != ctrl_dl.DCD)
965*4882a593Smuzhiyun dc->port[port].tty_icount.dcd++;
966*4882a593Smuzhiyun
967*4882a593Smuzhiyun wake_up_interruptible(&dc->port[port].tty_wait);
968*4882a593Smuzhiyun
969*4882a593Smuzhiyun DBG1("port: %d DCD(%d), CTS(%d), RI(%d), DSR(%d)",
970*4882a593Smuzhiyun port,
971*4882a593Smuzhiyun dc->port[port].tty_icount.dcd, dc->port[port].tty_icount.cts,
972*4882a593Smuzhiyun dc->port[port].tty_icount.rng, dc->port[port].tty_icount.dsr);
973*4882a593Smuzhiyun
974*4882a593Smuzhiyun return 1;
975*4882a593Smuzhiyun }
976*4882a593Smuzhiyun
port2ctrl(enum port_type port,const struct nozomi * dc)977*4882a593Smuzhiyun static enum ctrl_port_type port2ctrl(enum port_type port,
978*4882a593Smuzhiyun const struct nozomi *dc)
979*4882a593Smuzhiyun {
980*4882a593Smuzhiyun switch (port) {
981*4882a593Smuzhiyun case PORT_MDM:
982*4882a593Smuzhiyun return CTRL_MDM;
983*4882a593Smuzhiyun case PORT_DIAG:
984*4882a593Smuzhiyun return CTRL_DIAG;
985*4882a593Smuzhiyun case PORT_APP1:
986*4882a593Smuzhiyun return CTRL_APP1;
987*4882a593Smuzhiyun case PORT_APP2:
988*4882a593Smuzhiyun return CTRL_APP2;
989*4882a593Smuzhiyun default:
990*4882a593Smuzhiyun dev_err(&dc->pdev->dev,
991*4882a593Smuzhiyun "ERROR: send flow control " \
992*4882a593Smuzhiyun "received for non-existing port\n");
993*4882a593Smuzhiyun }
994*4882a593Smuzhiyun return CTRL_ERROR;
995*4882a593Smuzhiyun }
996*4882a593Smuzhiyun
997*4882a593Smuzhiyun /*
998*4882a593Smuzhiyun * Send flow control, can only update one channel at a time
999*4882a593Smuzhiyun * Return 0 - If we have updated all flow control
1000*4882a593Smuzhiyun * Return 1 - If we need to update more flow control, ack current enable more
1001*4882a593Smuzhiyun */
send_flow_control(struct nozomi * dc)1002*4882a593Smuzhiyun static int send_flow_control(struct nozomi *dc)
1003*4882a593Smuzhiyun {
1004*4882a593Smuzhiyun u32 i, more_flow_control_to_be_updated = 0;
1005*4882a593Smuzhiyun u16 *ctrl;
1006*4882a593Smuzhiyun
1007*4882a593Smuzhiyun for (i = PORT_MDM; i < MAX_PORT; i++) {
1008*4882a593Smuzhiyun if (dc->port[i].update_flow_control) {
1009*4882a593Smuzhiyun if (more_flow_control_to_be_updated) {
1010*4882a593Smuzhiyun /* We have more flow control to be updated */
1011*4882a593Smuzhiyun return 1;
1012*4882a593Smuzhiyun }
1013*4882a593Smuzhiyun dc->port[i].ctrl_ul.port = port2ctrl(i, dc);
1014*4882a593Smuzhiyun ctrl = (u16 *)&dc->port[i].ctrl_ul;
1015*4882a593Smuzhiyun write_mem32(dc->port[PORT_CTRL].ul_addr[0], \
1016*4882a593Smuzhiyun (u32 *) ctrl, 2);
1017*4882a593Smuzhiyun dc->port[i].update_flow_control = 0;
1018*4882a593Smuzhiyun more_flow_control_to_be_updated = 1;
1019*4882a593Smuzhiyun }
1020*4882a593Smuzhiyun }
1021*4882a593Smuzhiyun return 0;
1022*4882a593Smuzhiyun }
1023*4882a593Smuzhiyun
1024*4882a593Smuzhiyun /*
1025*4882a593Smuzhiyun * Handle downlink data, ports that are handled are modem and diagnostics
1026*4882a593Smuzhiyun * Return 1 - ok
1027*4882a593Smuzhiyun * Return 0 - toggle fields are out of sync
1028*4882a593Smuzhiyun */
handle_data_dl(struct nozomi * dc,enum port_type port,u8 * toggle,u16 read_iir,u16 mask1,u16 mask2)1029*4882a593Smuzhiyun static int handle_data_dl(struct nozomi *dc, enum port_type port, u8 *toggle,
1030*4882a593Smuzhiyun u16 read_iir, u16 mask1, u16 mask2)
1031*4882a593Smuzhiyun {
1032*4882a593Smuzhiyun if (*toggle == 0 && read_iir & mask1) {
1033*4882a593Smuzhiyun if (receive_data(port, dc)) {
1034*4882a593Smuzhiyun writew(mask1, dc->reg_fcr);
1035*4882a593Smuzhiyun *toggle = !(*toggle);
1036*4882a593Smuzhiyun }
1037*4882a593Smuzhiyun
1038*4882a593Smuzhiyun if (read_iir & mask2) {
1039*4882a593Smuzhiyun if (receive_data(port, dc)) {
1040*4882a593Smuzhiyun writew(mask2, dc->reg_fcr);
1041*4882a593Smuzhiyun *toggle = !(*toggle);
1042*4882a593Smuzhiyun }
1043*4882a593Smuzhiyun }
1044*4882a593Smuzhiyun } else if (*toggle == 1 && read_iir & mask2) {
1045*4882a593Smuzhiyun if (receive_data(port, dc)) {
1046*4882a593Smuzhiyun writew(mask2, dc->reg_fcr);
1047*4882a593Smuzhiyun *toggle = !(*toggle);
1048*4882a593Smuzhiyun }
1049*4882a593Smuzhiyun
1050*4882a593Smuzhiyun if (read_iir & mask1) {
1051*4882a593Smuzhiyun if (receive_data(port, dc)) {
1052*4882a593Smuzhiyun writew(mask1, dc->reg_fcr);
1053*4882a593Smuzhiyun *toggle = !(*toggle);
1054*4882a593Smuzhiyun }
1055*4882a593Smuzhiyun }
1056*4882a593Smuzhiyun } else {
1057*4882a593Smuzhiyun dev_err(&dc->pdev->dev, "port out of sync!, toggle:%d\n",
1058*4882a593Smuzhiyun *toggle);
1059*4882a593Smuzhiyun return 0;
1060*4882a593Smuzhiyun }
1061*4882a593Smuzhiyun return 1;
1062*4882a593Smuzhiyun }
1063*4882a593Smuzhiyun
1064*4882a593Smuzhiyun /*
1065*4882a593Smuzhiyun * Handle uplink data, this is currently for the modem port
1066*4882a593Smuzhiyun * Return 1 - ok
1067*4882a593Smuzhiyun * Return 0 - toggle field are out of sync
1068*4882a593Smuzhiyun */
handle_data_ul(struct nozomi * dc,enum port_type port,u16 read_iir)1069*4882a593Smuzhiyun static int handle_data_ul(struct nozomi *dc, enum port_type port, u16 read_iir)
1070*4882a593Smuzhiyun {
1071*4882a593Smuzhiyun u8 *toggle = &(dc->port[port].toggle_ul);
1072*4882a593Smuzhiyun
1073*4882a593Smuzhiyun if (*toggle == 0 && read_iir & MDM_UL1) {
1074*4882a593Smuzhiyun dc->last_ier &= ~MDM_UL;
1075*4882a593Smuzhiyun writew(dc->last_ier, dc->reg_ier);
1076*4882a593Smuzhiyun if (send_data(port, dc)) {
1077*4882a593Smuzhiyun writew(MDM_UL1, dc->reg_fcr);
1078*4882a593Smuzhiyun dc->last_ier = dc->last_ier | MDM_UL;
1079*4882a593Smuzhiyun writew(dc->last_ier, dc->reg_ier);
1080*4882a593Smuzhiyun *toggle = !*toggle;
1081*4882a593Smuzhiyun }
1082*4882a593Smuzhiyun
1083*4882a593Smuzhiyun if (read_iir & MDM_UL2) {
1084*4882a593Smuzhiyun dc->last_ier &= ~MDM_UL;
1085*4882a593Smuzhiyun writew(dc->last_ier, dc->reg_ier);
1086*4882a593Smuzhiyun if (send_data(port, dc)) {
1087*4882a593Smuzhiyun writew(MDM_UL2, dc->reg_fcr);
1088*4882a593Smuzhiyun dc->last_ier = dc->last_ier | MDM_UL;
1089*4882a593Smuzhiyun writew(dc->last_ier, dc->reg_ier);
1090*4882a593Smuzhiyun *toggle = !*toggle;
1091*4882a593Smuzhiyun }
1092*4882a593Smuzhiyun }
1093*4882a593Smuzhiyun
1094*4882a593Smuzhiyun } else if (*toggle == 1 && read_iir & MDM_UL2) {
1095*4882a593Smuzhiyun dc->last_ier &= ~MDM_UL;
1096*4882a593Smuzhiyun writew(dc->last_ier, dc->reg_ier);
1097*4882a593Smuzhiyun if (send_data(port, dc)) {
1098*4882a593Smuzhiyun writew(MDM_UL2, dc->reg_fcr);
1099*4882a593Smuzhiyun dc->last_ier = dc->last_ier | MDM_UL;
1100*4882a593Smuzhiyun writew(dc->last_ier, dc->reg_ier);
1101*4882a593Smuzhiyun *toggle = !*toggle;
1102*4882a593Smuzhiyun }
1103*4882a593Smuzhiyun
1104*4882a593Smuzhiyun if (read_iir & MDM_UL1) {
1105*4882a593Smuzhiyun dc->last_ier &= ~MDM_UL;
1106*4882a593Smuzhiyun writew(dc->last_ier, dc->reg_ier);
1107*4882a593Smuzhiyun if (send_data(port, dc)) {
1108*4882a593Smuzhiyun writew(MDM_UL1, dc->reg_fcr);
1109*4882a593Smuzhiyun dc->last_ier = dc->last_ier | MDM_UL;
1110*4882a593Smuzhiyun writew(dc->last_ier, dc->reg_ier);
1111*4882a593Smuzhiyun *toggle = !*toggle;
1112*4882a593Smuzhiyun }
1113*4882a593Smuzhiyun }
1114*4882a593Smuzhiyun } else {
1115*4882a593Smuzhiyun writew(read_iir & MDM_UL, dc->reg_fcr);
1116*4882a593Smuzhiyun dev_err(&dc->pdev->dev, "port out of sync!\n");
1117*4882a593Smuzhiyun return 0;
1118*4882a593Smuzhiyun }
1119*4882a593Smuzhiyun return 1;
1120*4882a593Smuzhiyun }
1121*4882a593Smuzhiyun
interrupt_handler(int irq,void * dev_id)1122*4882a593Smuzhiyun static irqreturn_t interrupt_handler(int irq, void *dev_id)
1123*4882a593Smuzhiyun {
1124*4882a593Smuzhiyun struct nozomi *dc = dev_id;
1125*4882a593Smuzhiyun unsigned int a;
1126*4882a593Smuzhiyun u16 read_iir;
1127*4882a593Smuzhiyun
1128*4882a593Smuzhiyun if (!dc)
1129*4882a593Smuzhiyun return IRQ_NONE;
1130*4882a593Smuzhiyun
1131*4882a593Smuzhiyun spin_lock(&dc->spin_mutex);
1132*4882a593Smuzhiyun read_iir = readw(dc->reg_iir);
1133*4882a593Smuzhiyun
1134*4882a593Smuzhiyun /* Card removed */
1135*4882a593Smuzhiyun if (read_iir == (u16)-1)
1136*4882a593Smuzhiyun goto none;
1137*4882a593Smuzhiyun /*
1138*4882a593Smuzhiyun * Just handle interrupt enabled in IER
1139*4882a593Smuzhiyun * (by masking with dc->last_ier)
1140*4882a593Smuzhiyun */
1141*4882a593Smuzhiyun read_iir &= dc->last_ier;
1142*4882a593Smuzhiyun
1143*4882a593Smuzhiyun if (read_iir == 0)
1144*4882a593Smuzhiyun goto none;
1145*4882a593Smuzhiyun
1146*4882a593Smuzhiyun
1147*4882a593Smuzhiyun DBG4("%s irq:0x%04X, prev:0x%04X", interrupt2str(read_iir), read_iir,
1148*4882a593Smuzhiyun dc->last_ier);
1149*4882a593Smuzhiyun
1150*4882a593Smuzhiyun if (read_iir & RESET) {
1151*4882a593Smuzhiyun if (unlikely(!nozomi_read_config_table(dc))) {
1152*4882a593Smuzhiyun dc->last_ier = 0x0;
1153*4882a593Smuzhiyun writew(dc->last_ier, dc->reg_ier);
1154*4882a593Smuzhiyun dev_err(&dc->pdev->dev, "Could not read status from "
1155*4882a593Smuzhiyun "card, we should disable interface\n");
1156*4882a593Smuzhiyun } else {
1157*4882a593Smuzhiyun writew(RESET, dc->reg_fcr);
1158*4882a593Smuzhiyun }
1159*4882a593Smuzhiyun /* No more useful info if this was the reset interrupt. */
1160*4882a593Smuzhiyun goto exit_handler;
1161*4882a593Smuzhiyun }
1162*4882a593Smuzhiyun if (read_iir & CTRL_UL) {
1163*4882a593Smuzhiyun DBG1("CTRL_UL");
1164*4882a593Smuzhiyun dc->last_ier &= ~CTRL_UL;
1165*4882a593Smuzhiyun writew(dc->last_ier, dc->reg_ier);
1166*4882a593Smuzhiyun if (send_flow_control(dc)) {
1167*4882a593Smuzhiyun writew(CTRL_UL, dc->reg_fcr);
1168*4882a593Smuzhiyun dc->last_ier = dc->last_ier | CTRL_UL;
1169*4882a593Smuzhiyun writew(dc->last_ier, dc->reg_ier);
1170*4882a593Smuzhiyun }
1171*4882a593Smuzhiyun }
1172*4882a593Smuzhiyun if (read_iir & CTRL_DL) {
1173*4882a593Smuzhiyun receive_flow_control(dc);
1174*4882a593Smuzhiyun writew(CTRL_DL, dc->reg_fcr);
1175*4882a593Smuzhiyun }
1176*4882a593Smuzhiyun if (read_iir & MDM_DL) {
1177*4882a593Smuzhiyun if (!handle_data_dl(dc, PORT_MDM,
1178*4882a593Smuzhiyun &(dc->port[PORT_MDM].toggle_dl), read_iir,
1179*4882a593Smuzhiyun MDM_DL1, MDM_DL2)) {
1180*4882a593Smuzhiyun dev_err(&dc->pdev->dev, "MDM_DL out of sync!\n");
1181*4882a593Smuzhiyun goto exit_handler;
1182*4882a593Smuzhiyun }
1183*4882a593Smuzhiyun }
1184*4882a593Smuzhiyun if (read_iir & MDM_UL) {
1185*4882a593Smuzhiyun if (!handle_data_ul(dc, PORT_MDM, read_iir)) {
1186*4882a593Smuzhiyun dev_err(&dc->pdev->dev, "MDM_UL out of sync!\n");
1187*4882a593Smuzhiyun goto exit_handler;
1188*4882a593Smuzhiyun }
1189*4882a593Smuzhiyun }
1190*4882a593Smuzhiyun if (read_iir & DIAG_DL) {
1191*4882a593Smuzhiyun if (!handle_data_dl(dc, PORT_DIAG,
1192*4882a593Smuzhiyun &(dc->port[PORT_DIAG].toggle_dl), read_iir,
1193*4882a593Smuzhiyun DIAG_DL1, DIAG_DL2)) {
1194*4882a593Smuzhiyun dev_err(&dc->pdev->dev, "DIAG_DL out of sync!\n");
1195*4882a593Smuzhiyun goto exit_handler;
1196*4882a593Smuzhiyun }
1197*4882a593Smuzhiyun }
1198*4882a593Smuzhiyun if (read_iir & DIAG_UL) {
1199*4882a593Smuzhiyun dc->last_ier &= ~DIAG_UL;
1200*4882a593Smuzhiyun writew(dc->last_ier, dc->reg_ier);
1201*4882a593Smuzhiyun if (send_data(PORT_DIAG, dc)) {
1202*4882a593Smuzhiyun writew(DIAG_UL, dc->reg_fcr);
1203*4882a593Smuzhiyun dc->last_ier = dc->last_ier | DIAG_UL;
1204*4882a593Smuzhiyun writew(dc->last_ier, dc->reg_ier);
1205*4882a593Smuzhiyun }
1206*4882a593Smuzhiyun }
1207*4882a593Smuzhiyun if (read_iir & APP1_DL) {
1208*4882a593Smuzhiyun if (receive_data(PORT_APP1, dc))
1209*4882a593Smuzhiyun writew(APP1_DL, dc->reg_fcr);
1210*4882a593Smuzhiyun }
1211*4882a593Smuzhiyun if (read_iir & APP1_UL) {
1212*4882a593Smuzhiyun dc->last_ier &= ~APP1_UL;
1213*4882a593Smuzhiyun writew(dc->last_ier, dc->reg_ier);
1214*4882a593Smuzhiyun if (send_data(PORT_APP1, dc)) {
1215*4882a593Smuzhiyun writew(APP1_UL, dc->reg_fcr);
1216*4882a593Smuzhiyun dc->last_ier = dc->last_ier | APP1_UL;
1217*4882a593Smuzhiyun writew(dc->last_ier, dc->reg_ier);
1218*4882a593Smuzhiyun }
1219*4882a593Smuzhiyun }
1220*4882a593Smuzhiyun if (read_iir & APP2_DL) {
1221*4882a593Smuzhiyun if (receive_data(PORT_APP2, dc))
1222*4882a593Smuzhiyun writew(APP2_DL, dc->reg_fcr);
1223*4882a593Smuzhiyun }
1224*4882a593Smuzhiyun if (read_iir & APP2_UL) {
1225*4882a593Smuzhiyun dc->last_ier &= ~APP2_UL;
1226*4882a593Smuzhiyun writew(dc->last_ier, dc->reg_ier);
1227*4882a593Smuzhiyun if (send_data(PORT_APP2, dc)) {
1228*4882a593Smuzhiyun writew(APP2_UL, dc->reg_fcr);
1229*4882a593Smuzhiyun dc->last_ier = dc->last_ier | APP2_UL;
1230*4882a593Smuzhiyun writew(dc->last_ier, dc->reg_ier);
1231*4882a593Smuzhiyun }
1232*4882a593Smuzhiyun }
1233*4882a593Smuzhiyun
1234*4882a593Smuzhiyun exit_handler:
1235*4882a593Smuzhiyun spin_unlock(&dc->spin_mutex);
1236*4882a593Smuzhiyun
1237*4882a593Smuzhiyun for (a = 0; a < NOZOMI_MAX_PORTS; a++)
1238*4882a593Smuzhiyun if (test_and_clear_bit(a, &dc->flip))
1239*4882a593Smuzhiyun tty_flip_buffer_push(&dc->port[a].port);
1240*4882a593Smuzhiyun
1241*4882a593Smuzhiyun return IRQ_HANDLED;
1242*4882a593Smuzhiyun none:
1243*4882a593Smuzhiyun spin_unlock(&dc->spin_mutex);
1244*4882a593Smuzhiyun return IRQ_NONE;
1245*4882a593Smuzhiyun }
1246*4882a593Smuzhiyun
nozomi_get_card_type(struct nozomi * dc)1247*4882a593Smuzhiyun static void nozomi_get_card_type(struct nozomi *dc)
1248*4882a593Smuzhiyun {
1249*4882a593Smuzhiyun int i;
1250*4882a593Smuzhiyun u32 size = 0;
1251*4882a593Smuzhiyun
1252*4882a593Smuzhiyun for (i = 0; i < 6; i++)
1253*4882a593Smuzhiyun size += pci_resource_len(dc->pdev, i);
1254*4882a593Smuzhiyun
1255*4882a593Smuzhiyun /* Assume card type F32_8 if no match */
1256*4882a593Smuzhiyun dc->card_type = size == 2048 ? F32_2 : F32_8;
1257*4882a593Smuzhiyun
1258*4882a593Smuzhiyun dev_info(&dc->pdev->dev, "Card type is: %d\n", dc->card_type);
1259*4882a593Smuzhiyun }
1260*4882a593Smuzhiyun
nozomi_setup_private_data(struct nozomi * dc)1261*4882a593Smuzhiyun static void nozomi_setup_private_data(struct nozomi *dc)
1262*4882a593Smuzhiyun {
1263*4882a593Smuzhiyun void __iomem *offset = dc->base_addr + dc->card_type / 2;
1264*4882a593Smuzhiyun unsigned int i;
1265*4882a593Smuzhiyun
1266*4882a593Smuzhiyun dc->reg_fcr = (void __iomem *)(offset + R_FCR);
1267*4882a593Smuzhiyun dc->reg_iir = (void __iomem *)(offset + R_IIR);
1268*4882a593Smuzhiyun dc->reg_ier = (void __iomem *)(offset + R_IER);
1269*4882a593Smuzhiyun dc->last_ier = 0;
1270*4882a593Smuzhiyun dc->flip = 0;
1271*4882a593Smuzhiyun
1272*4882a593Smuzhiyun dc->port[PORT_MDM].token_dl = MDM_DL;
1273*4882a593Smuzhiyun dc->port[PORT_DIAG].token_dl = DIAG_DL;
1274*4882a593Smuzhiyun dc->port[PORT_APP1].token_dl = APP1_DL;
1275*4882a593Smuzhiyun dc->port[PORT_APP2].token_dl = APP2_DL;
1276*4882a593Smuzhiyun
1277*4882a593Smuzhiyun for (i = 0; i < MAX_PORT; i++)
1278*4882a593Smuzhiyun init_waitqueue_head(&dc->port[i].tty_wait);
1279*4882a593Smuzhiyun }
1280*4882a593Smuzhiyun
card_type_show(struct device * dev,struct device_attribute * attr,char * buf)1281*4882a593Smuzhiyun static ssize_t card_type_show(struct device *dev, struct device_attribute *attr,
1282*4882a593Smuzhiyun char *buf)
1283*4882a593Smuzhiyun {
1284*4882a593Smuzhiyun const struct nozomi *dc = dev_get_drvdata(dev);
1285*4882a593Smuzhiyun
1286*4882a593Smuzhiyun return sprintf(buf, "%d\n", dc->card_type);
1287*4882a593Smuzhiyun }
1288*4882a593Smuzhiyun static DEVICE_ATTR_RO(card_type);
1289*4882a593Smuzhiyun
open_ttys_show(struct device * dev,struct device_attribute * attr,char * buf)1290*4882a593Smuzhiyun static ssize_t open_ttys_show(struct device *dev, struct device_attribute *attr,
1291*4882a593Smuzhiyun char *buf)
1292*4882a593Smuzhiyun {
1293*4882a593Smuzhiyun const struct nozomi *dc = dev_get_drvdata(dev);
1294*4882a593Smuzhiyun
1295*4882a593Smuzhiyun return sprintf(buf, "%u\n", dc->open_ttys);
1296*4882a593Smuzhiyun }
1297*4882a593Smuzhiyun static DEVICE_ATTR_RO(open_ttys);
1298*4882a593Smuzhiyun
make_sysfs_files(struct nozomi * dc)1299*4882a593Smuzhiyun static void make_sysfs_files(struct nozomi *dc)
1300*4882a593Smuzhiyun {
1301*4882a593Smuzhiyun if (device_create_file(&dc->pdev->dev, &dev_attr_card_type))
1302*4882a593Smuzhiyun dev_err(&dc->pdev->dev,
1303*4882a593Smuzhiyun "Could not create sysfs file for card_type\n");
1304*4882a593Smuzhiyun if (device_create_file(&dc->pdev->dev, &dev_attr_open_ttys))
1305*4882a593Smuzhiyun dev_err(&dc->pdev->dev,
1306*4882a593Smuzhiyun "Could not create sysfs file for open_ttys\n");
1307*4882a593Smuzhiyun }
1308*4882a593Smuzhiyun
remove_sysfs_files(struct nozomi * dc)1309*4882a593Smuzhiyun static void remove_sysfs_files(struct nozomi *dc)
1310*4882a593Smuzhiyun {
1311*4882a593Smuzhiyun device_remove_file(&dc->pdev->dev, &dev_attr_card_type);
1312*4882a593Smuzhiyun device_remove_file(&dc->pdev->dev, &dev_attr_open_ttys);
1313*4882a593Smuzhiyun }
1314*4882a593Smuzhiyun
1315*4882a593Smuzhiyun /* Allocate memory for one device */
nozomi_card_init(struct pci_dev * pdev,const struct pci_device_id * ent)1316*4882a593Smuzhiyun static int nozomi_card_init(struct pci_dev *pdev,
1317*4882a593Smuzhiyun const struct pci_device_id *ent)
1318*4882a593Smuzhiyun {
1319*4882a593Smuzhiyun int ret;
1320*4882a593Smuzhiyun struct nozomi *dc = NULL;
1321*4882a593Smuzhiyun int ndev_idx;
1322*4882a593Smuzhiyun int i;
1323*4882a593Smuzhiyun
1324*4882a593Smuzhiyun dev_dbg(&pdev->dev, "Init, new card found\n");
1325*4882a593Smuzhiyun
1326*4882a593Smuzhiyun for (ndev_idx = 0; ndev_idx < ARRAY_SIZE(ndevs); ndev_idx++)
1327*4882a593Smuzhiyun if (!ndevs[ndev_idx])
1328*4882a593Smuzhiyun break;
1329*4882a593Smuzhiyun
1330*4882a593Smuzhiyun if (ndev_idx >= ARRAY_SIZE(ndevs)) {
1331*4882a593Smuzhiyun dev_err(&pdev->dev, "no free tty range for this card left\n");
1332*4882a593Smuzhiyun ret = -EIO;
1333*4882a593Smuzhiyun goto err;
1334*4882a593Smuzhiyun }
1335*4882a593Smuzhiyun
1336*4882a593Smuzhiyun dc = kzalloc(sizeof(struct nozomi), GFP_KERNEL);
1337*4882a593Smuzhiyun if (unlikely(!dc)) {
1338*4882a593Smuzhiyun dev_err(&pdev->dev, "Could not allocate memory\n");
1339*4882a593Smuzhiyun ret = -ENOMEM;
1340*4882a593Smuzhiyun goto err_free;
1341*4882a593Smuzhiyun }
1342*4882a593Smuzhiyun
1343*4882a593Smuzhiyun dc->pdev = pdev;
1344*4882a593Smuzhiyun
1345*4882a593Smuzhiyun ret = pci_enable_device(dc->pdev);
1346*4882a593Smuzhiyun if (ret) {
1347*4882a593Smuzhiyun dev_err(&pdev->dev, "Failed to enable PCI Device\n");
1348*4882a593Smuzhiyun goto err_free;
1349*4882a593Smuzhiyun }
1350*4882a593Smuzhiyun
1351*4882a593Smuzhiyun ret = pci_request_regions(dc->pdev, NOZOMI_NAME);
1352*4882a593Smuzhiyun if (ret) {
1353*4882a593Smuzhiyun dev_err(&pdev->dev, "I/O address 0x%04x already in use\n",
1354*4882a593Smuzhiyun (int) /* nozomi_private.io_addr */ 0);
1355*4882a593Smuzhiyun goto err_disable_device;
1356*4882a593Smuzhiyun }
1357*4882a593Smuzhiyun
1358*4882a593Smuzhiyun /* Find out what card type it is */
1359*4882a593Smuzhiyun nozomi_get_card_type(dc);
1360*4882a593Smuzhiyun
1361*4882a593Smuzhiyun dc->base_addr = pci_iomap(dc->pdev, 0, dc->card_type);
1362*4882a593Smuzhiyun if (!dc->base_addr) {
1363*4882a593Smuzhiyun dev_err(&pdev->dev, "Unable to map card MMIO\n");
1364*4882a593Smuzhiyun ret = -ENODEV;
1365*4882a593Smuzhiyun goto err_rel_regs;
1366*4882a593Smuzhiyun }
1367*4882a593Smuzhiyun
1368*4882a593Smuzhiyun dc->send_buf = kmalloc(SEND_BUF_MAX, GFP_KERNEL);
1369*4882a593Smuzhiyun if (!dc->send_buf) {
1370*4882a593Smuzhiyun dev_err(&pdev->dev, "Could not allocate send buffer?\n");
1371*4882a593Smuzhiyun ret = -ENOMEM;
1372*4882a593Smuzhiyun goto err_free_sbuf;
1373*4882a593Smuzhiyun }
1374*4882a593Smuzhiyun
1375*4882a593Smuzhiyun for (i = PORT_MDM; i < MAX_PORT; i++) {
1376*4882a593Smuzhiyun if (kfifo_alloc(&dc->port[i].fifo_ul, FIFO_BUFFER_SIZE_UL,
1377*4882a593Smuzhiyun GFP_KERNEL)) {
1378*4882a593Smuzhiyun dev_err(&pdev->dev,
1379*4882a593Smuzhiyun "Could not allocate kfifo buffer\n");
1380*4882a593Smuzhiyun ret = -ENOMEM;
1381*4882a593Smuzhiyun goto err_free_kfifo;
1382*4882a593Smuzhiyun }
1383*4882a593Smuzhiyun }
1384*4882a593Smuzhiyun
1385*4882a593Smuzhiyun spin_lock_init(&dc->spin_mutex);
1386*4882a593Smuzhiyun
1387*4882a593Smuzhiyun nozomi_setup_private_data(dc);
1388*4882a593Smuzhiyun
1389*4882a593Smuzhiyun /* Disable all interrupts */
1390*4882a593Smuzhiyun dc->last_ier = 0;
1391*4882a593Smuzhiyun writew(dc->last_ier, dc->reg_ier);
1392*4882a593Smuzhiyun
1393*4882a593Smuzhiyun ret = request_irq(pdev->irq, &interrupt_handler, IRQF_SHARED,
1394*4882a593Smuzhiyun NOZOMI_NAME, dc);
1395*4882a593Smuzhiyun if (unlikely(ret)) {
1396*4882a593Smuzhiyun dev_err(&pdev->dev, "can't request irq %d\n", pdev->irq);
1397*4882a593Smuzhiyun goto err_free_all_kfifo;
1398*4882a593Smuzhiyun }
1399*4882a593Smuzhiyun
1400*4882a593Smuzhiyun DBG1("base_addr: %p", dc->base_addr);
1401*4882a593Smuzhiyun
1402*4882a593Smuzhiyun make_sysfs_files(dc);
1403*4882a593Smuzhiyun
1404*4882a593Smuzhiyun dc->index_start = ndev_idx * MAX_PORT;
1405*4882a593Smuzhiyun ndevs[ndev_idx] = dc;
1406*4882a593Smuzhiyun
1407*4882a593Smuzhiyun pci_set_drvdata(pdev, dc);
1408*4882a593Smuzhiyun
1409*4882a593Smuzhiyun /* Enable RESET interrupt */
1410*4882a593Smuzhiyun dc->last_ier = RESET;
1411*4882a593Smuzhiyun iowrite16(dc->last_ier, dc->reg_ier);
1412*4882a593Smuzhiyun
1413*4882a593Smuzhiyun dc->state = NOZOMI_STATE_ENABLED;
1414*4882a593Smuzhiyun
1415*4882a593Smuzhiyun for (i = 0; i < MAX_PORT; i++) {
1416*4882a593Smuzhiyun struct device *tty_dev;
1417*4882a593Smuzhiyun struct port *port = &dc->port[i];
1418*4882a593Smuzhiyun port->dc = dc;
1419*4882a593Smuzhiyun tty_port_init(&port->port);
1420*4882a593Smuzhiyun port->port.ops = &noz_tty_port_ops;
1421*4882a593Smuzhiyun tty_dev = tty_port_register_device(&port->port, ntty_driver,
1422*4882a593Smuzhiyun dc->index_start + i, &pdev->dev);
1423*4882a593Smuzhiyun
1424*4882a593Smuzhiyun if (IS_ERR(tty_dev)) {
1425*4882a593Smuzhiyun ret = PTR_ERR(tty_dev);
1426*4882a593Smuzhiyun dev_err(&pdev->dev, "Could not allocate tty?\n");
1427*4882a593Smuzhiyun tty_port_destroy(&port->port);
1428*4882a593Smuzhiyun goto err_free_tty;
1429*4882a593Smuzhiyun }
1430*4882a593Smuzhiyun }
1431*4882a593Smuzhiyun
1432*4882a593Smuzhiyun return 0;
1433*4882a593Smuzhiyun
1434*4882a593Smuzhiyun err_free_tty:
1435*4882a593Smuzhiyun for (i--; i >= 0; i--) {
1436*4882a593Smuzhiyun tty_unregister_device(ntty_driver, dc->index_start + i);
1437*4882a593Smuzhiyun tty_port_destroy(&dc->port[i].port);
1438*4882a593Smuzhiyun }
1439*4882a593Smuzhiyun free_irq(pdev->irq, dc);
1440*4882a593Smuzhiyun err_free_all_kfifo:
1441*4882a593Smuzhiyun i = MAX_PORT;
1442*4882a593Smuzhiyun err_free_kfifo:
1443*4882a593Smuzhiyun for (i--; i >= PORT_MDM; i--)
1444*4882a593Smuzhiyun kfifo_free(&dc->port[i].fifo_ul);
1445*4882a593Smuzhiyun err_free_sbuf:
1446*4882a593Smuzhiyun kfree(dc->send_buf);
1447*4882a593Smuzhiyun iounmap(dc->base_addr);
1448*4882a593Smuzhiyun err_rel_regs:
1449*4882a593Smuzhiyun pci_release_regions(pdev);
1450*4882a593Smuzhiyun err_disable_device:
1451*4882a593Smuzhiyun pci_disable_device(pdev);
1452*4882a593Smuzhiyun err_free:
1453*4882a593Smuzhiyun kfree(dc);
1454*4882a593Smuzhiyun err:
1455*4882a593Smuzhiyun return ret;
1456*4882a593Smuzhiyun }
1457*4882a593Smuzhiyun
tty_exit(struct nozomi * dc)1458*4882a593Smuzhiyun static void tty_exit(struct nozomi *dc)
1459*4882a593Smuzhiyun {
1460*4882a593Smuzhiyun unsigned int i;
1461*4882a593Smuzhiyun
1462*4882a593Smuzhiyun DBG1(" ");
1463*4882a593Smuzhiyun
1464*4882a593Smuzhiyun for (i = 0; i < MAX_PORT; ++i)
1465*4882a593Smuzhiyun tty_port_tty_hangup(&dc->port[i].port, false);
1466*4882a593Smuzhiyun
1467*4882a593Smuzhiyun /* Racy below - surely should wait for scheduled work to be done or
1468*4882a593Smuzhiyun complete off a hangup method ? */
1469*4882a593Smuzhiyun while (dc->open_ttys)
1470*4882a593Smuzhiyun msleep(1);
1471*4882a593Smuzhiyun for (i = 0; i < MAX_PORT; ++i) {
1472*4882a593Smuzhiyun tty_unregister_device(ntty_driver, dc->index_start + i);
1473*4882a593Smuzhiyun tty_port_destroy(&dc->port[i].port);
1474*4882a593Smuzhiyun }
1475*4882a593Smuzhiyun }
1476*4882a593Smuzhiyun
1477*4882a593Smuzhiyun /* Deallocate memory for one device */
nozomi_card_exit(struct pci_dev * pdev)1478*4882a593Smuzhiyun static void nozomi_card_exit(struct pci_dev *pdev)
1479*4882a593Smuzhiyun {
1480*4882a593Smuzhiyun int i;
1481*4882a593Smuzhiyun struct ctrl_ul ctrl;
1482*4882a593Smuzhiyun struct nozomi *dc = pci_get_drvdata(pdev);
1483*4882a593Smuzhiyun
1484*4882a593Smuzhiyun /* Disable all interrupts */
1485*4882a593Smuzhiyun dc->last_ier = 0;
1486*4882a593Smuzhiyun writew(dc->last_ier, dc->reg_ier);
1487*4882a593Smuzhiyun
1488*4882a593Smuzhiyun tty_exit(dc);
1489*4882a593Smuzhiyun
1490*4882a593Smuzhiyun /* Send 0x0001, command card to resend the reset token. */
1491*4882a593Smuzhiyun /* This is to get the reset when the module is reloaded. */
1492*4882a593Smuzhiyun ctrl.port = 0x00;
1493*4882a593Smuzhiyun ctrl.reserved = 0;
1494*4882a593Smuzhiyun ctrl.RTS = 0;
1495*4882a593Smuzhiyun ctrl.DTR = 1;
1496*4882a593Smuzhiyun DBG1("sending flow control 0x%04X", *((u16 *)&ctrl));
1497*4882a593Smuzhiyun
1498*4882a593Smuzhiyun /* Setup dc->reg addresses to we can use defines here */
1499*4882a593Smuzhiyun write_mem32(dc->port[PORT_CTRL].ul_addr[0], (u32 *)&ctrl, 2);
1500*4882a593Smuzhiyun writew(CTRL_UL, dc->reg_fcr); /* push the token to the card. */
1501*4882a593Smuzhiyun
1502*4882a593Smuzhiyun remove_sysfs_files(dc);
1503*4882a593Smuzhiyun
1504*4882a593Smuzhiyun free_irq(pdev->irq, dc);
1505*4882a593Smuzhiyun
1506*4882a593Smuzhiyun for (i = 0; i < MAX_PORT; i++)
1507*4882a593Smuzhiyun kfifo_free(&dc->port[i].fifo_ul);
1508*4882a593Smuzhiyun
1509*4882a593Smuzhiyun kfree(dc->send_buf);
1510*4882a593Smuzhiyun
1511*4882a593Smuzhiyun iounmap(dc->base_addr);
1512*4882a593Smuzhiyun
1513*4882a593Smuzhiyun pci_release_regions(pdev);
1514*4882a593Smuzhiyun
1515*4882a593Smuzhiyun pci_disable_device(pdev);
1516*4882a593Smuzhiyun
1517*4882a593Smuzhiyun ndevs[dc->index_start / MAX_PORT] = NULL;
1518*4882a593Smuzhiyun
1519*4882a593Smuzhiyun kfree(dc);
1520*4882a593Smuzhiyun }
1521*4882a593Smuzhiyun
set_rts(const struct tty_struct * tty,int rts)1522*4882a593Smuzhiyun static void set_rts(const struct tty_struct *tty, int rts)
1523*4882a593Smuzhiyun {
1524*4882a593Smuzhiyun struct port *port = get_port_by_tty(tty);
1525*4882a593Smuzhiyun
1526*4882a593Smuzhiyun port->ctrl_ul.RTS = rts;
1527*4882a593Smuzhiyun port->update_flow_control = 1;
1528*4882a593Smuzhiyun enable_transmit_ul(PORT_CTRL, get_dc_by_tty(tty));
1529*4882a593Smuzhiyun }
1530*4882a593Smuzhiyun
set_dtr(const struct tty_struct * tty,int dtr)1531*4882a593Smuzhiyun static void set_dtr(const struct tty_struct *tty, int dtr)
1532*4882a593Smuzhiyun {
1533*4882a593Smuzhiyun struct port *port = get_port_by_tty(tty);
1534*4882a593Smuzhiyun
1535*4882a593Smuzhiyun DBG1("SETTING DTR index: %d, dtr: %d", tty->index, dtr);
1536*4882a593Smuzhiyun
1537*4882a593Smuzhiyun port->ctrl_ul.DTR = dtr;
1538*4882a593Smuzhiyun port->update_flow_control = 1;
1539*4882a593Smuzhiyun enable_transmit_ul(PORT_CTRL, get_dc_by_tty(tty));
1540*4882a593Smuzhiyun }
1541*4882a593Smuzhiyun
1542*4882a593Smuzhiyun /*
1543*4882a593Smuzhiyun * ----------------------------------------------------------------------------
1544*4882a593Smuzhiyun * TTY code
1545*4882a593Smuzhiyun * ----------------------------------------------------------------------------
1546*4882a593Smuzhiyun */
1547*4882a593Smuzhiyun
ntty_install(struct tty_driver * driver,struct tty_struct * tty)1548*4882a593Smuzhiyun static int ntty_install(struct tty_driver *driver, struct tty_struct *tty)
1549*4882a593Smuzhiyun {
1550*4882a593Smuzhiyun struct port *port = get_port_by_tty(tty);
1551*4882a593Smuzhiyun struct nozomi *dc = get_dc_by_tty(tty);
1552*4882a593Smuzhiyun int ret;
1553*4882a593Smuzhiyun if (!port || !dc || dc->state != NOZOMI_STATE_READY)
1554*4882a593Smuzhiyun return -ENODEV;
1555*4882a593Smuzhiyun ret = tty_standard_install(driver, tty);
1556*4882a593Smuzhiyun if (ret == 0)
1557*4882a593Smuzhiyun tty->driver_data = port;
1558*4882a593Smuzhiyun return ret;
1559*4882a593Smuzhiyun }
1560*4882a593Smuzhiyun
ntty_cleanup(struct tty_struct * tty)1561*4882a593Smuzhiyun static void ntty_cleanup(struct tty_struct *tty)
1562*4882a593Smuzhiyun {
1563*4882a593Smuzhiyun tty->driver_data = NULL;
1564*4882a593Smuzhiyun }
1565*4882a593Smuzhiyun
ntty_activate(struct tty_port * tport,struct tty_struct * tty)1566*4882a593Smuzhiyun static int ntty_activate(struct tty_port *tport, struct tty_struct *tty)
1567*4882a593Smuzhiyun {
1568*4882a593Smuzhiyun struct port *port = container_of(tport, struct port, port);
1569*4882a593Smuzhiyun struct nozomi *dc = port->dc;
1570*4882a593Smuzhiyun unsigned long flags;
1571*4882a593Smuzhiyun
1572*4882a593Smuzhiyun DBG1("open: %d", port->token_dl);
1573*4882a593Smuzhiyun spin_lock_irqsave(&dc->spin_mutex, flags);
1574*4882a593Smuzhiyun dc->last_ier = dc->last_ier | port->token_dl;
1575*4882a593Smuzhiyun writew(dc->last_ier, dc->reg_ier);
1576*4882a593Smuzhiyun dc->open_ttys++;
1577*4882a593Smuzhiyun spin_unlock_irqrestore(&dc->spin_mutex, flags);
1578*4882a593Smuzhiyun printk("noz: activated %d: %p\n", tty->index, tport);
1579*4882a593Smuzhiyun return 0;
1580*4882a593Smuzhiyun }
1581*4882a593Smuzhiyun
ntty_open(struct tty_struct * tty,struct file * filp)1582*4882a593Smuzhiyun static int ntty_open(struct tty_struct *tty, struct file *filp)
1583*4882a593Smuzhiyun {
1584*4882a593Smuzhiyun struct port *port = tty->driver_data;
1585*4882a593Smuzhiyun return tty_port_open(&port->port, tty, filp);
1586*4882a593Smuzhiyun }
1587*4882a593Smuzhiyun
ntty_shutdown(struct tty_port * tport)1588*4882a593Smuzhiyun static void ntty_shutdown(struct tty_port *tport)
1589*4882a593Smuzhiyun {
1590*4882a593Smuzhiyun struct port *port = container_of(tport, struct port, port);
1591*4882a593Smuzhiyun struct nozomi *dc = port->dc;
1592*4882a593Smuzhiyun unsigned long flags;
1593*4882a593Smuzhiyun
1594*4882a593Smuzhiyun DBG1("close: %d", port->token_dl);
1595*4882a593Smuzhiyun spin_lock_irqsave(&dc->spin_mutex, flags);
1596*4882a593Smuzhiyun dc->last_ier &= ~(port->token_dl);
1597*4882a593Smuzhiyun writew(dc->last_ier, dc->reg_ier);
1598*4882a593Smuzhiyun dc->open_ttys--;
1599*4882a593Smuzhiyun spin_unlock_irqrestore(&dc->spin_mutex, flags);
1600*4882a593Smuzhiyun printk("noz: shutdown %p\n", tport);
1601*4882a593Smuzhiyun }
1602*4882a593Smuzhiyun
ntty_close(struct tty_struct * tty,struct file * filp)1603*4882a593Smuzhiyun static void ntty_close(struct tty_struct *tty, struct file *filp)
1604*4882a593Smuzhiyun {
1605*4882a593Smuzhiyun struct port *port = tty->driver_data;
1606*4882a593Smuzhiyun if (port)
1607*4882a593Smuzhiyun tty_port_close(&port->port, tty, filp);
1608*4882a593Smuzhiyun }
1609*4882a593Smuzhiyun
ntty_hangup(struct tty_struct * tty)1610*4882a593Smuzhiyun static void ntty_hangup(struct tty_struct *tty)
1611*4882a593Smuzhiyun {
1612*4882a593Smuzhiyun struct port *port = tty->driver_data;
1613*4882a593Smuzhiyun tty_port_hangup(&port->port);
1614*4882a593Smuzhiyun }
1615*4882a593Smuzhiyun
1616*4882a593Smuzhiyun /*
1617*4882a593Smuzhiyun * called when the userspace process writes to the tty (/dev/noz*).
1618*4882a593Smuzhiyun * Data is inserted into a fifo, which is then read and transferred to the modem.
1619*4882a593Smuzhiyun */
ntty_write(struct tty_struct * tty,const unsigned char * buffer,int count)1620*4882a593Smuzhiyun static int ntty_write(struct tty_struct *tty, const unsigned char *buffer,
1621*4882a593Smuzhiyun int count)
1622*4882a593Smuzhiyun {
1623*4882a593Smuzhiyun int rval = -EINVAL;
1624*4882a593Smuzhiyun struct nozomi *dc = get_dc_by_tty(tty);
1625*4882a593Smuzhiyun struct port *port = tty->driver_data;
1626*4882a593Smuzhiyun unsigned long flags;
1627*4882a593Smuzhiyun
1628*4882a593Smuzhiyun /* DBG1( "WRITEx: %d, index = %d", count, index); */
1629*4882a593Smuzhiyun
1630*4882a593Smuzhiyun if (!dc || !port)
1631*4882a593Smuzhiyun return -ENODEV;
1632*4882a593Smuzhiyun
1633*4882a593Smuzhiyun rval = kfifo_in(&port->fifo_ul, (unsigned char *)buffer, count);
1634*4882a593Smuzhiyun
1635*4882a593Smuzhiyun spin_lock_irqsave(&dc->spin_mutex, flags);
1636*4882a593Smuzhiyun /* CTS is only valid on the modem channel */
1637*4882a593Smuzhiyun if (port == &(dc->port[PORT_MDM])) {
1638*4882a593Smuzhiyun if (port->ctrl_dl.CTS) {
1639*4882a593Smuzhiyun DBG4("Enable interrupt");
1640*4882a593Smuzhiyun enable_transmit_ul(tty->index % MAX_PORT, dc);
1641*4882a593Smuzhiyun } else {
1642*4882a593Smuzhiyun dev_err(&dc->pdev->dev,
1643*4882a593Smuzhiyun "CTS not active on modem port?\n");
1644*4882a593Smuzhiyun }
1645*4882a593Smuzhiyun } else {
1646*4882a593Smuzhiyun enable_transmit_ul(tty->index % MAX_PORT, dc);
1647*4882a593Smuzhiyun }
1648*4882a593Smuzhiyun spin_unlock_irqrestore(&dc->spin_mutex, flags);
1649*4882a593Smuzhiyun
1650*4882a593Smuzhiyun return rval;
1651*4882a593Smuzhiyun }
1652*4882a593Smuzhiyun
1653*4882a593Smuzhiyun /*
1654*4882a593Smuzhiyun * Calculate how much is left in device
1655*4882a593Smuzhiyun * This method is called by the upper tty layer.
1656*4882a593Smuzhiyun * #according to sources N_TTY.c it expects a value >= 0 and
1657*4882a593Smuzhiyun * does not check for negative values.
1658*4882a593Smuzhiyun *
1659*4882a593Smuzhiyun * If the port is unplugged report lots of room and let the bits
1660*4882a593Smuzhiyun * dribble away so we don't block anything.
1661*4882a593Smuzhiyun */
ntty_write_room(struct tty_struct * tty)1662*4882a593Smuzhiyun static int ntty_write_room(struct tty_struct *tty)
1663*4882a593Smuzhiyun {
1664*4882a593Smuzhiyun struct port *port = tty->driver_data;
1665*4882a593Smuzhiyun int room = 4096;
1666*4882a593Smuzhiyun const struct nozomi *dc = get_dc_by_tty(tty);
1667*4882a593Smuzhiyun
1668*4882a593Smuzhiyun if (dc)
1669*4882a593Smuzhiyun room = kfifo_avail(&port->fifo_ul);
1670*4882a593Smuzhiyun
1671*4882a593Smuzhiyun return room;
1672*4882a593Smuzhiyun }
1673*4882a593Smuzhiyun
1674*4882a593Smuzhiyun /* Gets io control parameters */
ntty_tiocmget(struct tty_struct * tty)1675*4882a593Smuzhiyun static int ntty_tiocmget(struct tty_struct *tty)
1676*4882a593Smuzhiyun {
1677*4882a593Smuzhiyun const struct port *port = tty->driver_data;
1678*4882a593Smuzhiyun const struct ctrl_dl *ctrl_dl = &port->ctrl_dl;
1679*4882a593Smuzhiyun const struct ctrl_ul *ctrl_ul = &port->ctrl_ul;
1680*4882a593Smuzhiyun
1681*4882a593Smuzhiyun /* Note: these could change under us but it is not clear this
1682*4882a593Smuzhiyun matters if so */
1683*4882a593Smuzhiyun return (ctrl_ul->RTS ? TIOCM_RTS : 0)
1684*4882a593Smuzhiyun | (ctrl_ul->DTR ? TIOCM_DTR : 0)
1685*4882a593Smuzhiyun | (ctrl_dl->DCD ? TIOCM_CAR : 0)
1686*4882a593Smuzhiyun | (ctrl_dl->RI ? TIOCM_RNG : 0)
1687*4882a593Smuzhiyun | (ctrl_dl->DSR ? TIOCM_DSR : 0)
1688*4882a593Smuzhiyun | (ctrl_dl->CTS ? TIOCM_CTS : 0);
1689*4882a593Smuzhiyun }
1690*4882a593Smuzhiyun
1691*4882a593Smuzhiyun /* Sets io controls parameters */
ntty_tiocmset(struct tty_struct * tty,unsigned int set,unsigned int clear)1692*4882a593Smuzhiyun static int ntty_tiocmset(struct tty_struct *tty,
1693*4882a593Smuzhiyun unsigned int set, unsigned int clear)
1694*4882a593Smuzhiyun {
1695*4882a593Smuzhiyun struct nozomi *dc = get_dc_by_tty(tty);
1696*4882a593Smuzhiyun unsigned long flags;
1697*4882a593Smuzhiyun
1698*4882a593Smuzhiyun spin_lock_irqsave(&dc->spin_mutex, flags);
1699*4882a593Smuzhiyun if (set & TIOCM_RTS)
1700*4882a593Smuzhiyun set_rts(tty, 1);
1701*4882a593Smuzhiyun else if (clear & TIOCM_RTS)
1702*4882a593Smuzhiyun set_rts(tty, 0);
1703*4882a593Smuzhiyun
1704*4882a593Smuzhiyun if (set & TIOCM_DTR)
1705*4882a593Smuzhiyun set_dtr(tty, 1);
1706*4882a593Smuzhiyun else if (clear & TIOCM_DTR)
1707*4882a593Smuzhiyun set_dtr(tty, 0);
1708*4882a593Smuzhiyun spin_unlock_irqrestore(&dc->spin_mutex, flags);
1709*4882a593Smuzhiyun
1710*4882a593Smuzhiyun return 0;
1711*4882a593Smuzhiyun }
1712*4882a593Smuzhiyun
ntty_cflags_changed(struct port * port,unsigned long flags,struct async_icount * cprev)1713*4882a593Smuzhiyun static int ntty_cflags_changed(struct port *port, unsigned long flags,
1714*4882a593Smuzhiyun struct async_icount *cprev)
1715*4882a593Smuzhiyun {
1716*4882a593Smuzhiyun const struct async_icount cnow = port->tty_icount;
1717*4882a593Smuzhiyun int ret;
1718*4882a593Smuzhiyun
1719*4882a593Smuzhiyun ret = ((flags & TIOCM_RNG) && (cnow.rng != cprev->rng))
1720*4882a593Smuzhiyun || ((flags & TIOCM_DSR) && (cnow.dsr != cprev->dsr))
1721*4882a593Smuzhiyun || ((flags & TIOCM_CD) && (cnow.dcd != cprev->dcd))
1722*4882a593Smuzhiyun || ((flags & TIOCM_CTS) && (cnow.cts != cprev->cts));
1723*4882a593Smuzhiyun
1724*4882a593Smuzhiyun *cprev = cnow;
1725*4882a593Smuzhiyun
1726*4882a593Smuzhiyun return ret;
1727*4882a593Smuzhiyun }
1728*4882a593Smuzhiyun
ntty_tiocgicount(struct tty_struct * tty,struct serial_icounter_struct * icount)1729*4882a593Smuzhiyun static int ntty_tiocgicount(struct tty_struct *tty,
1730*4882a593Smuzhiyun struct serial_icounter_struct *icount)
1731*4882a593Smuzhiyun {
1732*4882a593Smuzhiyun struct port *port = tty->driver_data;
1733*4882a593Smuzhiyun const struct async_icount cnow = port->tty_icount;
1734*4882a593Smuzhiyun
1735*4882a593Smuzhiyun icount->cts = cnow.cts;
1736*4882a593Smuzhiyun icount->dsr = cnow.dsr;
1737*4882a593Smuzhiyun icount->rng = cnow.rng;
1738*4882a593Smuzhiyun icount->dcd = cnow.dcd;
1739*4882a593Smuzhiyun icount->rx = cnow.rx;
1740*4882a593Smuzhiyun icount->tx = cnow.tx;
1741*4882a593Smuzhiyun icount->frame = cnow.frame;
1742*4882a593Smuzhiyun icount->overrun = cnow.overrun;
1743*4882a593Smuzhiyun icount->parity = cnow.parity;
1744*4882a593Smuzhiyun icount->brk = cnow.brk;
1745*4882a593Smuzhiyun icount->buf_overrun = cnow.buf_overrun;
1746*4882a593Smuzhiyun return 0;
1747*4882a593Smuzhiyun }
1748*4882a593Smuzhiyun
ntty_ioctl(struct tty_struct * tty,unsigned int cmd,unsigned long arg)1749*4882a593Smuzhiyun static int ntty_ioctl(struct tty_struct *tty,
1750*4882a593Smuzhiyun unsigned int cmd, unsigned long arg)
1751*4882a593Smuzhiyun {
1752*4882a593Smuzhiyun struct port *port = tty->driver_data;
1753*4882a593Smuzhiyun int rval = -ENOIOCTLCMD;
1754*4882a593Smuzhiyun
1755*4882a593Smuzhiyun DBG1("******** IOCTL, cmd: %d", cmd);
1756*4882a593Smuzhiyun
1757*4882a593Smuzhiyun switch (cmd) {
1758*4882a593Smuzhiyun case TIOCMIWAIT: {
1759*4882a593Smuzhiyun struct async_icount cprev = port->tty_icount;
1760*4882a593Smuzhiyun
1761*4882a593Smuzhiyun rval = wait_event_interruptible(port->tty_wait,
1762*4882a593Smuzhiyun ntty_cflags_changed(port, arg, &cprev));
1763*4882a593Smuzhiyun break;
1764*4882a593Smuzhiyun }
1765*4882a593Smuzhiyun default:
1766*4882a593Smuzhiyun DBG1("ERR: 0x%08X, %d", cmd, cmd);
1767*4882a593Smuzhiyun break;
1768*4882a593Smuzhiyun }
1769*4882a593Smuzhiyun
1770*4882a593Smuzhiyun return rval;
1771*4882a593Smuzhiyun }
1772*4882a593Smuzhiyun
1773*4882a593Smuzhiyun /*
1774*4882a593Smuzhiyun * Called by the upper tty layer when tty buffers are ready
1775*4882a593Smuzhiyun * to receive data again after a call to throttle.
1776*4882a593Smuzhiyun */
ntty_unthrottle(struct tty_struct * tty)1777*4882a593Smuzhiyun static void ntty_unthrottle(struct tty_struct *tty)
1778*4882a593Smuzhiyun {
1779*4882a593Smuzhiyun struct nozomi *dc = get_dc_by_tty(tty);
1780*4882a593Smuzhiyun unsigned long flags;
1781*4882a593Smuzhiyun
1782*4882a593Smuzhiyun DBG1("UNTHROTTLE");
1783*4882a593Smuzhiyun spin_lock_irqsave(&dc->spin_mutex, flags);
1784*4882a593Smuzhiyun enable_transmit_dl(tty->index % MAX_PORT, dc);
1785*4882a593Smuzhiyun set_rts(tty, 1);
1786*4882a593Smuzhiyun
1787*4882a593Smuzhiyun spin_unlock_irqrestore(&dc->spin_mutex, flags);
1788*4882a593Smuzhiyun }
1789*4882a593Smuzhiyun
1790*4882a593Smuzhiyun /*
1791*4882a593Smuzhiyun * Called by the upper tty layer when the tty buffers are almost full.
1792*4882a593Smuzhiyun * The driver should stop send more data.
1793*4882a593Smuzhiyun */
ntty_throttle(struct tty_struct * tty)1794*4882a593Smuzhiyun static void ntty_throttle(struct tty_struct *tty)
1795*4882a593Smuzhiyun {
1796*4882a593Smuzhiyun struct nozomi *dc = get_dc_by_tty(tty);
1797*4882a593Smuzhiyun unsigned long flags;
1798*4882a593Smuzhiyun
1799*4882a593Smuzhiyun DBG1("THROTTLE");
1800*4882a593Smuzhiyun spin_lock_irqsave(&dc->spin_mutex, flags);
1801*4882a593Smuzhiyun set_rts(tty, 0);
1802*4882a593Smuzhiyun spin_unlock_irqrestore(&dc->spin_mutex, flags);
1803*4882a593Smuzhiyun }
1804*4882a593Smuzhiyun
1805*4882a593Smuzhiyun /* Returns number of chars in buffer, called by tty layer */
ntty_chars_in_buffer(struct tty_struct * tty)1806*4882a593Smuzhiyun static s32 ntty_chars_in_buffer(struct tty_struct *tty)
1807*4882a593Smuzhiyun {
1808*4882a593Smuzhiyun struct port *port = tty->driver_data;
1809*4882a593Smuzhiyun struct nozomi *dc = get_dc_by_tty(tty);
1810*4882a593Smuzhiyun s32 rval = 0;
1811*4882a593Smuzhiyun
1812*4882a593Smuzhiyun if (unlikely(!dc || !port)) {
1813*4882a593Smuzhiyun goto exit_in_buffer;
1814*4882a593Smuzhiyun }
1815*4882a593Smuzhiyun
1816*4882a593Smuzhiyun rval = kfifo_len(&port->fifo_ul);
1817*4882a593Smuzhiyun
1818*4882a593Smuzhiyun exit_in_buffer:
1819*4882a593Smuzhiyun return rval;
1820*4882a593Smuzhiyun }
1821*4882a593Smuzhiyun
1822*4882a593Smuzhiyun static const struct tty_port_operations noz_tty_port_ops = {
1823*4882a593Smuzhiyun .activate = ntty_activate,
1824*4882a593Smuzhiyun .shutdown = ntty_shutdown,
1825*4882a593Smuzhiyun };
1826*4882a593Smuzhiyun
1827*4882a593Smuzhiyun static const struct tty_operations tty_ops = {
1828*4882a593Smuzhiyun .ioctl = ntty_ioctl,
1829*4882a593Smuzhiyun .open = ntty_open,
1830*4882a593Smuzhiyun .close = ntty_close,
1831*4882a593Smuzhiyun .hangup = ntty_hangup,
1832*4882a593Smuzhiyun .write = ntty_write,
1833*4882a593Smuzhiyun .write_room = ntty_write_room,
1834*4882a593Smuzhiyun .unthrottle = ntty_unthrottle,
1835*4882a593Smuzhiyun .throttle = ntty_throttle,
1836*4882a593Smuzhiyun .chars_in_buffer = ntty_chars_in_buffer,
1837*4882a593Smuzhiyun .tiocmget = ntty_tiocmget,
1838*4882a593Smuzhiyun .tiocmset = ntty_tiocmset,
1839*4882a593Smuzhiyun .get_icount = ntty_tiocgicount,
1840*4882a593Smuzhiyun .install = ntty_install,
1841*4882a593Smuzhiyun .cleanup = ntty_cleanup,
1842*4882a593Smuzhiyun };
1843*4882a593Smuzhiyun
1844*4882a593Smuzhiyun /* Module initialization */
1845*4882a593Smuzhiyun static struct pci_driver nozomi_driver = {
1846*4882a593Smuzhiyun .name = NOZOMI_NAME,
1847*4882a593Smuzhiyun .id_table = nozomi_pci_tbl,
1848*4882a593Smuzhiyun .probe = nozomi_card_init,
1849*4882a593Smuzhiyun .remove = nozomi_card_exit,
1850*4882a593Smuzhiyun };
1851*4882a593Smuzhiyun
nozomi_init(void)1852*4882a593Smuzhiyun static __init int nozomi_init(void)
1853*4882a593Smuzhiyun {
1854*4882a593Smuzhiyun int ret;
1855*4882a593Smuzhiyun
1856*4882a593Smuzhiyun printk(KERN_INFO "Initializing %s\n", VERSION_STRING);
1857*4882a593Smuzhiyun
1858*4882a593Smuzhiyun ntty_driver = alloc_tty_driver(NTTY_TTY_MAXMINORS);
1859*4882a593Smuzhiyun if (!ntty_driver)
1860*4882a593Smuzhiyun return -ENOMEM;
1861*4882a593Smuzhiyun
1862*4882a593Smuzhiyun ntty_driver->driver_name = NOZOMI_NAME_TTY;
1863*4882a593Smuzhiyun ntty_driver->name = "noz";
1864*4882a593Smuzhiyun ntty_driver->major = 0;
1865*4882a593Smuzhiyun ntty_driver->type = TTY_DRIVER_TYPE_SERIAL;
1866*4882a593Smuzhiyun ntty_driver->subtype = SERIAL_TYPE_NORMAL;
1867*4882a593Smuzhiyun ntty_driver->flags = TTY_DRIVER_REAL_RAW | TTY_DRIVER_DYNAMIC_DEV;
1868*4882a593Smuzhiyun ntty_driver->init_termios = tty_std_termios;
1869*4882a593Smuzhiyun ntty_driver->init_termios.c_cflag = B115200 | CS8 | CREAD | \
1870*4882a593Smuzhiyun HUPCL | CLOCAL;
1871*4882a593Smuzhiyun ntty_driver->init_termios.c_ispeed = 115200;
1872*4882a593Smuzhiyun ntty_driver->init_termios.c_ospeed = 115200;
1873*4882a593Smuzhiyun tty_set_operations(ntty_driver, &tty_ops);
1874*4882a593Smuzhiyun
1875*4882a593Smuzhiyun ret = tty_register_driver(ntty_driver);
1876*4882a593Smuzhiyun if (ret) {
1877*4882a593Smuzhiyun printk(KERN_ERR "Nozomi: failed to register ntty driver\n");
1878*4882a593Smuzhiyun goto free_tty;
1879*4882a593Smuzhiyun }
1880*4882a593Smuzhiyun
1881*4882a593Smuzhiyun ret = pci_register_driver(&nozomi_driver);
1882*4882a593Smuzhiyun if (ret) {
1883*4882a593Smuzhiyun printk(KERN_ERR "Nozomi: can't register pci driver\n");
1884*4882a593Smuzhiyun goto unr_tty;
1885*4882a593Smuzhiyun }
1886*4882a593Smuzhiyun
1887*4882a593Smuzhiyun return 0;
1888*4882a593Smuzhiyun unr_tty:
1889*4882a593Smuzhiyun tty_unregister_driver(ntty_driver);
1890*4882a593Smuzhiyun free_tty:
1891*4882a593Smuzhiyun put_tty_driver(ntty_driver);
1892*4882a593Smuzhiyun return ret;
1893*4882a593Smuzhiyun }
1894*4882a593Smuzhiyun
nozomi_exit(void)1895*4882a593Smuzhiyun static __exit void nozomi_exit(void)
1896*4882a593Smuzhiyun {
1897*4882a593Smuzhiyun printk(KERN_INFO "Unloading %s\n", DRIVER_DESC);
1898*4882a593Smuzhiyun pci_unregister_driver(&nozomi_driver);
1899*4882a593Smuzhiyun tty_unregister_driver(ntty_driver);
1900*4882a593Smuzhiyun put_tty_driver(ntty_driver);
1901*4882a593Smuzhiyun }
1902*4882a593Smuzhiyun
1903*4882a593Smuzhiyun module_init(nozomi_init);
1904*4882a593Smuzhiyun module_exit(nozomi_exit);
1905*4882a593Smuzhiyun
1906*4882a593Smuzhiyun MODULE_LICENSE("Dual BSD/GPL");
1907*4882a593Smuzhiyun MODULE_DESCRIPTION(DRIVER_DESC);
1908