1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0+
2*4882a593Smuzhiyun /*****************************************************************************/
3*4882a593Smuzhiyun /*
4*4882a593Smuzhiyun * moxa.c -- MOXA Intellio family multiport serial driver.
5*4882a593Smuzhiyun *
6*4882a593Smuzhiyun * Copyright (C) 1999-2000 Moxa Technologies (support@moxa.com).
7*4882a593Smuzhiyun * Copyright (c) 2007 Jiri Slaby <jirislaby@gmail.com>
8*4882a593Smuzhiyun *
9*4882a593Smuzhiyun * This code is loosely based on the Linux serial driver, written by
10*4882a593Smuzhiyun * Linus Torvalds, Theodore T'so and others.
11*4882a593Smuzhiyun */
12*4882a593Smuzhiyun
13*4882a593Smuzhiyun /*
14*4882a593Smuzhiyun * MOXA Intellio Series Driver
15*4882a593Smuzhiyun * for : LINUX
16*4882a593Smuzhiyun * date : 1999/1/7
17*4882a593Smuzhiyun * version : 5.1
18*4882a593Smuzhiyun */
19*4882a593Smuzhiyun
20*4882a593Smuzhiyun #include <linux/module.h>
21*4882a593Smuzhiyun #include <linux/types.h>
22*4882a593Smuzhiyun #include <linux/mm.h>
23*4882a593Smuzhiyun #include <linux/ioport.h>
24*4882a593Smuzhiyun #include <linux/errno.h>
25*4882a593Smuzhiyun #include <linux/firmware.h>
26*4882a593Smuzhiyun #include <linux/signal.h>
27*4882a593Smuzhiyun #include <linux/sched.h>
28*4882a593Smuzhiyun #include <linux/timer.h>
29*4882a593Smuzhiyun #include <linux/interrupt.h>
30*4882a593Smuzhiyun #include <linux/tty.h>
31*4882a593Smuzhiyun #include <linux/tty_flip.h>
32*4882a593Smuzhiyun #include <linux/major.h>
33*4882a593Smuzhiyun #include <linux/string.h>
34*4882a593Smuzhiyun #include <linux/fcntl.h>
35*4882a593Smuzhiyun #include <linux/ptrace.h>
36*4882a593Smuzhiyun #include <linux/serial.h>
37*4882a593Smuzhiyun #include <linux/tty_driver.h>
38*4882a593Smuzhiyun #include <linux/delay.h>
39*4882a593Smuzhiyun #include <linux/pci.h>
40*4882a593Smuzhiyun #include <linux/init.h>
41*4882a593Smuzhiyun #include <linux/bitops.h>
42*4882a593Smuzhiyun #include <linux/slab.h>
43*4882a593Smuzhiyun #include <linux/ratelimit.h>
44*4882a593Smuzhiyun
45*4882a593Smuzhiyun #include <asm/io.h>
46*4882a593Smuzhiyun #include <linux/uaccess.h>
47*4882a593Smuzhiyun
48*4882a593Smuzhiyun #include "moxa.h"
49*4882a593Smuzhiyun
50*4882a593Smuzhiyun #define MOXA_VERSION "6.0k"
51*4882a593Smuzhiyun
52*4882a593Smuzhiyun #define MOXA_FW_HDRLEN 32
53*4882a593Smuzhiyun
54*4882a593Smuzhiyun #define MOXAMAJOR 172
55*4882a593Smuzhiyun
56*4882a593Smuzhiyun #define MAX_BOARDS 4 /* Don't change this value */
57*4882a593Smuzhiyun #define MAX_PORTS_PER_BOARD 32 /* Don't change this value */
58*4882a593Smuzhiyun #define MAX_PORTS (MAX_BOARDS * MAX_PORTS_PER_BOARD)
59*4882a593Smuzhiyun
60*4882a593Smuzhiyun #define MOXA_IS_320(brd) ((brd)->boardType == MOXA_BOARD_C320_ISA || \
61*4882a593Smuzhiyun (brd)->boardType == MOXA_BOARD_C320_PCI)
62*4882a593Smuzhiyun
63*4882a593Smuzhiyun /*
64*4882a593Smuzhiyun * Define the Moxa PCI vendor and device IDs.
65*4882a593Smuzhiyun */
66*4882a593Smuzhiyun #define MOXA_BUS_TYPE_ISA 0
67*4882a593Smuzhiyun #define MOXA_BUS_TYPE_PCI 1
68*4882a593Smuzhiyun
69*4882a593Smuzhiyun enum {
70*4882a593Smuzhiyun MOXA_BOARD_C218_PCI = 1,
71*4882a593Smuzhiyun MOXA_BOARD_C218_ISA,
72*4882a593Smuzhiyun MOXA_BOARD_C320_PCI,
73*4882a593Smuzhiyun MOXA_BOARD_C320_ISA,
74*4882a593Smuzhiyun MOXA_BOARD_CP204J,
75*4882a593Smuzhiyun };
76*4882a593Smuzhiyun
77*4882a593Smuzhiyun static char *moxa_brdname[] =
78*4882a593Smuzhiyun {
79*4882a593Smuzhiyun "C218 Turbo PCI series",
80*4882a593Smuzhiyun "C218 Turbo ISA series",
81*4882a593Smuzhiyun "C320 Turbo PCI series",
82*4882a593Smuzhiyun "C320 Turbo ISA series",
83*4882a593Smuzhiyun "CP-204J series",
84*4882a593Smuzhiyun };
85*4882a593Smuzhiyun
86*4882a593Smuzhiyun #ifdef CONFIG_PCI
87*4882a593Smuzhiyun static const struct pci_device_id moxa_pcibrds[] = {
88*4882a593Smuzhiyun { PCI_DEVICE(PCI_VENDOR_ID_MOXA, PCI_DEVICE_ID_MOXA_C218),
89*4882a593Smuzhiyun .driver_data = MOXA_BOARD_C218_PCI },
90*4882a593Smuzhiyun { PCI_DEVICE(PCI_VENDOR_ID_MOXA, PCI_DEVICE_ID_MOXA_C320),
91*4882a593Smuzhiyun .driver_data = MOXA_BOARD_C320_PCI },
92*4882a593Smuzhiyun { PCI_DEVICE(PCI_VENDOR_ID_MOXA, PCI_DEVICE_ID_MOXA_CP204J),
93*4882a593Smuzhiyun .driver_data = MOXA_BOARD_CP204J },
94*4882a593Smuzhiyun { 0 }
95*4882a593Smuzhiyun };
96*4882a593Smuzhiyun MODULE_DEVICE_TABLE(pci, moxa_pcibrds);
97*4882a593Smuzhiyun #endif /* CONFIG_PCI */
98*4882a593Smuzhiyun
99*4882a593Smuzhiyun struct moxa_port;
100*4882a593Smuzhiyun
101*4882a593Smuzhiyun static struct moxa_board_conf {
102*4882a593Smuzhiyun int boardType;
103*4882a593Smuzhiyun int numPorts;
104*4882a593Smuzhiyun int busType;
105*4882a593Smuzhiyun
106*4882a593Smuzhiyun unsigned int ready;
107*4882a593Smuzhiyun
108*4882a593Smuzhiyun struct moxa_port *ports;
109*4882a593Smuzhiyun
110*4882a593Smuzhiyun void __iomem *basemem;
111*4882a593Smuzhiyun void __iomem *intNdx;
112*4882a593Smuzhiyun void __iomem *intPend;
113*4882a593Smuzhiyun void __iomem *intTable;
114*4882a593Smuzhiyun } moxa_boards[MAX_BOARDS];
115*4882a593Smuzhiyun
116*4882a593Smuzhiyun struct mxser_mstatus {
117*4882a593Smuzhiyun tcflag_t cflag;
118*4882a593Smuzhiyun int cts;
119*4882a593Smuzhiyun int dsr;
120*4882a593Smuzhiyun int ri;
121*4882a593Smuzhiyun int dcd;
122*4882a593Smuzhiyun };
123*4882a593Smuzhiyun
124*4882a593Smuzhiyun struct moxaq_str {
125*4882a593Smuzhiyun int inq;
126*4882a593Smuzhiyun int outq;
127*4882a593Smuzhiyun };
128*4882a593Smuzhiyun
129*4882a593Smuzhiyun struct moxa_port {
130*4882a593Smuzhiyun struct tty_port port;
131*4882a593Smuzhiyun struct moxa_board_conf *board;
132*4882a593Smuzhiyun void __iomem *tableAddr;
133*4882a593Smuzhiyun
134*4882a593Smuzhiyun int type;
135*4882a593Smuzhiyun int cflag;
136*4882a593Smuzhiyun unsigned long statusflags;
137*4882a593Smuzhiyun
138*4882a593Smuzhiyun u8 DCDState; /* Protected by the port lock */
139*4882a593Smuzhiyun u8 lineCtrl;
140*4882a593Smuzhiyun u8 lowChkFlag;
141*4882a593Smuzhiyun };
142*4882a593Smuzhiyun
143*4882a593Smuzhiyun struct mon_str {
144*4882a593Smuzhiyun int tick;
145*4882a593Smuzhiyun int rxcnt[MAX_PORTS];
146*4882a593Smuzhiyun int txcnt[MAX_PORTS];
147*4882a593Smuzhiyun };
148*4882a593Smuzhiyun
149*4882a593Smuzhiyun /* statusflags */
150*4882a593Smuzhiyun #define TXSTOPPED 1
151*4882a593Smuzhiyun #define LOWWAIT 2
152*4882a593Smuzhiyun #define EMPTYWAIT 3
153*4882a593Smuzhiyun
154*4882a593Smuzhiyun
155*4882a593Smuzhiyun #define WAKEUP_CHARS 256
156*4882a593Smuzhiyun
157*4882a593Smuzhiyun static int ttymajor = MOXAMAJOR;
158*4882a593Smuzhiyun static struct mon_str moxaLog;
159*4882a593Smuzhiyun static unsigned int moxaFuncTout = HZ / 2;
160*4882a593Smuzhiyun static unsigned int moxaLowWaterChk;
161*4882a593Smuzhiyun static DEFINE_MUTEX(moxa_openlock);
162*4882a593Smuzhiyun static DEFINE_SPINLOCK(moxa_lock);
163*4882a593Smuzhiyun
164*4882a593Smuzhiyun static unsigned long baseaddr[MAX_BOARDS];
165*4882a593Smuzhiyun static unsigned int type[MAX_BOARDS];
166*4882a593Smuzhiyun static unsigned int numports[MAX_BOARDS];
167*4882a593Smuzhiyun static struct tty_port moxa_service_port;
168*4882a593Smuzhiyun
169*4882a593Smuzhiyun MODULE_AUTHOR("William Chen");
170*4882a593Smuzhiyun MODULE_DESCRIPTION("MOXA Intellio Family Multiport Board Device Driver");
171*4882a593Smuzhiyun MODULE_LICENSE("GPL");
172*4882a593Smuzhiyun MODULE_FIRMWARE("c218tunx.cod");
173*4882a593Smuzhiyun MODULE_FIRMWARE("cp204unx.cod");
174*4882a593Smuzhiyun MODULE_FIRMWARE("c320tunx.cod");
175*4882a593Smuzhiyun
176*4882a593Smuzhiyun module_param_array(type, uint, NULL, 0);
177*4882a593Smuzhiyun MODULE_PARM_DESC(type, "card type: C218=2, C320=4");
178*4882a593Smuzhiyun module_param_hw_array(baseaddr, ulong, ioport, NULL, 0);
179*4882a593Smuzhiyun MODULE_PARM_DESC(baseaddr, "base address");
180*4882a593Smuzhiyun module_param_array(numports, uint, NULL, 0);
181*4882a593Smuzhiyun MODULE_PARM_DESC(numports, "numports (ignored for C218)");
182*4882a593Smuzhiyun
183*4882a593Smuzhiyun module_param(ttymajor, int, 0);
184*4882a593Smuzhiyun
185*4882a593Smuzhiyun /*
186*4882a593Smuzhiyun * static functions:
187*4882a593Smuzhiyun */
188*4882a593Smuzhiyun static int moxa_open(struct tty_struct *, struct file *);
189*4882a593Smuzhiyun static void moxa_close(struct tty_struct *, struct file *);
190*4882a593Smuzhiyun static int moxa_write(struct tty_struct *, const unsigned char *, int);
191*4882a593Smuzhiyun static int moxa_write_room(struct tty_struct *);
192*4882a593Smuzhiyun static void moxa_flush_buffer(struct tty_struct *);
193*4882a593Smuzhiyun static int moxa_chars_in_buffer(struct tty_struct *);
194*4882a593Smuzhiyun static void moxa_set_termios(struct tty_struct *, struct ktermios *);
195*4882a593Smuzhiyun static void moxa_stop(struct tty_struct *);
196*4882a593Smuzhiyun static void moxa_start(struct tty_struct *);
197*4882a593Smuzhiyun static void moxa_hangup(struct tty_struct *);
198*4882a593Smuzhiyun static int moxa_tiocmget(struct tty_struct *tty);
199*4882a593Smuzhiyun static int moxa_tiocmset(struct tty_struct *tty,
200*4882a593Smuzhiyun unsigned int set, unsigned int clear);
201*4882a593Smuzhiyun static void moxa_poll(struct timer_list *);
202*4882a593Smuzhiyun static void moxa_set_tty_param(struct tty_struct *, struct ktermios *);
203*4882a593Smuzhiyun static void moxa_shutdown(struct tty_port *);
204*4882a593Smuzhiyun static int moxa_carrier_raised(struct tty_port *);
205*4882a593Smuzhiyun static void moxa_dtr_rts(struct tty_port *, int);
206*4882a593Smuzhiyun /*
207*4882a593Smuzhiyun * moxa board interface functions:
208*4882a593Smuzhiyun */
209*4882a593Smuzhiyun static void MoxaPortEnable(struct moxa_port *);
210*4882a593Smuzhiyun static void MoxaPortDisable(struct moxa_port *);
211*4882a593Smuzhiyun static int MoxaPortSetTermio(struct moxa_port *, struct ktermios *, speed_t);
212*4882a593Smuzhiyun static int MoxaPortGetLineOut(struct moxa_port *, int *, int *);
213*4882a593Smuzhiyun static void MoxaPortLineCtrl(struct moxa_port *, int, int);
214*4882a593Smuzhiyun static void MoxaPortFlowCtrl(struct moxa_port *, int, int, int, int, int);
215*4882a593Smuzhiyun static int MoxaPortLineStatus(struct moxa_port *);
216*4882a593Smuzhiyun static void MoxaPortFlushData(struct moxa_port *, int);
217*4882a593Smuzhiyun static int MoxaPortWriteData(struct tty_struct *, const unsigned char *, int);
218*4882a593Smuzhiyun static int MoxaPortReadData(struct moxa_port *);
219*4882a593Smuzhiyun static int MoxaPortTxQueue(struct moxa_port *);
220*4882a593Smuzhiyun static int MoxaPortRxQueue(struct moxa_port *);
221*4882a593Smuzhiyun static int MoxaPortTxFree(struct moxa_port *);
222*4882a593Smuzhiyun static void MoxaPortTxDisable(struct moxa_port *);
223*4882a593Smuzhiyun static void MoxaPortTxEnable(struct moxa_port *);
224*4882a593Smuzhiyun static int moxa_get_serial_info(struct tty_struct *, struct serial_struct *);
225*4882a593Smuzhiyun static int moxa_set_serial_info(struct tty_struct *, struct serial_struct *);
226*4882a593Smuzhiyun static void MoxaSetFifo(struct moxa_port *port, int enable);
227*4882a593Smuzhiyun
228*4882a593Smuzhiyun /*
229*4882a593Smuzhiyun * I/O functions
230*4882a593Smuzhiyun */
231*4882a593Smuzhiyun
232*4882a593Smuzhiyun static DEFINE_SPINLOCK(moxafunc_lock);
233*4882a593Smuzhiyun
moxa_wait_finish(void __iomem * ofsAddr)234*4882a593Smuzhiyun static void moxa_wait_finish(void __iomem *ofsAddr)
235*4882a593Smuzhiyun {
236*4882a593Smuzhiyun unsigned long end = jiffies + moxaFuncTout;
237*4882a593Smuzhiyun
238*4882a593Smuzhiyun while (readw(ofsAddr + FuncCode) != 0)
239*4882a593Smuzhiyun if (time_after(jiffies, end))
240*4882a593Smuzhiyun return;
241*4882a593Smuzhiyun if (readw(ofsAddr + FuncCode) != 0)
242*4882a593Smuzhiyun printk_ratelimited(KERN_WARNING "moxa function expired\n");
243*4882a593Smuzhiyun }
244*4882a593Smuzhiyun
moxafunc(void __iomem * ofsAddr,u16 cmd,u16 arg)245*4882a593Smuzhiyun static void moxafunc(void __iomem *ofsAddr, u16 cmd, u16 arg)
246*4882a593Smuzhiyun {
247*4882a593Smuzhiyun unsigned long flags;
248*4882a593Smuzhiyun spin_lock_irqsave(&moxafunc_lock, flags);
249*4882a593Smuzhiyun writew(arg, ofsAddr + FuncArg);
250*4882a593Smuzhiyun writew(cmd, ofsAddr + FuncCode);
251*4882a593Smuzhiyun moxa_wait_finish(ofsAddr);
252*4882a593Smuzhiyun spin_unlock_irqrestore(&moxafunc_lock, flags);
253*4882a593Smuzhiyun }
254*4882a593Smuzhiyun
moxafuncret(void __iomem * ofsAddr,u16 cmd,u16 arg)255*4882a593Smuzhiyun static int moxafuncret(void __iomem *ofsAddr, u16 cmd, u16 arg)
256*4882a593Smuzhiyun {
257*4882a593Smuzhiyun unsigned long flags;
258*4882a593Smuzhiyun u16 ret;
259*4882a593Smuzhiyun spin_lock_irqsave(&moxafunc_lock, flags);
260*4882a593Smuzhiyun writew(arg, ofsAddr + FuncArg);
261*4882a593Smuzhiyun writew(cmd, ofsAddr + FuncCode);
262*4882a593Smuzhiyun moxa_wait_finish(ofsAddr);
263*4882a593Smuzhiyun ret = readw(ofsAddr + FuncArg);
264*4882a593Smuzhiyun spin_unlock_irqrestore(&moxafunc_lock, flags);
265*4882a593Smuzhiyun return ret;
266*4882a593Smuzhiyun }
267*4882a593Smuzhiyun
moxa_low_water_check(void __iomem * ofsAddr)268*4882a593Smuzhiyun static void moxa_low_water_check(void __iomem *ofsAddr)
269*4882a593Smuzhiyun {
270*4882a593Smuzhiyun u16 rptr, wptr, mask, len;
271*4882a593Smuzhiyun
272*4882a593Smuzhiyun if (readb(ofsAddr + FlagStat) & Xoff_state) {
273*4882a593Smuzhiyun rptr = readw(ofsAddr + RXrptr);
274*4882a593Smuzhiyun wptr = readw(ofsAddr + RXwptr);
275*4882a593Smuzhiyun mask = readw(ofsAddr + RX_mask);
276*4882a593Smuzhiyun len = (wptr - rptr) & mask;
277*4882a593Smuzhiyun if (len <= Low_water)
278*4882a593Smuzhiyun moxafunc(ofsAddr, FC_SendXon, 0);
279*4882a593Smuzhiyun }
280*4882a593Smuzhiyun }
281*4882a593Smuzhiyun
282*4882a593Smuzhiyun /*
283*4882a593Smuzhiyun * TTY operations
284*4882a593Smuzhiyun */
285*4882a593Smuzhiyun
moxa_ioctl(struct tty_struct * tty,unsigned int cmd,unsigned long arg)286*4882a593Smuzhiyun static int moxa_ioctl(struct tty_struct *tty,
287*4882a593Smuzhiyun unsigned int cmd, unsigned long arg)
288*4882a593Smuzhiyun {
289*4882a593Smuzhiyun struct moxa_port *ch = tty->driver_data;
290*4882a593Smuzhiyun void __user *argp = (void __user *)arg;
291*4882a593Smuzhiyun int status, ret = 0;
292*4882a593Smuzhiyun
293*4882a593Smuzhiyun if (tty->index == MAX_PORTS) {
294*4882a593Smuzhiyun if (cmd != MOXA_GETDATACOUNT && cmd != MOXA_GET_IOQUEUE &&
295*4882a593Smuzhiyun cmd != MOXA_GETMSTATUS)
296*4882a593Smuzhiyun return -EINVAL;
297*4882a593Smuzhiyun } else if (!ch)
298*4882a593Smuzhiyun return -ENODEV;
299*4882a593Smuzhiyun
300*4882a593Smuzhiyun switch (cmd) {
301*4882a593Smuzhiyun case MOXA_GETDATACOUNT:
302*4882a593Smuzhiyun moxaLog.tick = jiffies;
303*4882a593Smuzhiyun if (copy_to_user(argp, &moxaLog, sizeof(moxaLog)))
304*4882a593Smuzhiyun ret = -EFAULT;
305*4882a593Smuzhiyun break;
306*4882a593Smuzhiyun case MOXA_FLUSH_QUEUE:
307*4882a593Smuzhiyun MoxaPortFlushData(ch, arg);
308*4882a593Smuzhiyun break;
309*4882a593Smuzhiyun case MOXA_GET_IOQUEUE: {
310*4882a593Smuzhiyun struct moxaq_str __user *argm = argp;
311*4882a593Smuzhiyun struct moxaq_str tmp;
312*4882a593Smuzhiyun struct moxa_port *p;
313*4882a593Smuzhiyun unsigned int i, j;
314*4882a593Smuzhiyun
315*4882a593Smuzhiyun for (i = 0; i < MAX_BOARDS; i++) {
316*4882a593Smuzhiyun p = moxa_boards[i].ports;
317*4882a593Smuzhiyun for (j = 0; j < MAX_PORTS_PER_BOARD; j++, p++, argm++) {
318*4882a593Smuzhiyun memset(&tmp, 0, sizeof(tmp));
319*4882a593Smuzhiyun spin_lock_bh(&moxa_lock);
320*4882a593Smuzhiyun if (moxa_boards[i].ready) {
321*4882a593Smuzhiyun tmp.inq = MoxaPortRxQueue(p);
322*4882a593Smuzhiyun tmp.outq = MoxaPortTxQueue(p);
323*4882a593Smuzhiyun }
324*4882a593Smuzhiyun spin_unlock_bh(&moxa_lock);
325*4882a593Smuzhiyun if (copy_to_user(argm, &tmp, sizeof(tmp)))
326*4882a593Smuzhiyun return -EFAULT;
327*4882a593Smuzhiyun }
328*4882a593Smuzhiyun }
329*4882a593Smuzhiyun break;
330*4882a593Smuzhiyun } case MOXA_GET_OQUEUE:
331*4882a593Smuzhiyun status = MoxaPortTxQueue(ch);
332*4882a593Smuzhiyun ret = put_user(status, (unsigned long __user *)argp);
333*4882a593Smuzhiyun break;
334*4882a593Smuzhiyun case MOXA_GET_IQUEUE:
335*4882a593Smuzhiyun status = MoxaPortRxQueue(ch);
336*4882a593Smuzhiyun ret = put_user(status, (unsigned long __user *)argp);
337*4882a593Smuzhiyun break;
338*4882a593Smuzhiyun case MOXA_GETMSTATUS: {
339*4882a593Smuzhiyun struct mxser_mstatus __user *argm = argp;
340*4882a593Smuzhiyun struct mxser_mstatus tmp;
341*4882a593Smuzhiyun struct moxa_port *p;
342*4882a593Smuzhiyun unsigned int i, j;
343*4882a593Smuzhiyun
344*4882a593Smuzhiyun for (i = 0; i < MAX_BOARDS; i++) {
345*4882a593Smuzhiyun p = moxa_boards[i].ports;
346*4882a593Smuzhiyun for (j = 0; j < MAX_PORTS_PER_BOARD; j++, p++, argm++) {
347*4882a593Smuzhiyun struct tty_struct *ttyp;
348*4882a593Smuzhiyun memset(&tmp, 0, sizeof(tmp));
349*4882a593Smuzhiyun spin_lock_bh(&moxa_lock);
350*4882a593Smuzhiyun if (!moxa_boards[i].ready) {
351*4882a593Smuzhiyun spin_unlock_bh(&moxa_lock);
352*4882a593Smuzhiyun goto copy;
353*4882a593Smuzhiyun }
354*4882a593Smuzhiyun
355*4882a593Smuzhiyun status = MoxaPortLineStatus(p);
356*4882a593Smuzhiyun spin_unlock_bh(&moxa_lock);
357*4882a593Smuzhiyun
358*4882a593Smuzhiyun if (status & 1)
359*4882a593Smuzhiyun tmp.cts = 1;
360*4882a593Smuzhiyun if (status & 2)
361*4882a593Smuzhiyun tmp.dsr = 1;
362*4882a593Smuzhiyun if (status & 4)
363*4882a593Smuzhiyun tmp.dcd = 1;
364*4882a593Smuzhiyun
365*4882a593Smuzhiyun ttyp = tty_port_tty_get(&p->port);
366*4882a593Smuzhiyun if (!ttyp)
367*4882a593Smuzhiyun tmp.cflag = p->cflag;
368*4882a593Smuzhiyun else
369*4882a593Smuzhiyun tmp.cflag = ttyp->termios.c_cflag;
370*4882a593Smuzhiyun tty_kref_put(ttyp);
371*4882a593Smuzhiyun copy:
372*4882a593Smuzhiyun if (copy_to_user(argm, &tmp, sizeof(tmp)))
373*4882a593Smuzhiyun return -EFAULT;
374*4882a593Smuzhiyun }
375*4882a593Smuzhiyun }
376*4882a593Smuzhiyun break;
377*4882a593Smuzhiyun }
378*4882a593Smuzhiyun default:
379*4882a593Smuzhiyun ret = -ENOIOCTLCMD;
380*4882a593Smuzhiyun }
381*4882a593Smuzhiyun return ret;
382*4882a593Smuzhiyun }
383*4882a593Smuzhiyun
moxa_break_ctl(struct tty_struct * tty,int state)384*4882a593Smuzhiyun static int moxa_break_ctl(struct tty_struct *tty, int state)
385*4882a593Smuzhiyun {
386*4882a593Smuzhiyun struct moxa_port *port = tty->driver_data;
387*4882a593Smuzhiyun
388*4882a593Smuzhiyun moxafunc(port->tableAddr, state ? FC_SendBreak : FC_StopBreak,
389*4882a593Smuzhiyun Magic_code);
390*4882a593Smuzhiyun return 0;
391*4882a593Smuzhiyun }
392*4882a593Smuzhiyun
393*4882a593Smuzhiyun static const struct tty_operations moxa_ops = {
394*4882a593Smuzhiyun .open = moxa_open,
395*4882a593Smuzhiyun .close = moxa_close,
396*4882a593Smuzhiyun .write = moxa_write,
397*4882a593Smuzhiyun .write_room = moxa_write_room,
398*4882a593Smuzhiyun .flush_buffer = moxa_flush_buffer,
399*4882a593Smuzhiyun .chars_in_buffer = moxa_chars_in_buffer,
400*4882a593Smuzhiyun .ioctl = moxa_ioctl,
401*4882a593Smuzhiyun .set_termios = moxa_set_termios,
402*4882a593Smuzhiyun .stop = moxa_stop,
403*4882a593Smuzhiyun .start = moxa_start,
404*4882a593Smuzhiyun .hangup = moxa_hangup,
405*4882a593Smuzhiyun .break_ctl = moxa_break_ctl,
406*4882a593Smuzhiyun .tiocmget = moxa_tiocmget,
407*4882a593Smuzhiyun .tiocmset = moxa_tiocmset,
408*4882a593Smuzhiyun .set_serial = moxa_set_serial_info,
409*4882a593Smuzhiyun .get_serial = moxa_get_serial_info,
410*4882a593Smuzhiyun };
411*4882a593Smuzhiyun
412*4882a593Smuzhiyun static const struct tty_port_operations moxa_port_ops = {
413*4882a593Smuzhiyun .carrier_raised = moxa_carrier_raised,
414*4882a593Smuzhiyun .dtr_rts = moxa_dtr_rts,
415*4882a593Smuzhiyun .shutdown = moxa_shutdown,
416*4882a593Smuzhiyun };
417*4882a593Smuzhiyun
418*4882a593Smuzhiyun static struct tty_driver *moxaDriver;
419*4882a593Smuzhiyun static DEFINE_TIMER(moxaTimer, moxa_poll);
420*4882a593Smuzhiyun
421*4882a593Smuzhiyun /*
422*4882a593Smuzhiyun * HW init
423*4882a593Smuzhiyun */
424*4882a593Smuzhiyun
moxa_check_fw_model(struct moxa_board_conf * brd,u8 model)425*4882a593Smuzhiyun static int moxa_check_fw_model(struct moxa_board_conf *brd, u8 model)
426*4882a593Smuzhiyun {
427*4882a593Smuzhiyun switch (brd->boardType) {
428*4882a593Smuzhiyun case MOXA_BOARD_C218_ISA:
429*4882a593Smuzhiyun case MOXA_BOARD_C218_PCI:
430*4882a593Smuzhiyun if (model != 1)
431*4882a593Smuzhiyun goto err;
432*4882a593Smuzhiyun break;
433*4882a593Smuzhiyun case MOXA_BOARD_CP204J:
434*4882a593Smuzhiyun if (model != 3)
435*4882a593Smuzhiyun goto err;
436*4882a593Smuzhiyun break;
437*4882a593Smuzhiyun default:
438*4882a593Smuzhiyun if (model != 2)
439*4882a593Smuzhiyun goto err;
440*4882a593Smuzhiyun break;
441*4882a593Smuzhiyun }
442*4882a593Smuzhiyun return 0;
443*4882a593Smuzhiyun err:
444*4882a593Smuzhiyun return -EINVAL;
445*4882a593Smuzhiyun }
446*4882a593Smuzhiyun
moxa_check_fw(const void * ptr)447*4882a593Smuzhiyun static int moxa_check_fw(const void *ptr)
448*4882a593Smuzhiyun {
449*4882a593Smuzhiyun const __le16 *lptr = ptr;
450*4882a593Smuzhiyun
451*4882a593Smuzhiyun if (*lptr != cpu_to_le16(0x7980))
452*4882a593Smuzhiyun return -EINVAL;
453*4882a593Smuzhiyun
454*4882a593Smuzhiyun return 0;
455*4882a593Smuzhiyun }
456*4882a593Smuzhiyun
moxa_load_bios(struct moxa_board_conf * brd,const u8 * buf,size_t len)457*4882a593Smuzhiyun static int moxa_load_bios(struct moxa_board_conf *brd, const u8 *buf,
458*4882a593Smuzhiyun size_t len)
459*4882a593Smuzhiyun {
460*4882a593Smuzhiyun void __iomem *baseAddr = brd->basemem;
461*4882a593Smuzhiyun u16 tmp;
462*4882a593Smuzhiyun
463*4882a593Smuzhiyun writeb(HW_reset, baseAddr + Control_reg); /* reset */
464*4882a593Smuzhiyun msleep(10);
465*4882a593Smuzhiyun memset_io(baseAddr, 0, 4096);
466*4882a593Smuzhiyun memcpy_toio(baseAddr, buf, len); /* download BIOS */
467*4882a593Smuzhiyun writeb(0, baseAddr + Control_reg); /* restart */
468*4882a593Smuzhiyun
469*4882a593Smuzhiyun msleep(2000);
470*4882a593Smuzhiyun
471*4882a593Smuzhiyun switch (brd->boardType) {
472*4882a593Smuzhiyun case MOXA_BOARD_C218_ISA:
473*4882a593Smuzhiyun case MOXA_BOARD_C218_PCI:
474*4882a593Smuzhiyun tmp = readw(baseAddr + C218_key);
475*4882a593Smuzhiyun if (tmp != C218_KeyCode)
476*4882a593Smuzhiyun goto err;
477*4882a593Smuzhiyun break;
478*4882a593Smuzhiyun case MOXA_BOARD_CP204J:
479*4882a593Smuzhiyun tmp = readw(baseAddr + C218_key);
480*4882a593Smuzhiyun if (tmp != CP204J_KeyCode)
481*4882a593Smuzhiyun goto err;
482*4882a593Smuzhiyun break;
483*4882a593Smuzhiyun default:
484*4882a593Smuzhiyun tmp = readw(baseAddr + C320_key);
485*4882a593Smuzhiyun if (tmp != C320_KeyCode)
486*4882a593Smuzhiyun goto err;
487*4882a593Smuzhiyun tmp = readw(baseAddr + C320_status);
488*4882a593Smuzhiyun if (tmp != STS_init) {
489*4882a593Smuzhiyun printk(KERN_ERR "MOXA: bios upload failed -- CPU/Basic "
490*4882a593Smuzhiyun "module not found\n");
491*4882a593Smuzhiyun return -EIO;
492*4882a593Smuzhiyun }
493*4882a593Smuzhiyun break;
494*4882a593Smuzhiyun }
495*4882a593Smuzhiyun
496*4882a593Smuzhiyun return 0;
497*4882a593Smuzhiyun err:
498*4882a593Smuzhiyun printk(KERN_ERR "MOXA: bios upload failed -- board not found\n");
499*4882a593Smuzhiyun return -EIO;
500*4882a593Smuzhiyun }
501*4882a593Smuzhiyun
moxa_load_320b(struct moxa_board_conf * brd,const u8 * ptr,size_t len)502*4882a593Smuzhiyun static int moxa_load_320b(struct moxa_board_conf *brd, const u8 *ptr,
503*4882a593Smuzhiyun size_t len)
504*4882a593Smuzhiyun {
505*4882a593Smuzhiyun void __iomem *baseAddr = brd->basemem;
506*4882a593Smuzhiyun
507*4882a593Smuzhiyun if (len < 7168) {
508*4882a593Smuzhiyun printk(KERN_ERR "MOXA: invalid 320 bios -- too short\n");
509*4882a593Smuzhiyun return -EINVAL;
510*4882a593Smuzhiyun }
511*4882a593Smuzhiyun
512*4882a593Smuzhiyun writew(len - 7168 - 2, baseAddr + C320bapi_len);
513*4882a593Smuzhiyun writeb(1, baseAddr + Control_reg); /* Select Page 1 */
514*4882a593Smuzhiyun memcpy_toio(baseAddr + DynPage_addr, ptr, 7168);
515*4882a593Smuzhiyun writeb(2, baseAddr + Control_reg); /* Select Page 2 */
516*4882a593Smuzhiyun memcpy_toio(baseAddr + DynPage_addr, ptr + 7168, len - 7168);
517*4882a593Smuzhiyun
518*4882a593Smuzhiyun return 0;
519*4882a593Smuzhiyun }
520*4882a593Smuzhiyun
moxa_real_load_code(struct moxa_board_conf * brd,const void * ptr,size_t len)521*4882a593Smuzhiyun static int moxa_real_load_code(struct moxa_board_conf *brd, const void *ptr,
522*4882a593Smuzhiyun size_t len)
523*4882a593Smuzhiyun {
524*4882a593Smuzhiyun void __iomem *baseAddr = brd->basemem;
525*4882a593Smuzhiyun const __le16 *uptr = ptr;
526*4882a593Smuzhiyun size_t wlen, len2, j;
527*4882a593Smuzhiyun unsigned long key, loadbuf, loadlen, checksum, checksum_ok;
528*4882a593Smuzhiyun unsigned int i, retry;
529*4882a593Smuzhiyun u16 usum, keycode;
530*4882a593Smuzhiyun
531*4882a593Smuzhiyun keycode = (brd->boardType == MOXA_BOARD_CP204J) ? CP204J_KeyCode :
532*4882a593Smuzhiyun C218_KeyCode;
533*4882a593Smuzhiyun
534*4882a593Smuzhiyun switch (brd->boardType) {
535*4882a593Smuzhiyun case MOXA_BOARD_CP204J:
536*4882a593Smuzhiyun case MOXA_BOARD_C218_ISA:
537*4882a593Smuzhiyun case MOXA_BOARD_C218_PCI:
538*4882a593Smuzhiyun key = C218_key;
539*4882a593Smuzhiyun loadbuf = C218_LoadBuf;
540*4882a593Smuzhiyun loadlen = C218DLoad_len;
541*4882a593Smuzhiyun checksum = C218check_sum;
542*4882a593Smuzhiyun checksum_ok = C218chksum_ok;
543*4882a593Smuzhiyun break;
544*4882a593Smuzhiyun default:
545*4882a593Smuzhiyun key = C320_key;
546*4882a593Smuzhiyun keycode = C320_KeyCode;
547*4882a593Smuzhiyun loadbuf = C320_LoadBuf;
548*4882a593Smuzhiyun loadlen = C320DLoad_len;
549*4882a593Smuzhiyun checksum = C320check_sum;
550*4882a593Smuzhiyun checksum_ok = C320chksum_ok;
551*4882a593Smuzhiyun break;
552*4882a593Smuzhiyun }
553*4882a593Smuzhiyun
554*4882a593Smuzhiyun usum = 0;
555*4882a593Smuzhiyun wlen = len >> 1;
556*4882a593Smuzhiyun for (i = 0; i < wlen; i++)
557*4882a593Smuzhiyun usum += le16_to_cpu(uptr[i]);
558*4882a593Smuzhiyun retry = 0;
559*4882a593Smuzhiyun do {
560*4882a593Smuzhiyun wlen = len >> 1;
561*4882a593Smuzhiyun j = 0;
562*4882a593Smuzhiyun while (wlen) {
563*4882a593Smuzhiyun len2 = (wlen > 2048) ? 2048 : wlen;
564*4882a593Smuzhiyun wlen -= len2;
565*4882a593Smuzhiyun memcpy_toio(baseAddr + loadbuf, ptr + j, len2 << 1);
566*4882a593Smuzhiyun j += len2 << 1;
567*4882a593Smuzhiyun
568*4882a593Smuzhiyun writew(len2, baseAddr + loadlen);
569*4882a593Smuzhiyun writew(0, baseAddr + key);
570*4882a593Smuzhiyun for (i = 0; i < 100; i++) {
571*4882a593Smuzhiyun if (readw(baseAddr + key) == keycode)
572*4882a593Smuzhiyun break;
573*4882a593Smuzhiyun msleep(10);
574*4882a593Smuzhiyun }
575*4882a593Smuzhiyun if (readw(baseAddr + key) != keycode)
576*4882a593Smuzhiyun return -EIO;
577*4882a593Smuzhiyun }
578*4882a593Smuzhiyun writew(0, baseAddr + loadlen);
579*4882a593Smuzhiyun writew(usum, baseAddr + checksum);
580*4882a593Smuzhiyun writew(0, baseAddr + key);
581*4882a593Smuzhiyun for (i = 0; i < 100; i++) {
582*4882a593Smuzhiyun if (readw(baseAddr + key) == keycode)
583*4882a593Smuzhiyun break;
584*4882a593Smuzhiyun msleep(10);
585*4882a593Smuzhiyun }
586*4882a593Smuzhiyun retry++;
587*4882a593Smuzhiyun } while ((readb(baseAddr + checksum_ok) != 1) && (retry < 3));
588*4882a593Smuzhiyun if (readb(baseAddr + checksum_ok) != 1)
589*4882a593Smuzhiyun return -EIO;
590*4882a593Smuzhiyun
591*4882a593Smuzhiyun writew(0, baseAddr + key);
592*4882a593Smuzhiyun for (i = 0; i < 600; i++) {
593*4882a593Smuzhiyun if (readw(baseAddr + Magic_no) == Magic_code)
594*4882a593Smuzhiyun break;
595*4882a593Smuzhiyun msleep(10);
596*4882a593Smuzhiyun }
597*4882a593Smuzhiyun if (readw(baseAddr + Magic_no) != Magic_code)
598*4882a593Smuzhiyun return -EIO;
599*4882a593Smuzhiyun
600*4882a593Smuzhiyun if (MOXA_IS_320(brd)) {
601*4882a593Smuzhiyun if (brd->busType == MOXA_BUS_TYPE_PCI) { /* ASIC board */
602*4882a593Smuzhiyun writew(0x3800, baseAddr + TMS320_PORT1);
603*4882a593Smuzhiyun writew(0x3900, baseAddr + TMS320_PORT2);
604*4882a593Smuzhiyun writew(28499, baseAddr + TMS320_CLOCK);
605*4882a593Smuzhiyun } else {
606*4882a593Smuzhiyun writew(0x3200, baseAddr + TMS320_PORT1);
607*4882a593Smuzhiyun writew(0x3400, baseAddr + TMS320_PORT2);
608*4882a593Smuzhiyun writew(19999, baseAddr + TMS320_CLOCK);
609*4882a593Smuzhiyun }
610*4882a593Smuzhiyun }
611*4882a593Smuzhiyun writew(1, baseAddr + Disable_IRQ);
612*4882a593Smuzhiyun writew(0, baseAddr + Magic_no);
613*4882a593Smuzhiyun for (i = 0; i < 500; i++) {
614*4882a593Smuzhiyun if (readw(baseAddr + Magic_no) == Magic_code)
615*4882a593Smuzhiyun break;
616*4882a593Smuzhiyun msleep(10);
617*4882a593Smuzhiyun }
618*4882a593Smuzhiyun if (readw(baseAddr + Magic_no) != Magic_code)
619*4882a593Smuzhiyun return -EIO;
620*4882a593Smuzhiyun
621*4882a593Smuzhiyun if (MOXA_IS_320(brd)) {
622*4882a593Smuzhiyun j = readw(baseAddr + Module_cnt);
623*4882a593Smuzhiyun if (j <= 0)
624*4882a593Smuzhiyun return -EIO;
625*4882a593Smuzhiyun brd->numPorts = j * 8;
626*4882a593Smuzhiyun writew(j, baseAddr + Module_no);
627*4882a593Smuzhiyun writew(0, baseAddr + Magic_no);
628*4882a593Smuzhiyun for (i = 0; i < 600; i++) {
629*4882a593Smuzhiyun if (readw(baseAddr + Magic_no) == Magic_code)
630*4882a593Smuzhiyun break;
631*4882a593Smuzhiyun msleep(10);
632*4882a593Smuzhiyun }
633*4882a593Smuzhiyun if (readw(baseAddr + Magic_no) != Magic_code)
634*4882a593Smuzhiyun return -EIO;
635*4882a593Smuzhiyun }
636*4882a593Smuzhiyun brd->intNdx = baseAddr + IRQindex;
637*4882a593Smuzhiyun brd->intPend = baseAddr + IRQpending;
638*4882a593Smuzhiyun brd->intTable = baseAddr + IRQtable;
639*4882a593Smuzhiyun
640*4882a593Smuzhiyun return 0;
641*4882a593Smuzhiyun }
642*4882a593Smuzhiyun
moxa_load_code(struct moxa_board_conf * brd,const void * ptr,size_t len)643*4882a593Smuzhiyun static int moxa_load_code(struct moxa_board_conf *brd, const void *ptr,
644*4882a593Smuzhiyun size_t len)
645*4882a593Smuzhiyun {
646*4882a593Smuzhiyun void __iomem *ofsAddr, *baseAddr = brd->basemem;
647*4882a593Smuzhiyun struct moxa_port *port;
648*4882a593Smuzhiyun int retval, i;
649*4882a593Smuzhiyun
650*4882a593Smuzhiyun if (len % 2) {
651*4882a593Smuzhiyun printk(KERN_ERR "MOXA: bios length is not even\n");
652*4882a593Smuzhiyun return -EINVAL;
653*4882a593Smuzhiyun }
654*4882a593Smuzhiyun
655*4882a593Smuzhiyun retval = moxa_real_load_code(brd, ptr, len); /* may change numPorts */
656*4882a593Smuzhiyun if (retval)
657*4882a593Smuzhiyun return retval;
658*4882a593Smuzhiyun
659*4882a593Smuzhiyun switch (brd->boardType) {
660*4882a593Smuzhiyun case MOXA_BOARD_C218_ISA:
661*4882a593Smuzhiyun case MOXA_BOARD_C218_PCI:
662*4882a593Smuzhiyun case MOXA_BOARD_CP204J:
663*4882a593Smuzhiyun port = brd->ports;
664*4882a593Smuzhiyun for (i = 0; i < brd->numPorts; i++, port++) {
665*4882a593Smuzhiyun port->board = brd;
666*4882a593Smuzhiyun port->DCDState = 0;
667*4882a593Smuzhiyun port->tableAddr = baseAddr + Extern_table +
668*4882a593Smuzhiyun Extern_size * i;
669*4882a593Smuzhiyun ofsAddr = port->tableAddr;
670*4882a593Smuzhiyun writew(C218rx_mask, ofsAddr + RX_mask);
671*4882a593Smuzhiyun writew(C218tx_mask, ofsAddr + TX_mask);
672*4882a593Smuzhiyun writew(C218rx_spage + i * C218buf_pageno, ofsAddr + Page_rxb);
673*4882a593Smuzhiyun writew(readw(ofsAddr + Page_rxb) + C218rx_pageno, ofsAddr + EndPage_rxb);
674*4882a593Smuzhiyun
675*4882a593Smuzhiyun writew(C218tx_spage + i * C218buf_pageno, ofsAddr + Page_txb);
676*4882a593Smuzhiyun writew(readw(ofsAddr + Page_txb) + C218tx_pageno, ofsAddr + EndPage_txb);
677*4882a593Smuzhiyun
678*4882a593Smuzhiyun }
679*4882a593Smuzhiyun break;
680*4882a593Smuzhiyun default:
681*4882a593Smuzhiyun port = brd->ports;
682*4882a593Smuzhiyun for (i = 0; i < brd->numPorts; i++, port++) {
683*4882a593Smuzhiyun port->board = brd;
684*4882a593Smuzhiyun port->DCDState = 0;
685*4882a593Smuzhiyun port->tableAddr = baseAddr + Extern_table +
686*4882a593Smuzhiyun Extern_size * i;
687*4882a593Smuzhiyun ofsAddr = port->tableAddr;
688*4882a593Smuzhiyun switch (brd->numPorts) {
689*4882a593Smuzhiyun case 8:
690*4882a593Smuzhiyun writew(C320p8rx_mask, ofsAddr + RX_mask);
691*4882a593Smuzhiyun writew(C320p8tx_mask, ofsAddr + TX_mask);
692*4882a593Smuzhiyun writew(C320p8rx_spage + i * C320p8buf_pgno, ofsAddr + Page_rxb);
693*4882a593Smuzhiyun writew(readw(ofsAddr + Page_rxb) + C320p8rx_pgno, ofsAddr + EndPage_rxb);
694*4882a593Smuzhiyun writew(C320p8tx_spage + i * C320p8buf_pgno, ofsAddr + Page_txb);
695*4882a593Smuzhiyun writew(readw(ofsAddr + Page_txb) + C320p8tx_pgno, ofsAddr + EndPage_txb);
696*4882a593Smuzhiyun
697*4882a593Smuzhiyun break;
698*4882a593Smuzhiyun case 16:
699*4882a593Smuzhiyun writew(C320p16rx_mask, ofsAddr + RX_mask);
700*4882a593Smuzhiyun writew(C320p16tx_mask, ofsAddr + TX_mask);
701*4882a593Smuzhiyun writew(C320p16rx_spage + i * C320p16buf_pgno, ofsAddr + Page_rxb);
702*4882a593Smuzhiyun writew(readw(ofsAddr + Page_rxb) + C320p16rx_pgno, ofsAddr + EndPage_rxb);
703*4882a593Smuzhiyun writew(C320p16tx_spage + i * C320p16buf_pgno, ofsAddr + Page_txb);
704*4882a593Smuzhiyun writew(readw(ofsAddr + Page_txb) + C320p16tx_pgno, ofsAddr + EndPage_txb);
705*4882a593Smuzhiyun break;
706*4882a593Smuzhiyun
707*4882a593Smuzhiyun case 24:
708*4882a593Smuzhiyun writew(C320p24rx_mask, ofsAddr + RX_mask);
709*4882a593Smuzhiyun writew(C320p24tx_mask, ofsAddr + TX_mask);
710*4882a593Smuzhiyun writew(C320p24rx_spage + i * C320p24buf_pgno, ofsAddr + Page_rxb);
711*4882a593Smuzhiyun writew(readw(ofsAddr + Page_rxb) + C320p24rx_pgno, ofsAddr + EndPage_rxb);
712*4882a593Smuzhiyun writew(C320p24tx_spage + i * C320p24buf_pgno, ofsAddr + Page_txb);
713*4882a593Smuzhiyun writew(readw(ofsAddr + Page_txb), ofsAddr + EndPage_txb);
714*4882a593Smuzhiyun break;
715*4882a593Smuzhiyun case 32:
716*4882a593Smuzhiyun writew(C320p32rx_mask, ofsAddr + RX_mask);
717*4882a593Smuzhiyun writew(C320p32tx_mask, ofsAddr + TX_mask);
718*4882a593Smuzhiyun writew(C320p32tx_ofs, ofsAddr + Ofs_txb);
719*4882a593Smuzhiyun writew(C320p32rx_spage + i * C320p32buf_pgno, ofsAddr + Page_rxb);
720*4882a593Smuzhiyun writew(readb(ofsAddr + Page_rxb), ofsAddr + EndPage_rxb);
721*4882a593Smuzhiyun writew(C320p32tx_spage + i * C320p32buf_pgno, ofsAddr + Page_txb);
722*4882a593Smuzhiyun writew(readw(ofsAddr + Page_txb), ofsAddr + EndPage_txb);
723*4882a593Smuzhiyun break;
724*4882a593Smuzhiyun }
725*4882a593Smuzhiyun }
726*4882a593Smuzhiyun break;
727*4882a593Smuzhiyun }
728*4882a593Smuzhiyun return 0;
729*4882a593Smuzhiyun }
730*4882a593Smuzhiyun
moxa_load_fw(struct moxa_board_conf * brd,const struct firmware * fw)731*4882a593Smuzhiyun static int moxa_load_fw(struct moxa_board_conf *brd, const struct firmware *fw)
732*4882a593Smuzhiyun {
733*4882a593Smuzhiyun const void *ptr = fw->data;
734*4882a593Smuzhiyun char rsn[64];
735*4882a593Smuzhiyun u16 lens[5];
736*4882a593Smuzhiyun size_t len;
737*4882a593Smuzhiyun unsigned int a, lenp, lencnt;
738*4882a593Smuzhiyun int ret = -EINVAL;
739*4882a593Smuzhiyun struct {
740*4882a593Smuzhiyun __le32 magic; /* 0x34303430 */
741*4882a593Smuzhiyun u8 reserved1[2];
742*4882a593Smuzhiyun u8 type; /* UNIX = 3 */
743*4882a593Smuzhiyun u8 model; /* C218T=1, C320T=2, CP204=3 */
744*4882a593Smuzhiyun u8 reserved2[8];
745*4882a593Smuzhiyun __le16 len[5];
746*4882a593Smuzhiyun } const *hdr = ptr;
747*4882a593Smuzhiyun
748*4882a593Smuzhiyun BUILD_BUG_ON(ARRAY_SIZE(hdr->len) != ARRAY_SIZE(lens));
749*4882a593Smuzhiyun
750*4882a593Smuzhiyun if (fw->size < MOXA_FW_HDRLEN) {
751*4882a593Smuzhiyun strcpy(rsn, "too short (even header won't fit)");
752*4882a593Smuzhiyun goto err;
753*4882a593Smuzhiyun }
754*4882a593Smuzhiyun if (hdr->magic != cpu_to_le32(0x30343034)) {
755*4882a593Smuzhiyun sprintf(rsn, "bad magic: %.8x", le32_to_cpu(hdr->magic));
756*4882a593Smuzhiyun goto err;
757*4882a593Smuzhiyun }
758*4882a593Smuzhiyun if (hdr->type != 3) {
759*4882a593Smuzhiyun sprintf(rsn, "not for linux, type is %u", hdr->type);
760*4882a593Smuzhiyun goto err;
761*4882a593Smuzhiyun }
762*4882a593Smuzhiyun if (moxa_check_fw_model(brd, hdr->model)) {
763*4882a593Smuzhiyun sprintf(rsn, "not for this card, model is %u", hdr->model);
764*4882a593Smuzhiyun goto err;
765*4882a593Smuzhiyun }
766*4882a593Smuzhiyun
767*4882a593Smuzhiyun len = MOXA_FW_HDRLEN;
768*4882a593Smuzhiyun lencnt = hdr->model == 2 ? 5 : 3;
769*4882a593Smuzhiyun for (a = 0; a < ARRAY_SIZE(lens); a++) {
770*4882a593Smuzhiyun lens[a] = le16_to_cpu(hdr->len[a]);
771*4882a593Smuzhiyun if (lens[a] && len + lens[a] <= fw->size &&
772*4882a593Smuzhiyun moxa_check_fw(&fw->data[len]))
773*4882a593Smuzhiyun printk(KERN_WARNING "MOXA firmware: unexpected input "
774*4882a593Smuzhiyun "at offset %u, but going on\n", (u32)len);
775*4882a593Smuzhiyun if (!lens[a] && a < lencnt) {
776*4882a593Smuzhiyun sprintf(rsn, "too few entries in fw file");
777*4882a593Smuzhiyun goto err;
778*4882a593Smuzhiyun }
779*4882a593Smuzhiyun len += lens[a];
780*4882a593Smuzhiyun }
781*4882a593Smuzhiyun
782*4882a593Smuzhiyun if (len != fw->size) {
783*4882a593Smuzhiyun sprintf(rsn, "bad length: %u (should be %u)", (u32)fw->size,
784*4882a593Smuzhiyun (u32)len);
785*4882a593Smuzhiyun goto err;
786*4882a593Smuzhiyun }
787*4882a593Smuzhiyun
788*4882a593Smuzhiyun ptr += MOXA_FW_HDRLEN;
789*4882a593Smuzhiyun lenp = 0; /* bios */
790*4882a593Smuzhiyun
791*4882a593Smuzhiyun strcpy(rsn, "read above");
792*4882a593Smuzhiyun
793*4882a593Smuzhiyun ret = moxa_load_bios(brd, ptr, lens[lenp]);
794*4882a593Smuzhiyun if (ret)
795*4882a593Smuzhiyun goto err;
796*4882a593Smuzhiyun
797*4882a593Smuzhiyun /* we skip the tty section (lens[1]), since we don't need it */
798*4882a593Smuzhiyun ptr += lens[lenp] + lens[lenp + 1];
799*4882a593Smuzhiyun lenp += 2; /* comm */
800*4882a593Smuzhiyun
801*4882a593Smuzhiyun if (hdr->model == 2) {
802*4882a593Smuzhiyun ret = moxa_load_320b(brd, ptr, lens[lenp]);
803*4882a593Smuzhiyun if (ret)
804*4882a593Smuzhiyun goto err;
805*4882a593Smuzhiyun /* skip another tty */
806*4882a593Smuzhiyun ptr += lens[lenp] + lens[lenp + 1];
807*4882a593Smuzhiyun lenp += 2;
808*4882a593Smuzhiyun }
809*4882a593Smuzhiyun
810*4882a593Smuzhiyun ret = moxa_load_code(brd, ptr, lens[lenp]);
811*4882a593Smuzhiyun if (ret)
812*4882a593Smuzhiyun goto err;
813*4882a593Smuzhiyun
814*4882a593Smuzhiyun return 0;
815*4882a593Smuzhiyun err:
816*4882a593Smuzhiyun printk(KERN_ERR "firmware failed to load, reason: %s\n", rsn);
817*4882a593Smuzhiyun return ret;
818*4882a593Smuzhiyun }
819*4882a593Smuzhiyun
moxa_init_board(struct moxa_board_conf * brd,struct device * dev)820*4882a593Smuzhiyun static int moxa_init_board(struct moxa_board_conf *brd, struct device *dev)
821*4882a593Smuzhiyun {
822*4882a593Smuzhiyun const struct firmware *fw;
823*4882a593Smuzhiyun const char *file;
824*4882a593Smuzhiyun struct moxa_port *p;
825*4882a593Smuzhiyun unsigned int i, first_idx;
826*4882a593Smuzhiyun int ret;
827*4882a593Smuzhiyun
828*4882a593Smuzhiyun brd->ports = kcalloc(MAX_PORTS_PER_BOARD, sizeof(*brd->ports),
829*4882a593Smuzhiyun GFP_KERNEL);
830*4882a593Smuzhiyun if (brd->ports == NULL) {
831*4882a593Smuzhiyun printk(KERN_ERR "cannot allocate memory for ports\n");
832*4882a593Smuzhiyun ret = -ENOMEM;
833*4882a593Smuzhiyun goto err;
834*4882a593Smuzhiyun }
835*4882a593Smuzhiyun
836*4882a593Smuzhiyun for (i = 0, p = brd->ports; i < MAX_PORTS_PER_BOARD; i++, p++) {
837*4882a593Smuzhiyun tty_port_init(&p->port);
838*4882a593Smuzhiyun p->port.ops = &moxa_port_ops;
839*4882a593Smuzhiyun p->type = PORT_16550A;
840*4882a593Smuzhiyun p->cflag = B9600 | CS8 | CREAD | CLOCAL | HUPCL;
841*4882a593Smuzhiyun }
842*4882a593Smuzhiyun
843*4882a593Smuzhiyun switch (brd->boardType) {
844*4882a593Smuzhiyun case MOXA_BOARD_C218_ISA:
845*4882a593Smuzhiyun case MOXA_BOARD_C218_PCI:
846*4882a593Smuzhiyun file = "c218tunx.cod";
847*4882a593Smuzhiyun break;
848*4882a593Smuzhiyun case MOXA_BOARD_CP204J:
849*4882a593Smuzhiyun file = "cp204unx.cod";
850*4882a593Smuzhiyun break;
851*4882a593Smuzhiyun default:
852*4882a593Smuzhiyun file = "c320tunx.cod";
853*4882a593Smuzhiyun break;
854*4882a593Smuzhiyun }
855*4882a593Smuzhiyun
856*4882a593Smuzhiyun ret = request_firmware(&fw, file, dev);
857*4882a593Smuzhiyun if (ret) {
858*4882a593Smuzhiyun printk(KERN_ERR "MOXA: request_firmware failed. Make sure "
859*4882a593Smuzhiyun "you've placed '%s' file into your firmware "
860*4882a593Smuzhiyun "loader directory (e.g. /lib/firmware)\n",
861*4882a593Smuzhiyun file);
862*4882a593Smuzhiyun goto err_free;
863*4882a593Smuzhiyun }
864*4882a593Smuzhiyun
865*4882a593Smuzhiyun ret = moxa_load_fw(brd, fw);
866*4882a593Smuzhiyun
867*4882a593Smuzhiyun release_firmware(fw);
868*4882a593Smuzhiyun
869*4882a593Smuzhiyun if (ret)
870*4882a593Smuzhiyun goto err_free;
871*4882a593Smuzhiyun
872*4882a593Smuzhiyun spin_lock_bh(&moxa_lock);
873*4882a593Smuzhiyun brd->ready = 1;
874*4882a593Smuzhiyun if (!timer_pending(&moxaTimer))
875*4882a593Smuzhiyun mod_timer(&moxaTimer, jiffies + HZ / 50);
876*4882a593Smuzhiyun spin_unlock_bh(&moxa_lock);
877*4882a593Smuzhiyun
878*4882a593Smuzhiyun first_idx = (brd - moxa_boards) * MAX_PORTS_PER_BOARD;
879*4882a593Smuzhiyun for (i = 0; i < brd->numPorts; i++)
880*4882a593Smuzhiyun tty_port_register_device(&brd->ports[i].port, moxaDriver,
881*4882a593Smuzhiyun first_idx + i, dev);
882*4882a593Smuzhiyun
883*4882a593Smuzhiyun return 0;
884*4882a593Smuzhiyun err_free:
885*4882a593Smuzhiyun for (i = 0; i < MAX_PORTS_PER_BOARD; i++)
886*4882a593Smuzhiyun tty_port_destroy(&brd->ports[i].port);
887*4882a593Smuzhiyun kfree(brd->ports);
888*4882a593Smuzhiyun err:
889*4882a593Smuzhiyun return ret;
890*4882a593Smuzhiyun }
891*4882a593Smuzhiyun
moxa_board_deinit(struct moxa_board_conf * brd)892*4882a593Smuzhiyun static void moxa_board_deinit(struct moxa_board_conf *brd)
893*4882a593Smuzhiyun {
894*4882a593Smuzhiyun unsigned int a, opened, first_idx;
895*4882a593Smuzhiyun
896*4882a593Smuzhiyun mutex_lock(&moxa_openlock);
897*4882a593Smuzhiyun spin_lock_bh(&moxa_lock);
898*4882a593Smuzhiyun brd->ready = 0;
899*4882a593Smuzhiyun spin_unlock_bh(&moxa_lock);
900*4882a593Smuzhiyun
901*4882a593Smuzhiyun /* pci hot-un-plug support */
902*4882a593Smuzhiyun for (a = 0; a < brd->numPorts; a++)
903*4882a593Smuzhiyun if (tty_port_initialized(&brd->ports[a].port))
904*4882a593Smuzhiyun tty_port_tty_hangup(&brd->ports[a].port, false);
905*4882a593Smuzhiyun
906*4882a593Smuzhiyun for (a = 0; a < MAX_PORTS_PER_BOARD; a++)
907*4882a593Smuzhiyun tty_port_destroy(&brd->ports[a].port);
908*4882a593Smuzhiyun
909*4882a593Smuzhiyun while (1) {
910*4882a593Smuzhiyun opened = 0;
911*4882a593Smuzhiyun for (a = 0; a < brd->numPorts; a++)
912*4882a593Smuzhiyun if (tty_port_initialized(&brd->ports[a].port))
913*4882a593Smuzhiyun opened++;
914*4882a593Smuzhiyun mutex_unlock(&moxa_openlock);
915*4882a593Smuzhiyun if (!opened)
916*4882a593Smuzhiyun break;
917*4882a593Smuzhiyun msleep(50);
918*4882a593Smuzhiyun mutex_lock(&moxa_openlock);
919*4882a593Smuzhiyun }
920*4882a593Smuzhiyun
921*4882a593Smuzhiyun first_idx = (brd - moxa_boards) * MAX_PORTS_PER_BOARD;
922*4882a593Smuzhiyun for (a = 0; a < brd->numPorts; a++)
923*4882a593Smuzhiyun tty_unregister_device(moxaDriver, first_idx + a);
924*4882a593Smuzhiyun
925*4882a593Smuzhiyun iounmap(brd->basemem);
926*4882a593Smuzhiyun brd->basemem = NULL;
927*4882a593Smuzhiyun kfree(brd->ports);
928*4882a593Smuzhiyun }
929*4882a593Smuzhiyun
930*4882a593Smuzhiyun #ifdef CONFIG_PCI
moxa_pci_probe(struct pci_dev * pdev,const struct pci_device_id * ent)931*4882a593Smuzhiyun static int moxa_pci_probe(struct pci_dev *pdev,
932*4882a593Smuzhiyun const struct pci_device_id *ent)
933*4882a593Smuzhiyun {
934*4882a593Smuzhiyun struct moxa_board_conf *board;
935*4882a593Smuzhiyun unsigned int i;
936*4882a593Smuzhiyun int board_type = ent->driver_data;
937*4882a593Smuzhiyun int retval;
938*4882a593Smuzhiyun
939*4882a593Smuzhiyun retval = pci_enable_device(pdev);
940*4882a593Smuzhiyun if (retval) {
941*4882a593Smuzhiyun dev_err(&pdev->dev, "can't enable pci device\n");
942*4882a593Smuzhiyun goto err;
943*4882a593Smuzhiyun }
944*4882a593Smuzhiyun
945*4882a593Smuzhiyun for (i = 0; i < MAX_BOARDS; i++)
946*4882a593Smuzhiyun if (moxa_boards[i].basemem == NULL)
947*4882a593Smuzhiyun break;
948*4882a593Smuzhiyun
949*4882a593Smuzhiyun retval = -ENODEV;
950*4882a593Smuzhiyun if (i >= MAX_BOARDS) {
951*4882a593Smuzhiyun dev_warn(&pdev->dev, "more than %u MOXA Intellio family boards "
952*4882a593Smuzhiyun "found. Board is ignored.\n", MAX_BOARDS);
953*4882a593Smuzhiyun goto err;
954*4882a593Smuzhiyun }
955*4882a593Smuzhiyun
956*4882a593Smuzhiyun board = &moxa_boards[i];
957*4882a593Smuzhiyun
958*4882a593Smuzhiyun retval = pci_request_region(pdev, 2, "moxa-base");
959*4882a593Smuzhiyun if (retval) {
960*4882a593Smuzhiyun dev_err(&pdev->dev, "can't request pci region 2\n");
961*4882a593Smuzhiyun goto err;
962*4882a593Smuzhiyun }
963*4882a593Smuzhiyun
964*4882a593Smuzhiyun board->basemem = ioremap(pci_resource_start(pdev, 2), 0x4000);
965*4882a593Smuzhiyun if (board->basemem == NULL) {
966*4882a593Smuzhiyun dev_err(&pdev->dev, "can't remap io space 2\n");
967*4882a593Smuzhiyun retval = -ENOMEM;
968*4882a593Smuzhiyun goto err_reg;
969*4882a593Smuzhiyun }
970*4882a593Smuzhiyun
971*4882a593Smuzhiyun board->boardType = board_type;
972*4882a593Smuzhiyun switch (board_type) {
973*4882a593Smuzhiyun case MOXA_BOARD_C218_ISA:
974*4882a593Smuzhiyun case MOXA_BOARD_C218_PCI:
975*4882a593Smuzhiyun board->numPorts = 8;
976*4882a593Smuzhiyun break;
977*4882a593Smuzhiyun
978*4882a593Smuzhiyun case MOXA_BOARD_CP204J:
979*4882a593Smuzhiyun board->numPorts = 4;
980*4882a593Smuzhiyun break;
981*4882a593Smuzhiyun default:
982*4882a593Smuzhiyun board->numPorts = 0;
983*4882a593Smuzhiyun break;
984*4882a593Smuzhiyun }
985*4882a593Smuzhiyun board->busType = MOXA_BUS_TYPE_PCI;
986*4882a593Smuzhiyun
987*4882a593Smuzhiyun retval = moxa_init_board(board, &pdev->dev);
988*4882a593Smuzhiyun if (retval)
989*4882a593Smuzhiyun goto err_base;
990*4882a593Smuzhiyun
991*4882a593Smuzhiyun pci_set_drvdata(pdev, board);
992*4882a593Smuzhiyun
993*4882a593Smuzhiyun dev_info(&pdev->dev, "board '%s' ready (%u ports, firmware loaded)\n",
994*4882a593Smuzhiyun moxa_brdname[board_type - 1], board->numPorts);
995*4882a593Smuzhiyun
996*4882a593Smuzhiyun return 0;
997*4882a593Smuzhiyun err_base:
998*4882a593Smuzhiyun iounmap(board->basemem);
999*4882a593Smuzhiyun board->basemem = NULL;
1000*4882a593Smuzhiyun err_reg:
1001*4882a593Smuzhiyun pci_release_region(pdev, 2);
1002*4882a593Smuzhiyun err:
1003*4882a593Smuzhiyun return retval;
1004*4882a593Smuzhiyun }
1005*4882a593Smuzhiyun
moxa_pci_remove(struct pci_dev * pdev)1006*4882a593Smuzhiyun static void moxa_pci_remove(struct pci_dev *pdev)
1007*4882a593Smuzhiyun {
1008*4882a593Smuzhiyun struct moxa_board_conf *brd = pci_get_drvdata(pdev);
1009*4882a593Smuzhiyun
1010*4882a593Smuzhiyun moxa_board_deinit(brd);
1011*4882a593Smuzhiyun
1012*4882a593Smuzhiyun pci_release_region(pdev, 2);
1013*4882a593Smuzhiyun }
1014*4882a593Smuzhiyun
1015*4882a593Smuzhiyun static struct pci_driver moxa_pci_driver = {
1016*4882a593Smuzhiyun .name = "moxa",
1017*4882a593Smuzhiyun .id_table = moxa_pcibrds,
1018*4882a593Smuzhiyun .probe = moxa_pci_probe,
1019*4882a593Smuzhiyun .remove = moxa_pci_remove
1020*4882a593Smuzhiyun };
1021*4882a593Smuzhiyun #endif /* CONFIG_PCI */
1022*4882a593Smuzhiyun
moxa_init(void)1023*4882a593Smuzhiyun static int __init moxa_init(void)
1024*4882a593Smuzhiyun {
1025*4882a593Smuzhiyun unsigned int isabrds = 0;
1026*4882a593Smuzhiyun int retval = 0;
1027*4882a593Smuzhiyun struct moxa_board_conf *brd = moxa_boards;
1028*4882a593Smuzhiyun unsigned int i;
1029*4882a593Smuzhiyun
1030*4882a593Smuzhiyun printk(KERN_INFO "MOXA Intellio family driver version %s\n",
1031*4882a593Smuzhiyun MOXA_VERSION);
1032*4882a593Smuzhiyun
1033*4882a593Smuzhiyun tty_port_init(&moxa_service_port);
1034*4882a593Smuzhiyun
1035*4882a593Smuzhiyun moxaDriver = tty_alloc_driver(MAX_PORTS + 1,
1036*4882a593Smuzhiyun TTY_DRIVER_REAL_RAW |
1037*4882a593Smuzhiyun TTY_DRIVER_DYNAMIC_DEV);
1038*4882a593Smuzhiyun if (IS_ERR(moxaDriver))
1039*4882a593Smuzhiyun return PTR_ERR(moxaDriver);
1040*4882a593Smuzhiyun
1041*4882a593Smuzhiyun moxaDriver->name = "ttyMX";
1042*4882a593Smuzhiyun moxaDriver->major = ttymajor;
1043*4882a593Smuzhiyun moxaDriver->minor_start = 0;
1044*4882a593Smuzhiyun moxaDriver->type = TTY_DRIVER_TYPE_SERIAL;
1045*4882a593Smuzhiyun moxaDriver->subtype = SERIAL_TYPE_NORMAL;
1046*4882a593Smuzhiyun moxaDriver->init_termios = tty_std_termios;
1047*4882a593Smuzhiyun moxaDriver->init_termios.c_cflag = B9600 | CS8 | CREAD | CLOCAL | HUPCL;
1048*4882a593Smuzhiyun moxaDriver->init_termios.c_ispeed = 9600;
1049*4882a593Smuzhiyun moxaDriver->init_termios.c_ospeed = 9600;
1050*4882a593Smuzhiyun tty_set_operations(moxaDriver, &moxa_ops);
1051*4882a593Smuzhiyun /* Having one more port only for ioctls is ugly */
1052*4882a593Smuzhiyun tty_port_link_device(&moxa_service_port, moxaDriver, MAX_PORTS);
1053*4882a593Smuzhiyun
1054*4882a593Smuzhiyun if (tty_register_driver(moxaDriver)) {
1055*4882a593Smuzhiyun printk(KERN_ERR "can't register MOXA Smartio tty driver!\n");
1056*4882a593Smuzhiyun put_tty_driver(moxaDriver);
1057*4882a593Smuzhiyun return -1;
1058*4882a593Smuzhiyun }
1059*4882a593Smuzhiyun
1060*4882a593Smuzhiyun /* Find the boards defined from module args. */
1061*4882a593Smuzhiyun
1062*4882a593Smuzhiyun for (i = 0; i < MAX_BOARDS; i++) {
1063*4882a593Smuzhiyun if (!baseaddr[i])
1064*4882a593Smuzhiyun break;
1065*4882a593Smuzhiyun if (type[i] == MOXA_BOARD_C218_ISA ||
1066*4882a593Smuzhiyun type[i] == MOXA_BOARD_C320_ISA) {
1067*4882a593Smuzhiyun pr_debug("Moxa board %2d: %s board(baseAddr=%lx)\n",
1068*4882a593Smuzhiyun isabrds + 1, moxa_brdname[type[i] - 1],
1069*4882a593Smuzhiyun baseaddr[i]);
1070*4882a593Smuzhiyun brd->boardType = type[i];
1071*4882a593Smuzhiyun brd->numPorts = type[i] == MOXA_BOARD_C218_ISA ? 8 :
1072*4882a593Smuzhiyun numports[i];
1073*4882a593Smuzhiyun brd->busType = MOXA_BUS_TYPE_ISA;
1074*4882a593Smuzhiyun brd->basemem = ioremap(baseaddr[i], 0x4000);
1075*4882a593Smuzhiyun if (!brd->basemem) {
1076*4882a593Smuzhiyun printk(KERN_ERR "MOXA: can't remap %lx\n",
1077*4882a593Smuzhiyun baseaddr[i]);
1078*4882a593Smuzhiyun continue;
1079*4882a593Smuzhiyun }
1080*4882a593Smuzhiyun if (moxa_init_board(brd, NULL)) {
1081*4882a593Smuzhiyun iounmap(brd->basemem);
1082*4882a593Smuzhiyun brd->basemem = NULL;
1083*4882a593Smuzhiyun continue;
1084*4882a593Smuzhiyun }
1085*4882a593Smuzhiyun
1086*4882a593Smuzhiyun printk(KERN_INFO "MOXA isa board found at 0x%.8lx and "
1087*4882a593Smuzhiyun "ready (%u ports, firmware loaded)\n",
1088*4882a593Smuzhiyun baseaddr[i], brd->numPorts);
1089*4882a593Smuzhiyun
1090*4882a593Smuzhiyun brd++;
1091*4882a593Smuzhiyun isabrds++;
1092*4882a593Smuzhiyun }
1093*4882a593Smuzhiyun }
1094*4882a593Smuzhiyun
1095*4882a593Smuzhiyun #ifdef CONFIG_PCI
1096*4882a593Smuzhiyun retval = pci_register_driver(&moxa_pci_driver);
1097*4882a593Smuzhiyun if (retval) {
1098*4882a593Smuzhiyun printk(KERN_ERR "Can't register MOXA pci driver!\n");
1099*4882a593Smuzhiyun if (isabrds)
1100*4882a593Smuzhiyun retval = 0;
1101*4882a593Smuzhiyun }
1102*4882a593Smuzhiyun #endif
1103*4882a593Smuzhiyun
1104*4882a593Smuzhiyun return retval;
1105*4882a593Smuzhiyun }
1106*4882a593Smuzhiyun
moxa_exit(void)1107*4882a593Smuzhiyun static void __exit moxa_exit(void)
1108*4882a593Smuzhiyun {
1109*4882a593Smuzhiyun unsigned int i;
1110*4882a593Smuzhiyun
1111*4882a593Smuzhiyun #ifdef CONFIG_PCI
1112*4882a593Smuzhiyun pci_unregister_driver(&moxa_pci_driver);
1113*4882a593Smuzhiyun #endif
1114*4882a593Smuzhiyun
1115*4882a593Smuzhiyun for (i = 0; i < MAX_BOARDS; i++) /* ISA boards */
1116*4882a593Smuzhiyun if (moxa_boards[i].ready)
1117*4882a593Smuzhiyun moxa_board_deinit(&moxa_boards[i]);
1118*4882a593Smuzhiyun
1119*4882a593Smuzhiyun del_timer_sync(&moxaTimer);
1120*4882a593Smuzhiyun
1121*4882a593Smuzhiyun if (tty_unregister_driver(moxaDriver))
1122*4882a593Smuzhiyun printk(KERN_ERR "Couldn't unregister MOXA Intellio family "
1123*4882a593Smuzhiyun "serial driver\n");
1124*4882a593Smuzhiyun put_tty_driver(moxaDriver);
1125*4882a593Smuzhiyun }
1126*4882a593Smuzhiyun
1127*4882a593Smuzhiyun module_init(moxa_init);
1128*4882a593Smuzhiyun module_exit(moxa_exit);
1129*4882a593Smuzhiyun
moxa_shutdown(struct tty_port * port)1130*4882a593Smuzhiyun static void moxa_shutdown(struct tty_port *port)
1131*4882a593Smuzhiyun {
1132*4882a593Smuzhiyun struct moxa_port *ch = container_of(port, struct moxa_port, port);
1133*4882a593Smuzhiyun MoxaPortDisable(ch);
1134*4882a593Smuzhiyun MoxaPortFlushData(ch, 2);
1135*4882a593Smuzhiyun }
1136*4882a593Smuzhiyun
moxa_carrier_raised(struct tty_port * port)1137*4882a593Smuzhiyun static int moxa_carrier_raised(struct tty_port *port)
1138*4882a593Smuzhiyun {
1139*4882a593Smuzhiyun struct moxa_port *ch = container_of(port, struct moxa_port, port);
1140*4882a593Smuzhiyun int dcd;
1141*4882a593Smuzhiyun
1142*4882a593Smuzhiyun spin_lock_irq(&port->lock);
1143*4882a593Smuzhiyun dcd = ch->DCDState;
1144*4882a593Smuzhiyun spin_unlock_irq(&port->lock);
1145*4882a593Smuzhiyun return dcd;
1146*4882a593Smuzhiyun }
1147*4882a593Smuzhiyun
moxa_dtr_rts(struct tty_port * port,int onoff)1148*4882a593Smuzhiyun static void moxa_dtr_rts(struct tty_port *port, int onoff)
1149*4882a593Smuzhiyun {
1150*4882a593Smuzhiyun struct moxa_port *ch = container_of(port, struct moxa_port, port);
1151*4882a593Smuzhiyun MoxaPortLineCtrl(ch, onoff, onoff);
1152*4882a593Smuzhiyun }
1153*4882a593Smuzhiyun
1154*4882a593Smuzhiyun
moxa_open(struct tty_struct * tty,struct file * filp)1155*4882a593Smuzhiyun static int moxa_open(struct tty_struct *tty, struct file *filp)
1156*4882a593Smuzhiyun {
1157*4882a593Smuzhiyun struct moxa_board_conf *brd;
1158*4882a593Smuzhiyun struct moxa_port *ch;
1159*4882a593Smuzhiyun int port;
1160*4882a593Smuzhiyun
1161*4882a593Smuzhiyun port = tty->index;
1162*4882a593Smuzhiyun if (port == MAX_PORTS) {
1163*4882a593Smuzhiyun return capable(CAP_SYS_ADMIN) ? 0 : -EPERM;
1164*4882a593Smuzhiyun }
1165*4882a593Smuzhiyun if (mutex_lock_interruptible(&moxa_openlock))
1166*4882a593Smuzhiyun return -ERESTARTSYS;
1167*4882a593Smuzhiyun brd = &moxa_boards[port / MAX_PORTS_PER_BOARD];
1168*4882a593Smuzhiyun if (!brd->ready) {
1169*4882a593Smuzhiyun mutex_unlock(&moxa_openlock);
1170*4882a593Smuzhiyun return -ENODEV;
1171*4882a593Smuzhiyun }
1172*4882a593Smuzhiyun
1173*4882a593Smuzhiyun if (port % MAX_PORTS_PER_BOARD >= brd->numPorts) {
1174*4882a593Smuzhiyun mutex_unlock(&moxa_openlock);
1175*4882a593Smuzhiyun return -ENODEV;
1176*4882a593Smuzhiyun }
1177*4882a593Smuzhiyun
1178*4882a593Smuzhiyun ch = &brd->ports[port % MAX_PORTS_PER_BOARD];
1179*4882a593Smuzhiyun ch->port.count++;
1180*4882a593Smuzhiyun tty->driver_data = ch;
1181*4882a593Smuzhiyun tty_port_tty_set(&ch->port, tty);
1182*4882a593Smuzhiyun mutex_lock(&ch->port.mutex);
1183*4882a593Smuzhiyun if (!tty_port_initialized(&ch->port)) {
1184*4882a593Smuzhiyun ch->statusflags = 0;
1185*4882a593Smuzhiyun moxa_set_tty_param(tty, &tty->termios);
1186*4882a593Smuzhiyun MoxaPortLineCtrl(ch, 1, 1);
1187*4882a593Smuzhiyun MoxaPortEnable(ch);
1188*4882a593Smuzhiyun MoxaSetFifo(ch, ch->type == PORT_16550A);
1189*4882a593Smuzhiyun tty_port_set_initialized(&ch->port, 1);
1190*4882a593Smuzhiyun }
1191*4882a593Smuzhiyun mutex_unlock(&ch->port.mutex);
1192*4882a593Smuzhiyun mutex_unlock(&moxa_openlock);
1193*4882a593Smuzhiyun
1194*4882a593Smuzhiyun return tty_port_block_til_ready(&ch->port, tty, filp);
1195*4882a593Smuzhiyun }
1196*4882a593Smuzhiyun
moxa_close(struct tty_struct * tty,struct file * filp)1197*4882a593Smuzhiyun static void moxa_close(struct tty_struct *tty, struct file *filp)
1198*4882a593Smuzhiyun {
1199*4882a593Smuzhiyun struct moxa_port *ch = tty->driver_data;
1200*4882a593Smuzhiyun ch->cflag = tty->termios.c_cflag;
1201*4882a593Smuzhiyun tty_port_close(&ch->port, tty, filp);
1202*4882a593Smuzhiyun }
1203*4882a593Smuzhiyun
moxa_write(struct tty_struct * tty,const unsigned char * buf,int count)1204*4882a593Smuzhiyun static int moxa_write(struct tty_struct *tty,
1205*4882a593Smuzhiyun const unsigned char *buf, int count)
1206*4882a593Smuzhiyun {
1207*4882a593Smuzhiyun struct moxa_port *ch = tty->driver_data;
1208*4882a593Smuzhiyun unsigned long flags;
1209*4882a593Smuzhiyun int len;
1210*4882a593Smuzhiyun
1211*4882a593Smuzhiyun if (ch == NULL)
1212*4882a593Smuzhiyun return 0;
1213*4882a593Smuzhiyun
1214*4882a593Smuzhiyun spin_lock_irqsave(&moxa_lock, flags);
1215*4882a593Smuzhiyun len = MoxaPortWriteData(tty, buf, count);
1216*4882a593Smuzhiyun spin_unlock_irqrestore(&moxa_lock, flags);
1217*4882a593Smuzhiyun
1218*4882a593Smuzhiyun set_bit(LOWWAIT, &ch->statusflags);
1219*4882a593Smuzhiyun return len;
1220*4882a593Smuzhiyun }
1221*4882a593Smuzhiyun
moxa_write_room(struct tty_struct * tty)1222*4882a593Smuzhiyun static int moxa_write_room(struct tty_struct *tty)
1223*4882a593Smuzhiyun {
1224*4882a593Smuzhiyun struct moxa_port *ch;
1225*4882a593Smuzhiyun
1226*4882a593Smuzhiyun if (tty->stopped)
1227*4882a593Smuzhiyun return 0;
1228*4882a593Smuzhiyun ch = tty->driver_data;
1229*4882a593Smuzhiyun if (ch == NULL)
1230*4882a593Smuzhiyun return 0;
1231*4882a593Smuzhiyun return MoxaPortTxFree(ch);
1232*4882a593Smuzhiyun }
1233*4882a593Smuzhiyun
moxa_flush_buffer(struct tty_struct * tty)1234*4882a593Smuzhiyun static void moxa_flush_buffer(struct tty_struct *tty)
1235*4882a593Smuzhiyun {
1236*4882a593Smuzhiyun struct moxa_port *ch = tty->driver_data;
1237*4882a593Smuzhiyun
1238*4882a593Smuzhiyun if (ch == NULL)
1239*4882a593Smuzhiyun return;
1240*4882a593Smuzhiyun MoxaPortFlushData(ch, 1);
1241*4882a593Smuzhiyun tty_wakeup(tty);
1242*4882a593Smuzhiyun }
1243*4882a593Smuzhiyun
moxa_chars_in_buffer(struct tty_struct * tty)1244*4882a593Smuzhiyun static int moxa_chars_in_buffer(struct tty_struct *tty)
1245*4882a593Smuzhiyun {
1246*4882a593Smuzhiyun struct moxa_port *ch = tty->driver_data;
1247*4882a593Smuzhiyun int chars;
1248*4882a593Smuzhiyun
1249*4882a593Smuzhiyun chars = MoxaPortTxQueue(ch);
1250*4882a593Smuzhiyun if (chars)
1251*4882a593Smuzhiyun /*
1252*4882a593Smuzhiyun * Make it possible to wakeup anything waiting for output
1253*4882a593Smuzhiyun * in tty_ioctl.c, etc.
1254*4882a593Smuzhiyun */
1255*4882a593Smuzhiyun set_bit(EMPTYWAIT, &ch->statusflags);
1256*4882a593Smuzhiyun return chars;
1257*4882a593Smuzhiyun }
1258*4882a593Smuzhiyun
moxa_tiocmget(struct tty_struct * tty)1259*4882a593Smuzhiyun static int moxa_tiocmget(struct tty_struct *tty)
1260*4882a593Smuzhiyun {
1261*4882a593Smuzhiyun struct moxa_port *ch = tty->driver_data;
1262*4882a593Smuzhiyun int flag = 0, dtr, rts;
1263*4882a593Smuzhiyun
1264*4882a593Smuzhiyun MoxaPortGetLineOut(ch, &dtr, &rts);
1265*4882a593Smuzhiyun if (dtr)
1266*4882a593Smuzhiyun flag |= TIOCM_DTR;
1267*4882a593Smuzhiyun if (rts)
1268*4882a593Smuzhiyun flag |= TIOCM_RTS;
1269*4882a593Smuzhiyun dtr = MoxaPortLineStatus(ch);
1270*4882a593Smuzhiyun if (dtr & 1)
1271*4882a593Smuzhiyun flag |= TIOCM_CTS;
1272*4882a593Smuzhiyun if (dtr & 2)
1273*4882a593Smuzhiyun flag |= TIOCM_DSR;
1274*4882a593Smuzhiyun if (dtr & 4)
1275*4882a593Smuzhiyun flag |= TIOCM_CD;
1276*4882a593Smuzhiyun return flag;
1277*4882a593Smuzhiyun }
1278*4882a593Smuzhiyun
moxa_tiocmset(struct tty_struct * tty,unsigned int set,unsigned int clear)1279*4882a593Smuzhiyun static int moxa_tiocmset(struct tty_struct *tty,
1280*4882a593Smuzhiyun unsigned int set, unsigned int clear)
1281*4882a593Smuzhiyun {
1282*4882a593Smuzhiyun struct moxa_port *ch;
1283*4882a593Smuzhiyun int dtr, rts;
1284*4882a593Smuzhiyun
1285*4882a593Smuzhiyun mutex_lock(&moxa_openlock);
1286*4882a593Smuzhiyun ch = tty->driver_data;
1287*4882a593Smuzhiyun if (!ch) {
1288*4882a593Smuzhiyun mutex_unlock(&moxa_openlock);
1289*4882a593Smuzhiyun return -EINVAL;
1290*4882a593Smuzhiyun }
1291*4882a593Smuzhiyun
1292*4882a593Smuzhiyun MoxaPortGetLineOut(ch, &dtr, &rts);
1293*4882a593Smuzhiyun if (set & TIOCM_RTS)
1294*4882a593Smuzhiyun rts = 1;
1295*4882a593Smuzhiyun if (set & TIOCM_DTR)
1296*4882a593Smuzhiyun dtr = 1;
1297*4882a593Smuzhiyun if (clear & TIOCM_RTS)
1298*4882a593Smuzhiyun rts = 0;
1299*4882a593Smuzhiyun if (clear & TIOCM_DTR)
1300*4882a593Smuzhiyun dtr = 0;
1301*4882a593Smuzhiyun MoxaPortLineCtrl(ch, dtr, rts);
1302*4882a593Smuzhiyun mutex_unlock(&moxa_openlock);
1303*4882a593Smuzhiyun return 0;
1304*4882a593Smuzhiyun }
1305*4882a593Smuzhiyun
moxa_set_termios(struct tty_struct * tty,struct ktermios * old_termios)1306*4882a593Smuzhiyun static void moxa_set_termios(struct tty_struct *tty,
1307*4882a593Smuzhiyun struct ktermios *old_termios)
1308*4882a593Smuzhiyun {
1309*4882a593Smuzhiyun struct moxa_port *ch = tty->driver_data;
1310*4882a593Smuzhiyun
1311*4882a593Smuzhiyun if (ch == NULL)
1312*4882a593Smuzhiyun return;
1313*4882a593Smuzhiyun moxa_set_tty_param(tty, old_termios);
1314*4882a593Smuzhiyun if (!(old_termios->c_cflag & CLOCAL) && C_CLOCAL(tty))
1315*4882a593Smuzhiyun wake_up_interruptible(&ch->port.open_wait);
1316*4882a593Smuzhiyun }
1317*4882a593Smuzhiyun
moxa_stop(struct tty_struct * tty)1318*4882a593Smuzhiyun static void moxa_stop(struct tty_struct *tty)
1319*4882a593Smuzhiyun {
1320*4882a593Smuzhiyun struct moxa_port *ch = tty->driver_data;
1321*4882a593Smuzhiyun
1322*4882a593Smuzhiyun if (ch == NULL)
1323*4882a593Smuzhiyun return;
1324*4882a593Smuzhiyun MoxaPortTxDisable(ch);
1325*4882a593Smuzhiyun set_bit(TXSTOPPED, &ch->statusflags);
1326*4882a593Smuzhiyun }
1327*4882a593Smuzhiyun
1328*4882a593Smuzhiyun
moxa_start(struct tty_struct * tty)1329*4882a593Smuzhiyun static void moxa_start(struct tty_struct *tty)
1330*4882a593Smuzhiyun {
1331*4882a593Smuzhiyun struct moxa_port *ch = tty->driver_data;
1332*4882a593Smuzhiyun
1333*4882a593Smuzhiyun if (ch == NULL)
1334*4882a593Smuzhiyun return;
1335*4882a593Smuzhiyun
1336*4882a593Smuzhiyun if (!test_bit(TXSTOPPED, &ch->statusflags))
1337*4882a593Smuzhiyun return;
1338*4882a593Smuzhiyun
1339*4882a593Smuzhiyun MoxaPortTxEnable(ch);
1340*4882a593Smuzhiyun clear_bit(TXSTOPPED, &ch->statusflags);
1341*4882a593Smuzhiyun }
1342*4882a593Smuzhiyun
moxa_hangup(struct tty_struct * tty)1343*4882a593Smuzhiyun static void moxa_hangup(struct tty_struct *tty)
1344*4882a593Smuzhiyun {
1345*4882a593Smuzhiyun struct moxa_port *ch = tty->driver_data;
1346*4882a593Smuzhiyun tty_port_hangup(&ch->port);
1347*4882a593Smuzhiyun }
1348*4882a593Smuzhiyun
moxa_new_dcdstate(struct moxa_port * p,u8 dcd)1349*4882a593Smuzhiyun static void moxa_new_dcdstate(struct moxa_port *p, u8 dcd)
1350*4882a593Smuzhiyun {
1351*4882a593Smuzhiyun unsigned long flags;
1352*4882a593Smuzhiyun dcd = !!dcd;
1353*4882a593Smuzhiyun
1354*4882a593Smuzhiyun spin_lock_irqsave(&p->port.lock, flags);
1355*4882a593Smuzhiyun if (dcd != p->DCDState) {
1356*4882a593Smuzhiyun p->DCDState = dcd;
1357*4882a593Smuzhiyun spin_unlock_irqrestore(&p->port.lock, flags);
1358*4882a593Smuzhiyun if (!dcd)
1359*4882a593Smuzhiyun tty_port_tty_hangup(&p->port, true);
1360*4882a593Smuzhiyun }
1361*4882a593Smuzhiyun else
1362*4882a593Smuzhiyun spin_unlock_irqrestore(&p->port.lock, flags);
1363*4882a593Smuzhiyun }
1364*4882a593Smuzhiyun
moxa_poll_port(struct moxa_port * p,unsigned int handle,u16 __iomem * ip)1365*4882a593Smuzhiyun static int moxa_poll_port(struct moxa_port *p, unsigned int handle,
1366*4882a593Smuzhiyun u16 __iomem *ip)
1367*4882a593Smuzhiyun {
1368*4882a593Smuzhiyun struct tty_struct *tty = tty_port_tty_get(&p->port);
1369*4882a593Smuzhiyun void __iomem *ofsAddr;
1370*4882a593Smuzhiyun unsigned int inited = tty_port_initialized(&p->port);
1371*4882a593Smuzhiyun u16 intr;
1372*4882a593Smuzhiyun
1373*4882a593Smuzhiyun if (tty) {
1374*4882a593Smuzhiyun if (test_bit(EMPTYWAIT, &p->statusflags) &&
1375*4882a593Smuzhiyun MoxaPortTxQueue(p) == 0) {
1376*4882a593Smuzhiyun clear_bit(EMPTYWAIT, &p->statusflags);
1377*4882a593Smuzhiyun tty_wakeup(tty);
1378*4882a593Smuzhiyun }
1379*4882a593Smuzhiyun if (test_bit(LOWWAIT, &p->statusflags) && !tty->stopped &&
1380*4882a593Smuzhiyun MoxaPortTxQueue(p) <= WAKEUP_CHARS) {
1381*4882a593Smuzhiyun clear_bit(LOWWAIT, &p->statusflags);
1382*4882a593Smuzhiyun tty_wakeup(tty);
1383*4882a593Smuzhiyun }
1384*4882a593Smuzhiyun
1385*4882a593Smuzhiyun if (inited && !tty_throttled(tty) &&
1386*4882a593Smuzhiyun MoxaPortRxQueue(p) > 0) { /* RX */
1387*4882a593Smuzhiyun MoxaPortReadData(p);
1388*4882a593Smuzhiyun tty_flip_buffer_push(&p->port);
1389*4882a593Smuzhiyun }
1390*4882a593Smuzhiyun } else {
1391*4882a593Smuzhiyun clear_bit(EMPTYWAIT, &p->statusflags);
1392*4882a593Smuzhiyun MoxaPortFlushData(p, 0); /* flush RX */
1393*4882a593Smuzhiyun }
1394*4882a593Smuzhiyun
1395*4882a593Smuzhiyun if (!handle) /* nothing else to do */
1396*4882a593Smuzhiyun goto put;
1397*4882a593Smuzhiyun
1398*4882a593Smuzhiyun intr = readw(ip); /* port irq status */
1399*4882a593Smuzhiyun if (intr == 0)
1400*4882a593Smuzhiyun goto put;
1401*4882a593Smuzhiyun
1402*4882a593Smuzhiyun writew(0, ip); /* ACK port */
1403*4882a593Smuzhiyun ofsAddr = p->tableAddr;
1404*4882a593Smuzhiyun if (intr & IntrTx) /* disable tx intr */
1405*4882a593Smuzhiyun writew(readw(ofsAddr + HostStat) & ~WakeupTx,
1406*4882a593Smuzhiyun ofsAddr + HostStat);
1407*4882a593Smuzhiyun
1408*4882a593Smuzhiyun if (!inited)
1409*4882a593Smuzhiyun goto put;
1410*4882a593Smuzhiyun
1411*4882a593Smuzhiyun if (tty && (intr & IntrBreak) && !I_IGNBRK(tty)) { /* BREAK */
1412*4882a593Smuzhiyun tty_insert_flip_char(&p->port, 0, TTY_BREAK);
1413*4882a593Smuzhiyun tty_flip_buffer_push(&p->port);
1414*4882a593Smuzhiyun }
1415*4882a593Smuzhiyun
1416*4882a593Smuzhiyun if (intr & IntrLine)
1417*4882a593Smuzhiyun moxa_new_dcdstate(p, readb(ofsAddr + FlagStat) & DCD_state);
1418*4882a593Smuzhiyun put:
1419*4882a593Smuzhiyun tty_kref_put(tty);
1420*4882a593Smuzhiyun
1421*4882a593Smuzhiyun return 0;
1422*4882a593Smuzhiyun }
1423*4882a593Smuzhiyun
moxa_poll(struct timer_list * unused)1424*4882a593Smuzhiyun static void moxa_poll(struct timer_list *unused)
1425*4882a593Smuzhiyun {
1426*4882a593Smuzhiyun struct moxa_board_conf *brd;
1427*4882a593Smuzhiyun u16 __iomem *ip;
1428*4882a593Smuzhiyun unsigned int card, port, served = 0;
1429*4882a593Smuzhiyun
1430*4882a593Smuzhiyun spin_lock(&moxa_lock);
1431*4882a593Smuzhiyun for (card = 0; card < MAX_BOARDS; card++) {
1432*4882a593Smuzhiyun brd = &moxa_boards[card];
1433*4882a593Smuzhiyun if (!brd->ready)
1434*4882a593Smuzhiyun continue;
1435*4882a593Smuzhiyun
1436*4882a593Smuzhiyun served++;
1437*4882a593Smuzhiyun
1438*4882a593Smuzhiyun ip = NULL;
1439*4882a593Smuzhiyun if (readb(brd->intPend) == 0xff)
1440*4882a593Smuzhiyun ip = brd->intTable + readb(brd->intNdx);
1441*4882a593Smuzhiyun
1442*4882a593Smuzhiyun for (port = 0; port < brd->numPorts; port++)
1443*4882a593Smuzhiyun moxa_poll_port(&brd->ports[port], !!ip, ip + port);
1444*4882a593Smuzhiyun
1445*4882a593Smuzhiyun if (ip)
1446*4882a593Smuzhiyun writeb(0, brd->intPend); /* ACK */
1447*4882a593Smuzhiyun
1448*4882a593Smuzhiyun if (moxaLowWaterChk) {
1449*4882a593Smuzhiyun struct moxa_port *p = brd->ports;
1450*4882a593Smuzhiyun for (port = 0; port < brd->numPorts; port++, p++)
1451*4882a593Smuzhiyun if (p->lowChkFlag) {
1452*4882a593Smuzhiyun p->lowChkFlag = 0;
1453*4882a593Smuzhiyun moxa_low_water_check(p->tableAddr);
1454*4882a593Smuzhiyun }
1455*4882a593Smuzhiyun }
1456*4882a593Smuzhiyun }
1457*4882a593Smuzhiyun moxaLowWaterChk = 0;
1458*4882a593Smuzhiyun
1459*4882a593Smuzhiyun if (served)
1460*4882a593Smuzhiyun mod_timer(&moxaTimer, jiffies + HZ / 50);
1461*4882a593Smuzhiyun spin_unlock(&moxa_lock);
1462*4882a593Smuzhiyun }
1463*4882a593Smuzhiyun
1464*4882a593Smuzhiyun /******************************************************************************/
1465*4882a593Smuzhiyun
moxa_set_tty_param(struct tty_struct * tty,struct ktermios * old_termios)1466*4882a593Smuzhiyun static void moxa_set_tty_param(struct tty_struct *tty, struct ktermios *old_termios)
1467*4882a593Smuzhiyun {
1468*4882a593Smuzhiyun register struct ktermios *ts = &tty->termios;
1469*4882a593Smuzhiyun struct moxa_port *ch = tty->driver_data;
1470*4882a593Smuzhiyun int rts, cts, txflow, rxflow, xany, baud;
1471*4882a593Smuzhiyun
1472*4882a593Smuzhiyun rts = cts = txflow = rxflow = xany = 0;
1473*4882a593Smuzhiyun if (ts->c_cflag & CRTSCTS)
1474*4882a593Smuzhiyun rts = cts = 1;
1475*4882a593Smuzhiyun if (ts->c_iflag & IXON)
1476*4882a593Smuzhiyun txflow = 1;
1477*4882a593Smuzhiyun if (ts->c_iflag & IXOFF)
1478*4882a593Smuzhiyun rxflow = 1;
1479*4882a593Smuzhiyun if (ts->c_iflag & IXANY)
1480*4882a593Smuzhiyun xany = 1;
1481*4882a593Smuzhiyun
1482*4882a593Smuzhiyun MoxaPortFlowCtrl(ch, rts, cts, txflow, rxflow, xany);
1483*4882a593Smuzhiyun baud = MoxaPortSetTermio(ch, ts, tty_get_baud_rate(tty));
1484*4882a593Smuzhiyun if (baud == -1)
1485*4882a593Smuzhiyun baud = tty_termios_baud_rate(old_termios);
1486*4882a593Smuzhiyun /* Not put the baud rate into the termios data */
1487*4882a593Smuzhiyun tty_encode_baud_rate(tty, baud, baud);
1488*4882a593Smuzhiyun }
1489*4882a593Smuzhiyun
1490*4882a593Smuzhiyun /*****************************************************************************
1491*4882a593Smuzhiyun * Driver level functions: *
1492*4882a593Smuzhiyun *****************************************************************************/
1493*4882a593Smuzhiyun
MoxaPortFlushData(struct moxa_port * port,int mode)1494*4882a593Smuzhiyun static void MoxaPortFlushData(struct moxa_port *port, int mode)
1495*4882a593Smuzhiyun {
1496*4882a593Smuzhiyun void __iomem *ofsAddr;
1497*4882a593Smuzhiyun if (mode < 0 || mode > 2)
1498*4882a593Smuzhiyun return;
1499*4882a593Smuzhiyun ofsAddr = port->tableAddr;
1500*4882a593Smuzhiyun moxafunc(ofsAddr, FC_FlushQueue, mode);
1501*4882a593Smuzhiyun if (mode != 1) {
1502*4882a593Smuzhiyun port->lowChkFlag = 0;
1503*4882a593Smuzhiyun moxa_low_water_check(ofsAddr);
1504*4882a593Smuzhiyun }
1505*4882a593Smuzhiyun }
1506*4882a593Smuzhiyun
1507*4882a593Smuzhiyun /*
1508*4882a593Smuzhiyun * Moxa Port Number Description:
1509*4882a593Smuzhiyun *
1510*4882a593Smuzhiyun * MOXA serial driver supports up to 4 MOXA-C218/C320 boards. And,
1511*4882a593Smuzhiyun * the port number using in MOXA driver functions will be 0 to 31 for
1512*4882a593Smuzhiyun * first MOXA board, 32 to 63 for second, 64 to 95 for third and 96
1513*4882a593Smuzhiyun * to 127 for fourth. For example, if you setup three MOXA boards,
1514*4882a593Smuzhiyun * first board is C218, second board is C320-16 and third board is
1515*4882a593Smuzhiyun * C320-32. The port number of first board (C218 - 8 ports) is from
1516*4882a593Smuzhiyun * 0 to 7. The port number of second board (C320 - 16 ports) is form
1517*4882a593Smuzhiyun * 32 to 47. The port number of third board (C320 - 32 ports) is from
1518*4882a593Smuzhiyun * 64 to 95. And those port numbers form 8 to 31, 48 to 63 and 96 to
1519*4882a593Smuzhiyun * 127 will be invalid.
1520*4882a593Smuzhiyun *
1521*4882a593Smuzhiyun *
1522*4882a593Smuzhiyun * Moxa Functions Description:
1523*4882a593Smuzhiyun *
1524*4882a593Smuzhiyun * Function 1: Driver initialization routine, this routine must be
1525*4882a593Smuzhiyun * called when initialized driver.
1526*4882a593Smuzhiyun * Syntax:
1527*4882a593Smuzhiyun * void MoxaDriverInit();
1528*4882a593Smuzhiyun *
1529*4882a593Smuzhiyun *
1530*4882a593Smuzhiyun * Function 2: Moxa driver private IOCTL command processing.
1531*4882a593Smuzhiyun * Syntax:
1532*4882a593Smuzhiyun * int MoxaDriverIoctl(unsigned int cmd, unsigned long arg, int port);
1533*4882a593Smuzhiyun *
1534*4882a593Smuzhiyun * unsigned int cmd : IOCTL command
1535*4882a593Smuzhiyun * unsigned long arg : IOCTL argument
1536*4882a593Smuzhiyun * int port : port number (0 - 127)
1537*4882a593Smuzhiyun *
1538*4882a593Smuzhiyun * return: 0 (OK)
1539*4882a593Smuzhiyun * -EINVAL
1540*4882a593Smuzhiyun * -ENOIOCTLCMD
1541*4882a593Smuzhiyun *
1542*4882a593Smuzhiyun *
1543*4882a593Smuzhiyun * Function 6: Enable this port to start Tx/Rx data.
1544*4882a593Smuzhiyun * Syntax:
1545*4882a593Smuzhiyun * void MoxaPortEnable(int port);
1546*4882a593Smuzhiyun * int port : port number (0 - 127)
1547*4882a593Smuzhiyun *
1548*4882a593Smuzhiyun *
1549*4882a593Smuzhiyun * Function 7: Disable this port
1550*4882a593Smuzhiyun * Syntax:
1551*4882a593Smuzhiyun * void MoxaPortDisable(int port);
1552*4882a593Smuzhiyun * int port : port number (0 - 127)
1553*4882a593Smuzhiyun *
1554*4882a593Smuzhiyun *
1555*4882a593Smuzhiyun * Function 10: Setting baud rate of this port.
1556*4882a593Smuzhiyun * Syntax:
1557*4882a593Smuzhiyun * speed_t MoxaPortSetBaud(int port, speed_t baud);
1558*4882a593Smuzhiyun * int port : port number (0 - 127)
1559*4882a593Smuzhiyun * long baud : baud rate (50 - 115200)
1560*4882a593Smuzhiyun *
1561*4882a593Smuzhiyun * return: 0 : this port is invalid or baud < 50
1562*4882a593Smuzhiyun * 50 - 115200 : the real baud rate set to the port, if
1563*4882a593Smuzhiyun * the argument baud is large than maximun
1564*4882a593Smuzhiyun * available baud rate, the real setting
1565*4882a593Smuzhiyun * baud rate will be the maximun baud rate.
1566*4882a593Smuzhiyun *
1567*4882a593Smuzhiyun *
1568*4882a593Smuzhiyun * Function 12: Configure the port.
1569*4882a593Smuzhiyun * Syntax:
1570*4882a593Smuzhiyun * int MoxaPortSetTermio(int port, struct ktermios *termio, speed_t baud);
1571*4882a593Smuzhiyun * int port : port number (0 - 127)
1572*4882a593Smuzhiyun * struct ktermios * termio : termio structure pointer
1573*4882a593Smuzhiyun * speed_t baud : baud rate
1574*4882a593Smuzhiyun *
1575*4882a593Smuzhiyun * return: -1 : this port is invalid or termio == NULL
1576*4882a593Smuzhiyun * 0 : setting O.K.
1577*4882a593Smuzhiyun *
1578*4882a593Smuzhiyun *
1579*4882a593Smuzhiyun * Function 13: Get the DTR/RTS state of this port.
1580*4882a593Smuzhiyun * Syntax:
1581*4882a593Smuzhiyun * int MoxaPortGetLineOut(int port, int *dtrState, int *rtsState);
1582*4882a593Smuzhiyun * int port : port number (0 - 127)
1583*4882a593Smuzhiyun * int * dtrState : pointer to INT to receive the current DTR
1584*4882a593Smuzhiyun * state. (if NULL, this function will not
1585*4882a593Smuzhiyun * write to this address)
1586*4882a593Smuzhiyun * int * rtsState : pointer to INT to receive the current RTS
1587*4882a593Smuzhiyun * state. (if NULL, this function will not
1588*4882a593Smuzhiyun * write to this address)
1589*4882a593Smuzhiyun *
1590*4882a593Smuzhiyun * return: -1 : this port is invalid
1591*4882a593Smuzhiyun * 0 : O.K.
1592*4882a593Smuzhiyun *
1593*4882a593Smuzhiyun *
1594*4882a593Smuzhiyun * Function 14: Setting the DTR/RTS output state of this port.
1595*4882a593Smuzhiyun * Syntax:
1596*4882a593Smuzhiyun * void MoxaPortLineCtrl(int port, int dtrState, int rtsState);
1597*4882a593Smuzhiyun * int port : port number (0 - 127)
1598*4882a593Smuzhiyun * int dtrState : DTR output state (0: off, 1: on)
1599*4882a593Smuzhiyun * int rtsState : RTS output state (0: off, 1: on)
1600*4882a593Smuzhiyun *
1601*4882a593Smuzhiyun *
1602*4882a593Smuzhiyun * Function 15: Setting the flow control of this port.
1603*4882a593Smuzhiyun * Syntax:
1604*4882a593Smuzhiyun * void MoxaPortFlowCtrl(int port, int rtsFlow, int ctsFlow, int rxFlow,
1605*4882a593Smuzhiyun * int txFlow,int xany);
1606*4882a593Smuzhiyun * int port : port number (0 - 127)
1607*4882a593Smuzhiyun * int rtsFlow : H/W RTS flow control (0: no, 1: yes)
1608*4882a593Smuzhiyun * int ctsFlow : H/W CTS flow control (0: no, 1: yes)
1609*4882a593Smuzhiyun * int rxFlow : S/W Rx XON/XOFF flow control (0: no, 1: yes)
1610*4882a593Smuzhiyun * int txFlow : S/W Tx XON/XOFF flow control (0: no, 1: yes)
1611*4882a593Smuzhiyun * int xany : S/W XANY flow control (0: no, 1: yes)
1612*4882a593Smuzhiyun *
1613*4882a593Smuzhiyun *
1614*4882a593Smuzhiyun * Function 16: Get ths line status of this port
1615*4882a593Smuzhiyun * Syntax:
1616*4882a593Smuzhiyun * int MoxaPortLineStatus(int port);
1617*4882a593Smuzhiyun * int port : port number (0 - 127)
1618*4882a593Smuzhiyun *
1619*4882a593Smuzhiyun * return: Bit 0 - CTS state (0: off, 1: on)
1620*4882a593Smuzhiyun * Bit 1 - DSR state (0: off, 1: on)
1621*4882a593Smuzhiyun * Bit 2 - DCD state (0: off, 1: on)
1622*4882a593Smuzhiyun *
1623*4882a593Smuzhiyun *
1624*4882a593Smuzhiyun * Function 19: Flush the Rx/Tx buffer data of this port.
1625*4882a593Smuzhiyun * Syntax:
1626*4882a593Smuzhiyun * void MoxaPortFlushData(int port, int mode);
1627*4882a593Smuzhiyun * int port : port number (0 - 127)
1628*4882a593Smuzhiyun * int mode
1629*4882a593Smuzhiyun * 0 : flush the Rx buffer
1630*4882a593Smuzhiyun * 1 : flush the Tx buffer
1631*4882a593Smuzhiyun * 2 : flush the Rx and Tx buffer
1632*4882a593Smuzhiyun *
1633*4882a593Smuzhiyun *
1634*4882a593Smuzhiyun * Function 20: Write data.
1635*4882a593Smuzhiyun * Syntax:
1636*4882a593Smuzhiyun * int MoxaPortWriteData(int port, unsigned char * buffer, int length);
1637*4882a593Smuzhiyun * int port : port number (0 - 127)
1638*4882a593Smuzhiyun * unsigned char * buffer : pointer to write data buffer.
1639*4882a593Smuzhiyun * int length : write data length
1640*4882a593Smuzhiyun *
1641*4882a593Smuzhiyun * return: 0 - length : real write data length
1642*4882a593Smuzhiyun *
1643*4882a593Smuzhiyun *
1644*4882a593Smuzhiyun * Function 21: Read data.
1645*4882a593Smuzhiyun * Syntax:
1646*4882a593Smuzhiyun * int MoxaPortReadData(int port, struct tty_struct *tty);
1647*4882a593Smuzhiyun * int port : port number (0 - 127)
1648*4882a593Smuzhiyun * struct tty_struct *tty : tty for data
1649*4882a593Smuzhiyun *
1650*4882a593Smuzhiyun * return: 0 - length : real read data length
1651*4882a593Smuzhiyun *
1652*4882a593Smuzhiyun *
1653*4882a593Smuzhiyun * Function 24: Get the Tx buffer current queued data bytes
1654*4882a593Smuzhiyun * Syntax:
1655*4882a593Smuzhiyun * int MoxaPortTxQueue(int port);
1656*4882a593Smuzhiyun * int port : port number (0 - 127)
1657*4882a593Smuzhiyun *
1658*4882a593Smuzhiyun * return: .. : Tx buffer current queued data bytes
1659*4882a593Smuzhiyun *
1660*4882a593Smuzhiyun *
1661*4882a593Smuzhiyun * Function 25: Get the Tx buffer current free space
1662*4882a593Smuzhiyun * Syntax:
1663*4882a593Smuzhiyun * int MoxaPortTxFree(int port);
1664*4882a593Smuzhiyun * int port : port number (0 - 127)
1665*4882a593Smuzhiyun *
1666*4882a593Smuzhiyun * return: .. : Tx buffer current free space
1667*4882a593Smuzhiyun *
1668*4882a593Smuzhiyun *
1669*4882a593Smuzhiyun * Function 26: Get the Rx buffer current queued data bytes
1670*4882a593Smuzhiyun * Syntax:
1671*4882a593Smuzhiyun * int MoxaPortRxQueue(int port);
1672*4882a593Smuzhiyun * int port : port number (0 - 127)
1673*4882a593Smuzhiyun *
1674*4882a593Smuzhiyun * return: .. : Rx buffer current queued data bytes
1675*4882a593Smuzhiyun *
1676*4882a593Smuzhiyun *
1677*4882a593Smuzhiyun * Function 28: Disable port data transmission.
1678*4882a593Smuzhiyun * Syntax:
1679*4882a593Smuzhiyun * void MoxaPortTxDisable(int port);
1680*4882a593Smuzhiyun * int port : port number (0 - 127)
1681*4882a593Smuzhiyun *
1682*4882a593Smuzhiyun *
1683*4882a593Smuzhiyun * Function 29: Enable port data transmission.
1684*4882a593Smuzhiyun * Syntax:
1685*4882a593Smuzhiyun * void MoxaPortTxEnable(int port);
1686*4882a593Smuzhiyun * int port : port number (0 - 127)
1687*4882a593Smuzhiyun *
1688*4882a593Smuzhiyun *
1689*4882a593Smuzhiyun * Function 31: Get the received BREAK signal count and reset it.
1690*4882a593Smuzhiyun * Syntax:
1691*4882a593Smuzhiyun * int MoxaPortResetBrkCnt(int port);
1692*4882a593Smuzhiyun * int port : port number (0 - 127)
1693*4882a593Smuzhiyun *
1694*4882a593Smuzhiyun * return: 0 - .. : BREAK signal count
1695*4882a593Smuzhiyun *
1696*4882a593Smuzhiyun *
1697*4882a593Smuzhiyun */
1698*4882a593Smuzhiyun
MoxaPortEnable(struct moxa_port * port)1699*4882a593Smuzhiyun static void MoxaPortEnable(struct moxa_port *port)
1700*4882a593Smuzhiyun {
1701*4882a593Smuzhiyun void __iomem *ofsAddr;
1702*4882a593Smuzhiyun u16 lowwater = 512;
1703*4882a593Smuzhiyun
1704*4882a593Smuzhiyun ofsAddr = port->tableAddr;
1705*4882a593Smuzhiyun writew(lowwater, ofsAddr + Low_water);
1706*4882a593Smuzhiyun if (MOXA_IS_320(port->board))
1707*4882a593Smuzhiyun moxafunc(ofsAddr, FC_SetBreakIrq, 0);
1708*4882a593Smuzhiyun else
1709*4882a593Smuzhiyun writew(readw(ofsAddr + HostStat) | WakeupBreak,
1710*4882a593Smuzhiyun ofsAddr + HostStat);
1711*4882a593Smuzhiyun
1712*4882a593Smuzhiyun moxafunc(ofsAddr, FC_SetLineIrq, Magic_code);
1713*4882a593Smuzhiyun moxafunc(ofsAddr, FC_FlushQueue, 2);
1714*4882a593Smuzhiyun
1715*4882a593Smuzhiyun moxafunc(ofsAddr, FC_EnableCH, Magic_code);
1716*4882a593Smuzhiyun MoxaPortLineStatus(port);
1717*4882a593Smuzhiyun }
1718*4882a593Smuzhiyun
MoxaPortDisable(struct moxa_port * port)1719*4882a593Smuzhiyun static void MoxaPortDisable(struct moxa_port *port)
1720*4882a593Smuzhiyun {
1721*4882a593Smuzhiyun void __iomem *ofsAddr = port->tableAddr;
1722*4882a593Smuzhiyun
1723*4882a593Smuzhiyun moxafunc(ofsAddr, FC_SetFlowCtl, 0); /* disable flow control */
1724*4882a593Smuzhiyun moxafunc(ofsAddr, FC_ClrLineIrq, Magic_code);
1725*4882a593Smuzhiyun writew(0, ofsAddr + HostStat);
1726*4882a593Smuzhiyun moxafunc(ofsAddr, FC_DisableCH, Magic_code);
1727*4882a593Smuzhiyun }
1728*4882a593Smuzhiyun
MoxaPortSetBaud(struct moxa_port * port,speed_t baud)1729*4882a593Smuzhiyun static speed_t MoxaPortSetBaud(struct moxa_port *port, speed_t baud)
1730*4882a593Smuzhiyun {
1731*4882a593Smuzhiyun void __iomem *ofsAddr = port->tableAddr;
1732*4882a593Smuzhiyun unsigned int clock, val;
1733*4882a593Smuzhiyun speed_t max;
1734*4882a593Smuzhiyun
1735*4882a593Smuzhiyun max = MOXA_IS_320(port->board) ? 460800 : 921600;
1736*4882a593Smuzhiyun if (baud < 50)
1737*4882a593Smuzhiyun return 0;
1738*4882a593Smuzhiyun if (baud > max)
1739*4882a593Smuzhiyun baud = max;
1740*4882a593Smuzhiyun clock = 921600;
1741*4882a593Smuzhiyun val = clock / baud;
1742*4882a593Smuzhiyun moxafunc(ofsAddr, FC_SetBaud, val);
1743*4882a593Smuzhiyun baud = clock / val;
1744*4882a593Smuzhiyun return baud;
1745*4882a593Smuzhiyun }
1746*4882a593Smuzhiyun
MoxaPortSetTermio(struct moxa_port * port,struct ktermios * termio,speed_t baud)1747*4882a593Smuzhiyun static int MoxaPortSetTermio(struct moxa_port *port, struct ktermios *termio,
1748*4882a593Smuzhiyun speed_t baud)
1749*4882a593Smuzhiyun {
1750*4882a593Smuzhiyun void __iomem *ofsAddr;
1751*4882a593Smuzhiyun tcflag_t mode = 0;
1752*4882a593Smuzhiyun
1753*4882a593Smuzhiyun ofsAddr = port->tableAddr;
1754*4882a593Smuzhiyun
1755*4882a593Smuzhiyun mode = termio->c_cflag & CSIZE;
1756*4882a593Smuzhiyun if (mode == CS5)
1757*4882a593Smuzhiyun mode = MX_CS5;
1758*4882a593Smuzhiyun else if (mode == CS6)
1759*4882a593Smuzhiyun mode = MX_CS6;
1760*4882a593Smuzhiyun else if (mode == CS7)
1761*4882a593Smuzhiyun mode = MX_CS7;
1762*4882a593Smuzhiyun else if (mode == CS8)
1763*4882a593Smuzhiyun mode = MX_CS8;
1764*4882a593Smuzhiyun
1765*4882a593Smuzhiyun if (termio->c_cflag & CSTOPB) {
1766*4882a593Smuzhiyun if (mode == MX_CS5)
1767*4882a593Smuzhiyun mode |= MX_STOP15;
1768*4882a593Smuzhiyun else
1769*4882a593Smuzhiyun mode |= MX_STOP2;
1770*4882a593Smuzhiyun } else
1771*4882a593Smuzhiyun mode |= MX_STOP1;
1772*4882a593Smuzhiyun
1773*4882a593Smuzhiyun if (termio->c_cflag & PARENB) {
1774*4882a593Smuzhiyun if (termio->c_cflag & PARODD) {
1775*4882a593Smuzhiyun if (termio->c_cflag & CMSPAR)
1776*4882a593Smuzhiyun mode |= MX_PARMARK;
1777*4882a593Smuzhiyun else
1778*4882a593Smuzhiyun mode |= MX_PARODD;
1779*4882a593Smuzhiyun } else {
1780*4882a593Smuzhiyun if (termio->c_cflag & CMSPAR)
1781*4882a593Smuzhiyun mode |= MX_PARSPACE;
1782*4882a593Smuzhiyun else
1783*4882a593Smuzhiyun mode |= MX_PAREVEN;
1784*4882a593Smuzhiyun }
1785*4882a593Smuzhiyun } else
1786*4882a593Smuzhiyun mode |= MX_PARNONE;
1787*4882a593Smuzhiyun
1788*4882a593Smuzhiyun moxafunc(ofsAddr, FC_SetDataMode, (u16)mode);
1789*4882a593Smuzhiyun
1790*4882a593Smuzhiyun if (MOXA_IS_320(port->board) && baud >= 921600)
1791*4882a593Smuzhiyun return -1;
1792*4882a593Smuzhiyun
1793*4882a593Smuzhiyun baud = MoxaPortSetBaud(port, baud);
1794*4882a593Smuzhiyun
1795*4882a593Smuzhiyun if (termio->c_iflag & (IXON | IXOFF | IXANY)) {
1796*4882a593Smuzhiyun spin_lock_irq(&moxafunc_lock);
1797*4882a593Smuzhiyun writeb(termio->c_cc[VSTART], ofsAddr + FuncArg);
1798*4882a593Smuzhiyun writeb(termio->c_cc[VSTOP], ofsAddr + FuncArg1);
1799*4882a593Smuzhiyun writeb(FC_SetXonXoff, ofsAddr + FuncCode);
1800*4882a593Smuzhiyun moxa_wait_finish(ofsAddr);
1801*4882a593Smuzhiyun spin_unlock_irq(&moxafunc_lock);
1802*4882a593Smuzhiyun
1803*4882a593Smuzhiyun }
1804*4882a593Smuzhiyun return baud;
1805*4882a593Smuzhiyun }
1806*4882a593Smuzhiyun
MoxaPortGetLineOut(struct moxa_port * port,int * dtrState,int * rtsState)1807*4882a593Smuzhiyun static int MoxaPortGetLineOut(struct moxa_port *port, int *dtrState,
1808*4882a593Smuzhiyun int *rtsState)
1809*4882a593Smuzhiyun {
1810*4882a593Smuzhiyun if (dtrState)
1811*4882a593Smuzhiyun *dtrState = !!(port->lineCtrl & DTR_ON);
1812*4882a593Smuzhiyun if (rtsState)
1813*4882a593Smuzhiyun *rtsState = !!(port->lineCtrl & RTS_ON);
1814*4882a593Smuzhiyun
1815*4882a593Smuzhiyun return 0;
1816*4882a593Smuzhiyun }
1817*4882a593Smuzhiyun
MoxaPortLineCtrl(struct moxa_port * port,int dtr,int rts)1818*4882a593Smuzhiyun static void MoxaPortLineCtrl(struct moxa_port *port, int dtr, int rts)
1819*4882a593Smuzhiyun {
1820*4882a593Smuzhiyun u8 mode = 0;
1821*4882a593Smuzhiyun
1822*4882a593Smuzhiyun if (dtr)
1823*4882a593Smuzhiyun mode |= DTR_ON;
1824*4882a593Smuzhiyun if (rts)
1825*4882a593Smuzhiyun mode |= RTS_ON;
1826*4882a593Smuzhiyun port->lineCtrl = mode;
1827*4882a593Smuzhiyun moxafunc(port->tableAddr, FC_LineControl, mode);
1828*4882a593Smuzhiyun }
1829*4882a593Smuzhiyun
MoxaPortFlowCtrl(struct moxa_port * port,int rts,int cts,int txflow,int rxflow,int txany)1830*4882a593Smuzhiyun static void MoxaPortFlowCtrl(struct moxa_port *port, int rts, int cts,
1831*4882a593Smuzhiyun int txflow, int rxflow, int txany)
1832*4882a593Smuzhiyun {
1833*4882a593Smuzhiyun int mode = 0;
1834*4882a593Smuzhiyun
1835*4882a593Smuzhiyun if (rts)
1836*4882a593Smuzhiyun mode |= RTS_FlowCtl;
1837*4882a593Smuzhiyun if (cts)
1838*4882a593Smuzhiyun mode |= CTS_FlowCtl;
1839*4882a593Smuzhiyun if (txflow)
1840*4882a593Smuzhiyun mode |= Tx_FlowCtl;
1841*4882a593Smuzhiyun if (rxflow)
1842*4882a593Smuzhiyun mode |= Rx_FlowCtl;
1843*4882a593Smuzhiyun if (txany)
1844*4882a593Smuzhiyun mode |= IXM_IXANY;
1845*4882a593Smuzhiyun moxafunc(port->tableAddr, FC_SetFlowCtl, mode);
1846*4882a593Smuzhiyun }
1847*4882a593Smuzhiyun
MoxaPortLineStatus(struct moxa_port * port)1848*4882a593Smuzhiyun static int MoxaPortLineStatus(struct moxa_port *port)
1849*4882a593Smuzhiyun {
1850*4882a593Smuzhiyun void __iomem *ofsAddr;
1851*4882a593Smuzhiyun int val;
1852*4882a593Smuzhiyun
1853*4882a593Smuzhiyun ofsAddr = port->tableAddr;
1854*4882a593Smuzhiyun if (MOXA_IS_320(port->board))
1855*4882a593Smuzhiyun val = moxafuncret(ofsAddr, FC_LineStatus, 0);
1856*4882a593Smuzhiyun else
1857*4882a593Smuzhiyun val = readw(ofsAddr + FlagStat) >> 4;
1858*4882a593Smuzhiyun val &= 0x0B;
1859*4882a593Smuzhiyun if (val & 8)
1860*4882a593Smuzhiyun val |= 4;
1861*4882a593Smuzhiyun moxa_new_dcdstate(port, val & 8);
1862*4882a593Smuzhiyun val &= 7;
1863*4882a593Smuzhiyun return val;
1864*4882a593Smuzhiyun }
1865*4882a593Smuzhiyun
MoxaPortWriteData(struct tty_struct * tty,const unsigned char * buffer,int len)1866*4882a593Smuzhiyun static int MoxaPortWriteData(struct tty_struct *tty,
1867*4882a593Smuzhiyun const unsigned char *buffer, int len)
1868*4882a593Smuzhiyun {
1869*4882a593Smuzhiyun struct moxa_port *port = tty->driver_data;
1870*4882a593Smuzhiyun void __iomem *baseAddr, *ofsAddr, *ofs;
1871*4882a593Smuzhiyun unsigned int c, total;
1872*4882a593Smuzhiyun u16 head, tail, tx_mask, spage, epage;
1873*4882a593Smuzhiyun u16 pageno, pageofs, bufhead;
1874*4882a593Smuzhiyun
1875*4882a593Smuzhiyun ofsAddr = port->tableAddr;
1876*4882a593Smuzhiyun baseAddr = port->board->basemem;
1877*4882a593Smuzhiyun tx_mask = readw(ofsAddr + TX_mask);
1878*4882a593Smuzhiyun spage = readw(ofsAddr + Page_txb);
1879*4882a593Smuzhiyun epage = readw(ofsAddr + EndPage_txb);
1880*4882a593Smuzhiyun tail = readw(ofsAddr + TXwptr);
1881*4882a593Smuzhiyun head = readw(ofsAddr + TXrptr);
1882*4882a593Smuzhiyun c = (head > tail) ? (head - tail - 1) : (head - tail + tx_mask);
1883*4882a593Smuzhiyun if (c > len)
1884*4882a593Smuzhiyun c = len;
1885*4882a593Smuzhiyun moxaLog.txcnt[port->port.tty->index] += c;
1886*4882a593Smuzhiyun total = c;
1887*4882a593Smuzhiyun if (spage == epage) {
1888*4882a593Smuzhiyun bufhead = readw(ofsAddr + Ofs_txb);
1889*4882a593Smuzhiyun writew(spage, baseAddr + Control_reg);
1890*4882a593Smuzhiyun while (c > 0) {
1891*4882a593Smuzhiyun if (head > tail)
1892*4882a593Smuzhiyun len = head - tail - 1;
1893*4882a593Smuzhiyun else
1894*4882a593Smuzhiyun len = tx_mask + 1 - tail;
1895*4882a593Smuzhiyun len = (c > len) ? len : c;
1896*4882a593Smuzhiyun ofs = baseAddr + DynPage_addr + bufhead + tail;
1897*4882a593Smuzhiyun memcpy_toio(ofs, buffer, len);
1898*4882a593Smuzhiyun buffer += len;
1899*4882a593Smuzhiyun tail = (tail + len) & tx_mask;
1900*4882a593Smuzhiyun c -= len;
1901*4882a593Smuzhiyun }
1902*4882a593Smuzhiyun } else {
1903*4882a593Smuzhiyun pageno = spage + (tail >> 13);
1904*4882a593Smuzhiyun pageofs = tail & Page_mask;
1905*4882a593Smuzhiyun while (c > 0) {
1906*4882a593Smuzhiyun len = Page_size - pageofs;
1907*4882a593Smuzhiyun if (len > c)
1908*4882a593Smuzhiyun len = c;
1909*4882a593Smuzhiyun writeb(pageno, baseAddr + Control_reg);
1910*4882a593Smuzhiyun ofs = baseAddr + DynPage_addr + pageofs;
1911*4882a593Smuzhiyun memcpy_toio(ofs, buffer, len);
1912*4882a593Smuzhiyun buffer += len;
1913*4882a593Smuzhiyun if (++pageno == epage)
1914*4882a593Smuzhiyun pageno = spage;
1915*4882a593Smuzhiyun pageofs = 0;
1916*4882a593Smuzhiyun c -= len;
1917*4882a593Smuzhiyun }
1918*4882a593Smuzhiyun tail = (tail + total) & tx_mask;
1919*4882a593Smuzhiyun }
1920*4882a593Smuzhiyun writew(tail, ofsAddr + TXwptr);
1921*4882a593Smuzhiyun writeb(1, ofsAddr + CD180TXirq); /* start to send */
1922*4882a593Smuzhiyun return total;
1923*4882a593Smuzhiyun }
1924*4882a593Smuzhiyun
MoxaPortReadData(struct moxa_port * port)1925*4882a593Smuzhiyun static int MoxaPortReadData(struct moxa_port *port)
1926*4882a593Smuzhiyun {
1927*4882a593Smuzhiyun struct tty_struct *tty = port->port.tty;
1928*4882a593Smuzhiyun unsigned char *dst;
1929*4882a593Smuzhiyun void __iomem *baseAddr, *ofsAddr, *ofs;
1930*4882a593Smuzhiyun unsigned int count, len, total;
1931*4882a593Smuzhiyun u16 tail, rx_mask, spage, epage;
1932*4882a593Smuzhiyun u16 pageno, pageofs, bufhead, head;
1933*4882a593Smuzhiyun
1934*4882a593Smuzhiyun ofsAddr = port->tableAddr;
1935*4882a593Smuzhiyun baseAddr = port->board->basemem;
1936*4882a593Smuzhiyun head = readw(ofsAddr + RXrptr);
1937*4882a593Smuzhiyun tail = readw(ofsAddr + RXwptr);
1938*4882a593Smuzhiyun rx_mask = readw(ofsAddr + RX_mask);
1939*4882a593Smuzhiyun spage = readw(ofsAddr + Page_rxb);
1940*4882a593Smuzhiyun epage = readw(ofsAddr + EndPage_rxb);
1941*4882a593Smuzhiyun count = (tail >= head) ? (tail - head) : (tail - head + rx_mask + 1);
1942*4882a593Smuzhiyun if (count == 0)
1943*4882a593Smuzhiyun return 0;
1944*4882a593Smuzhiyun
1945*4882a593Smuzhiyun total = count;
1946*4882a593Smuzhiyun moxaLog.rxcnt[tty->index] += total;
1947*4882a593Smuzhiyun if (spage == epage) {
1948*4882a593Smuzhiyun bufhead = readw(ofsAddr + Ofs_rxb);
1949*4882a593Smuzhiyun writew(spage, baseAddr + Control_reg);
1950*4882a593Smuzhiyun while (count > 0) {
1951*4882a593Smuzhiyun ofs = baseAddr + DynPage_addr + bufhead + head;
1952*4882a593Smuzhiyun len = (tail >= head) ? (tail - head) :
1953*4882a593Smuzhiyun (rx_mask + 1 - head);
1954*4882a593Smuzhiyun len = tty_prepare_flip_string(&port->port, &dst,
1955*4882a593Smuzhiyun min(len, count));
1956*4882a593Smuzhiyun memcpy_fromio(dst, ofs, len);
1957*4882a593Smuzhiyun head = (head + len) & rx_mask;
1958*4882a593Smuzhiyun count -= len;
1959*4882a593Smuzhiyun }
1960*4882a593Smuzhiyun } else {
1961*4882a593Smuzhiyun pageno = spage + (head >> 13);
1962*4882a593Smuzhiyun pageofs = head & Page_mask;
1963*4882a593Smuzhiyun while (count > 0) {
1964*4882a593Smuzhiyun writew(pageno, baseAddr + Control_reg);
1965*4882a593Smuzhiyun ofs = baseAddr + DynPage_addr + pageofs;
1966*4882a593Smuzhiyun len = tty_prepare_flip_string(&port->port, &dst,
1967*4882a593Smuzhiyun min(Page_size - pageofs, count));
1968*4882a593Smuzhiyun memcpy_fromio(dst, ofs, len);
1969*4882a593Smuzhiyun
1970*4882a593Smuzhiyun count -= len;
1971*4882a593Smuzhiyun pageofs = (pageofs + len) & Page_mask;
1972*4882a593Smuzhiyun if (pageofs == 0 && ++pageno == epage)
1973*4882a593Smuzhiyun pageno = spage;
1974*4882a593Smuzhiyun }
1975*4882a593Smuzhiyun head = (head + total) & rx_mask;
1976*4882a593Smuzhiyun }
1977*4882a593Smuzhiyun writew(head, ofsAddr + RXrptr);
1978*4882a593Smuzhiyun if (readb(ofsAddr + FlagStat) & Xoff_state) {
1979*4882a593Smuzhiyun moxaLowWaterChk = 1;
1980*4882a593Smuzhiyun port->lowChkFlag = 1;
1981*4882a593Smuzhiyun }
1982*4882a593Smuzhiyun return total;
1983*4882a593Smuzhiyun }
1984*4882a593Smuzhiyun
1985*4882a593Smuzhiyun
MoxaPortTxQueue(struct moxa_port * port)1986*4882a593Smuzhiyun static int MoxaPortTxQueue(struct moxa_port *port)
1987*4882a593Smuzhiyun {
1988*4882a593Smuzhiyun void __iomem *ofsAddr = port->tableAddr;
1989*4882a593Smuzhiyun u16 rptr, wptr, mask;
1990*4882a593Smuzhiyun
1991*4882a593Smuzhiyun rptr = readw(ofsAddr + TXrptr);
1992*4882a593Smuzhiyun wptr = readw(ofsAddr + TXwptr);
1993*4882a593Smuzhiyun mask = readw(ofsAddr + TX_mask);
1994*4882a593Smuzhiyun return (wptr - rptr) & mask;
1995*4882a593Smuzhiyun }
1996*4882a593Smuzhiyun
MoxaPortTxFree(struct moxa_port * port)1997*4882a593Smuzhiyun static int MoxaPortTxFree(struct moxa_port *port)
1998*4882a593Smuzhiyun {
1999*4882a593Smuzhiyun void __iomem *ofsAddr = port->tableAddr;
2000*4882a593Smuzhiyun u16 rptr, wptr, mask;
2001*4882a593Smuzhiyun
2002*4882a593Smuzhiyun rptr = readw(ofsAddr + TXrptr);
2003*4882a593Smuzhiyun wptr = readw(ofsAddr + TXwptr);
2004*4882a593Smuzhiyun mask = readw(ofsAddr + TX_mask);
2005*4882a593Smuzhiyun return mask - ((wptr - rptr) & mask);
2006*4882a593Smuzhiyun }
2007*4882a593Smuzhiyun
MoxaPortRxQueue(struct moxa_port * port)2008*4882a593Smuzhiyun static int MoxaPortRxQueue(struct moxa_port *port)
2009*4882a593Smuzhiyun {
2010*4882a593Smuzhiyun void __iomem *ofsAddr = port->tableAddr;
2011*4882a593Smuzhiyun u16 rptr, wptr, mask;
2012*4882a593Smuzhiyun
2013*4882a593Smuzhiyun rptr = readw(ofsAddr + RXrptr);
2014*4882a593Smuzhiyun wptr = readw(ofsAddr + RXwptr);
2015*4882a593Smuzhiyun mask = readw(ofsAddr + RX_mask);
2016*4882a593Smuzhiyun return (wptr - rptr) & mask;
2017*4882a593Smuzhiyun }
2018*4882a593Smuzhiyun
MoxaPortTxDisable(struct moxa_port * port)2019*4882a593Smuzhiyun static void MoxaPortTxDisable(struct moxa_port *port)
2020*4882a593Smuzhiyun {
2021*4882a593Smuzhiyun moxafunc(port->tableAddr, FC_SetXoffState, Magic_code);
2022*4882a593Smuzhiyun }
2023*4882a593Smuzhiyun
MoxaPortTxEnable(struct moxa_port * port)2024*4882a593Smuzhiyun static void MoxaPortTxEnable(struct moxa_port *port)
2025*4882a593Smuzhiyun {
2026*4882a593Smuzhiyun moxafunc(port->tableAddr, FC_SetXonState, Magic_code);
2027*4882a593Smuzhiyun }
2028*4882a593Smuzhiyun
moxa_get_serial_info(struct tty_struct * tty,struct serial_struct * ss)2029*4882a593Smuzhiyun static int moxa_get_serial_info(struct tty_struct *tty,
2030*4882a593Smuzhiyun struct serial_struct *ss)
2031*4882a593Smuzhiyun {
2032*4882a593Smuzhiyun struct moxa_port *info = tty->driver_data;
2033*4882a593Smuzhiyun
2034*4882a593Smuzhiyun if (tty->index == MAX_PORTS)
2035*4882a593Smuzhiyun return -EINVAL;
2036*4882a593Smuzhiyun if (!info)
2037*4882a593Smuzhiyun return -ENODEV;
2038*4882a593Smuzhiyun mutex_lock(&info->port.mutex);
2039*4882a593Smuzhiyun ss->type = info->type,
2040*4882a593Smuzhiyun ss->line = info->port.tty->index,
2041*4882a593Smuzhiyun ss->flags = info->port.flags,
2042*4882a593Smuzhiyun ss->baud_base = 921600,
2043*4882a593Smuzhiyun ss->close_delay = jiffies_to_msecs(info->port.close_delay) / 10;
2044*4882a593Smuzhiyun mutex_unlock(&info->port.mutex);
2045*4882a593Smuzhiyun return 0;
2046*4882a593Smuzhiyun }
2047*4882a593Smuzhiyun
2048*4882a593Smuzhiyun
moxa_set_serial_info(struct tty_struct * tty,struct serial_struct * ss)2049*4882a593Smuzhiyun static int moxa_set_serial_info(struct tty_struct *tty,
2050*4882a593Smuzhiyun struct serial_struct *ss)
2051*4882a593Smuzhiyun {
2052*4882a593Smuzhiyun struct moxa_port *info = tty->driver_data;
2053*4882a593Smuzhiyun unsigned int close_delay;
2054*4882a593Smuzhiyun
2055*4882a593Smuzhiyun if (tty->index == MAX_PORTS)
2056*4882a593Smuzhiyun return -EINVAL;
2057*4882a593Smuzhiyun if (!info)
2058*4882a593Smuzhiyun return -ENODEV;
2059*4882a593Smuzhiyun
2060*4882a593Smuzhiyun if (ss->irq != 0 || ss->port != 0 ||
2061*4882a593Smuzhiyun ss->custom_divisor != 0 ||
2062*4882a593Smuzhiyun ss->baud_base != 921600)
2063*4882a593Smuzhiyun return -EPERM;
2064*4882a593Smuzhiyun
2065*4882a593Smuzhiyun close_delay = msecs_to_jiffies(ss->close_delay * 10);
2066*4882a593Smuzhiyun
2067*4882a593Smuzhiyun mutex_lock(&info->port.mutex);
2068*4882a593Smuzhiyun if (!capable(CAP_SYS_ADMIN)) {
2069*4882a593Smuzhiyun if (close_delay != info->port.close_delay ||
2070*4882a593Smuzhiyun ss->type != info->type ||
2071*4882a593Smuzhiyun ((ss->flags & ~ASYNC_USR_MASK) !=
2072*4882a593Smuzhiyun (info->port.flags & ~ASYNC_USR_MASK))) {
2073*4882a593Smuzhiyun mutex_unlock(&info->port.mutex);
2074*4882a593Smuzhiyun return -EPERM;
2075*4882a593Smuzhiyun }
2076*4882a593Smuzhiyun } else {
2077*4882a593Smuzhiyun info->port.close_delay = close_delay;
2078*4882a593Smuzhiyun
2079*4882a593Smuzhiyun MoxaSetFifo(info, ss->type == PORT_16550A);
2080*4882a593Smuzhiyun
2081*4882a593Smuzhiyun info->type = ss->type;
2082*4882a593Smuzhiyun }
2083*4882a593Smuzhiyun mutex_unlock(&info->port.mutex);
2084*4882a593Smuzhiyun return 0;
2085*4882a593Smuzhiyun }
2086*4882a593Smuzhiyun
2087*4882a593Smuzhiyun
2088*4882a593Smuzhiyun
2089*4882a593Smuzhiyun /*****************************************************************************
2090*4882a593Smuzhiyun * Static local functions: *
2091*4882a593Smuzhiyun *****************************************************************************/
2092*4882a593Smuzhiyun
MoxaSetFifo(struct moxa_port * port,int enable)2093*4882a593Smuzhiyun static void MoxaSetFifo(struct moxa_port *port, int enable)
2094*4882a593Smuzhiyun {
2095*4882a593Smuzhiyun void __iomem *ofsAddr = port->tableAddr;
2096*4882a593Smuzhiyun
2097*4882a593Smuzhiyun if (!enable) {
2098*4882a593Smuzhiyun moxafunc(ofsAddr, FC_SetRxFIFOTrig, 0);
2099*4882a593Smuzhiyun moxafunc(ofsAddr, FC_SetTxFIFOCnt, 1);
2100*4882a593Smuzhiyun } else {
2101*4882a593Smuzhiyun moxafunc(ofsAddr, FC_SetRxFIFOTrig, 3);
2102*4882a593Smuzhiyun moxafunc(ofsAddr, FC_SetTxFIFOCnt, 16);
2103*4882a593Smuzhiyun }
2104*4882a593Smuzhiyun }
2105