1*4882a593Smuzhiyun /* SPDX-License-Identifier: GPL-2.0 */ 2*4882a593Smuzhiyun /* 3*4882a593Smuzhiyun * Thunderbolt control channel messages 4*4882a593Smuzhiyun * 5*4882a593Smuzhiyun * Copyright (C) 2014 Andreas Noever <andreas.noever@gmail.com> 6*4882a593Smuzhiyun * Copyright (C) 2017, Intel Corporation 7*4882a593Smuzhiyun */ 8*4882a593Smuzhiyun 9*4882a593Smuzhiyun #ifndef _TB_MSGS 10*4882a593Smuzhiyun #define _TB_MSGS 11*4882a593Smuzhiyun 12*4882a593Smuzhiyun #include <linux/types.h> 13*4882a593Smuzhiyun #include <linux/uuid.h> 14*4882a593Smuzhiyun 15*4882a593Smuzhiyun enum tb_cfg_space { 16*4882a593Smuzhiyun TB_CFG_HOPS = 0, 17*4882a593Smuzhiyun TB_CFG_PORT = 1, 18*4882a593Smuzhiyun TB_CFG_SWITCH = 2, 19*4882a593Smuzhiyun TB_CFG_COUNTERS = 3, 20*4882a593Smuzhiyun }; 21*4882a593Smuzhiyun 22*4882a593Smuzhiyun enum tb_cfg_error { 23*4882a593Smuzhiyun TB_CFG_ERROR_PORT_NOT_CONNECTED = 0, 24*4882a593Smuzhiyun TB_CFG_ERROR_LINK_ERROR = 1, 25*4882a593Smuzhiyun TB_CFG_ERROR_INVALID_CONFIG_SPACE = 2, 26*4882a593Smuzhiyun TB_CFG_ERROR_NO_SUCH_PORT = 4, 27*4882a593Smuzhiyun TB_CFG_ERROR_ACK_PLUG_EVENT = 7, /* send as reply to TB_CFG_PKG_EVENT */ 28*4882a593Smuzhiyun TB_CFG_ERROR_LOOP = 8, 29*4882a593Smuzhiyun TB_CFG_ERROR_HEC_ERROR_DETECTED = 12, 30*4882a593Smuzhiyun TB_CFG_ERROR_FLOW_CONTROL_ERROR = 13, 31*4882a593Smuzhiyun TB_CFG_ERROR_LOCK = 15, 32*4882a593Smuzhiyun }; 33*4882a593Smuzhiyun 34*4882a593Smuzhiyun /* common header */ 35*4882a593Smuzhiyun struct tb_cfg_header { 36*4882a593Smuzhiyun u32 route_hi:22; 37*4882a593Smuzhiyun u32 unknown:10; /* highest order bit is set on replies */ 38*4882a593Smuzhiyun u32 route_lo; 39*4882a593Smuzhiyun } __packed; 40*4882a593Smuzhiyun 41*4882a593Smuzhiyun /* additional header for read/write packets */ 42*4882a593Smuzhiyun struct tb_cfg_address { 43*4882a593Smuzhiyun u32 offset:13; /* in dwords */ 44*4882a593Smuzhiyun u32 length:6; /* in dwords */ 45*4882a593Smuzhiyun u32 port:6; 46*4882a593Smuzhiyun enum tb_cfg_space space:2; 47*4882a593Smuzhiyun u32 seq:2; /* sequence number */ 48*4882a593Smuzhiyun u32 zero:3; 49*4882a593Smuzhiyun } __packed; 50*4882a593Smuzhiyun 51*4882a593Smuzhiyun /* TB_CFG_PKG_READ, response for TB_CFG_PKG_WRITE */ 52*4882a593Smuzhiyun struct cfg_read_pkg { 53*4882a593Smuzhiyun struct tb_cfg_header header; 54*4882a593Smuzhiyun struct tb_cfg_address addr; 55*4882a593Smuzhiyun } __packed; 56*4882a593Smuzhiyun 57*4882a593Smuzhiyun /* TB_CFG_PKG_WRITE, response for TB_CFG_PKG_READ */ 58*4882a593Smuzhiyun struct cfg_write_pkg { 59*4882a593Smuzhiyun struct tb_cfg_header header; 60*4882a593Smuzhiyun struct tb_cfg_address addr; 61*4882a593Smuzhiyun u32 data[64]; /* maximum size, tb_cfg_address.length has 6 bits */ 62*4882a593Smuzhiyun } __packed; 63*4882a593Smuzhiyun 64*4882a593Smuzhiyun /* TB_CFG_PKG_ERROR */ 65*4882a593Smuzhiyun struct cfg_error_pkg { 66*4882a593Smuzhiyun struct tb_cfg_header header; 67*4882a593Smuzhiyun enum tb_cfg_error error:4; 68*4882a593Smuzhiyun u32 zero1:4; 69*4882a593Smuzhiyun u32 port:6; 70*4882a593Smuzhiyun u32 zero2:2; /* Both should be zero, still they are different fields. */ 71*4882a593Smuzhiyun u32 zero3:14; 72*4882a593Smuzhiyun u32 pg:2; 73*4882a593Smuzhiyun } __packed; 74*4882a593Smuzhiyun 75*4882a593Smuzhiyun #define TB_CFG_ERROR_PG_HOT_PLUG 0x2 76*4882a593Smuzhiyun #define TB_CFG_ERROR_PG_HOT_UNPLUG 0x3 77*4882a593Smuzhiyun 78*4882a593Smuzhiyun /* TB_CFG_PKG_EVENT */ 79*4882a593Smuzhiyun struct cfg_event_pkg { 80*4882a593Smuzhiyun struct tb_cfg_header header; 81*4882a593Smuzhiyun u32 port:6; 82*4882a593Smuzhiyun u32 zero:25; 83*4882a593Smuzhiyun bool unplug:1; 84*4882a593Smuzhiyun } __packed; 85*4882a593Smuzhiyun 86*4882a593Smuzhiyun /* TB_CFG_PKG_RESET */ 87*4882a593Smuzhiyun struct cfg_reset_pkg { 88*4882a593Smuzhiyun struct tb_cfg_header header; 89*4882a593Smuzhiyun } __packed; 90*4882a593Smuzhiyun 91*4882a593Smuzhiyun /* TB_CFG_PKG_PREPARE_TO_SLEEP */ 92*4882a593Smuzhiyun struct cfg_pts_pkg { 93*4882a593Smuzhiyun struct tb_cfg_header header; 94*4882a593Smuzhiyun u32 data; 95*4882a593Smuzhiyun } __packed; 96*4882a593Smuzhiyun 97*4882a593Smuzhiyun /* ICM messages */ 98*4882a593Smuzhiyun 99*4882a593Smuzhiyun enum icm_pkg_code { 100*4882a593Smuzhiyun ICM_GET_TOPOLOGY = 0x1, 101*4882a593Smuzhiyun ICM_DRIVER_READY = 0x3, 102*4882a593Smuzhiyun ICM_APPROVE_DEVICE = 0x4, 103*4882a593Smuzhiyun ICM_CHALLENGE_DEVICE = 0x5, 104*4882a593Smuzhiyun ICM_ADD_DEVICE_KEY = 0x6, 105*4882a593Smuzhiyun ICM_GET_ROUTE = 0xa, 106*4882a593Smuzhiyun ICM_APPROVE_XDOMAIN = 0x10, 107*4882a593Smuzhiyun ICM_DISCONNECT_XDOMAIN = 0x11, 108*4882a593Smuzhiyun ICM_PREBOOT_ACL = 0x18, 109*4882a593Smuzhiyun }; 110*4882a593Smuzhiyun 111*4882a593Smuzhiyun enum icm_event_code { 112*4882a593Smuzhiyun ICM_EVENT_DEVICE_CONNECTED = 0x3, 113*4882a593Smuzhiyun ICM_EVENT_DEVICE_DISCONNECTED = 0x4, 114*4882a593Smuzhiyun ICM_EVENT_XDOMAIN_CONNECTED = 0x6, 115*4882a593Smuzhiyun ICM_EVENT_XDOMAIN_DISCONNECTED = 0x7, 116*4882a593Smuzhiyun ICM_EVENT_RTD3_VETO = 0xa, 117*4882a593Smuzhiyun }; 118*4882a593Smuzhiyun 119*4882a593Smuzhiyun struct icm_pkg_header { 120*4882a593Smuzhiyun u8 code; 121*4882a593Smuzhiyun u8 flags; 122*4882a593Smuzhiyun u8 packet_id; 123*4882a593Smuzhiyun u8 total_packets; 124*4882a593Smuzhiyun }; 125*4882a593Smuzhiyun 126*4882a593Smuzhiyun #define ICM_FLAGS_ERROR BIT(0) 127*4882a593Smuzhiyun #define ICM_FLAGS_NO_KEY BIT(1) 128*4882a593Smuzhiyun #define ICM_FLAGS_SLEVEL_SHIFT 3 129*4882a593Smuzhiyun #define ICM_FLAGS_SLEVEL_MASK GENMASK(4, 3) 130*4882a593Smuzhiyun #define ICM_FLAGS_DUAL_LANE BIT(5) 131*4882a593Smuzhiyun #define ICM_FLAGS_SPEED_GEN3 BIT(7) 132*4882a593Smuzhiyun #define ICM_FLAGS_WRITE BIT(7) 133*4882a593Smuzhiyun 134*4882a593Smuzhiyun struct icm_pkg_driver_ready { 135*4882a593Smuzhiyun struct icm_pkg_header hdr; 136*4882a593Smuzhiyun }; 137*4882a593Smuzhiyun 138*4882a593Smuzhiyun /* Falcon Ridge only messages */ 139*4882a593Smuzhiyun 140*4882a593Smuzhiyun struct icm_fr_pkg_driver_ready_response { 141*4882a593Smuzhiyun struct icm_pkg_header hdr; 142*4882a593Smuzhiyun u8 romver; 143*4882a593Smuzhiyun u8 ramver; 144*4882a593Smuzhiyun u16 security_level; 145*4882a593Smuzhiyun }; 146*4882a593Smuzhiyun 147*4882a593Smuzhiyun #define ICM_FR_SLEVEL_MASK 0xf 148*4882a593Smuzhiyun 149*4882a593Smuzhiyun /* Falcon Ridge & Alpine Ridge common messages */ 150*4882a593Smuzhiyun 151*4882a593Smuzhiyun struct icm_fr_pkg_get_topology { 152*4882a593Smuzhiyun struct icm_pkg_header hdr; 153*4882a593Smuzhiyun }; 154*4882a593Smuzhiyun 155*4882a593Smuzhiyun #define ICM_GET_TOPOLOGY_PACKETS 14 156*4882a593Smuzhiyun 157*4882a593Smuzhiyun struct icm_fr_pkg_get_topology_response { 158*4882a593Smuzhiyun struct icm_pkg_header hdr; 159*4882a593Smuzhiyun u32 route_lo; 160*4882a593Smuzhiyun u32 route_hi; 161*4882a593Smuzhiyun u8 first_data; 162*4882a593Smuzhiyun u8 second_data; 163*4882a593Smuzhiyun u8 drom_i2c_address_index; 164*4882a593Smuzhiyun u8 switch_index; 165*4882a593Smuzhiyun u32 reserved[2]; 166*4882a593Smuzhiyun u32 ports[16]; 167*4882a593Smuzhiyun u32 port_hop_info[16]; 168*4882a593Smuzhiyun }; 169*4882a593Smuzhiyun 170*4882a593Smuzhiyun #define ICM_SWITCH_USED BIT(0) 171*4882a593Smuzhiyun #define ICM_SWITCH_UPSTREAM_PORT_MASK GENMASK(7, 1) 172*4882a593Smuzhiyun #define ICM_SWITCH_UPSTREAM_PORT_SHIFT 1 173*4882a593Smuzhiyun 174*4882a593Smuzhiyun #define ICM_PORT_TYPE_MASK GENMASK(23, 0) 175*4882a593Smuzhiyun #define ICM_PORT_INDEX_SHIFT 24 176*4882a593Smuzhiyun #define ICM_PORT_INDEX_MASK GENMASK(31, 24) 177*4882a593Smuzhiyun 178*4882a593Smuzhiyun struct icm_fr_event_device_connected { 179*4882a593Smuzhiyun struct icm_pkg_header hdr; 180*4882a593Smuzhiyun uuid_t ep_uuid; 181*4882a593Smuzhiyun u8 connection_key; 182*4882a593Smuzhiyun u8 connection_id; 183*4882a593Smuzhiyun u16 link_info; 184*4882a593Smuzhiyun u32 ep_name[55]; 185*4882a593Smuzhiyun }; 186*4882a593Smuzhiyun 187*4882a593Smuzhiyun #define ICM_LINK_INFO_LINK_MASK 0x7 188*4882a593Smuzhiyun #define ICM_LINK_INFO_DEPTH_SHIFT 4 189*4882a593Smuzhiyun #define ICM_LINK_INFO_DEPTH_MASK GENMASK(7, 4) 190*4882a593Smuzhiyun #define ICM_LINK_INFO_APPROVED BIT(8) 191*4882a593Smuzhiyun #define ICM_LINK_INFO_REJECTED BIT(9) 192*4882a593Smuzhiyun #define ICM_LINK_INFO_BOOT BIT(10) 193*4882a593Smuzhiyun 194*4882a593Smuzhiyun struct icm_fr_pkg_approve_device { 195*4882a593Smuzhiyun struct icm_pkg_header hdr; 196*4882a593Smuzhiyun uuid_t ep_uuid; 197*4882a593Smuzhiyun u8 connection_key; 198*4882a593Smuzhiyun u8 connection_id; 199*4882a593Smuzhiyun u16 reserved; 200*4882a593Smuzhiyun }; 201*4882a593Smuzhiyun 202*4882a593Smuzhiyun struct icm_fr_event_device_disconnected { 203*4882a593Smuzhiyun struct icm_pkg_header hdr; 204*4882a593Smuzhiyun u16 reserved; 205*4882a593Smuzhiyun u16 link_info; 206*4882a593Smuzhiyun }; 207*4882a593Smuzhiyun 208*4882a593Smuzhiyun struct icm_fr_event_xdomain_connected { 209*4882a593Smuzhiyun struct icm_pkg_header hdr; 210*4882a593Smuzhiyun u16 reserved; 211*4882a593Smuzhiyun u16 link_info; 212*4882a593Smuzhiyun uuid_t remote_uuid; 213*4882a593Smuzhiyun uuid_t local_uuid; 214*4882a593Smuzhiyun u32 local_route_hi; 215*4882a593Smuzhiyun u32 local_route_lo; 216*4882a593Smuzhiyun u32 remote_route_hi; 217*4882a593Smuzhiyun u32 remote_route_lo; 218*4882a593Smuzhiyun }; 219*4882a593Smuzhiyun 220*4882a593Smuzhiyun struct icm_fr_event_xdomain_disconnected { 221*4882a593Smuzhiyun struct icm_pkg_header hdr; 222*4882a593Smuzhiyun u16 reserved; 223*4882a593Smuzhiyun u16 link_info; 224*4882a593Smuzhiyun uuid_t remote_uuid; 225*4882a593Smuzhiyun }; 226*4882a593Smuzhiyun 227*4882a593Smuzhiyun struct icm_fr_pkg_add_device_key { 228*4882a593Smuzhiyun struct icm_pkg_header hdr; 229*4882a593Smuzhiyun uuid_t ep_uuid; 230*4882a593Smuzhiyun u8 connection_key; 231*4882a593Smuzhiyun u8 connection_id; 232*4882a593Smuzhiyun u16 reserved; 233*4882a593Smuzhiyun u32 key[8]; 234*4882a593Smuzhiyun }; 235*4882a593Smuzhiyun 236*4882a593Smuzhiyun struct icm_fr_pkg_add_device_key_response { 237*4882a593Smuzhiyun struct icm_pkg_header hdr; 238*4882a593Smuzhiyun uuid_t ep_uuid; 239*4882a593Smuzhiyun u8 connection_key; 240*4882a593Smuzhiyun u8 connection_id; 241*4882a593Smuzhiyun u16 reserved; 242*4882a593Smuzhiyun }; 243*4882a593Smuzhiyun 244*4882a593Smuzhiyun struct icm_fr_pkg_challenge_device { 245*4882a593Smuzhiyun struct icm_pkg_header hdr; 246*4882a593Smuzhiyun uuid_t ep_uuid; 247*4882a593Smuzhiyun u8 connection_key; 248*4882a593Smuzhiyun u8 connection_id; 249*4882a593Smuzhiyun u16 reserved; 250*4882a593Smuzhiyun u32 challenge[8]; 251*4882a593Smuzhiyun }; 252*4882a593Smuzhiyun 253*4882a593Smuzhiyun struct icm_fr_pkg_challenge_device_response { 254*4882a593Smuzhiyun struct icm_pkg_header hdr; 255*4882a593Smuzhiyun uuid_t ep_uuid; 256*4882a593Smuzhiyun u8 connection_key; 257*4882a593Smuzhiyun u8 connection_id; 258*4882a593Smuzhiyun u16 reserved; 259*4882a593Smuzhiyun u32 challenge[8]; 260*4882a593Smuzhiyun u32 response[8]; 261*4882a593Smuzhiyun }; 262*4882a593Smuzhiyun 263*4882a593Smuzhiyun struct icm_fr_pkg_approve_xdomain { 264*4882a593Smuzhiyun struct icm_pkg_header hdr; 265*4882a593Smuzhiyun u16 reserved; 266*4882a593Smuzhiyun u16 link_info; 267*4882a593Smuzhiyun uuid_t remote_uuid; 268*4882a593Smuzhiyun u16 transmit_path; 269*4882a593Smuzhiyun u16 transmit_ring; 270*4882a593Smuzhiyun u16 receive_path; 271*4882a593Smuzhiyun u16 receive_ring; 272*4882a593Smuzhiyun }; 273*4882a593Smuzhiyun 274*4882a593Smuzhiyun struct icm_fr_pkg_approve_xdomain_response { 275*4882a593Smuzhiyun struct icm_pkg_header hdr; 276*4882a593Smuzhiyun u16 reserved; 277*4882a593Smuzhiyun u16 link_info; 278*4882a593Smuzhiyun uuid_t remote_uuid; 279*4882a593Smuzhiyun u16 transmit_path; 280*4882a593Smuzhiyun u16 transmit_ring; 281*4882a593Smuzhiyun u16 receive_path; 282*4882a593Smuzhiyun u16 receive_ring; 283*4882a593Smuzhiyun }; 284*4882a593Smuzhiyun 285*4882a593Smuzhiyun /* Alpine Ridge only messages */ 286*4882a593Smuzhiyun 287*4882a593Smuzhiyun struct icm_ar_pkg_driver_ready_response { 288*4882a593Smuzhiyun struct icm_pkg_header hdr; 289*4882a593Smuzhiyun u8 romver; 290*4882a593Smuzhiyun u8 ramver; 291*4882a593Smuzhiyun u16 info; 292*4882a593Smuzhiyun }; 293*4882a593Smuzhiyun 294*4882a593Smuzhiyun #define ICM_AR_FLAGS_RTD3 BIT(6) 295*4882a593Smuzhiyun 296*4882a593Smuzhiyun #define ICM_AR_INFO_SLEVEL_MASK GENMASK(3, 0) 297*4882a593Smuzhiyun #define ICM_AR_INFO_BOOT_ACL_SHIFT 7 298*4882a593Smuzhiyun #define ICM_AR_INFO_BOOT_ACL_MASK GENMASK(11, 7) 299*4882a593Smuzhiyun #define ICM_AR_INFO_BOOT_ACL_SUPPORTED BIT(13) 300*4882a593Smuzhiyun 301*4882a593Smuzhiyun struct icm_ar_pkg_get_route { 302*4882a593Smuzhiyun struct icm_pkg_header hdr; 303*4882a593Smuzhiyun u16 reserved; 304*4882a593Smuzhiyun u16 link_info; 305*4882a593Smuzhiyun }; 306*4882a593Smuzhiyun 307*4882a593Smuzhiyun struct icm_ar_pkg_get_route_response { 308*4882a593Smuzhiyun struct icm_pkg_header hdr; 309*4882a593Smuzhiyun u16 reserved; 310*4882a593Smuzhiyun u16 link_info; 311*4882a593Smuzhiyun u32 route_hi; 312*4882a593Smuzhiyun u32 route_lo; 313*4882a593Smuzhiyun }; 314*4882a593Smuzhiyun 315*4882a593Smuzhiyun struct icm_ar_boot_acl_entry { 316*4882a593Smuzhiyun u32 uuid_lo; 317*4882a593Smuzhiyun u32 uuid_hi; 318*4882a593Smuzhiyun }; 319*4882a593Smuzhiyun 320*4882a593Smuzhiyun #define ICM_AR_PREBOOT_ACL_ENTRIES 16 321*4882a593Smuzhiyun 322*4882a593Smuzhiyun struct icm_ar_pkg_preboot_acl { 323*4882a593Smuzhiyun struct icm_pkg_header hdr; 324*4882a593Smuzhiyun struct icm_ar_boot_acl_entry acl[ICM_AR_PREBOOT_ACL_ENTRIES]; 325*4882a593Smuzhiyun }; 326*4882a593Smuzhiyun 327*4882a593Smuzhiyun struct icm_ar_pkg_preboot_acl_response { 328*4882a593Smuzhiyun struct icm_pkg_header hdr; 329*4882a593Smuzhiyun struct icm_ar_boot_acl_entry acl[ICM_AR_PREBOOT_ACL_ENTRIES]; 330*4882a593Smuzhiyun }; 331*4882a593Smuzhiyun 332*4882a593Smuzhiyun /* Titan Ridge messages */ 333*4882a593Smuzhiyun 334*4882a593Smuzhiyun struct icm_tr_pkg_driver_ready_response { 335*4882a593Smuzhiyun struct icm_pkg_header hdr; 336*4882a593Smuzhiyun u16 reserved1; 337*4882a593Smuzhiyun u16 info; 338*4882a593Smuzhiyun u32 nvm_version; 339*4882a593Smuzhiyun u16 device_id; 340*4882a593Smuzhiyun u16 reserved2; 341*4882a593Smuzhiyun }; 342*4882a593Smuzhiyun 343*4882a593Smuzhiyun #define ICM_TR_FLAGS_RTD3 BIT(6) 344*4882a593Smuzhiyun 345*4882a593Smuzhiyun #define ICM_TR_INFO_SLEVEL_MASK GENMASK(2, 0) 346*4882a593Smuzhiyun #define ICM_TR_INFO_BOOT_ACL_SHIFT 7 347*4882a593Smuzhiyun #define ICM_TR_INFO_BOOT_ACL_MASK GENMASK(12, 7) 348*4882a593Smuzhiyun 349*4882a593Smuzhiyun struct icm_tr_event_device_connected { 350*4882a593Smuzhiyun struct icm_pkg_header hdr; 351*4882a593Smuzhiyun uuid_t ep_uuid; 352*4882a593Smuzhiyun u32 route_hi; 353*4882a593Smuzhiyun u32 route_lo; 354*4882a593Smuzhiyun u8 connection_id; 355*4882a593Smuzhiyun u8 reserved; 356*4882a593Smuzhiyun u16 link_info; 357*4882a593Smuzhiyun u32 ep_name[55]; 358*4882a593Smuzhiyun }; 359*4882a593Smuzhiyun 360*4882a593Smuzhiyun struct icm_tr_event_device_disconnected { 361*4882a593Smuzhiyun struct icm_pkg_header hdr; 362*4882a593Smuzhiyun u32 route_hi; 363*4882a593Smuzhiyun u32 route_lo; 364*4882a593Smuzhiyun }; 365*4882a593Smuzhiyun 366*4882a593Smuzhiyun struct icm_tr_event_xdomain_connected { 367*4882a593Smuzhiyun struct icm_pkg_header hdr; 368*4882a593Smuzhiyun u16 reserved; 369*4882a593Smuzhiyun u16 link_info; 370*4882a593Smuzhiyun uuid_t remote_uuid; 371*4882a593Smuzhiyun uuid_t local_uuid; 372*4882a593Smuzhiyun u32 local_route_hi; 373*4882a593Smuzhiyun u32 local_route_lo; 374*4882a593Smuzhiyun u32 remote_route_hi; 375*4882a593Smuzhiyun u32 remote_route_lo; 376*4882a593Smuzhiyun }; 377*4882a593Smuzhiyun 378*4882a593Smuzhiyun struct icm_tr_event_xdomain_disconnected { 379*4882a593Smuzhiyun struct icm_pkg_header hdr; 380*4882a593Smuzhiyun u32 route_hi; 381*4882a593Smuzhiyun u32 route_lo; 382*4882a593Smuzhiyun uuid_t remote_uuid; 383*4882a593Smuzhiyun }; 384*4882a593Smuzhiyun 385*4882a593Smuzhiyun struct icm_tr_pkg_approve_device { 386*4882a593Smuzhiyun struct icm_pkg_header hdr; 387*4882a593Smuzhiyun uuid_t ep_uuid; 388*4882a593Smuzhiyun u32 route_hi; 389*4882a593Smuzhiyun u32 route_lo; 390*4882a593Smuzhiyun u8 connection_id; 391*4882a593Smuzhiyun u8 reserved1[3]; 392*4882a593Smuzhiyun }; 393*4882a593Smuzhiyun 394*4882a593Smuzhiyun struct icm_tr_pkg_add_device_key { 395*4882a593Smuzhiyun struct icm_pkg_header hdr; 396*4882a593Smuzhiyun uuid_t ep_uuid; 397*4882a593Smuzhiyun u32 route_hi; 398*4882a593Smuzhiyun u32 route_lo; 399*4882a593Smuzhiyun u8 connection_id; 400*4882a593Smuzhiyun u8 reserved[3]; 401*4882a593Smuzhiyun u32 key[8]; 402*4882a593Smuzhiyun }; 403*4882a593Smuzhiyun 404*4882a593Smuzhiyun struct icm_tr_pkg_challenge_device { 405*4882a593Smuzhiyun struct icm_pkg_header hdr; 406*4882a593Smuzhiyun uuid_t ep_uuid; 407*4882a593Smuzhiyun u32 route_hi; 408*4882a593Smuzhiyun u32 route_lo; 409*4882a593Smuzhiyun u8 connection_id; 410*4882a593Smuzhiyun u8 reserved[3]; 411*4882a593Smuzhiyun u32 challenge[8]; 412*4882a593Smuzhiyun }; 413*4882a593Smuzhiyun 414*4882a593Smuzhiyun struct icm_tr_pkg_approve_xdomain { 415*4882a593Smuzhiyun struct icm_pkg_header hdr; 416*4882a593Smuzhiyun u32 route_hi; 417*4882a593Smuzhiyun u32 route_lo; 418*4882a593Smuzhiyun uuid_t remote_uuid; 419*4882a593Smuzhiyun u16 transmit_path; 420*4882a593Smuzhiyun u16 transmit_ring; 421*4882a593Smuzhiyun u16 receive_path; 422*4882a593Smuzhiyun u16 receive_ring; 423*4882a593Smuzhiyun }; 424*4882a593Smuzhiyun 425*4882a593Smuzhiyun struct icm_tr_pkg_disconnect_xdomain { 426*4882a593Smuzhiyun struct icm_pkg_header hdr; 427*4882a593Smuzhiyun u8 stage; 428*4882a593Smuzhiyun u8 reserved[3]; 429*4882a593Smuzhiyun u32 route_hi; 430*4882a593Smuzhiyun u32 route_lo; 431*4882a593Smuzhiyun uuid_t remote_uuid; 432*4882a593Smuzhiyun }; 433*4882a593Smuzhiyun 434*4882a593Smuzhiyun struct icm_tr_pkg_challenge_device_response { 435*4882a593Smuzhiyun struct icm_pkg_header hdr; 436*4882a593Smuzhiyun uuid_t ep_uuid; 437*4882a593Smuzhiyun u32 route_hi; 438*4882a593Smuzhiyun u32 route_lo; 439*4882a593Smuzhiyun u8 connection_id; 440*4882a593Smuzhiyun u8 reserved[3]; 441*4882a593Smuzhiyun u32 challenge[8]; 442*4882a593Smuzhiyun u32 response[8]; 443*4882a593Smuzhiyun }; 444*4882a593Smuzhiyun 445*4882a593Smuzhiyun struct icm_tr_pkg_add_device_key_response { 446*4882a593Smuzhiyun struct icm_pkg_header hdr; 447*4882a593Smuzhiyun uuid_t ep_uuid; 448*4882a593Smuzhiyun u32 route_hi; 449*4882a593Smuzhiyun u32 route_lo; 450*4882a593Smuzhiyun u8 connection_id; 451*4882a593Smuzhiyun u8 reserved[3]; 452*4882a593Smuzhiyun }; 453*4882a593Smuzhiyun 454*4882a593Smuzhiyun struct icm_tr_pkg_approve_xdomain_response { 455*4882a593Smuzhiyun struct icm_pkg_header hdr; 456*4882a593Smuzhiyun u32 route_hi; 457*4882a593Smuzhiyun u32 route_lo; 458*4882a593Smuzhiyun uuid_t remote_uuid; 459*4882a593Smuzhiyun u16 transmit_path; 460*4882a593Smuzhiyun u16 transmit_ring; 461*4882a593Smuzhiyun u16 receive_path; 462*4882a593Smuzhiyun u16 receive_ring; 463*4882a593Smuzhiyun }; 464*4882a593Smuzhiyun 465*4882a593Smuzhiyun struct icm_tr_pkg_disconnect_xdomain_response { 466*4882a593Smuzhiyun struct icm_pkg_header hdr; 467*4882a593Smuzhiyun u8 stage; 468*4882a593Smuzhiyun u8 reserved[3]; 469*4882a593Smuzhiyun u32 route_hi; 470*4882a593Smuzhiyun u32 route_lo; 471*4882a593Smuzhiyun uuid_t remote_uuid; 472*4882a593Smuzhiyun }; 473*4882a593Smuzhiyun 474*4882a593Smuzhiyun /* Ice Lake messages */ 475*4882a593Smuzhiyun 476*4882a593Smuzhiyun struct icm_icl_event_rtd3_veto { 477*4882a593Smuzhiyun struct icm_pkg_header hdr; 478*4882a593Smuzhiyun u32 veto_reason; 479*4882a593Smuzhiyun }; 480*4882a593Smuzhiyun 481*4882a593Smuzhiyun /* XDomain messages */ 482*4882a593Smuzhiyun 483*4882a593Smuzhiyun struct tb_xdomain_header { 484*4882a593Smuzhiyun u32 route_hi; 485*4882a593Smuzhiyun u32 route_lo; 486*4882a593Smuzhiyun u32 length_sn; 487*4882a593Smuzhiyun }; 488*4882a593Smuzhiyun 489*4882a593Smuzhiyun #define TB_XDOMAIN_LENGTH_MASK GENMASK(5, 0) 490*4882a593Smuzhiyun #define TB_XDOMAIN_SN_MASK GENMASK(28, 27) 491*4882a593Smuzhiyun #define TB_XDOMAIN_SN_SHIFT 27 492*4882a593Smuzhiyun 493*4882a593Smuzhiyun enum tb_xdp_type { 494*4882a593Smuzhiyun UUID_REQUEST_OLD = 1, 495*4882a593Smuzhiyun UUID_RESPONSE = 2, 496*4882a593Smuzhiyun PROPERTIES_REQUEST, 497*4882a593Smuzhiyun PROPERTIES_RESPONSE, 498*4882a593Smuzhiyun PROPERTIES_CHANGED_REQUEST, 499*4882a593Smuzhiyun PROPERTIES_CHANGED_RESPONSE, 500*4882a593Smuzhiyun ERROR_RESPONSE, 501*4882a593Smuzhiyun UUID_REQUEST = 12, 502*4882a593Smuzhiyun }; 503*4882a593Smuzhiyun 504*4882a593Smuzhiyun struct tb_xdp_header { 505*4882a593Smuzhiyun struct tb_xdomain_header xd_hdr; 506*4882a593Smuzhiyun uuid_t uuid; 507*4882a593Smuzhiyun u32 type; 508*4882a593Smuzhiyun }; 509*4882a593Smuzhiyun 510*4882a593Smuzhiyun struct tb_xdp_uuid { 511*4882a593Smuzhiyun struct tb_xdp_header hdr; 512*4882a593Smuzhiyun }; 513*4882a593Smuzhiyun 514*4882a593Smuzhiyun struct tb_xdp_uuid_response { 515*4882a593Smuzhiyun struct tb_xdp_header hdr; 516*4882a593Smuzhiyun uuid_t src_uuid; 517*4882a593Smuzhiyun u32 src_route_hi; 518*4882a593Smuzhiyun u32 src_route_lo; 519*4882a593Smuzhiyun }; 520*4882a593Smuzhiyun 521*4882a593Smuzhiyun struct tb_xdp_properties { 522*4882a593Smuzhiyun struct tb_xdp_header hdr; 523*4882a593Smuzhiyun uuid_t src_uuid; 524*4882a593Smuzhiyun uuid_t dst_uuid; 525*4882a593Smuzhiyun u16 offset; 526*4882a593Smuzhiyun u16 reserved; 527*4882a593Smuzhiyun }; 528*4882a593Smuzhiyun 529*4882a593Smuzhiyun struct tb_xdp_properties_response { 530*4882a593Smuzhiyun struct tb_xdp_header hdr; 531*4882a593Smuzhiyun uuid_t src_uuid; 532*4882a593Smuzhiyun uuid_t dst_uuid; 533*4882a593Smuzhiyun u16 offset; 534*4882a593Smuzhiyun u16 data_length; 535*4882a593Smuzhiyun u32 generation; 536*4882a593Smuzhiyun u32 data[0]; 537*4882a593Smuzhiyun }; 538*4882a593Smuzhiyun 539*4882a593Smuzhiyun /* 540*4882a593Smuzhiyun * Max length of data array single XDomain property response is allowed 541*4882a593Smuzhiyun * to carry. 542*4882a593Smuzhiyun */ 543*4882a593Smuzhiyun #define TB_XDP_PROPERTIES_MAX_DATA_LENGTH \ 544*4882a593Smuzhiyun (((256 - 4 - sizeof(struct tb_xdp_properties_response))) / 4) 545*4882a593Smuzhiyun 546*4882a593Smuzhiyun /* Maximum size of the total property block in dwords we allow */ 547*4882a593Smuzhiyun #define TB_XDP_PROPERTIES_MAX_LENGTH 500 548*4882a593Smuzhiyun 549*4882a593Smuzhiyun struct tb_xdp_properties_changed { 550*4882a593Smuzhiyun struct tb_xdp_header hdr; 551*4882a593Smuzhiyun uuid_t src_uuid; 552*4882a593Smuzhiyun }; 553*4882a593Smuzhiyun 554*4882a593Smuzhiyun struct tb_xdp_properties_changed_response { 555*4882a593Smuzhiyun struct tb_xdp_header hdr; 556*4882a593Smuzhiyun }; 557*4882a593Smuzhiyun 558*4882a593Smuzhiyun enum tb_xdp_error { 559*4882a593Smuzhiyun ERROR_SUCCESS, 560*4882a593Smuzhiyun ERROR_UNKNOWN_PACKET, 561*4882a593Smuzhiyun ERROR_UNKNOWN_DOMAIN, 562*4882a593Smuzhiyun ERROR_NOT_SUPPORTED, 563*4882a593Smuzhiyun ERROR_NOT_READY, 564*4882a593Smuzhiyun }; 565*4882a593Smuzhiyun 566*4882a593Smuzhiyun struct tb_xdp_error_response { 567*4882a593Smuzhiyun struct tb_xdp_header hdr; 568*4882a593Smuzhiyun u32 error; 569*4882a593Smuzhiyun }; 570*4882a593Smuzhiyun 571*4882a593Smuzhiyun #endif 572