xref: /OK3568_Linux_fs/kernel/drivers/thermal/zx2967_thermal.c (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0-only
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun  * ZTE's zx2967 family thermal sensor driver
4*4882a593Smuzhiyun  *
5*4882a593Smuzhiyun  * Copyright (C) 2017 ZTE Ltd.
6*4882a593Smuzhiyun  *
7*4882a593Smuzhiyun  * Author: Baoyou Xie <baoyou.xie@linaro.org>
8*4882a593Smuzhiyun  */
9*4882a593Smuzhiyun 
10*4882a593Smuzhiyun #include <linux/clk.h>
11*4882a593Smuzhiyun #include <linux/device.h>
12*4882a593Smuzhiyun #include <linux/err.h>
13*4882a593Smuzhiyun #include <linux/iopoll.h>
14*4882a593Smuzhiyun #include <linux/module.h>
15*4882a593Smuzhiyun #include <linux/platform_device.h>
16*4882a593Smuzhiyun #include <linux/thermal.h>
17*4882a593Smuzhiyun 
18*4882a593Smuzhiyun /* Power Mode: 0->low 1->high */
19*4882a593Smuzhiyun #define ZX2967_THERMAL_POWER_MODE	0
20*4882a593Smuzhiyun #define ZX2967_POWER_MODE_LOW		0
21*4882a593Smuzhiyun #define ZX2967_POWER_MODE_HIGH		1
22*4882a593Smuzhiyun 
23*4882a593Smuzhiyun /* DCF Control Register */
24*4882a593Smuzhiyun #define ZX2967_THERMAL_DCF		0x4
25*4882a593Smuzhiyun #define ZX2967_DCF_EN			BIT(1)
26*4882a593Smuzhiyun #define ZX2967_DCF_FREEZE		BIT(0)
27*4882a593Smuzhiyun 
28*4882a593Smuzhiyun /* Selection Register */
29*4882a593Smuzhiyun #define ZX2967_THERMAL_SEL		0x8
30*4882a593Smuzhiyun 
31*4882a593Smuzhiyun /* Control Register */
32*4882a593Smuzhiyun #define ZX2967_THERMAL_CTRL		0x10
33*4882a593Smuzhiyun 
34*4882a593Smuzhiyun #define ZX2967_THERMAL_READY		BIT(12)
35*4882a593Smuzhiyun #define ZX2967_THERMAL_TEMP_MASK	GENMASK(11, 0)
36*4882a593Smuzhiyun #define ZX2967_THERMAL_ID_MASK		0x18
37*4882a593Smuzhiyun #define ZX2967_THERMAL_ID		0x10
38*4882a593Smuzhiyun 
39*4882a593Smuzhiyun #define ZX2967_GET_TEMP_TIMEOUT_US	(100 * 1024)
40*4882a593Smuzhiyun 
41*4882a593Smuzhiyun /**
42*4882a593Smuzhiyun  * struct zx2967_thermal_priv - zx2967 thermal sensor private structure
43*4882a593Smuzhiyun  * @tzd: struct thermal_zone_device where the sensor is registered
44*4882a593Smuzhiyun  * @lock: prevents read sensor in parallel
45*4882a593Smuzhiyun  * @clk_topcrm: topcrm clk structure
46*4882a593Smuzhiyun  * @clk_apb: apb clk structure
47*4882a593Smuzhiyun  * @regs: pointer to base address of the thermal sensor
48*4882a593Smuzhiyun  * @dev: struct device pointer
49*4882a593Smuzhiyun  */
50*4882a593Smuzhiyun 
51*4882a593Smuzhiyun struct zx2967_thermal_priv {
52*4882a593Smuzhiyun 	struct thermal_zone_device	*tzd;
53*4882a593Smuzhiyun 	struct mutex			lock;
54*4882a593Smuzhiyun 	struct clk			*clk_topcrm;
55*4882a593Smuzhiyun 	struct clk			*clk_apb;
56*4882a593Smuzhiyun 	void __iomem			*regs;
57*4882a593Smuzhiyun 	struct device			*dev;
58*4882a593Smuzhiyun };
59*4882a593Smuzhiyun 
zx2967_thermal_get_temp(void * data,int * temp)60*4882a593Smuzhiyun static int zx2967_thermal_get_temp(void *data, int *temp)
61*4882a593Smuzhiyun {
62*4882a593Smuzhiyun 	void __iomem *regs;
63*4882a593Smuzhiyun 	struct zx2967_thermal_priv *priv = data;
64*4882a593Smuzhiyun 	u32 val;
65*4882a593Smuzhiyun 	int ret;
66*4882a593Smuzhiyun 
67*4882a593Smuzhiyun 	if (!priv->tzd)
68*4882a593Smuzhiyun 		return -EAGAIN;
69*4882a593Smuzhiyun 
70*4882a593Smuzhiyun 	regs = priv->regs;
71*4882a593Smuzhiyun 	mutex_lock(&priv->lock);
72*4882a593Smuzhiyun 	writel_relaxed(ZX2967_POWER_MODE_LOW,
73*4882a593Smuzhiyun 		       regs + ZX2967_THERMAL_POWER_MODE);
74*4882a593Smuzhiyun 	writel_relaxed(ZX2967_DCF_EN, regs + ZX2967_THERMAL_DCF);
75*4882a593Smuzhiyun 
76*4882a593Smuzhiyun 	val = readl_relaxed(regs + ZX2967_THERMAL_SEL);
77*4882a593Smuzhiyun 	val &= ~ZX2967_THERMAL_ID_MASK;
78*4882a593Smuzhiyun 	val |= ZX2967_THERMAL_ID;
79*4882a593Smuzhiyun 	writel_relaxed(val, regs + ZX2967_THERMAL_SEL);
80*4882a593Smuzhiyun 
81*4882a593Smuzhiyun 	/*
82*4882a593Smuzhiyun 	 * Must wait for a while, surely it's a bit odd.
83*4882a593Smuzhiyun 	 * otherwise temperature value we got has a few deviation, even if
84*4882a593Smuzhiyun 	 * the THERMAL_READY bit is set.
85*4882a593Smuzhiyun 	 */
86*4882a593Smuzhiyun 	usleep_range(100, 300);
87*4882a593Smuzhiyun 	ret = readx_poll_timeout(readl, regs + ZX2967_THERMAL_CTRL,
88*4882a593Smuzhiyun 				 val, val & ZX2967_THERMAL_READY, 300,
89*4882a593Smuzhiyun 				 ZX2967_GET_TEMP_TIMEOUT_US);
90*4882a593Smuzhiyun 	if (ret) {
91*4882a593Smuzhiyun 		dev_err(priv->dev, "Thermal sensor data timeout\n");
92*4882a593Smuzhiyun 		goto unlock;
93*4882a593Smuzhiyun 	}
94*4882a593Smuzhiyun 
95*4882a593Smuzhiyun 	writel_relaxed(ZX2967_DCF_FREEZE | ZX2967_DCF_EN,
96*4882a593Smuzhiyun 		       regs + ZX2967_THERMAL_DCF);
97*4882a593Smuzhiyun 	val = readl_relaxed(regs + ZX2967_THERMAL_CTRL)
98*4882a593Smuzhiyun 			 & ZX2967_THERMAL_TEMP_MASK;
99*4882a593Smuzhiyun 	writel_relaxed(ZX2967_POWER_MODE_HIGH,
100*4882a593Smuzhiyun 		       regs + ZX2967_THERMAL_POWER_MODE);
101*4882a593Smuzhiyun 
102*4882a593Smuzhiyun 	/*
103*4882a593Smuzhiyun 	 * Calculate temperature
104*4882a593Smuzhiyun 	 * In dts, slope is multiplied by 1000.
105*4882a593Smuzhiyun 	 */
106*4882a593Smuzhiyun 	*temp = DIV_ROUND_CLOSEST(((s32)val + priv->tzd->tzp->offset) * 1000,
107*4882a593Smuzhiyun 				  priv->tzd->tzp->slope);
108*4882a593Smuzhiyun 
109*4882a593Smuzhiyun unlock:
110*4882a593Smuzhiyun 	mutex_unlock(&priv->lock);
111*4882a593Smuzhiyun 	return ret;
112*4882a593Smuzhiyun }
113*4882a593Smuzhiyun 
114*4882a593Smuzhiyun static const struct thermal_zone_of_device_ops zx2967_of_thermal_ops = {
115*4882a593Smuzhiyun 	.get_temp = zx2967_thermal_get_temp,
116*4882a593Smuzhiyun };
117*4882a593Smuzhiyun 
zx2967_thermal_probe(struct platform_device * pdev)118*4882a593Smuzhiyun static int zx2967_thermal_probe(struct platform_device *pdev)
119*4882a593Smuzhiyun {
120*4882a593Smuzhiyun 	struct zx2967_thermal_priv *priv;
121*4882a593Smuzhiyun 	struct resource *res;
122*4882a593Smuzhiyun 	int ret;
123*4882a593Smuzhiyun 
124*4882a593Smuzhiyun 	priv = devm_kzalloc(&pdev->dev, sizeof(*priv), GFP_KERNEL);
125*4882a593Smuzhiyun 	if (!priv)
126*4882a593Smuzhiyun 		return -ENOMEM;
127*4882a593Smuzhiyun 
128*4882a593Smuzhiyun 	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
129*4882a593Smuzhiyun 	priv->regs = devm_ioremap_resource(&pdev->dev, res);
130*4882a593Smuzhiyun 	if (IS_ERR(priv->regs))
131*4882a593Smuzhiyun 		return PTR_ERR(priv->regs);
132*4882a593Smuzhiyun 
133*4882a593Smuzhiyun 	priv->clk_topcrm = devm_clk_get(&pdev->dev, "topcrm");
134*4882a593Smuzhiyun 	if (IS_ERR(priv->clk_topcrm)) {
135*4882a593Smuzhiyun 		ret = PTR_ERR(priv->clk_topcrm);
136*4882a593Smuzhiyun 		dev_err(&pdev->dev, "failed to get topcrm clock: %d\n", ret);
137*4882a593Smuzhiyun 		return ret;
138*4882a593Smuzhiyun 	}
139*4882a593Smuzhiyun 
140*4882a593Smuzhiyun 	ret = clk_prepare_enable(priv->clk_topcrm);
141*4882a593Smuzhiyun 	if (ret) {
142*4882a593Smuzhiyun 		dev_err(&pdev->dev, "failed to enable topcrm clock: %d\n",
143*4882a593Smuzhiyun 			ret);
144*4882a593Smuzhiyun 		return ret;
145*4882a593Smuzhiyun 	}
146*4882a593Smuzhiyun 
147*4882a593Smuzhiyun 	priv->clk_apb = devm_clk_get(&pdev->dev, "apb");
148*4882a593Smuzhiyun 	if (IS_ERR(priv->clk_apb)) {
149*4882a593Smuzhiyun 		ret = PTR_ERR(priv->clk_apb);
150*4882a593Smuzhiyun 		dev_err(&pdev->dev, "failed to get apb clock: %d\n", ret);
151*4882a593Smuzhiyun 		goto disable_clk_topcrm;
152*4882a593Smuzhiyun 	}
153*4882a593Smuzhiyun 
154*4882a593Smuzhiyun 	ret = clk_prepare_enable(priv->clk_apb);
155*4882a593Smuzhiyun 	if (ret) {
156*4882a593Smuzhiyun 		dev_err(&pdev->dev, "failed to enable apb clock: %d\n",
157*4882a593Smuzhiyun 			ret);
158*4882a593Smuzhiyun 		goto disable_clk_topcrm;
159*4882a593Smuzhiyun 	}
160*4882a593Smuzhiyun 
161*4882a593Smuzhiyun 	mutex_init(&priv->lock);
162*4882a593Smuzhiyun 	priv->tzd = thermal_zone_of_sensor_register(&pdev->dev,
163*4882a593Smuzhiyun 					0, priv, &zx2967_of_thermal_ops);
164*4882a593Smuzhiyun 
165*4882a593Smuzhiyun 	if (IS_ERR(priv->tzd)) {
166*4882a593Smuzhiyun 		ret = PTR_ERR(priv->tzd);
167*4882a593Smuzhiyun 		dev_err(&pdev->dev, "failed to register sensor: %d\n", ret);
168*4882a593Smuzhiyun 		goto disable_clk_all;
169*4882a593Smuzhiyun 	}
170*4882a593Smuzhiyun 
171*4882a593Smuzhiyun 	if (priv->tzd->tzp->slope == 0) {
172*4882a593Smuzhiyun 		thermal_zone_of_sensor_unregister(&pdev->dev, priv->tzd);
173*4882a593Smuzhiyun 		dev_err(&pdev->dev, "coefficients of sensor is invalid\n");
174*4882a593Smuzhiyun 		ret = -EINVAL;
175*4882a593Smuzhiyun 		goto disable_clk_all;
176*4882a593Smuzhiyun 	}
177*4882a593Smuzhiyun 
178*4882a593Smuzhiyun 	priv->dev = &pdev->dev;
179*4882a593Smuzhiyun 	platform_set_drvdata(pdev, priv);
180*4882a593Smuzhiyun 
181*4882a593Smuzhiyun 	return 0;
182*4882a593Smuzhiyun 
183*4882a593Smuzhiyun disable_clk_all:
184*4882a593Smuzhiyun 	clk_disable_unprepare(priv->clk_apb);
185*4882a593Smuzhiyun disable_clk_topcrm:
186*4882a593Smuzhiyun 	clk_disable_unprepare(priv->clk_topcrm);
187*4882a593Smuzhiyun 	return ret;
188*4882a593Smuzhiyun }
189*4882a593Smuzhiyun 
zx2967_thermal_exit(struct platform_device * pdev)190*4882a593Smuzhiyun static int zx2967_thermal_exit(struct platform_device *pdev)
191*4882a593Smuzhiyun {
192*4882a593Smuzhiyun 	struct zx2967_thermal_priv *priv = platform_get_drvdata(pdev);
193*4882a593Smuzhiyun 
194*4882a593Smuzhiyun 	thermal_zone_of_sensor_unregister(&pdev->dev, priv->tzd);
195*4882a593Smuzhiyun 	clk_disable_unprepare(priv->clk_topcrm);
196*4882a593Smuzhiyun 	clk_disable_unprepare(priv->clk_apb);
197*4882a593Smuzhiyun 
198*4882a593Smuzhiyun 	return 0;
199*4882a593Smuzhiyun }
200*4882a593Smuzhiyun 
201*4882a593Smuzhiyun static const struct of_device_id zx2967_thermal_id_table[] = {
202*4882a593Smuzhiyun 	{ .compatible = "zte,zx296718-thermal" },
203*4882a593Smuzhiyun 	{}
204*4882a593Smuzhiyun };
205*4882a593Smuzhiyun MODULE_DEVICE_TABLE(of, zx2967_thermal_id_table);
206*4882a593Smuzhiyun 
207*4882a593Smuzhiyun #ifdef CONFIG_PM_SLEEP
zx2967_thermal_suspend(struct device * dev)208*4882a593Smuzhiyun static int zx2967_thermal_suspend(struct device *dev)
209*4882a593Smuzhiyun {
210*4882a593Smuzhiyun 	struct zx2967_thermal_priv *priv = dev_get_drvdata(dev);
211*4882a593Smuzhiyun 
212*4882a593Smuzhiyun 	if (priv && priv->clk_topcrm)
213*4882a593Smuzhiyun 		clk_disable_unprepare(priv->clk_topcrm);
214*4882a593Smuzhiyun 
215*4882a593Smuzhiyun 	if (priv && priv->clk_apb)
216*4882a593Smuzhiyun 		clk_disable_unprepare(priv->clk_apb);
217*4882a593Smuzhiyun 
218*4882a593Smuzhiyun 	return 0;
219*4882a593Smuzhiyun }
220*4882a593Smuzhiyun 
zx2967_thermal_resume(struct device * dev)221*4882a593Smuzhiyun static int zx2967_thermal_resume(struct device *dev)
222*4882a593Smuzhiyun {
223*4882a593Smuzhiyun 	struct zx2967_thermal_priv *priv = dev_get_drvdata(dev);
224*4882a593Smuzhiyun 	int error;
225*4882a593Smuzhiyun 
226*4882a593Smuzhiyun 	error = clk_prepare_enable(priv->clk_topcrm);
227*4882a593Smuzhiyun 	if (error)
228*4882a593Smuzhiyun 		return error;
229*4882a593Smuzhiyun 
230*4882a593Smuzhiyun 	error = clk_prepare_enable(priv->clk_apb);
231*4882a593Smuzhiyun 	if (error) {
232*4882a593Smuzhiyun 		clk_disable_unprepare(priv->clk_topcrm);
233*4882a593Smuzhiyun 		return error;
234*4882a593Smuzhiyun 	}
235*4882a593Smuzhiyun 
236*4882a593Smuzhiyun 	return 0;
237*4882a593Smuzhiyun }
238*4882a593Smuzhiyun #endif
239*4882a593Smuzhiyun 
240*4882a593Smuzhiyun static SIMPLE_DEV_PM_OPS(zx2967_thermal_pm_ops,
241*4882a593Smuzhiyun 			 zx2967_thermal_suspend, zx2967_thermal_resume);
242*4882a593Smuzhiyun 
243*4882a593Smuzhiyun static struct platform_driver zx2967_thermal_driver = {
244*4882a593Smuzhiyun 	.probe = zx2967_thermal_probe,
245*4882a593Smuzhiyun 	.remove = zx2967_thermal_exit,
246*4882a593Smuzhiyun 	.driver = {
247*4882a593Smuzhiyun 		.name = "zx2967_thermal",
248*4882a593Smuzhiyun 		.of_match_table = zx2967_thermal_id_table,
249*4882a593Smuzhiyun 		.pm = &zx2967_thermal_pm_ops,
250*4882a593Smuzhiyun 	},
251*4882a593Smuzhiyun };
252*4882a593Smuzhiyun module_platform_driver(zx2967_thermal_driver);
253*4882a593Smuzhiyun 
254*4882a593Smuzhiyun MODULE_AUTHOR("Baoyou Xie <baoyou.xie@linaro.org>");
255*4882a593Smuzhiyun MODULE_DESCRIPTION("ZTE zx2967 thermal driver");
256*4882a593Smuzhiyun MODULE_LICENSE("GPL v2");
257