1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0-only 2*4882a593Smuzhiyun /* 3*4882a593Smuzhiyun * OMAP5 thermal driver. 4*4882a593Smuzhiyun * 5*4882a593Smuzhiyun * Copyright (C) 2011-2012 Texas Instruments Inc. 6*4882a593Smuzhiyun * Contact: 7*4882a593Smuzhiyun * Eduardo Valentin <eduardo.valentin@ti.com> 8*4882a593Smuzhiyun */ 9*4882a593Smuzhiyun 10*4882a593Smuzhiyun #include "ti-thermal.h" 11*4882a593Smuzhiyun #include "ti-bandgap.h" 12*4882a593Smuzhiyun #include "omap5xxx-bandgap.h" 13*4882a593Smuzhiyun 14*4882a593Smuzhiyun /* 15*4882a593Smuzhiyun * OMAP5430 has three instances of thermal sensor for MPU, GPU & CORE, 16*4882a593Smuzhiyun * need to describe the individual registers and bit fields. 17*4882a593Smuzhiyun */ 18*4882a593Smuzhiyun 19*4882a593Smuzhiyun /* 20*4882a593Smuzhiyun * OMAP5430 MPU thermal sensor register offset and bit-fields 21*4882a593Smuzhiyun */ 22*4882a593Smuzhiyun static struct temp_sensor_registers 23*4882a593Smuzhiyun omap5430_mpu_temp_sensor_registers = { 24*4882a593Smuzhiyun .temp_sensor_ctrl = OMAP5430_TEMP_SENSOR_MPU_OFFSET, 25*4882a593Smuzhiyun .bgap_tempsoff_mask = OMAP5430_BGAP_TEMPSOFF_MASK, 26*4882a593Smuzhiyun .bgap_eocz_mask = OMAP5430_BGAP_TEMP_SENSOR_EOCZ_MASK, 27*4882a593Smuzhiyun .bgap_dtemp_mask = OMAP5430_BGAP_TEMP_SENSOR_DTEMP_MASK, 28*4882a593Smuzhiyun 29*4882a593Smuzhiyun .bgap_mask_ctrl = OMAP5430_BGAP_CTRL_OFFSET, 30*4882a593Smuzhiyun .mask_hot_mask = OMAP5430_MASK_HOT_MPU_MASK, 31*4882a593Smuzhiyun .mask_cold_mask = OMAP5430_MASK_COLD_MPU_MASK, 32*4882a593Smuzhiyun .mask_counter_delay_mask = OMAP5430_MASK_COUNTER_DELAY_MASK, 33*4882a593Smuzhiyun .mask_freeze_mask = OMAP5430_MASK_FREEZE_MPU_MASK, 34*4882a593Smuzhiyun 35*4882a593Smuzhiyun .bgap_counter = OMAP5430_BGAP_CTRL_OFFSET, 36*4882a593Smuzhiyun .counter_mask = OMAP5430_COUNTER_MASK, 37*4882a593Smuzhiyun 38*4882a593Smuzhiyun .bgap_threshold = OMAP5430_BGAP_THRESHOLD_MPU_OFFSET, 39*4882a593Smuzhiyun .threshold_thot_mask = OMAP5430_T_HOT_MASK, 40*4882a593Smuzhiyun .threshold_tcold_mask = OMAP5430_T_COLD_MASK, 41*4882a593Smuzhiyun 42*4882a593Smuzhiyun .tshut_threshold = OMAP5430_BGAP_TSHUT_MPU_OFFSET, 43*4882a593Smuzhiyun .tshut_hot_mask = OMAP5430_TSHUT_HOT_MASK, 44*4882a593Smuzhiyun .tshut_cold_mask = OMAP5430_TSHUT_COLD_MASK, 45*4882a593Smuzhiyun 46*4882a593Smuzhiyun .bgap_status = OMAP5430_BGAP_STATUS_OFFSET, 47*4882a593Smuzhiyun .status_hot_mask = OMAP5430_HOT_MPU_FLAG_MASK, 48*4882a593Smuzhiyun .status_cold_mask = OMAP5430_COLD_MPU_FLAG_MASK, 49*4882a593Smuzhiyun 50*4882a593Smuzhiyun .ctrl_dtemp_1 = OMAP5430_BGAP_DTEMP_MPU_1_OFFSET, 51*4882a593Smuzhiyun .ctrl_dtemp_2 = OMAP5430_BGAP_DTEMP_MPU_2_OFFSET, 52*4882a593Smuzhiyun .bgap_efuse = OMAP5430_FUSE_OPP_BGAP_MPU, 53*4882a593Smuzhiyun }; 54*4882a593Smuzhiyun 55*4882a593Smuzhiyun /* 56*4882a593Smuzhiyun * OMAP5430 GPU thermal sensor register offset and bit-fields 57*4882a593Smuzhiyun */ 58*4882a593Smuzhiyun static struct temp_sensor_registers 59*4882a593Smuzhiyun omap5430_gpu_temp_sensor_registers = { 60*4882a593Smuzhiyun .temp_sensor_ctrl = OMAP5430_TEMP_SENSOR_GPU_OFFSET, 61*4882a593Smuzhiyun .bgap_tempsoff_mask = OMAP5430_BGAP_TEMPSOFF_MASK, 62*4882a593Smuzhiyun .bgap_eocz_mask = OMAP5430_BGAP_TEMP_SENSOR_EOCZ_MASK, 63*4882a593Smuzhiyun .bgap_dtemp_mask = OMAP5430_BGAP_TEMP_SENSOR_DTEMP_MASK, 64*4882a593Smuzhiyun 65*4882a593Smuzhiyun .bgap_mask_ctrl = OMAP5430_BGAP_CTRL_OFFSET, 66*4882a593Smuzhiyun .mask_hot_mask = OMAP5430_MASK_HOT_GPU_MASK, 67*4882a593Smuzhiyun .mask_cold_mask = OMAP5430_MASK_COLD_GPU_MASK, 68*4882a593Smuzhiyun .mask_counter_delay_mask = OMAP5430_MASK_COUNTER_DELAY_MASK, 69*4882a593Smuzhiyun .mask_freeze_mask = OMAP5430_MASK_FREEZE_GPU_MASK, 70*4882a593Smuzhiyun 71*4882a593Smuzhiyun .bgap_counter = OMAP5430_BGAP_CTRL_OFFSET, 72*4882a593Smuzhiyun .counter_mask = OMAP5430_COUNTER_MASK, 73*4882a593Smuzhiyun 74*4882a593Smuzhiyun .bgap_threshold = OMAP5430_BGAP_THRESHOLD_GPU_OFFSET, 75*4882a593Smuzhiyun .threshold_thot_mask = OMAP5430_T_HOT_MASK, 76*4882a593Smuzhiyun .threshold_tcold_mask = OMAP5430_T_COLD_MASK, 77*4882a593Smuzhiyun 78*4882a593Smuzhiyun .tshut_threshold = OMAP5430_BGAP_TSHUT_GPU_OFFSET, 79*4882a593Smuzhiyun .tshut_hot_mask = OMAP5430_TSHUT_HOT_MASK, 80*4882a593Smuzhiyun .tshut_cold_mask = OMAP5430_TSHUT_COLD_MASK, 81*4882a593Smuzhiyun 82*4882a593Smuzhiyun .bgap_status = OMAP5430_BGAP_STATUS_OFFSET, 83*4882a593Smuzhiyun .status_hot_mask = OMAP5430_HOT_GPU_FLAG_MASK, 84*4882a593Smuzhiyun .status_cold_mask = OMAP5430_COLD_GPU_FLAG_MASK, 85*4882a593Smuzhiyun 86*4882a593Smuzhiyun .ctrl_dtemp_1 = OMAP5430_BGAP_DTEMP_GPU_1_OFFSET, 87*4882a593Smuzhiyun .ctrl_dtemp_2 = OMAP5430_BGAP_DTEMP_GPU_2_OFFSET, 88*4882a593Smuzhiyun 89*4882a593Smuzhiyun .bgap_efuse = OMAP5430_FUSE_OPP_BGAP_GPU, 90*4882a593Smuzhiyun }; 91*4882a593Smuzhiyun 92*4882a593Smuzhiyun /* 93*4882a593Smuzhiyun * OMAP5430 CORE thermal sensor register offset and bit-fields 94*4882a593Smuzhiyun */ 95*4882a593Smuzhiyun static struct temp_sensor_registers 96*4882a593Smuzhiyun omap5430_core_temp_sensor_registers = { 97*4882a593Smuzhiyun .temp_sensor_ctrl = OMAP5430_TEMP_SENSOR_CORE_OFFSET, 98*4882a593Smuzhiyun .bgap_tempsoff_mask = OMAP5430_BGAP_TEMPSOFF_MASK, 99*4882a593Smuzhiyun .bgap_eocz_mask = OMAP5430_BGAP_TEMP_SENSOR_EOCZ_MASK, 100*4882a593Smuzhiyun .bgap_dtemp_mask = OMAP5430_BGAP_TEMP_SENSOR_DTEMP_MASK, 101*4882a593Smuzhiyun 102*4882a593Smuzhiyun .bgap_mask_ctrl = OMAP5430_BGAP_CTRL_OFFSET, 103*4882a593Smuzhiyun .mask_hot_mask = OMAP5430_MASK_HOT_CORE_MASK, 104*4882a593Smuzhiyun .mask_cold_mask = OMAP5430_MASK_COLD_CORE_MASK, 105*4882a593Smuzhiyun .mask_counter_delay_mask = OMAP5430_MASK_COUNTER_DELAY_MASK, 106*4882a593Smuzhiyun .mask_freeze_mask = OMAP5430_MASK_FREEZE_CORE_MASK, 107*4882a593Smuzhiyun 108*4882a593Smuzhiyun .bgap_counter = OMAP5430_BGAP_CTRL_OFFSET, 109*4882a593Smuzhiyun .counter_mask = OMAP5430_COUNTER_MASK, 110*4882a593Smuzhiyun 111*4882a593Smuzhiyun .bgap_threshold = OMAP5430_BGAP_THRESHOLD_CORE_OFFSET, 112*4882a593Smuzhiyun .threshold_thot_mask = OMAP5430_T_HOT_MASK, 113*4882a593Smuzhiyun .threshold_tcold_mask = OMAP5430_T_COLD_MASK, 114*4882a593Smuzhiyun 115*4882a593Smuzhiyun .tshut_threshold = OMAP5430_BGAP_TSHUT_CORE_OFFSET, 116*4882a593Smuzhiyun .tshut_hot_mask = OMAP5430_TSHUT_HOT_MASK, 117*4882a593Smuzhiyun .tshut_cold_mask = OMAP5430_TSHUT_COLD_MASK, 118*4882a593Smuzhiyun 119*4882a593Smuzhiyun .bgap_status = OMAP5430_BGAP_STATUS_OFFSET, 120*4882a593Smuzhiyun .status_hot_mask = OMAP5430_HOT_CORE_FLAG_MASK, 121*4882a593Smuzhiyun .status_cold_mask = OMAP5430_COLD_CORE_FLAG_MASK, 122*4882a593Smuzhiyun 123*4882a593Smuzhiyun .ctrl_dtemp_1 = OMAP5430_BGAP_DTEMP_CORE_1_OFFSET, 124*4882a593Smuzhiyun .ctrl_dtemp_2 = OMAP5430_BGAP_DTEMP_CORE_2_OFFSET, 125*4882a593Smuzhiyun 126*4882a593Smuzhiyun .bgap_efuse = OMAP5430_FUSE_OPP_BGAP_CORE, 127*4882a593Smuzhiyun }; 128*4882a593Smuzhiyun 129*4882a593Smuzhiyun /* Thresholds and limits for OMAP5430 MPU temperature sensor */ 130*4882a593Smuzhiyun static struct temp_sensor_data omap5430_mpu_temp_sensor_data = { 131*4882a593Smuzhiyun .tshut_hot = OMAP5430_MPU_TSHUT_HOT, 132*4882a593Smuzhiyun .tshut_cold = OMAP5430_MPU_TSHUT_COLD, 133*4882a593Smuzhiyun .t_hot = OMAP5430_MPU_T_HOT, 134*4882a593Smuzhiyun .t_cold = OMAP5430_MPU_T_COLD, 135*4882a593Smuzhiyun .min_freq = OMAP5430_MPU_MIN_FREQ, 136*4882a593Smuzhiyun .max_freq = OMAP5430_MPU_MAX_FREQ, 137*4882a593Smuzhiyun }; 138*4882a593Smuzhiyun 139*4882a593Smuzhiyun /* Thresholds and limits for OMAP5430 GPU temperature sensor */ 140*4882a593Smuzhiyun static struct temp_sensor_data omap5430_gpu_temp_sensor_data = { 141*4882a593Smuzhiyun .tshut_hot = OMAP5430_GPU_TSHUT_HOT, 142*4882a593Smuzhiyun .tshut_cold = OMAP5430_GPU_TSHUT_COLD, 143*4882a593Smuzhiyun .t_hot = OMAP5430_GPU_T_HOT, 144*4882a593Smuzhiyun .t_cold = OMAP5430_GPU_T_COLD, 145*4882a593Smuzhiyun .min_freq = OMAP5430_GPU_MIN_FREQ, 146*4882a593Smuzhiyun .max_freq = OMAP5430_GPU_MAX_FREQ, 147*4882a593Smuzhiyun }; 148*4882a593Smuzhiyun 149*4882a593Smuzhiyun /* Thresholds and limits for OMAP5430 CORE temperature sensor */ 150*4882a593Smuzhiyun static struct temp_sensor_data omap5430_core_temp_sensor_data = { 151*4882a593Smuzhiyun .tshut_hot = OMAP5430_CORE_TSHUT_HOT, 152*4882a593Smuzhiyun .tshut_cold = OMAP5430_CORE_TSHUT_COLD, 153*4882a593Smuzhiyun .t_hot = OMAP5430_CORE_T_HOT, 154*4882a593Smuzhiyun .t_cold = OMAP5430_CORE_T_COLD, 155*4882a593Smuzhiyun .min_freq = OMAP5430_CORE_MIN_FREQ, 156*4882a593Smuzhiyun .max_freq = OMAP5430_CORE_MAX_FREQ, 157*4882a593Smuzhiyun }; 158*4882a593Smuzhiyun 159*4882a593Smuzhiyun /* 160*4882a593Smuzhiyun * OMAP54xx ES2.0 : Temperature values in milli degree celsius 161*4882a593Smuzhiyun * ADC code values from 540 to 945 162*4882a593Smuzhiyun */ 163*4882a593Smuzhiyun static int 164*4882a593Smuzhiyun omap5430_adc_to_temp[ 165*4882a593Smuzhiyun OMAP5430_ADC_END_VALUE - OMAP5430_ADC_START_VALUE + 1] = { 166*4882a593Smuzhiyun /* Index 540 - 549 */ 167*4882a593Smuzhiyun -40000, -40000, -40000, -40000, -39800, -39400, -39000, -38600, -38200, 168*4882a593Smuzhiyun -37800, 169*4882a593Smuzhiyun /* Index 550 - 559 */ 170*4882a593Smuzhiyun -37400, -37000, -36600, -36200, -35800, -35300, -34700, -34200, -33800, 171*4882a593Smuzhiyun -33400, 172*4882a593Smuzhiyun /* Index 560 - 569 */ 173*4882a593Smuzhiyun -33000, -32600, -32200, -31800, -31400, -31000, -30600, -30200, -29800, 174*4882a593Smuzhiyun -29400, 175*4882a593Smuzhiyun /* Index 570 - 579 */ 176*4882a593Smuzhiyun -29000, -28600, -28200, -27700, -27100, -26600, -26200, -25800, -25400, 177*4882a593Smuzhiyun -25000, 178*4882a593Smuzhiyun /* Index 580 - 589 */ 179*4882a593Smuzhiyun -24600, -24200, -23800, -23400, -23000, -22600, -22200, -21600, -21400, 180*4882a593Smuzhiyun -21000, 181*4882a593Smuzhiyun /* Index 590 - 599 */ 182*4882a593Smuzhiyun -20500, -19900, -19400, -19000, -18600, -18200, -17800, -17400, -17000, 183*4882a593Smuzhiyun -16600, 184*4882a593Smuzhiyun /* Index 600 - 609 */ 185*4882a593Smuzhiyun -16200, -15800, -15400, -15000, -14600, -14200, -13800, -13400, -13000, 186*4882a593Smuzhiyun -12500, 187*4882a593Smuzhiyun /* Index 610 - 619 */ 188*4882a593Smuzhiyun -11900, -11400, -11000, -10600, -10200, -9800, -9400, -9000, -8600, 189*4882a593Smuzhiyun -8200, 190*4882a593Smuzhiyun /* Index 620 - 629 */ 191*4882a593Smuzhiyun -7800, -7400, -7000, -6600, -6200, -5800, -5400, -5000, -4500, -3900, 192*4882a593Smuzhiyun /* Index 630 - 639 */ 193*4882a593Smuzhiyun -3400, -3000, -2600, -2200, -1800, -1400, -1000, -600, -200, 200, 194*4882a593Smuzhiyun /* Index 640 - 649 */ 195*4882a593Smuzhiyun 600, 1000, 1400, 1800, 2200, 2600, 3000, 3400, 3900, 4500, 196*4882a593Smuzhiyun /* Index 650 - 659 */ 197*4882a593Smuzhiyun 5000, 5400, 5800, 6200, 6600, 7000, 7400, 7800, 8200, 8600, 198*4882a593Smuzhiyun /* Index 660 - 669 */ 199*4882a593Smuzhiyun 9000, 9400, 9800, 10200, 10600, 11000, 11400, 11800, 12200, 12700, 200*4882a593Smuzhiyun /* Index 670 - 679 */ 201*4882a593Smuzhiyun 13300, 13800, 14200, 14600, 15000, 15400, 15800, 16200, 16600, 17000, 202*4882a593Smuzhiyun /* Index 680 - 689 */ 203*4882a593Smuzhiyun 17400, 17800, 18200, 18600, 19000, 19400, 19800, 20200, 20600, 21100, 204*4882a593Smuzhiyun /* Index 690 - 699 */ 205*4882a593Smuzhiyun 21400, 21900, 22500, 23000, 23400, 23800, 24200, 24600, 25000, 25400, 206*4882a593Smuzhiyun /* Index 700 - 709 */ 207*4882a593Smuzhiyun 25800, 26200, 26600, 27000, 27400, 27800, 28200, 28600, 29000, 29400, 208*4882a593Smuzhiyun /* Index 710 - 719 */ 209*4882a593Smuzhiyun 29800, 30200, 30600, 31000, 31400, 31900, 32500, 33000, 33400, 33800, 210*4882a593Smuzhiyun /* Index 720 - 729 */ 211*4882a593Smuzhiyun 34200, 34600, 35000, 35400, 35800, 36200, 36600, 37000, 37400, 37800, 212*4882a593Smuzhiyun /* Index 730 - 739 */ 213*4882a593Smuzhiyun 38200, 38600, 39000, 39400, 39800, 40200, 40600, 41000, 41400, 41800, 214*4882a593Smuzhiyun /* Index 740 - 749 */ 215*4882a593Smuzhiyun 42200, 42600, 43100, 43700, 44200, 44600, 45000, 45400, 45800, 46200, 216*4882a593Smuzhiyun /* Index 750 - 759 */ 217*4882a593Smuzhiyun 46600, 47000, 47400, 47800, 48200, 48600, 49000, 49400, 49800, 50200, 218*4882a593Smuzhiyun /* Index 760 - 769 */ 219*4882a593Smuzhiyun 50600, 51000, 51400, 51800, 52200, 52600, 53000, 53400, 53800, 54200, 220*4882a593Smuzhiyun /* Index 770 - 779 */ 221*4882a593Smuzhiyun 54600, 55000, 55400, 55900, 56500, 57000, 57400, 57800, 58200, 58600, 222*4882a593Smuzhiyun /* Index 780 - 789 */ 223*4882a593Smuzhiyun 59000, 59400, 59800, 60200, 60600, 61000, 61400, 61800, 62200, 62600, 224*4882a593Smuzhiyun /* Index 790 - 799 */ 225*4882a593Smuzhiyun 63000, 63400, 63800, 64200, 64600, 65000, 65400, 65800, 66200, 66600, 226*4882a593Smuzhiyun /* Index 800 - 809 */ 227*4882a593Smuzhiyun 67000, 67400, 67800, 68200, 68600, 69000, 69400, 69800, 70200, 70600, 228*4882a593Smuzhiyun /* Index 810 - 819 */ 229*4882a593Smuzhiyun 71000, 71500, 72100, 72600, 73000, 73400, 73800, 74200, 74600, 75000, 230*4882a593Smuzhiyun /* Index 820 - 829 */ 231*4882a593Smuzhiyun 75400, 75800, 76200, 76600, 77000, 77400, 77800, 78200, 78600, 79000, 232*4882a593Smuzhiyun /* Index 830 - 839 */ 233*4882a593Smuzhiyun 79400, 79800, 80200, 80600, 81000, 81400, 81800, 82200, 82600, 83000, 234*4882a593Smuzhiyun /* Index 840 - 849 */ 235*4882a593Smuzhiyun 83400, 83800, 84200, 84600, 85000, 85400, 85800, 86200, 86600, 87000, 236*4882a593Smuzhiyun /* Index 850 - 859 */ 237*4882a593Smuzhiyun 87400, 87800, 88200, 88600, 89000, 89400, 89800, 90200, 90600, 91000, 238*4882a593Smuzhiyun /* Index 860 - 869 */ 239*4882a593Smuzhiyun 91400, 91800, 92200, 92600, 93000, 93400, 93800, 94200, 94600, 95000, 240*4882a593Smuzhiyun /* Index 870 - 879 */ 241*4882a593Smuzhiyun 95400, 95800, 96200, 96600, 97000, 97500, 98100, 98600, 99000, 99400, 242*4882a593Smuzhiyun /* Index 880 - 889 */ 243*4882a593Smuzhiyun 99800, 100200, 100600, 101000, 101400, 101800, 102200, 102600, 103000, 244*4882a593Smuzhiyun 103400, 245*4882a593Smuzhiyun /* Index 890 - 899 */ 246*4882a593Smuzhiyun 103800, 104200, 104600, 105000, 105400, 105800, 106200, 106600, 107000, 247*4882a593Smuzhiyun 107400, 248*4882a593Smuzhiyun /* Index 900 - 909 */ 249*4882a593Smuzhiyun 107800, 108200, 108600, 109000, 109400, 109800, 110200, 110600, 111000, 250*4882a593Smuzhiyun 111400, 251*4882a593Smuzhiyun /* Index 910 - 919 */ 252*4882a593Smuzhiyun 111800, 112200, 112600, 113000, 113400, 113800, 114200, 114600, 115000, 253*4882a593Smuzhiyun 115400, 254*4882a593Smuzhiyun /* Index 920 - 929 */ 255*4882a593Smuzhiyun 115800, 116200, 116600, 117000, 117400, 117800, 118200, 118600, 119000, 256*4882a593Smuzhiyun 119400, 257*4882a593Smuzhiyun /* Index 930 - 939 */ 258*4882a593Smuzhiyun 119800, 120200, 120600, 121000, 121400, 121800, 122400, 122600, 123000, 259*4882a593Smuzhiyun 123400, 260*4882a593Smuzhiyun /* Index 940 - 945 */ 261*4882a593Smuzhiyun 123800, 124200, 124600, 124900, 125000, 125000, 262*4882a593Smuzhiyun }; 263*4882a593Smuzhiyun 264*4882a593Smuzhiyun /* OMAP54xx ES2.0 data */ 265*4882a593Smuzhiyun const struct ti_bandgap_data omap5430_data = { 266*4882a593Smuzhiyun .features = TI_BANDGAP_FEATURE_TSHUT_CONFIG | 267*4882a593Smuzhiyun TI_BANDGAP_FEATURE_FREEZE_BIT | 268*4882a593Smuzhiyun TI_BANDGAP_FEATURE_TALERT | 269*4882a593Smuzhiyun TI_BANDGAP_FEATURE_COUNTER_DELAY | 270*4882a593Smuzhiyun TI_BANDGAP_FEATURE_HISTORY_BUFFER, 271*4882a593Smuzhiyun .fclock_name = "l3instr_ts_gclk_div", 272*4882a593Smuzhiyun .div_ck_name = "l3instr_ts_gclk_div", 273*4882a593Smuzhiyun .conv_table = omap5430_adc_to_temp, 274*4882a593Smuzhiyun .adc_start_val = OMAP5430_ADC_START_VALUE, 275*4882a593Smuzhiyun .adc_end_val = OMAP5430_ADC_END_VALUE, 276*4882a593Smuzhiyun .expose_sensor = ti_thermal_expose_sensor, 277*4882a593Smuzhiyun .remove_sensor = ti_thermal_remove_sensor, 278*4882a593Smuzhiyun .report_temperature = ti_thermal_report_sensor_temperature, 279*4882a593Smuzhiyun .sensors = { 280*4882a593Smuzhiyun { 281*4882a593Smuzhiyun .registers = &omap5430_mpu_temp_sensor_registers, 282*4882a593Smuzhiyun .ts_data = &omap5430_mpu_temp_sensor_data, 283*4882a593Smuzhiyun .domain = "cpu", 284*4882a593Smuzhiyun .register_cooling = ti_thermal_register_cpu_cooling, 285*4882a593Smuzhiyun .unregister_cooling = ti_thermal_unregister_cpu_cooling, 286*4882a593Smuzhiyun .slope_pcb = OMAP_GRADIENT_SLOPE_W_PCB_5430_CPU, 287*4882a593Smuzhiyun .constant_pcb = OMAP_GRADIENT_CONST_W_PCB_5430_CPU, 288*4882a593Smuzhiyun }, 289*4882a593Smuzhiyun { 290*4882a593Smuzhiyun .registers = &omap5430_gpu_temp_sensor_registers, 291*4882a593Smuzhiyun .ts_data = &omap5430_gpu_temp_sensor_data, 292*4882a593Smuzhiyun .domain = "gpu", 293*4882a593Smuzhiyun .slope_pcb = OMAP_GRADIENT_SLOPE_W_PCB_5430_GPU, 294*4882a593Smuzhiyun .constant_pcb = OMAP_GRADIENT_CONST_W_PCB_5430_GPU, 295*4882a593Smuzhiyun }, 296*4882a593Smuzhiyun { 297*4882a593Smuzhiyun .registers = &omap5430_core_temp_sensor_registers, 298*4882a593Smuzhiyun .ts_data = &omap5430_core_temp_sensor_data, 299*4882a593Smuzhiyun .domain = "core", 300*4882a593Smuzhiyun }, 301*4882a593Smuzhiyun }, 302*4882a593Smuzhiyun .sensor_count = 3, 303*4882a593Smuzhiyun }; 304