1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun * Copyright (C) STMicroelectronics 2018 - All Rights Reserved
4*4882a593Smuzhiyun * Author: David Hernandez Sanchez <david.hernandezsanchez@st.com> for
5*4882a593Smuzhiyun * STMicroelectronics.
6*4882a593Smuzhiyun */
7*4882a593Smuzhiyun
8*4882a593Smuzhiyun #include <linux/clk.h>
9*4882a593Smuzhiyun #include <linux/clk-provider.h>
10*4882a593Smuzhiyun #include <linux/delay.h>
11*4882a593Smuzhiyun #include <linux/err.h>
12*4882a593Smuzhiyun #include <linux/interrupt.h>
13*4882a593Smuzhiyun #include <linux/io.h>
14*4882a593Smuzhiyun #include <linux/iopoll.h>
15*4882a593Smuzhiyun #include <linux/module.h>
16*4882a593Smuzhiyun #include <linux/of.h>
17*4882a593Smuzhiyun #include <linux/of_address.h>
18*4882a593Smuzhiyun #include <linux/of_device.h>
19*4882a593Smuzhiyun #include <linux/platform_device.h>
20*4882a593Smuzhiyun #include <linux/thermal.h>
21*4882a593Smuzhiyun
22*4882a593Smuzhiyun #include "../thermal_core.h"
23*4882a593Smuzhiyun #include "../thermal_hwmon.h"
24*4882a593Smuzhiyun
25*4882a593Smuzhiyun /* DTS register offsets */
26*4882a593Smuzhiyun #define DTS_CFGR1_OFFSET 0x0
27*4882a593Smuzhiyun #define DTS_T0VALR1_OFFSET 0x8
28*4882a593Smuzhiyun #define DTS_RAMPVALR_OFFSET 0X10
29*4882a593Smuzhiyun #define DTS_ITR1_OFFSET 0x14
30*4882a593Smuzhiyun #define DTS_DR_OFFSET 0x1C
31*4882a593Smuzhiyun #define DTS_SR_OFFSET 0x20
32*4882a593Smuzhiyun #define DTS_ITENR_OFFSET 0x24
33*4882a593Smuzhiyun #define DTS_ICIFR_OFFSET 0x28
34*4882a593Smuzhiyun
35*4882a593Smuzhiyun /* DTS_CFGR1 register mask definitions */
36*4882a593Smuzhiyun #define HSREF_CLK_DIV_MASK GENMASK(30, 24)
37*4882a593Smuzhiyun #define TS1_SMP_TIME_MASK GENMASK(19, 16)
38*4882a593Smuzhiyun #define TS1_INTRIG_SEL_MASK GENMASK(11, 8)
39*4882a593Smuzhiyun
40*4882a593Smuzhiyun /* DTS_T0VALR1 register mask definitions */
41*4882a593Smuzhiyun #define TS1_T0_MASK GENMASK(17, 16)
42*4882a593Smuzhiyun #define TS1_FMT0_MASK GENMASK(15, 0)
43*4882a593Smuzhiyun
44*4882a593Smuzhiyun /* DTS_RAMPVALR register mask definitions */
45*4882a593Smuzhiyun #define TS1_RAMP_COEFF_MASK GENMASK(15, 0)
46*4882a593Smuzhiyun
47*4882a593Smuzhiyun /* DTS_ITR1 register mask definitions */
48*4882a593Smuzhiyun #define TS1_HITTHD_MASK GENMASK(31, 16)
49*4882a593Smuzhiyun #define TS1_LITTHD_MASK GENMASK(15, 0)
50*4882a593Smuzhiyun
51*4882a593Smuzhiyun /* DTS_DR register mask definitions */
52*4882a593Smuzhiyun #define TS1_MFREQ_MASK GENMASK(15, 0)
53*4882a593Smuzhiyun
54*4882a593Smuzhiyun /* DTS_ITENR register mask definitions */
55*4882a593Smuzhiyun #define ITENR_MASK (GENMASK(2, 0) | GENMASK(6, 4))
56*4882a593Smuzhiyun
57*4882a593Smuzhiyun /* DTS_ICIFR register mask definitions */
58*4882a593Smuzhiyun #define ICIFR_MASK (GENMASK(2, 0) | GENMASK(6, 4))
59*4882a593Smuzhiyun
60*4882a593Smuzhiyun /* Less significant bit position definitions */
61*4882a593Smuzhiyun #define TS1_T0_POS 16
62*4882a593Smuzhiyun #define TS1_HITTHD_POS 16
63*4882a593Smuzhiyun #define TS1_LITTHD_POS 0
64*4882a593Smuzhiyun #define HSREF_CLK_DIV_POS 24
65*4882a593Smuzhiyun
66*4882a593Smuzhiyun /* DTS_CFGR1 bit definitions */
67*4882a593Smuzhiyun #define TS1_EN BIT(0)
68*4882a593Smuzhiyun #define TS1_START BIT(4)
69*4882a593Smuzhiyun #define REFCLK_SEL BIT(20)
70*4882a593Smuzhiyun #define REFCLK_LSE REFCLK_SEL
71*4882a593Smuzhiyun #define Q_MEAS_OPT BIT(21)
72*4882a593Smuzhiyun #define CALIBRATION_CONTROL Q_MEAS_OPT
73*4882a593Smuzhiyun
74*4882a593Smuzhiyun /* DTS_SR bit definitions */
75*4882a593Smuzhiyun #define TS_RDY BIT(15)
76*4882a593Smuzhiyun /* Bit definitions below are common for DTS_SR, DTS_ITENR and DTS_CIFR */
77*4882a593Smuzhiyun #define HIGH_THRESHOLD BIT(2)
78*4882a593Smuzhiyun #define LOW_THRESHOLD BIT(1)
79*4882a593Smuzhiyun
80*4882a593Smuzhiyun /* Constants */
81*4882a593Smuzhiyun #define ADJUST 100
82*4882a593Smuzhiyun #define ONE_MHZ 1000000
83*4882a593Smuzhiyun #define POLL_TIMEOUT 5000
84*4882a593Smuzhiyun #define STARTUP_TIME 40
85*4882a593Smuzhiyun #define TS1_T0_VAL0 30000 /* 30 celsius */
86*4882a593Smuzhiyun #define TS1_T0_VAL1 130000 /* 130 celsius */
87*4882a593Smuzhiyun #define NO_HW_TRIG 0
88*4882a593Smuzhiyun #define SAMPLING_TIME 15
89*4882a593Smuzhiyun
90*4882a593Smuzhiyun struct stm_thermal_sensor {
91*4882a593Smuzhiyun struct device *dev;
92*4882a593Smuzhiyun struct thermal_zone_device *th_dev;
93*4882a593Smuzhiyun enum thermal_device_mode mode;
94*4882a593Smuzhiyun struct clk *clk;
95*4882a593Smuzhiyun unsigned int low_temp_enabled;
96*4882a593Smuzhiyun unsigned int high_temp_enabled;
97*4882a593Smuzhiyun int irq;
98*4882a593Smuzhiyun void __iomem *base;
99*4882a593Smuzhiyun int t0, fmt0, ramp_coeff;
100*4882a593Smuzhiyun };
101*4882a593Smuzhiyun
stm_enable_irq(struct stm_thermal_sensor * sensor)102*4882a593Smuzhiyun static int stm_enable_irq(struct stm_thermal_sensor *sensor)
103*4882a593Smuzhiyun {
104*4882a593Smuzhiyun u32 value;
105*4882a593Smuzhiyun
106*4882a593Smuzhiyun dev_dbg(sensor->dev, "low:%d high:%d\n", sensor->low_temp_enabled,
107*4882a593Smuzhiyun sensor->high_temp_enabled);
108*4882a593Smuzhiyun
109*4882a593Smuzhiyun /* Disable IT generation for low and high thresholds */
110*4882a593Smuzhiyun value = readl_relaxed(sensor->base + DTS_ITENR_OFFSET);
111*4882a593Smuzhiyun value &= ~(LOW_THRESHOLD | HIGH_THRESHOLD);
112*4882a593Smuzhiyun
113*4882a593Smuzhiyun if (sensor->low_temp_enabled)
114*4882a593Smuzhiyun value |= HIGH_THRESHOLD;
115*4882a593Smuzhiyun
116*4882a593Smuzhiyun if (sensor->high_temp_enabled)
117*4882a593Smuzhiyun value |= LOW_THRESHOLD;
118*4882a593Smuzhiyun
119*4882a593Smuzhiyun /* Enable interrupts */
120*4882a593Smuzhiyun writel_relaxed(value, sensor->base + DTS_ITENR_OFFSET);
121*4882a593Smuzhiyun
122*4882a593Smuzhiyun return 0;
123*4882a593Smuzhiyun }
124*4882a593Smuzhiyun
stm_thermal_irq_handler(int irq,void * sdata)125*4882a593Smuzhiyun static irqreturn_t stm_thermal_irq_handler(int irq, void *sdata)
126*4882a593Smuzhiyun {
127*4882a593Smuzhiyun struct stm_thermal_sensor *sensor = sdata;
128*4882a593Smuzhiyun
129*4882a593Smuzhiyun dev_dbg(sensor->dev, "sr:%d\n",
130*4882a593Smuzhiyun readl_relaxed(sensor->base + DTS_SR_OFFSET));
131*4882a593Smuzhiyun
132*4882a593Smuzhiyun thermal_zone_device_update(sensor->th_dev, THERMAL_EVENT_UNSPECIFIED);
133*4882a593Smuzhiyun
134*4882a593Smuzhiyun stm_enable_irq(sensor);
135*4882a593Smuzhiyun
136*4882a593Smuzhiyun /* Acknoledge all DTS irqs */
137*4882a593Smuzhiyun writel_relaxed(ICIFR_MASK, sensor->base + DTS_ICIFR_OFFSET);
138*4882a593Smuzhiyun
139*4882a593Smuzhiyun return IRQ_HANDLED;
140*4882a593Smuzhiyun }
141*4882a593Smuzhiyun
stm_sensor_power_on(struct stm_thermal_sensor * sensor)142*4882a593Smuzhiyun static int stm_sensor_power_on(struct stm_thermal_sensor *sensor)
143*4882a593Smuzhiyun {
144*4882a593Smuzhiyun int ret;
145*4882a593Smuzhiyun u32 value;
146*4882a593Smuzhiyun
147*4882a593Smuzhiyun /* Enable sensor */
148*4882a593Smuzhiyun value = readl_relaxed(sensor->base + DTS_CFGR1_OFFSET);
149*4882a593Smuzhiyun value |= TS1_EN;
150*4882a593Smuzhiyun writel_relaxed(value, sensor->base + DTS_CFGR1_OFFSET);
151*4882a593Smuzhiyun
152*4882a593Smuzhiyun /*
153*4882a593Smuzhiyun * The DTS block can be enabled by setting TSx_EN bit in
154*4882a593Smuzhiyun * DTS_CFGRx register. It requires a startup time of
155*4882a593Smuzhiyun * 40μs. Use 5 ms as arbitrary timeout.
156*4882a593Smuzhiyun */
157*4882a593Smuzhiyun ret = readl_poll_timeout(sensor->base + DTS_SR_OFFSET,
158*4882a593Smuzhiyun value, (value & TS_RDY),
159*4882a593Smuzhiyun STARTUP_TIME, POLL_TIMEOUT);
160*4882a593Smuzhiyun if (ret)
161*4882a593Smuzhiyun return ret;
162*4882a593Smuzhiyun
163*4882a593Smuzhiyun /* Start continuous measuring */
164*4882a593Smuzhiyun value = readl_relaxed(sensor->base +
165*4882a593Smuzhiyun DTS_CFGR1_OFFSET);
166*4882a593Smuzhiyun value |= TS1_START;
167*4882a593Smuzhiyun writel_relaxed(value, sensor->base +
168*4882a593Smuzhiyun DTS_CFGR1_OFFSET);
169*4882a593Smuzhiyun
170*4882a593Smuzhiyun sensor->mode = THERMAL_DEVICE_ENABLED;
171*4882a593Smuzhiyun
172*4882a593Smuzhiyun return 0;
173*4882a593Smuzhiyun }
174*4882a593Smuzhiyun
stm_sensor_power_off(struct stm_thermal_sensor * sensor)175*4882a593Smuzhiyun static int stm_sensor_power_off(struct stm_thermal_sensor *sensor)
176*4882a593Smuzhiyun {
177*4882a593Smuzhiyun u32 value;
178*4882a593Smuzhiyun
179*4882a593Smuzhiyun sensor->mode = THERMAL_DEVICE_DISABLED;
180*4882a593Smuzhiyun
181*4882a593Smuzhiyun /* Stop measuring */
182*4882a593Smuzhiyun value = readl_relaxed(sensor->base + DTS_CFGR1_OFFSET);
183*4882a593Smuzhiyun value &= ~TS1_START;
184*4882a593Smuzhiyun writel_relaxed(value, sensor->base + DTS_CFGR1_OFFSET);
185*4882a593Smuzhiyun
186*4882a593Smuzhiyun /* Ensure stop is taken into account */
187*4882a593Smuzhiyun usleep_range(STARTUP_TIME, POLL_TIMEOUT);
188*4882a593Smuzhiyun
189*4882a593Smuzhiyun /* Disable sensor */
190*4882a593Smuzhiyun value = readl_relaxed(sensor->base + DTS_CFGR1_OFFSET);
191*4882a593Smuzhiyun value &= ~TS1_EN;
192*4882a593Smuzhiyun writel_relaxed(value, sensor->base + DTS_CFGR1_OFFSET);
193*4882a593Smuzhiyun
194*4882a593Smuzhiyun /* Ensure disable is taken into account */
195*4882a593Smuzhiyun return readl_poll_timeout(sensor->base + DTS_SR_OFFSET, value,
196*4882a593Smuzhiyun !(value & TS_RDY),
197*4882a593Smuzhiyun STARTUP_TIME, POLL_TIMEOUT);
198*4882a593Smuzhiyun }
199*4882a593Smuzhiyun
stm_thermal_calibration(struct stm_thermal_sensor * sensor)200*4882a593Smuzhiyun static int stm_thermal_calibration(struct stm_thermal_sensor *sensor)
201*4882a593Smuzhiyun {
202*4882a593Smuzhiyun u32 value, clk_freq;
203*4882a593Smuzhiyun u32 prescaler;
204*4882a593Smuzhiyun
205*4882a593Smuzhiyun /* Figure out prescaler value for PCLK during calibration */
206*4882a593Smuzhiyun clk_freq = clk_get_rate(sensor->clk);
207*4882a593Smuzhiyun if (!clk_freq)
208*4882a593Smuzhiyun return -EINVAL;
209*4882a593Smuzhiyun
210*4882a593Smuzhiyun prescaler = 0;
211*4882a593Smuzhiyun clk_freq /= ONE_MHZ;
212*4882a593Smuzhiyun if (clk_freq) {
213*4882a593Smuzhiyun while (prescaler <= clk_freq)
214*4882a593Smuzhiyun prescaler++;
215*4882a593Smuzhiyun }
216*4882a593Smuzhiyun
217*4882a593Smuzhiyun value = readl_relaxed(sensor->base + DTS_CFGR1_OFFSET);
218*4882a593Smuzhiyun
219*4882a593Smuzhiyun /* Clear prescaler */
220*4882a593Smuzhiyun value &= ~HSREF_CLK_DIV_MASK;
221*4882a593Smuzhiyun
222*4882a593Smuzhiyun /* Set prescaler. pclk_freq/prescaler < 1MHz */
223*4882a593Smuzhiyun value |= (prescaler << HSREF_CLK_DIV_POS);
224*4882a593Smuzhiyun
225*4882a593Smuzhiyun /* Select PCLK as reference clock */
226*4882a593Smuzhiyun value &= ~REFCLK_SEL;
227*4882a593Smuzhiyun
228*4882a593Smuzhiyun /* Set maximal sampling time for better precision */
229*4882a593Smuzhiyun value |= TS1_SMP_TIME_MASK;
230*4882a593Smuzhiyun
231*4882a593Smuzhiyun /* Measure with calibration */
232*4882a593Smuzhiyun value &= ~CALIBRATION_CONTROL;
233*4882a593Smuzhiyun
234*4882a593Smuzhiyun /* select trigger */
235*4882a593Smuzhiyun value &= ~TS1_INTRIG_SEL_MASK;
236*4882a593Smuzhiyun value |= NO_HW_TRIG;
237*4882a593Smuzhiyun
238*4882a593Smuzhiyun writel_relaxed(value, sensor->base + DTS_CFGR1_OFFSET);
239*4882a593Smuzhiyun
240*4882a593Smuzhiyun return 0;
241*4882a593Smuzhiyun }
242*4882a593Smuzhiyun
243*4882a593Smuzhiyun /* Fill in DTS structure with factory sensor values */
stm_thermal_read_factory_settings(struct stm_thermal_sensor * sensor)244*4882a593Smuzhiyun static int stm_thermal_read_factory_settings(struct stm_thermal_sensor *sensor)
245*4882a593Smuzhiyun {
246*4882a593Smuzhiyun /* Retrieve engineering calibration temperature */
247*4882a593Smuzhiyun sensor->t0 = readl_relaxed(sensor->base + DTS_T0VALR1_OFFSET) &
248*4882a593Smuzhiyun TS1_T0_MASK;
249*4882a593Smuzhiyun if (!sensor->t0)
250*4882a593Smuzhiyun sensor->t0 = TS1_T0_VAL0;
251*4882a593Smuzhiyun else
252*4882a593Smuzhiyun sensor->t0 = TS1_T0_VAL1;
253*4882a593Smuzhiyun
254*4882a593Smuzhiyun /* Retrieve fmt0 and put it on Hz */
255*4882a593Smuzhiyun sensor->fmt0 = ADJUST * (readl_relaxed(sensor->base +
256*4882a593Smuzhiyun DTS_T0VALR1_OFFSET) & TS1_FMT0_MASK);
257*4882a593Smuzhiyun
258*4882a593Smuzhiyun /* Retrieve ramp coefficient */
259*4882a593Smuzhiyun sensor->ramp_coeff = readl_relaxed(sensor->base + DTS_RAMPVALR_OFFSET) &
260*4882a593Smuzhiyun TS1_RAMP_COEFF_MASK;
261*4882a593Smuzhiyun
262*4882a593Smuzhiyun if (!sensor->fmt0 || !sensor->ramp_coeff) {
263*4882a593Smuzhiyun dev_err(sensor->dev, "%s: wrong setting\n", __func__);
264*4882a593Smuzhiyun return -EINVAL;
265*4882a593Smuzhiyun }
266*4882a593Smuzhiyun
267*4882a593Smuzhiyun dev_dbg(sensor->dev, "%s: T0 = %doC, FMT0 = %dHz, RAMP_COEFF = %dHz/oC",
268*4882a593Smuzhiyun __func__, sensor->t0, sensor->fmt0, sensor->ramp_coeff);
269*4882a593Smuzhiyun
270*4882a593Smuzhiyun return 0;
271*4882a593Smuzhiyun }
272*4882a593Smuzhiyun
stm_thermal_calculate_threshold(struct stm_thermal_sensor * sensor,int temp,u32 * th)273*4882a593Smuzhiyun static int stm_thermal_calculate_threshold(struct stm_thermal_sensor *sensor,
274*4882a593Smuzhiyun int temp, u32 *th)
275*4882a593Smuzhiyun {
276*4882a593Smuzhiyun int freqM;
277*4882a593Smuzhiyun
278*4882a593Smuzhiyun /* Figure out the CLK_PTAT frequency for a given temperature */
279*4882a593Smuzhiyun freqM = ((temp - sensor->t0) * sensor->ramp_coeff) / 1000 +
280*4882a593Smuzhiyun sensor->fmt0;
281*4882a593Smuzhiyun
282*4882a593Smuzhiyun /* Figure out the threshold sample number */
283*4882a593Smuzhiyun *th = clk_get_rate(sensor->clk) * SAMPLING_TIME / freqM;
284*4882a593Smuzhiyun if (!*th)
285*4882a593Smuzhiyun return -EINVAL;
286*4882a593Smuzhiyun
287*4882a593Smuzhiyun dev_dbg(sensor->dev, "freqM=%d Hz, threshold=0x%x", freqM, *th);
288*4882a593Smuzhiyun
289*4882a593Smuzhiyun return 0;
290*4882a593Smuzhiyun }
291*4882a593Smuzhiyun
292*4882a593Smuzhiyun /* Disable temperature interrupt */
stm_disable_irq(struct stm_thermal_sensor * sensor)293*4882a593Smuzhiyun static int stm_disable_irq(struct stm_thermal_sensor *sensor)
294*4882a593Smuzhiyun {
295*4882a593Smuzhiyun u32 value;
296*4882a593Smuzhiyun
297*4882a593Smuzhiyun /* Disable IT generation */
298*4882a593Smuzhiyun value = readl_relaxed(sensor->base + DTS_ITENR_OFFSET);
299*4882a593Smuzhiyun value &= ~ITENR_MASK;
300*4882a593Smuzhiyun writel_relaxed(value, sensor->base + DTS_ITENR_OFFSET);
301*4882a593Smuzhiyun
302*4882a593Smuzhiyun return 0;
303*4882a593Smuzhiyun }
304*4882a593Smuzhiyun
stm_thermal_set_trips(void * data,int low,int high)305*4882a593Smuzhiyun static int stm_thermal_set_trips(void *data, int low, int high)
306*4882a593Smuzhiyun {
307*4882a593Smuzhiyun struct stm_thermal_sensor *sensor = data;
308*4882a593Smuzhiyun u32 itr1, th;
309*4882a593Smuzhiyun int ret;
310*4882a593Smuzhiyun
311*4882a593Smuzhiyun dev_dbg(sensor->dev, "set trips %d <--> %d\n", low, high);
312*4882a593Smuzhiyun
313*4882a593Smuzhiyun /* Erase threshold content */
314*4882a593Smuzhiyun itr1 = readl_relaxed(sensor->base + DTS_ITR1_OFFSET);
315*4882a593Smuzhiyun itr1 &= ~(TS1_LITTHD_MASK | TS1_HITTHD_MASK);
316*4882a593Smuzhiyun
317*4882a593Smuzhiyun /*
318*4882a593Smuzhiyun * Disable low-temp if "low" is too small. As per thermal framework
319*4882a593Smuzhiyun * API, we use -INT_MAX rather than INT_MIN.
320*4882a593Smuzhiyun */
321*4882a593Smuzhiyun
322*4882a593Smuzhiyun if (low > -INT_MAX) {
323*4882a593Smuzhiyun sensor->low_temp_enabled = 1;
324*4882a593Smuzhiyun /* add 0.5 of hysteresis due to measurement error */
325*4882a593Smuzhiyun ret = stm_thermal_calculate_threshold(sensor, low - 500, &th);
326*4882a593Smuzhiyun if (ret)
327*4882a593Smuzhiyun return ret;
328*4882a593Smuzhiyun
329*4882a593Smuzhiyun itr1 |= (TS1_HITTHD_MASK & (th << TS1_HITTHD_POS));
330*4882a593Smuzhiyun } else {
331*4882a593Smuzhiyun sensor->low_temp_enabled = 0;
332*4882a593Smuzhiyun }
333*4882a593Smuzhiyun
334*4882a593Smuzhiyun /* Disable high-temp if "high" is too big. */
335*4882a593Smuzhiyun if (high < INT_MAX) {
336*4882a593Smuzhiyun sensor->high_temp_enabled = 1;
337*4882a593Smuzhiyun ret = stm_thermal_calculate_threshold(sensor, high, &th);
338*4882a593Smuzhiyun if (ret)
339*4882a593Smuzhiyun return ret;
340*4882a593Smuzhiyun
341*4882a593Smuzhiyun itr1 |= (TS1_LITTHD_MASK & (th << TS1_LITTHD_POS));
342*4882a593Smuzhiyun } else {
343*4882a593Smuzhiyun sensor->high_temp_enabled = 0;
344*4882a593Smuzhiyun }
345*4882a593Smuzhiyun
346*4882a593Smuzhiyun /* Write new threshod values*/
347*4882a593Smuzhiyun writel_relaxed(itr1, sensor->base + DTS_ITR1_OFFSET);
348*4882a593Smuzhiyun
349*4882a593Smuzhiyun return 0;
350*4882a593Smuzhiyun }
351*4882a593Smuzhiyun
352*4882a593Smuzhiyun /* Callback to get temperature from HW */
stm_thermal_get_temp(void * data,int * temp)353*4882a593Smuzhiyun static int stm_thermal_get_temp(void *data, int *temp)
354*4882a593Smuzhiyun {
355*4882a593Smuzhiyun struct stm_thermal_sensor *sensor = data;
356*4882a593Smuzhiyun u32 periods;
357*4882a593Smuzhiyun int freqM, ret;
358*4882a593Smuzhiyun
359*4882a593Smuzhiyun if (sensor->mode != THERMAL_DEVICE_ENABLED)
360*4882a593Smuzhiyun return -EAGAIN;
361*4882a593Smuzhiyun
362*4882a593Smuzhiyun /* Retrieve the number of periods sampled */
363*4882a593Smuzhiyun ret = readl_relaxed_poll_timeout(sensor->base + DTS_DR_OFFSET, periods,
364*4882a593Smuzhiyun (periods & TS1_MFREQ_MASK),
365*4882a593Smuzhiyun STARTUP_TIME, POLL_TIMEOUT);
366*4882a593Smuzhiyun if (ret)
367*4882a593Smuzhiyun return ret;
368*4882a593Smuzhiyun
369*4882a593Smuzhiyun /* Figure out the CLK_PTAT frequency */
370*4882a593Smuzhiyun freqM = (clk_get_rate(sensor->clk) * SAMPLING_TIME) / periods;
371*4882a593Smuzhiyun if (!freqM)
372*4882a593Smuzhiyun return -EINVAL;
373*4882a593Smuzhiyun
374*4882a593Smuzhiyun /* Figure out the temperature in mili celsius */
375*4882a593Smuzhiyun *temp = (freqM - sensor->fmt0) * 1000 / sensor->ramp_coeff + sensor->t0;
376*4882a593Smuzhiyun
377*4882a593Smuzhiyun return 0;
378*4882a593Smuzhiyun }
379*4882a593Smuzhiyun
380*4882a593Smuzhiyun /* Registers DTS irq to be visible by GIC */
stm_register_irq(struct stm_thermal_sensor * sensor)381*4882a593Smuzhiyun static int stm_register_irq(struct stm_thermal_sensor *sensor)
382*4882a593Smuzhiyun {
383*4882a593Smuzhiyun struct device *dev = sensor->dev;
384*4882a593Smuzhiyun struct platform_device *pdev = to_platform_device(dev);
385*4882a593Smuzhiyun int ret;
386*4882a593Smuzhiyun
387*4882a593Smuzhiyun sensor->irq = platform_get_irq(pdev, 0);
388*4882a593Smuzhiyun if (sensor->irq < 0)
389*4882a593Smuzhiyun return sensor->irq;
390*4882a593Smuzhiyun
391*4882a593Smuzhiyun ret = devm_request_threaded_irq(dev, sensor->irq,
392*4882a593Smuzhiyun NULL,
393*4882a593Smuzhiyun stm_thermal_irq_handler,
394*4882a593Smuzhiyun IRQF_ONESHOT,
395*4882a593Smuzhiyun dev->driver->name, sensor);
396*4882a593Smuzhiyun if (ret) {
397*4882a593Smuzhiyun dev_err(dev, "%s: Failed to register IRQ %d\n", __func__,
398*4882a593Smuzhiyun sensor->irq);
399*4882a593Smuzhiyun return ret;
400*4882a593Smuzhiyun }
401*4882a593Smuzhiyun
402*4882a593Smuzhiyun dev_dbg(dev, "%s: thermal IRQ registered", __func__);
403*4882a593Smuzhiyun
404*4882a593Smuzhiyun return 0;
405*4882a593Smuzhiyun }
406*4882a593Smuzhiyun
stm_thermal_sensor_off(struct stm_thermal_sensor * sensor)407*4882a593Smuzhiyun static int stm_thermal_sensor_off(struct stm_thermal_sensor *sensor)
408*4882a593Smuzhiyun {
409*4882a593Smuzhiyun int ret;
410*4882a593Smuzhiyun
411*4882a593Smuzhiyun stm_disable_irq(sensor);
412*4882a593Smuzhiyun
413*4882a593Smuzhiyun ret = stm_sensor_power_off(sensor);
414*4882a593Smuzhiyun if (ret)
415*4882a593Smuzhiyun return ret;
416*4882a593Smuzhiyun
417*4882a593Smuzhiyun clk_disable_unprepare(sensor->clk);
418*4882a593Smuzhiyun
419*4882a593Smuzhiyun return 0;
420*4882a593Smuzhiyun }
421*4882a593Smuzhiyun
stm_thermal_prepare(struct stm_thermal_sensor * sensor)422*4882a593Smuzhiyun static int stm_thermal_prepare(struct stm_thermal_sensor *sensor)
423*4882a593Smuzhiyun {
424*4882a593Smuzhiyun int ret;
425*4882a593Smuzhiyun
426*4882a593Smuzhiyun ret = clk_prepare_enable(sensor->clk);
427*4882a593Smuzhiyun if (ret)
428*4882a593Smuzhiyun return ret;
429*4882a593Smuzhiyun
430*4882a593Smuzhiyun ret = stm_thermal_read_factory_settings(sensor);
431*4882a593Smuzhiyun if (ret)
432*4882a593Smuzhiyun goto thermal_unprepare;
433*4882a593Smuzhiyun
434*4882a593Smuzhiyun ret = stm_thermal_calibration(sensor);
435*4882a593Smuzhiyun if (ret)
436*4882a593Smuzhiyun goto thermal_unprepare;
437*4882a593Smuzhiyun
438*4882a593Smuzhiyun return 0;
439*4882a593Smuzhiyun
440*4882a593Smuzhiyun thermal_unprepare:
441*4882a593Smuzhiyun clk_disable_unprepare(sensor->clk);
442*4882a593Smuzhiyun
443*4882a593Smuzhiyun return ret;
444*4882a593Smuzhiyun }
445*4882a593Smuzhiyun
446*4882a593Smuzhiyun #ifdef CONFIG_PM_SLEEP
stm_thermal_suspend(struct device * dev)447*4882a593Smuzhiyun static int stm_thermal_suspend(struct device *dev)
448*4882a593Smuzhiyun {
449*4882a593Smuzhiyun struct stm_thermal_sensor *sensor = dev_get_drvdata(dev);
450*4882a593Smuzhiyun
451*4882a593Smuzhiyun return stm_thermal_sensor_off(sensor);
452*4882a593Smuzhiyun }
453*4882a593Smuzhiyun
stm_thermal_resume(struct device * dev)454*4882a593Smuzhiyun static int stm_thermal_resume(struct device *dev)
455*4882a593Smuzhiyun {
456*4882a593Smuzhiyun int ret;
457*4882a593Smuzhiyun struct stm_thermal_sensor *sensor = dev_get_drvdata(dev);
458*4882a593Smuzhiyun
459*4882a593Smuzhiyun ret = stm_thermal_prepare(sensor);
460*4882a593Smuzhiyun if (ret)
461*4882a593Smuzhiyun return ret;
462*4882a593Smuzhiyun
463*4882a593Smuzhiyun ret = stm_sensor_power_on(sensor);
464*4882a593Smuzhiyun if (ret)
465*4882a593Smuzhiyun return ret;
466*4882a593Smuzhiyun
467*4882a593Smuzhiyun thermal_zone_device_update(sensor->th_dev, THERMAL_EVENT_UNSPECIFIED);
468*4882a593Smuzhiyun stm_enable_irq(sensor);
469*4882a593Smuzhiyun
470*4882a593Smuzhiyun return 0;
471*4882a593Smuzhiyun }
472*4882a593Smuzhiyun #endif /* CONFIG_PM_SLEEP */
473*4882a593Smuzhiyun
474*4882a593Smuzhiyun static SIMPLE_DEV_PM_OPS(stm_thermal_pm_ops,
475*4882a593Smuzhiyun stm_thermal_suspend, stm_thermal_resume);
476*4882a593Smuzhiyun
477*4882a593Smuzhiyun static const struct thermal_zone_of_device_ops stm_tz_ops = {
478*4882a593Smuzhiyun .get_temp = stm_thermal_get_temp,
479*4882a593Smuzhiyun .set_trips = stm_thermal_set_trips,
480*4882a593Smuzhiyun };
481*4882a593Smuzhiyun
482*4882a593Smuzhiyun static const struct of_device_id stm_thermal_of_match[] = {
483*4882a593Smuzhiyun { .compatible = "st,stm32-thermal"},
484*4882a593Smuzhiyun { /* sentinel */ }
485*4882a593Smuzhiyun };
486*4882a593Smuzhiyun MODULE_DEVICE_TABLE(of, stm_thermal_of_match);
487*4882a593Smuzhiyun
stm_thermal_probe(struct platform_device * pdev)488*4882a593Smuzhiyun static int stm_thermal_probe(struct platform_device *pdev)
489*4882a593Smuzhiyun {
490*4882a593Smuzhiyun struct stm_thermal_sensor *sensor;
491*4882a593Smuzhiyun struct resource *res;
492*4882a593Smuzhiyun void __iomem *base;
493*4882a593Smuzhiyun int ret;
494*4882a593Smuzhiyun
495*4882a593Smuzhiyun if (!pdev->dev.of_node) {
496*4882a593Smuzhiyun dev_err(&pdev->dev, "%s: device tree node not found\n",
497*4882a593Smuzhiyun __func__);
498*4882a593Smuzhiyun return -EINVAL;
499*4882a593Smuzhiyun }
500*4882a593Smuzhiyun
501*4882a593Smuzhiyun sensor = devm_kzalloc(&pdev->dev, sizeof(*sensor), GFP_KERNEL);
502*4882a593Smuzhiyun if (!sensor)
503*4882a593Smuzhiyun return -ENOMEM;
504*4882a593Smuzhiyun
505*4882a593Smuzhiyun platform_set_drvdata(pdev, sensor);
506*4882a593Smuzhiyun
507*4882a593Smuzhiyun sensor->dev = &pdev->dev;
508*4882a593Smuzhiyun
509*4882a593Smuzhiyun res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
510*4882a593Smuzhiyun base = devm_ioremap_resource(&pdev->dev, res);
511*4882a593Smuzhiyun if (IS_ERR(base))
512*4882a593Smuzhiyun return PTR_ERR(base);
513*4882a593Smuzhiyun
514*4882a593Smuzhiyun /* Populate sensor */
515*4882a593Smuzhiyun sensor->base = base;
516*4882a593Smuzhiyun
517*4882a593Smuzhiyun sensor->clk = devm_clk_get(&pdev->dev, "pclk");
518*4882a593Smuzhiyun if (IS_ERR(sensor->clk)) {
519*4882a593Smuzhiyun dev_err(&pdev->dev, "%s: failed to fetch PCLK clock\n",
520*4882a593Smuzhiyun __func__);
521*4882a593Smuzhiyun return PTR_ERR(sensor->clk);
522*4882a593Smuzhiyun }
523*4882a593Smuzhiyun
524*4882a593Smuzhiyun stm_disable_irq(sensor);
525*4882a593Smuzhiyun
526*4882a593Smuzhiyun /* Clear irq flags */
527*4882a593Smuzhiyun writel_relaxed(ICIFR_MASK, sensor->base + DTS_ICIFR_OFFSET);
528*4882a593Smuzhiyun
529*4882a593Smuzhiyun /* Configure and enable HW sensor */
530*4882a593Smuzhiyun ret = stm_thermal_prepare(sensor);
531*4882a593Smuzhiyun if (ret) {
532*4882a593Smuzhiyun dev_err(&pdev->dev, "Error prepare sensor: %d\n", ret);
533*4882a593Smuzhiyun return ret;
534*4882a593Smuzhiyun }
535*4882a593Smuzhiyun
536*4882a593Smuzhiyun ret = stm_sensor_power_on(sensor);
537*4882a593Smuzhiyun if (ret) {
538*4882a593Smuzhiyun dev_err(&pdev->dev, "Error power on sensor: %d\n", ret);
539*4882a593Smuzhiyun return ret;
540*4882a593Smuzhiyun }
541*4882a593Smuzhiyun
542*4882a593Smuzhiyun sensor->th_dev = devm_thermal_zone_of_sensor_register(&pdev->dev, 0,
543*4882a593Smuzhiyun sensor,
544*4882a593Smuzhiyun &stm_tz_ops);
545*4882a593Smuzhiyun
546*4882a593Smuzhiyun if (IS_ERR(sensor->th_dev)) {
547*4882a593Smuzhiyun dev_err(&pdev->dev, "%s: thermal zone sensor registering KO\n",
548*4882a593Smuzhiyun __func__);
549*4882a593Smuzhiyun ret = PTR_ERR(sensor->th_dev);
550*4882a593Smuzhiyun return ret;
551*4882a593Smuzhiyun }
552*4882a593Smuzhiyun
553*4882a593Smuzhiyun /* Register IRQ into GIC */
554*4882a593Smuzhiyun ret = stm_register_irq(sensor);
555*4882a593Smuzhiyun if (ret)
556*4882a593Smuzhiyun goto err_tz;
557*4882a593Smuzhiyun
558*4882a593Smuzhiyun stm_enable_irq(sensor);
559*4882a593Smuzhiyun
560*4882a593Smuzhiyun /*
561*4882a593Smuzhiyun * Thermal_zone doesn't enable hwmon as default,
562*4882a593Smuzhiyun * enable it here
563*4882a593Smuzhiyun */
564*4882a593Smuzhiyun sensor->th_dev->tzp->no_hwmon = false;
565*4882a593Smuzhiyun ret = thermal_add_hwmon_sysfs(sensor->th_dev);
566*4882a593Smuzhiyun if (ret)
567*4882a593Smuzhiyun goto err_tz;
568*4882a593Smuzhiyun
569*4882a593Smuzhiyun dev_info(&pdev->dev, "%s: Driver initialized successfully\n",
570*4882a593Smuzhiyun __func__);
571*4882a593Smuzhiyun
572*4882a593Smuzhiyun return 0;
573*4882a593Smuzhiyun
574*4882a593Smuzhiyun err_tz:
575*4882a593Smuzhiyun thermal_zone_of_sensor_unregister(&pdev->dev, sensor->th_dev);
576*4882a593Smuzhiyun return ret;
577*4882a593Smuzhiyun }
578*4882a593Smuzhiyun
stm_thermal_remove(struct platform_device * pdev)579*4882a593Smuzhiyun static int stm_thermal_remove(struct platform_device *pdev)
580*4882a593Smuzhiyun {
581*4882a593Smuzhiyun struct stm_thermal_sensor *sensor = platform_get_drvdata(pdev);
582*4882a593Smuzhiyun
583*4882a593Smuzhiyun stm_thermal_sensor_off(sensor);
584*4882a593Smuzhiyun thermal_remove_hwmon_sysfs(sensor->th_dev);
585*4882a593Smuzhiyun thermal_zone_of_sensor_unregister(&pdev->dev, sensor->th_dev);
586*4882a593Smuzhiyun
587*4882a593Smuzhiyun return 0;
588*4882a593Smuzhiyun }
589*4882a593Smuzhiyun
590*4882a593Smuzhiyun static struct platform_driver stm_thermal_driver = {
591*4882a593Smuzhiyun .driver = {
592*4882a593Smuzhiyun .name = "stm_thermal",
593*4882a593Smuzhiyun .pm = &stm_thermal_pm_ops,
594*4882a593Smuzhiyun .of_match_table = stm_thermal_of_match,
595*4882a593Smuzhiyun },
596*4882a593Smuzhiyun .probe = stm_thermal_probe,
597*4882a593Smuzhiyun .remove = stm_thermal_remove,
598*4882a593Smuzhiyun };
599*4882a593Smuzhiyun module_platform_driver(stm_thermal_driver);
600*4882a593Smuzhiyun
601*4882a593Smuzhiyun MODULE_DESCRIPTION("STMicroelectronics STM32 Thermal Sensor Driver");
602*4882a593Smuzhiyun MODULE_AUTHOR("David Hernandez Sanchez <david.hernandezsanchez@st.com>");
603*4882a593Smuzhiyun MODULE_LICENSE("GPL v2");
604*4882a593Smuzhiyun MODULE_ALIAS("platform:stm_thermal");
605