xref: /OK3568_Linux_fs/kernel/drivers/thermal/intel/intel_pch_thermal.c (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0-only
2*4882a593Smuzhiyun /* intel_pch_thermal.c - Intel PCH Thermal driver
3*4882a593Smuzhiyun  *
4*4882a593Smuzhiyun  * Copyright (c) 2015, Intel Corporation.
5*4882a593Smuzhiyun  *
6*4882a593Smuzhiyun  * Authors:
7*4882a593Smuzhiyun  *     Tushar Dave <tushar.n.dave@intel.com>
8*4882a593Smuzhiyun  */
9*4882a593Smuzhiyun 
10*4882a593Smuzhiyun #include <linux/module.h>
11*4882a593Smuzhiyun #include <linux/types.h>
12*4882a593Smuzhiyun #include <linux/init.h>
13*4882a593Smuzhiyun #include <linux/pci.h>
14*4882a593Smuzhiyun #include <linux/acpi.h>
15*4882a593Smuzhiyun #include <linux/thermal.h>
16*4882a593Smuzhiyun #include <linux/units.h>
17*4882a593Smuzhiyun #include <linux/pm.h>
18*4882a593Smuzhiyun 
19*4882a593Smuzhiyun /* Intel PCH thermal Device IDs */
20*4882a593Smuzhiyun #define PCH_THERMAL_DID_HSW_1	0x9C24 /* Haswell PCH */
21*4882a593Smuzhiyun #define PCH_THERMAL_DID_HSW_2	0x8C24 /* Haswell PCH */
22*4882a593Smuzhiyun #define PCH_THERMAL_DID_WPT	0x9CA4 /* Wildcat Point */
23*4882a593Smuzhiyun #define PCH_THERMAL_DID_SKL	0x9D31 /* Skylake PCH */
24*4882a593Smuzhiyun #define PCH_THERMAL_DID_SKL_H	0xA131 /* Skylake PCH 100 series */
25*4882a593Smuzhiyun #define PCH_THERMAL_DID_CNL	0x9Df9 /* CNL PCH */
26*4882a593Smuzhiyun #define PCH_THERMAL_DID_CNL_H	0xA379 /* CNL-H PCH */
27*4882a593Smuzhiyun #define PCH_THERMAL_DID_CNL_LP	0x02F9 /* CNL-LP PCH */
28*4882a593Smuzhiyun #define PCH_THERMAL_DID_CML_H	0X06F9 /* CML-H PCH */
29*4882a593Smuzhiyun 
30*4882a593Smuzhiyun /* Wildcat Point-LP  PCH Thermal registers */
31*4882a593Smuzhiyun #define WPT_TEMP	0x0000	/* Temperature */
32*4882a593Smuzhiyun #define WPT_TSC	0x04	/* Thermal Sensor Control */
33*4882a593Smuzhiyun #define WPT_TSS	0x06	/* Thermal Sensor Status */
34*4882a593Smuzhiyun #define WPT_TSEL	0x08	/* Thermal Sensor Enable and Lock */
35*4882a593Smuzhiyun #define WPT_TSREL	0x0A	/* Thermal Sensor Report Enable and Lock */
36*4882a593Smuzhiyun #define WPT_TSMIC	0x0C	/* Thermal Sensor SMI Control */
37*4882a593Smuzhiyun #define WPT_CTT	0x0010	/* Catastrophic Trip Point */
38*4882a593Smuzhiyun #define WPT_TAHV	0x0014	/* Thermal Alert High Value */
39*4882a593Smuzhiyun #define WPT_TALV	0x0018	/* Thermal Alert Low Value */
40*4882a593Smuzhiyun #define WPT_TL		0x00000040	/* Throttle Value */
41*4882a593Smuzhiyun #define WPT_PHL	0x0060	/* PCH Hot Level */
42*4882a593Smuzhiyun #define WPT_PHLC	0x62	/* PHL Control */
43*4882a593Smuzhiyun #define WPT_TAS	0x80	/* Thermal Alert Status */
44*4882a593Smuzhiyun #define WPT_TSPIEN	0x82	/* PCI Interrupt Event Enables */
45*4882a593Smuzhiyun #define WPT_TSGPEN	0x84	/* General Purpose Event Enables */
46*4882a593Smuzhiyun 
47*4882a593Smuzhiyun /*  Wildcat Point-LP  PCH Thermal Register bit definitions */
48*4882a593Smuzhiyun #define WPT_TEMP_TSR	0x01ff	/* Temp TS Reading */
49*4882a593Smuzhiyun #define WPT_TSC_CPDE	0x01	/* Catastrophic Power-Down Enable */
50*4882a593Smuzhiyun #define WPT_TSS_TSDSS	0x10	/* Thermal Sensor Dynamic Shutdown Status */
51*4882a593Smuzhiyun #define WPT_TSS_GPES	0x08	/* GPE status */
52*4882a593Smuzhiyun #define WPT_TSEL_ETS	0x01    /* Enable TS */
53*4882a593Smuzhiyun #define WPT_TSEL_PLDB	0x80	/* TSEL Policy Lock-Down Bit */
54*4882a593Smuzhiyun #define WPT_TL_TOL	0x000001FF	/* T0 Level */
55*4882a593Smuzhiyun #define WPT_TL_T1L	0x1ff00000	/* T1 Level */
56*4882a593Smuzhiyun #define WPT_TL_TTEN	0x20000000	/* TT Enable */
57*4882a593Smuzhiyun 
58*4882a593Smuzhiyun static char driver_name[] = "Intel PCH thermal driver";
59*4882a593Smuzhiyun 
60*4882a593Smuzhiyun struct pch_thermal_device {
61*4882a593Smuzhiyun 	void __iomem *hw_base;
62*4882a593Smuzhiyun 	const struct pch_dev_ops *ops;
63*4882a593Smuzhiyun 	struct pci_dev *pdev;
64*4882a593Smuzhiyun 	struct thermal_zone_device *tzd;
65*4882a593Smuzhiyun 	int crt_trip_id;
66*4882a593Smuzhiyun 	unsigned long crt_temp;
67*4882a593Smuzhiyun 	int hot_trip_id;
68*4882a593Smuzhiyun 	unsigned long hot_temp;
69*4882a593Smuzhiyun 	int psv_trip_id;
70*4882a593Smuzhiyun 	unsigned long psv_temp;
71*4882a593Smuzhiyun 	bool bios_enabled;
72*4882a593Smuzhiyun };
73*4882a593Smuzhiyun 
74*4882a593Smuzhiyun #ifdef CONFIG_ACPI
75*4882a593Smuzhiyun 
76*4882a593Smuzhiyun /*
77*4882a593Smuzhiyun  * On some platforms, there is a companion ACPI device, which adds
78*4882a593Smuzhiyun  * passive trip temperature using _PSV method. There is no specific
79*4882a593Smuzhiyun  * passive temperature setting in MMIO interface of this PCI device.
80*4882a593Smuzhiyun  */
pch_wpt_add_acpi_psv_trip(struct pch_thermal_device * ptd,int * nr_trips)81*4882a593Smuzhiyun static void pch_wpt_add_acpi_psv_trip(struct pch_thermal_device *ptd,
82*4882a593Smuzhiyun 				      int *nr_trips)
83*4882a593Smuzhiyun {
84*4882a593Smuzhiyun 	struct acpi_device *adev;
85*4882a593Smuzhiyun 
86*4882a593Smuzhiyun 	ptd->psv_trip_id = -1;
87*4882a593Smuzhiyun 
88*4882a593Smuzhiyun 	adev = ACPI_COMPANION(&ptd->pdev->dev);
89*4882a593Smuzhiyun 	if (adev) {
90*4882a593Smuzhiyun 		unsigned long long r;
91*4882a593Smuzhiyun 		acpi_status status;
92*4882a593Smuzhiyun 
93*4882a593Smuzhiyun 		status = acpi_evaluate_integer(adev->handle, "_PSV", NULL,
94*4882a593Smuzhiyun 					       &r);
95*4882a593Smuzhiyun 		if (ACPI_SUCCESS(status)) {
96*4882a593Smuzhiyun 			unsigned long trip_temp;
97*4882a593Smuzhiyun 
98*4882a593Smuzhiyun 			trip_temp = deci_kelvin_to_millicelsius(r);
99*4882a593Smuzhiyun 			if (trip_temp) {
100*4882a593Smuzhiyun 				ptd->psv_temp = trip_temp;
101*4882a593Smuzhiyun 				ptd->psv_trip_id = *nr_trips;
102*4882a593Smuzhiyun 				++(*nr_trips);
103*4882a593Smuzhiyun 			}
104*4882a593Smuzhiyun 		}
105*4882a593Smuzhiyun 	}
106*4882a593Smuzhiyun }
107*4882a593Smuzhiyun #else
pch_wpt_add_acpi_psv_trip(struct pch_thermal_device * ptd,int * nr_trips)108*4882a593Smuzhiyun static void pch_wpt_add_acpi_psv_trip(struct pch_thermal_device *ptd,
109*4882a593Smuzhiyun 				      int *nr_trips)
110*4882a593Smuzhiyun {
111*4882a593Smuzhiyun 	ptd->psv_trip_id = -1;
112*4882a593Smuzhiyun 
113*4882a593Smuzhiyun }
114*4882a593Smuzhiyun #endif
115*4882a593Smuzhiyun 
pch_wpt_init(struct pch_thermal_device * ptd,int * nr_trips)116*4882a593Smuzhiyun static int pch_wpt_init(struct pch_thermal_device *ptd, int *nr_trips)
117*4882a593Smuzhiyun {
118*4882a593Smuzhiyun 	u8 tsel;
119*4882a593Smuzhiyun 	u16 trip_temp;
120*4882a593Smuzhiyun 
121*4882a593Smuzhiyun 	*nr_trips = 0;
122*4882a593Smuzhiyun 
123*4882a593Smuzhiyun 	/* Check if BIOS has already enabled thermal sensor */
124*4882a593Smuzhiyun 	if (WPT_TSEL_ETS & readb(ptd->hw_base + WPT_TSEL)) {
125*4882a593Smuzhiyun 		ptd->bios_enabled = true;
126*4882a593Smuzhiyun 		goto read_trips;
127*4882a593Smuzhiyun 	}
128*4882a593Smuzhiyun 
129*4882a593Smuzhiyun 	tsel = readb(ptd->hw_base + WPT_TSEL);
130*4882a593Smuzhiyun 	/*
131*4882a593Smuzhiyun 	 * When TSEL's Policy Lock-Down bit is 1, TSEL become RO.
132*4882a593Smuzhiyun 	 * If so, thermal sensor cannot enable. Bail out.
133*4882a593Smuzhiyun 	 */
134*4882a593Smuzhiyun 	if (tsel & WPT_TSEL_PLDB) {
135*4882a593Smuzhiyun 		dev_err(&ptd->pdev->dev, "Sensor can't be enabled\n");
136*4882a593Smuzhiyun 		return -ENODEV;
137*4882a593Smuzhiyun 	}
138*4882a593Smuzhiyun 
139*4882a593Smuzhiyun 	writeb(tsel|WPT_TSEL_ETS, ptd->hw_base + WPT_TSEL);
140*4882a593Smuzhiyun 	if (!(WPT_TSEL_ETS & readb(ptd->hw_base + WPT_TSEL))) {
141*4882a593Smuzhiyun 		dev_err(&ptd->pdev->dev, "Sensor can't be enabled\n");
142*4882a593Smuzhiyun 		return -ENODEV;
143*4882a593Smuzhiyun 	}
144*4882a593Smuzhiyun 
145*4882a593Smuzhiyun read_trips:
146*4882a593Smuzhiyun 	ptd->crt_trip_id = -1;
147*4882a593Smuzhiyun 	trip_temp = readw(ptd->hw_base + WPT_CTT);
148*4882a593Smuzhiyun 	trip_temp &= 0x1FF;
149*4882a593Smuzhiyun 	if (trip_temp) {
150*4882a593Smuzhiyun 		/* Resolution of 1/2 degree C and an offset of -50C */
151*4882a593Smuzhiyun 		ptd->crt_temp = trip_temp * 1000 / 2 - 50000;
152*4882a593Smuzhiyun 		ptd->crt_trip_id = 0;
153*4882a593Smuzhiyun 		++(*nr_trips);
154*4882a593Smuzhiyun 	}
155*4882a593Smuzhiyun 
156*4882a593Smuzhiyun 	ptd->hot_trip_id = -1;
157*4882a593Smuzhiyun 	trip_temp = readw(ptd->hw_base + WPT_PHL);
158*4882a593Smuzhiyun 	trip_temp &= 0x1FF;
159*4882a593Smuzhiyun 	if (trip_temp) {
160*4882a593Smuzhiyun 		/* Resolution of 1/2 degree C and an offset of -50C */
161*4882a593Smuzhiyun 		ptd->hot_temp = trip_temp * 1000 / 2 - 50000;
162*4882a593Smuzhiyun 		ptd->hot_trip_id = *nr_trips;
163*4882a593Smuzhiyun 		++(*nr_trips);
164*4882a593Smuzhiyun 	}
165*4882a593Smuzhiyun 
166*4882a593Smuzhiyun 	pch_wpt_add_acpi_psv_trip(ptd, nr_trips);
167*4882a593Smuzhiyun 
168*4882a593Smuzhiyun 	return 0;
169*4882a593Smuzhiyun }
170*4882a593Smuzhiyun 
pch_wpt_get_temp(struct pch_thermal_device * ptd,int * temp)171*4882a593Smuzhiyun static int pch_wpt_get_temp(struct pch_thermal_device *ptd, int *temp)
172*4882a593Smuzhiyun {
173*4882a593Smuzhiyun 	u16 wpt_temp;
174*4882a593Smuzhiyun 
175*4882a593Smuzhiyun 	wpt_temp = WPT_TEMP_TSR & readw(ptd->hw_base + WPT_TEMP);
176*4882a593Smuzhiyun 
177*4882a593Smuzhiyun 	/* Resolution of 1/2 degree C and an offset of -50C */
178*4882a593Smuzhiyun 	*temp = (wpt_temp * 1000 / 2 - 50000);
179*4882a593Smuzhiyun 
180*4882a593Smuzhiyun 	return 0;
181*4882a593Smuzhiyun }
182*4882a593Smuzhiyun 
pch_wpt_suspend(struct pch_thermal_device * ptd)183*4882a593Smuzhiyun static int pch_wpt_suspend(struct pch_thermal_device *ptd)
184*4882a593Smuzhiyun {
185*4882a593Smuzhiyun 	u8 tsel;
186*4882a593Smuzhiyun 
187*4882a593Smuzhiyun 	if (ptd->bios_enabled)
188*4882a593Smuzhiyun 		return 0;
189*4882a593Smuzhiyun 
190*4882a593Smuzhiyun 	tsel = readb(ptd->hw_base + WPT_TSEL);
191*4882a593Smuzhiyun 
192*4882a593Smuzhiyun 	writeb(tsel & 0xFE, ptd->hw_base + WPT_TSEL);
193*4882a593Smuzhiyun 
194*4882a593Smuzhiyun 	return 0;
195*4882a593Smuzhiyun }
196*4882a593Smuzhiyun 
pch_wpt_resume(struct pch_thermal_device * ptd)197*4882a593Smuzhiyun static int pch_wpt_resume(struct pch_thermal_device *ptd)
198*4882a593Smuzhiyun {
199*4882a593Smuzhiyun 	u8 tsel;
200*4882a593Smuzhiyun 
201*4882a593Smuzhiyun 	if (ptd->bios_enabled)
202*4882a593Smuzhiyun 		return 0;
203*4882a593Smuzhiyun 
204*4882a593Smuzhiyun 	tsel = readb(ptd->hw_base + WPT_TSEL);
205*4882a593Smuzhiyun 
206*4882a593Smuzhiyun 	writeb(tsel | WPT_TSEL_ETS, ptd->hw_base + WPT_TSEL);
207*4882a593Smuzhiyun 
208*4882a593Smuzhiyun 	return 0;
209*4882a593Smuzhiyun }
210*4882a593Smuzhiyun 
211*4882a593Smuzhiyun struct pch_dev_ops {
212*4882a593Smuzhiyun 	int (*hw_init)(struct pch_thermal_device *ptd, int *nr_trips);
213*4882a593Smuzhiyun 	int (*get_temp)(struct pch_thermal_device *ptd, int *temp);
214*4882a593Smuzhiyun 	int (*suspend)(struct pch_thermal_device *ptd);
215*4882a593Smuzhiyun 	int (*resume)(struct pch_thermal_device *ptd);
216*4882a593Smuzhiyun };
217*4882a593Smuzhiyun 
218*4882a593Smuzhiyun 
219*4882a593Smuzhiyun /* dev ops for Wildcat Point */
220*4882a593Smuzhiyun static const struct pch_dev_ops pch_dev_ops_wpt = {
221*4882a593Smuzhiyun 	.hw_init = pch_wpt_init,
222*4882a593Smuzhiyun 	.get_temp = pch_wpt_get_temp,
223*4882a593Smuzhiyun 	.suspend = pch_wpt_suspend,
224*4882a593Smuzhiyun 	.resume = pch_wpt_resume,
225*4882a593Smuzhiyun };
226*4882a593Smuzhiyun 
pch_thermal_get_temp(struct thermal_zone_device * tzd,int * temp)227*4882a593Smuzhiyun static int pch_thermal_get_temp(struct thermal_zone_device *tzd, int *temp)
228*4882a593Smuzhiyun {
229*4882a593Smuzhiyun 	struct pch_thermal_device *ptd = tzd->devdata;
230*4882a593Smuzhiyun 
231*4882a593Smuzhiyun 	return	ptd->ops->get_temp(ptd, temp);
232*4882a593Smuzhiyun }
233*4882a593Smuzhiyun 
pch_get_trip_type(struct thermal_zone_device * tzd,int trip,enum thermal_trip_type * type)234*4882a593Smuzhiyun static int pch_get_trip_type(struct thermal_zone_device *tzd, int trip,
235*4882a593Smuzhiyun 			     enum thermal_trip_type *type)
236*4882a593Smuzhiyun {
237*4882a593Smuzhiyun 	struct pch_thermal_device *ptd = tzd->devdata;
238*4882a593Smuzhiyun 
239*4882a593Smuzhiyun 	if (ptd->crt_trip_id == trip)
240*4882a593Smuzhiyun 		*type = THERMAL_TRIP_CRITICAL;
241*4882a593Smuzhiyun 	else if (ptd->hot_trip_id == trip)
242*4882a593Smuzhiyun 		*type = THERMAL_TRIP_HOT;
243*4882a593Smuzhiyun 	else if (ptd->psv_trip_id == trip)
244*4882a593Smuzhiyun 		*type = THERMAL_TRIP_PASSIVE;
245*4882a593Smuzhiyun 	else
246*4882a593Smuzhiyun 		return -EINVAL;
247*4882a593Smuzhiyun 
248*4882a593Smuzhiyun 	return 0;
249*4882a593Smuzhiyun }
250*4882a593Smuzhiyun 
pch_get_trip_temp(struct thermal_zone_device * tzd,int trip,int * temp)251*4882a593Smuzhiyun static int pch_get_trip_temp(struct thermal_zone_device *tzd, int trip, int *temp)
252*4882a593Smuzhiyun {
253*4882a593Smuzhiyun 	struct pch_thermal_device *ptd = tzd->devdata;
254*4882a593Smuzhiyun 
255*4882a593Smuzhiyun 	if (ptd->crt_trip_id == trip)
256*4882a593Smuzhiyun 		*temp = ptd->crt_temp;
257*4882a593Smuzhiyun 	else if (ptd->hot_trip_id == trip)
258*4882a593Smuzhiyun 		*temp = ptd->hot_temp;
259*4882a593Smuzhiyun 	else if (ptd->psv_trip_id == trip)
260*4882a593Smuzhiyun 		*temp = ptd->psv_temp;
261*4882a593Smuzhiyun 	else
262*4882a593Smuzhiyun 		return -EINVAL;
263*4882a593Smuzhiyun 
264*4882a593Smuzhiyun 	return 0;
265*4882a593Smuzhiyun }
266*4882a593Smuzhiyun 
267*4882a593Smuzhiyun static struct thermal_zone_device_ops tzd_ops = {
268*4882a593Smuzhiyun 	.get_temp = pch_thermal_get_temp,
269*4882a593Smuzhiyun 	.get_trip_type = pch_get_trip_type,
270*4882a593Smuzhiyun 	.get_trip_temp = pch_get_trip_temp,
271*4882a593Smuzhiyun };
272*4882a593Smuzhiyun 
273*4882a593Smuzhiyun enum board_ids {
274*4882a593Smuzhiyun 	board_hsw,
275*4882a593Smuzhiyun 	board_wpt,
276*4882a593Smuzhiyun 	board_skl,
277*4882a593Smuzhiyun 	board_cnl,
278*4882a593Smuzhiyun 	board_cml,
279*4882a593Smuzhiyun };
280*4882a593Smuzhiyun 
281*4882a593Smuzhiyun static const struct board_info {
282*4882a593Smuzhiyun 	const char *name;
283*4882a593Smuzhiyun 	const struct pch_dev_ops *ops;
284*4882a593Smuzhiyun } board_info[] = {
285*4882a593Smuzhiyun 	[board_hsw] = {
286*4882a593Smuzhiyun 		.name = "pch_haswell",
287*4882a593Smuzhiyun 		.ops = &pch_dev_ops_wpt,
288*4882a593Smuzhiyun 	},
289*4882a593Smuzhiyun 	[board_wpt] = {
290*4882a593Smuzhiyun 		.name = "pch_wildcat_point",
291*4882a593Smuzhiyun 		.ops = &pch_dev_ops_wpt,
292*4882a593Smuzhiyun 	},
293*4882a593Smuzhiyun 	[board_skl] = {
294*4882a593Smuzhiyun 		.name = "pch_skylake",
295*4882a593Smuzhiyun 		.ops = &pch_dev_ops_wpt,
296*4882a593Smuzhiyun 	},
297*4882a593Smuzhiyun 	[board_cnl] = {
298*4882a593Smuzhiyun 		.name = "pch_cannonlake",
299*4882a593Smuzhiyun 		.ops = &pch_dev_ops_wpt,
300*4882a593Smuzhiyun 	},
301*4882a593Smuzhiyun 	[board_cml] = {
302*4882a593Smuzhiyun 		.name = "pch_cometlake",
303*4882a593Smuzhiyun 		.ops = &pch_dev_ops_wpt,
304*4882a593Smuzhiyun 	}
305*4882a593Smuzhiyun };
306*4882a593Smuzhiyun 
intel_pch_thermal_probe(struct pci_dev * pdev,const struct pci_device_id * id)307*4882a593Smuzhiyun static int intel_pch_thermal_probe(struct pci_dev *pdev,
308*4882a593Smuzhiyun 				   const struct pci_device_id *id)
309*4882a593Smuzhiyun {
310*4882a593Smuzhiyun 	enum board_ids board_id = id->driver_data;
311*4882a593Smuzhiyun 	const struct board_info *bi = &board_info[board_id];
312*4882a593Smuzhiyun 	struct pch_thermal_device *ptd;
313*4882a593Smuzhiyun 	int err;
314*4882a593Smuzhiyun 	int nr_trips;
315*4882a593Smuzhiyun 
316*4882a593Smuzhiyun 	ptd = devm_kzalloc(&pdev->dev, sizeof(*ptd), GFP_KERNEL);
317*4882a593Smuzhiyun 	if (!ptd)
318*4882a593Smuzhiyun 		return -ENOMEM;
319*4882a593Smuzhiyun 
320*4882a593Smuzhiyun 	ptd->ops = bi->ops;
321*4882a593Smuzhiyun 
322*4882a593Smuzhiyun 	pci_set_drvdata(pdev, ptd);
323*4882a593Smuzhiyun 	ptd->pdev = pdev;
324*4882a593Smuzhiyun 
325*4882a593Smuzhiyun 	err = pci_enable_device(pdev);
326*4882a593Smuzhiyun 	if (err) {
327*4882a593Smuzhiyun 		dev_err(&pdev->dev, "failed to enable pci device\n");
328*4882a593Smuzhiyun 		return err;
329*4882a593Smuzhiyun 	}
330*4882a593Smuzhiyun 
331*4882a593Smuzhiyun 	err = pci_request_regions(pdev, driver_name);
332*4882a593Smuzhiyun 	if (err) {
333*4882a593Smuzhiyun 		dev_err(&pdev->dev, "failed to request pci region\n");
334*4882a593Smuzhiyun 		goto error_disable;
335*4882a593Smuzhiyun 	}
336*4882a593Smuzhiyun 
337*4882a593Smuzhiyun 	ptd->hw_base = pci_ioremap_bar(pdev, 0);
338*4882a593Smuzhiyun 	if (!ptd->hw_base) {
339*4882a593Smuzhiyun 		err = -ENOMEM;
340*4882a593Smuzhiyun 		dev_err(&pdev->dev, "failed to map mem base\n");
341*4882a593Smuzhiyun 		goto error_release;
342*4882a593Smuzhiyun 	}
343*4882a593Smuzhiyun 
344*4882a593Smuzhiyun 	err = ptd->ops->hw_init(ptd, &nr_trips);
345*4882a593Smuzhiyun 	if (err)
346*4882a593Smuzhiyun 		goto error_cleanup;
347*4882a593Smuzhiyun 
348*4882a593Smuzhiyun 	ptd->tzd = thermal_zone_device_register(bi->name, nr_trips, 0, ptd,
349*4882a593Smuzhiyun 						&tzd_ops, NULL, 0, 0);
350*4882a593Smuzhiyun 	if (IS_ERR(ptd->tzd)) {
351*4882a593Smuzhiyun 		dev_err(&pdev->dev, "Failed to register thermal zone %s\n",
352*4882a593Smuzhiyun 			bi->name);
353*4882a593Smuzhiyun 		err = PTR_ERR(ptd->tzd);
354*4882a593Smuzhiyun 		goto error_cleanup;
355*4882a593Smuzhiyun 	}
356*4882a593Smuzhiyun 	err = thermal_zone_device_enable(ptd->tzd);
357*4882a593Smuzhiyun 	if (err)
358*4882a593Smuzhiyun 		goto err_unregister;
359*4882a593Smuzhiyun 
360*4882a593Smuzhiyun 	return 0;
361*4882a593Smuzhiyun 
362*4882a593Smuzhiyun err_unregister:
363*4882a593Smuzhiyun 	thermal_zone_device_unregister(ptd->tzd);
364*4882a593Smuzhiyun error_cleanup:
365*4882a593Smuzhiyun 	iounmap(ptd->hw_base);
366*4882a593Smuzhiyun error_release:
367*4882a593Smuzhiyun 	pci_release_regions(pdev);
368*4882a593Smuzhiyun error_disable:
369*4882a593Smuzhiyun 	pci_disable_device(pdev);
370*4882a593Smuzhiyun 	dev_err(&pdev->dev, "pci device failed to probe\n");
371*4882a593Smuzhiyun 	return err;
372*4882a593Smuzhiyun }
373*4882a593Smuzhiyun 
intel_pch_thermal_remove(struct pci_dev * pdev)374*4882a593Smuzhiyun static void intel_pch_thermal_remove(struct pci_dev *pdev)
375*4882a593Smuzhiyun {
376*4882a593Smuzhiyun 	struct pch_thermal_device *ptd = pci_get_drvdata(pdev);
377*4882a593Smuzhiyun 
378*4882a593Smuzhiyun 	thermal_zone_device_unregister(ptd->tzd);
379*4882a593Smuzhiyun 	iounmap(ptd->hw_base);
380*4882a593Smuzhiyun 	pci_set_drvdata(pdev, NULL);
381*4882a593Smuzhiyun 	pci_release_regions(pdev);
382*4882a593Smuzhiyun 	pci_disable_device(pdev);
383*4882a593Smuzhiyun }
384*4882a593Smuzhiyun 
intel_pch_thermal_suspend(struct device * device)385*4882a593Smuzhiyun static int intel_pch_thermal_suspend(struct device *device)
386*4882a593Smuzhiyun {
387*4882a593Smuzhiyun 	struct pch_thermal_device *ptd = dev_get_drvdata(device);
388*4882a593Smuzhiyun 
389*4882a593Smuzhiyun 	return ptd->ops->suspend(ptd);
390*4882a593Smuzhiyun }
391*4882a593Smuzhiyun 
intel_pch_thermal_resume(struct device * device)392*4882a593Smuzhiyun static int intel_pch_thermal_resume(struct device *device)
393*4882a593Smuzhiyun {
394*4882a593Smuzhiyun 	struct pch_thermal_device *ptd = dev_get_drvdata(device);
395*4882a593Smuzhiyun 
396*4882a593Smuzhiyun 	return ptd->ops->resume(ptd);
397*4882a593Smuzhiyun }
398*4882a593Smuzhiyun 
399*4882a593Smuzhiyun static const struct pci_device_id intel_pch_thermal_id[] = {
400*4882a593Smuzhiyun 	{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCH_THERMAL_DID_HSW_1),
401*4882a593Smuzhiyun 		.driver_data = board_hsw, },
402*4882a593Smuzhiyun 	{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCH_THERMAL_DID_HSW_2),
403*4882a593Smuzhiyun 		.driver_data = board_hsw, },
404*4882a593Smuzhiyun 	{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCH_THERMAL_DID_WPT),
405*4882a593Smuzhiyun 		.driver_data = board_wpt, },
406*4882a593Smuzhiyun 	{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCH_THERMAL_DID_SKL),
407*4882a593Smuzhiyun 		.driver_data = board_skl, },
408*4882a593Smuzhiyun 	{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCH_THERMAL_DID_SKL_H),
409*4882a593Smuzhiyun 		.driver_data = board_skl, },
410*4882a593Smuzhiyun 	{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCH_THERMAL_DID_CNL),
411*4882a593Smuzhiyun 		.driver_data = board_cnl, },
412*4882a593Smuzhiyun 	{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCH_THERMAL_DID_CNL_H),
413*4882a593Smuzhiyun 		.driver_data = board_cnl, },
414*4882a593Smuzhiyun 	{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCH_THERMAL_DID_CNL_LP),
415*4882a593Smuzhiyun 		.driver_data = board_cnl, },
416*4882a593Smuzhiyun 	{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCH_THERMAL_DID_CML_H),
417*4882a593Smuzhiyun 		.driver_data = board_cml, },
418*4882a593Smuzhiyun 	{ 0, },
419*4882a593Smuzhiyun };
420*4882a593Smuzhiyun MODULE_DEVICE_TABLE(pci, intel_pch_thermal_id);
421*4882a593Smuzhiyun 
422*4882a593Smuzhiyun static const struct dev_pm_ops intel_pch_pm_ops = {
423*4882a593Smuzhiyun 	.suspend = intel_pch_thermal_suspend,
424*4882a593Smuzhiyun 	.resume = intel_pch_thermal_resume,
425*4882a593Smuzhiyun };
426*4882a593Smuzhiyun 
427*4882a593Smuzhiyun static struct pci_driver intel_pch_thermal_driver = {
428*4882a593Smuzhiyun 	.name		= "intel_pch_thermal",
429*4882a593Smuzhiyun 	.id_table	= intel_pch_thermal_id,
430*4882a593Smuzhiyun 	.probe		= intel_pch_thermal_probe,
431*4882a593Smuzhiyun 	.remove		= intel_pch_thermal_remove,
432*4882a593Smuzhiyun 	.driver.pm	= &intel_pch_pm_ops,
433*4882a593Smuzhiyun };
434*4882a593Smuzhiyun 
435*4882a593Smuzhiyun module_pci_driver(intel_pch_thermal_driver);
436*4882a593Smuzhiyun 
437*4882a593Smuzhiyun MODULE_LICENSE("GPL v2");
438*4882a593Smuzhiyun MODULE_DESCRIPTION("Intel PCH Thermal driver");
439