xref: /OK3568_Linux_fs/kernel/drivers/thermal/broadcom/brcmstb_thermal.c (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0-only
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun  * Broadcom STB AVS TMON thermal sensor driver
4*4882a593Smuzhiyun  *
5*4882a593Smuzhiyun  * Copyright (c) 2015-2017 Broadcom
6*4882a593Smuzhiyun  */
7*4882a593Smuzhiyun 
8*4882a593Smuzhiyun #define DRV_NAME	"brcmstb_thermal"
9*4882a593Smuzhiyun 
10*4882a593Smuzhiyun #define pr_fmt(fmt)	DRV_NAME ": " fmt
11*4882a593Smuzhiyun 
12*4882a593Smuzhiyun #include <linux/bitops.h>
13*4882a593Smuzhiyun #include <linux/device.h>
14*4882a593Smuzhiyun #include <linux/err.h>
15*4882a593Smuzhiyun #include <linux/io.h>
16*4882a593Smuzhiyun #include <linux/irqreturn.h>
17*4882a593Smuzhiyun #include <linux/interrupt.h>
18*4882a593Smuzhiyun #include <linux/kernel.h>
19*4882a593Smuzhiyun #include <linux/module.h>
20*4882a593Smuzhiyun #include <linux/platform_device.h>
21*4882a593Smuzhiyun #include <linux/of_device.h>
22*4882a593Smuzhiyun #include <linux/thermal.h>
23*4882a593Smuzhiyun 
24*4882a593Smuzhiyun #define AVS_TMON_STATUS			0x00
25*4882a593Smuzhiyun  #define AVS_TMON_STATUS_valid_msk	BIT(11)
26*4882a593Smuzhiyun  #define AVS_TMON_STATUS_data_msk	GENMASK(10, 1)
27*4882a593Smuzhiyun  #define AVS_TMON_STATUS_data_shift	1
28*4882a593Smuzhiyun 
29*4882a593Smuzhiyun #define AVS_TMON_EN_OVERTEMP_RESET	0x04
30*4882a593Smuzhiyun  #define AVS_TMON_EN_OVERTEMP_RESET_msk	BIT(0)
31*4882a593Smuzhiyun 
32*4882a593Smuzhiyun #define AVS_TMON_RESET_THRESH		0x08
33*4882a593Smuzhiyun  #define AVS_TMON_RESET_THRESH_msk	GENMASK(10, 1)
34*4882a593Smuzhiyun  #define AVS_TMON_RESET_THRESH_shift	1
35*4882a593Smuzhiyun 
36*4882a593Smuzhiyun #define AVS_TMON_INT_IDLE_TIME		0x10
37*4882a593Smuzhiyun 
38*4882a593Smuzhiyun #define AVS_TMON_EN_TEMP_INT_SRCS	0x14
39*4882a593Smuzhiyun  #define AVS_TMON_EN_TEMP_INT_SRCS_high	BIT(1)
40*4882a593Smuzhiyun  #define AVS_TMON_EN_TEMP_INT_SRCS_low	BIT(0)
41*4882a593Smuzhiyun 
42*4882a593Smuzhiyun #define AVS_TMON_INT_THRESH		0x18
43*4882a593Smuzhiyun  #define AVS_TMON_INT_THRESH_high_msk	GENMASK(26, 17)
44*4882a593Smuzhiyun  #define AVS_TMON_INT_THRESH_high_shift	17
45*4882a593Smuzhiyun  #define AVS_TMON_INT_THRESH_low_msk	GENMASK(10, 1)
46*4882a593Smuzhiyun  #define AVS_TMON_INT_THRESH_low_shift	1
47*4882a593Smuzhiyun 
48*4882a593Smuzhiyun #define AVS_TMON_TEMP_INT_CODE		0x1c
49*4882a593Smuzhiyun #define AVS_TMON_TP_TEST_ENABLE		0x20
50*4882a593Smuzhiyun 
51*4882a593Smuzhiyun /* Default coefficients */
52*4882a593Smuzhiyun #define AVS_TMON_TEMP_SLOPE		487
53*4882a593Smuzhiyun #define AVS_TMON_TEMP_OFFSET		410040
54*4882a593Smuzhiyun 
55*4882a593Smuzhiyun /* HW related temperature constants */
56*4882a593Smuzhiyun #define AVS_TMON_TEMP_MAX		0x3ff
57*4882a593Smuzhiyun #define AVS_TMON_TEMP_MIN		-88161
58*4882a593Smuzhiyun #define AVS_TMON_TEMP_MASK		AVS_TMON_TEMP_MAX
59*4882a593Smuzhiyun 
60*4882a593Smuzhiyun enum avs_tmon_trip_type {
61*4882a593Smuzhiyun 	TMON_TRIP_TYPE_LOW = 0,
62*4882a593Smuzhiyun 	TMON_TRIP_TYPE_HIGH,
63*4882a593Smuzhiyun 	TMON_TRIP_TYPE_RESET,
64*4882a593Smuzhiyun 	TMON_TRIP_TYPE_MAX,
65*4882a593Smuzhiyun };
66*4882a593Smuzhiyun 
67*4882a593Smuzhiyun struct avs_tmon_trip {
68*4882a593Smuzhiyun 	/* HW bit to enable the trip */
69*4882a593Smuzhiyun 	u32 enable_offs;
70*4882a593Smuzhiyun 	u32 enable_mask;
71*4882a593Smuzhiyun 
72*4882a593Smuzhiyun 	/* HW field to read the trip temperature */
73*4882a593Smuzhiyun 	u32 reg_offs;
74*4882a593Smuzhiyun 	u32 reg_msk;
75*4882a593Smuzhiyun 	int reg_shift;
76*4882a593Smuzhiyun };
77*4882a593Smuzhiyun 
78*4882a593Smuzhiyun static struct avs_tmon_trip avs_tmon_trips[] = {
79*4882a593Smuzhiyun 	/* Trips when temperature is below threshold */
80*4882a593Smuzhiyun 	[TMON_TRIP_TYPE_LOW] = {
81*4882a593Smuzhiyun 		.enable_offs	= AVS_TMON_EN_TEMP_INT_SRCS,
82*4882a593Smuzhiyun 		.enable_mask	= AVS_TMON_EN_TEMP_INT_SRCS_low,
83*4882a593Smuzhiyun 		.reg_offs	= AVS_TMON_INT_THRESH,
84*4882a593Smuzhiyun 		.reg_msk	= AVS_TMON_INT_THRESH_low_msk,
85*4882a593Smuzhiyun 		.reg_shift	= AVS_TMON_INT_THRESH_low_shift,
86*4882a593Smuzhiyun 	},
87*4882a593Smuzhiyun 	/* Trips when temperature is above threshold */
88*4882a593Smuzhiyun 	[TMON_TRIP_TYPE_HIGH] = {
89*4882a593Smuzhiyun 		.enable_offs	= AVS_TMON_EN_TEMP_INT_SRCS,
90*4882a593Smuzhiyun 		.enable_mask	= AVS_TMON_EN_TEMP_INT_SRCS_high,
91*4882a593Smuzhiyun 		.reg_offs	= AVS_TMON_INT_THRESH,
92*4882a593Smuzhiyun 		.reg_msk	= AVS_TMON_INT_THRESH_high_msk,
93*4882a593Smuzhiyun 		.reg_shift	= AVS_TMON_INT_THRESH_high_shift,
94*4882a593Smuzhiyun 	},
95*4882a593Smuzhiyun 	/* Automatically resets chip when above threshold */
96*4882a593Smuzhiyun 	[TMON_TRIP_TYPE_RESET] = {
97*4882a593Smuzhiyun 		.enable_offs	= AVS_TMON_EN_OVERTEMP_RESET,
98*4882a593Smuzhiyun 		.enable_mask	= AVS_TMON_EN_OVERTEMP_RESET_msk,
99*4882a593Smuzhiyun 		.reg_offs	= AVS_TMON_RESET_THRESH,
100*4882a593Smuzhiyun 		.reg_msk	= AVS_TMON_RESET_THRESH_msk,
101*4882a593Smuzhiyun 		.reg_shift	= AVS_TMON_RESET_THRESH_shift,
102*4882a593Smuzhiyun 	},
103*4882a593Smuzhiyun };
104*4882a593Smuzhiyun 
105*4882a593Smuzhiyun struct brcmstb_thermal_params {
106*4882a593Smuzhiyun 	unsigned int offset;
107*4882a593Smuzhiyun 	unsigned int mult;
108*4882a593Smuzhiyun 	const struct thermal_zone_of_device_ops *of_ops;
109*4882a593Smuzhiyun };
110*4882a593Smuzhiyun 
111*4882a593Smuzhiyun struct brcmstb_thermal_priv {
112*4882a593Smuzhiyun 	void __iomem *tmon_base;
113*4882a593Smuzhiyun 	struct device *dev;
114*4882a593Smuzhiyun 	struct thermal_zone_device *thermal;
115*4882a593Smuzhiyun 	/* Process specific thermal parameters used for calculations */
116*4882a593Smuzhiyun 	const struct brcmstb_thermal_params *temp_params;
117*4882a593Smuzhiyun };
118*4882a593Smuzhiyun 
119*4882a593Smuzhiyun /* Convert a HW code to a temperature reading (millidegree celsius) */
avs_tmon_code_to_temp(struct brcmstb_thermal_priv * priv,u32 code)120*4882a593Smuzhiyun static inline int avs_tmon_code_to_temp(struct brcmstb_thermal_priv *priv,
121*4882a593Smuzhiyun 					u32 code)
122*4882a593Smuzhiyun {
123*4882a593Smuzhiyun 	int offset = priv->temp_params->offset;
124*4882a593Smuzhiyun 	int mult = priv->temp_params->mult;
125*4882a593Smuzhiyun 
126*4882a593Smuzhiyun 	return (offset - (int)((code & AVS_TMON_TEMP_MASK) * mult));
127*4882a593Smuzhiyun }
128*4882a593Smuzhiyun 
129*4882a593Smuzhiyun /*
130*4882a593Smuzhiyun  * Convert a temperature value (millidegree celsius) to a HW code
131*4882a593Smuzhiyun  *
132*4882a593Smuzhiyun  * @temp: temperature to convert
133*4882a593Smuzhiyun  * @low: if true, round toward the low side
134*4882a593Smuzhiyun  */
avs_tmon_temp_to_code(struct brcmstb_thermal_priv * priv,int temp,bool low)135*4882a593Smuzhiyun static inline u32 avs_tmon_temp_to_code(struct brcmstb_thermal_priv *priv,
136*4882a593Smuzhiyun 					int temp, bool low)
137*4882a593Smuzhiyun {
138*4882a593Smuzhiyun 	int offset = priv->temp_params->offset;
139*4882a593Smuzhiyun 	int mult = priv->temp_params->mult;
140*4882a593Smuzhiyun 
141*4882a593Smuzhiyun 	if (temp < AVS_TMON_TEMP_MIN)
142*4882a593Smuzhiyun 		return AVS_TMON_TEMP_MAX;	/* Maximum code value */
143*4882a593Smuzhiyun 
144*4882a593Smuzhiyun 	if (temp >= offset)
145*4882a593Smuzhiyun 		return 0;	/* Minimum code value */
146*4882a593Smuzhiyun 
147*4882a593Smuzhiyun 	if (low)
148*4882a593Smuzhiyun 		return (u32)(DIV_ROUND_UP(offset - temp, mult));
149*4882a593Smuzhiyun 	else
150*4882a593Smuzhiyun 		return (u32)((offset - temp) / mult);
151*4882a593Smuzhiyun }
152*4882a593Smuzhiyun 
brcmstb_get_temp(void * data,int * temp)153*4882a593Smuzhiyun static int brcmstb_get_temp(void *data, int *temp)
154*4882a593Smuzhiyun {
155*4882a593Smuzhiyun 	struct brcmstb_thermal_priv *priv = data;
156*4882a593Smuzhiyun 	u32 val;
157*4882a593Smuzhiyun 	long t;
158*4882a593Smuzhiyun 
159*4882a593Smuzhiyun 	val = __raw_readl(priv->tmon_base + AVS_TMON_STATUS);
160*4882a593Smuzhiyun 
161*4882a593Smuzhiyun 	if (!(val & AVS_TMON_STATUS_valid_msk)) {
162*4882a593Smuzhiyun 		dev_err(priv->dev, "reading not valid\n");
163*4882a593Smuzhiyun 		return -EIO;
164*4882a593Smuzhiyun 	}
165*4882a593Smuzhiyun 
166*4882a593Smuzhiyun 	val = (val & AVS_TMON_STATUS_data_msk) >> AVS_TMON_STATUS_data_shift;
167*4882a593Smuzhiyun 
168*4882a593Smuzhiyun 	t = avs_tmon_code_to_temp(priv, val);
169*4882a593Smuzhiyun 	if (t < 0)
170*4882a593Smuzhiyun 		*temp = 0;
171*4882a593Smuzhiyun 	else
172*4882a593Smuzhiyun 		*temp = t;
173*4882a593Smuzhiyun 
174*4882a593Smuzhiyun 	return 0;
175*4882a593Smuzhiyun }
176*4882a593Smuzhiyun 
avs_tmon_trip_enable(struct brcmstb_thermal_priv * priv,enum avs_tmon_trip_type type,int en)177*4882a593Smuzhiyun static void avs_tmon_trip_enable(struct brcmstb_thermal_priv *priv,
178*4882a593Smuzhiyun 				 enum avs_tmon_trip_type type, int en)
179*4882a593Smuzhiyun {
180*4882a593Smuzhiyun 	struct avs_tmon_trip *trip = &avs_tmon_trips[type];
181*4882a593Smuzhiyun 	u32 val = __raw_readl(priv->tmon_base + trip->enable_offs);
182*4882a593Smuzhiyun 
183*4882a593Smuzhiyun 	dev_dbg(priv->dev, "%sable trip, type %d\n", en ? "en" : "dis", type);
184*4882a593Smuzhiyun 
185*4882a593Smuzhiyun 	if (en)
186*4882a593Smuzhiyun 		val |= trip->enable_mask;
187*4882a593Smuzhiyun 	else
188*4882a593Smuzhiyun 		val &= ~trip->enable_mask;
189*4882a593Smuzhiyun 
190*4882a593Smuzhiyun 	__raw_writel(val, priv->tmon_base + trip->enable_offs);
191*4882a593Smuzhiyun }
192*4882a593Smuzhiyun 
avs_tmon_get_trip_temp(struct brcmstb_thermal_priv * priv,enum avs_tmon_trip_type type)193*4882a593Smuzhiyun static int avs_tmon_get_trip_temp(struct brcmstb_thermal_priv *priv,
194*4882a593Smuzhiyun 				  enum avs_tmon_trip_type type)
195*4882a593Smuzhiyun {
196*4882a593Smuzhiyun 	struct avs_tmon_trip *trip = &avs_tmon_trips[type];
197*4882a593Smuzhiyun 	u32 val = __raw_readl(priv->tmon_base + trip->reg_offs);
198*4882a593Smuzhiyun 
199*4882a593Smuzhiyun 	val &= trip->reg_msk;
200*4882a593Smuzhiyun 	val >>= trip->reg_shift;
201*4882a593Smuzhiyun 
202*4882a593Smuzhiyun 	return avs_tmon_code_to_temp(priv, val);
203*4882a593Smuzhiyun }
204*4882a593Smuzhiyun 
avs_tmon_set_trip_temp(struct brcmstb_thermal_priv * priv,enum avs_tmon_trip_type type,int temp)205*4882a593Smuzhiyun static void avs_tmon_set_trip_temp(struct brcmstb_thermal_priv *priv,
206*4882a593Smuzhiyun 				   enum avs_tmon_trip_type type,
207*4882a593Smuzhiyun 				   int temp)
208*4882a593Smuzhiyun {
209*4882a593Smuzhiyun 	struct avs_tmon_trip *trip = &avs_tmon_trips[type];
210*4882a593Smuzhiyun 	u32 val, orig;
211*4882a593Smuzhiyun 
212*4882a593Smuzhiyun 	dev_dbg(priv->dev, "set temp %d to %d\n", type, temp);
213*4882a593Smuzhiyun 
214*4882a593Smuzhiyun 	/* round toward low temp for the low interrupt */
215*4882a593Smuzhiyun 	val = avs_tmon_temp_to_code(priv, temp,
216*4882a593Smuzhiyun 				    type == TMON_TRIP_TYPE_LOW);
217*4882a593Smuzhiyun 
218*4882a593Smuzhiyun 	val <<= trip->reg_shift;
219*4882a593Smuzhiyun 	val &= trip->reg_msk;
220*4882a593Smuzhiyun 
221*4882a593Smuzhiyun 	orig = __raw_readl(priv->tmon_base + trip->reg_offs);
222*4882a593Smuzhiyun 	orig &= ~trip->reg_msk;
223*4882a593Smuzhiyun 	orig |= val;
224*4882a593Smuzhiyun 	__raw_writel(orig, priv->tmon_base + trip->reg_offs);
225*4882a593Smuzhiyun }
226*4882a593Smuzhiyun 
avs_tmon_get_intr_temp(struct brcmstb_thermal_priv * priv)227*4882a593Smuzhiyun static int avs_tmon_get_intr_temp(struct brcmstb_thermal_priv *priv)
228*4882a593Smuzhiyun {
229*4882a593Smuzhiyun 	u32 val;
230*4882a593Smuzhiyun 
231*4882a593Smuzhiyun 	val = __raw_readl(priv->tmon_base + AVS_TMON_TEMP_INT_CODE);
232*4882a593Smuzhiyun 	return avs_tmon_code_to_temp(priv, val);
233*4882a593Smuzhiyun }
234*4882a593Smuzhiyun 
brcmstb_tmon_irq_thread(int irq,void * data)235*4882a593Smuzhiyun static irqreturn_t brcmstb_tmon_irq_thread(int irq, void *data)
236*4882a593Smuzhiyun {
237*4882a593Smuzhiyun 	struct brcmstb_thermal_priv *priv = data;
238*4882a593Smuzhiyun 	int low, high, intr;
239*4882a593Smuzhiyun 
240*4882a593Smuzhiyun 	low = avs_tmon_get_trip_temp(priv, TMON_TRIP_TYPE_LOW);
241*4882a593Smuzhiyun 	high = avs_tmon_get_trip_temp(priv, TMON_TRIP_TYPE_HIGH);
242*4882a593Smuzhiyun 	intr = avs_tmon_get_intr_temp(priv);
243*4882a593Smuzhiyun 
244*4882a593Smuzhiyun 	dev_dbg(priv->dev, "low/intr/high: %d/%d/%d\n",
245*4882a593Smuzhiyun 			low, intr, high);
246*4882a593Smuzhiyun 
247*4882a593Smuzhiyun 	/* Disable high-temp until next threshold shift */
248*4882a593Smuzhiyun 	if (intr >= high)
249*4882a593Smuzhiyun 		avs_tmon_trip_enable(priv, TMON_TRIP_TYPE_HIGH, 0);
250*4882a593Smuzhiyun 	/* Disable low-temp until next threshold shift */
251*4882a593Smuzhiyun 	if (intr <= low)
252*4882a593Smuzhiyun 		avs_tmon_trip_enable(priv, TMON_TRIP_TYPE_LOW, 0);
253*4882a593Smuzhiyun 
254*4882a593Smuzhiyun 	/*
255*4882a593Smuzhiyun 	 * Notify using the interrupt temperature, in case the temperature
256*4882a593Smuzhiyun 	 * changes before it can next be read out
257*4882a593Smuzhiyun 	 */
258*4882a593Smuzhiyun 	thermal_zone_device_update(priv->thermal, intr);
259*4882a593Smuzhiyun 
260*4882a593Smuzhiyun 	return IRQ_HANDLED;
261*4882a593Smuzhiyun }
262*4882a593Smuzhiyun 
brcmstb_set_trips(void * data,int low,int high)263*4882a593Smuzhiyun static int brcmstb_set_trips(void *data, int low, int high)
264*4882a593Smuzhiyun {
265*4882a593Smuzhiyun 	struct brcmstb_thermal_priv *priv = data;
266*4882a593Smuzhiyun 
267*4882a593Smuzhiyun 	dev_dbg(priv->dev, "set trips %d <--> %d\n", low, high);
268*4882a593Smuzhiyun 
269*4882a593Smuzhiyun 	/*
270*4882a593Smuzhiyun 	 * Disable low-temp if "low" is too small. As per thermal framework
271*4882a593Smuzhiyun 	 * API, we use -INT_MAX rather than INT_MIN.
272*4882a593Smuzhiyun 	 */
273*4882a593Smuzhiyun 	if (low <= -INT_MAX) {
274*4882a593Smuzhiyun 		avs_tmon_trip_enable(priv, TMON_TRIP_TYPE_LOW, 0);
275*4882a593Smuzhiyun 	} else {
276*4882a593Smuzhiyun 		avs_tmon_set_trip_temp(priv, TMON_TRIP_TYPE_LOW, low);
277*4882a593Smuzhiyun 		avs_tmon_trip_enable(priv, TMON_TRIP_TYPE_LOW, 1);
278*4882a593Smuzhiyun 	}
279*4882a593Smuzhiyun 
280*4882a593Smuzhiyun 	/* Disable high-temp if "high" is too big. */
281*4882a593Smuzhiyun 	if (high == INT_MAX) {
282*4882a593Smuzhiyun 		avs_tmon_trip_enable(priv, TMON_TRIP_TYPE_HIGH, 0);
283*4882a593Smuzhiyun 	} else {
284*4882a593Smuzhiyun 		avs_tmon_set_trip_temp(priv, TMON_TRIP_TYPE_HIGH, high);
285*4882a593Smuzhiyun 		avs_tmon_trip_enable(priv, TMON_TRIP_TYPE_HIGH, 1);
286*4882a593Smuzhiyun 	}
287*4882a593Smuzhiyun 
288*4882a593Smuzhiyun 	return 0;
289*4882a593Smuzhiyun }
290*4882a593Smuzhiyun 
291*4882a593Smuzhiyun static const struct thermal_zone_of_device_ops brcmstb_16nm_of_ops = {
292*4882a593Smuzhiyun 	.get_temp	= brcmstb_get_temp,
293*4882a593Smuzhiyun };
294*4882a593Smuzhiyun 
295*4882a593Smuzhiyun static const struct brcmstb_thermal_params brcmstb_16nm_params = {
296*4882a593Smuzhiyun 	.offset	= 457829,
297*4882a593Smuzhiyun 	.mult	= 557,
298*4882a593Smuzhiyun 	.of_ops	= &brcmstb_16nm_of_ops,
299*4882a593Smuzhiyun };
300*4882a593Smuzhiyun 
301*4882a593Smuzhiyun static const struct thermal_zone_of_device_ops brcmstb_28nm_of_ops = {
302*4882a593Smuzhiyun 	.get_temp	= brcmstb_get_temp,
303*4882a593Smuzhiyun 	.set_trips	= brcmstb_set_trips,
304*4882a593Smuzhiyun };
305*4882a593Smuzhiyun 
306*4882a593Smuzhiyun static const struct brcmstb_thermal_params brcmstb_28nm_params = {
307*4882a593Smuzhiyun 	.offset	= 410040,
308*4882a593Smuzhiyun 	.mult	= 487,
309*4882a593Smuzhiyun 	.of_ops	= &brcmstb_28nm_of_ops,
310*4882a593Smuzhiyun };
311*4882a593Smuzhiyun 
312*4882a593Smuzhiyun static const struct of_device_id brcmstb_thermal_id_table[] = {
313*4882a593Smuzhiyun 	{ .compatible = "brcm,avs-tmon-bcm7216", .data = &brcmstb_16nm_params },
314*4882a593Smuzhiyun 	{ .compatible = "brcm,avs-tmon", .data = &brcmstb_28nm_params },
315*4882a593Smuzhiyun 	{},
316*4882a593Smuzhiyun };
317*4882a593Smuzhiyun MODULE_DEVICE_TABLE(of, brcmstb_thermal_id_table);
318*4882a593Smuzhiyun 
brcmstb_thermal_probe(struct platform_device * pdev)319*4882a593Smuzhiyun static int brcmstb_thermal_probe(struct platform_device *pdev)
320*4882a593Smuzhiyun {
321*4882a593Smuzhiyun 	const struct thermal_zone_of_device_ops *of_ops;
322*4882a593Smuzhiyun 	struct thermal_zone_device *thermal;
323*4882a593Smuzhiyun 	struct brcmstb_thermal_priv *priv;
324*4882a593Smuzhiyun 	struct resource *res;
325*4882a593Smuzhiyun 	int irq, ret;
326*4882a593Smuzhiyun 
327*4882a593Smuzhiyun 	priv = devm_kzalloc(&pdev->dev, sizeof(*priv), GFP_KERNEL);
328*4882a593Smuzhiyun 	if (!priv)
329*4882a593Smuzhiyun 		return -ENOMEM;
330*4882a593Smuzhiyun 
331*4882a593Smuzhiyun 	priv->temp_params = of_device_get_match_data(&pdev->dev);
332*4882a593Smuzhiyun 	if (!priv->temp_params)
333*4882a593Smuzhiyun 		return -EINVAL;
334*4882a593Smuzhiyun 
335*4882a593Smuzhiyun 	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
336*4882a593Smuzhiyun 	priv->tmon_base = devm_ioremap_resource(&pdev->dev, res);
337*4882a593Smuzhiyun 	if (IS_ERR(priv->tmon_base))
338*4882a593Smuzhiyun 		return PTR_ERR(priv->tmon_base);
339*4882a593Smuzhiyun 
340*4882a593Smuzhiyun 	priv->dev = &pdev->dev;
341*4882a593Smuzhiyun 	platform_set_drvdata(pdev, priv);
342*4882a593Smuzhiyun 	of_ops = priv->temp_params->of_ops;
343*4882a593Smuzhiyun 
344*4882a593Smuzhiyun 	thermal = devm_thermal_zone_of_sensor_register(&pdev->dev, 0, priv,
345*4882a593Smuzhiyun 						       of_ops);
346*4882a593Smuzhiyun 	if (IS_ERR(thermal)) {
347*4882a593Smuzhiyun 		ret = PTR_ERR(thermal);
348*4882a593Smuzhiyun 		dev_err(&pdev->dev, "could not register sensor: %d\n", ret);
349*4882a593Smuzhiyun 		return ret;
350*4882a593Smuzhiyun 	}
351*4882a593Smuzhiyun 
352*4882a593Smuzhiyun 	priv->thermal = thermal;
353*4882a593Smuzhiyun 
354*4882a593Smuzhiyun 	irq = platform_get_irq(pdev, 0);
355*4882a593Smuzhiyun 	if (irq >= 0) {
356*4882a593Smuzhiyun 		ret = devm_request_threaded_irq(&pdev->dev, irq, NULL,
357*4882a593Smuzhiyun 						brcmstb_tmon_irq_thread,
358*4882a593Smuzhiyun 						IRQF_ONESHOT,
359*4882a593Smuzhiyun 						DRV_NAME, priv);
360*4882a593Smuzhiyun 		if (ret < 0) {
361*4882a593Smuzhiyun 			dev_err(&pdev->dev, "could not request IRQ: %d\n", ret);
362*4882a593Smuzhiyun 			return ret;
363*4882a593Smuzhiyun 		}
364*4882a593Smuzhiyun 	}
365*4882a593Smuzhiyun 
366*4882a593Smuzhiyun 	dev_info(&pdev->dev, "registered AVS TMON of-sensor driver\n");
367*4882a593Smuzhiyun 
368*4882a593Smuzhiyun 	return 0;
369*4882a593Smuzhiyun }
370*4882a593Smuzhiyun 
371*4882a593Smuzhiyun static struct platform_driver brcmstb_thermal_driver = {
372*4882a593Smuzhiyun 	.probe = brcmstb_thermal_probe,
373*4882a593Smuzhiyun 	.driver = {
374*4882a593Smuzhiyun 		.name = DRV_NAME,
375*4882a593Smuzhiyun 		.of_match_table = brcmstb_thermal_id_table,
376*4882a593Smuzhiyun 	},
377*4882a593Smuzhiyun };
378*4882a593Smuzhiyun module_platform_driver(brcmstb_thermal_driver);
379*4882a593Smuzhiyun 
380*4882a593Smuzhiyun MODULE_LICENSE("GPL v2");
381*4882a593Smuzhiyun MODULE_AUTHOR("Brian Norris");
382*4882a593Smuzhiyun MODULE_DESCRIPTION("Broadcom STB AVS TMON thermal driver");
383