xref: /OK3568_Linux_fs/kernel/drivers/target/iscsi/cxgbit/cxgbit_main.c (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0-only
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun  * Copyright (c) 2016 Chelsio Communications, Inc.
4*4882a593Smuzhiyun  */
5*4882a593Smuzhiyun 
6*4882a593Smuzhiyun #define DRV_NAME "cxgbit"
7*4882a593Smuzhiyun #define DRV_VERSION "1.0.0-ko"
8*4882a593Smuzhiyun #define pr_fmt(fmt) DRV_NAME ": " fmt
9*4882a593Smuzhiyun 
10*4882a593Smuzhiyun #include "cxgbit.h"
11*4882a593Smuzhiyun 
12*4882a593Smuzhiyun #ifdef CONFIG_CHELSIO_T4_DCB
13*4882a593Smuzhiyun #include <net/dcbevent.h>
14*4882a593Smuzhiyun #include "cxgb4_dcb.h"
15*4882a593Smuzhiyun #endif
16*4882a593Smuzhiyun 
17*4882a593Smuzhiyun LIST_HEAD(cdev_list_head);
18*4882a593Smuzhiyun /* cdev list lock */
19*4882a593Smuzhiyun DEFINE_MUTEX(cdev_list_lock);
20*4882a593Smuzhiyun 
_cxgbit_free_cdev(struct kref * kref)21*4882a593Smuzhiyun void _cxgbit_free_cdev(struct kref *kref)
22*4882a593Smuzhiyun {
23*4882a593Smuzhiyun 	struct cxgbit_device *cdev;
24*4882a593Smuzhiyun 
25*4882a593Smuzhiyun 	cdev = container_of(kref, struct cxgbit_device, kref);
26*4882a593Smuzhiyun 
27*4882a593Smuzhiyun 	cxgbi_ppm_release(cdev2ppm(cdev));
28*4882a593Smuzhiyun 	kfree(cdev);
29*4882a593Smuzhiyun }
30*4882a593Smuzhiyun 
cxgbit_set_mdsl(struct cxgbit_device * cdev)31*4882a593Smuzhiyun static void cxgbit_set_mdsl(struct cxgbit_device *cdev)
32*4882a593Smuzhiyun {
33*4882a593Smuzhiyun 	struct cxgb4_lld_info *lldi = &cdev->lldi;
34*4882a593Smuzhiyun 	u32 mdsl;
35*4882a593Smuzhiyun 
36*4882a593Smuzhiyun #define ULP2_MAX_PKT_LEN 16224
37*4882a593Smuzhiyun #define ISCSI_PDU_NONPAYLOAD_LEN 312
38*4882a593Smuzhiyun 	mdsl = min_t(u32, lldi->iscsi_iolen - ISCSI_PDU_NONPAYLOAD_LEN,
39*4882a593Smuzhiyun 		     ULP2_MAX_PKT_LEN - ISCSI_PDU_NONPAYLOAD_LEN);
40*4882a593Smuzhiyun 	mdsl = min_t(u32, mdsl, 8192);
41*4882a593Smuzhiyun 	mdsl = min_t(u32, mdsl, (MAX_SKB_FRAGS - 1) * PAGE_SIZE);
42*4882a593Smuzhiyun 
43*4882a593Smuzhiyun 	cdev->mdsl = mdsl;
44*4882a593Smuzhiyun }
45*4882a593Smuzhiyun 
cxgbit_uld_add(const struct cxgb4_lld_info * lldi)46*4882a593Smuzhiyun static void *cxgbit_uld_add(const struct cxgb4_lld_info *lldi)
47*4882a593Smuzhiyun {
48*4882a593Smuzhiyun 	struct cxgbit_device *cdev;
49*4882a593Smuzhiyun 
50*4882a593Smuzhiyun 	if (is_t4(lldi->adapter_type))
51*4882a593Smuzhiyun 		return ERR_PTR(-ENODEV);
52*4882a593Smuzhiyun 
53*4882a593Smuzhiyun 	cdev = kzalloc(sizeof(*cdev), GFP_KERNEL);
54*4882a593Smuzhiyun 	if (!cdev)
55*4882a593Smuzhiyun 		return ERR_PTR(-ENOMEM);
56*4882a593Smuzhiyun 
57*4882a593Smuzhiyun 	kref_init(&cdev->kref);
58*4882a593Smuzhiyun 	spin_lock_init(&cdev->np_lock);
59*4882a593Smuzhiyun 
60*4882a593Smuzhiyun 	cdev->lldi = *lldi;
61*4882a593Smuzhiyun 
62*4882a593Smuzhiyun 	cxgbit_set_mdsl(cdev);
63*4882a593Smuzhiyun 
64*4882a593Smuzhiyun 	if (cxgbit_ddp_init(cdev) < 0) {
65*4882a593Smuzhiyun 		kfree(cdev);
66*4882a593Smuzhiyun 		return ERR_PTR(-EINVAL);
67*4882a593Smuzhiyun 	}
68*4882a593Smuzhiyun 
69*4882a593Smuzhiyun 	if (!test_bit(CDEV_DDP_ENABLE, &cdev->flags))
70*4882a593Smuzhiyun 		pr_info("cdev %s ddp init failed\n",
71*4882a593Smuzhiyun 			pci_name(lldi->pdev));
72*4882a593Smuzhiyun 
73*4882a593Smuzhiyun 	if (lldi->fw_vers >= 0x10d2b00)
74*4882a593Smuzhiyun 		set_bit(CDEV_ISO_ENABLE, &cdev->flags);
75*4882a593Smuzhiyun 
76*4882a593Smuzhiyun 	spin_lock_init(&cdev->cskq.lock);
77*4882a593Smuzhiyun 	INIT_LIST_HEAD(&cdev->cskq.list);
78*4882a593Smuzhiyun 
79*4882a593Smuzhiyun 	mutex_lock(&cdev_list_lock);
80*4882a593Smuzhiyun 	list_add_tail(&cdev->list, &cdev_list_head);
81*4882a593Smuzhiyun 	mutex_unlock(&cdev_list_lock);
82*4882a593Smuzhiyun 
83*4882a593Smuzhiyun 	pr_info("cdev %s added for iSCSI target transport\n",
84*4882a593Smuzhiyun 		pci_name(lldi->pdev));
85*4882a593Smuzhiyun 
86*4882a593Smuzhiyun 	return cdev;
87*4882a593Smuzhiyun }
88*4882a593Smuzhiyun 
cxgbit_close_conn(struct cxgbit_device * cdev)89*4882a593Smuzhiyun static void cxgbit_close_conn(struct cxgbit_device *cdev)
90*4882a593Smuzhiyun {
91*4882a593Smuzhiyun 	struct cxgbit_sock *csk;
92*4882a593Smuzhiyun 	struct sk_buff *skb;
93*4882a593Smuzhiyun 	bool wakeup_thread = false;
94*4882a593Smuzhiyun 
95*4882a593Smuzhiyun 	spin_lock_bh(&cdev->cskq.lock);
96*4882a593Smuzhiyun 	list_for_each_entry(csk, &cdev->cskq.list, list) {
97*4882a593Smuzhiyun 		skb = alloc_skb(0, GFP_ATOMIC);
98*4882a593Smuzhiyun 		if (!skb)
99*4882a593Smuzhiyun 			continue;
100*4882a593Smuzhiyun 
101*4882a593Smuzhiyun 		spin_lock_bh(&csk->rxq.lock);
102*4882a593Smuzhiyun 		__skb_queue_tail(&csk->rxq, skb);
103*4882a593Smuzhiyun 		if (skb_queue_len(&csk->rxq) == 1)
104*4882a593Smuzhiyun 			wakeup_thread = true;
105*4882a593Smuzhiyun 		spin_unlock_bh(&csk->rxq.lock);
106*4882a593Smuzhiyun 
107*4882a593Smuzhiyun 		if (wakeup_thread) {
108*4882a593Smuzhiyun 			wake_up(&csk->waitq);
109*4882a593Smuzhiyun 			wakeup_thread = false;
110*4882a593Smuzhiyun 		}
111*4882a593Smuzhiyun 	}
112*4882a593Smuzhiyun 	spin_unlock_bh(&cdev->cskq.lock);
113*4882a593Smuzhiyun }
114*4882a593Smuzhiyun 
cxgbit_detach_cdev(struct cxgbit_device * cdev)115*4882a593Smuzhiyun static void cxgbit_detach_cdev(struct cxgbit_device *cdev)
116*4882a593Smuzhiyun {
117*4882a593Smuzhiyun 	bool free_cdev = false;
118*4882a593Smuzhiyun 
119*4882a593Smuzhiyun 	spin_lock_bh(&cdev->cskq.lock);
120*4882a593Smuzhiyun 	if (list_empty(&cdev->cskq.list))
121*4882a593Smuzhiyun 		free_cdev = true;
122*4882a593Smuzhiyun 	spin_unlock_bh(&cdev->cskq.lock);
123*4882a593Smuzhiyun 
124*4882a593Smuzhiyun 	if (free_cdev) {
125*4882a593Smuzhiyun 		mutex_lock(&cdev_list_lock);
126*4882a593Smuzhiyun 		list_del(&cdev->list);
127*4882a593Smuzhiyun 		mutex_unlock(&cdev_list_lock);
128*4882a593Smuzhiyun 
129*4882a593Smuzhiyun 		cxgbit_put_cdev(cdev);
130*4882a593Smuzhiyun 	} else {
131*4882a593Smuzhiyun 		cxgbit_close_conn(cdev);
132*4882a593Smuzhiyun 	}
133*4882a593Smuzhiyun }
134*4882a593Smuzhiyun 
cxgbit_uld_state_change(void * handle,enum cxgb4_state state)135*4882a593Smuzhiyun static int cxgbit_uld_state_change(void *handle, enum cxgb4_state state)
136*4882a593Smuzhiyun {
137*4882a593Smuzhiyun 	struct cxgbit_device *cdev = handle;
138*4882a593Smuzhiyun 
139*4882a593Smuzhiyun 	switch (state) {
140*4882a593Smuzhiyun 	case CXGB4_STATE_UP:
141*4882a593Smuzhiyun 		set_bit(CDEV_STATE_UP, &cdev->flags);
142*4882a593Smuzhiyun 		pr_info("cdev %s state UP.\n", pci_name(cdev->lldi.pdev));
143*4882a593Smuzhiyun 		break;
144*4882a593Smuzhiyun 	case CXGB4_STATE_START_RECOVERY:
145*4882a593Smuzhiyun 		clear_bit(CDEV_STATE_UP, &cdev->flags);
146*4882a593Smuzhiyun 		cxgbit_close_conn(cdev);
147*4882a593Smuzhiyun 		pr_info("cdev %s state RECOVERY.\n", pci_name(cdev->lldi.pdev));
148*4882a593Smuzhiyun 		break;
149*4882a593Smuzhiyun 	case CXGB4_STATE_DOWN:
150*4882a593Smuzhiyun 		pr_info("cdev %s state DOWN.\n", pci_name(cdev->lldi.pdev));
151*4882a593Smuzhiyun 		break;
152*4882a593Smuzhiyun 	case CXGB4_STATE_DETACH:
153*4882a593Smuzhiyun 		clear_bit(CDEV_STATE_UP, &cdev->flags);
154*4882a593Smuzhiyun 		pr_info("cdev %s state DETACH.\n", pci_name(cdev->lldi.pdev));
155*4882a593Smuzhiyun 		cxgbit_detach_cdev(cdev);
156*4882a593Smuzhiyun 		break;
157*4882a593Smuzhiyun 	default:
158*4882a593Smuzhiyun 		pr_info("cdev %s unknown state %d.\n",
159*4882a593Smuzhiyun 			pci_name(cdev->lldi.pdev), state);
160*4882a593Smuzhiyun 		break;
161*4882a593Smuzhiyun 	}
162*4882a593Smuzhiyun 	return 0;
163*4882a593Smuzhiyun }
164*4882a593Smuzhiyun 
165*4882a593Smuzhiyun static void
cxgbit_process_ddpvld(struct cxgbit_sock * csk,struct cxgbit_lro_pdu_cb * pdu_cb,u32 ddpvld)166*4882a593Smuzhiyun cxgbit_process_ddpvld(struct cxgbit_sock *csk, struct cxgbit_lro_pdu_cb *pdu_cb,
167*4882a593Smuzhiyun 		      u32 ddpvld)
168*4882a593Smuzhiyun {
169*4882a593Smuzhiyun 
170*4882a593Smuzhiyun 	if (ddpvld & (1 << CPL_RX_ISCSI_DDP_STATUS_HCRC_SHIFT)) {
171*4882a593Smuzhiyun 		pr_info("tid 0x%x, status 0x%x, hcrc bad.\n", csk->tid, ddpvld);
172*4882a593Smuzhiyun 		pdu_cb->flags |= PDUCBF_RX_HCRC_ERR;
173*4882a593Smuzhiyun 	}
174*4882a593Smuzhiyun 
175*4882a593Smuzhiyun 	if (ddpvld & (1 << CPL_RX_ISCSI_DDP_STATUS_DCRC_SHIFT)) {
176*4882a593Smuzhiyun 		pr_info("tid 0x%x, status 0x%x, dcrc bad.\n", csk->tid, ddpvld);
177*4882a593Smuzhiyun 		pdu_cb->flags |= PDUCBF_RX_DCRC_ERR;
178*4882a593Smuzhiyun 	}
179*4882a593Smuzhiyun 
180*4882a593Smuzhiyun 	if (ddpvld & (1 << CPL_RX_ISCSI_DDP_STATUS_PAD_SHIFT))
181*4882a593Smuzhiyun 		pr_info("tid 0x%x, status 0x%x, pad bad.\n", csk->tid, ddpvld);
182*4882a593Smuzhiyun 
183*4882a593Smuzhiyun 	if ((ddpvld & (1 << CPL_RX_ISCSI_DDP_STATUS_DDP_SHIFT)) &&
184*4882a593Smuzhiyun 	    (!(pdu_cb->flags & PDUCBF_RX_DATA))) {
185*4882a593Smuzhiyun 		pdu_cb->flags |= PDUCBF_RX_DATA_DDPD;
186*4882a593Smuzhiyun 	}
187*4882a593Smuzhiyun }
188*4882a593Smuzhiyun 
189*4882a593Smuzhiyun static void
cxgbit_lro_add_packet_rsp(struct sk_buff * skb,u8 op,const __be64 * rsp)190*4882a593Smuzhiyun cxgbit_lro_add_packet_rsp(struct sk_buff *skb, u8 op, const __be64 *rsp)
191*4882a593Smuzhiyun {
192*4882a593Smuzhiyun 	struct cxgbit_lro_cb *lro_cb = cxgbit_skb_lro_cb(skb);
193*4882a593Smuzhiyun 	struct cxgbit_lro_pdu_cb *pdu_cb = cxgbit_skb_lro_pdu_cb(skb,
194*4882a593Smuzhiyun 						lro_cb->pdu_idx);
195*4882a593Smuzhiyun 	struct cpl_rx_iscsi_ddp *cpl = (struct cpl_rx_iscsi_ddp *)(rsp + 1);
196*4882a593Smuzhiyun 
197*4882a593Smuzhiyun 	cxgbit_process_ddpvld(lro_cb->csk, pdu_cb, be32_to_cpu(cpl->ddpvld));
198*4882a593Smuzhiyun 
199*4882a593Smuzhiyun 	pdu_cb->flags |= PDUCBF_RX_STATUS;
200*4882a593Smuzhiyun 	pdu_cb->ddigest = ntohl(cpl->ulp_crc);
201*4882a593Smuzhiyun 	pdu_cb->pdulen = ntohs(cpl->len);
202*4882a593Smuzhiyun 
203*4882a593Smuzhiyun 	if (pdu_cb->flags & PDUCBF_RX_HDR)
204*4882a593Smuzhiyun 		pdu_cb->complete = true;
205*4882a593Smuzhiyun 
206*4882a593Smuzhiyun 	lro_cb->pdu_totallen += pdu_cb->pdulen;
207*4882a593Smuzhiyun 	lro_cb->complete = true;
208*4882a593Smuzhiyun 	lro_cb->pdu_idx++;
209*4882a593Smuzhiyun }
210*4882a593Smuzhiyun 
211*4882a593Smuzhiyun static void
cxgbit_copy_frags(struct sk_buff * skb,const struct pkt_gl * gl,unsigned int offset)212*4882a593Smuzhiyun cxgbit_copy_frags(struct sk_buff *skb, const struct pkt_gl *gl,
213*4882a593Smuzhiyun 		  unsigned int offset)
214*4882a593Smuzhiyun {
215*4882a593Smuzhiyun 	u8 skb_frag_idx = skb_shinfo(skb)->nr_frags;
216*4882a593Smuzhiyun 	u8 i;
217*4882a593Smuzhiyun 
218*4882a593Smuzhiyun 	/* usually there's just one frag */
219*4882a593Smuzhiyun 	__skb_fill_page_desc(skb, skb_frag_idx, gl->frags[0].page,
220*4882a593Smuzhiyun 			     gl->frags[0].offset + offset,
221*4882a593Smuzhiyun 			     gl->frags[0].size - offset);
222*4882a593Smuzhiyun 	for (i = 1; i < gl->nfrags; i++)
223*4882a593Smuzhiyun 		__skb_fill_page_desc(skb, skb_frag_idx + i,
224*4882a593Smuzhiyun 				     gl->frags[i].page,
225*4882a593Smuzhiyun 				     gl->frags[i].offset,
226*4882a593Smuzhiyun 				     gl->frags[i].size);
227*4882a593Smuzhiyun 
228*4882a593Smuzhiyun 	skb_shinfo(skb)->nr_frags += gl->nfrags;
229*4882a593Smuzhiyun 
230*4882a593Smuzhiyun 	/* get a reference to the last page, we don't own it */
231*4882a593Smuzhiyun 	get_page(gl->frags[gl->nfrags - 1].page);
232*4882a593Smuzhiyun }
233*4882a593Smuzhiyun 
234*4882a593Smuzhiyun static void
cxgbit_lro_add_packet_gl(struct sk_buff * skb,u8 op,const struct pkt_gl * gl)235*4882a593Smuzhiyun cxgbit_lro_add_packet_gl(struct sk_buff *skb, u8 op, const struct pkt_gl *gl)
236*4882a593Smuzhiyun {
237*4882a593Smuzhiyun 	struct cxgbit_lro_cb *lro_cb = cxgbit_skb_lro_cb(skb);
238*4882a593Smuzhiyun 	struct cxgbit_lro_pdu_cb *pdu_cb = cxgbit_skb_lro_pdu_cb(skb,
239*4882a593Smuzhiyun 						lro_cb->pdu_idx);
240*4882a593Smuzhiyun 	u32 len, offset;
241*4882a593Smuzhiyun 
242*4882a593Smuzhiyun 	if (op == CPL_ISCSI_HDR) {
243*4882a593Smuzhiyun 		struct cpl_iscsi_hdr *cpl = (struct cpl_iscsi_hdr *)gl->va;
244*4882a593Smuzhiyun 
245*4882a593Smuzhiyun 		offset = sizeof(struct cpl_iscsi_hdr);
246*4882a593Smuzhiyun 		pdu_cb->flags |= PDUCBF_RX_HDR;
247*4882a593Smuzhiyun 		pdu_cb->seq = ntohl(cpl->seq);
248*4882a593Smuzhiyun 		len = ntohs(cpl->len);
249*4882a593Smuzhiyun 		pdu_cb->hdr = gl->va + offset;
250*4882a593Smuzhiyun 		pdu_cb->hlen = len;
251*4882a593Smuzhiyun 		pdu_cb->hfrag_idx = skb_shinfo(skb)->nr_frags;
252*4882a593Smuzhiyun 
253*4882a593Smuzhiyun 		if (unlikely(gl->nfrags > 1))
254*4882a593Smuzhiyun 			cxgbit_skcb_flags(skb) = 0;
255*4882a593Smuzhiyun 
256*4882a593Smuzhiyun 		lro_cb->complete = false;
257*4882a593Smuzhiyun 	} else if (op == CPL_ISCSI_DATA) {
258*4882a593Smuzhiyun 		struct cpl_iscsi_data *cpl = (struct cpl_iscsi_data *)gl->va;
259*4882a593Smuzhiyun 
260*4882a593Smuzhiyun 		offset = sizeof(struct cpl_iscsi_data);
261*4882a593Smuzhiyun 		pdu_cb->flags |= PDUCBF_RX_DATA;
262*4882a593Smuzhiyun 		len = ntohs(cpl->len);
263*4882a593Smuzhiyun 		pdu_cb->dlen = len;
264*4882a593Smuzhiyun 		pdu_cb->doffset = lro_cb->offset;
265*4882a593Smuzhiyun 		pdu_cb->nr_dfrags = gl->nfrags;
266*4882a593Smuzhiyun 		pdu_cb->dfrag_idx = skb_shinfo(skb)->nr_frags;
267*4882a593Smuzhiyun 		lro_cb->complete = false;
268*4882a593Smuzhiyun 	} else {
269*4882a593Smuzhiyun 		struct cpl_rx_iscsi_cmp *cpl;
270*4882a593Smuzhiyun 
271*4882a593Smuzhiyun 		cpl = (struct cpl_rx_iscsi_cmp *)gl->va;
272*4882a593Smuzhiyun 		offset = sizeof(struct cpl_rx_iscsi_cmp);
273*4882a593Smuzhiyun 		pdu_cb->flags |= (PDUCBF_RX_HDR | PDUCBF_RX_STATUS);
274*4882a593Smuzhiyun 		len = be16_to_cpu(cpl->len);
275*4882a593Smuzhiyun 		pdu_cb->hdr = gl->va + offset;
276*4882a593Smuzhiyun 		pdu_cb->hlen = len;
277*4882a593Smuzhiyun 		pdu_cb->hfrag_idx = skb_shinfo(skb)->nr_frags;
278*4882a593Smuzhiyun 		pdu_cb->ddigest = be32_to_cpu(cpl->ulp_crc);
279*4882a593Smuzhiyun 		pdu_cb->pdulen = ntohs(cpl->len);
280*4882a593Smuzhiyun 
281*4882a593Smuzhiyun 		if (unlikely(gl->nfrags > 1))
282*4882a593Smuzhiyun 			cxgbit_skcb_flags(skb) = 0;
283*4882a593Smuzhiyun 
284*4882a593Smuzhiyun 		cxgbit_process_ddpvld(lro_cb->csk, pdu_cb,
285*4882a593Smuzhiyun 				      be32_to_cpu(cpl->ddpvld));
286*4882a593Smuzhiyun 
287*4882a593Smuzhiyun 		if (pdu_cb->flags & PDUCBF_RX_DATA_DDPD) {
288*4882a593Smuzhiyun 			pdu_cb->flags |= PDUCBF_RX_DDP_CMP;
289*4882a593Smuzhiyun 			pdu_cb->complete = true;
290*4882a593Smuzhiyun 		} else if (pdu_cb->flags & PDUCBF_RX_DATA) {
291*4882a593Smuzhiyun 			pdu_cb->complete = true;
292*4882a593Smuzhiyun 		}
293*4882a593Smuzhiyun 
294*4882a593Smuzhiyun 		lro_cb->pdu_totallen += pdu_cb->hlen + pdu_cb->dlen;
295*4882a593Smuzhiyun 		lro_cb->complete = true;
296*4882a593Smuzhiyun 		lro_cb->pdu_idx++;
297*4882a593Smuzhiyun 	}
298*4882a593Smuzhiyun 
299*4882a593Smuzhiyun 	cxgbit_copy_frags(skb, gl, offset);
300*4882a593Smuzhiyun 
301*4882a593Smuzhiyun 	pdu_cb->frags += gl->nfrags;
302*4882a593Smuzhiyun 	lro_cb->offset += len;
303*4882a593Smuzhiyun 	skb->len += len;
304*4882a593Smuzhiyun 	skb->data_len += len;
305*4882a593Smuzhiyun 	skb->truesize += len;
306*4882a593Smuzhiyun }
307*4882a593Smuzhiyun 
308*4882a593Smuzhiyun static struct sk_buff *
cxgbit_lro_init_skb(struct cxgbit_sock * csk,u8 op,const struct pkt_gl * gl,const __be64 * rsp,struct napi_struct * napi)309*4882a593Smuzhiyun cxgbit_lro_init_skb(struct cxgbit_sock *csk, u8 op, const struct pkt_gl *gl,
310*4882a593Smuzhiyun 		    const __be64 *rsp, struct napi_struct *napi)
311*4882a593Smuzhiyun {
312*4882a593Smuzhiyun 	struct sk_buff *skb;
313*4882a593Smuzhiyun 	struct cxgbit_lro_cb *lro_cb;
314*4882a593Smuzhiyun 
315*4882a593Smuzhiyun 	skb = napi_alloc_skb(napi, LRO_SKB_MAX_HEADROOM);
316*4882a593Smuzhiyun 
317*4882a593Smuzhiyun 	if (unlikely(!skb))
318*4882a593Smuzhiyun 		return NULL;
319*4882a593Smuzhiyun 
320*4882a593Smuzhiyun 	memset(skb->data, 0, LRO_SKB_MAX_HEADROOM);
321*4882a593Smuzhiyun 
322*4882a593Smuzhiyun 	cxgbit_skcb_flags(skb) |= SKCBF_RX_LRO;
323*4882a593Smuzhiyun 
324*4882a593Smuzhiyun 	lro_cb = cxgbit_skb_lro_cb(skb);
325*4882a593Smuzhiyun 
326*4882a593Smuzhiyun 	cxgbit_get_csk(csk);
327*4882a593Smuzhiyun 
328*4882a593Smuzhiyun 	lro_cb->csk = csk;
329*4882a593Smuzhiyun 
330*4882a593Smuzhiyun 	return skb;
331*4882a593Smuzhiyun }
332*4882a593Smuzhiyun 
cxgbit_queue_lro_skb(struct cxgbit_sock * csk,struct sk_buff * skb)333*4882a593Smuzhiyun static void cxgbit_queue_lro_skb(struct cxgbit_sock *csk, struct sk_buff *skb)
334*4882a593Smuzhiyun {
335*4882a593Smuzhiyun 	bool wakeup_thread = false;
336*4882a593Smuzhiyun 
337*4882a593Smuzhiyun 	spin_lock(&csk->rxq.lock);
338*4882a593Smuzhiyun 	__skb_queue_tail(&csk->rxq, skb);
339*4882a593Smuzhiyun 	if (skb_queue_len(&csk->rxq) == 1)
340*4882a593Smuzhiyun 		wakeup_thread = true;
341*4882a593Smuzhiyun 	spin_unlock(&csk->rxq.lock);
342*4882a593Smuzhiyun 
343*4882a593Smuzhiyun 	if (wakeup_thread)
344*4882a593Smuzhiyun 		wake_up(&csk->waitq);
345*4882a593Smuzhiyun }
346*4882a593Smuzhiyun 
cxgbit_lro_flush(struct t4_lro_mgr * lro_mgr,struct sk_buff * skb)347*4882a593Smuzhiyun static void cxgbit_lro_flush(struct t4_lro_mgr *lro_mgr, struct sk_buff *skb)
348*4882a593Smuzhiyun {
349*4882a593Smuzhiyun 	struct cxgbit_lro_cb *lro_cb = cxgbit_skb_lro_cb(skb);
350*4882a593Smuzhiyun 	struct cxgbit_sock *csk = lro_cb->csk;
351*4882a593Smuzhiyun 
352*4882a593Smuzhiyun 	csk->lro_skb = NULL;
353*4882a593Smuzhiyun 
354*4882a593Smuzhiyun 	__skb_unlink(skb, &lro_mgr->lroq);
355*4882a593Smuzhiyun 	cxgbit_queue_lro_skb(csk, skb);
356*4882a593Smuzhiyun 
357*4882a593Smuzhiyun 	cxgbit_put_csk(csk);
358*4882a593Smuzhiyun 
359*4882a593Smuzhiyun 	lro_mgr->lro_pkts++;
360*4882a593Smuzhiyun 	lro_mgr->lro_session_cnt--;
361*4882a593Smuzhiyun }
362*4882a593Smuzhiyun 
cxgbit_uld_lro_flush(struct t4_lro_mgr * lro_mgr)363*4882a593Smuzhiyun static void cxgbit_uld_lro_flush(struct t4_lro_mgr *lro_mgr)
364*4882a593Smuzhiyun {
365*4882a593Smuzhiyun 	struct sk_buff *skb;
366*4882a593Smuzhiyun 
367*4882a593Smuzhiyun 	while ((skb = skb_peek(&lro_mgr->lroq)))
368*4882a593Smuzhiyun 		cxgbit_lro_flush(lro_mgr, skb);
369*4882a593Smuzhiyun }
370*4882a593Smuzhiyun 
371*4882a593Smuzhiyun static int
cxgbit_lro_receive(struct cxgbit_sock * csk,u8 op,const __be64 * rsp,const struct pkt_gl * gl,struct t4_lro_mgr * lro_mgr,struct napi_struct * napi)372*4882a593Smuzhiyun cxgbit_lro_receive(struct cxgbit_sock *csk, u8 op, const __be64 *rsp,
373*4882a593Smuzhiyun 		   const struct pkt_gl *gl, struct t4_lro_mgr *lro_mgr,
374*4882a593Smuzhiyun 		   struct napi_struct *napi)
375*4882a593Smuzhiyun {
376*4882a593Smuzhiyun 	struct sk_buff *skb;
377*4882a593Smuzhiyun 	struct cxgbit_lro_cb *lro_cb;
378*4882a593Smuzhiyun 
379*4882a593Smuzhiyun 	if (!csk) {
380*4882a593Smuzhiyun 		pr_err("%s: csk NULL, op 0x%x.\n", __func__, op);
381*4882a593Smuzhiyun 		goto out;
382*4882a593Smuzhiyun 	}
383*4882a593Smuzhiyun 
384*4882a593Smuzhiyun 	if (csk->lro_skb)
385*4882a593Smuzhiyun 		goto add_packet;
386*4882a593Smuzhiyun 
387*4882a593Smuzhiyun start_lro:
388*4882a593Smuzhiyun 	if (lro_mgr->lro_session_cnt >= MAX_LRO_SESSIONS) {
389*4882a593Smuzhiyun 		cxgbit_uld_lro_flush(lro_mgr);
390*4882a593Smuzhiyun 		goto start_lro;
391*4882a593Smuzhiyun 	}
392*4882a593Smuzhiyun 
393*4882a593Smuzhiyun 	skb = cxgbit_lro_init_skb(csk, op, gl, rsp, napi);
394*4882a593Smuzhiyun 	if (unlikely(!skb))
395*4882a593Smuzhiyun 		goto out;
396*4882a593Smuzhiyun 
397*4882a593Smuzhiyun 	csk->lro_skb = skb;
398*4882a593Smuzhiyun 
399*4882a593Smuzhiyun 	__skb_queue_tail(&lro_mgr->lroq, skb);
400*4882a593Smuzhiyun 	lro_mgr->lro_session_cnt++;
401*4882a593Smuzhiyun 
402*4882a593Smuzhiyun add_packet:
403*4882a593Smuzhiyun 	skb = csk->lro_skb;
404*4882a593Smuzhiyun 	lro_cb = cxgbit_skb_lro_cb(skb);
405*4882a593Smuzhiyun 
406*4882a593Smuzhiyun 	if ((gl && (((skb_shinfo(skb)->nr_frags + gl->nfrags) >
407*4882a593Smuzhiyun 	    MAX_SKB_FRAGS) || (lro_cb->pdu_totallen >= LRO_FLUSH_LEN_MAX))) ||
408*4882a593Smuzhiyun 	    (lro_cb->pdu_idx >= MAX_SKB_FRAGS)) {
409*4882a593Smuzhiyun 		cxgbit_lro_flush(lro_mgr, skb);
410*4882a593Smuzhiyun 		goto start_lro;
411*4882a593Smuzhiyun 	}
412*4882a593Smuzhiyun 
413*4882a593Smuzhiyun 	if (gl)
414*4882a593Smuzhiyun 		cxgbit_lro_add_packet_gl(skb, op, gl);
415*4882a593Smuzhiyun 	else
416*4882a593Smuzhiyun 		cxgbit_lro_add_packet_rsp(skb, op, rsp);
417*4882a593Smuzhiyun 
418*4882a593Smuzhiyun 	lro_mgr->lro_merged++;
419*4882a593Smuzhiyun 
420*4882a593Smuzhiyun 	return 0;
421*4882a593Smuzhiyun 
422*4882a593Smuzhiyun out:
423*4882a593Smuzhiyun 	return -1;
424*4882a593Smuzhiyun }
425*4882a593Smuzhiyun 
426*4882a593Smuzhiyun static int
cxgbit_uld_lro_rx_handler(void * hndl,const __be64 * rsp,const struct pkt_gl * gl,struct t4_lro_mgr * lro_mgr,struct napi_struct * napi)427*4882a593Smuzhiyun cxgbit_uld_lro_rx_handler(void *hndl, const __be64 *rsp,
428*4882a593Smuzhiyun 			  const struct pkt_gl *gl, struct t4_lro_mgr *lro_mgr,
429*4882a593Smuzhiyun 			  struct napi_struct *napi)
430*4882a593Smuzhiyun {
431*4882a593Smuzhiyun 	struct cxgbit_device *cdev = hndl;
432*4882a593Smuzhiyun 	struct cxgb4_lld_info *lldi = &cdev->lldi;
433*4882a593Smuzhiyun 	struct cpl_tx_data *rpl = NULL;
434*4882a593Smuzhiyun 	struct cxgbit_sock *csk = NULL;
435*4882a593Smuzhiyun 	unsigned int tid = 0;
436*4882a593Smuzhiyun 	struct sk_buff *skb;
437*4882a593Smuzhiyun 	unsigned int op = *(u8 *)rsp;
438*4882a593Smuzhiyun 	bool lro_flush = true;
439*4882a593Smuzhiyun 
440*4882a593Smuzhiyun 	switch (op) {
441*4882a593Smuzhiyun 	case CPL_ISCSI_HDR:
442*4882a593Smuzhiyun 	case CPL_ISCSI_DATA:
443*4882a593Smuzhiyun 	case CPL_RX_ISCSI_CMP:
444*4882a593Smuzhiyun 	case CPL_RX_ISCSI_DDP:
445*4882a593Smuzhiyun 	case CPL_FW4_ACK:
446*4882a593Smuzhiyun 		lro_flush = false;
447*4882a593Smuzhiyun 		fallthrough;
448*4882a593Smuzhiyun 	case CPL_ABORT_RPL_RSS:
449*4882a593Smuzhiyun 	case CPL_PASS_ESTABLISH:
450*4882a593Smuzhiyun 	case CPL_PEER_CLOSE:
451*4882a593Smuzhiyun 	case CPL_CLOSE_CON_RPL:
452*4882a593Smuzhiyun 	case CPL_ABORT_REQ_RSS:
453*4882a593Smuzhiyun 	case CPL_SET_TCB_RPL:
454*4882a593Smuzhiyun 	case CPL_RX_DATA:
455*4882a593Smuzhiyun 		rpl = gl ? (struct cpl_tx_data *)gl->va :
456*4882a593Smuzhiyun 			   (struct cpl_tx_data *)(rsp + 1);
457*4882a593Smuzhiyun 		tid = GET_TID(rpl);
458*4882a593Smuzhiyun 		csk = lookup_tid(lldi->tids, tid);
459*4882a593Smuzhiyun 		break;
460*4882a593Smuzhiyun 	default:
461*4882a593Smuzhiyun 		break;
462*4882a593Smuzhiyun 	}
463*4882a593Smuzhiyun 
464*4882a593Smuzhiyun 	if (csk && csk->lro_skb && lro_flush)
465*4882a593Smuzhiyun 		cxgbit_lro_flush(lro_mgr, csk->lro_skb);
466*4882a593Smuzhiyun 
467*4882a593Smuzhiyun 	if (!gl) {
468*4882a593Smuzhiyun 		unsigned int len;
469*4882a593Smuzhiyun 
470*4882a593Smuzhiyun 		if (op == CPL_RX_ISCSI_DDP) {
471*4882a593Smuzhiyun 			if (!cxgbit_lro_receive(csk, op, rsp, NULL, lro_mgr,
472*4882a593Smuzhiyun 						napi))
473*4882a593Smuzhiyun 				return 0;
474*4882a593Smuzhiyun 		}
475*4882a593Smuzhiyun 
476*4882a593Smuzhiyun 		len = 64 - sizeof(struct rsp_ctrl) - 8;
477*4882a593Smuzhiyun 		skb = napi_alloc_skb(napi, len);
478*4882a593Smuzhiyun 		if (!skb)
479*4882a593Smuzhiyun 			goto nomem;
480*4882a593Smuzhiyun 		__skb_put(skb, len);
481*4882a593Smuzhiyun 		skb_copy_to_linear_data(skb, &rsp[1], len);
482*4882a593Smuzhiyun 	} else {
483*4882a593Smuzhiyun 		if (unlikely(op != *(u8 *)gl->va)) {
484*4882a593Smuzhiyun 			pr_info("? FL 0x%p,RSS%#llx,FL %#llx,len %u.\n",
485*4882a593Smuzhiyun 				gl->va, be64_to_cpu(*rsp),
486*4882a593Smuzhiyun 				get_unaligned_be64(gl->va),
487*4882a593Smuzhiyun 				gl->tot_len);
488*4882a593Smuzhiyun 			return 0;
489*4882a593Smuzhiyun 		}
490*4882a593Smuzhiyun 
491*4882a593Smuzhiyun 		if ((op == CPL_ISCSI_HDR) || (op == CPL_ISCSI_DATA) ||
492*4882a593Smuzhiyun 		    (op == CPL_RX_ISCSI_CMP)) {
493*4882a593Smuzhiyun 			if (!cxgbit_lro_receive(csk, op, rsp, gl, lro_mgr,
494*4882a593Smuzhiyun 						napi))
495*4882a593Smuzhiyun 				return 0;
496*4882a593Smuzhiyun 		}
497*4882a593Smuzhiyun 
498*4882a593Smuzhiyun #define RX_PULL_LEN 128
499*4882a593Smuzhiyun 		skb = cxgb4_pktgl_to_skb(gl, RX_PULL_LEN, RX_PULL_LEN);
500*4882a593Smuzhiyun 		if (unlikely(!skb))
501*4882a593Smuzhiyun 			goto nomem;
502*4882a593Smuzhiyun 	}
503*4882a593Smuzhiyun 
504*4882a593Smuzhiyun 	rpl = (struct cpl_tx_data *)skb->data;
505*4882a593Smuzhiyun 	op = rpl->ot.opcode;
506*4882a593Smuzhiyun 	cxgbit_skcb_rx_opcode(skb) = op;
507*4882a593Smuzhiyun 
508*4882a593Smuzhiyun 	pr_debug("cdev %p, opcode 0x%x(0x%x,0x%x), skb %p.\n",
509*4882a593Smuzhiyun 		 cdev, op, rpl->ot.opcode_tid,
510*4882a593Smuzhiyun 		 ntohl(rpl->ot.opcode_tid), skb);
511*4882a593Smuzhiyun 
512*4882a593Smuzhiyun 	if (op < NUM_CPL_CMDS && cxgbit_cplhandlers[op]) {
513*4882a593Smuzhiyun 		cxgbit_cplhandlers[op](cdev, skb);
514*4882a593Smuzhiyun 	} else {
515*4882a593Smuzhiyun 		pr_err("No handler for opcode 0x%x.\n", op);
516*4882a593Smuzhiyun 		__kfree_skb(skb);
517*4882a593Smuzhiyun 	}
518*4882a593Smuzhiyun 	return 0;
519*4882a593Smuzhiyun nomem:
520*4882a593Smuzhiyun 	pr_err("%s OOM bailing out.\n", __func__);
521*4882a593Smuzhiyun 	return 1;
522*4882a593Smuzhiyun }
523*4882a593Smuzhiyun 
524*4882a593Smuzhiyun #ifdef CONFIG_CHELSIO_T4_DCB
525*4882a593Smuzhiyun struct cxgbit_dcb_work {
526*4882a593Smuzhiyun 	struct dcb_app_type dcb_app;
527*4882a593Smuzhiyun 	struct work_struct work;
528*4882a593Smuzhiyun };
529*4882a593Smuzhiyun 
530*4882a593Smuzhiyun static void
cxgbit_update_dcb_priority(struct cxgbit_device * cdev,u8 port_id,u8 dcb_priority,u16 port_num)531*4882a593Smuzhiyun cxgbit_update_dcb_priority(struct cxgbit_device *cdev, u8 port_id,
532*4882a593Smuzhiyun 			   u8 dcb_priority, u16 port_num)
533*4882a593Smuzhiyun {
534*4882a593Smuzhiyun 	struct cxgbit_sock *csk;
535*4882a593Smuzhiyun 	struct sk_buff *skb;
536*4882a593Smuzhiyun 	u16 local_port;
537*4882a593Smuzhiyun 	bool wakeup_thread = false;
538*4882a593Smuzhiyun 
539*4882a593Smuzhiyun 	spin_lock_bh(&cdev->cskq.lock);
540*4882a593Smuzhiyun 	list_for_each_entry(csk, &cdev->cskq.list, list) {
541*4882a593Smuzhiyun 		if (csk->port_id != port_id)
542*4882a593Smuzhiyun 			continue;
543*4882a593Smuzhiyun 
544*4882a593Smuzhiyun 		if (csk->com.local_addr.ss_family == AF_INET6) {
545*4882a593Smuzhiyun 			struct sockaddr_in6 *sock_in6;
546*4882a593Smuzhiyun 
547*4882a593Smuzhiyun 			sock_in6 = (struct sockaddr_in6 *)&csk->com.local_addr;
548*4882a593Smuzhiyun 			local_port = ntohs(sock_in6->sin6_port);
549*4882a593Smuzhiyun 		} else {
550*4882a593Smuzhiyun 			struct sockaddr_in *sock_in;
551*4882a593Smuzhiyun 
552*4882a593Smuzhiyun 			sock_in = (struct sockaddr_in *)&csk->com.local_addr;
553*4882a593Smuzhiyun 			local_port = ntohs(sock_in->sin_port);
554*4882a593Smuzhiyun 		}
555*4882a593Smuzhiyun 
556*4882a593Smuzhiyun 		if (local_port != port_num)
557*4882a593Smuzhiyun 			continue;
558*4882a593Smuzhiyun 
559*4882a593Smuzhiyun 		if (csk->dcb_priority == dcb_priority)
560*4882a593Smuzhiyun 			continue;
561*4882a593Smuzhiyun 
562*4882a593Smuzhiyun 		skb = alloc_skb(0, GFP_ATOMIC);
563*4882a593Smuzhiyun 		if (!skb)
564*4882a593Smuzhiyun 			continue;
565*4882a593Smuzhiyun 
566*4882a593Smuzhiyun 		spin_lock(&csk->rxq.lock);
567*4882a593Smuzhiyun 		__skb_queue_tail(&csk->rxq, skb);
568*4882a593Smuzhiyun 		if (skb_queue_len(&csk->rxq) == 1)
569*4882a593Smuzhiyun 			wakeup_thread = true;
570*4882a593Smuzhiyun 		spin_unlock(&csk->rxq.lock);
571*4882a593Smuzhiyun 
572*4882a593Smuzhiyun 		if (wakeup_thread) {
573*4882a593Smuzhiyun 			wake_up(&csk->waitq);
574*4882a593Smuzhiyun 			wakeup_thread = false;
575*4882a593Smuzhiyun 		}
576*4882a593Smuzhiyun 	}
577*4882a593Smuzhiyun 	spin_unlock_bh(&cdev->cskq.lock);
578*4882a593Smuzhiyun }
579*4882a593Smuzhiyun 
cxgbit_dcb_workfn(struct work_struct * work)580*4882a593Smuzhiyun static void cxgbit_dcb_workfn(struct work_struct *work)
581*4882a593Smuzhiyun {
582*4882a593Smuzhiyun 	struct cxgbit_dcb_work *dcb_work;
583*4882a593Smuzhiyun 	struct net_device *ndev;
584*4882a593Smuzhiyun 	struct cxgbit_device *cdev = NULL;
585*4882a593Smuzhiyun 	struct dcb_app_type *iscsi_app;
586*4882a593Smuzhiyun 	u8 priority, port_id = 0xff;
587*4882a593Smuzhiyun 
588*4882a593Smuzhiyun 	dcb_work = container_of(work, struct cxgbit_dcb_work, work);
589*4882a593Smuzhiyun 	iscsi_app = &dcb_work->dcb_app;
590*4882a593Smuzhiyun 
591*4882a593Smuzhiyun 	if (iscsi_app->dcbx & DCB_CAP_DCBX_VER_IEEE) {
592*4882a593Smuzhiyun 		if ((iscsi_app->app.selector != IEEE_8021QAZ_APP_SEL_STREAM) &&
593*4882a593Smuzhiyun 		    (iscsi_app->app.selector != IEEE_8021QAZ_APP_SEL_ANY))
594*4882a593Smuzhiyun 			goto out;
595*4882a593Smuzhiyun 
596*4882a593Smuzhiyun 		priority = iscsi_app->app.priority;
597*4882a593Smuzhiyun 
598*4882a593Smuzhiyun 	} else if (iscsi_app->dcbx & DCB_CAP_DCBX_VER_CEE) {
599*4882a593Smuzhiyun 		if (iscsi_app->app.selector != DCB_APP_IDTYPE_PORTNUM)
600*4882a593Smuzhiyun 			goto out;
601*4882a593Smuzhiyun 
602*4882a593Smuzhiyun 		if (!iscsi_app->app.priority)
603*4882a593Smuzhiyun 			goto out;
604*4882a593Smuzhiyun 
605*4882a593Smuzhiyun 		priority = ffs(iscsi_app->app.priority) - 1;
606*4882a593Smuzhiyun 	} else {
607*4882a593Smuzhiyun 		goto out;
608*4882a593Smuzhiyun 	}
609*4882a593Smuzhiyun 
610*4882a593Smuzhiyun 	pr_debug("priority for ifid %d is %u\n",
611*4882a593Smuzhiyun 		 iscsi_app->ifindex, priority);
612*4882a593Smuzhiyun 
613*4882a593Smuzhiyun 	ndev = dev_get_by_index(&init_net, iscsi_app->ifindex);
614*4882a593Smuzhiyun 
615*4882a593Smuzhiyun 	if (!ndev)
616*4882a593Smuzhiyun 		goto out;
617*4882a593Smuzhiyun 
618*4882a593Smuzhiyun 	mutex_lock(&cdev_list_lock);
619*4882a593Smuzhiyun 	cdev = cxgbit_find_device(ndev, &port_id);
620*4882a593Smuzhiyun 
621*4882a593Smuzhiyun 	dev_put(ndev);
622*4882a593Smuzhiyun 
623*4882a593Smuzhiyun 	if (!cdev) {
624*4882a593Smuzhiyun 		mutex_unlock(&cdev_list_lock);
625*4882a593Smuzhiyun 		goto out;
626*4882a593Smuzhiyun 	}
627*4882a593Smuzhiyun 
628*4882a593Smuzhiyun 	cxgbit_update_dcb_priority(cdev, port_id, priority,
629*4882a593Smuzhiyun 				   iscsi_app->app.protocol);
630*4882a593Smuzhiyun 	mutex_unlock(&cdev_list_lock);
631*4882a593Smuzhiyun out:
632*4882a593Smuzhiyun 	kfree(dcb_work);
633*4882a593Smuzhiyun }
634*4882a593Smuzhiyun 
635*4882a593Smuzhiyun static int
cxgbit_dcbevent_notify(struct notifier_block * nb,unsigned long action,void * data)636*4882a593Smuzhiyun cxgbit_dcbevent_notify(struct notifier_block *nb, unsigned long action,
637*4882a593Smuzhiyun 		       void *data)
638*4882a593Smuzhiyun {
639*4882a593Smuzhiyun 	struct cxgbit_dcb_work *dcb_work;
640*4882a593Smuzhiyun 	struct dcb_app_type *dcb_app = data;
641*4882a593Smuzhiyun 
642*4882a593Smuzhiyun 	dcb_work = kzalloc(sizeof(*dcb_work), GFP_ATOMIC);
643*4882a593Smuzhiyun 	if (!dcb_work)
644*4882a593Smuzhiyun 		return NOTIFY_DONE;
645*4882a593Smuzhiyun 
646*4882a593Smuzhiyun 	dcb_work->dcb_app = *dcb_app;
647*4882a593Smuzhiyun 	INIT_WORK(&dcb_work->work, cxgbit_dcb_workfn);
648*4882a593Smuzhiyun 	schedule_work(&dcb_work->work);
649*4882a593Smuzhiyun 	return NOTIFY_OK;
650*4882a593Smuzhiyun }
651*4882a593Smuzhiyun #endif
652*4882a593Smuzhiyun 
cxgbit_get_sup_prot_ops(struct iscsi_conn * conn)653*4882a593Smuzhiyun static enum target_prot_op cxgbit_get_sup_prot_ops(struct iscsi_conn *conn)
654*4882a593Smuzhiyun {
655*4882a593Smuzhiyun 	return TARGET_PROT_NORMAL;
656*4882a593Smuzhiyun }
657*4882a593Smuzhiyun 
658*4882a593Smuzhiyun static struct iscsit_transport cxgbit_transport = {
659*4882a593Smuzhiyun 	.name			= DRV_NAME,
660*4882a593Smuzhiyun 	.transport_type		= ISCSI_CXGBIT,
661*4882a593Smuzhiyun 	.rdma_shutdown		= false,
662*4882a593Smuzhiyun 	.priv_size		= sizeof(struct cxgbit_cmd),
663*4882a593Smuzhiyun 	.owner			= THIS_MODULE,
664*4882a593Smuzhiyun 	.iscsit_setup_np	= cxgbit_setup_np,
665*4882a593Smuzhiyun 	.iscsit_accept_np	= cxgbit_accept_np,
666*4882a593Smuzhiyun 	.iscsit_free_np		= cxgbit_free_np,
667*4882a593Smuzhiyun 	.iscsit_free_conn	= cxgbit_free_conn,
668*4882a593Smuzhiyun 	.iscsit_get_login_rx	= cxgbit_get_login_rx,
669*4882a593Smuzhiyun 	.iscsit_put_login_tx	= cxgbit_put_login_tx,
670*4882a593Smuzhiyun 	.iscsit_immediate_queue	= iscsit_immediate_queue,
671*4882a593Smuzhiyun 	.iscsit_response_queue	= iscsit_response_queue,
672*4882a593Smuzhiyun 	.iscsit_get_dataout	= iscsit_build_r2ts_for_cmd,
673*4882a593Smuzhiyun 	.iscsit_queue_data_in	= iscsit_queue_rsp,
674*4882a593Smuzhiyun 	.iscsit_queue_status	= iscsit_queue_rsp,
675*4882a593Smuzhiyun 	.iscsit_xmit_pdu	= cxgbit_xmit_pdu,
676*4882a593Smuzhiyun 	.iscsit_get_r2t_ttt	= cxgbit_get_r2t_ttt,
677*4882a593Smuzhiyun 	.iscsit_get_rx_pdu	= cxgbit_get_rx_pdu,
678*4882a593Smuzhiyun 	.iscsit_validate_params	= cxgbit_validate_params,
679*4882a593Smuzhiyun 	.iscsit_unmap_cmd	= cxgbit_unmap_cmd,
680*4882a593Smuzhiyun 	.iscsit_aborted_task	= iscsit_aborted_task,
681*4882a593Smuzhiyun 	.iscsit_get_sup_prot_ops = cxgbit_get_sup_prot_ops,
682*4882a593Smuzhiyun };
683*4882a593Smuzhiyun 
684*4882a593Smuzhiyun static struct cxgb4_uld_info cxgbit_uld_info = {
685*4882a593Smuzhiyun 	.name		= DRV_NAME,
686*4882a593Smuzhiyun 	.nrxq		= MAX_ULD_QSETS,
687*4882a593Smuzhiyun 	.ntxq		= MAX_ULD_QSETS,
688*4882a593Smuzhiyun 	.rxq_size	= 1024,
689*4882a593Smuzhiyun 	.lro		= true,
690*4882a593Smuzhiyun 	.add		= cxgbit_uld_add,
691*4882a593Smuzhiyun 	.state_change	= cxgbit_uld_state_change,
692*4882a593Smuzhiyun 	.lro_rx_handler = cxgbit_uld_lro_rx_handler,
693*4882a593Smuzhiyun 	.lro_flush	= cxgbit_uld_lro_flush,
694*4882a593Smuzhiyun };
695*4882a593Smuzhiyun 
696*4882a593Smuzhiyun #ifdef CONFIG_CHELSIO_T4_DCB
697*4882a593Smuzhiyun static struct notifier_block cxgbit_dcbevent_nb = {
698*4882a593Smuzhiyun 	.notifier_call = cxgbit_dcbevent_notify,
699*4882a593Smuzhiyun };
700*4882a593Smuzhiyun #endif
701*4882a593Smuzhiyun 
cxgbit_init(void)702*4882a593Smuzhiyun static int __init cxgbit_init(void)
703*4882a593Smuzhiyun {
704*4882a593Smuzhiyun 	cxgb4_register_uld(CXGB4_ULD_ISCSIT, &cxgbit_uld_info);
705*4882a593Smuzhiyun 	iscsit_register_transport(&cxgbit_transport);
706*4882a593Smuzhiyun 
707*4882a593Smuzhiyun #ifdef CONFIG_CHELSIO_T4_DCB
708*4882a593Smuzhiyun 	pr_info("%s dcb enabled.\n", DRV_NAME);
709*4882a593Smuzhiyun 	register_dcbevent_notifier(&cxgbit_dcbevent_nb);
710*4882a593Smuzhiyun #endif
711*4882a593Smuzhiyun 	BUILD_BUG_ON(sizeof_field(struct sk_buff, cb) <
712*4882a593Smuzhiyun 		     sizeof(union cxgbit_skb_cb));
713*4882a593Smuzhiyun 	return 0;
714*4882a593Smuzhiyun }
715*4882a593Smuzhiyun 
cxgbit_exit(void)716*4882a593Smuzhiyun static void __exit cxgbit_exit(void)
717*4882a593Smuzhiyun {
718*4882a593Smuzhiyun 	struct cxgbit_device *cdev, *tmp;
719*4882a593Smuzhiyun 
720*4882a593Smuzhiyun #ifdef CONFIG_CHELSIO_T4_DCB
721*4882a593Smuzhiyun 	unregister_dcbevent_notifier(&cxgbit_dcbevent_nb);
722*4882a593Smuzhiyun #endif
723*4882a593Smuzhiyun 	mutex_lock(&cdev_list_lock);
724*4882a593Smuzhiyun 	list_for_each_entry_safe(cdev, tmp, &cdev_list_head, list) {
725*4882a593Smuzhiyun 		list_del(&cdev->list);
726*4882a593Smuzhiyun 		cxgbit_put_cdev(cdev);
727*4882a593Smuzhiyun 	}
728*4882a593Smuzhiyun 	mutex_unlock(&cdev_list_lock);
729*4882a593Smuzhiyun 	iscsit_unregister_transport(&cxgbit_transport);
730*4882a593Smuzhiyun 	cxgb4_unregister_uld(CXGB4_ULD_ISCSIT);
731*4882a593Smuzhiyun }
732*4882a593Smuzhiyun 
733*4882a593Smuzhiyun module_init(cxgbit_init);
734*4882a593Smuzhiyun module_exit(cxgbit_exit);
735*4882a593Smuzhiyun 
736*4882a593Smuzhiyun MODULE_DESCRIPTION("Chelsio iSCSI target offload driver");
737*4882a593Smuzhiyun MODULE_AUTHOR("Chelsio Communications");
738*4882a593Smuzhiyun MODULE_VERSION(DRV_VERSION);
739*4882a593Smuzhiyun MODULE_LICENSE("GPL");
740