1*4882a593Smuzhiyun /* 2*4882a593Smuzhiyun * Copyright (c) 2016 Chelsio Communications, Inc. 3*4882a593Smuzhiyun * 4*4882a593Smuzhiyun * This program is free software; you can redistribute it and/or modify 5*4882a593Smuzhiyun * it under the terms of the GNU General Public License as published by 6*4882a593Smuzhiyun * the Free Software Foundation. 7*4882a593Smuzhiyun * 8*4882a593Smuzhiyun */ 9*4882a593Smuzhiyun 10*4882a593Smuzhiyun #ifndef __CXGBIT_LRO_H__ 11*4882a593Smuzhiyun #define __CXGBIT_LRO_H__ 12*4882a593Smuzhiyun 13*4882a593Smuzhiyun #include <linux/kernel.h> 14*4882a593Smuzhiyun #include <linux/module.h> 15*4882a593Smuzhiyun #include <linux/errno.h> 16*4882a593Smuzhiyun #include <linux/types.h> 17*4882a593Smuzhiyun #include <linux/skbuff.h> 18*4882a593Smuzhiyun 19*4882a593Smuzhiyun #define LRO_FLUSH_LEN_MAX 65535 20*4882a593Smuzhiyun 21*4882a593Smuzhiyun struct cxgbit_lro_cb { 22*4882a593Smuzhiyun struct cxgbit_sock *csk; 23*4882a593Smuzhiyun u32 pdu_totallen; 24*4882a593Smuzhiyun u32 offset; 25*4882a593Smuzhiyun u8 pdu_idx; 26*4882a593Smuzhiyun bool complete; 27*4882a593Smuzhiyun }; 28*4882a593Smuzhiyun 29*4882a593Smuzhiyun enum cxgbit_pducb_flags { 30*4882a593Smuzhiyun PDUCBF_RX_HDR = (1 << 0), /* received pdu header */ 31*4882a593Smuzhiyun PDUCBF_RX_DATA = (1 << 1), /* received pdu payload */ 32*4882a593Smuzhiyun PDUCBF_RX_STATUS = (1 << 2), /* received ddp status */ 33*4882a593Smuzhiyun PDUCBF_RX_DATA_DDPD = (1 << 3), /* pdu payload ddp'd */ 34*4882a593Smuzhiyun PDUCBF_RX_DDP_CMP = (1 << 4), /* ddp completion */ 35*4882a593Smuzhiyun PDUCBF_RX_HCRC_ERR = (1 << 5), /* header digest error */ 36*4882a593Smuzhiyun PDUCBF_RX_DCRC_ERR = (1 << 6), /* data digest error */ 37*4882a593Smuzhiyun }; 38*4882a593Smuzhiyun 39*4882a593Smuzhiyun struct cxgbit_lro_pdu_cb { 40*4882a593Smuzhiyun u8 flags; 41*4882a593Smuzhiyun u8 frags; 42*4882a593Smuzhiyun u8 hfrag_idx; 43*4882a593Smuzhiyun u8 nr_dfrags; 44*4882a593Smuzhiyun u8 dfrag_idx; 45*4882a593Smuzhiyun bool complete; 46*4882a593Smuzhiyun u32 seq; 47*4882a593Smuzhiyun u32 pdulen; 48*4882a593Smuzhiyun u32 hlen; 49*4882a593Smuzhiyun u32 dlen; 50*4882a593Smuzhiyun u32 doffset; 51*4882a593Smuzhiyun u32 ddigest; 52*4882a593Smuzhiyun void *hdr; 53*4882a593Smuzhiyun }; 54*4882a593Smuzhiyun 55*4882a593Smuzhiyun #define LRO_SKB_MAX_HEADROOM \ 56*4882a593Smuzhiyun (sizeof(struct cxgbit_lro_cb) + \ 57*4882a593Smuzhiyun (MAX_SKB_FRAGS * sizeof(struct cxgbit_lro_pdu_cb))) 58*4882a593Smuzhiyun 59*4882a593Smuzhiyun #define LRO_SKB_MIN_HEADROOM \ 60*4882a593Smuzhiyun (sizeof(struct cxgbit_lro_cb) + \ 61*4882a593Smuzhiyun sizeof(struct cxgbit_lro_pdu_cb)) 62*4882a593Smuzhiyun 63*4882a593Smuzhiyun #define cxgbit_skb_lro_cb(skb) ((struct cxgbit_lro_cb *)skb->data) 64*4882a593Smuzhiyun #define cxgbit_skb_lro_pdu_cb(skb, i) \ 65*4882a593Smuzhiyun ((struct cxgbit_lro_pdu_cb *)(skb->data + sizeof(struct cxgbit_lro_cb) \ 66*4882a593Smuzhiyun + (i * sizeof(struct cxgbit_lro_pdu_cb)))) 67*4882a593Smuzhiyun 68*4882a593Smuzhiyun #define CPL_RX_ISCSI_DDP_STATUS_DDP_SHIFT 16 /* ddp'able */ 69*4882a593Smuzhiyun #define CPL_RX_ISCSI_DDP_STATUS_PAD_SHIFT 19 /* pad error */ 70*4882a593Smuzhiyun #define CPL_RX_ISCSI_DDP_STATUS_HCRC_SHIFT 20 /* hcrc error */ 71*4882a593Smuzhiyun #define CPL_RX_ISCSI_DDP_STATUS_DCRC_SHIFT 21 /* dcrc error */ 72*4882a593Smuzhiyun 73*4882a593Smuzhiyun #endif /*__CXGBIT_LRO_H_*/ 74