xref: /OK3568_Linux_fs/kernel/drivers/ssb/scan.c (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun /*
2*4882a593Smuzhiyun  * Sonics Silicon Backplane
3*4882a593Smuzhiyun  * Bus scanning
4*4882a593Smuzhiyun  *
5*4882a593Smuzhiyun  * Copyright (C) 2005-2007 Michael Buesch <m@bues.ch>
6*4882a593Smuzhiyun  * Copyright (C) 2005 Martin Langer <martin-langer@gmx.de>
7*4882a593Smuzhiyun  * Copyright (C) 2005 Stefano Brivio <st3@riseup.net>
8*4882a593Smuzhiyun  * Copyright (C) 2005 Danny van Dyk <kugelfang@gentoo.org>
9*4882a593Smuzhiyun  * Copyright (C) 2005 Andreas Jaggi <andreas.jaggi@waterwave.ch>
10*4882a593Smuzhiyun  * Copyright (C) 2006 Broadcom Corporation.
11*4882a593Smuzhiyun  *
12*4882a593Smuzhiyun  * Licensed under the GNU/GPL. See COPYING for details.
13*4882a593Smuzhiyun  */
14*4882a593Smuzhiyun 
15*4882a593Smuzhiyun #include "ssb_private.h"
16*4882a593Smuzhiyun 
17*4882a593Smuzhiyun #include <linux/ssb/ssb.h>
18*4882a593Smuzhiyun #include <linux/ssb/ssb_regs.h>
19*4882a593Smuzhiyun #include <linux/pci.h>
20*4882a593Smuzhiyun #include <linux/io.h>
21*4882a593Smuzhiyun 
22*4882a593Smuzhiyun #include <pcmcia/cistpl.h>
23*4882a593Smuzhiyun #include <pcmcia/ds.h>
24*4882a593Smuzhiyun 
25*4882a593Smuzhiyun 
ssb_core_name(u16 coreid)26*4882a593Smuzhiyun const char *ssb_core_name(u16 coreid)
27*4882a593Smuzhiyun {
28*4882a593Smuzhiyun 	switch (coreid) {
29*4882a593Smuzhiyun 	case SSB_DEV_CHIPCOMMON:
30*4882a593Smuzhiyun 		return "ChipCommon";
31*4882a593Smuzhiyun 	case SSB_DEV_ILINE20:
32*4882a593Smuzhiyun 		return "ILine 20";
33*4882a593Smuzhiyun 	case SSB_DEV_SDRAM:
34*4882a593Smuzhiyun 		return "SDRAM";
35*4882a593Smuzhiyun 	case SSB_DEV_PCI:
36*4882a593Smuzhiyun 		return "PCI";
37*4882a593Smuzhiyun 	case SSB_DEV_MIPS:
38*4882a593Smuzhiyun 		return "MIPS";
39*4882a593Smuzhiyun 	case SSB_DEV_ETHERNET:
40*4882a593Smuzhiyun 		return "Fast Ethernet";
41*4882a593Smuzhiyun 	case SSB_DEV_V90:
42*4882a593Smuzhiyun 		return "V90";
43*4882a593Smuzhiyun 	case SSB_DEV_USB11_HOSTDEV:
44*4882a593Smuzhiyun 		return "USB 1.1 Hostdev";
45*4882a593Smuzhiyun 	case SSB_DEV_ADSL:
46*4882a593Smuzhiyun 		return "ADSL";
47*4882a593Smuzhiyun 	case SSB_DEV_ILINE100:
48*4882a593Smuzhiyun 		return "ILine 100";
49*4882a593Smuzhiyun 	case SSB_DEV_IPSEC:
50*4882a593Smuzhiyun 		return "IPSEC";
51*4882a593Smuzhiyun 	case SSB_DEV_PCMCIA:
52*4882a593Smuzhiyun 		return "PCMCIA";
53*4882a593Smuzhiyun 	case SSB_DEV_INTERNAL_MEM:
54*4882a593Smuzhiyun 		return "Internal Memory";
55*4882a593Smuzhiyun 	case SSB_DEV_MEMC_SDRAM:
56*4882a593Smuzhiyun 		return "MEMC SDRAM";
57*4882a593Smuzhiyun 	case SSB_DEV_EXTIF:
58*4882a593Smuzhiyun 		return "EXTIF";
59*4882a593Smuzhiyun 	case SSB_DEV_80211:
60*4882a593Smuzhiyun 		return "IEEE 802.11";
61*4882a593Smuzhiyun 	case SSB_DEV_MIPS_3302:
62*4882a593Smuzhiyun 		return "MIPS 3302";
63*4882a593Smuzhiyun 	case SSB_DEV_USB11_HOST:
64*4882a593Smuzhiyun 		return "USB 1.1 Host";
65*4882a593Smuzhiyun 	case SSB_DEV_USB11_DEV:
66*4882a593Smuzhiyun 		return "USB 1.1 Device";
67*4882a593Smuzhiyun 	case SSB_DEV_USB20_HOST:
68*4882a593Smuzhiyun 		return "USB 2.0 Host";
69*4882a593Smuzhiyun 	case SSB_DEV_USB20_DEV:
70*4882a593Smuzhiyun 		return "USB 2.0 Device";
71*4882a593Smuzhiyun 	case SSB_DEV_SDIO_HOST:
72*4882a593Smuzhiyun 		return "SDIO Host";
73*4882a593Smuzhiyun 	case SSB_DEV_ROBOSWITCH:
74*4882a593Smuzhiyun 		return "Roboswitch";
75*4882a593Smuzhiyun 	case SSB_DEV_PARA_ATA:
76*4882a593Smuzhiyun 		return "PATA";
77*4882a593Smuzhiyun 	case SSB_DEV_SATA_XORDMA:
78*4882a593Smuzhiyun 		return "SATA XOR-DMA";
79*4882a593Smuzhiyun 	case SSB_DEV_ETHERNET_GBIT:
80*4882a593Smuzhiyun 		return "GBit Ethernet";
81*4882a593Smuzhiyun 	case SSB_DEV_PCIE:
82*4882a593Smuzhiyun 		return "PCI-E";
83*4882a593Smuzhiyun 	case SSB_DEV_MIMO_PHY:
84*4882a593Smuzhiyun 		return "MIMO PHY";
85*4882a593Smuzhiyun 	case SSB_DEV_SRAM_CTRLR:
86*4882a593Smuzhiyun 		return "SRAM Controller";
87*4882a593Smuzhiyun 	case SSB_DEV_MINI_MACPHY:
88*4882a593Smuzhiyun 		return "Mini MACPHY";
89*4882a593Smuzhiyun 	case SSB_DEV_ARM_1176:
90*4882a593Smuzhiyun 		return "ARM 1176";
91*4882a593Smuzhiyun 	case SSB_DEV_ARM_7TDMI:
92*4882a593Smuzhiyun 		return "ARM 7TDMI";
93*4882a593Smuzhiyun 	case SSB_DEV_ARM_CM3:
94*4882a593Smuzhiyun 		return "ARM Cortex M3";
95*4882a593Smuzhiyun 	}
96*4882a593Smuzhiyun 	return "UNKNOWN";
97*4882a593Smuzhiyun }
98*4882a593Smuzhiyun 
pcidev_to_chipid(struct pci_dev * pci_dev)99*4882a593Smuzhiyun static u16 pcidev_to_chipid(struct pci_dev *pci_dev)
100*4882a593Smuzhiyun {
101*4882a593Smuzhiyun 	u16 chipid_fallback = 0;
102*4882a593Smuzhiyun 
103*4882a593Smuzhiyun 	switch (pci_dev->device) {
104*4882a593Smuzhiyun 	case 0x4301:
105*4882a593Smuzhiyun 		chipid_fallback = 0x4301;
106*4882a593Smuzhiyun 		break;
107*4882a593Smuzhiyun 	case 0x4305 ... 0x4307:
108*4882a593Smuzhiyun 		chipid_fallback = 0x4307;
109*4882a593Smuzhiyun 		break;
110*4882a593Smuzhiyun 	case 0x4403:
111*4882a593Smuzhiyun 		chipid_fallback = 0x4402;
112*4882a593Smuzhiyun 		break;
113*4882a593Smuzhiyun 	case 0x4610 ... 0x4615:
114*4882a593Smuzhiyun 		chipid_fallback = 0x4610;
115*4882a593Smuzhiyun 		break;
116*4882a593Smuzhiyun 	case 0x4710 ... 0x4715:
117*4882a593Smuzhiyun 		chipid_fallback = 0x4710;
118*4882a593Smuzhiyun 		break;
119*4882a593Smuzhiyun 	case 0x4320 ... 0x4325:
120*4882a593Smuzhiyun 		chipid_fallback = 0x4309;
121*4882a593Smuzhiyun 		break;
122*4882a593Smuzhiyun 	case PCI_DEVICE_ID_BCM4401:
123*4882a593Smuzhiyun 	case PCI_DEVICE_ID_BCM4401B0:
124*4882a593Smuzhiyun 	case PCI_DEVICE_ID_BCM4401B1:
125*4882a593Smuzhiyun 		chipid_fallback = 0x4401;
126*4882a593Smuzhiyun 		break;
127*4882a593Smuzhiyun 	default:
128*4882a593Smuzhiyun 		dev_err(&pci_dev->dev, "PCI-ID not in fallback list\n");
129*4882a593Smuzhiyun 	}
130*4882a593Smuzhiyun 
131*4882a593Smuzhiyun 	return chipid_fallback;
132*4882a593Smuzhiyun }
133*4882a593Smuzhiyun 
chipid_to_nrcores(u16 chipid)134*4882a593Smuzhiyun static u8 chipid_to_nrcores(u16 chipid)
135*4882a593Smuzhiyun {
136*4882a593Smuzhiyun 	switch (chipid) {
137*4882a593Smuzhiyun 	case 0x5365:
138*4882a593Smuzhiyun 		return 7;
139*4882a593Smuzhiyun 	case 0x4306:
140*4882a593Smuzhiyun 		return 6;
141*4882a593Smuzhiyun 	case 0x4310:
142*4882a593Smuzhiyun 		return 8;
143*4882a593Smuzhiyun 	case 0x4307:
144*4882a593Smuzhiyun 	case 0x4301:
145*4882a593Smuzhiyun 		return 5;
146*4882a593Smuzhiyun 	case 0x4401:
147*4882a593Smuzhiyun 	case 0x4402:
148*4882a593Smuzhiyun 		return 3;
149*4882a593Smuzhiyun 	case 0x4710:
150*4882a593Smuzhiyun 	case 0x4610:
151*4882a593Smuzhiyun 	case 0x4704:
152*4882a593Smuzhiyun 		return 9;
153*4882a593Smuzhiyun 	default:
154*4882a593Smuzhiyun 		pr_err("CHIPID not in nrcores fallback list\n");
155*4882a593Smuzhiyun 	}
156*4882a593Smuzhiyun 
157*4882a593Smuzhiyun 	return 1;
158*4882a593Smuzhiyun }
159*4882a593Smuzhiyun 
scan_read32(struct ssb_bus * bus,u8 current_coreidx,u16 offset)160*4882a593Smuzhiyun static u32 scan_read32(struct ssb_bus *bus, u8 current_coreidx,
161*4882a593Smuzhiyun 		       u16 offset)
162*4882a593Smuzhiyun {
163*4882a593Smuzhiyun 	u32 lo, hi;
164*4882a593Smuzhiyun 
165*4882a593Smuzhiyun 	switch (bus->bustype) {
166*4882a593Smuzhiyun 	case SSB_BUSTYPE_SSB:
167*4882a593Smuzhiyun 		offset += current_coreidx * SSB_CORE_SIZE;
168*4882a593Smuzhiyun 		break;
169*4882a593Smuzhiyun 	case SSB_BUSTYPE_PCI:
170*4882a593Smuzhiyun 		break;
171*4882a593Smuzhiyun 	case SSB_BUSTYPE_PCMCIA:
172*4882a593Smuzhiyun 		if (offset >= 0x800) {
173*4882a593Smuzhiyun 			ssb_pcmcia_switch_segment(bus, 1);
174*4882a593Smuzhiyun 			offset -= 0x800;
175*4882a593Smuzhiyun 		} else
176*4882a593Smuzhiyun 			ssb_pcmcia_switch_segment(bus, 0);
177*4882a593Smuzhiyun 		lo = readw(bus->mmio + offset);
178*4882a593Smuzhiyun 		hi = readw(bus->mmio + offset + 2);
179*4882a593Smuzhiyun 		return lo | (hi << 16);
180*4882a593Smuzhiyun 	case SSB_BUSTYPE_SDIO:
181*4882a593Smuzhiyun 		offset += current_coreidx * SSB_CORE_SIZE;
182*4882a593Smuzhiyun 		return ssb_sdio_scan_read32(bus, offset);
183*4882a593Smuzhiyun 	}
184*4882a593Smuzhiyun 	return readl(bus->mmio + offset);
185*4882a593Smuzhiyun }
186*4882a593Smuzhiyun 
scan_switchcore(struct ssb_bus * bus,u8 coreidx)187*4882a593Smuzhiyun static int scan_switchcore(struct ssb_bus *bus, u8 coreidx)
188*4882a593Smuzhiyun {
189*4882a593Smuzhiyun 	switch (bus->bustype) {
190*4882a593Smuzhiyun 	case SSB_BUSTYPE_SSB:
191*4882a593Smuzhiyun 		break;
192*4882a593Smuzhiyun 	case SSB_BUSTYPE_PCI:
193*4882a593Smuzhiyun 		return ssb_pci_switch_coreidx(bus, coreidx);
194*4882a593Smuzhiyun 	case SSB_BUSTYPE_PCMCIA:
195*4882a593Smuzhiyun 		return ssb_pcmcia_switch_coreidx(bus, coreidx);
196*4882a593Smuzhiyun 	case SSB_BUSTYPE_SDIO:
197*4882a593Smuzhiyun 		return ssb_sdio_scan_switch_coreidx(bus, coreidx);
198*4882a593Smuzhiyun 	}
199*4882a593Smuzhiyun 	return 0;
200*4882a593Smuzhiyun }
201*4882a593Smuzhiyun 
ssb_iounmap(struct ssb_bus * bus)202*4882a593Smuzhiyun void ssb_iounmap(struct ssb_bus *bus)
203*4882a593Smuzhiyun {
204*4882a593Smuzhiyun 	switch (bus->bustype) {
205*4882a593Smuzhiyun 	case SSB_BUSTYPE_SSB:
206*4882a593Smuzhiyun 	case SSB_BUSTYPE_PCMCIA:
207*4882a593Smuzhiyun 		iounmap(bus->mmio);
208*4882a593Smuzhiyun 		break;
209*4882a593Smuzhiyun 	case SSB_BUSTYPE_PCI:
210*4882a593Smuzhiyun #ifdef CONFIG_SSB_PCIHOST
211*4882a593Smuzhiyun 		pci_iounmap(bus->host_pci, bus->mmio);
212*4882a593Smuzhiyun #else
213*4882a593Smuzhiyun 		WARN_ON(1); /* Can't reach this code. */
214*4882a593Smuzhiyun #endif
215*4882a593Smuzhiyun 		break;
216*4882a593Smuzhiyun 	case SSB_BUSTYPE_SDIO:
217*4882a593Smuzhiyun 		break;
218*4882a593Smuzhiyun 	}
219*4882a593Smuzhiyun 	bus->mmio = NULL;
220*4882a593Smuzhiyun 	bus->mapped_device = NULL;
221*4882a593Smuzhiyun }
222*4882a593Smuzhiyun 
ssb_ioremap(struct ssb_bus * bus,unsigned long baseaddr)223*4882a593Smuzhiyun static void __iomem *ssb_ioremap(struct ssb_bus *bus,
224*4882a593Smuzhiyun 				 unsigned long baseaddr)
225*4882a593Smuzhiyun {
226*4882a593Smuzhiyun 	void __iomem *mmio = NULL;
227*4882a593Smuzhiyun 
228*4882a593Smuzhiyun 	switch (bus->bustype) {
229*4882a593Smuzhiyun 	case SSB_BUSTYPE_SSB:
230*4882a593Smuzhiyun 		/* Only map the first core for now. */
231*4882a593Smuzhiyun 		fallthrough;
232*4882a593Smuzhiyun 	case SSB_BUSTYPE_PCMCIA:
233*4882a593Smuzhiyun 		mmio = ioremap(baseaddr, SSB_CORE_SIZE);
234*4882a593Smuzhiyun 		break;
235*4882a593Smuzhiyun 	case SSB_BUSTYPE_PCI:
236*4882a593Smuzhiyun #ifdef CONFIG_SSB_PCIHOST
237*4882a593Smuzhiyun 		mmio = pci_iomap(bus->host_pci, 0, ~0UL);
238*4882a593Smuzhiyun #else
239*4882a593Smuzhiyun 		WARN_ON(1); /* Can't reach this code. */
240*4882a593Smuzhiyun #endif
241*4882a593Smuzhiyun 		break;
242*4882a593Smuzhiyun 	case SSB_BUSTYPE_SDIO:
243*4882a593Smuzhiyun 		/* Nothing to ioremap in the SDIO case, just fake it */
244*4882a593Smuzhiyun 		mmio = (void __iomem *)baseaddr;
245*4882a593Smuzhiyun 		break;
246*4882a593Smuzhiyun 	}
247*4882a593Smuzhiyun 
248*4882a593Smuzhiyun 	return mmio;
249*4882a593Smuzhiyun }
250*4882a593Smuzhiyun 
we_support_multiple_80211_cores(struct ssb_bus * bus)251*4882a593Smuzhiyun static int we_support_multiple_80211_cores(struct ssb_bus *bus)
252*4882a593Smuzhiyun {
253*4882a593Smuzhiyun 	/* More than one 802.11 core is only supported by special chips.
254*4882a593Smuzhiyun 	 * There are chips with two 802.11 cores, but with dangling
255*4882a593Smuzhiyun 	 * pins on the second core. Be careful and reject them here.
256*4882a593Smuzhiyun 	 */
257*4882a593Smuzhiyun 
258*4882a593Smuzhiyun #ifdef CONFIG_SSB_PCIHOST
259*4882a593Smuzhiyun 	if (bus->bustype == SSB_BUSTYPE_PCI) {
260*4882a593Smuzhiyun 		if (bus->host_pci->vendor == PCI_VENDOR_ID_BROADCOM &&
261*4882a593Smuzhiyun 		    ((bus->host_pci->device == 0x4313) ||
262*4882a593Smuzhiyun 		     (bus->host_pci->device == 0x431A) ||
263*4882a593Smuzhiyun 		     (bus->host_pci->device == 0x4321) ||
264*4882a593Smuzhiyun 		     (bus->host_pci->device == 0x4324)))
265*4882a593Smuzhiyun 			return 1;
266*4882a593Smuzhiyun 	}
267*4882a593Smuzhiyun #endif /* CONFIG_SSB_PCIHOST */
268*4882a593Smuzhiyun 	return 0;
269*4882a593Smuzhiyun }
270*4882a593Smuzhiyun 
ssb_bus_scan(struct ssb_bus * bus,unsigned long baseaddr)271*4882a593Smuzhiyun int ssb_bus_scan(struct ssb_bus *bus,
272*4882a593Smuzhiyun 		 unsigned long baseaddr)
273*4882a593Smuzhiyun {
274*4882a593Smuzhiyun 	int err = -ENOMEM;
275*4882a593Smuzhiyun 	void __iomem *mmio;
276*4882a593Smuzhiyun 	u32 idhi, cc, rev, tmp;
277*4882a593Smuzhiyun 	int dev_i, i;
278*4882a593Smuzhiyun 	struct ssb_device *dev;
279*4882a593Smuzhiyun 	int nr_80211_cores = 0;
280*4882a593Smuzhiyun 
281*4882a593Smuzhiyun 	mmio = ssb_ioremap(bus, baseaddr);
282*4882a593Smuzhiyun 	if (!mmio)
283*4882a593Smuzhiyun 		goto out;
284*4882a593Smuzhiyun 	bus->mmio = mmio;
285*4882a593Smuzhiyun 
286*4882a593Smuzhiyun 	err = scan_switchcore(bus, 0); /* Switch to first core */
287*4882a593Smuzhiyun 	if (err)
288*4882a593Smuzhiyun 		goto err_unmap;
289*4882a593Smuzhiyun 
290*4882a593Smuzhiyun 	idhi = scan_read32(bus, 0, SSB_IDHIGH);
291*4882a593Smuzhiyun 	cc = (idhi & SSB_IDHIGH_CC) >> SSB_IDHIGH_CC_SHIFT;
292*4882a593Smuzhiyun 	rev = (idhi & SSB_IDHIGH_RCLO);
293*4882a593Smuzhiyun 	rev |= (idhi & SSB_IDHIGH_RCHI) >> SSB_IDHIGH_RCHI_SHIFT;
294*4882a593Smuzhiyun 
295*4882a593Smuzhiyun 	bus->nr_devices = 0;
296*4882a593Smuzhiyun 	if (cc == SSB_DEV_CHIPCOMMON) {
297*4882a593Smuzhiyun 		tmp = scan_read32(bus, 0, SSB_CHIPCO_CHIPID);
298*4882a593Smuzhiyun 
299*4882a593Smuzhiyun 		bus->chip_id = (tmp & SSB_CHIPCO_IDMASK);
300*4882a593Smuzhiyun 		bus->chip_rev = (tmp & SSB_CHIPCO_REVMASK) >>
301*4882a593Smuzhiyun 				SSB_CHIPCO_REVSHIFT;
302*4882a593Smuzhiyun 		bus->chip_package = (tmp & SSB_CHIPCO_PACKMASK) >>
303*4882a593Smuzhiyun 				    SSB_CHIPCO_PACKSHIFT;
304*4882a593Smuzhiyun 		if (rev >= 4) {
305*4882a593Smuzhiyun 			bus->nr_devices = (tmp & SSB_CHIPCO_NRCORESMASK) >>
306*4882a593Smuzhiyun 					  SSB_CHIPCO_NRCORESSHIFT;
307*4882a593Smuzhiyun 		}
308*4882a593Smuzhiyun 		tmp = scan_read32(bus, 0, SSB_CHIPCO_CAP);
309*4882a593Smuzhiyun 		bus->chipco.capabilities = tmp;
310*4882a593Smuzhiyun 	} else {
311*4882a593Smuzhiyun 		if (bus->bustype == SSB_BUSTYPE_PCI) {
312*4882a593Smuzhiyun 			bus->chip_id = pcidev_to_chipid(bus->host_pci);
313*4882a593Smuzhiyun 			bus->chip_rev = bus->host_pci->revision;
314*4882a593Smuzhiyun 			bus->chip_package = 0;
315*4882a593Smuzhiyun 		} else {
316*4882a593Smuzhiyun 			bus->chip_id = 0x4710;
317*4882a593Smuzhiyun 			bus->chip_rev = 0;
318*4882a593Smuzhiyun 			bus->chip_package = 0;
319*4882a593Smuzhiyun 		}
320*4882a593Smuzhiyun 	}
321*4882a593Smuzhiyun 	pr_info("Found chip with id 0x%04X, rev 0x%02X and package 0x%02X\n",
322*4882a593Smuzhiyun 		bus->chip_id, bus->chip_rev, bus->chip_package);
323*4882a593Smuzhiyun 	if (!bus->nr_devices)
324*4882a593Smuzhiyun 		bus->nr_devices = chipid_to_nrcores(bus->chip_id);
325*4882a593Smuzhiyun 	if (bus->nr_devices > ARRAY_SIZE(bus->devices)) {
326*4882a593Smuzhiyun 		pr_err("More than %d ssb cores found (%d)\n",
327*4882a593Smuzhiyun 		       SSB_MAX_NR_CORES, bus->nr_devices);
328*4882a593Smuzhiyun 		err = -EINVAL;
329*4882a593Smuzhiyun 		goto err_unmap;
330*4882a593Smuzhiyun 	}
331*4882a593Smuzhiyun 	if (bus->bustype == SSB_BUSTYPE_SSB) {
332*4882a593Smuzhiyun 		/* Now that we know the number of cores,
333*4882a593Smuzhiyun 		 * remap the whole IO space for all cores.
334*4882a593Smuzhiyun 		 */
335*4882a593Smuzhiyun 		err = -ENOMEM;
336*4882a593Smuzhiyun 		iounmap(mmio);
337*4882a593Smuzhiyun 		mmio = ioremap(baseaddr, SSB_CORE_SIZE * bus->nr_devices);
338*4882a593Smuzhiyun 		if (!mmio)
339*4882a593Smuzhiyun 			goto out;
340*4882a593Smuzhiyun 		bus->mmio = mmio;
341*4882a593Smuzhiyun 	}
342*4882a593Smuzhiyun 
343*4882a593Smuzhiyun 	/* Fetch basic information about each core/device */
344*4882a593Smuzhiyun 	for (i = 0, dev_i = 0; i < bus->nr_devices; i++) {
345*4882a593Smuzhiyun 		err = scan_switchcore(bus, i);
346*4882a593Smuzhiyun 		if (err)
347*4882a593Smuzhiyun 			goto err_unmap;
348*4882a593Smuzhiyun 		dev = &(bus->devices[dev_i]);
349*4882a593Smuzhiyun 
350*4882a593Smuzhiyun 		idhi = scan_read32(bus, i, SSB_IDHIGH);
351*4882a593Smuzhiyun 		dev->id.coreid = (idhi & SSB_IDHIGH_CC) >> SSB_IDHIGH_CC_SHIFT;
352*4882a593Smuzhiyun 		dev->id.revision = (idhi & SSB_IDHIGH_RCLO);
353*4882a593Smuzhiyun 		dev->id.revision |= (idhi & SSB_IDHIGH_RCHI) >> SSB_IDHIGH_RCHI_SHIFT;
354*4882a593Smuzhiyun 		dev->id.vendor = (idhi & SSB_IDHIGH_VC) >> SSB_IDHIGH_VC_SHIFT;
355*4882a593Smuzhiyun 		dev->core_index = i;
356*4882a593Smuzhiyun 		dev->bus = bus;
357*4882a593Smuzhiyun 		dev->ops = bus->ops;
358*4882a593Smuzhiyun 
359*4882a593Smuzhiyun 		pr_debug("Core %d found: %s (cc 0x%03X, rev 0x%02X, vendor 0x%04X)\n",
360*4882a593Smuzhiyun 			 i, ssb_core_name(dev->id.coreid),
361*4882a593Smuzhiyun 			 dev->id.coreid, dev->id.revision, dev->id.vendor);
362*4882a593Smuzhiyun 
363*4882a593Smuzhiyun 		switch (dev->id.coreid) {
364*4882a593Smuzhiyun 		case SSB_DEV_80211:
365*4882a593Smuzhiyun 			nr_80211_cores++;
366*4882a593Smuzhiyun 			if (nr_80211_cores > 1) {
367*4882a593Smuzhiyun 				if (!we_support_multiple_80211_cores(bus)) {
368*4882a593Smuzhiyun 					pr_debug("Ignoring additional 802.11 core\n");
369*4882a593Smuzhiyun 					continue;
370*4882a593Smuzhiyun 				}
371*4882a593Smuzhiyun 			}
372*4882a593Smuzhiyun 			break;
373*4882a593Smuzhiyun 		case SSB_DEV_EXTIF:
374*4882a593Smuzhiyun #ifdef CONFIG_SSB_DRIVER_EXTIF
375*4882a593Smuzhiyun 			if (bus->extif.dev) {
376*4882a593Smuzhiyun 				pr_warn("WARNING: Multiple EXTIFs found\n");
377*4882a593Smuzhiyun 				break;
378*4882a593Smuzhiyun 			}
379*4882a593Smuzhiyun 			bus->extif.dev = dev;
380*4882a593Smuzhiyun #endif /* CONFIG_SSB_DRIVER_EXTIF */
381*4882a593Smuzhiyun 			break;
382*4882a593Smuzhiyun 		case SSB_DEV_CHIPCOMMON:
383*4882a593Smuzhiyun 			if (bus->chipco.dev) {
384*4882a593Smuzhiyun 				pr_warn("WARNING: Multiple ChipCommon found\n");
385*4882a593Smuzhiyun 				break;
386*4882a593Smuzhiyun 			}
387*4882a593Smuzhiyun 			bus->chipco.dev = dev;
388*4882a593Smuzhiyun 			break;
389*4882a593Smuzhiyun 		case SSB_DEV_MIPS:
390*4882a593Smuzhiyun 		case SSB_DEV_MIPS_3302:
391*4882a593Smuzhiyun #ifdef CONFIG_SSB_DRIVER_MIPS
392*4882a593Smuzhiyun 			if (bus->mipscore.dev) {
393*4882a593Smuzhiyun 				pr_warn("WARNING: Multiple MIPS cores found\n");
394*4882a593Smuzhiyun 				break;
395*4882a593Smuzhiyun 			}
396*4882a593Smuzhiyun 			bus->mipscore.dev = dev;
397*4882a593Smuzhiyun #endif /* CONFIG_SSB_DRIVER_MIPS */
398*4882a593Smuzhiyun 			break;
399*4882a593Smuzhiyun 		case SSB_DEV_PCI:
400*4882a593Smuzhiyun 		case SSB_DEV_PCIE:
401*4882a593Smuzhiyun #ifdef CONFIG_SSB_DRIVER_PCICORE
402*4882a593Smuzhiyun 			if (bus->bustype == SSB_BUSTYPE_PCI) {
403*4882a593Smuzhiyun 				/* Ignore PCI cores on PCI-E cards.
404*4882a593Smuzhiyun 				 * Ignore PCI-E cores on PCI cards.
405*4882a593Smuzhiyun 				 */
406*4882a593Smuzhiyun 				if (dev->id.coreid == SSB_DEV_PCI) {
407*4882a593Smuzhiyun 					if (pci_is_pcie(bus->host_pci))
408*4882a593Smuzhiyun 						continue;
409*4882a593Smuzhiyun 				} else {
410*4882a593Smuzhiyun 					if (!pci_is_pcie(bus->host_pci))
411*4882a593Smuzhiyun 						continue;
412*4882a593Smuzhiyun 				}
413*4882a593Smuzhiyun 			}
414*4882a593Smuzhiyun 			if (bus->pcicore.dev) {
415*4882a593Smuzhiyun 				pr_warn("WARNING: Multiple PCI(E) cores found\n");
416*4882a593Smuzhiyun 				break;
417*4882a593Smuzhiyun 			}
418*4882a593Smuzhiyun 			bus->pcicore.dev = dev;
419*4882a593Smuzhiyun #endif /* CONFIG_SSB_DRIVER_PCICORE */
420*4882a593Smuzhiyun 			break;
421*4882a593Smuzhiyun 		case SSB_DEV_ETHERNET:
422*4882a593Smuzhiyun 			if (bus->bustype == SSB_BUSTYPE_PCI) {
423*4882a593Smuzhiyun 				if (bus->host_pci->vendor == PCI_VENDOR_ID_BROADCOM &&
424*4882a593Smuzhiyun 				    (bus->host_pci->device & 0xFF00) == 0x4300) {
425*4882a593Smuzhiyun 					/* This is a dangling ethernet core on a
426*4882a593Smuzhiyun 					 * wireless device. Ignore it.
427*4882a593Smuzhiyun 					 */
428*4882a593Smuzhiyun 					continue;
429*4882a593Smuzhiyun 				}
430*4882a593Smuzhiyun 			}
431*4882a593Smuzhiyun 			break;
432*4882a593Smuzhiyun 		default:
433*4882a593Smuzhiyun 			break;
434*4882a593Smuzhiyun 		}
435*4882a593Smuzhiyun 
436*4882a593Smuzhiyun 		dev_i++;
437*4882a593Smuzhiyun 	}
438*4882a593Smuzhiyun 	bus->nr_devices = dev_i;
439*4882a593Smuzhiyun 
440*4882a593Smuzhiyun 	err = 0;
441*4882a593Smuzhiyun out:
442*4882a593Smuzhiyun 	return err;
443*4882a593Smuzhiyun err_unmap:
444*4882a593Smuzhiyun 	ssb_iounmap(bus);
445*4882a593Smuzhiyun 	goto out;
446*4882a593Smuzhiyun }
447