1*4882a593Smuzhiyun /*
2*4882a593Smuzhiyun * Sonics Silicon Backplane
3*4882a593Smuzhiyun * ChipCommon serial flash interface
4*4882a593Smuzhiyun *
5*4882a593Smuzhiyun * Licensed under the GNU/GPL. See COPYING for details.
6*4882a593Smuzhiyun */
7*4882a593Smuzhiyun
8*4882a593Smuzhiyun #include "ssb_private.h"
9*4882a593Smuzhiyun
10*4882a593Smuzhiyun #include <linux/ssb/ssb.h>
11*4882a593Smuzhiyun
12*4882a593Smuzhiyun static struct resource ssb_sflash_resource = {
13*4882a593Smuzhiyun .name = "ssb_sflash",
14*4882a593Smuzhiyun .start = SSB_FLASH2,
15*4882a593Smuzhiyun .end = 0,
16*4882a593Smuzhiyun .flags = IORESOURCE_MEM | IORESOURCE_READONLY,
17*4882a593Smuzhiyun };
18*4882a593Smuzhiyun
19*4882a593Smuzhiyun struct platform_device ssb_sflash_dev = {
20*4882a593Smuzhiyun .name = "ssb_sflash",
21*4882a593Smuzhiyun .resource = &ssb_sflash_resource,
22*4882a593Smuzhiyun .num_resources = 1,
23*4882a593Smuzhiyun };
24*4882a593Smuzhiyun
25*4882a593Smuzhiyun struct ssb_sflash_tbl_e {
26*4882a593Smuzhiyun char *name;
27*4882a593Smuzhiyun u32 id;
28*4882a593Smuzhiyun u32 blocksize;
29*4882a593Smuzhiyun u16 numblocks;
30*4882a593Smuzhiyun };
31*4882a593Smuzhiyun
32*4882a593Smuzhiyun static const struct ssb_sflash_tbl_e ssb_sflash_st_tbl[] = {
33*4882a593Smuzhiyun { "M25P20", 0x11, 0x10000, 4, },
34*4882a593Smuzhiyun { "M25P40", 0x12, 0x10000, 8, },
35*4882a593Smuzhiyun
36*4882a593Smuzhiyun { "M25P16", 0x14, 0x10000, 32, },
37*4882a593Smuzhiyun { "M25P32", 0x15, 0x10000, 64, },
38*4882a593Smuzhiyun { "M25P64", 0x16, 0x10000, 128, },
39*4882a593Smuzhiyun { "M25FL128", 0x17, 0x10000, 256, },
40*4882a593Smuzhiyun { NULL },
41*4882a593Smuzhiyun };
42*4882a593Smuzhiyun
43*4882a593Smuzhiyun static const struct ssb_sflash_tbl_e ssb_sflash_sst_tbl[] = {
44*4882a593Smuzhiyun { "SST25WF512", 1, 0x1000, 16, },
45*4882a593Smuzhiyun { "SST25VF512", 0x48, 0x1000, 16, },
46*4882a593Smuzhiyun { "SST25WF010", 2, 0x1000, 32, },
47*4882a593Smuzhiyun { "SST25VF010", 0x49, 0x1000, 32, },
48*4882a593Smuzhiyun { "SST25WF020", 3, 0x1000, 64, },
49*4882a593Smuzhiyun { "SST25VF020", 0x43, 0x1000, 64, },
50*4882a593Smuzhiyun { "SST25WF040", 4, 0x1000, 128, },
51*4882a593Smuzhiyun { "SST25VF040", 0x44, 0x1000, 128, },
52*4882a593Smuzhiyun { "SST25VF040B", 0x8d, 0x1000, 128, },
53*4882a593Smuzhiyun { "SST25WF080", 5, 0x1000, 256, },
54*4882a593Smuzhiyun { "SST25VF080B", 0x8e, 0x1000, 256, },
55*4882a593Smuzhiyun { "SST25VF016", 0x41, 0x1000, 512, },
56*4882a593Smuzhiyun { "SST25VF032", 0x4a, 0x1000, 1024, },
57*4882a593Smuzhiyun { "SST25VF064", 0x4b, 0x1000, 2048, },
58*4882a593Smuzhiyun { NULL },
59*4882a593Smuzhiyun };
60*4882a593Smuzhiyun
61*4882a593Smuzhiyun static const struct ssb_sflash_tbl_e ssb_sflash_at_tbl[] = {
62*4882a593Smuzhiyun { "AT45DB011", 0xc, 256, 512, },
63*4882a593Smuzhiyun { "AT45DB021", 0x14, 256, 1024, },
64*4882a593Smuzhiyun { "AT45DB041", 0x1c, 256, 2048, },
65*4882a593Smuzhiyun { "AT45DB081", 0x24, 256, 4096, },
66*4882a593Smuzhiyun { "AT45DB161", 0x2c, 512, 4096, },
67*4882a593Smuzhiyun { "AT45DB321", 0x34, 512, 8192, },
68*4882a593Smuzhiyun { "AT45DB642", 0x3c, 1024, 8192, },
69*4882a593Smuzhiyun { NULL },
70*4882a593Smuzhiyun };
71*4882a593Smuzhiyun
ssb_sflash_cmd(struct ssb_chipcommon * cc,u32 opcode)72*4882a593Smuzhiyun static void ssb_sflash_cmd(struct ssb_chipcommon *cc, u32 opcode)
73*4882a593Smuzhiyun {
74*4882a593Smuzhiyun int i;
75*4882a593Smuzhiyun chipco_write32(cc, SSB_CHIPCO_FLASHCTL,
76*4882a593Smuzhiyun SSB_CHIPCO_FLASHCTL_START | opcode);
77*4882a593Smuzhiyun for (i = 0; i < 1000; i++) {
78*4882a593Smuzhiyun if (!(chipco_read32(cc, SSB_CHIPCO_FLASHCTL) &
79*4882a593Smuzhiyun SSB_CHIPCO_FLASHCTL_BUSY))
80*4882a593Smuzhiyun return;
81*4882a593Smuzhiyun cpu_relax();
82*4882a593Smuzhiyun }
83*4882a593Smuzhiyun dev_err(cc->dev->dev, "SFLASH control command failed (timeout)!\n");
84*4882a593Smuzhiyun }
85*4882a593Smuzhiyun
86*4882a593Smuzhiyun /* Initialize serial flash access */
ssb_sflash_init(struct ssb_chipcommon * cc)87*4882a593Smuzhiyun int ssb_sflash_init(struct ssb_chipcommon *cc)
88*4882a593Smuzhiyun {
89*4882a593Smuzhiyun struct ssb_sflash *sflash = &cc->dev->bus->mipscore.sflash;
90*4882a593Smuzhiyun const struct ssb_sflash_tbl_e *e;
91*4882a593Smuzhiyun u32 id, id2;
92*4882a593Smuzhiyun
93*4882a593Smuzhiyun switch (cc->capabilities & SSB_CHIPCO_CAP_FLASHT) {
94*4882a593Smuzhiyun case SSB_CHIPCO_FLASHT_STSER:
95*4882a593Smuzhiyun ssb_sflash_cmd(cc, SSB_CHIPCO_FLASHCTL_ST_DP);
96*4882a593Smuzhiyun
97*4882a593Smuzhiyun chipco_write32(cc, SSB_CHIPCO_FLASHADDR, 0);
98*4882a593Smuzhiyun ssb_sflash_cmd(cc, SSB_CHIPCO_FLASHCTL_ST_RES);
99*4882a593Smuzhiyun id = chipco_read32(cc, SSB_CHIPCO_FLASHDATA);
100*4882a593Smuzhiyun
101*4882a593Smuzhiyun chipco_write32(cc, SSB_CHIPCO_FLASHADDR, 1);
102*4882a593Smuzhiyun ssb_sflash_cmd(cc, SSB_CHIPCO_FLASHCTL_ST_RES);
103*4882a593Smuzhiyun id2 = chipco_read32(cc, SSB_CHIPCO_FLASHDATA);
104*4882a593Smuzhiyun
105*4882a593Smuzhiyun switch (id) {
106*4882a593Smuzhiyun case 0xbf:
107*4882a593Smuzhiyun for (e = ssb_sflash_sst_tbl; e->name; e++) {
108*4882a593Smuzhiyun if (e->id == id2)
109*4882a593Smuzhiyun break;
110*4882a593Smuzhiyun }
111*4882a593Smuzhiyun break;
112*4882a593Smuzhiyun case 0x13:
113*4882a593Smuzhiyun return -ENOTSUPP;
114*4882a593Smuzhiyun default:
115*4882a593Smuzhiyun for (e = ssb_sflash_st_tbl; e->name; e++) {
116*4882a593Smuzhiyun if (e->id == id)
117*4882a593Smuzhiyun break;
118*4882a593Smuzhiyun }
119*4882a593Smuzhiyun break;
120*4882a593Smuzhiyun }
121*4882a593Smuzhiyun if (!e->name) {
122*4882a593Smuzhiyun pr_err("Unsupported ST serial flash (id: 0x%X, id2: 0x%X)\n",
123*4882a593Smuzhiyun id, id2);
124*4882a593Smuzhiyun return -ENOTSUPP;
125*4882a593Smuzhiyun }
126*4882a593Smuzhiyun
127*4882a593Smuzhiyun break;
128*4882a593Smuzhiyun case SSB_CHIPCO_FLASHT_ATSER:
129*4882a593Smuzhiyun ssb_sflash_cmd(cc, SSB_CHIPCO_FLASHCTL_AT_STATUS);
130*4882a593Smuzhiyun id = chipco_read32(cc, SSB_CHIPCO_FLASHDATA) & 0x3c;
131*4882a593Smuzhiyun
132*4882a593Smuzhiyun for (e = ssb_sflash_at_tbl; e->name; e++) {
133*4882a593Smuzhiyun if (e->id == id)
134*4882a593Smuzhiyun break;
135*4882a593Smuzhiyun }
136*4882a593Smuzhiyun if (!e->name) {
137*4882a593Smuzhiyun pr_err("Unsupported Atmel serial flash (id: 0x%X)\n",
138*4882a593Smuzhiyun id);
139*4882a593Smuzhiyun return -ENOTSUPP;
140*4882a593Smuzhiyun }
141*4882a593Smuzhiyun
142*4882a593Smuzhiyun break;
143*4882a593Smuzhiyun default:
144*4882a593Smuzhiyun pr_err("Unsupported flash type\n");
145*4882a593Smuzhiyun return -ENOTSUPP;
146*4882a593Smuzhiyun }
147*4882a593Smuzhiyun
148*4882a593Smuzhiyun sflash->window = SSB_FLASH2;
149*4882a593Smuzhiyun sflash->blocksize = e->blocksize;
150*4882a593Smuzhiyun sflash->numblocks = e->numblocks;
151*4882a593Smuzhiyun sflash->size = sflash->blocksize * sflash->numblocks;
152*4882a593Smuzhiyun sflash->present = true;
153*4882a593Smuzhiyun
154*4882a593Smuzhiyun pr_info("Found %s serial flash (size: %dKiB, blocksize: 0x%X, blocks: %d)\n",
155*4882a593Smuzhiyun e->name, sflash->size / 1024, e->blocksize, e->numblocks);
156*4882a593Smuzhiyun
157*4882a593Smuzhiyun /* Prepare platform device, but don't register it yet. It's too early,
158*4882a593Smuzhiyun * malloc (required by device_private_init) is not available yet. */
159*4882a593Smuzhiyun ssb_sflash_dev.resource[0].end = ssb_sflash_dev.resource[0].start +
160*4882a593Smuzhiyun sflash->size;
161*4882a593Smuzhiyun ssb_sflash_dev.dev.platform_data = sflash;
162*4882a593Smuzhiyun
163*4882a593Smuzhiyun return 0;
164*4882a593Smuzhiyun }
165