1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0-or-later
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun * Analog Devices AD-FMCOMMS1-EBZ board I2C-SPI bridge driver
4*4882a593Smuzhiyun *
5*4882a593Smuzhiyun * Copyright 2012 Analog Devices Inc.
6*4882a593Smuzhiyun * Author: Lars-Peter Clausen <lars@metafoo.de>
7*4882a593Smuzhiyun */
8*4882a593Smuzhiyun
9*4882a593Smuzhiyun #include <linux/kernel.h>
10*4882a593Smuzhiyun #include <linux/module.h>
11*4882a593Smuzhiyun #include <linux/delay.h>
12*4882a593Smuzhiyun #include <linux/i2c.h>
13*4882a593Smuzhiyun #include <linux/spi/spi.h>
14*4882a593Smuzhiyun #include <asm/unaligned.h>
15*4882a593Smuzhiyun
16*4882a593Smuzhiyun #define SPI_XCOMM_SETTINGS_LEN_OFFSET 10
17*4882a593Smuzhiyun #define SPI_XCOMM_SETTINGS_3WIRE BIT(6)
18*4882a593Smuzhiyun #define SPI_XCOMM_SETTINGS_CS_HIGH BIT(5)
19*4882a593Smuzhiyun #define SPI_XCOMM_SETTINGS_SAMPLE_END BIT(4)
20*4882a593Smuzhiyun #define SPI_XCOMM_SETTINGS_CPHA BIT(3)
21*4882a593Smuzhiyun #define SPI_XCOMM_SETTINGS_CPOL BIT(2)
22*4882a593Smuzhiyun #define SPI_XCOMM_SETTINGS_CLOCK_DIV_MASK 0x3
23*4882a593Smuzhiyun #define SPI_XCOMM_SETTINGS_CLOCK_DIV_64 0x2
24*4882a593Smuzhiyun #define SPI_XCOMM_SETTINGS_CLOCK_DIV_16 0x1
25*4882a593Smuzhiyun #define SPI_XCOMM_SETTINGS_CLOCK_DIV_4 0x0
26*4882a593Smuzhiyun
27*4882a593Smuzhiyun #define SPI_XCOMM_CMD_UPDATE_CONFIG 0x03
28*4882a593Smuzhiyun #define SPI_XCOMM_CMD_WRITE 0x04
29*4882a593Smuzhiyun
30*4882a593Smuzhiyun #define SPI_XCOMM_CLOCK 48000000
31*4882a593Smuzhiyun
32*4882a593Smuzhiyun struct spi_xcomm {
33*4882a593Smuzhiyun struct i2c_client *i2c;
34*4882a593Smuzhiyun
35*4882a593Smuzhiyun uint16_t settings;
36*4882a593Smuzhiyun uint16_t chipselect;
37*4882a593Smuzhiyun
38*4882a593Smuzhiyun unsigned int current_speed;
39*4882a593Smuzhiyun
40*4882a593Smuzhiyun uint8_t buf[63];
41*4882a593Smuzhiyun };
42*4882a593Smuzhiyun
spi_xcomm_sync_config(struct spi_xcomm * spi_xcomm,unsigned int len)43*4882a593Smuzhiyun static int spi_xcomm_sync_config(struct spi_xcomm *spi_xcomm, unsigned int len)
44*4882a593Smuzhiyun {
45*4882a593Smuzhiyun uint16_t settings;
46*4882a593Smuzhiyun uint8_t *buf = spi_xcomm->buf;
47*4882a593Smuzhiyun
48*4882a593Smuzhiyun settings = spi_xcomm->settings;
49*4882a593Smuzhiyun settings |= len << SPI_XCOMM_SETTINGS_LEN_OFFSET;
50*4882a593Smuzhiyun
51*4882a593Smuzhiyun buf[0] = SPI_XCOMM_CMD_UPDATE_CONFIG;
52*4882a593Smuzhiyun put_unaligned_be16(settings, &buf[1]);
53*4882a593Smuzhiyun put_unaligned_be16(spi_xcomm->chipselect, &buf[3]);
54*4882a593Smuzhiyun
55*4882a593Smuzhiyun return i2c_master_send(spi_xcomm->i2c, buf, 5);
56*4882a593Smuzhiyun }
57*4882a593Smuzhiyun
spi_xcomm_chipselect(struct spi_xcomm * spi_xcomm,struct spi_device * spi,int is_active)58*4882a593Smuzhiyun static void spi_xcomm_chipselect(struct spi_xcomm *spi_xcomm,
59*4882a593Smuzhiyun struct spi_device *spi, int is_active)
60*4882a593Smuzhiyun {
61*4882a593Smuzhiyun unsigned long cs = spi->chip_select;
62*4882a593Smuzhiyun uint16_t chipselect = spi_xcomm->chipselect;
63*4882a593Smuzhiyun
64*4882a593Smuzhiyun if (is_active)
65*4882a593Smuzhiyun chipselect |= BIT(cs);
66*4882a593Smuzhiyun else
67*4882a593Smuzhiyun chipselect &= ~BIT(cs);
68*4882a593Smuzhiyun
69*4882a593Smuzhiyun spi_xcomm->chipselect = chipselect;
70*4882a593Smuzhiyun }
71*4882a593Smuzhiyun
spi_xcomm_setup_transfer(struct spi_xcomm * spi_xcomm,struct spi_device * spi,struct spi_transfer * t,unsigned int * settings)72*4882a593Smuzhiyun static int spi_xcomm_setup_transfer(struct spi_xcomm *spi_xcomm,
73*4882a593Smuzhiyun struct spi_device *spi, struct spi_transfer *t, unsigned int *settings)
74*4882a593Smuzhiyun {
75*4882a593Smuzhiyun if (t->len > 62)
76*4882a593Smuzhiyun return -EINVAL;
77*4882a593Smuzhiyun
78*4882a593Smuzhiyun if (t->speed_hz != spi_xcomm->current_speed) {
79*4882a593Smuzhiyun unsigned int divider;
80*4882a593Smuzhiyun
81*4882a593Smuzhiyun divider = DIV_ROUND_UP(SPI_XCOMM_CLOCK, t->speed_hz);
82*4882a593Smuzhiyun if (divider >= 64)
83*4882a593Smuzhiyun *settings |= SPI_XCOMM_SETTINGS_CLOCK_DIV_64;
84*4882a593Smuzhiyun else if (divider >= 16)
85*4882a593Smuzhiyun *settings |= SPI_XCOMM_SETTINGS_CLOCK_DIV_16;
86*4882a593Smuzhiyun else
87*4882a593Smuzhiyun *settings |= SPI_XCOMM_SETTINGS_CLOCK_DIV_4;
88*4882a593Smuzhiyun
89*4882a593Smuzhiyun spi_xcomm->current_speed = t->speed_hz;
90*4882a593Smuzhiyun }
91*4882a593Smuzhiyun
92*4882a593Smuzhiyun if (spi->mode & SPI_CPOL)
93*4882a593Smuzhiyun *settings |= SPI_XCOMM_SETTINGS_CPOL;
94*4882a593Smuzhiyun else
95*4882a593Smuzhiyun *settings &= ~SPI_XCOMM_SETTINGS_CPOL;
96*4882a593Smuzhiyun
97*4882a593Smuzhiyun if (spi->mode & SPI_CPHA)
98*4882a593Smuzhiyun *settings &= ~SPI_XCOMM_SETTINGS_CPHA;
99*4882a593Smuzhiyun else
100*4882a593Smuzhiyun *settings |= SPI_XCOMM_SETTINGS_CPHA;
101*4882a593Smuzhiyun
102*4882a593Smuzhiyun if (spi->mode & SPI_3WIRE)
103*4882a593Smuzhiyun *settings |= SPI_XCOMM_SETTINGS_3WIRE;
104*4882a593Smuzhiyun else
105*4882a593Smuzhiyun *settings &= ~SPI_XCOMM_SETTINGS_3WIRE;
106*4882a593Smuzhiyun
107*4882a593Smuzhiyun return 0;
108*4882a593Smuzhiyun }
109*4882a593Smuzhiyun
spi_xcomm_txrx_bufs(struct spi_xcomm * spi_xcomm,struct spi_device * spi,struct spi_transfer * t)110*4882a593Smuzhiyun static int spi_xcomm_txrx_bufs(struct spi_xcomm *spi_xcomm,
111*4882a593Smuzhiyun struct spi_device *spi, struct spi_transfer *t)
112*4882a593Smuzhiyun {
113*4882a593Smuzhiyun int ret;
114*4882a593Smuzhiyun
115*4882a593Smuzhiyun if (t->tx_buf) {
116*4882a593Smuzhiyun spi_xcomm->buf[0] = SPI_XCOMM_CMD_WRITE;
117*4882a593Smuzhiyun memcpy(spi_xcomm->buf + 1, t->tx_buf, t->len);
118*4882a593Smuzhiyun
119*4882a593Smuzhiyun ret = i2c_master_send(spi_xcomm->i2c, spi_xcomm->buf, t->len + 1);
120*4882a593Smuzhiyun if (ret < 0)
121*4882a593Smuzhiyun return ret;
122*4882a593Smuzhiyun else if (ret != t->len + 1)
123*4882a593Smuzhiyun return -EIO;
124*4882a593Smuzhiyun } else if (t->rx_buf) {
125*4882a593Smuzhiyun ret = i2c_master_recv(spi_xcomm->i2c, t->rx_buf, t->len);
126*4882a593Smuzhiyun if (ret < 0)
127*4882a593Smuzhiyun return ret;
128*4882a593Smuzhiyun else if (ret != t->len)
129*4882a593Smuzhiyun return -EIO;
130*4882a593Smuzhiyun }
131*4882a593Smuzhiyun
132*4882a593Smuzhiyun return t->len;
133*4882a593Smuzhiyun }
134*4882a593Smuzhiyun
spi_xcomm_transfer_one(struct spi_master * master,struct spi_message * msg)135*4882a593Smuzhiyun static int spi_xcomm_transfer_one(struct spi_master *master,
136*4882a593Smuzhiyun struct spi_message *msg)
137*4882a593Smuzhiyun {
138*4882a593Smuzhiyun struct spi_xcomm *spi_xcomm = spi_master_get_devdata(master);
139*4882a593Smuzhiyun unsigned int settings = spi_xcomm->settings;
140*4882a593Smuzhiyun struct spi_device *spi = msg->spi;
141*4882a593Smuzhiyun unsigned cs_change = 0;
142*4882a593Smuzhiyun struct spi_transfer *t;
143*4882a593Smuzhiyun bool is_first = true;
144*4882a593Smuzhiyun int status = 0;
145*4882a593Smuzhiyun bool is_last;
146*4882a593Smuzhiyun
147*4882a593Smuzhiyun spi_xcomm_chipselect(spi_xcomm, spi, true);
148*4882a593Smuzhiyun
149*4882a593Smuzhiyun list_for_each_entry(t, &msg->transfers, transfer_list) {
150*4882a593Smuzhiyun
151*4882a593Smuzhiyun if (!t->tx_buf && !t->rx_buf && t->len) {
152*4882a593Smuzhiyun status = -EINVAL;
153*4882a593Smuzhiyun break;
154*4882a593Smuzhiyun }
155*4882a593Smuzhiyun
156*4882a593Smuzhiyun status = spi_xcomm_setup_transfer(spi_xcomm, spi, t, &settings);
157*4882a593Smuzhiyun if (status < 0)
158*4882a593Smuzhiyun break;
159*4882a593Smuzhiyun
160*4882a593Smuzhiyun is_last = list_is_last(&t->transfer_list, &msg->transfers);
161*4882a593Smuzhiyun cs_change = t->cs_change;
162*4882a593Smuzhiyun
163*4882a593Smuzhiyun if (cs_change ^ is_last)
164*4882a593Smuzhiyun settings |= BIT(5);
165*4882a593Smuzhiyun else
166*4882a593Smuzhiyun settings &= ~BIT(5);
167*4882a593Smuzhiyun
168*4882a593Smuzhiyun if (t->rx_buf) {
169*4882a593Smuzhiyun spi_xcomm->settings = settings;
170*4882a593Smuzhiyun status = spi_xcomm_sync_config(spi_xcomm, t->len);
171*4882a593Smuzhiyun if (status < 0)
172*4882a593Smuzhiyun break;
173*4882a593Smuzhiyun } else if (settings != spi_xcomm->settings || is_first) {
174*4882a593Smuzhiyun spi_xcomm->settings = settings;
175*4882a593Smuzhiyun status = spi_xcomm_sync_config(spi_xcomm, 0);
176*4882a593Smuzhiyun if (status < 0)
177*4882a593Smuzhiyun break;
178*4882a593Smuzhiyun }
179*4882a593Smuzhiyun
180*4882a593Smuzhiyun if (t->len) {
181*4882a593Smuzhiyun status = spi_xcomm_txrx_bufs(spi_xcomm, spi, t);
182*4882a593Smuzhiyun
183*4882a593Smuzhiyun if (status < 0)
184*4882a593Smuzhiyun break;
185*4882a593Smuzhiyun
186*4882a593Smuzhiyun if (status > 0)
187*4882a593Smuzhiyun msg->actual_length += status;
188*4882a593Smuzhiyun }
189*4882a593Smuzhiyun status = 0;
190*4882a593Smuzhiyun
191*4882a593Smuzhiyun spi_transfer_delay_exec(t);
192*4882a593Smuzhiyun
193*4882a593Smuzhiyun is_first = false;
194*4882a593Smuzhiyun }
195*4882a593Smuzhiyun
196*4882a593Smuzhiyun if (status != 0 || !cs_change)
197*4882a593Smuzhiyun spi_xcomm_chipselect(spi_xcomm, spi, false);
198*4882a593Smuzhiyun
199*4882a593Smuzhiyun msg->status = status;
200*4882a593Smuzhiyun spi_finalize_current_message(master);
201*4882a593Smuzhiyun
202*4882a593Smuzhiyun return status;
203*4882a593Smuzhiyun }
204*4882a593Smuzhiyun
spi_xcomm_probe(struct i2c_client * i2c,const struct i2c_device_id * id)205*4882a593Smuzhiyun static int spi_xcomm_probe(struct i2c_client *i2c,
206*4882a593Smuzhiyun const struct i2c_device_id *id)
207*4882a593Smuzhiyun {
208*4882a593Smuzhiyun struct spi_xcomm *spi_xcomm;
209*4882a593Smuzhiyun struct spi_master *master;
210*4882a593Smuzhiyun int ret;
211*4882a593Smuzhiyun
212*4882a593Smuzhiyun master = spi_alloc_master(&i2c->dev, sizeof(*spi_xcomm));
213*4882a593Smuzhiyun if (!master)
214*4882a593Smuzhiyun return -ENOMEM;
215*4882a593Smuzhiyun
216*4882a593Smuzhiyun spi_xcomm = spi_master_get_devdata(master);
217*4882a593Smuzhiyun spi_xcomm->i2c = i2c;
218*4882a593Smuzhiyun
219*4882a593Smuzhiyun master->num_chipselect = 16;
220*4882a593Smuzhiyun master->mode_bits = SPI_CPHA | SPI_CPOL | SPI_3WIRE;
221*4882a593Smuzhiyun master->bits_per_word_mask = SPI_BPW_MASK(8);
222*4882a593Smuzhiyun master->flags = SPI_MASTER_HALF_DUPLEX;
223*4882a593Smuzhiyun master->transfer_one_message = spi_xcomm_transfer_one;
224*4882a593Smuzhiyun master->dev.of_node = i2c->dev.of_node;
225*4882a593Smuzhiyun i2c_set_clientdata(i2c, master);
226*4882a593Smuzhiyun
227*4882a593Smuzhiyun ret = devm_spi_register_master(&i2c->dev, master);
228*4882a593Smuzhiyun if (ret < 0)
229*4882a593Smuzhiyun spi_master_put(master);
230*4882a593Smuzhiyun
231*4882a593Smuzhiyun return ret;
232*4882a593Smuzhiyun }
233*4882a593Smuzhiyun
234*4882a593Smuzhiyun static const struct i2c_device_id spi_xcomm_ids[] = {
235*4882a593Smuzhiyun { "spi-xcomm" },
236*4882a593Smuzhiyun { },
237*4882a593Smuzhiyun };
238*4882a593Smuzhiyun MODULE_DEVICE_TABLE(i2c, spi_xcomm_ids);
239*4882a593Smuzhiyun
240*4882a593Smuzhiyun static struct i2c_driver spi_xcomm_driver = {
241*4882a593Smuzhiyun .driver = {
242*4882a593Smuzhiyun .name = "spi-xcomm",
243*4882a593Smuzhiyun },
244*4882a593Smuzhiyun .id_table = spi_xcomm_ids,
245*4882a593Smuzhiyun .probe = spi_xcomm_probe,
246*4882a593Smuzhiyun };
247*4882a593Smuzhiyun module_i2c_driver(spi_xcomm_driver);
248*4882a593Smuzhiyun
249*4882a593Smuzhiyun MODULE_LICENSE("GPL");
250*4882a593Smuzhiyun MODULE_AUTHOR("Lars-Peter Clausen <lars@metafoo.de>");
251*4882a593Smuzhiyun MODULE_DESCRIPTION("Analog Devices AD-FMCOMMS1-EBZ board I2C-SPI bridge driver");
252