xref: /OK3568_Linux_fs/kernel/drivers/spi/spi-sh-sci.c (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0-only
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun  * SH SCI SPI interface
4*4882a593Smuzhiyun  *
5*4882a593Smuzhiyun  * Copyright (c) 2008 Magnus Damm
6*4882a593Smuzhiyun  *
7*4882a593Smuzhiyun  * Based on S3C24XX GPIO based SPI driver, which is:
8*4882a593Smuzhiyun  *   Copyright (c) 2006 Ben Dooks
9*4882a593Smuzhiyun  *   Copyright (c) 2006 Simtec Electronics
10*4882a593Smuzhiyun  */
11*4882a593Smuzhiyun 
12*4882a593Smuzhiyun #include <linux/kernel.h>
13*4882a593Smuzhiyun #include <linux/delay.h>
14*4882a593Smuzhiyun #include <linux/spinlock.h>
15*4882a593Smuzhiyun #include <linux/platform_device.h>
16*4882a593Smuzhiyun 
17*4882a593Smuzhiyun #include <linux/spi/spi.h>
18*4882a593Smuzhiyun #include <linux/spi/spi_bitbang.h>
19*4882a593Smuzhiyun #include <linux/module.h>
20*4882a593Smuzhiyun 
21*4882a593Smuzhiyun #include <asm/spi.h>
22*4882a593Smuzhiyun #include <asm/io.h>
23*4882a593Smuzhiyun 
24*4882a593Smuzhiyun struct sh_sci_spi {
25*4882a593Smuzhiyun 	struct spi_bitbang bitbang;
26*4882a593Smuzhiyun 
27*4882a593Smuzhiyun 	void __iomem *membase;
28*4882a593Smuzhiyun 	unsigned char val;
29*4882a593Smuzhiyun 	struct sh_spi_info *info;
30*4882a593Smuzhiyun 	struct platform_device *dev;
31*4882a593Smuzhiyun };
32*4882a593Smuzhiyun 
33*4882a593Smuzhiyun #define SCSPTR(sp)	(sp->membase + 0x1c)
34*4882a593Smuzhiyun #define PIN_SCK		(1 << 2)
35*4882a593Smuzhiyun #define PIN_TXD		(1 << 0)
36*4882a593Smuzhiyun #define PIN_RXD		PIN_TXD
37*4882a593Smuzhiyun #define PIN_INIT	((1 << 1) | (1 << 3) | PIN_SCK | PIN_TXD)
38*4882a593Smuzhiyun 
setbits(struct sh_sci_spi * sp,int bits,int on)39*4882a593Smuzhiyun static inline void setbits(struct sh_sci_spi *sp, int bits, int on)
40*4882a593Smuzhiyun {
41*4882a593Smuzhiyun 	/*
42*4882a593Smuzhiyun 	 * We are the only user of SCSPTR so no locking is required.
43*4882a593Smuzhiyun 	 * Reading bit 2 and 0 in SCSPTR gives pin state as input.
44*4882a593Smuzhiyun 	 * Writing the same bits sets the output value.
45*4882a593Smuzhiyun 	 * This makes regular read-modify-write difficult so we
46*4882a593Smuzhiyun 	 * use sp->val to keep track of the latest register value.
47*4882a593Smuzhiyun 	 */
48*4882a593Smuzhiyun 
49*4882a593Smuzhiyun 	if (on)
50*4882a593Smuzhiyun 		sp->val |= bits;
51*4882a593Smuzhiyun 	else
52*4882a593Smuzhiyun 		sp->val &= ~bits;
53*4882a593Smuzhiyun 
54*4882a593Smuzhiyun 	iowrite8(sp->val, SCSPTR(sp));
55*4882a593Smuzhiyun }
56*4882a593Smuzhiyun 
setsck(struct spi_device * dev,int on)57*4882a593Smuzhiyun static inline void setsck(struct spi_device *dev, int on)
58*4882a593Smuzhiyun {
59*4882a593Smuzhiyun 	setbits(spi_master_get_devdata(dev->master), PIN_SCK, on);
60*4882a593Smuzhiyun }
61*4882a593Smuzhiyun 
setmosi(struct spi_device * dev,int on)62*4882a593Smuzhiyun static inline void setmosi(struct spi_device *dev, int on)
63*4882a593Smuzhiyun {
64*4882a593Smuzhiyun 	setbits(spi_master_get_devdata(dev->master), PIN_TXD, on);
65*4882a593Smuzhiyun }
66*4882a593Smuzhiyun 
getmiso(struct spi_device * dev)67*4882a593Smuzhiyun static inline u32 getmiso(struct spi_device *dev)
68*4882a593Smuzhiyun {
69*4882a593Smuzhiyun 	struct sh_sci_spi *sp = spi_master_get_devdata(dev->master);
70*4882a593Smuzhiyun 
71*4882a593Smuzhiyun 	return (ioread8(SCSPTR(sp)) & PIN_RXD) ? 1 : 0;
72*4882a593Smuzhiyun }
73*4882a593Smuzhiyun 
74*4882a593Smuzhiyun #define spidelay(x) ndelay(x)
75*4882a593Smuzhiyun 
76*4882a593Smuzhiyun #include "spi-bitbang-txrx.h"
77*4882a593Smuzhiyun 
sh_sci_spi_txrx_mode0(struct spi_device * spi,unsigned nsecs,u32 word,u8 bits,unsigned flags)78*4882a593Smuzhiyun static u32 sh_sci_spi_txrx_mode0(struct spi_device *spi,
79*4882a593Smuzhiyun 				 unsigned nsecs, u32 word, u8 bits,
80*4882a593Smuzhiyun 				 unsigned flags)
81*4882a593Smuzhiyun {
82*4882a593Smuzhiyun 	return bitbang_txrx_be_cpha0(spi, nsecs, 0, flags, word, bits);
83*4882a593Smuzhiyun }
84*4882a593Smuzhiyun 
sh_sci_spi_txrx_mode1(struct spi_device * spi,unsigned nsecs,u32 word,u8 bits,unsigned flags)85*4882a593Smuzhiyun static u32 sh_sci_spi_txrx_mode1(struct spi_device *spi,
86*4882a593Smuzhiyun 				 unsigned nsecs, u32 word, u8 bits,
87*4882a593Smuzhiyun 				 unsigned flags)
88*4882a593Smuzhiyun {
89*4882a593Smuzhiyun 	return bitbang_txrx_be_cpha1(spi, nsecs, 0, flags, word, bits);
90*4882a593Smuzhiyun }
91*4882a593Smuzhiyun 
sh_sci_spi_txrx_mode2(struct spi_device * spi,unsigned nsecs,u32 word,u8 bits,unsigned flags)92*4882a593Smuzhiyun static u32 sh_sci_spi_txrx_mode2(struct spi_device *spi,
93*4882a593Smuzhiyun 				 unsigned nsecs, u32 word, u8 bits,
94*4882a593Smuzhiyun 				 unsigned flags)
95*4882a593Smuzhiyun {
96*4882a593Smuzhiyun 	return bitbang_txrx_be_cpha0(spi, nsecs, 1, flags, word, bits);
97*4882a593Smuzhiyun }
98*4882a593Smuzhiyun 
sh_sci_spi_txrx_mode3(struct spi_device * spi,unsigned nsecs,u32 word,u8 bits,unsigned flags)99*4882a593Smuzhiyun static u32 sh_sci_spi_txrx_mode3(struct spi_device *spi,
100*4882a593Smuzhiyun 				 unsigned nsecs, u32 word, u8 bits,
101*4882a593Smuzhiyun 				 unsigned flags)
102*4882a593Smuzhiyun {
103*4882a593Smuzhiyun 	return bitbang_txrx_be_cpha1(spi, nsecs, 1, flags, word, bits);
104*4882a593Smuzhiyun }
105*4882a593Smuzhiyun 
sh_sci_spi_chipselect(struct spi_device * dev,int value)106*4882a593Smuzhiyun static void sh_sci_spi_chipselect(struct spi_device *dev, int value)
107*4882a593Smuzhiyun {
108*4882a593Smuzhiyun 	struct sh_sci_spi *sp = spi_master_get_devdata(dev->master);
109*4882a593Smuzhiyun 
110*4882a593Smuzhiyun 	if (sp->info->chip_select)
111*4882a593Smuzhiyun 		(sp->info->chip_select)(sp->info, dev->chip_select, value);
112*4882a593Smuzhiyun }
113*4882a593Smuzhiyun 
sh_sci_spi_probe(struct platform_device * dev)114*4882a593Smuzhiyun static int sh_sci_spi_probe(struct platform_device *dev)
115*4882a593Smuzhiyun {
116*4882a593Smuzhiyun 	struct resource	*r;
117*4882a593Smuzhiyun 	struct spi_master *master;
118*4882a593Smuzhiyun 	struct sh_sci_spi *sp;
119*4882a593Smuzhiyun 	int ret;
120*4882a593Smuzhiyun 
121*4882a593Smuzhiyun 	master = spi_alloc_master(&dev->dev, sizeof(struct sh_sci_spi));
122*4882a593Smuzhiyun 	if (master == NULL) {
123*4882a593Smuzhiyun 		dev_err(&dev->dev, "failed to allocate spi master\n");
124*4882a593Smuzhiyun 		ret = -ENOMEM;
125*4882a593Smuzhiyun 		goto err0;
126*4882a593Smuzhiyun 	}
127*4882a593Smuzhiyun 
128*4882a593Smuzhiyun 	sp = spi_master_get_devdata(master);
129*4882a593Smuzhiyun 
130*4882a593Smuzhiyun 	platform_set_drvdata(dev, sp);
131*4882a593Smuzhiyun 	sp->info = dev_get_platdata(&dev->dev);
132*4882a593Smuzhiyun 	if (!sp->info) {
133*4882a593Smuzhiyun 		dev_err(&dev->dev, "platform data is missing\n");
134*4882a593Smuzhiyun 		ret = -ENOENT;
135*4882a593Smuzhiyun 		goto err1;
136*4882a593Smuzhiyun 	}
137*4882a593Smuzhiyun 
138*4882a593Smuzhiyun 	/* setup spi bitbang adaptor */
139*4882a593Smuzhiyun 	sp->bitbang.master = master;
140*4882a593Smuzhiyun 	sp->bitbang.master->bus_num = sp->info->bus_num;
141*4882a593Smuzhiyun 	sp->bitbang.master->num_chipselect = sp->info->num_chipselect;
142*4882a593Smuzhiyun 	sp->bitbang.chipselect = sh_sci_spi_chipselect;
143*4882a593Smuzhiyun 
144*4882a593Smuzhiyun 	sp->bitbang.txrx_word[SPI_MODE_0] = sh_sci_spi_txrx_mode0;
145*4882a593Smuzhiyun 	sp->bitbang.txrx_word[SPI_MODE_1] = sh_sci_spi_txrx_mode1;
146*4882a593Smuzhiyun 	sp->bitbang.txrx_word[SPI_MODE_2] = sh_sci_spi_txrx_mode2;
147*4882a593Smuzhiyun 	sp->bitbang.txrx_word[SPI_MODE_3] = sh_sci_spi_txrx_mode3;
148*4882a593Smuzhiyun 
149*4882a593Smuzhiyun 	r = platform_get_resource(dev, IORESOURCE_MEM, 0);
150*4882a593Smuzhiyun 	if (r == NULL) {
151*4882a593Smuzhiyun 		ret = -ENOENT;
152*4882a593Smuzhiyun 		goto err1;
153*4882a593Smuzhiyun 	}
154*4882a593Smuzhiyun 	sp->membase = ioremap(r->start, resource_size(r));
155*4882a593Smuzhiyun 	if (!sp->membase) {
156*4882a593Smuzhiyun 		ret = -ENXIO;
157*4882a593Smuzhiyun 		goto err1;
158*4882a593Smuzhiyun 	}
159*4882a593Smuzhiyun 	sp->val = ioread8(SCSPTR(sp));
160*4882a593Smuzhiyun 	setbits(sp, PIN_INIT, 1);
161*4882a593Smuzhiyun 
162*4882a593Smuzhiyun 	ret = spi_bitbang_start(&sp->bitbang);
163*4882a593Smuzhiyun 	if (!ret)
164*4882a593Smuzhiyun 		return 0;
165*4882a593Smuzhiyun 
166*4882a593Smuzhiyun 	setbits(sp, PIN_INIT, 0);
167*4882a593Smuzhiyun 	iounmap(sp->membase);
168*4882a593Smuzhiyun  err1:
169*4882a593Smuzhiyun 	spi_master_put(sp->bitbang.master);
170*4882a593Smuzhiyun  err0:
171*4882a593Smuzhiyun 	return ret;
172*4882a593Smuzhiyun }
173*4882a593Smuzhiyun 
sh_sci_spi_remove(struct platform_device * dev)174*4882a593Smuzhiyun static int sh_sci_spi_remove(struct platform_device *dev)
175*4882a593Smuzhiyun {
176*4882a593Smuzhiyun 	struct sh_sci_spi *sp = platform_get_drvdata(dev);
177*4882a593Smuzhiyun 
178*4882a593Smuzhiyun 	spi_bitbang_stop(&sp->bitbang);
179*4882a593Smuzhiyun 	setbits(sp, PIN_INIT, 0);
180*4882a593Smuzhiyun 	iounmap(sp->membase);
181*4882a593Smuzhiyun 	spi_master_put(sp->bitbang.master);
182*4882a593Smuzhiyun 	return 0;
183*4882a593Smuzhiyun }
184*4882a593Smuzhiyun 
185*4882a593Smuzhiyun static struct platform_driver sh_sci_spi_drv = {
186*4882a593Smuzhiyun 	.probe		= sh_sci_spi_probe,
187*4882a593Smuzhiyun 	.remove		= sh_sci_spi_remove,
188*4882a593Smuzhiyun 	.driver		= {
189*4882a593Smuzhiyun 		.name	= "spi_sh_sci",
190*4882a593Smuzhiyun 	},
191*4882a593Smuzhiyun };
192*4882a593Smuzhiyun module_platform_driver(sh_sci_spi_drv);
193*4882a593Smuzhiyun 
194*4882a593Smuzhiyun MODULE_DESCRIPTION("SH SCI SPI Driver");
195*4882a593Smuzhiyun MODULE_AUTHOR("Magnus Damm <damm@opensource.se>");
196*4882a593Smuzhiyun MODULE_LICENSE("GPL");
197*4882a593Smuzhiyun MODULE_ALIAS("platform:spi_sh_sci");
198