xref: /OK3568_Linux_fs/kernel/drivers/spi/spi-lp8841-rtc.c (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0-or-later
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun  * SPI master driver for ICP DAS LP-8841 RTC
4*4882a593Smuzhiyun  *
5*4882a593Smuzhiyun  * Copyright (C) 2016 Sergei Ianovich
6*4882a593Smuzhiyun  *
7*4882a593Smuzhiyun  * based on
8*4882a593Smuzhiyun  *
9*4882a593Smuzhiyun  * Dallas DS1302 RTC Support
10*4882a593Smuzhiyun  * Copyright (C) 2002 David McCullough
11*4882a593Smuzhiyun  * Copyright (C) 2003 - 2007 Paul Mundt
12*4882a593Smuzhiyun  */
13*4882a593Smuzhiyun #include <linux/delay.h>
14*4882a593Smuzhiyun #include <linux/kernel.h>
15*4882a593Smuzhiyun #include <linux/module.h>
16*4882a593Smuzhiyun #include <linux/platform_device.h>
17*4882a593Smuzhiyun #include <linux/of.h>
18*4882a593Smuzhiyun #include <linux/of_device.h>
19*4882a593Smuzhiyun #include <linux/spi/spi.h>
20*4882a593Smuzhiyun 
21*4882a593Smuzhiyun #define DRIVER_NAME	"spi_lp8841_rtc"
22*4882a593Smuzhiyun 
23*4882a593Smuzhiyun #define SPI_LP8841_RTC_CE	0x01
24*4882a593Smuzhiyun #define SPI_LP8841_RTC_CLK	0x02
25*4882a593Smuzhiyun #define SPI_LP8841_RTC_nWE	0x04
26*4882a593Smuzhiyun #define SPI_LP8841_RTC_MOSI	0x08
27*4882a593Smuzhiyun #define SPI_LP8841_RTC_MISO	0x01
28*4882a593Smuzhiyun 
29*4882a593Smuzhiyun /*
30*4882a593Smuzhiyun  * REVISIT If there is support for SPI_3WIRE and SPI_LSB_FIRST in SPI
31*4882a593Smuzhiyun  * GPIO driver, this SPI driver can be replaced by a simple GPIO driver
32*4882a593Smuzhiyun  * providing 3 GPIO pins.
33*4882a593Smuzhiyun  */
34*4882a593Smuzhiyun 
35*4882a593Smuzhiyun struct spi_lp8841_rtc {
36*4882a593Smuzhiyun 	void		*iomem;
37*4882a593Smuzhiyun 	unsigned long	state;
38*4882a593Smuzhiyun };
39*4882a593Smuzhiyun 
40*4882a593Smuzhiyun static inline void
setsck(struct spi_lp8841_rtc * data,int is_on)41*4882a593Smuzhiyun setsck(struct spi_lp8841_rtc *data, int is_on)
42*4882a593Smuzhiyun {
43*4882a593Smuzhiyun 	if (is_on)
44*4882a593Smuzhiyun 		data->state |= SPI_LP8841_RTC_CLK;
45*4882a593Smuzhiyun 	else
46*4882a593Smuzhiyun 		data->state &= ~SPI_LP8841_RTC_CLK;
47*4882a593Smuzhiyun 	writeb(data->state, data->iomem);
48*4882a593Smuzhiyun }
49*4882a593Smuzhiyun 
50*4882a593Smuzhiyun static inline void
setmosi(struct spi_lp8841_rtc * data,int is_on)51*4882a593Smuzhiyun setmosi(struct spi_lp8841_rtc *data, int is_on)
52*4882a593Smuzhiyun {
53*4882a593Smuzhiyun 	if (is_on)
54*4882a593Smuzhiyun 		data->state |= SPI_LP8841_RTC_MOSI;
55*4882a593Smuzhiyun 	else
56*4882a593Smuzhiyun 		data->state &= ~SPI_LP8841_RTC_MOSI;
57*4882a593Smuzhiyun 	writeb(data->state, data->iomem);
58*4882a593Smuzhiyun }
59*4882a593Smuzhiyun 
60*4882a593Smuzhiyun static inline int
getmiso(struct spi_lp8841_rtc * data)61*4882a593Smuzhiyun getmiso(struct spi_lp8841_rtc *data)
62*4882a593Smuzhiyun {
63*4882a593Smuzhiyun 	return ioread8(data->iomem) & SPI_LP8841_RTC_MISO;
64*4882a593Smuzhiyun }
65*4882a593Smuzhiyun 
66*4882a593Smuzhiyun static inline u32
bitbang_txrx_be_cpha0_lsb(struct spi_lp8841_rtc * data,unsigned usecs,unsigned cpol,unsigned flags,u32 word,u8 bits)67*4882a593Smuzhiyun bitbang_txrx_be_cpha0_lsb(struct spi_lp8841_rtc *data,
68*4882a593Smuzhiyun 		unsigned usecs, unsigned cpol, unsigned flags,
69*4882a593Smuzhiyun 		u32 word, u8 bits)
70*4882a593Smuzhiyun {
71*4882a593Smuzhiyun 	/* if (cpol == 0) this is SPI_MODE_0; else this is SPI_MODE_2 */
72*4882a593Smuzhiyun 
73*4882a593Smuzhiyun 	u32 shift = 32 - bits;
74*4882a593Smuzhiyun 	/* clock starts at inactive polarity */
75*4882a593Smuzhiyun 	for (; likely(bits); bits--) {
76*4882a593Smuzhiyun 
77*4882a593Smuzhiyun 		/* setup LSB (to slave) on leading edge */
78*4882a593Smuzhiyun 		if ((flags & SPI_MASTER_NO_TX) == 0)
79*4882a593Smuzhiyun 			setmosi(data, (word & 1));
80*4882a593Smuzhiyun 
81*4882a593Smuzhiyun 		usleep_range(usecs, usecs + 1);	/* T(setup) */
82*4882a593Smuzhiyun 
83*4882a593Smuzhiyun 		/* sample LSB (from slave) on trailing edge */
84*4882a593Smuzhiyun 		word >>= 1;
85*4882a593Smuzhiyun 		if ((flags & SPI_MASTER_NO_RX) == 0)
86*4882a593Smuzhiyun 			word |= (getmiso(data) << 31);
87*4882a593Smuzhiyun 
88*4882a593Smuzhiyun 		setsck(data, !cpol);
89*4882a593Smuzhiyun 		usleep_range(usecs, usecs + 1);
90*4882a593Smuzhiyun 
91*4882a593Smuzhiyun 		setsck(data, cpol);
92*4882a593Smuzhiyun 	}
93*4882a593Smuzhiyun 
94*4882a593Smuzhiyun 	word >>= shift;
95*4882a593Smuzhiyun 	return word;
96*4882a593Smuzhiyun }
97*4882a593Smuzhiyun 
98*4882a593Smuzhiyun static int
spi_lp8841_rtc_transfer_one(struct spi_master * master,struct spi_device * spi,struct spi_transfer * t)99*4882a593Smuzhiyun spi_lp8841_rtc_transfer_one(struct spi_master *master,
100*4882a593Smuzhiyun 			    struct spi_device *spi,
101*4882a593Smuzhiyun 			    struct spi_transfer *t)
102*4882a593Smuzhiyun {
103*4882a593Smuzhiyun 	struct spi_lp8841_rtc	*data = spi_master_get_devdata(master);
104*4882a593Smuzhiyun 	unsigned		count = t->len;
105*4882a593Smuzhiyun 	const u8		*tx = t->tx_buf;
106*4882a593Smuzhiyun 	u8			*rx = t->rx_buf;
107*4882a593Smuzhiyun 	u8			word = 0;
108*4882a593Smuzhiyun 	int			ret = 0;
109*4882a593Smuzhiyun 
110*4882a593Smuzhiyun 	if (tx) {
111*4882a593Smuzhiyun 		data->state &= ~SPI_LP8841_RTC_nWE;
112*4882a593Smuzhiyun 		writeb(data->state, data->iomem);
113*4882a593Smuzhiyun 		while (likely(count > 0)) {
114*4882a593Smuzhiyun 			word = *tx++;
115*4882a593Smuzhiyun 			bitbang_txrx_be_cpha0_lsb(data, 1, 0,
116*4882a593Smuzhiyun 					SPI_MASTER_NO_RX, word, 8);
117*4882a593Smuzhiyun 			count--;
118*4882a593Smuzhiyun 		}
119*4882a593Smuzhiyun 	} else if (rx) {
120*4882a593Smuzhiyun 		data->state |= SPI_LP8841_RTC_nWE;
121*4882a593Smuzhiyun 		writeb(data->state, data->iomem);
122*4882a593Smuzhiyun 		while (likely(count > 0)) {
123*4882a593Smuzhiyun 			word = bitbang_txrx_be_cpha0_lsb(data, 1, 0,
124*4882a593Smuzhiyun 					SPI_MASTER_NO_TX, word, 8);
125*4882a593Smuzhiyun 			*rx++ = word;
126*4882a593Smuzhiyun 			count--;
127*4882a593Smuzhiyun 		}
128*4882a593Smuzhiyun 	} else {
129*4882a593Smuzhiyun 		ret = -EINVAL;
130*4882a593Smuzhiyun 	}
131*4882a593Smuzhiyun 
132*4882a593Smuzhiyun 	spi_finalize_current_transfer(master);
133*4882a593Smuzhiyun 
134*4882a593Smuzhiyun 	return ret;
135*4882a593Smuzhiyun }
136*4882a593Smuzhiyun 
137*4882a593Smuzhiyun static void
spi_lp8841_rtc_set_cs(struct spi_device * spi,bool enable)138*4882a593Smuzhiyun spi_lp8841_rtc_set_cs(struct spi_device *spi, bool enable)
139*4882a593Smuzhiyun {
140*4882a593Smuzhiyun 	struct spi_lp8841_rtc *data = spi_master_get_devdata(spi->master);
141*4882a593Smuzhiyun 
142*4882a593Smuzhiyun 	data->state = 0;
143*4882a593Smuzhiyun 	writeb(data->state, data->iomem);
144*4882a593Smuzhiyun 	if (enable) {
145*4882a593Smuzhiyun 		usleep_range(4, 5);
146*4882a593Smuzhiyun 		data->state |= SPI_LP8841_RTC_CE;
147*4882a593Smuzhiyun 		writeb(data->state, data->iomem);
148*4882a593Smuzhiyun 		usleep_range(4, 5);
149*4882a593Smuzhiyun 	}
150*4882a593Smuzhiyun }
151*4882a593Smuzhiyun 
152*4882a593Smuzhiyun static int
spi_lp8841_rtc_setup(struct spi_device * spi)153*4882a593Smuzhiyun spi_lp8841_rtc_setup(struct spi_device *spi)
154*4882a593Smuzhiyun {
155*4882a593Smuzhiyun 	if ((spi->mode & SPI_CS_HIGH) == 0) {
156*4882a593Smuzhiyun 		dev_err(&spi->dev, "unsupported active low chip select\n");
157*4882a593Smuzhiyun 		return -EINVAL;
158*4882a593Smuzhiyun 	}
159*4882a593Smuzhiyun 
160*4882a593Smuzhiyun 	if ((spi->mode & SPI_LSB_FIRST) == 0) {
161*4882a593Smuzhiyun 		dev_err(&spi->dev, "unsupported MSB first mode\n");
162*4882a593Smuzhiyun 		return -EINVAL;
163*4882a593Smuzhiyun 	}
164*4882a593Smuzhiyun 
165*4882a593Smuzhiyun 	if ((spi->mode & SPI_3WIRE) == 0) {
166*4882a593Smuzhiyun 		dev_err(&spi->dev, "unsupported wiring. 3 wires required\n");
167*4882a593Smuzhiyun 		return -EINVAL;
168*4882a593Smuzhiyun 	}
169*4882a593Smuzhiyun 
170*4882a593Smuzhiyun 	return 0;
171*4882a593Smuzhiyun }
172*4882a593Smuzhiyun 
173*4882a593Smuzhiyun #ifdef CONFIG_OF
174*4882a593Smuzhiyun static const struct of_device_id spi_lp8841_rtc_dt_ids[] = {
175*4882a593Smuzhiyun 	{ .compatible = "icpdas,lp8841-spi-rtc" },
176*4882a593Smuzhiyun 	{ }
177*4882a593Smuzhiyun };
178*4882a593Smuzhiyun 
179*4882a593Smuzhiyun MODULE_DEVICE_TABLE(of, spi_lp8841_rtc_dt_ids);
180*4882a593Smuzhiyun #endif
181*4882a593Smuzhiyun 
182*4882a593Smuzhiyun static int
spi_lp8841_rtc_probe(struct platform_device * pdev)183*4882a593Smuzhiyun spi_lp8841_rtc_probe(struct platform_device *pdev)
184*4882a593Smuzhiyun {
185*4882a593Smuzhiyun 	int				ret;
186*4882a593Smuzhiyun 	struct spi_master		*master;
187*4882a593Smuzhiyun 	struct spi_lp8841_rtc		*data;
188*4882a593Smuzhiyun 
189*4882a593Smuzhiyun 	master = spi_alloc_master(&pdev->dev, sizeof(*data));
190*4882a593Smuzhiyun 	if (!master)
191*4882a593Smuzhiyun 		return -ENOMEM;
192*4882a593Smuzhiyun 	platform_set_drvdata(pdev, master);
193*4882a593Smuzhiyun 
194*4882a593Smuzhiyun 	master->flags = SPI_MASTER_HALF_DUPLEX;
195*4882a593Smuzhiyun 	master->mode_bits = SPI_CS_HIGH | SPI_3WIRE | SPI_LSB_FIRST;
196*4882a593Smuzhiyun 
197*4882a593Smuzhiyun 	master->bus_num = pdev->id;
198*4882a593Smuzhiyun 	master->num_chipselect = 1;
199*4882a593Smuzhiyun 	master->setup = spi_lp8841_rtc_setup;
200*4882a593Smuzhiyun 	master->set_cs = spi_lp8841_rtc_set_cs;
201*4882a593Smuzhiyun 	master->transfer_one = spi_lp8841_rtc_transfer_one;
202*4882a593Smuzhiyun 	master->bits_per_word_mask = SPI_BPW_MASK(8);
203*4882a593Smuzhiyun #ifdef CONFIG_OF
204*4882a593Smuzhiyun 	master->dev.of_node = pdev->dev.of_node;
205*4882a593Smuzhiyun #endif
206*4882a593Smuzhiyun 
207*4882a593Smuzhiyun 	data = spi_master_get_devdata(master);
208*4882a593Smuzhiyun 
209*4882a593Smuzhiyun 	data->iomem = devm_platform_ioremap_resource(pdev, 0);
210*4882a593Smuzhiyun 	ret = PTR_ERR_OR_ZERO(data->iomem);
211*4882a593Smuzhiyun 	if (ret) {
212*4882a593Smuzhiyun 		dev_err(&pdev->dev, "failed to get IO address\n");
213*4882a593Smuzhiyun 		goto err_put_master;
214*4882a593Smuzhiyun 	}
215*4882a593Smuzhiyun 
216*4882a593Smuzhiyun 	/* register with the SPI framework */
217*4882a593Smuzhiyun 	ret = devm_spi_register_master(&pdev->dev, master);
218*4882a593Smuzhiyun 	if (ret) {
219*4882a593Smuzhiyun 		dev_err(&pdev->dev, "cannot register spi master\n");
220*4882a593Smuzhiyun 		goto err_put_master;
221*4882a593Smuzhiyun 	}
222*4882a593Smuzhiyun 
223*4882a593Smuzhiyun 	return ret;
224*4882a593Smuzhiyun 
225*4882a593Smuzhiyun 
226*4882a593Smuzhiyun err_put_master:
227*4882a593Smuzhiyun 	spi_master_put(master);
228*4882a593Smuzhiyun 
229*4882a593Smuzhiyun 	return ret;
230*4882a593Smuzhiyun }
231*4882a593Smuzhiyun 
232*4882a593Smuzhiyun MODULE_ALIAS("platform:" DRIVER_NAME);
233*4882a593Smuzhiyun 
234*4882a593Smuzhiyun static struct platform_driver spi_lp8841_rtc_driver = {
235*4882a593Smuzhiyun 	.driver = {
236*4882a593Smuzhiyun 		.name	= DRIVER_NAME,
237*4882a593Smuzhiyun 		.of_match_table = of_match_ptr(spi_lp8841_rtc_dt_ids),
238*4882a593Smuzhiyun 	},
239*4882a593Smuzhiyun 	.probe		= spi_lp8841_rtc_probe,
240*4882a593Smuzhiyun };
241*4882a593Smuzhiyun module_platform_driver(spi_lp8841_rtc_driver);
242*4882a593Smuzhiyun 
243*4882a593Smuzhiyun MODULE_DESCRIPTION("SPI master driver for ICP DAS LP-8841 RTC");
244*4882a593Smuzhiyun MODULE_AUTHOR("Sergei Ianovich");
245*4882a593Smuzhiyun MODULE_LICENSE("GPL");
246