1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0-or-later
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun * Driver for LM70EVAL-LLP board for the LM70 sensor
4*4882a593Smuzhiyun *
5*4882a593Smuzhiyun * Copyright (C) 2006 Kaiwan N Billimoria <kaiwan@designergraphix.com>
6*4882a593Smuzhiyun */
7*4882a593Smuzhiyun
8*4882a593Smuzhiyun #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
9*4882a593Smuzhiyun
10*4882a593Smuzhiyun #include <linux/init.h>
11*4882a593Smuzhiyun #include <linux/module.h>
12*4882a593Smuzhiyun #include <linux/kernel.h>
13*4882a593Smuzhiyun #include <linux/delay.h>
14*4882a593Smuzhiyun #include <linux/device.h>
15*4882a593Smuzhiyun #include <linux/parport.h>
16*4882a593Smuzhiyun #include <linux/sysfs.h>
17*4882a593Smuzhiyun #include <linux/workqueue.h>
18*4882a593Smuzhiyun
19*4882a593Smuzhiyun #include <linux/spi/spi.h>
20*4882a593Smuzhiyun #include <linux/spi/spi_bitbang.h>
21*4882a593Smuzhiyun
22*4882a593Smuzhiyun /*
23*4882a593Smuzhiyun * The LM70 communicates with a host processor using a 3-wire variant of
24*4882a593Smuzhiyun * the SPI/Microwire bus interface. This driver specifically supports an
25*4882a593Smuzhiyun * NS LM70 LLP Evaluation Board, interfacing to a PC using its parallel
26*4882a593Smuzhiyun * port to bitbang an SPI-parport bridge. Accordingly, this is an SPI
27*4882a593Smuzhiyun * master controller driver. The hwmon/lm70 driver is a "SPI protocol
28*4882a593Smuzhiyun * driver", layered on top of this one and usable without the lm70llp.
29*4882a593Smuzhiyun *
30*4882a593Smuzhiyun * Datasheet and Schematic:
31*4882a593Smuzhiyun * The LM70 is a temperature sensor chip from National Semiconductor; its
32*4882a593Smuzhiyun * datasheet is available at http://www.national.com/pf/LM/LM70.html
33*4882a593Smuzhiyun * The schematic for this particular board (the LM70EVAL-LLP) is
34*4882a593Smuzhiyun * available (on page 4) here:
35*4882a593Smuzhiyun * http://www.national.com/appinfo/tempsensors/files/LM70LLPEVALmanual.pdf
36*4882a593Smuzhiyun *
37*4882a593Smuzhiyun * Also see Documentation/spi/spi-lm70llp.rst. The SPI<->parport code here is
38*4882a593Smuzhiyun * (heavily) based on spi-butterfly by David Brownell.
39*4882a593Smuzhiyun *
40*4882a593Smuzhiyun * The LM70 LLP connects to the PC parallel port in the following manner:
41*4882a593Smuzhiyun *
42*4882a593Smuzhiyun * Parallel LM70 LLP
43*4882a593Smuzhiyun * Port Direction JP2 Header
44*4882a593Smuzhiyun * ----------- --------- ------------
45*4882a593Smuzhiyun * D0 2 - -
46*4882a593Smuzhiyun * D1 3 --> V+ 5
47*4882a593Smuzhiyun * D2 4 --> V+ 5
48*4882a593Smuzhiyun * D3 5 --> V+ 5
49*4882a593Smuzhiyun * D4 6 --> V+ 5
50*4882a593Smuzhiyun * D5 7 --> nCS 8
51*4882a593Smuzhiyun * D6 8 --> SCLK 3
52*4882a593Smuzhiyun * D7 9 --> SI/O 5
53*4882a593Smuzhiyun * GND 25 - GND 7
54*4882a593Smuzhiyun * Select 13 <-- SI/O 1
55*4882a593Smuzhiyun *
56*4882a593Smuzhiyun * Note that parport pin 13 actually gets inverted by the transistor
57*4882a593Smuzhiyun * arrangement which lets either the parport or the LM70 drive the
58*4882a593Smuzhiyun * SI/SO signal (see the schematic for details).
59*4882a593Smuzhiyun */
60*4882a593Smuzhiyun
61*4882a593Smuzhiyun #define DRVNAME "spi-lm70llp"
62*4882a593Smuzhiyun
63*4882a593Smuzhiyun #define lm70_INIT 0xBE
64*4882a593Smuzhiyun #define SIO 0x10
65*4882a593Smuzhiyun #define nCS 0x20
66*4882a593Smuzhiyun #define SCLK 0x40
67*4882a593Smuzhiyun
68*4882a593Smuzhiyun /*-------------------------------------------------------------------------*/
69*4882a593Smuzhiyun
70*4882a593Smuzhiyun struct spi_lm70llp {
71*4882a593Smuzhiyun struct spi_bitbang bitbang;
72*4882a593Smuzhiyun struct parport *port;
73*4882a593Smuzhiyun struct pardevice *pd;
74*4882a593Smuzhiyun struct spi_device *spidev_lm70;
75*4882a593Smuzhiyun struct spi_board_info info;
76*4882a593Smuzhiyun //struct device *dev;
77*4882a593Smuzhiyun };
78*4882a593Smuzhiyun
79*4882a593Smuzhiyun /* REVISIT : ugly global ; provides "exclusive open" facility */
80*4882a593Smuzhiyun static struct spi_lm70llp *lm70llp;
81*4882a593Smuzhiyun
82*4882a593Smuzhiyun /*-------------------------------------------------------------------*/
83*4882a593Smuzhiyun
spidev_to_pp(struct spi_device * spi)84*4882a593Smuzhiyun static inline struct spi_lm70llp *spidev_to_pp(struct spi_device *spi)
85*4882a593Smuzhiyun {
86*4882a593Smuzhiyun return spi->controller_data;
87*4882a593Smuzhiyun }
88*4882a593Smuzhiyun
89*4882a593Smuzhiyun /*---------------------- LM70 LLP eval board-specific inlines follow */
90*4882a593Smuzhiyun
91*4882a593Smuzhiyun /* NOTE: we don't actually need to reread the output values, since they'll
92*4882a593Smuzhiyun * still be what we wrote before. Plus, going through parport builds in
93*4882a593Smuzhiyun * a ~1ms/operation delay; these SPI transfers could easily be faster.
94*4882a593Smuzhiyun */
95*4882a593Smuzhiyun
deassertCS(struct spi_lm70llp * pp)96*4882a593Smuzhiyun static inline void deassertCS(struct spi_lm70llp *pp)
97*4882a593Smuzhiyun {
98*4882a593Smuzhiyun u8 data = parport_read_data(pp->port);
99*4882a593Smuzhiyun
100*4882a593Smuzhiyun data &= ~0x80; /* pull D7/SI-out low while de-asserted */
101*4882a593Smuzhiyun parport_write_data(pp->port, data | nCS);
102*4882a593Smuzhiyun }
103*4882a593Smuzhiyun
assertCS(struct spi_lm70llp * pp)104*4882a593Smuzhiyun static inline void assertCS(struct spi_lm70llp *pp)
105*4882a593Smuzhiyun {
106*4882a593Smuzhiyun u8 data = parport_read_data(pp->port);
107*4882a593Smuzhiyun
108*4882a593Smuzhiyun data |= 0x80; /* pull D7/SI-out high so lm70 drives SO-in */
109*4882a593Smuzhiyun parport_write_data(pp->port, data & ~nCS);
110*4882a593Smuzhiyun }
111*4882a593Smuzhiyun
clkHigh(struct spi_lm70llp * pp)112*4882a593Smuzhiyun static inline void clkHigh(struct spi_lm70llp *pp)
113*4882a593Smuzhiyun {
114*4882a593Smuzhiyun u8 data = parport_read_data(pp->port);
115*4882a593Smuzhiyun
116*4882a593Smuzhiyun parport_write_data(pp->port, data | SCLK);
117*4882a593Smuzhiyun }
118*4882a593Smuzhiyun
clkLow(struct spi_lm70llp * pp)119*4882a593Smuzhiyun static inline void clkLow(struct spi_lm70llp *pp)
120*4882a593Smuzhiyun {
121*4882a593Smuzhiyun u8 data = parport_read_data(pp->port);
122*4882a593Smuzhiyun
123*4882a593Smuzhiyun parport_write_data(pp->port, data & ~SCLK);
124*4882a593Smuzhiyun }
125*4882a593Smuzhiyun
126*4882a593Smuzhiyun /*------------------------- SPI-LM70-specific inlines ----------------------*/
127*4882a593Smuzhiyun
spidelay(unsigned d)128*4882a593Smuzhiyun static inline void spidelay(unsigned d)
129*4882a593Smuzhiyun {
130*4882a593Smuzhiyun udelay(d);
131*4882a593Smuzhiyun }
132*4882a593Smuzhiyun
setsck(struct spi_device * s,int is_on)133*4882a593Smuzhiyun static inline void setsck(struct spi_device *s, int is_on)
134*4882a593Smuzhiyun {
135*4882a593Smuzhiyun struct spi_lm70llp *pp = spidev_to_pp(s);
136*4882a593Smuzhiyun
137*4882a593Smuzhiyun if (is_on)
138*4882a593Smuzhiyun clkHigh(pp);
139*4882a593Smuzhiyun else
140*4882a593Smuzhiyun clkLow(pp);
141*4882a593Smuzhiyun }
142*4882a593Smuzhiyun
setmosi(struct spi_device * s,int is_on)143*4882a593Smuzhiyun static inline void setmosi(struct spi_device *s, int is_on)
144*4882a593Smuzhiyun {
145*4882a593Smuzhiyun /* FIXME update D7 ... this way we can put the chip
146*4882a593Smuzhiyun * into shutdown mode and read the manufacturer ID,
147*4882a593Smuzhiyun * but we can't put it back into operational mode.
148*4882a593Smuzhiyun */
149*4882a593Smuzhiyun }
150*4882a593Smuzhiyun
151*4882a593Smuzhiyun /*
152*4882a593Smuzhiyun * getmiso:
153*4882a593Smuzhiyun * Why do we return 0 when the SIO line is high and vice-versa?
154*4882a593Smuzhiyun * The fact is, the lm70 eval board from NS (which this driver drives),
155*4882a593Smuzhiyun * is wired in just such a way : when the lm70's SIO goes high, a transistor
156*4882a593Smuzhiyun * switches it to low reflecting this on the parport (pin 13), and vice-versa.
157*4882a593Smuzhiyun */
getmiso(struct spi_device * s)158*4882a593Smuzhiyun static inline int getmiso(struct spi_device *s)
159*4882a593Smuzhiyun {
160*4882a593Smuzhiyun struct spi_lm70llp *pp = spidev_to_pp(s);
161*4882a593Smuzhiyun
162*4882a593Smuzhiyun return ((SIO == (parport_read_status(pp->port) & SIO)) ? 0 : 1);
163*4882a593Smuzhiyun }
164*4882a593Smuzhiyun
165*4882a593Smuzhiyun /*--------------------------------------------------------------------*/
166*4882a593Smuzhiyun
167*4882a593Smuzhiyun #include "spi-bitbang-txrx.h"
168*4882a593Smuzhiyun
lm70_chipselect(struct spi_device * spi,int value)169*4882a593Smuzhiyun static void lm70_chipselect(struct spi_device *spi, int value)
170*4882a593Smuzhiyun {
171*4882a593Smuzhiyun struct spi_lm70llp *pp = spidev_to_pp(spi);
172*4882a593Smuzhiyun
173*4882a593Smuzhiyun if (value)
174*4882a593Smuzhiyun assertCS(pp);
175*4882a593Smuzhiyun else
176*4882a593Smuzhiyun deassertCS(pp);
177*4882a593Smuzhiyun }
178*4882a593Smuzhiyun
179*4882a593Smuzhiyun /*
180*4882a593Smuzhiyun * Our actual bitbanger routine.
181*4882a593Smuzhiyun */
lm70_txrx(struct spi_device * spi,unsigned nsecs,u32 word,u8 bits,unsigned flags)182*4882a593Smuzhiyun static u32 lm70_txrx(struct spi_device *spi, unsigned nsecs, u32 word, u8 bits,
183*4882a593Smuzhiyun unsigned flags)
184*4882a593Smuzhiyun {
185*4882a593Smuzhiyun return bitbang_txrx_be_cpha0(spi, nsecs, 0, flags, word, bits);
186*4882a593Smuzhiyun }
187*4882a593Smuzhiyun
spi_lm70llp_attach(struct parport * p)188*4882a593Smuzhiyun static void spi_lm70llp_attach(struct parport *p)
189*4882a593Smuzhiyun {
190*4882a593Smuzhiyun struct pardevice *pd;
191*4882a593Smuzhiyun struct spi_lm70llp *pp;
192*4882a593Smuzhiyun struct spi_master *master;
193*4882a593Smuzhiyun int status;
194*4882a593Smuzhiyun struct pardev_cb lm70llp_cb;
195*4882a593Smuzhiyun
196*4882a593Smuzhiyun if (lm70llp) {
197*4882a593Smuzhiyun pr_warn("spi_lm70llp instance already loaded. Aborting.\n");
198*4882a593Smuzhiyun return;
199*4882a593Smuzhiyun }
200*4882a593Smuzhiyun
201*4882a593Smuzhiyun /* TODO: this just _assumes_ a lm70 is there ... no probe;
202*4882a593Smuzhiyun * the lm70 driver could verify it, reading the manf ID.
203*4882a593Smuzhiyun */
204*4882a593Smuzhiyun
205*4882a593Smuzhiyun master = spi_alloc_master(p->physport->dev, sizeof *pp);
206*4882a593Smuzhiyun if (!master) {
207*4882a593Smuzhiyun status = -ENOMEM;
208*4882a593Smuzhiyun goto out_fail;
209*4882a593Smuzhiyun }
210*4882a593Smuzhiyun pp = spi_master_get_devdata(master);
211*4882a593Smuzhiyun
212*4882a593Smuzhiyun /*
213*4882a593Smuzhiyun * SPI and bitbang hookup.
214*4882a593Smuzhiyun */
215*4882a593Smuzhiyun pp->bitbang.master = master;
216*4882a593Smuzhiyun pp->bitbang.chipselect = lm70_chipselect;
217*4882a593Smuzhiyun pp->bitbang.txrx_word[SPI_MODE_0] = lm70_txrx;
218*4882a593Smuzhiyun pp->bitbang.flags = SPI_3WIRE;
219*4882a593Smuzhiyun
220*4882a593Smuzhiyun /*
221*4882a593Smuzhiyun * Parport hookup
222*4882a593Smuzhiyun */
223*4882a593Smuzhiyun pp->port = p;
224*4882a593Smuzhiyun memset(&lm70llp_cb, 0, sizeof(lm70llp_cb));
225*4882a593Smuzhiyun lm70llp_cb.private = pp;
226*4882a593Smuzhiyun lm70llp_cb.flags = PARPORT_FLAG_EXCL;
227*4882a593Smuzhiyun pd = parport_register_dev_model(p, DRVNAME, &lm70llp_cb, 0);
228*4882a593Smuzhiyun
229*4882a593Smuzhiyun if (!pd) {
230*4882a593Smuzhiyun status = -ENOMEM;
231*4882a593Smuzhiyun goto out_free_master;
232*4882a593Smuzhiyun }
233*4882a593Smuzhiyun pp->pd = pd;
234*4882a593Smuzhiyun
235*4882a593Smuzhiyun status = parport_claim(pd);
236*4882a593Smuzhiyun if (status < 0)
237*4882a593Smuzhiyun goto out_parport_unreg;
238*4882a593Smuzhiyun
239*4882a593Smuzhiyun /*
240*4882a593Smuzhiyun * Start SPI ...
241*4882a593Smuzhiyun */
242*4882a593Smuzhiyun status = spi_bitbang_start(&pp->bitbang);
243*4882a593Smuzhiyun if (status < 0) {
244*4882a593Smuzhiyun dev_warn(&pd->dev, "spi_bitbang_start failed with status %d\n",
245*4882a593Smuzhiyun status);
246*4882a593Smuzhiyun goto out_off_and_release;
247*4882a593Smuzhiyun }
248*4882a593Smuzhiyun
249*4882a593Smuzhiyun /*
250*4882a593Smuzhiyun * The modalias name MUST match the device_driver name
251*4882a593Smuzhiyun * for the bus glue code to match and subsequently bind them.
252*4882a593Smuzhiyun * We are binding to the generic drivers/hwmon/lm70.c device
253*4882a593Smuzhiyun * driver.
254*4882a593Smuzhiyun */
255*4882a593Smuzhiyun strcpy(pp->info.modalias, "lm70");
256*4882a593Smuzhiyun pp->info.max_speed_hz = 6 * 1000 * 1000;
257*4882a593Smuzhiyun pp->info.chip_select = 0;
258*4882a593Smuzhiyun pp->info.mode = SPI_3WIRE | SPI_MODE_0;
259*4882a593Smuzhiyun
260*4882a593Smuzhiyun /* power up the chip, and let the LM70 control SI/SO */
261*4882a593Smuzhiyun parport_write_data(pp->port, lm70_INIT);
262*4882a593Smuzhiyun
263*4882a593Smuzhiyun /* Enable access to our primary data structure via
264*4882a593Smuzhiyun * the board info's (void *)controller_data.
265*4882a593Smuzhiyun */
266*4882a593Smuzhiyun pp->info.controller_data = pp;
267*4882a593Smuzhiyun pp->spidev_lm70 = spi_new_device(pp->bitbang.master, &pp->info);
268*4882a593Smuzhiyun if (pp->spidev_lm70)
269*4882a593Smuzhiyun dev_dbg(&pp->spidev_lm70->dev, "spidev_lm70 at %s\n",
270*4882a593Smuzhiyun dev_name(&pp->spidev_lm70->dev));
271*4882a593Smuzhiyun else {
272*4882a593Smuzhiyun dev_warn(&pd->dev, "spi_new_device failed\n");
273*4882a593Smuzhiyun status = -ENODEV;
274*4882a593Smuzhiyun goto out_bitbang_stop;
275*4882a593Smuzhiyun }
276*4882a593Smuzhiyun pp->spidev_lm70->bits_per_word = 8;
277*4882a593Smuzhiyun
278*4882a593Smuzhiyun lm70llp = pp;
279*4882a593Smuzhiyun return;
280*4882a593Smuzhiyun
281*4882a593Smuzhiyun out_bitbang_stop:
282*4882a593Smuzhiyun spi_bitbang_stop(&pp->bitbang);
283*4882a593Smuzhiyun out_off_and_release:
284*4882a593Smuzhiyun /* power down */
285*4882a593Smuzhiyun parport_write_data(pp->port, 0);
286*4882a593Smuzhiyun mdelay(10);
287*4882a593Smuzhiyun parport_release(pp->pd);
288*4882a593Smuzhiyun out_parport_unreg:
289*4882a593Smuzhiyun parport_unregister_device(pd);
290*4882a593Smuzhiyun out_free_master:
291*4882a593Smuzhiyun spi_master_put(master);
292*4882a593Smuzhiyun out_fail:
293*4882a593Smuzhiyun pr_info("spi_lm70llp probe fail, status %d\n", status);
294*4882a593Smuzhiyun }
295*4882a593Smuzhiyun
spi_lm70llp_detach(struct parport * p)296*4882a593Smuzhiyun static void spi_lm70llp_detach(struct parport *p)
297*4882a593Smuzhiyun {
298*4882a593Smuzhiyun struct spi_lm70llp *pp;
299*4882a593Smuzhiyun
300*4882a593Smuzhiyun if (!lm70llp || lm70llp->port != p)
301*4882a593Smuzhiyun return;
302*4882a593Smuzhiyun
303*4882a593Smuzhiyun pp = lm70llp;
304*4882a593Smuzhiyun spi_bitbang_stop(&pp->bitbang);
305*4882a593Smuzhiyun
306*4882a593Smuzhiyun /* power down */
307*4882a593Smuzhiyun parport_write_data(pp->port, 0);
308*4882a593Smuzhiyun
309*4882a593Smuzhiyun parport_release(pp->pd);
310*4882a593Smuzhiyun parport_unregister_device(pp->pd);
311*4882a593Smuzhiyun
312*4882a593Smuzhiyun spi_master_put(pp->bitbang.master);
313*4882a593Smuzhiyun
314*4882a593Smuzhiyun lm70llp = NULL;
315*4882a593Smuzhiyun }
316*4882a593Smuzhiyun
317*4882a593Smuzhiyun static struct parport_driver spi_lm70llp_drv = {
318*4882a593Smuzhiyun .name = DRVNAME,
319*4882a593Smuzhiyun .match_port = spi_lm70llp_attach,
320*4882a593Smuzhiyun .detach = spi_lm70llp_detach,
321*4882a593Smuzhiyun .devmodel = true,
322*4882a593Smuzhiyun };
323*4882a593Smuzhiyun
init_spi_lm70llp(void)324*4882a593Smuzhiyun static int __init init_spi_lm70llp(void)
325*4882a593Smuzhiyun {
326*4882a593Smuzhiyun return parport_register_driver(&spi_lm70llp_drv);
327*4882a593Smuzhiyun }
328*4882a593Smuzhiyun module_init(init_spi_lm70llp);
329*4882a593Smuzhiyun
cleanup_spi_lm70llp(void)330*4882a593Smuzhiyun static void __exit cleanup_spi_lm70llp(void)
331*4882a593Smuzhiyun {
332*4882a593Smuzhiyun parport_unregister_driver(&spi_lm70llp_drv);
333*4882a593Smuzhiyun }
334*4882a593Smuzhiyun module_exit(cleanup_spi_lm70llp);
335*4882a593Smuzhiyun
336*4882a593Smuzhiyun MODULE_AUTHOR("Kaiwan N Billimoria <kaiwan@designergraphix.com>");
337*4882a593Smuzhiyun MODULE_DESCRIPTION(
338*4882a593Smuzhiyun "Parport adapter for the National Semiconductor LM70 LLP eval board");
339*4882a593Smuzhiyun MODULE_LICENSE("GPL");
340