xref: /OK3568_Linux_fs/kernel/drivers/soundwire/generic_bandwidth_allocation.c (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun // SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause)
2*4882a593Smuzhiyun // Copyright(c) 2015-2020 Intel Corporation.
3*4882a593Smuzhiyun 
4*4882a593Smuzhiyun /*
5*4882a593Smuzhiyun  * Bandwidth management algorithm based on 2^n gears
6*4882a593Smuzhiyun  *
7*4882a593Smuzhiyun  */
8*4882a593Smuzhiyun 
9*4882a593Smuzhiyun #include <linux/device.h>
10*4882a593Smuzhiyun #include <linux/module.h>
11*4882a593Smuzhiyun #include <linux/mod_devicetable.h>
12*4882a593Smuzhiyun #include <linux/slab.h>
13*4882a593Smuzhiyun #include <linux/soundwire/sdw.h>
14*4882a593Smuzhiyun #include "bus.h"
15*4882a593Smuzhiyun 
16*4882a593Smuzhiyun #define SDW_STRM_RATE_GROUPING		1
17*4882a593Smuzhiyun 
18*4882a593Smuzhiyun struct sdw_group_params {
19*4882a593Smuzhiyun 	unsigned int rate;
20*4882a593Smuzhiyun 	int full_bw;
21*4882a593Smuzhiyun 	int payload_bw;
22*4882a593Smuzhiyun 	int hwidth;
23*4882a593Smuzhiyun };
24*4882a593Smuzhiyun 
25*4882a593Smuzhiyun struct sdw_group {
26*4882a593Smuzhiyun 	unsigned int count;
27*4882a593Smuzhiyun 	unsigned int max_size;
28*4882a593Smuzhiyun 	unsigned int *rates;
29*4882a593Smuzhiyun };
30*4882a593Smuzhiyun 
31*4882a593Smuzhiyun struct sdw_transport_data {
32*4882a593Smuzhiyun 	int hstart;
33*4882a593Smuzhiyun 	int hstop;
34*4882a593Smuzhiyun 	int block_offset;
35*4882a593Smuzhiyun 	int sub_block_offset;
36*4882a593Smuzhiyun };
37*4882a593Smuzhiyun 
sdw_compute_slave_ports(struct sdw_master_runtime * m_rt,struct sdw_transport_data * t_data)38*4882a593Smuzhiyun static void sdw_compute_slave_ports(struct sdw_master_runtime *m_rt,
39*4882a593Smuzhiyun 				    struct sdw_transport_data *t_data)
40*4882a593Smuzhiyun {
41*4882a593Smuzhiyun 	struct sdw_slave_runtime *s_rt = NULL;
42*4882a593Smuzhiyun 	struct sdw_port_runtime *p_rt;
43*4882a593Smuzhiyun 	int port_bo, sample_int;
44*4882a593Smuzhiyun 	unsigned int rate, bps, ch = 0;
45*4882a593Smuzhiyun 	unsigned int slave_total_ch;
46*4882a593Smuzhiyun 	struct sdw_bus_params *b_params = &m_rt->bus->params;
47*4882a593Smuzhiyun 
48*4882a593Smuzhiyun 	port_bo = t_data->block_offset;
49*4882a593Smuzhiyun 
50*4882a593Smuzhiyun 	list_for_each_entry(s_rt, &m_rt->slave_rt_list, m_rt_node) {
51*4882a593Smuzhiyun 		rate = m_rt->stream->params.rate;
52*4882a593Smuzhiyun 		bps = m_rt->stream->params.bps;
53*4882a593Smuzhiyun 		sample_int = (m_rt->bus->params.curr_dr_freq / rate);
54*4882a593Smuzhiyun 		slave_total_ch = 0;
55*4882a593Smuzhiyun 
56*4882a593Smuzhiyun 		list_for_each_entry(p_rt, &s_rt->port_list, port_node) {
57*4882a593Smuzhiyun 			ch = sdw_ch_mask_to_ch(p_rt->ch_mask);
58*4882a593Smuzhiyun 
59*4882a593Smuzhiyun 			sdw_fill_xport_params(&p_rt->transport_params,
60*4882a593Smuzhiyun 					      p_rt->num, false,
61*4882a593Smuzhiyun 					      SDW_BLK_GRP_CNT_1,
62*4882a593Smuzhiyun 					      sample_int, port_bo, port_bo >> 8,
63*4882a593Smuzhiyun 					      t_data->hstart,
64*4882a593Smuzhiyun 					      t_data->hstop,
65*4882a593Smuzhiyun 					      (SDW_BLK_GRP_CNT_1 * ch), 0x0);
66*4882a593Smuzhiyun 
67*4882a593Smuzhiyun 			sdw_fill_port_params(&p_rt->port_params,
68*4882a593Smuzhiyun 					     p_rt->num, bps,
69*4882a593Smuzhiyun 					     SDW_PORT_FLOW_MODE_ISOCH,
70*4882a593Smuzhiyun 					     b_params->s_data_mode);
71*4882a593Smuzhiyun 
72*4882a593Smuzhiyun 			port_bo += bps * ch;
73*4882a593Smuzhiyun 			slave_total_ch += ch;
74*4882a593Smuzhiyun 		}
75*4882a593Smuzhiyun 
76*4882a593Smuzhiyun 		if (m_rt->direction == SDW_DATA_DIR_TX &&
77*4882a593Smuzhiyun 		    m_rt->ch_count == slave_total_ch) {
78*4882a593Smuzhiyun 			/*
79*4882a593Smuzhiyun 			 * Slave devices were configured to access all channels
80*4882a593Smuzhiyun 			 * of the stream, which indicates that they operate in
81*4882a593Smuzhiyun 			 * 'mirror mode'. Make sure we reset the port offset for
82*4882a593Smuzhiyun 			 * the next device in the list
83*4882a593Smuzhiyun 			 */
84*4882a593Smuzhiyun 			port_bo = t_data->block_offset;
85*4882a593Smuzhiyun 		}
86*4882a593Smuzhiyun 	}
87*4882a593Smuzhiyun }
88*4882a593Smuzhiyun 
sdw_compute_master_ports(struct sdw_master_runtime * m_rt,struct sdw_group_params * params,int port_bo,int hstop)89*4882a593Smuzhiyun static void sdw_compute_master_ports(struct sdw_master_runtime *m_rt,
90*4882a593Smuzhiyun 				     struct sdw_group_params *params,
91*4882a593Smuzhiyun 				     int port_bo, int hstop)
92*4882a593Smuzhiyun {
93*4882a593Smuzhiyun 	struct sdw_transport_data t_data = {0};
94*4882a593Smuzhiyun 	struct sdw_port_runtime *p_rt;
95*4882a593Smuzhiyun 	struct sdw_bus *bus = m_rt->bus;
96*4882a593Smuzhiyun 	struct sdw_bus_params *b_params = &bus->params;
97*4882a593Smuzhiyun 	int sample_int, hstart = 0;
98*4882a593Smuzhiyun 	unsigned int rate, bps, ch, no_ch;
99*4882a593Smuzhiyun 
100*4882a593Smuzhiyun 	rate = m_rt->stream->params.rate;
101*4882a593Smuzhiyun 	bps = m_rt->stream->params.bps;
102*4882a593Smuzhiyun 	ch = m_rt->ch_count;
103*4882a593Smuzhiyun 	sample_int = (bus->params.curr_dr_freq / rate);
104*4882a593Smuzhiyun 
105*4882a593Smuzhiyun 	if (rate != params->rate)
106*4882a593Smuzhiyun 		return;
107*4882a593Smuzhiyun 
108*4882a593Smuzhiyun 	t_data.hstop = hstop;
109*4882a593Smuzhiyun 	hstart = hstop - params->hwidth + 1;
110*4882a593Smuzhiyun 	t_data.hstart = hstart;
111*4882a593Smuzhiyun 
112*4882a593Smuzhiyun 	list_for_each_entry(p_rt, &m_rt->port_list, port_node) {
113*4882a593Smuzhiyun 		no_ch = sdw_ch_mask_to_ch(p_rt->ch_mask);
114*4882a593Smuzhiyun 
115*4882a593Smuzhiyun 		sdw_fill_xport_params(&p_rt->transport_params, p_rt->num,
116*4882a593Smuzhiyun 				      false, SDW_BLK_GRP_CNT_1, sample_int,
117*4882a593Smuzhiyun 				      port_bo, port_bo >> 8, hstart, hstop,
118*4882a593Smuzhiyun 				      (SDW_BLK_GRP_CNT_1 * no_ch), 0x0);
119*4882a593Smuzhiyun 
120*4882a593Smuzhiyun 		sdw_fill_port_params(&p_rt->port_params,
121*4882a593Smuzhiyun 				     p_rt->num, bps,
122*4882a593Smuzhiyun 				     SDW_PORT_FLOW_MODE_ISOCH,
123*4882a593Smuzhiyun 				     b_params->m_data_mode);
124*4882a593Smuzhiyun 
125*4882a593Smuzhiyun 		/* Check for first entry */
126*4882a593Smuzhiyun 		if (!(p_rt == list_first_entry(&m_rt->port_list,
127*4882a593Smuzhiyun 					       struct sdw_port_runtime,
128*4882a593Smuzhiyun 					       port_node))) {
129*4882a593Smuzhiyun 			port_bo += bps * ch;
130*4882a593Smuzhiyun 			continue;
131*4882a593Smuzhiyun 		}
132*4882a593Smuzhiyun 
133*4882a593Smuzhiyun 		t_data.hstart = hstart;
134*4882a593Smuzhiyun 		t_data.hstop = hstop;
135*4882a593Smuzhiyun 		t_data.block_offset = port_bo;
136*4882a593Smuzhiyun 		t_data.sub_block_offset = 0;
137*4882a593Smuzhiyun 		port_bo += bps * ch;
138*4882a593Smuzhiyun 	}
139*4882a593Smuzhiyun 
140*4882a593Smuzhiyun 	sdw_compute_slave_ports(m_rt, &t_data);
141*4882a593Smuzhiyun }
142*4882a593Smuzhiyun 
_sdw_compute_port_params(struct sdw_bus * bus,struct sdw_group_params * params,int count)143*4882a593Smuzhiyun static void _sdw_compute_port_params(struct sdw_bus *bus,
144*4882a593Smuzhiyun 				     struct sdw_group_params *params, int count)
145*4882a593Smuzhiyun {
146*4882a593Smuzhiyun 	struct sdw_master_runtime *m_rt = NULL;
147*4882a593Smuzhiyun 	int hstop = bus->params.col - 1;
148*4882a593Smuzhiyun 	int block_offset, port_bo, i;
149*4882a593Smuzhiyun 
150*4882a593Smuzhiyun 	/* Run loop for all groups to compute transport parameters */
151*4882a593Smuzhiyun 	for (i = 0; i < count; i++) {
152*4882a593Smuzhiyun 		port_bo = 1;
153*4882a593Smuzhiyun 		block_offset = 1;
154*4882a593Smuzhiyun 
155*4882a593Smuzhiyun 		list_for_each_entry(m_rt, &bus->m_rt_list, bus_node) {
156*4882a593Smuzhiyun 			sdw_compute_master_ports(m_rt, &params[i],
157*4882a593Smuzhiyun 						 port_bo, hstop);
158*4882a593Smuzhiyun 
159*4882a593Smuzhiyun 			block_offset += m_rt->ch_count *
160*4882a593Smuzhiyun 					m_rt->stream->params.bps;
161*4882a593Smuzhiyun 			port_bo = block_offset;
162*4882a593Smuzhiyun 		}
163*4882a593Smuzhiyun 
164*4882a593Smuzhiyun 		hstop = hstop - params[i].hwidth;
165*4882a593Smuzhiyun 	}
166*4882a593Smuzhiyun }
167*4882a593Smuzhiyun 
sdw_compute_group_params(struct sdw_bus * bus,struct sdw_group_params * params,int * rates,int count)168*4882a593Smuzhiyun static int sdw_compute_group_params(struct sdw_bus *bus,
169*4882a593Smuzhiyun 				    struct sdw_group_params *params,
170*4882a593Smuzhiyun 				    int *rates, int count)
171*4882a593Smuzhiyun {
172*4882a593Smuzhiyun 	struct sdw_master_runtime *m_rt = NULL;
173*4882a593Smuzhiyun 	int sel_col = bus->params.col;
174*4882a593Smuzhiyun 	unsigned int rate, bps, ch;
175*4882a593Smuzhiyun 	int i, column_needed = 0;
176*4882a593Smuzhiyun 
177*4882a593Smuzhiyun 	/* Calculate bandwidth per group */
178*4882a593Smuzhiyun 	for (i = 0; i < count; i++) {
179*4882a593Smuzhiyun 		params[i].rate = rates[i];
180*4882a593Smuzhiyun 		params[i].full_bw = bus->params.curr_dr_freq / params[i].rate;
181*4882a593Smuzhiyun 	}
182*4882a593Smuzhiyun 
183*4882a593Smuzhiyun 	list_for_each_entry(m_rt, &bus->m_rt_list, bus_node) {
184*4882a593Smuzhiyun 		rate = m_rt->stream->params.rate;
185*4882a593Smuzhiyun 		bps = m_rt->stream->params.bps;
186*4882a593Smuzhiyun 		ch = m_rt->ch_count;
187*4882a593Smuzhiyun 
188*4882a593Smuzhiyun 		for (i = 0; i < count; i++) {
189*4882a593Smuzhiyun 			if (rate == params[i].rate)
190*4882a593Smuzhiyun 				params[i].payload_bw += bps * ch;
191*4882a593Smuzhiyun 		}
192*4882a593Smuzhiyun 	}
193*4882a593Smuzhiyun 
194*4882a593Smuzhiyun 	for (i = 0; i < count; i++) {
195*4882a593Smuzhiyun 		params[i].hwidth = (sel_col *
196*4882a593Smuzhiyun 			params[i].payload_bw + params[i].full_bw - 1) /
197*4882a593Smuzhiyun 			params[i].full_bw;
198*4882a593Smuzhiyun 
199*4882a593Smuzhiyun 		column_needed += params[i].hwidth;
200*4882a593Smuzhiyun 	}
201*4882a593Smuzhiyun 
202*4882a593Smuzhiyun 	if (column_needed > sel_col - 1)
203*4882a593Smuzhiyun 		return -EINVAL;
204*4882a593Smuzhiyun 
205*4882a593Smuzhiyun 	return 0;
206*4882a593Smuzhiyun }
207*4882a593Smuzhiyun 
sdw_add_element_group_count(struct sdw_group * group,unsigned int rate)208*4882a593Smuzhiyun static int sdw_add_element_group_count(struct sdw_group *group,
209*4882a593Smuzhiyun 				       unsigned int rate)
210*4882a593Smuzhiyun {
211*4882a593Smuzhiyun 	int num = group->count;
212*4882a593Smuzhiyun 	int i;
213*4882a593Smuzhiyun 
214*4882a593Smuzhiyun 	for (i = 0; i <= num; i++) {
215*4882a593Smuzhiyun 		if (rate == group->rates[i])
216*4882a593Smuzhiyun 			break;
217*4882a593Smuzhiyun 
218*4882a593Smuzhiyun 		if (i != num)
219*4882a593Smuzhiyun 			continue;
220*4882a593Smuzhiyun 
221*4882a593Smuzhiyun 		if (group->count >= group->max_size) {
222*4882a593Smuzhiyun 			unsigned int *rates;
223*4882a593Smuzhiyun 
224*4882a593Smuzhiyun 			group->max_size += 1;
225*4882a593Smuzhiyun 			rates = krealloc(group->rates,
226*4882a593Smuzhiyun 					 (sizeof(int) * group->max_size),
227*4882a593Smuzhiyun 					 GFP_KERNEL);
228*4882a593Smuzhiyun 			if (!rates)
229*4882a593Smuzhiyun 				return -ENOMEM;
230*4882a593Smuzhiyun 			group->rates = rates;
231*4882a593Smuzhiyun 		}
232*4882a593Smuzhiyun 
233*4882a593Smuzhiyun 		group->rates[group->count++] = rate;
234*4882a593Smuzhiyun 	}
235*4882a593Smuzhiyun 
236*4882a593Smuzhiyun 	return 0;
237*4882a593Smuzhiyun }
238*4882a593Smuzhiyun 
sdw_get_group_count(struct sdw_bus * bus,struct sdw_group * group)239*4882a593Smuzhiyun static int sdw_get_group_count(struct sdw_bus *bus,
240*4882a593Smuzhiyun 			       struct sdw_group *group)
241*4882a593Smuzhiyun {
242*4882a593Smuzhiyun 	struct sdw_master_runtime *m_rt;
243*4882a593Smuzhiyun 	unsigned int rate;
244*4882a593Smuzhiyun 	int ret = 0;
245*4882a593Smuzhiyun 
246*4882a593Smuzhiyun 	group->count = 0;
247*4882a593Smuzhiyun 	group->max_size = SDW_STRM_RATE_GROUPING;
248*4882a593Smuzhiyun 	group->rates = kcalloc(group->max_size, sizeof(int), GFP_KERNEL);
249*4882a593Smuzhiyun 	if (!group->rates)
250*4882a593Smuzhiyun 		return -ENOMEM;
251*4882a593Smuzhiyun 
252*4882a593Smuzhiyun 	list_for_each_entry(m_rt, &bus->m_rt_list, bus_node) {
253*4882a593Smuzhiyun 		rate = m_rt->stream->params.rate;
254*4882a593Smuzhiyun 		if (m_rt == list_first_entry(&bus->m_rt_list,
255*4882a593Smuzhiyun 					     struct sdw_master_runtime,
256*4882a593Smuzhiyun 					     bus_node)) {
257*4882a593Smuzhiyun 			group->rates[group->count++] = rate;
258*4882a593Smuzhiyun 
259*4882a593Smuzhiyun 		} else {
260*4882a593Smuzhiyun 			ret = sdw_add_element_group_count(group, rate);
261*4882a593Smuzhiyun 			if (ret < 0) {
262*4882a593Smuzhiyun 				kfree(group->rates);
263*4882a593Smuzhiyun 				return ret;
264*4882a593Smuzhiyun 			}
265*4882a593Smuzhiyun 		}
266*4882a593Smuzhiyun 	}
267*4882a593Smuzhiyun 
268*4882a593Smuzhiyun 	return ret;
269*4882a593Smuzhiyun }
270*4882a593Smuzhiyun 
271*4882a593Smuzhiyun /**
272*4882a593Smuzhiyun  * sdw_compute_port_params: Compute transport and port parameters
273*4882a593Smuzhiyun  *
274*4882a593Smuzhiyun  * @bus: SDW Bus instance
275*4882a593Smuzhiyun  */
sdw_compute_port_params(struct sdw_bus * bus)276*4882a593Smuzhiyun static int sdw_compute_port_params(struct sdw_bus *bus)
277*4882a593Smuzhiyun {
278*4882a593Smuzhiyun 	struct sdw_group_params *params = NULL;
279*4882a593Smuzhiyun 	struct sdw_group group;
280*4882a593Smuzhiyun 	int ret;
281*4882a593Smuzhiyun 
282*4882a593Smuzhiyun 	ret = sdw_get_group_count(bus, &group);
283*4882a593Smuzhiyun 	if (ret < 0)
284*4882a593Smuzhiyun 		return ret;
285*4882a593Smuzhiyun 
286*4882a593Smuzhiyun 	if (group.count == 0)
287*4882a593Smuzhiyun 		goto out;
288*4882a593Smuzhiyun 
289*4882a593Smuzhiyun 	params = kcalloc(group.count, sizeof(*params), GFP_KERNEL);
290*4882a593Smuzhiyun 	if (!params) {
291*4882a593Smuzhiyun 		ret = -ENOMEM;
292*4882a593Smuzhiyun 		goto out;
293*4882a593Smuzhiyun 	}
294*4882a593Smuzhiyun 
295*4882a593Smuzhiyun 	/* Compute transport parameters for grouped streams */
296*4882a593Smuzhiyun 	ret = sdw_compute_group_params(bus, params,
297*4882a593Smuzhiyun 				       &group.rates[0], group.count);
298*4882a593Smuzhiyun 	if (ret < 0)
299*4882a593Smuzhiyun 		goto free_params;
300*4882a593Smuzhiyun 
301*4882a593Smuzhiyun 	_sdw_compute_port_params(bus, params, group.count);
302*4882a593Smuzhiyun 
303*4882a593Smuzhiyun free_params:
304*4882a593Smuzhiyun 	kfree(params);
305*4882a593Smuzhiyun out:
306*4882a593Smuzhiyun 	kfree(group.rates);
307*4882a593Smuzhiyun 
308*4882a593Smuzhiyun 	return ret;
309*4882a593Smuzhiyun }
310*4882a593Smuzhiyun 
sdw_select_row_col(struct sdw_bus * bus,int clk_freq)311*4882a593Smuzhiyun static int sdw_select_row_col(struct sdw_bus *bus, int clk_freq)
312*4882a593Smuzhiyun {
313*4882a593Smuzhiyun 	struct sdw_master_prop *prop = &bus->prop;
314*4882a593Smuzhiyun 	int frame_int, frame_freq;
315*4882a593Smuzhiyun 	int r, c;
316*4882a593Smuzhiyun 
317*4882a593Smuzhiyun 	for (c = 0; c < SDW_FRAME_COLS; c++) {
318*4882a593Smuzhiyun 		for (r = 0; r < SDW_FRAME_ROWS; r++) {
319*4882a593Smuzhiyun 			if (sdw_rows[r] != prop->default_row ||
320*4882a593Smuzhiyun 			    sdw_cols[c] != prop->default_col)
321*4882a593Smuzhiyun 				continue;
322*4882a593Smuzhiyun 
323*4882a593Smuzhiyun 			frame_int = sdw_rows[r] * sdw_cols[c];
324*4882a593Smuzhiyun 			frame_freq = clk_freq / frame_int;
325*4882a593Smuzhiyun 
326*4882a593Smuzhiyun 			if ((clk_freq - (frame_freq * SDW_FRAME_CTRL_BITS)) <
327*4882a593Smuzhiyun 			    bus->params.bandwidth)
328*4882a593Smuzhiyun 				continue;
329*4882a593Smuzhiyun 
330*4882a593Smuzhiyun 			bus->params.row = sdw_rows[r];
331*4882a593Smuzhiyun 			bus->params.col = sdw_cols[c];
332*4882a593Smuzhiyun 			return 0;
333*4882a593Smuzhiyun 		}
334*4882a593Smuzhiyun 	}
335*4882a593Smuzhiyun 
336*4882a593Smuzhiyun 	return -EINVAL;
337*4882a593Smuzhiyun }
338*4882a593Smuzhiyun 
339*4882a593Smuzhiyun /**
340*4882a593Smuzhiyun  * sdw_compute_bus_params: Compute bus parameters
341*4882a593Smuzhiyun  *
342*4882a593Smuzhiyun  * @bus: SDW Bus instance
343*4882a593Smuzhiyun  */
sdw_compute_bus_params(struct sdw_bus * bus)344*4882a593Smuzhiyun static int sdw_compute_bus_params(struct sdw_bus *bus)
345*4882a593Smuzhiyun {
346*4882a593Smuzhiyun 	unsigned int max_dr_freq, curr_dr_freq = 0;
347*4882a593Smuzhiyun 	struct sdw_master_prop *mstr_prop = &bus->prop;
348*4882a593Smuzhiyun 	int i, clk_values, ret;
349*4882a593Smuzhiyun 	bool is_gear = false;
350*4882a593Smuzhiyun 	u32 *clk_buf;
351*4882a593Smuzhiyun 
352*4882a593Smuzhiyun 	if (mstr_prop->num_clk_gears) {
353*4882a593Smuzhiyun 		clk_values = mstr_prop->num_clk_gears;
354*4882a593Smuzhiyun 		clk_buf = mstr_prop->clk_gears;
355*4882a593Smuzhiyun 		is_gear = true;
356*4882a593Smuzhiyun 	} else if (mstr_prop->num_clk_freq) {
357*4882a593Smuzhiyun 		clk_values = mstr_prop->num_clk_freq;
358*4882a593Smuzhiyun 		clk_buf = mstr_prop->clk_freq;
359*4882a593Smuzhiyun 	} else {
360*4882a593Smuzhiyun 		clk_values = 1;
361*4882a593Smuzhiyun 		clk_buf = NULL;
362*4882a593Smuzhiyun 	}
363*4882a593Smuzhiyun 
364*4882a593Smuzhiyun 	max_dr_freq = mstr_prop->max_clk_freq * SDW_DOUBLE_RATE_FACTOR;
365*4882a593Smuzhiyun 
366*4882a593Smuzhiyun 	for (i = 0; i < clk_values; i++) {
367*4882a593Smuzhiyun 		if (!clk_buf)
368*4882a593Smuzhiyun 			curr_dr_freq = max_dr_freq;
369*4882a593Smuzhiyun 		else
370*4882a593Smuzhiyun 			curr_dr_freq = (is_gear) ?
371*4882a593Smuzhiyun 				(max_dr_freq >>  clk_buf[i]) :
372*4882a593Smuzhiyun 				clk_buf[i] * SDW_DOUBLE_RATE_FACTOR;
373*4882a593Smuzhiyun 
374*4882a593Smuzhiyun 		if (curr_dr_freq <= bus->params.bandwidth)
375*4882a593Smuzhiyun 			continue;
376*4882a593Smuzhiyun 
377*4882a593Smuzhiyun 		break;
378*4882a593Smuzhiyun 
379*4882a593Smuzhiyun 		/*
380*4882a593Smuzhiyun 		 * TODO: Check all the Slave(s) port(s) audio modes and find
381*4882a593Smuzhiyun 		 * whether given clock rate is supported with glitchless
382*4882a593Smuzhiyun 		 * transition.
383*4882a593Smuzhiyun 		 */
384*4882a593Smuzhiyun 	}
385*4882a593Smuzhiyun 
386*4882a593Smuzhiyun 	if (i == clk_values)
387*4882a593Smuzhiyun 		return -EINVAL;
388*4882a593Smuzhiyun 
389*4882a593Smuzhiyun 	ret = sdw_select_row_col(bus, curr_dr_freq);
390*4882a593Smuzhiyun 	if (ret < 0)
391*4882a593Smuzhiyun 		return -EINVAL;
392*4882a593Smuzhiyun 
393*4882a593Smuzhiyun 	bus->params.curr_dr_freq = curr_dr_freq;
394*4882a593Smuzhiyun 	return 0;
395*4882a593Smuzhiyun }
396*4882a593Smuzhiyun 
397*4882a593Smuzhiyun /**
398*4882a593Smuzhiyun  * sdw_compute_params: Compute bus, transport and port parameters
399*4882a593Smuzhiyun  *
400*4882a593Smuzhiyun  * @bus: SDW Bus instance
401*4882a593Smuzhiyun  */
sdw_compute_params(struct sdw_bus * bus)402*4882a593Smuzhiyun int sdw_compute_params(struct sdw_bus *bus)
403*4882a593Smuzhiyun {
404*4882a593Smuzhiyun 	int ret;
405*4882a593Smuzhiyun 
406*4882a593Smuzhiyun 	/* Computes clock frequency, frame shape and frame frequency */
407*4882a593Smuzhiyun 	ret = sdw_compute_bus_params(bus);
408*4882a593Smuzhiyun 	if (ret < 0) {
409*4882a593Smuzhiyun 		dev_err(bus->dev, "Compute bus params failed: %d", ret);
410*4882a593Smuzhiyun 		return ret;
411*4882a593Smuzhiyun 	}
412*4882a593Smuzhiyun 
413*4882a593Smuzhiyun 	/* Compute transport and port params */
414*4882a593Smuzhiyun 	ret = sdw_compute_port_params(bus);
415*4882a593Smuzhiyun 	if (ret < 0) {
416*4882a593Smuzhiyun 		dev_err(bus->dev, "Compute transport params failed: %d", ret);
417*4882a593Smuzhiyun 		return ret;
418*4882a593Smuzhiyun 	}
419*4882a593Smuzhiyun 
420*4882a593Smuzhiyun 	return 0;
421*4882a593Smuzhiyun }
422*4882a593Smuzhiyun EXPORT_SYMBOL(sdw_compute_params);
423*4882a593Smuzhiyun 
424*4882a593Smuzhiyun MODULE_LICENSE("Dual BSD/GPL");
425*4882a593Smuzhiyun MODULE_DESCRIPTION("SoundWire Generic Bandwidth Allocation");
426