xref: /OK3568_Linux_fs/kernel/drivers/soc/zte/zx296718_pm_domains.c (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0-only
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun  * Copyright (C) 2017 ZTE Ltd.
4*4882a593Smuzhiyun  *
5*4882a593Smuzhiyun  * Author: Baoyou Xie <baoyou.xie@linaro.org>
6*4882a593Smuzhiyun  */
7*4882a593Smuzhiyun 
8*4882a593Smuzhiyun #include <dt-bindings/soc/zte,pm_domains.h>
9*4882a593Smuzhiyun #include "zx2967_pm_domains.h"
10*4882a593Smuzhiyun 
11*4882a593Smuzhiyun static u16 zx296718_offsets[REG_ARRAY_SIZE] = {
12*4882a593Smuzhiyun 	[REG_CLKEN] = 0x18,
13*4882a593Smuzhiyun 	[REG_ISOEN] = 0x1c,
14*4882a593Smuzhiyun 	[REG_RSTEN] = 0x20,
15*4882a593Smuzhiyun 	[REG_PWREN] = 0x24,
16*4882a593Smuzhiyun 	[REG_ACK_SYNC] = 0x28,
17*4882a593Smuzhiyun };
18*4882a593Smuzhiyun 
19*4882a593Smuzhiyun enum {
20*4882a593Smuzhiyun 	PCU_DM_VOU = 0,
21*4882a593Smuzhiyun 	PCU_DM_SAPPU,
22*4882a593Smuzhiyun 	PCU_DM_VDE,
23*4882a593Smuzhiyun 	PCU_DM_VCE,
24*4882a593Smuzhiyun 	PCU_DM_HDE,
25*4882a593Smuzhiyun 	PCU_DM_VIU,
26*4882a593Smuzhiyun 	PCU_DM_USB20,
27*4882a593Smuzhiyun 	PCU_DM_USB21,
28*4882a593Smuzhiyun 	PCU_DM_USB30,
29*4882a593Smuzhiyun 	PCU_DM_HSIC,
30*4882a593Smuzhiyun 	PCU_DM_GMAC,
31*4882a593Smuzhiyun 	PCU_DM_TS,
32*4882a593Smuzhiyun };
33*4882a593Smuzhiyun 
34*4882a593Smuzhiyun static struct zx2967_pm_domain vou_domain = {
35*4882a593Smuzhiyun 	.dm = {
36*4882a593Smuzhiyun 		.name		= "vou_domain",
37*4882a593Smuzhiyun 	},
38*4882a593Smuzhiyun 	.bit = PCU_DM_VOU,
39*4882a593Smuzhiyun 	.polarity = PWREN,
40*4882a593Smuzhiyun 	.reg_offset = zx296718_offsets,
41*4882a593Smuzhiyun };
42*4882a593Smuzhiyun 
43*4882a593Smuzhiyun static struct zx2967_pm_domain sappu_domain = {
44*4882a593Smuzhiyun 	.dm = {
45*4882a593Smuzhiyun 		.name		= "sappu_domain",
46*4882a593Smuzhiyun 	},
47*4882a593Smuzhiyun 	.bit = PCU_DM_SAPPU,
48*4882a593Smuzhiyun 	.polarity = PWREN,
49*4882a593Smuzhiyun 	.reg_offset = zx296718_offsets,
50*4882a593Smuzhiyun };
51*4882a593Smuzhiyun 
52*4882a593Smuzhiyun static struct zx2967_pm_domain vde_domain = {
53*4882a593Smuzhiyun 	.dm = {
54*4882a593Smuzhiyun 		.name		= "vde_domain",
55*4882a593Smuzhiyun 	},
56*4882a593Smuzhiyun 	.bit = PCU_DM_VDE,
57*4882a593Smuzhiyun 	.polarity = PWREN,
58*4882a593Smuzhiyun 	.reg_offset = zx296718_offsets,
59*4882a593Smuzhiyun };
60*4882a593Smuzhiyun 
61*4882a593Smuzhiyun static struct zx2967_pm_domain vce_domain = {
62*4882a593Smuzhiyun 	.dm = {
63*4882a593Smuzhiyun 		.name		= "vce_domain",
64*4882a593Smuzhiyun 	},
65*4882a593Smuzhiyun 	.bit = PCU_DM_VCE,
66*4882a593Smuzhiyun 	.polarity = PWREN,
67*4882a593Smuzhiyun 	.reg_offset = zx296718_offsets,
68*4882a593Smuzhiyun };
69*4882a593Smuzhiyun 
70*4882a593Smuzhiyun static struct zx2967_pm_domain hde_domain = {
71*4882a593Smuzhiyun 	.dm = {
72*4882a593Smuzhiyun 		.name		= "hde_domain",
73*4882a593Smuzhiyun 	},
74*4882a593Smuzhiyun 	.bit = PCU_DM_HDE,
75*4882a593Smuzhiyun 	.polarity = PWREN,
76*4882a593Smuzhiyun 	.reg_offset = zx296718_offsets,
77*4882a593Smuzhiyun };
78*4882a593Smuzhiyun 
79*4882a593Smuzhiyun static struct zx2967_pm_domain viu_domain = {
80*4882a593Smuzhiyun 	.dm = {
81*4882a593Smuzhiyun 		.name		= "viu_domain",
82*4882a593Smuzhiyun 	},
83*4882a593Smuzhiyun 	.bit = PCU_DM_VIU,
84*4882a593Smuzhiyun 	.polarity = PWREN,
85*4882a593Smuzhiyun 	.reg_offset = zx296718_offsets,
86*4882a593Smuzhiyun };
87*4882a593Smuzhiyun 
88*4882a593Smuzhiyun static struct zx2967_pm_domain usb20_domain = {
89*4882a593Smuzhiyun 	.dm = {
90*4882a593Smuzhiyun 		.name		= "usb20_domain",
91*4882a593Smuzhiyun 	},
92*4882a593Smuzhiyun 	.bit = PCU_DM_USB20,
93*4882a593Smuzhiyun 	.polarity = PWREN,
94*4882a593Smuzhiyun 	.reg_offset = zx296718_offsets,
95*4882a593Smuzhiyun };
96*4882a593Smuzhiyun 
97*4882a593Smuzhiyun static struct zx2967_pm_domain usb21_domain = {
98*4882a593Smuzhiyun 	.dm = {
99*4882a593Smuzhiyun 		.name		= "usb21_domain",
100*4882a593Smuzhiyun 	},
101*4882a593Smuzhiyun 	.bit = PCU_DM_USB21,
102*4882a593Smuzhiyun 	.polarity = PWREN,
103*4882a593Smuzhiyun 	.reg_offset = zx296718_offsets,
104*4882a593Smuzhiyun };
105*4882a593Smuzhiyun 
106*4882a593Smuzhiyun static struct zx2967_pm_domain usb30_domain = {
107*4882a593Smuzhiyun 	.dm = {
108*4882a593Smuzhiyun 		.name		= "usb30_domain",
109*4882a593Smuzhiyun 	},
110*4882a593Smuzhiyun 	.bit = PCU_DM_USB30,
111*4882a593Smuzhiyun 	.polarity = PWREN,
112*4882a593Smuzhiyun 	.reg_offset = zx296718_offsets,
113*4882a593Smuzhiyun };
114*4882a593Smuzhiyun 
115*4882a593Smuzhiyun static struct zx2967_pm_domain hsic_domain = {
116*4882a593Smuzhiyun 	.dm = {
117*4882a593Smuzhiyun 		.name		= "hsic_domain",
118*4882a593Smuzhiyun 	},
119*4882a593Smuzhiyun 	.bit = PCU_DM_HSIC,
120*4882a593Smuzhiyun 	.polarity = PWREN,
121*4882a593Smuzhiyun 	.reg_offset = zx296718_offsets,
122*4882a593Smuzhiyun };
123*4882a593Smuzhiyun 
124*4882a593Smuzhiyun static struct zx2967_pm_domain gmac_domain = {
125*4882a593Smuzhiyun 	.dm = {
126*4882a593Smuzhiyun 		.name		= "gmac_domain",
127*4882a593Smuzhiyun 	},
128*4882a593Smuzhiyun 	.bit = PCU_DM_GMAC,
129*4882a593Smuzhiyun 	.polarity = PWREN,
130*4882a593Smuzhiyun 	.reg_offset = zx296718_offsets,
131*4882a593Smuzhiyun };
132*4882a593Smuzhiyun 
133*4882a593Smuzhiyun static struct zx2967_pm_domain ts_domain = {
134*4882a593Smuzhiyun 	.dm = {
135*4882a593Smuzhiyun 		.name		= "ts_domain",
136*4882a593Smuzhiyun 	},
137*4882a593Smuzhiyun 	.bit = PCU_DM_TS,
138*4882a593Smuzhiyun 	.polarity = PWREN,
139*4882a593Smuzhiyun 	.reg_offset = zx296718_offsets,
140*4882a593Smuzhiyun };
141*4882a593Smuzhiyun 
142*4882a593Smuzhiyun static struct generic_pm_domain *zx296718_pm_domains[] = {
143*4882a593Smuzhiyun 	[DM_ZX296718_VOU] = &vou_domain.dm,
144*4882a593Smuzhiyun 	[DM_ZX296718_SAPPU] = &sappu_domain.dm,
145*4882a593Smuzhiyun 	[DM_ZX296718_VDE] = &vde_domain.dm,
146*4882a593Smuzhiyun 	[DM_ZX296718_VCE] = &vce_domain.dm,
147*4882a593Smuzhiyun 	[DM_ZX296718_HDE] = &hde_domain.dm,
148*4882a593Smuzhiyun 	[DM_ZX296718_VIU] = &viu_domain.dm,
149*4882a593Smuzhiyun 	[DM_ZX296718_USB20] = &usb20_domain.dm,
150*4882a593Smuzhiyun 	[DM_ZX296718_USB21] = &usb21_domain.dm,
151*4882a593Smuzhiyun 	[DM_ZX296718_USB30] = &usb30_domain.dm,
152*4882a593Smuzhiyun 	[DM_ZX296718_HSIC] = &hsic_domain.dm,
153*4882a593Smuzhiyun 	[DM_ZX296718_GMAC] = &gmac_domain.dm,
154*4882a593Smuzhiyun 	[DM_ZX296718_TS] = &ts_domain.dm,
155*4882a593Smuzhiyun };
156*4882a593Smuzhiyun 
zx296718_pd_probe(struct platform_device * pdev)157*4882a593Smuzhiyun static int zx296718_pd_probe(struct platform_device *pdev)
158*4882a593Smuzhiyun {
159*4882a593Smuzhiyun 	return zx2967_pd_probe(pdev,
160*4882a593Smuzhiyun 			  zx296718_pm_domains,
161*4882a593Smuzhiyun 			  ARRAY_SIZE(zx296718_pm_domains));
162*4882a593Smuzhiyun }
163*4882a593Smuzhiyun 
164*4882a593Smuzhiyun static const struct of_device_id zx296718_pm_domain_matches[] = {
165*4882a593Smuzhiyun 	{ .compatible = "zte,zx296718-pcu", },
166*4882a593Smuzhiyun 	{ },
167*4882a593Smuzhiyun };
168*4882a593Smuzhiyun 
169*4882a593Smuzhiyun static struct platform_driver zx296718_pd_driver = {
170*4882a593Smuzhiyun 	.driver = {
171*4882a593Smuzhiyun 		.name = "zx296718-powerdomain",
172*4882a593Smuzhiyun 		.of_match_table = zx296718_pm_domain_matches,
173*4882a593Smuzhiyun 	},
174*4882a593Smuzhiyun 	.probe = zx296718_pd_probe,
175*4882a593Smuzhiyun };
176*4882a593Smuzhiyun 
zx296718_pd_init(void)177*4882a593Smuzhiyun static int __init zx296718_pd_init(void)
178*4882a593Smuzhiyun {
179*4882a593Smuzhiyun 	return platform_driver_register(&zx296718_pd_driver);
180*4882a593Smuzhiyun }
181*4882a593Smuzhiyun subsys_initcall(zx296718_pd_init);
182