1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0-only
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun * Copyright (C) 2014 Linaro Ltd.
4*4882a593Smuzhiyun *
5*4882a593Smuzhiyun * Author: Linus Walleij <linus.walleij@linaro.org>
6*4882a593Smuzhiyun */
7*4882a593Smuzhiyun #include <linux/init.h>
8*4882a593Smuzhiyun #include <linux/io.h>
9*4882a593Smuzhiyun #include <linux/slab.h>
10*4882a593Smuzhiyun #include <linux/sys_soc.h>
11*4882a593Smuzhiyun #include <linux/platform_device.h>
12*4882a593Smuzhiyun #include <linux/mfd/syscon.h>
13*4882a593Smuzhiyun #include <linux/regmap.h>
14*4882a593Smuzhiyun #include <linux/of.h>
15*4882a593Smuzhiyun
16*4882a593Smuzhiyun #define INTEGRATOR_HDR_ID_OFFSET 0x00
17*4882a593Smuzhiyun
18*4882a593Smuzhiyun static u32 integrator_coreid;
19*4882a593Smuzhiyun
20*4882a593Smuzhiyun static const struct of_device_id integrator_cm_match[] = {
21*4882a593Smuzhiyun { .compatible = "arm,core-module-integrator", },
22*4882a593Smuzhiyun { }
23*4882a593Smuzhiyun };
24*4882a593Smuzhiyun
integrator_arch_str(u32 id)25*4882a593Smuzhiyun static const char *integrator_arch_str(u32 id)
26*4882a593Smuzhiyun {
27*4882a593Smuzhiyun switch ((id >> 16) & 0xff) {
28*4882a593Smuzhiyun case 0x00:
29*4882a593Smuzhiyun return "ASB little-endian";
30*4882a593Smuzhiyun case 0x01:
31*4882a593Smuzhiyun return "AHB little-endian";
32*4882a593Smuzhiyun case 0x03:
33*4882a593Smuzhiyun return "AHB-Lite system bus, bi-endian";
34*4882a593Smuzhiyun case 0x04:
35*4882a593Smuzhiyun return "AHB";
36*4882a593Smuzhiyun case 0x08:
37*4882a593Smuzhiyun return "AHB system bus, ASB processor bus";
38*4882a593Smuzhiyun default:
39*4882a593Smuzhiyun return "Unknown";
40*4882a593Smuzhiyun }
41*4882a593Smuzhiyun }
42*4882a593Smuzhiyun
integrator_fpga_str(u32 id)43*4882a593Smuzhiyun static const char *integrator_fpga_str(u32 id)
44*4882a593Smuzhiyun {
45*4882a593Smuzhiyun switch ((id >> 12) & 0xf) {
46*4882a593Smuzhiyun case 0x01:
47*4882a593Smuzhiyun return "XC4062";
48*4882a593Smuzhiyun case 0x02:
49*4882a593Smuzhiyun return "XC4085";
50*4882a593Smuzhiyun case 0x03:
51*4882a593Smuzhiyun return "XVC600";
52*4882a593Smuzhiyun case 0x04:
53*4882a593Smuzhiyun return "EPM7256AE (Altera PLD)";
54*4882a593Smuzhiyun default:
55*4882a593Smuzhiyun return "Unknown";
56*4882a593Smuzhiyun }
57*4882a593Smuzhiyun }
58*4882a593Smuzhiyun
59*4882a593Smuzhiyun static ssize_t
manufacturer_show(struct device * dev,struct device_attribute * attr,char * buf)60*4882a593Smuzhiyun manufacturer_show(struct device *dev, struct device_attribute *attr, char *buf)
61*4882a593Smuzhiyun {
62*4882a593Smuzhiyun return sprintf(buf, "%02x\n", integrator_coreid >> 24);
63*4882a593Smuzhiyun }
64*4882a593Smuzhiyun
65*4882a593Smuzhiyun static DEVICE_ATTR_RO(manufacturer);
66*4882a593Smuzhiyun
67*4882a593Smuzhiyun static ssize_t
arch_show(struct device * dev,struct device_attribute * attr,char * buf)68*4882a593Smuzhiyun arch_show(struct device *dev, struct device_attribute *attr, char *buf)
69*4882a593Smuzhiyun {
70*4882a593Smuzhiyun return sprintf(buf, "%s\n", integrator_arch_str(integrator_coreid));
71*4882a593Smuzhiyun }
72*4882a593Smuzhiyun
73*4882a593Smuzhiyun static DEVICE_ATTR_RO(arch);
74*4882a593Smuzhiyun
75*4882a593Smuzhiyun static ssize_t
fpga_show(struct device * dev,struct device_attribute * attr,char * buf)76*4882a593Smuzhiyun fpga_show(struct device *dev, struct device_attribute *attr, char *buf)
77*4882a593Smuzhiyun {
78*4882a593Smuzhiyun return sprintf(buf, "%s\n", integrator_fpga_str(integrator_coreid));
79*4882a593Smuzhiyun }
80*4882a593Smuzhiyun
81*4882a593Smuzhiyun static DEVICE_ATTR_RO(fpga);
82*4882a593Smuzhiyun
83*4882a593Smuzhiyun static ssize_t
build_show(struct device * dev,struct device_attribute * attr,char * buf)84*4882a593Smuzhiyun build_show(struct device *dev, struct device_attribute *attr, char *buf)
85*4882a593Smuzhiyun {
86*4882a593Smuzhiyun return sprintf(buf, "%02x\n", (integrator_coreid >> 4) & 0xFF);
87*4882a593Smuzhiyun }
88*4882a593Smuzhiyun
89*4882a593Smuzhiyun static DEVICE_ATTR_RO(build);
90*4882a593Smuzhiyun
91*4882a593Smuzhiyun static struct attribute *integrator_attrs[] = {
92*4882a593Smuzhiyun &dev_attr_manufacturer.attr,
93*4882a593Smuzhiyun &dev_attr_arch.attr,
94*4882a593Smuzhiyun &dev_attr_fpga.attr,
95*4882a593Smuzhiyun &dev_attr_build.attr,
96*4882a593Smuzhiyun NULL
97*4882a593Smuzhiyun };
98*4882a593Smuzhiyun
99*4882a593Smuzhiyun ATTRIBUTE_GROUPS(integrator);
100*4882a593Smuzhiyun
integrator_soc_init(void)101*4882a593Smuzhiyun static int __init integrator_soc_init(void)
102*4882a593Smuzhiyun {
103*4882a593Smuzhiyun struct regmap *syscon_regmap;
104*4882a593Smuzhiyun struct soc_device *soc_dev;
105*4882a593Smuzhiyun struct soc_device_attribute *soc_dev_attr;
106*4882a593Smuzhiyun struct device_node *np;
107*4882a593Smuzhiyun struct device *dev;
108*4882a593Smuzhiyun u32 val;
109*4882a593Smuzhiyun int ret;
110*4882a593Smuzhiyun
111*4882a593Smuzhiyun np = of_find_matching_node(NULL, integrator_cm_match);
112*4882a593Smuzhiyun if (!np)
113*4882a593Smuzhiyun return -ENODEV;
114*4882a593Smuzhiyun
115*4882a593Smuzhiyun syscon_regmap = syscon_node_to_regmap(np);
116*4882a593Smuzhiyun if (IS_ERR(syscon_regmap))
117*4882a593Smuzhiyun return PTR_ERR(syscon_regmap);
118*4882a593Smuzhiyun
119*4882a593Smuzhiyun ret = regmap_read(syscon_regmap, INTEGRATOR_HDR_ID_OFFSET,
120*4882a593Smuzhiyun &val);
121*4882a593Smuzhiyun if (ret)
122*4882a593Smuzhiyun return -ENODEV;
123*4882a593Smuzhiyun integrator_coreid = val;
124*4882a593Smuzhiyun
125*4882a593Smuzhiyun soc_dev_attr = kzalloc(sizeof(*soc_dev_attr), GFP_KERNEL);
126*4882a593Smuzhiyun if (!soc_dev_attr)
127*4882a593Smuzhiyun return -ENOMEM;
128*4882a593Smuzhiyun
129*4882a593Smuzhiyun soc_dev_attr->soc_id = "Integrator";
130*4882a593Smuzhiyun soc_dev_attr->machine = "Integrator";
131*4882a593Smuzhiyun soc_dev_attr->family = "Versatile";
132*4882a593Smuzhiyun soc_dev_attr->custom_attr_group = integrator_groups[0];
133*4882a593Smuzhiyun soc_dev = soc_device_register(soc_dev_attr);
134*4882a593Smuzhiyun if (IS_ERR(soc_dev)) {
135*4882a593Smuzhiyun kfree(soc_dev_attr);
136*4882a593Smuzhiyun return -ENODEV;
137*4882a593Smuzhiyun }
138*4882a593Smuzhiyun dev = soc_device_to_device(soc_dev);
139*4882a593Smuzhiyun
140*4882a593Smuzhiyun dev_info(dev, "Detected ARM core module:\n");
141*4882a593Smuzhiyun dev_info(dev, " Manufacturer: %02x\n", (val >> 24));
142*4882a593Smuzhiyun dev_info(dev, " Architecture: %s\n", integrator_arch_str(val));
143*4882a593Smuzhiyun dev_info(dev, " FPGA: %s\n", integrator_fpga_str(val));
144*4882a593Smuzhiyun dev_info(dev, " Build: %02x\n", (val >> 4) & 0xFF);
145*4882a593Smuzhiyun dev_info(dev, " Rev: %c\n", ('A' + (val & 0x03)));
146*4882a593Smuzhiyun
147*4882a593Smuzhiyun return 0;
148*4882a593Smuzhiyun }
149*4882a593Smuzhiyun device_initcall(integrator_soc_init);
150