1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun * Texas Instruments' K3 Interrupt Aggregator MSI bus
4*4882a593Smuzhiyun *
5*4882a593Smuzhiyun * Copyright (C) 2018-2019 Texas Instruments Incorporated - http://www.ti.com/
6*4882a593Smuzhiyun * Lokesh Vutla <lokeshvutla@ti.com>
7*4882a593Smuzhiyun */
8*4882a593Smuzhiyun
9*4882a593Smuzhiyun #include <linux/irq.h>
10*4882a593Smuzhiyun #include <linux/irqdomain.h>
11*4882a593Smuzhiyun #include <linux/msi.h>
12*4882a593Smuzhiyun #include <linux/of_address.h>
13*4882a593Smuzhiyun #include <linux/of_device.h>
14*4882a593Smuzhiyun #include <linux/of_irq.h>
15*4882a593Smuzhiyun #include <linux/soc/ti/ti_sci_inta_msi.h>
16*4882a593Smuzhiyun #include <linux/soc/ti/ti_sci_protocol.h>
17*4882a593Smuzhiyun
ti_sci_inta_msi_write_msg(struct irq_data * data,struct msi_msg * msg)18*4882a593Smuzhiyun static void ti_sci_inta_msi_write_msg(struct irq_data *data,
19*4882a593Smuzhiyun struct msi_msg *msg)
20*4882a593Smuzhiyun {
21*4882a593Smuzhiyun /* Nothing to do */
22*4882a593Smuzhiyun }
23*4882a593Smuzhiyun
ti_sci_inta_msi_compose_msi_msg(struct irq_data * data,struct msi_msg * msg)24*4882a593Smuzhiyun static void ti_sci_inta_msi_compose_msi_msg(struct irq_data *data,
25*4882a593Smuzhiyun struct msi_msg *msg)
26*4882a593Smuzhiyun {
27*4882a593Smuzhiyun /* Nothing to do */
28*4882a593Smuzhiyun }
29*4882a593Smuzhiyun
ti_sci_inta_msi_update_chip_ops(struct msi_domain_info * info)30*4882a593Smuzhiyun static void ti_sci_inta_msi_update_chip_ops(struct msi_domain_info *info)
31*4882a593Smuzhiyun {
32*4882a593Smuzhiyun struct irq_chip *chip = info->chip;
33*4882a593Smuzhiyun
34*4882a593Smuzhiyun if (WARN_ON(!chip))
35*4882a593Smuzhiyun return;
36*4882a593Smuzhiyun
37*4882a593Smuzhiyun chip->irq_request_resources = irq_chip_request_resources_parent;
38*4882a593Smuzhiyun chip->irq_release_resources = irq_chip_release_resources_parent;
39*4882a593Smuzhiyun chip->irq_compose_msi_msg = ti_sci_inta_msi_compose_msi_msg;
40*4882a593Smuzhiyun chip->irq_write_msi_msg = ti_sci_inta_msi_write_msg;
41*4882a593Smuzhiyun chip->irq_set_type = irq_chip_set_type_parent;
42*4882a593Smuzhiyun chip->irq_unmask = irq_chip_unmask_parent;
43*4882a593Smuzhiyun chip->irq_mask = irq_chip_mask_parent;
44*4882a593Smuzhiyun chip->irq_ack = irq_chip_ack_parent;
45*4882a593Smuzhiyun }
46*4882a593Smuzhiyun
ti_sci_inta_msi_create_irq_domain(struct fwnode_handle * fwnode,struct msi_domain_info * info,struct irq_domain * parent)47*4882a593Smuzhiyun struct irq_domain *ti_sci_inta_msi_create_irq_domain(struct fwnode_handle *fwnode,
48*4882a593Smuzhiyun struct msi_domain_info *info,
49*4882a593Smuzhiyun struct irq_domain *parent)
50*4882a593Smuzhiyun {
51*4882a593Smuzhiyun struct irq_domain *domain;
52*4882a593Smuzhiyun
53*4882a593Smuzhiyun ti_sci_inta_msi_update_chip_ops(info);
54*4882a593Smuzhiyun
55*4882a593Smuzhiyun domain = msi_create_irq_domain(fwnode, info, parent);
56*4882a593Smuzhiyun if (domain)
57*4882a593Smuzhiyun irq_domain_update_bus_token(domain, DOMAIN_BUS_TI_SCI_INTA_MSI);
58*4882a593Smuzhiyun
59*4882a593Smuzhiyun return domain;
60*4882a593Smuzhiyun }
61*4882a593Smuzhiyun EXPORT_SYMBOL_GPL(ti_sci_inta_msi_create_irq_domain);
62*4882a593Smuzhiyun
ti_sci_inta_msi_free_descs(struct device * dev)63*4882a593Smuzhiyun static void ti_sci_inta_msi_free_descs(struct device *dev)
64*4882a593Smuzhiyun {
65*4882a593Smuzhiyun struct msi_desc *desc, *tmp;
66*4882a593Smuzhiyun
67*4882a593Smuzhiyun list_for_each_entry_safe(desc, tmp, dev_to_msi_list(dev), list) {
68*4882a593Smuzhiyun list_del(&desc->list);
69*4882a593Smuzhiyun free_msi_entry(desc);
70*4882a593Smuzhiyun }
71*4882a593Smuzhiyun }
72*4882a593Smuzhiyun
ti_sci_inta_msi_alloc_descs(struct device * dev,struct ti_sci_resource * res)73*4882a593Smuzhiyun static int ti_sci_inta_msi_alloc_descs(struct device *dev,
74*4882a593Smuzhiyun struct ti_sci_resource *res)
75*4882a593Smuzhiyun {
76*4882a593Smuzhiyun struct msi_desc *msi_desc;
77*4882a593Smuzhiyun int set, i, count = 0;
78*4882a593Smuzhiyun
79*4882a593Smuzhiyun for (set = 0; set < res->sets; set++) {
80*4882a593Smuzhiyun for (i = 0; i < res->desc[set].num; i++) {
81*4882a593Smuzhiyun msi_desc = alloc_msi_entry(dev, 1, NULL);
82*4882a593Smuzhiyun if (!msi_desc) {
83*4882a593Smuzhiyun ti_sci_inta_msi_free_descs(dev);
84*4882a593Smuzhiyun return -ENOMEM;
85*4882a593Smuzhiyun }
86*4882a593Smuzhiyun
87*4882a593Smuzhiyun msi_desc->inta.dev_index = res->desc[set].start + i;
88*4882a593Smuzhiyun INIT_LIST_HEAD(&msi_desc->list);
89*4882a593Smuzhiyun list_add_tail(&msi_desc->list, dev_to_msi_list(dev));
90*4882a593Smuzhiyun count++;
91*4882a593Smuzhiyun }
92*4882a593Smuzhiyun }
93*4882a593Smuzhiyun
94*4882a593Smuzhiyun return count;
95*4882a593Smuzhiyun }
96*4882a593Smuzhiyun
ti_sci_inta_msi_domain_alloc_irqs(struct device * dev,struct ti_sci_resource * res)97*4882a593Smuzhiyun int ti_sci_inta_msi_domain_alloc_irqs(struct device *dev,
98*4882a593Smuzhiyun struct ti_sci_resource *res)
99*4882a593Smuzhiyun {
100*4882a593Smuzhiyun struct platform_device *pdev = to_platform_device(dev);
101*4882a593Smuzhiyun struct irq_domain *msi_domain;
102*4882a593Smuzhiyun int ret, nvec;
103*4882a593Smuzhiyun
104*4882a593Smuzhiyun msi_domain = dev_get_msi_domain(dev);
105*4882a593Smuzhiyun if (!msi_domain)
106*4882a593Smuzhiyun return -EINVAL;
107*4882a593Smuzhiyun
108*4882a593Smuzhiyun if (pdev->id < 0)
109*4882a593Smuzhiyun return -ENODEV;
110*4882a593Smuzhiyun
111*4882a593Smuzhiyun nvec = ti_sci_inta_msi_alloc_descs(dev, res);
112*4882a593Smuzhiyun if (nvec <= 0)
113*4882a593Smuzhiyun return nvec;
114*4882a593Smuzhiyun
115*4882a593Smuzhiyun ret = msi_domain_alloc_irqs(msi_domain, dev, nvec);
116*4882a593Smuzhiyun if (ret) {
117*4882a593Smuzhiyun dev_err(dev, "Failed to allocate IRQs %d\n", ret);
118*4882a593Smuzhiyun goto cleanup;
119*4882a593Smuzhiyun }
120*4882a593Smuzhiyun
121*4882a593Smuzhiyun return 0;
122*4882a593Smuzhiyun
123*4882a593Smuzhiyun cleanup:
124*4882a593Smuzhiyun ti_sci_inta_msi_free_descs(&pdev->dev);
125*4882a593Smuzhiyun return ret;
126*4882a593Smuzhiyun }
127*4882a593Smuzhiyun EXPORT_SYMBOL_GPL(ti_sci_inta_msi_domain_alloc_irqs);
128*4882a593Smuzhiyun
ti_sci_inta_msi_domain_free_irqs(struct device * dev)129*4882a593Smuzhiyun void ti_sci_inta_msi_domain_free_irqs(struct device *dev)
130*4882a593Smuzhiyun {
131*4882a593Smuzhiyun msi_domain_free_irqs(dev->msi_domain, dev);
132*4882a593Smuzhiyun ti_sci_inta_msi_free_descs(dev);
133*4882a593Smuzhiyun }
134*4882a593Smuzhiyun EXPORT_SYMBOL_GPL(ti_sci_inta_msi_domain_free_irqs);
135*4882a593Smuzhiyun
ti_sci_inta_msi_get_virq(struct device * dev,u32 dev_index)136*4882a593Smuzhiyun unsigned int ti_sci_inta_msi_get_virq(struct device *dev, u32 dev_index)
137*4882a593Smuzhiyun {
138*4882a593Smuzhiyun struct msi_desc *desc;
139*4882a593Smuzhiyun
140*4882a593Smuzhiyun for_each_msi_entry(desc, dev)
141*4882a593Smuzhiyun if (desc->inta.dev_index == dev_index)
142*4882a593Smuzhiyun return desc->irq;
143*4882a593Smuzhiyun
144*4882a593Smuzhiyun return -ENODEV;
145*4882a593Smuzhiyun }
146*4882a593Smuzhiyun EXPORT_SYMBOL_GPL(ti_sci_inta_msi_get_virq);
147