xref: /OK3568_Linux_fs/kernel/drivers/soc/ti/pruss.c (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0-only
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun  * PRU-ICSS platform driver for various TI SoCs
4*4882a593Smuzhiyun  *
5*4882a593Smuzhiyun  * Copyright (C) 2014-2020 Texas Instruments Incorporated - http://www.ti.com/
6*4882a593Smuzhiyun  * Author(s):
7*4882a593Smuzhiyun  *	Suman Anna <s-anna@ti.com>
8*4882a593Smuzhiyun  *	Andrew F. Davis <afd@ti.com>
9*4882a593Smuzhiyun  */
10*4882a593Smuzhiyun 
11*4882a593Smuzhiyun #include <linux/clk-provider.h>
12*4882a593Smuzhiyun #include <linux/dma-mapping.h>
13*4882a593Smuzhiyun #include <linux/io.h>
14*4882a593Smuzhiyun #include <linux/mfd/syscon.h>
15*4882a593Smuzhiyun #include <linux/module.h>
16*4882a593Smuzhiyun #include <linux/of_address.h>
17*4882a593Smuzhiyun #include <linux/of_device.h>
18*4882a593Smuzhiyun #include <linux/pm_runtime.h>
19*4882a593Smuzhiyun #include <linux/pruss_driver.h>
20*4882a593Smuzhiyun #include <linux/regmap.h>
21*4882a593Smuzhiyun #include <linux/slab.h>
22*4882a593Smuzhiyun 
23*4882a593Smuzhiyun /**
24*4882a593Smuzhiyun  * struct pruss_private_data - PRUSS driver private data
25*4882a593Smuzhiyun  * @has_no_sharedram: flag to indicate the absence of PRUSS Shared Data RAM
26*4882a593Smuzhiyun  * @has_core_mux_clock: flag to indicate the presence of PRUSS core clock
27*4882a593Smuzhiyun  */
28*4882a593Smuzhiyun struct pruss_private_data {
29*4882a593Smuzhiyun 	bool has_no_sharedram;
30*4882a593Smuzhiyun 	bool has_core_mux_clock;
31*4882a593Smuzhiyun };
32*4882a593Smuzhiyun 
pruss_of_free_clk_provider(void * data)33*4882a593Smuzhiyun static void pruss_of_free_clk_provider(void *data)
34*4882a593Smuzhiyun {
35*4882a593Smuzhiyun 	struct device_node *clk_mux_np = data;
36*4882a593Smuzhiyun 
37*4882a593Smuzhiyun 	of_clk_del_provider(clk_mux_np);
38*4882a593Smuzhiyun 	of_node_put(clk_mux_np);
39*4882a593Smuzhiyun }
40*4882a593Smuzhiyun 
pruss_clk_mux_setup(struct pruss * pruss,struct clk * clk_mux,char * mux_name,struct device_node * clks_np)41*4882a593Smuzhiyun static int pruss_clk_mux_setup(struct pruss *pruss, struct clk *clk_mux,
42*4882a593Smuzhiyun 			       char *mux_name, struct device_node *clks_np)
43*4882a593Smuzhiyun {
44*4882a593Smuzhiyun 	struct device_node *clk_mux_np;
45*4882a593Smuzhiyun 	struct device *dev = pruss->dev;
46*4882a593Smuzhiyun 	char *clk_mux_name;
47*4882a593Smuzhiyun 	unsigned int num_parents;
48*4882a593Smuzhiyun 	const char **parent_names;
49*4882a593Smuzhiyun 	void __iomem *reg;
50*4882a593Smuzhiyun 	u32 reg_offset;
51*4882a593Smuzhiyun 	int ret;
52*4882a593Smuzhiyun 
53*4882a593Smuzhiyun 	clk_mux_np = of_get_child_by_name(clks_np, mux_name);
54*4882a593Smuzhiyun 	if (!clk_mux_np) {
55*4882a593Smuzhiyun 		dev_err(dev, "%pOF is missing its '%s' node\n", clks_np,
56*4882a593Smuzhiyun 			mux_name);
57*4882a593Smuzhiyun 		return -ENODEV;
58*4882a593Smuzhiyun 	}
59*4882a593Smuzhiyun 
60*4882a593Smuzhiyun 	num_parents = of_clk_get_parent_count(clk_mux_np);
61*4882a593Smuzhiyun 	if (num_parents < 1) {
62*4882a593Smuzhiyun 		dev_err(dev, "mux-clock %pOF must have parents\n", clk_mux_np);
63*4882a593Smuzhiyun 		ret = -EINVAL;
64*4882a593Smuzhiyun 		goto put_clk_mux_np;
65*4882a593Smuzhiyun 	}
66*4882a593Smuzhiyun 
67*4882a593Smuzhiyun 	parent_names = devm_kcalloc(dev, sizeof(*parent_names), num_parents,
68*4882a593Smuzhiyun 				    GFP_KERNEL);
69*4882a593Smuzhiyun 	if (!parent_names) {
70*4882a593Smuzhiyun 		ret = -ENOMEM;
71*4882a593Smuzhiyun 		goto put_clk_mux_np;
72*4882a593Smuzhiyun 	}
73*4882a593Smuzhiyun 
74*4882a593Smuzhiyun 	of_clk_parent_fill(clk_mux_np, parent_names, num_parents);
75*4882a593Smuzhiyun 
76*4882a593Smuzhiyun 	clk_mux_name = devm_kasprintf(dev, GFP_KERNEL, "%s.%pOFn",
77*4882a593Smuzhiyun 				      dev_name(dev), clk_mux_np);
78*4882a593Smuzhiyun 	if (!clk_mux_name) {
79*4882a593Smuzhiyun 		ret = -ENOMEM;
80*4882a593Smuzhiyun 		goto put_clk_mux_np;
81*4882a593Smuzhiyun 	}
82*4882a593Smuzhiyun 
83*4882a593Smuzhiyun 	ret = of_property_read_u32(clk_mux_np, "reg", &reg_offset);
84*4882a593Smuzhiyun 	if (ret)
85*4882a593Smuzhiyun 		goto put_clk_mux_np;
86*4882a593Smuzhiyun 
87*4882a593Smuzhiyun 	reg = pruss->cfg_base + reg_offset;
88*4882a593Smuzhiyun 
89*4882a593Smuzhiyun 	clk_mux = clk_register_mux(NULL, clk_mux_name, parent_names,
90*4882a593Smuzhiyun 				   num_parents, 0, reg, 0, 1, 0, NULL);
91*4882a593Smuzhiyun 	if (IS_ERR(clk_mux)) {
92*4882a593Smuzhiyun 		ret = PTR_ERR(clk_mux);
93*4882a593Smuzhiyun 		goto put_clk_mux_np;
94*4882a593Smuzhiyun 	}
95*4882a593Smuzhiyun 
96*4882a593Smuzhiyun 	ret = devm_add_action_or_reset(dev, (void(*)(void *))clk_unregister_mux,
97*4882a593Smuzhiyun 				       clk_mux);
98*4882a593Smuzhiyun 	if (ret) {
99*4882a593Smuzhiyun 		dev_err(dev, "failed to add clkmux unregister action %d", ret);
100*4882a593Smuzhiyun 		goto put_clk_mux_np;
101*4882a593Smuzhiyun 	}
102*4882a593Smuzhiyun 
103*4882a593Smuzhiyun 	ret = of_clk_add_provider(clk_mux_np, of_clk_src_simple_get, clk_mux);
104*4882a593Smuzhiyun 	if (ret)
105*4882a593Smuzhiyun 		goto put_clk_mux_np;
106*4882a593Smuzhiyun 
107*4882a593Smuzhiyun 	ret = devm_add_action_or_reset(dev, pruss_of_free_clk_provider,
108*4882a593Smuzhiyun 				       clk_mux_np);
109*4882a593Smuzhiyun 	if (ret) {
110*4882a593Smuzhiyun 		dev_err(dev, "failed to add clkmux free action %d", ret);
111*4882a593Smuzhiyun 		goto put_clk_mux_np;
112*4882a593Smuzhiyun 	}
113*4882a593Smuzhiyun 
114*4882a593Smuzhiyun 	return 0;
115*4882a593Smuzhiyun 
116*4882a593Smuzhiyun put_clk_mux_np:
117*4882a593Smuzhiyun 	of_node_put(clk_mux_np);
118*4882a593Smuzhiyun 	return ret;
119*4882a593Smuzhiyun }
120*4882a593Smuzhiyun 
pruss_clk_init(struct pruss * pruss,struct device_node * cfg_node)121*4882a593Smuzhiyun static int pruss_clk_init(struct pruss *pruss, struct device_node *cfg_node)
122*4882a593Smuzhiyun {
123*4882a593Smuzhiyun 	const struct pruss_private_data *data;
124*4882a593Smuzhiyun 	struct device_node *clks_np;
125*4882a593Smuzhiyun 	struct device *dev = pruss->dev;
126*4882a593Smuzhiyun 	int ret = 0;
127*4882a593Smuzhiyun 
128*4882a593Smuzhiyun 	data = of_device_get_match_data(dev);
129*4882a593Smuzhiyun 	if (IS_ERR(data))
130*4882a593Smuzhiyun 		return -ENODEV;
131*4882a593Smuzhiyun 
132*4882a593Smuzhiyun 	clks_np = of_get_child_by_name(cfg_node, "clocks");
133*4882a593Smuzhiyun 	if (!clks_np) {
134*4882a593Smuzhiyun 		dev_err(dev, "%pOF is missing its 'clocks' node\n", cfg_node);
135*4882a593Smuzhiyun 		return -ENODEV;
136*4882a593Smuzhiyun 	}
137*4882a593Smuzhiyun 
138*4882a593Smuzhiyun 	if (data && data->has_core_mux_clock) {
139*4882a593Smuzhiyun 		ret = pruss_clk_mux_setup(pruss, pruss->core_clk_mux,
140*4882a593Smuzhiyun 					  "coreclk-mux", clks_np);
141*4882a593Smuzhiyun 		if (ret) {
142*4882a593Smuzhiyun 			dev_err(dev, "failed to setup coreclk-mux\n");
143*4882a593Smuzhiyun 			goto put_clks_node;
144*4882a593Smuzhiyun 		}
145*4882a593Smuzhiyun 	}
146*4882a593Smuzhiyun 
147*4882a593Smuzhiyun 	ret = pruss_clk_mux_setup(pruss, pruss->iep_clk_mux, "iepclk-mux",
148*4882a593Smuzhiyun 				  clks_np);
149*4882a593Smuzhiyun 	if (ret) {
150*4882a593Smuzhiyun 		dev_err(dev, "failed to setup iepclk-mux\n");
151*4882a593Smuzhiyun 		goto put_clks_node;
152*4882a593Smuzhiyun 	}
153*4882a593Smuzhiyun 
154*4882a593Smuzhiyun put_clks_node:
155*4882a593Smuzhiyun 	of_node_put(clks_np);
156*4882a593Smuzhiyun 
157*4882a593Smuzhiyun 	return ret;
158*4882a593Smuzhiyun }
159*4882a593Smuzhiyun 
160*4882a593Smuzhiyun static struct regmap_config regmap_conf = {
161*4882a593Smuzhiyun 	.reg_bits = 32,
162*4882a593Smuzhiyun 	.val_bits = 32,
163*4882a593Smuzhiyun 	.reg_stride = 4,
164*4882a593Smuzhiyun };
165*4882a593Smuzhiyun 
pruss_probe(struct platform_device * pdev)166*4882a593Smuzhiyun static int pruss_probe(struct platform_device *pdev)
167*4882a593Smuzhiyun {
168*4882a593Smuzhiyun 	struct device *dev = &pdev->dev;
169*4882a593Smuzhiyun 	struct device_node *np = dev_of_node(dev);
170*4882a593Smuzhiyun 	struct device_node *child;
171*4882a593Smuzhiyun 	struct pruss *pruss;
172*4882a593Smuzhiyun 	struct resource res;
173*4882a593Smuzhiyun 	int ret, i, index;
174*4882a593Smuzhiyun 	const struct pruss_private_data *data;
175*4882a593Smuzhiyun 	const char *mem_names[PRUSS_MEM_MAX] = { "dram0", "dram1", "shrdram2" };
176*4882a593Smuzhiyun 
177*4882a593Smuzhiyun 	data = of_device_get_match_data(&pdev->dev);
178*4882a593Smuzhiyun 	if (IS_ERR(data)) {
179*4882a593Smuzhiyun 		dev_err(dev, "missing private data\n");
180*4882a593Smuzhiyun 		return -ENODEV;
181*4882a593Smuzhiyun 	}
182*4882a593Smuzhiyun 
183*4882a593Smuzhiyun 	ret = dma_set_coherent_mask(dev, DMA_BIT_MASK(32));
184*4882a593Smuzhiyun 	if (ret) {
185*4882a593Smuzhiyun 		dev_err(dev, "failed to set the DMA coherent mask");
186*4882a593Smuzhiyun 		return ret;
187*4882a593Smuzhiyun 	}
188*4882a593Smuzhiyun 
189*4882a593Smuzhiyun 	pruss = devm_kzalloc(dev, sizeof(*pruss), GFP_KERNEL);
190*4882a593Smuzhiyun 	if (!pruss)
191*4882a593Smuzhiyun 		return -ENOMEM;
192*4882a593Smuzhiyun 
193*4882a593Smuzhiyun 	pruss->dev = dev;
194*4882a593Smuzhiyun 
195*4882a593Smuzhiyun 	child = of_get_child_by_name(np, "memories");
196*4882a593Smuzhiyun 	if (!child) {
197*4882a593Smuzhiyun 		dev_err(dev, "%pOF is missing its 'memories' node\n", child);
198*4882a593Smuzhiyun 		return -ENODEV;
199*4882a593Smuzhiyun 	}
200*4882a593Smuzhiyun 
201*4882a593Smuzhiyun 	for (i = 0; i < PRUSS_MEM_MAX; i++) {
202*4882a593Smuzhiyun 		/*
203*4882a593Smuzhiyun 		 * On AM437x one of two PRUSS units don't contain Shared RAM,
204*4882a593Smuzhiyun 		 * skip it
205*4882a593Smuzhiyun 		 */
206*4882a593Smuzhiyun 		if (data && data->has_no_sharedram && i == PRUSS_MEM_SHRD_RAM2)
207*4882a593Smuzhiyun 			continue;
208*4882a593Smuzhiyun 
209*4882a593Smuzhiyun 		index = of_property_match_string(child, "reg-names",
210*4882a593Smuzhiyun 						 mem_names[i]);
211*4882a593Smuzhiyun 		if (index < 0) {
212*4882a593Smuzhiyun 			of_node_put(child);
213*4882a593Smuzhiyun 			return index;
214*4882a593Smuzhiyun 		}
215*4882a593Smuzhiyun 
216*4882a593Smuzhiyun 		if (of_address_to_resource(child, index, &res)) {
217*4882a593Smuzhiyun 			of_node_put(child);
218*4882a593Smuzhiyun 			return -EINVAL;
219*4882a593Smuzhiyun 		}
220*4882a593Smuzhiyun 
221*4882a593Smuzhiyun 		pruss->mem_regions[i].va = devm_ioremap(dev, res.start,
222*4882a593Smuzhiyun 							resource_size(&res));
223*4882a593Smuzhiyun 		if (!pruss->mem_regions[i].va) {
224*4882a593Smuzhiyun 			dev_err(dev, "failed to parse and map memory resource %d %s\n",
225*4882a593Smuzhiyun 				i, mem_names[i]);
226*4882a593Smuzhiyun 			of_node_put(child);
227*4882a593Smuzhiyun 			return -ENOMEM;
228*4882a593Smuzhiyun 		}
229*4882a593Smuzhiyun 		pruss->mem_regions[i].pa = res.start;
230*4882a593Smuzhiyun 		pruss->mem_regions[i].size = resource_size(&res);
231*4882a593Smuzhiyun 
232*4882a593Smuzhiyun 		dev_dbg(dev, "memory %8s: pa %pa size 0x%zx va %pK\n",
233*4882a593Smuzhiyun 			mem_names[i], &pruss->mem_regions[i].pa,
234*4882a593Smuzhiyun 			pruss->mem_regions[i].size, pruss->mem_regions[i].va);
235*4882a593Smuzhiyun 	}
236*4882a593Smuzhiyun 	of_node_put(child);
237*4882a593Smuzhiyun 
238*4882a593Smuzhiyun 	platform_set_drvdata(pdev, pruss);
239*4882a593Smuzhiyun 
240*4882a593Smuzhiyun 	pm_runtime_enable(dev);
241*4882a593Smuzhiyun 	ret = pm_runtime_get_sync(dev);
242*4882a593Smuzhiyun 	if (ret < 0) {
243*4882a593Smuzhiyun 		dev_err(dev, "couldn't enable module\n");
244*4882a593Smuzhiyun 		pm_runtime_put_noidle(dev);
245*4882a593Smuzhiyun 		goto rpm_disable;
246*4882a593Smuzhiyun 	}
247*4882a593Smuzhiyun 
248*4882a593Smuzhiyun 	child = of_get_child_by_name(np, "cfg");
249*4882a593Smuzhiyun 	if (!child) {
250*4882a593Smuzhiyun 		dev_err(dev, "%pOF is missing its 'cfg' node\n", child);
251*4882a593Smuzhiyun 		ret = -ENODEV;
252*4882a593Smuzhiyun 		goto rpm_put;
253*4882a593Smuzhiyun 	}
254*4882a593Smuzhiyun 
255*4882a593Smuzhiyun 	if (of_address_to_resource(child, 0, &res)) {
256*4882a593Smuzhiyun 		ret = -ENOMEM;
257*4882a593Smuzhiyun 		goto node_put;
258*4882a593Smuzhiyun 	}
259*4882a593Smuzhiyun 
260*4882a593Smuzhiyun 	pruss->cfg_base = devm_ioremap(dev, res.start, resource_size(&res));
261*4882a593Smuzhiyun 	if (!pruss->cfg_base) {
262*4882a593Smuzhiyun 		ret = -ENOMEM;
263*4882a593Smuzhiyun 		goto node_put;
264*4882a593Smuzhiyun 	}
265*4882a593Smuzhiyun 
266*4882a593Smuzhiyun 	regmap_conf.name = kasprintf(GFP_KERNEL, "%pOFn@%llx", child,
267*4882a593Smuzhiyun 				     (u64)res.start);
268*4882a593Smuzhiyun 	regmap_conf.max_register = resource_size(&res) - 4;
269*4882a593Smuzhiyun 
270*4882a593Smuzhiyun 	pruss->cfg_regmap = devm_regmap_init_mmio(dev, pruss->cfg_base,
271*4882a593Smuzhiyun 						  &regmap_conf);
272*4882a593Smuzhiyun 	kfree(regmap_conf.name);
273*4882a593Smuzhiyun 	if (IS_ERR(pruss->cfg_regmap)) {
274*4882a593Smuzhiyun 		dev_err(dev, "regmap_init_mmio failed for cfg, ret = %ld\n",
275*4882a593Smuzhiyun 			PTR_ERR(pruss->cfg_regmap));
276*4882a593Smuzhiyun 		ret = PTR_ERR(pruss->cfg_regmap);
277*4882a593Smuzhiyun 		goto node_put;
278*4882a593Smuzhiyun 	}
279*4882a593Smuzhiyun 
280*4882a593Smuzhiyun 	ret = pruss_clk_init(pruss, child);
281*4882a593Smuzhiyun 	if (ret) {
282*4882a593Smuzhiyun 		dev_err(dev, "failed to setup coreclk-mux\n");
283*4882a593Smuzhiyun 		goto node_put;
284*4882a593Smuzhiyun 	}
285*4882a593Smuzhiyun 
286*4882a593Smuzhiyun 	ret = devm_of_platform_populate(dev);
287*4882a593Smuzhiyun 	if (ret) {
288*4882a593Smuzhiyun 		dev_err(dev, "failed to register child devices\n");
289*4882a593Smuzhiyun 		goto node_put;
290*4882a593Smuzhiyun 	}
291*4882a593Smuzhiyun 
292*4882a593Smuzhiyun 	of_node_put(child);
293*4882a593Smuzhiyun 
294*4882a593Smuzhiyun 	return 0;
295*4882a593Smuzhiyun 
296*4882a593Smuzhiyun node_put:
297*4882a593Smuzhiyun 	of_node_put(child);
298*4882a593Smuzhiyun rpm_put:
299*4882a593Smuzhiyun 	pm_runtime_put_sync(dev);
300*4882a593Smuzhiyun rpm_disable:
301*4882a593Smuzhiyun 	pm_runtime_disable(dev);
302*4882a593Smuzhiyun 	return ret;
303*4882a593Smuzhiyun }
304*4882a593Smuzhiyun 
pruss_remove(struct platform_device * pdev)305*4882a593Smuzhiyun static int pruss_remove(struct platform_device *pdev)
306*4882a593Smuzhiyun {
307*4882a593Smuzhiyun 	struct device *dev = &pdev->dev;
308*4882a593Smuzhiyun 
309*4882a593Smuzhiyun 	devm_of_platform_depopulate(dev);
310*4882a593Smuzhiyun 
311*4882a593Smuzhiyun 	pm_runtime_put_sync(dev);
312*4882a593Smuzhiyun 	pm_runtime_disable(dev);
313*4882a593Smuzhiyun 
314*4882a593Smuzhiyun 	return 0;
315*4882a593Smuzhiyun }
316*4882a593Smuzhiyun 
317*4882a593Smuzhiyun /* instance-specific driver private data */
318*4882a593Smuzhiyun static const struct pruss_private_data am437x_pruss1_data = {
319*4882a593Smuzhiyun 	.has_no_sharedram = false,
320*4882a593Smuzhiyun };
321*4882a593Smuzhiyun 
322*4882a593Smuzhiyun static const struct pruss_private_data am437x_pruss0_data = {
323*4882a593Smuzhiyun 	.has_no_sharedram = true,
324*4882a593Smuzhiyun };
325*4882a593Smuzhiyun 
326*4882a593Smuzhiyun static const struct pruss_private_data am65x_j721e_pruss_data = {
327*4882a593Smuzhiyun 	.has_core_mux_clock = true,
328*4882a593Smuzhiyun };
329*4882a593Smuzhiyun 
330*4882a593Smuzhiyun static const struct of_device_id pruss_of_match[] = {
331*4882a593Smuzhiyun 	{ .compatible = "ti,am3356-pruss" },
332*4882a593Smuzhiyun 	{ .compatible = "ti,am4376-pruss0", .data = &am437x_pruss0_data, },
333*4882a593Smuzhiyun 	{ .compatible = "ti,am4376-pruss1", .data = &am437x_pruss1_data, },
334*4882a593Smuzhiyun 	{ .compatible = "ti,am5728-pruss" },
335*4882a593Smuzhiyun 	{ .compatible = "ti,k2g-pruss" },
336*4882a593Smuzhiyun 	{ .compatible = "ti,am654-icssg", .data = &am65x_j721e_pruss_data, },
337*4882a593Smuzhiyun 	{ .compatible = "ti,j721e-icssg", .data = &am65x_j721e_pruss_data, },
338*4882a593Smuzhiyun 	{},
339*4882a593Smuzhiyun };
340*4882a593Smuzhiyun MODULE_DEVICE_TABLE(of, pruss_of_match);
341*4882a593Smuzhiyun 
342*4882a593Smuzhiyun static struct platform_driver pruss_driver = {
343*4882a593Smuzhiyun 	.driver = {
344*4882a593Smuzhiyun 		.name = "pruss",
345*4882a593Smuzhiyun 		.of_match_table = pruss_of_match,
346*4882a593Smuzhiyun 	},
347*4882a593Smuzhiyun 	.probe  = pruss_probe,
348*4882a593Smuzhiyun 	.remove = pruss_remove,
349*4882a593Smuzhiyun };
350*4882a593Smuzhiyun module_platform_driver(pruss_driver);
351*4882a593Smuzhiyun 
352*4882a593Smuzhiyun MODULE_AUTHOR("Suman Anna <s-anna@ti.com>");
353*4882a593Smuzhiyun MODULE_DESCRIPTION("PRU-ICSS Subsystem Driver");
354*4882a593Smuzhiyun MODULE_LICENSE("GPL v2");
355