xref: /OK3568_Linux_fs/kernel/drivers/soc/tegra/regulators-tegra20.c (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0+
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun  * Voltage regulators coupler for NVIDIA Tegra20
4*4882a593Smuzhiyun  * Copyright (C) 2019 GRATE-DRIVER project
5*4882a593Smuzhiyun  *
6*4882a593Smuzhiyun  * Voltage constraints borrowed from downstream kernel sources
7*4882a593Smuzhiyun  * Copyright (C) 2010-2011 NVIDIA Corporation
8*4882a593Smuzhiyun  */
9*4882a593Smuzhiyun 
10*4882a593Smuzhiyun #define pr_fmt(fmt)	"tegra voltage-coupler: " fmt
11*4882a593Smuzhiyun 
12*4882a593Smuzhiyun #include <linux/init.h>
13*4882a593Smuzhiyun #include <linux/kernel.h>
14*4882a593Smuzhiyun #include <linux/of.h>
15*4882a593Smuzhiyun #include <linux/regulator/coupler.h>
16*4882a593Smuzhiyun #include <linux/regulator/driver.h>
17*4882a593Smuzhiyun #include <linux/regulator/machine.h>
18*4882a593Smuzhiyun 
19*4882a593Smuzhiyun struct tegra_regulator_coupler {
20*4882a593Smuzhiyun 	struct regulator_coupler coupler;
21*4882a593Smuzhiyun 	struct regulator_dev *core_rdev;
22*4882a593Smuzhiyun 	struct regulator_dev *cpu_rdev;
23*4882a593Smuzhiyun 	struct regulator_dev *rtc_rdev;
24*4882a593Smuzhiyun 	int core_min_uV;
25*4882a593Smuzhiyun };
26*4882a593Smuzhiyun 
27*4882a593Smuzhiyun static inline struct tegra_regulator_coupler *
to_tegra_coupler(struct regulator_coupler * coupler)28*4882a593Smuzhiyun to_tegra_coupler(struct regulator_coupler *coupler)
29*4882a593Smuzhiyun {
30*4882a593Smuzhiyun 	return container_of(coupler, struct tegra_regulator_coupler, coupler);
31*4882a593Smuzhiyun }
32*4882a593Smuzhiyun 
tegra20_core_limit(struct tegra_regulator_coupler * tegra,struct regulator_dev * core_rdev)33*4882a593Smuzhiyun static int tegra20_core_limit(struct tegra_regulator_coupler *tegra,
34*4882a593Smuzhiyun 			      struct regulator_dev *core_rdev)
35*4882a593Smuzhiyun {
36*4882a593Smuzhiyun 	int core_min_uV = 0;
37*4882a593Smuzhiyun 	int core_max_uV;
38*4882a593Smuzhiyun 	int core_cur_uV;
39*4882a593Smuzhiyun 	int err;
40*4882a593Smuzhiyun 
41*4882a593Smuzhiyun 	if (tegra->core_min_uV > 0)
42*4882a593Smuzhiyun 		return tegra->core_min_uV;
43*4882a593Smuzhiyun 
44*4882a593Smuzhiyun 	core_cur_uV = regulator_get_voltage_rdev(core_rdev);
45*4882a593Smuzhiyun 	if (core_cur_uV < 0)
46*4882a593Smuzhiyun 		return core_cur_uV;
47*4882a593Smuzhiyun 
48*4882a593Smuzhiyun 	core_max_uV = max(core_cur_uV, 1200000);
49*4882a593Smuzhiyun 
50*4882a593Smuzhiyun 	err = regulator_check_voltage(core_rdev, &core_min_uV, &core_max_uV);
51*4882a593Smuzhiyun 	if (err)
52*4882a593Smuzhiyun 		return err;
53*4882a593Smuzhiyun 
54*4882a593Smuzhiyun 	/*
55*4882a593Smuzhiyun 	 * Limit minimum CORE voltage to a value left from bootloader or,
56*4882a593Smuzhiyun 	 * if it's unreasonably low value, to the most common 1.2v or to
57*4882a593Smuzhiyun 	 * whatever maximum value defined via board's device-tree.
58*4882a593Smuzhiyun 	 */
59*4882a593Smuzhiyun 	tegra->core_min_uV = core_max_uV;
60*4882a593Smuzhiyun 
61*4882a593Smuzhiyun 	pr_info("core minimum voltage limited to %duV\n", tegra->core_min_uV);
62*4882a593Smuzhiyun 
63*4882a593Smuzhiyun 	return tegra->core_min_uV;
64*4882a593Smuzhiyun }
65*4882a593Smuzhiyun 
tegra20_core_rtc_max_spread(struct regulator_dev * core_rdev,struct regulator_dev * rtc_rdev)66*4882a593Smuzhiyun static int tegra20_core_rtc_max_spread(struct regulator_dev *core_rdev,
67*4882a593Smuzhiyun 				       struct regulator_dev *rtc_rdev)
68*4882a593Smuzhiyun {
69*4882a593Smuzhiyun 	struct coupling_desc *c_desc = &core_rdev->coupling_desc;
70*4882a593Smuzhiyun 	struct regulator_dev *rdev;
71*4882a593Smuzhiyun 	int max_spread;
72*4882a593Smuzhiyun 	unsigned int i;
73*4882a593Smuzhiyun 
74*4882a593Smuzhiyun 	for (i = 1; i < c_desc->n_coupled; i++) {
75*4882a593Smuzhiyun 		max_spread = core_rdev->constraints->max_spread[i - 1];
76*4882a593Smuzhiyun 		rdev = c_desc->coupled_rdevs[i];
77*4882a593Smuzhiyun 
78*4882a593Smuzhiyun 		if (rdev == rtc_rdev && max_spread)
79*4882a593Smuzhiyun 			return max_spread;
80*4882a593Smuzhiyun 	}
81*4882a593Smuzhiyun 
82*4882a593Smuzhiyun 	pr_err_once("rtc-core max-spread is undefined in device-tree\n");
83*4882a593Smuzhiyun 
84*4882a593Smuzhiyun 	return 150000;
85*4882a593Smuzhiyun }
86*4882a593Smuzhiyun 
tegra20_core_rtc_update(struct tegra_regulator_coupler * tegra,struct regulator_dev * core_rdev,struct regulator_dev * rtc_rdev,int cpu_uV,int cpu_min_uV)87*4882a593Smuzhiyun static int tegra20_core_rtc_update(struct tegra_regulator_coupler *tegra,
88*4882a593Smuzhiyun 				   struct regulator_dev *core_rdev,
89*4882a593Smuzhiyun 				   struct regulator_dev *rtc_rdev,
90*4882a593Smuzhiyun 				   int cpu_uV, int cpu_min_uV)
91*4882a593Smuzhiyun {
92*4882a593Smuzhiyun 	int core_min_uV, core_max_uV = INT_MAX;
93*4882a593Smuzhiyun 	int rtc_min_uV, rtc_max_uV = INT_MAX;
94*4882a593Smuzhiyun 	int core_target_uV;
95*4882a593Smuzhiyun 	int rtc_target_uV;
96*4882a593Smuzhiyun 	int max_spread;
97*4882a593Smuzhiyun 	int core_uV;
98*4882a593Smuzhiyun 	int rtc_uV;
99*4882a593Smuzhiyun 	int err;
100*4882a593Smuzhiyun 
101*4882a593Smuzhiyun 	/*
102*4882a593Smuzhiyun 	 * RTC and CORE voltages should be no more than 170mV from each other,
103*4882a593Smuzhiyun 	 * CPU should be below RTC and CORE by at least 120mV. This applies
104*4882a593Smuzhiyun 	 * to all Tegra20 SoC's.
105*4882a593Smuzhiyun 	 */
106*4882a593Smuzhiyun 	max_spread = tegra20_core_rtc_max_spread(core_rdev, rtc_rdev);
107*4882a593Smuzhiyun 
108*4882a593Smuzhiyun 	/*
109*4882a593Smuzhiyun 	 * The core voltage scaling is currently not hooked up in drivers,
110*4882a593Smuzhiyun 	 * hence we will limit the minimum core voltage to a reasonable value.
111*4882a593Smuzhiyun 	 * This should be good enough for the time being.
112*4882a593Smuzhiyun 	 */
113*4882a593Smuzhiyun 	core_min_uV = tegra20_core_limit(tegra, core_rdev);
114*4882a593Smuzhiyun 	if (core_min_uV < 0)
115*4882a593Smuzhiyun 		return core_min_uV;
116*4882a593Smuzhiyun 
117*4882a593Smuzhiyun 	err = regulator_check_voltage(core_rdev, &core_min_uV, &core_max_uV);
118*4882a593Smuzhiyun 	if (err)
119*4882a593Smuzhiyun 		return err;
120*4882a593Smuzhiyun 
121*4882a593Smuzhiyun 	err = regulator_check_consumers(core_rdev, &core_min_uV, &core_max_uV,
122*4882a593Smuzhiyun 					PM_SUSPEND_ON);
123*4882a593Smuzhiyun 	if (err)
124*4882a593Smuzhiyun 		return err;
125*4882a593Smuzhiyun 
126*4882a593Smuzhiyun 	core_uV = regulator_get_voltage_rdev(core_rdev);
127*4882a593Smuzhiyun 	if (core_uV < 0)
128*4882a593Smuzhiyun 		return core_uV;
129*4882a593Smuzhiyun 
130*4882a593Smuzhiyun 	core_min_uV = max(cpu_min_uV + 125000, core_min_uV);
131*4882a593Smuzhiyun 	if (core_min_uV > core_max_uV)
132*4882a593Smuzhiyun 		return -EINVAL;
133*4882a593Smuzhiyun 
134*4882a593Smuzhiyun 	if (cpu_uV + 120000 > core_uV)
135*4882a593Smuzhiyun 		pr_err("core-cpu voltage constraint violated: %d %d\n",
136*4882a593Smuzhiyun 		       core_uV, cpu_uV + 120000);
137*4882a593Smuzhiyun 
138*4882a593Smuzhiyun 	rtc_uV = regulator_get_voltage_rdev(rtc_rdev);
139*4882a593Smuzhiyun 	if (rtc_uV < 0)
140*4882a593Smuzhiyun 		return rtc_uV;
141*4882a593Smuzhiyun 
142*4882a593Smuzhiyun 	if (cpu_uV + 120000 > rtc_uV)
143*4882a593Smuzhiyun 		pr_err("rtc-cpu voltage constraint violated: %d %d\n",
144*4882a593Smuzhiyun 		       rtc_uV, cpu_uV + 120000);
145*4882a593Smuzhiyun 
146*4882a593Smuzhiyun 	if (abs(core_uV - rtc_uV) > 170000)
147*4882a593Smuzhiyun 		pr_err("core-rtc voltage constraint violated: %d %d\n",
148*4882a593Smuzhiyun 		       core_uV, rtc_uV);
149*4882a593Smuzhiyun 
150*4882a593Smuzhiyun 	rtc_min_uV = max(cpu_min_uV + 125000, core_min_uV - max_spread);
151*4882a593Smuzhiyun 
152*4882a593Smuzhiyun 	err = regulator_check_voltage(rtc_rdev, &rtc_min_uV, &rtc_max_uV);
153*4882a593Smuzhiyun 	if (err)
154*4882a593Smuzhiyun 		return err;
155*4882a593Smuzhiyun 
156*4882a593Smuzhiyun 	while (core_uV != core_min_uV || rtc_uV != rtc_min_uV) {
157*4882a593Smuzhiyun 		if (core_uV < core_min_uV) {
158*4882a593Smuzhiyun 			core_target_uV = min(core_uV + max_spread, core_min_uV);
159*4882a593Smuzhiyun 			core_target_uV = min(rtc_uV + max_spread, core_target_uV);
160*4882a593Smuzhiyun 		} else {
161*4882a593Smuzhiyun 			core_target_uV = max(core_uV - max_spread, core_min_uV);
162*4882a593Smuzhiyun 			core_target_uV = max(rtc_uV - max_spread, core_target_uV);
163*4882a593Smuzhiyun 		}
164*4882a593Smuzhiyun 
165*4882a593Smuzhiyun 		if (core_uV == core_target_uV)
166*4882a593Smuzhiyun 			goto update_rtc;
167*4882a593Smuzhiyun 
168*4882a593Smuzhiyun 		err = regulator_set_voltage_rdev(core_rdev,
169*4882a593Smuzhiyun 						 core_target_uV,
170*4882a593Smuzhiyun 						 core_max_uV,
171*4882a593Smuzhiyun 						 PM_SUSPEND_ON);
172*4882a593Smuzhiyun 		if (err)
173*4882a593Smuzhiyun 			return err;
174*4882a593Smuzhiyun 
175*4882a593Smuzhiyun 		core_uV = core_target_uV;
176*4882a593Smuzhiyun update_rtc:
177*4882a593Smuzhiyun 		if (rtc_uV < rtc_min_uV) {
178*4882a593Smuzhiyun 			rtc_target_uV = min(rtc_uV + max_spread, rtc_min_uV);
179*4882a593Smuzhiyun 			rtc_target_uV = min(core_uV + max_spread, rtc_target_uV);
180*4882a593Smuzhiyun 		} else {
181*4882a593Smuzhiyun 			rtc_target_uV = max(rtc_uV - max_spread, rtc_min_uV);
182*4882a593Smuzhiyun 			rtc_target_uV = max(core_uV - max_spread, rtc_target_uV);
183*4882a593Smuzhiyun 		}
184*4882a593Smuzhiyun 
185*4882a593Smuzhiyun 		if (rtc_uV == rtc_target_uV)
186*4882a593Smuzhiyun 			continue;
187*4882a593Smuzhiyun 
188*4882a593Smuzhiyun 		err = regulator_set_voltage_rdev(rtc_rdev,
189*4882a593Smuzhiyun 						 rtc_target_uV,
190*4882a593Smuzhiyun 						 rtc_max_uV,
191*4882a593Smuzhiyun 						 PM_SUSPEND_ON);
192*4882a593Smuzhiyun 		if (err)
193*4882a593Smuzhiyun 			return err;
194*4882a593Smuzhiyun 
195*4882a593Smuzhiyun 		rtc_uV = rtc_target_uV;
196*4882a593Smuzhiyun 	}
197*4882a593Smuzhiyun 
198*4882a593Smuzhiyun 	return 0;
199*4882a593Smuzhiyun }
200*4882a593Smuzhiyun 
tegra20_core_voltage_update(struct tegra_regulator_coupler * tegra,struct regulator_dev * cpu_rdev,struct regulator_dev * core_rdev,struct regulator_dev * rtc_rdev)201*4882a593Smuzhiyun static int tegra20_core_voltage_update(struct tegra_regulator_coupler *tegra,
202*4882a593Smuzhiyun 				       struct regulator_dev *cpu_rdev,
203*4882a593Smuzhiyun 				       struct regulator_dev *core_rdev,
204*4882a593Smuzhiyun 				       struct regulator_dev *rtc_rdev)
205*4882a593Smuzhiyun {
206*4882a593Smuzhiyun 	int cpu_uV;
207*4882a593Smuzhiyun 
208*4882a593Smuzhiyun 	cpu_uV = regulator_get_voltage_rdev(cpu_rdev);
209*4882a593Smuzhiyun 	if (cpu_uV < 0)
210*4882a593Smuzhiyun 		return cpu_uV;
211*4882a593Smuzhiyun 
212*4882a593Smuzhiyun 	return tegra20_core_rtc_update(tegra, core_rdev, rtc_rdev,
213*4882a593Smuzhiyun 				       cpu_uV, cpu_uV);
214*4882a593Smuzhiyun }
215*4882a593Smuzhiyun 
tegra20_cpu_voltage_update(struct tegra_regulator_coupler * tegra,struct regulator_dev * cpu_rdev,struct regulator_dev * core_rdev,struct regulator_dev * rtc_rdev)216*4882a593Smuzhiyun static int tegra20_cpu_voltage_update(struct tegra_regulator_coupler *tegra,
217*4882a593Smuzhiyun 				      struct regulator_dev *cpu_rdev,
218*4882a593Smuzhiyun 				      struct regulator_dev *core_rdev,
219*4882a593Smuzhiyun 				      struct regulator_dev *rtc_rdev)
220*4882a593Smuzhiyun {
221*4882a593Smuzhiyun 	int cpu_min_uV_consumers = 0;
222*4882a593Smuzhiyun 	int cpu_max_uV = INT_MAX;
223*4882a593Smuzhiyun 	int cpu_min_uV = 0;
224*4882a593Smuzhiyun 	int cpu_uV;
225*4882a593Smuzhiyun 	int err;
226*4882a593Smuzhiyun 
227*4882a593Smuzhiyun 	err = regulator_check_voltage(cpu_rdev, &cpu_min_uV, &cpu_max_uV);
228*4882a593Smuzhiyun 	if (err)
229*4882a593Smuzhiyun 		return err;
230*4882a593Smuzhiyun 
231*4882a593Smuzhiyun 	err = regulator_check_consumers(cpu_rdev, &cpu_min_uV, &cpu_max_uV,
232*4882a593Smuzhiyun 					PM_SUSPEND_ON);
233*4882a593Smuzhiyun 	if (err)
234*4882a593Smuzhiyun 		return err;
235*4882a593Smuzhiyun 
236*4882a593Smuzhiyun 	err = regulator_check_consumers(cpu_rdev, &cpu_min_uV_consumers,
237*4882a593Smuzhiyun 					&cpu_max_uV, PM_SUSPEND_ON);
238*4882a593Smuzhiyun 	if (err)
239*4882a593Smuzhiyun 		return err;
240*4882a593Smuzhiyun 
241*4882a593Smuzhiyun 	cpu_uV = regulator_get_voltage_rdev(cpu_rdev);
242*4882a593Smuzhiyun 	if (cpu_uV < 0)
243*4882a593Smuzhiyun 		return cpu_uV;
244*4882a593Smuzhiyun 
245*4882a593Smuzhiyun 	/*
246*4882a593Smuzhiyun 	 * CPU's regulator may not have any consumers, hence the voltage
247*4882a593Smuzhiyun 	 * must not be changed in that case because CPU simply won't
248*4882a593Smuzhiyun 	 * survive the voltage drop if it's running on a higher frequency.
249*4882a593Smuzhiyun 	 */
250*4882a593Smuzhiyun 	if (!cpu_min_uV_consumers)
251*4882a593Smuzhiyun 		cpu_min_uV = cpu_uV;
252*4882a593Smuzhiyun 
253*4882a593Smuzhiyun 	if (cpu_min_uV > cpu_uV) {
254*4882a593Smuzhiyun 		err = tegra20_core_rtc_update(tegra, core_rdev, rtc_rdev,
255*4882a593Smuzhiyun 					      cpu_uV, cpu_min_uV);
256*4882a593Smuzhiyun 		if (err)
257*4882a593Smuzhiyun 			return err;
258*4882a593Smuzhiyun 
259*4882a593Smuzhiyun 		err = regulator_set_voltage_rdev(cpu_rdev, cpu_min_uV,
260*4882a593Smuzhiyun 						 cpu_max_uV, PM_SUSPEND_ON);
261*4882a593Smuzhiyun 		if (err)
262*4882a593Smuzhiyun 			return err;
263*4882a593Smuzhiyun 	} else if (cpu_min_uV < cpu_uV)  {
264*4882a593Smuzhiyun 		err = regulator_set_voltage_rdev(cpu_rdev, cpu_min_uV,
265*4882a593Smuzhiyun 						 cpu_max_uV, PM_SUSPEND_ON);
266*4882a593Smuzhiyun 		if (err)
267*4882a593Smuzhiyun 			return err;
268*4882a593Smuzhiyun 
269*4882a593Smuzhiyun 		err = tegra20_core_rtc_update(tegra, core_rdev, rtc_rdev,
270*4882a593Smuzhiyun 					      cpu_uV, cpu_min_uV);
271*4882a593Smuzhiyun 		if (err)
272*4882a593Smuzhiyun 			return err;
273*4882a593Smuzhiyun 	}
274*4882a593Smuzhiyun 
275*4882a593Smuzhiyun 	return 0;
276*4882a593Smuzhiyun }
277*4882a593Smuzhiyun 
tegra20_regulator_balance_voltage(struct regulator_coupler * coupler,struct regulator_dev * rdev,suspend_state_t state)278*4882a593Smuzhiyun static int tegra20_regulator_balance_voltage(struct regulator_coupler *coupler,
279*4882a593Smuzhiyun 					     struct regulator_dev *rdev,
280*4882a593Smuzhiyun 					     suspend_state_t state)
281*4882a593Smuzhiyun {
282*4882a593Smuzhiyun 	struct tegra_regulator_coupler *tegra = to_tegra_coupler(coupler);
283*4882a593Smuzhiyun 	struct regulator_dev *core_rdev = tegra->core_rdev;
284*4882a593Smuzhiyun 	struct regulator_dev *cpu_rdev = tegra->cpu_rdev;
285*4882a593Smuzhiyun 	struct regulator_dev *rtc_rdev = tegra->rtc_rdev;
286*4882a593Smuzhiyun 
287*4882a593Smuzhiyun 	if ((core_rdev != rdev && cpu_rdev != rdev && rtc_rdev != rdev) ||
288*4882a593Smuzhiyun 	    state != PM_SUSPEND_ON) {
289*4882a593Smuzhiyun 		pr_err("regulators are not coupled properly\n");
290*4882a593Smuzhiyun 		return -EINVAL;
291*4882a593Smuzhiyun 	}
292*4882a593Smuzhiyun 
293*4882a593Smuzhiyun 	if (rdev == cpu_rdev)
294*4882a593Smuzhiyun 		return tegra20_cpu_voltage_update(tegra, cpu_rdev,
295*4882a593Smuzhiyun 						  core_rdev, rtc_rdev);
296*4882a593Smuzhiyun 
297*4882a593Smuzhiyun 	if (rdev == core_rdev)
298*4882a593Smuzhiyun 		return tegra20_core_voltage_update(tegra, cpu_rdev,
299*4882a593Smuzhiyun 						   core_rdev, rtc_rdev);
300*4882a593Smuzhiyun 
301*4882a593Smuzhiyun 	pr_err("changing %s voltage not permitted\n", rdev_get_name(rtc_rdev));
302*4882a593Smuzhiyun 
303*4882a593Smuzhiyun 	return -EPERM;
304*4882a593Smuzhiyun }
305*4882a593Smuzhiyun 
tegra20_regulator_attach(struct regulator_coupler * coupler,struct regulator_dev * rdev)306*4882a593Smuzhiyun static int tegra20_regulator_attach(struct regulator_coupler *coupler,
307*4882a593Smuzhiyun 				    struct regulator_dev *rdev)
308*4882a593Smuzhiyun {
309*4882a593Smuzhiyun 	struct tegra_regulator_coupler *tegra = to_tegra_coupler(coupler);
310*4882a593Smuzhiyun 	struct device_node *np = rdev->dev.of_node;
311*4882a593Smuzhiyun 
312*4882a593Smuzhiyun 	if (of_property_read_bool(np, "nvidia,tegra-core-regulator") &&
313*4882a593Smuzhiyun 	    !tegra->core_rdev) {
314*4882a593Smuzhiyun 		tegra->core_rdev = rdev;
315*4882a593Smuzhiyun 		return 0;
316*4882a593Smuzhiyun 	}
317*4882a593Smuzhiyun 
318*4882a593Smuzhiyun 	if (of_property_read_bool(np, "nvidia,tegra-rtc-regulator") &&
319*4882a593Smuzhiyun 	    !tegra->rtc_rdev) {
320*4882a593Smuzhiyun 		tegra->rtc_rdev = rdev;
321*4882a593Smuzhiyun 		return 0;
322*4882a593Smuzhiyun 	}
323*4882a593Smuzhiyun 
324*4882a593Smuzhiyun 	if (of_property_read_bool(np, "nvidia,tegra-cpu-regulator") &&
325*4882a593Smuzhiyun 	    !tegra->cpu_rdev) {
326*4882a593Smuzhiyun 		tegra->cpu_rdev = rdev;
327*4882a593Smuzhiyun 		return 0;
328*4882a593Smuzhiyun 	}
329*4882a593Smuzhiyun 
330*4882a593Smuzhiyun 	return -EINVAL;
331*4882a593Smuzhiyun }
332*4882a593Smuzhiyun 
tegra20_regulator_detach(struct regulator_coupler * coupler,struct regulator_dev * rdev)333*4882a593Smuzhiyun static int tegra20_regulator_detach(struct regulator_coupler *coupler,
334*4882a593Smuzhiyun 				    struct regulator_dev *rdev)
335*4882a593Smuzhiyun {
336*4882a593Smuzhiyun 	struct tegra_regulator_coupler *tegra = to_tegra_coupler(coupler);
337*4882a593Smuzhiyun 
338*4882a593Smuzhiyun 	if (tegra->core_rdev == rdev) {
339*4882a593Smuzhiyun 		tegra->core_rdev = NULL;
340*4882a593Smuzhiyun 		return 0;
341*4882a593Smuzhiyun 	}
342*4882a593Smuzhiyun 
343*4882a593Smuzhiyun 	if (tegra->rtc_rdev == rdev) {
344*4882a593Smuzhiyun 		tegra->rtc_rdev = NULL;
345*4882a593Smuzhiyun 		return 0;
346*4882a593Smuzhiyun 	}
347*4882a593Smuzhiyun 
348*4882a593Smuzhiyun 	if (tegra->cpu_rdev == rdev) {
349*4882a593Smuzhiyun 		tegra->cpu_rdev = NULL;
350*4882a593Smuzhiyun 		return 0;
351*4882a593Smuzhiyun 	}
352*4882a593Smuzhiyun 
353*4882a593Smuzhiyun 	return -EINVAL;
354*4882a593Smuzhiyun }
355*4882a593Smuzhiyun 
356*4882a593Smuzhiyun static struct tegra_regulator_coupler tegra20_coupler = {
357*4882a593Smuzhiyun 	.coupler = {
358*4882a593Smuzhiyun 		.attach_regulator = tegra20_regulator_attach,
359*4882a593Smuzhiyun 		.detach_regulator = tegra20_regulator_detach,
360*4882a593Smuzhiyun 		.balance_voltage = tegra20_regulator_balance_voltage,
361*4882a593Smuzhiyun 	},
362*4882a593Smuzhiyun };
363*4882a593Smuzhiyun 
tegra_regulator_coupler_init(void)364*4882a593Smuzhiyun static int __init tegra_regulator_coupler_init(void)
365*4882a593Smuzhiyun {
366*4882a593Smuzhiyun 	if (!of_machine_is_compatible("nvidia,tegra20"))
367*4882a593Smuzhiyun 		return 0;
368*4882a593Smuzhiyun 
369*4882a593Smuzhiyun 	return regulator_coupler_register(&tegra20_coupler.coupler);
370*4882a593Smuzhiyun }
371*4882a593Smuzhiyun arch_initcall(tegra_regulator_coupler_init);
372