1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0-only
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun * Copyright (c) 2012-2014, NVIDIA CORPORATION. All rights reserved.
4*4882a593Smuzhiyun */
5*4882a593Smuzhiyun
6*4882a593Smuzhiyun #include <linux/bug.h>
7*4882a593Smuzhiyun #include <linux/device.h>
8*4882a593Smuzhiyun #include <linux/kernel.h>
9*4882a593Smuzhiyun
10*4882a593Smuzhiyun #include <soc/tegra/fuse.h>
11*4882a593Smuzhiyun
12*4882a593Smuzhiyun #include "fuse.h"
13*4882a593Smuzhiyun
14*4882a593Smuzhiyun #define CPU_SPEEDO_LSBIT 20
15*4882a593Smuzhiyun #define CPU_SPEEDO_MSBIT 29
16*4882a593Smuzhiyun #define CPU_SPEEDO_REDUND_LSBIT 30
17*4882a593Smuzhiyun #define CPU_SPEEDO_REDUND_MSBIT 39
18*4882a593Smuzhiyun #define CPU_SPEEDO_REDUND_OFFS (CPU_SPEEDO_REDUND_MSBIT - CPU_SPEEDO_MSBIT)
19*4882a593Smuzhiyun
20*4882a593Smuzhiyun #define SOC_SPEEDO_LSBIT 40
21*4882a593Smuzhiyun #define SOC_SPEEDO_MSBIT 47
22*4882a593Smuzhiyun #define SOC_SPEEDO_REDUND_LSBIT 48
23*4882a593Smuzhiyun #define SOC_SPEEDO_REDUND_MSBIT 55
24*4882a593Smuzhiyun #define SOC_SPEEDO_REDUND_OFFS (SOC_SPEEDO_REDUND_MSBIT - SOC_SPEEDO_MSBIT)
25*4882a593Smuzhiyun
26*4882a593Smuzhiyun #define SPEEDO_MULT 4
27*4882a593Smuzhiyun
28*4882a593Smuzhiyun #define PROCESS_CORNERS_NUM 4
29*4882a593Smuzhiyun
30*4882a593Smuzhiyun #define SPEEDO_ID_SELECT_0(rev) ((rev) <= 2)
31*4882a593Smuzhiyun #define SPEEDO_ID_SELECT_1(sku) \
32*4882a593Smuzhiyun (((sku) != 20) && ((sku) != 23) && ((sku) != 24) && \
33*4882a593Smuzhiyun ((sku) != 27) && ((sku) != 28))
34*4882a593Smuzhiyun
35*4882a593Smuzhiyun enum {
36*4882a593Smuzhiyun SPEEDO_ID_0,
37*4882a593Smuzhiyun SPEEDO_ID_1,
38*4882a593Smuzhiyun SPEEDO_ID_2,
39*4882a593Smuzhiyun SPEEDO_ID_COUNT,
40*4882a593Smuzhiyun };
41*4882a593Smuzhiyun
42*4882a593Smuzhiyun static const u32 __initconst cpu_process_speedos[][PROCESS_CORNERS_NUM] = {
43*4882a593Smuzhiyun {315, 366, 420, UINT_MAX},
44*4882a593Smuzhiyun {303, 368, 419, UINT_MAX},
45*4882a593Smuzhiyun {316, 331, 383, UINT_MAX},
46*4882a593Smuzhiyun };
47*4882a593Smuzhiyun
48*4882a593Smuzhiyun static const u32 __initconst soc_process_speedos[][PROCESS_CORNERS_NUM] = {
49*4882a593Smuzhiyun {165, 195, 224, UINT_MAX},
50*4882a593Smuzhiyun {165, 195, 224, UINT_MAX},
51*4882a593Smuzhiyun {165, 195, 224, UINT_MAX},
52*4882a593Smuzhiyun };
53*4882a593Smuzhiyun
tegra20_init_speedo_data(struct tegra_sku_info * sku_info)54*4882a593Smuzhiyun void __init tegra20_init_speedo_data(struct tegra_sku_info *sku_info)
55*4882a593Smuzhiyun {
56*4882a593Smuzhiyun u32 reg;
57*4882a593Smuzhiyun u32 val;
58*4882a593Smuzhiyun int i;
59*4882a593Smuzhiyun
60*4882a593Smuzhiyun BUILD_BUG_ON(ARRAY_SIZE(cpu_process_speedos) != SPEEDO_ID_COUNT);
61*4882a593Smuzhiyun BUILD_BUG_ON(ARRAY_SIZE(soc_process_speedos) != SPEEDO_ID_COUNT);
62*4882a593Smuzhiyun
63*4882a593Smuzhiyun if (SPEEDO_ID_SELECT_0(sku_info->revision))
64*4882a593Smuzhiyun sku_info->soc_speedo_id = SPEEDO_ID_0;
65*4882a593Smuzhiyun else if (SPEEDO_ID_SELECT_1(sku_info->sku_id))
66*4882a593Smuzhiyun sku_info->soc_speedo_id = SPEEDO_ID_1;
67*4882a593Smuzhiyun else
68*4882a593Smuzhiyun sku_info->soc_speedo_id = SPEEDO_ID_2;
69*4882a593Smuzhiyun
70*4882a593Smuzhiyun val = 0;
71*4882a593Smuzhiyun for (i = CPU_SPEEDO_MSBIT; i >= CPU_SPEEDO_LSBIT; i--) {
72*4882a593Smuzhiyun reg = tegra_fuse_read_spare(i) |
73*4882a593Smuzhiyun tegra_fuse_read_spare(i + CPU_SPEEDO_REDUND_OFFS);
74*4882a593Smuzhiyun val = (val << 1) | (reg & 0x1);
75*4882a593Smuzhiyun }
76*4882a593Smuzhiyun val = val * SPEEDO_MULT;
77*4882a593Smuzhiyun pr_debug("Tegra CPU speedo value %u\n", val);
78*4882a593Smuzhiyun
79*4882a593Smuzhiyun for (i = 0; i < (PROCESS_CORNERS_NUM - 1); i++) {
80*4882a593Smuzhiyun if (val <= cpu_process_speedos[sku_info->soc_speedo_id][i])
81*4882a593Smuzhiyun break;
82*4882a593Smuzhiyun }
83*4882a593Smuzhiyun sku_info->cpu_process_id = i;
84*4882a593Smuzhiyun
85*4882a593Smuzhiyun val = 0;
86*4882a593Smuzhiyun for (i = SOC_SPEEDO_MSBIT; i >= SOC_SPEEDO_LSBIT; i--) {
87*4882a593Smuzhiyun reg = tegra_fuse_read_spare(i) |
88*4882a593Smuzhiyun tegra_fuse_read_spare(i + SOC_SPEEDO_REDUND_OFFS);
89*4882a593Smuzhiyun val = (val << 1) | (reg & 0x1);
90*4882a593Smuzhiyun }
91*4882a593Smuzhiyun val = val * SPEEDO_MULT;
92*4882a593Smuzhiyun pr_debug("Core speedo value %u\n", val);
93*4882a593Smuzhiyun
94*4882a593Smuzhiyun for (i = 0; i < (PROCESS_CORNERS_NUM - 1); i++) {
95*4882a593Smuzhiyun if (val <= soc_process_speedos[sku_info->soc_speedo_id][i])
96*4882a593Smuzhiyun break;
97*4882a593Smuzhiyun }
98*4882a593Smuzhiyun sku_info->soc_process_id = i;
99*4882a593Smuzhiyun }
100