1 // SPDX-License-Identifier: GPL-2.0+
2 /*
3 * Copyright (C) 2020 Rockchip Electronics Co., Ltd
4 */
5 #include <linux/clk.h>
6 #include <linux/delay.h>
7 #include <linux/initramfs.h>
8 #include <linux/interrupt.h>
9 #include <linux/kernel.h>
10 #include <linux/mm.h>
11 #include <linux/module.h>
12 #include <linux/of.h>
13 #include <linux/of_address.h>
14 #include <linux/of_device.h>
15 #include <linux/platform_device.h>
16 #include <linux/reset.h>
17 #include <linux/soc/rockchip/rockchip_decompress.h>
18
19 #define DECOM_CTRL 0x0
20 #define DECOM_ENR 0x4
21 #define DECOM_RADDR 0x8
22 #define DECOM_WADDR 0xc
23 #define DECOM_UDDSL 0x10
24 #define DECOM_UDDSH 0x14
25 #define DECOM_TXTHR 0x18
26 #define DECOM_RXTHR 0x1c
27 #define DECOM_SLEN 0x20
28 #define DECOM_STAT 0x24
29 #define DECOM_ISR 0x28
30 #define DECOM_IEN 0x2c
31 #define DECOM_AXI_STAT 0x30
32 #define DECOM_TSIZEL 0x34
33 #define DECOM_TSIZEH 0x38
34 #define DECOM_MGNUM 0x3c
35 #define DECOM_FRAME 0x40
36 #define DECOM_DICTID 0x44
37 #define DECOM_CSL 0x48
38 #define DECOM_CSH 0x4c
39 #define DECOM_LMTSL 0x50
40 #define DECOM_LMTSH 0x54
41
42 #define LZ4_HEAD_CSUM_CHECK_EN BIT(1)
43 #define LZ4_BLOCK_CSUM_CHECK_EN BIT(2)
44 #define LZ4_CONT_CSUM_CHECK_EN BIT(3)
45
46 #define DSOLIEN BIT(19)
47 #define ZDICTEIEN BIT(18)
48 #define GCMEIEN BIT(17)
49 #define GIDEIEN BIT(16)
50 #define CCCEIEN BIT(15)
51 #define BCCEIEN BIT(14)
52 #define HCCEIEN BIT(13)
53 #define CSEIEN BIT(12)
54 #define DICTEIEN BIT(11)
55 #define VNEIEN BIT(10)
56 #define WNEIEN BIT(9)
57 #define RDCEIEN BIT(8)
58 #define WRCEIEN BIT(7)
59 #define DISEIEN BIT(6)
60 #define LENEIEN BIT(5)
61 #define LITEIEN BIT(4)
62 #define SQMEIEN BIT(3)
63 #define SLCIEN BIT(2)
64 #define HDEIEN BIT(1)
65 #define DSIEN BIT(0)
66
67 #define DECOM_STOP BIT(0)
68 #define DECOM_COMPLETE BIT(0)
69 #define DECOM_GZIP_MODE BIT(4)
70 #define DECOM_ZLIB_MODE BIT(5)
71 #define DECOM_DEFLATE_MODE BIT(0)
72
73 #define DECOM_ENABLE 0x1
74 #define DECOM_DISABLE 0x0
75
76 #define DECOM_INT_MASK \
77 (DSOLIEN | ZDICTEIEN | GCMEIEN | GIDEIEN | \
78 CCCEIEN | BCCEIEN | HCCEIEN | CSEIEN | \
79 DICTEIEN | VNEIEN | WNEIEN | RDCEIEN | WRCEIEN | \
80 DISEIEN | LENEIEN | LITEIEN | SQMEIEN | SLCIEN | \
81 HDEIEN | DSIEN)
82
83 struct rk_decom {
84 struct device *dev;
85 int irq;
86 int num_clocks;
87 struct clk_bulk_data *clocks;
88 void __iomem *regs;
89 phys_addr_t mem_start;
90 size_t mem_size;
91 struct reset_control *reset;
92 };
93
94 static struct rk_decom *g_decom;
95
96 static DECLARE_WAIT_QUEUE_HEAD(g_decom_wait);
97 static bool g_decom_complete;
98 static bool g_decom_noblocking;
99 static u64 g_decom_data_len;
100
wait_initrd_hw_decom_done(void)101 void __init wait_initrd_hw_decom_done(void)
102 {
103 wait_event(g_decom_wait, g_decom_complete);
104 }
105
rk_decom_wait_done(u32 timeout,u64 * decom_len)106 int rk_decom_wait_done(u32 timeout, u64 *decom_len)
107 {
108 int ret;
109
110 if (!decom_len)
111 return -EINVAL;
112
113 ret = wait_event_timeout(g_decom_wait, g_decom_complete, timeout * HZ);
114 if (!ret) {
115 if (g_decom)
116 clk_bulk_disable_unprepare(g_decom->num_clocks, g_decom->clocks);
117
118 return -ETIMEDOUT;
119 }
120
121 *decom_len = g_decom_data_len;
122
123 return 0;
124 }
125 EXPORT_SYMBOL(rk_decom_wait_done);
126
127 static DECLARE_WAIT_QUEUE_HEAD(decom_init_done);
128
rk_decom_start(u32 mode,phys_addr_t src,phys_addr_t dst,u32 dst_max_size)129 int rk_decom_start(u32 mode, phys_addr_t src, phys_addr_t dst, u32 dst_max_size)
130 {
131 int ret;
132 u32 irq_status;
133 u32 decom_enr;
134 u32 decom_mode = rk_get_decom_mode(mode);
135
136 wait_event_timeout(decom_init_done, g_decom, HZ);
137 if (!g_decom)
138 return -EINVAL;
139
140 if (g_decom->mem_start)
141 pr_info("%s: mode %u src %pa dst %pa max_size %u\n",
142 __func__, mode, &src, &dst, dst_max_size);
143
144 ret = clk_bulk_prepare_enable(g_decom->num_clocks, g_decom->clocks);
145 if (ret)
146 return ret;
147
148 g_decom_complete = false;
149 g_decom_data_len = 0;
150 g_decom_noblocking = rk_get_noblocking_flag(mode);
151
152 decom_enr = readl(g_decom->regs + DECOM_ENR);
153 if (decom_enr & 0x1) {
154 pr_err("decompress busy\n");
155 ret = -EBUSY;
156 goto error;
157 }
158
159 if (g_decom->reset) {
160 reset_control_assert(g_decom->reset);
161 udelay(10);
162 reset_control_deassert(g_decom->reset);
163 }
164
165 irq_status = readl(g_decom->regs + DECOM_ISR);
166 /* clear interrupts */
167 if (irq_status)
168 writel(irq_status, g_decom->regs + DECOM_ISR);
169
170 switch (decom_mode) {
171 case LZ4_MOD:
172 writel(LZ4_CONT_CSUM_CHECK_EN |
173 LZ4_HEAD_CSUM_CHECK_EN |
174 LZ4_BLOCK_CSUM_CHECK_EN |
175 LZ4_MOD, g_decom->regs + DECOM_CTRL);
176 break;
177 case GZIP_MOD:
178 writel(DECOM_DEFLATE_MODE | DECOM_GZIP_MODE,
179 g_decom->regs + DECOM_CTRL);
180 break;
181 case ZLIB_MOD:
182 writel(DECOM_DEFLATE_MODE | DECOM_ZLIB_MODE,
183 g_decom->regs + DECOM_CTRL);
184 break;
185 default:
186 pr_err("undefined mode : %d\n", decom_mode);
187 ret = -EINVAL;
188 goto error;
189 }
190
191 writel(src, g_decom->regs + DECOM_RADDR);
192 writel(dst, g_decom->regs + DECOM_WADDR);
193
194 writel(dst_max_size, g_decom->regs + DECOM_LMTSL);
195 writel(0x0, g_decom->regs + DECOM_LMTSH);
196
197 writel(DECOM_INT_MASK, g_decom->regs + DECOM_IEN);
198 writel(DECOM_ENABLE, g_decom->regs + DECOM_ENR);
199
200 return 0;
201 error:
202 clk_bulk_disable_unprepare(g_decom->num_clocks, g_decom->clocks);
203
204 return ret;
205 }
206 EXPORT_SYMBOL(rk_decom_start);
207
rk_decom_irq_handler(int irq,void * priv)208 static irqreturn_t rk_decom_irq_handler(int irq, void *priv)
209 {
210 struct rk_decom *rk_dec = priv;
211 u32 irq_status;
212 u32 decom_status;
213
214 irq_status = readl(rk_dec->regs + DECOM_ISR);
215 /* clear interrupts */
216 writel(irq_status, rk_dec->regs + DECOM_ISR);
217 if (irq_status & DECOM_STOP) {
218 decom_status = readl(rk_dec->regs + DECOM_STAT);
219 if (decom_status & DECOM_COMPLETE) {
220 g_decom_complete = true;
221 g_decom_data_len = readl(rk_dec->regs + DECOM_TSIZEH);
222 g_decom_data_len = (g_decom_data_len << 32) |
223 readl(rk_dec->regs + DECOM_TSIZEL);
224 wake_up(&g_decom_wait);
225 if (rk_dec->mem_start)
226 dev_info(rk_dec->dev,
227 "decom completed, decom_data_len = %llu\n",
228 g_decom_data_len);
229 } else {
230 dev_info(rk_dec->dev,
231 "decom failed, irq_status = 0x%x, decom_status = 0x%x, try again !\n",
232 irq_status, decom_status);
233
234 print_hex_dump(KERN_WARNING, "", DUMP_PREFIX_OFFSET,
235 32, 4, rk_dec->regs, 0x128, false);
236
237 if (g_decom_noblocking) {
238 dev_info(rk_dec->dev, "decom failed and exit in noblocking mode.");
239 writel(DECOM_DISABLE, rk_dec->regs + DECOM_ENR);
240 writel(0, g_decom->regs + DECOM_IEN);
241
242 g_decom_complete = true;
243 g_decom_data_len = 0;
244 g_decom_noblocking = false;
245 wake_up(&g_decom_wait);
246 } else {
247 writel(DECOM_ENABLE, rk_dec->regs + DECOM_ENR);
248 }
249 }
250 }
251
252 return IRQ_WAKE_THREAD;
253 }
254
rk_decom_irq_thread(int irq,void * priv)255 static irqreturn_t rk_decom_irq_thread(int irq, void *priv)
256 {
257 struct rk_decom *rk_dec = priv;
258
259 if (g_decom_complete) {
260 void *start, *end;
261
262 if (rk_dec->mem_start) {
263 /*
264 * Now it is safe to free reserve memory that
265 * store the origin ramdisk file
266 */
267 start = phys_to_virt(rk_dec->mem_start);
268 end = start + rk_dec->mem_size;
269 free_reserved_area(start, end, -1, "ramdisk gzip archive");
270 rk_dec->mem_start = 0;
271 }
272
273 clk_bulk_disable_unprepare(rk_dec->num_clocks, rk_dec->clocks);
274 }
275
276 return IRQ_HANDLED;
277 }
278
rockchip_decom_probe(struct platform_device * pdev)279 static int __init rockchip_decom_probe(struct platform_device *pdev)
280 {
281 struct rk_decom *rk_dec;
282 struct resource *res = NULL;
283 struct device *dev = &pdev->dev;
284 struct device_node *np = dev->of_node;
285 struct device_node *mem;
286 struct resource reg;
287 int ret = 0;
288
289 rk_dec = devm_kzalloc(dev, sizeof(*rk_dec), GFP_KERNEL);
290 if (!rk_dec)
291 return -ENOMEM;
292
293 rk_dec->dev = dev;
294 rk_dec->irq = platform_get_irq(pdev, 0);
295 if (rk_dec->irq < 0) {
296 dev_err(dev, "failed to get rk_dec irq\n");
297 return -ENOENT;
298 }
299
300 mem = of_parse_phandle(np, "memory-region", 0);
301 if (!mem) {
302 dev_err(dev, "missing \"memory-region\" property\n");
303 return -ENODEV;
304 }
305
306 ret = of_address_to_resource(mem, 0, ®);
307 of_node_put(mem);
308 if (ret) {
309 dev_err(dev, "missing \"reg\" property\n");
310 return -ENODEV;
311 }
312
313 rk_dec->mem_start = reg.start;
314 rk_dec->mem_size = resource_size(®);
315
316 rk_dec->num_clocks = devm_clk_bulk_get_all(dev, &rk_dec->clocks);
317 if (rk_dec->num_clocks < 0) {
318 dev_err(dev, "failed to get decompress clock\n");
319 return -ENODEV;
320 }
321
322 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
323 rk_dec->regs = devm_ioremap_resource(dev, res);
324 if (IS_ERR(rk_dec->regs)) {
325 ret = PTR_ERR(rk_dec->regs);
326 goto disable_clk;
327 }
328
329 dev_set_drvdata(dev, rk_dec);
330
331 rk_dec->reset = devm_reset_control_get_exclusive(dev, "dresetn");
332 if (IS_ERR(rk_dec->reset)) {
333 ret = PTR_ERR(rk_dec->reset);
334 if (ret != -ENOENT)
335 return ret;
336
337 dev_dbg(dev, "no reset control found\n");
338 rk_dec->reset = NULL;
339 }
340
341 ret = devm_request_threaded_irq(dev, rk_dec->irq, rk_decom_irq_handler,
342 rk_decom_irq_thread, IRQF_ONESHOT,
343 dev_name(dev), rk_dec);
344 if (ret < 0) {
345 dev_err(dev, "failed to attach decompress irq\n");
346 goto disable_clk;
347 }
348
349 g_decom = rk_dec;
350 wake_up(&decom_init_done);
351
352 return 0;
353
354 disable_clk:
355 clk_bulk_disable_unprepare(rk_dec->num_clocks, rk_dec->clocks);
356
357 return ret;
358 }
359
360 #ifdef CONFIG_OF
361 static const struct of_device_id rockchip_decom_dt_match[] = {
362 { .compatible = "rockchip,hw-decompress" },
363 {},
364 };
365 #endif
366
367 static struct platform_driver rk_decom_driver = {
368 .driver = {
369 .name = "rockchip_hw_decompress",
370 .of_match_table = rockchip_decom_dt_match,
371 },
372 };
373
rockchip_hw_decompress_init(void)374 static int __init rockchip_hw_decompress_init(void)
375 {
376 struct device_node *node;
377
378 node = of_find_matching_node(NULL, rockchip_decom_dt_match);
379 if (node) {
380 of_platform_device_create(node, NULL, NULL);
381 of_node_put(node);
382 return platform_driver_probe(&rk_decom_driver, rockchip_decom_probe);
383 }
384
385 return 0;
386 }
387
388 pure_initcall(rockchip_hw_decompress_init);
389