xref: /OK3568_Linux_fs/kernel/drivers/soc/renesas/rcar-rst.c (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun  * R-Car Gen1 RESET/WDT, R-Car Gen2, Gen3, and RZ/G RST Driver
4*4882a593Smuzhiyun  *
5*4882a593Smuzhiyun  * Copyright (C) 2016 Glider bvba
6*4882a593Smuzhiyun  */
7*4882a593Smuzhiyun 
8*4882a593Smuzhiyun #include <linux/err.h>
9*4882a593Smuzhiyun #include <linux/io.h>
10*4882a593Smuzhiyun #include <linux/of_address.h>
11*4882a593Smuzhiyun #include <linux/soc/renesas/rcar-rst.h>
12*4882a593Smuzhiyun 
13*4882a593Smuzhiyun #define WDTRSTCR_RESET		0xA55A0002
14*4882a593Smuzhiyun #define WDTRSTCR		0x0054
15*4882a593Smuzhiyun 
rcar_rst_enable_wdt_reset(void __iomem * base)16*4882a593Smuzhiyun static int rcar_rst_enable_wdt_reset(void __iomem *base)
17*4882a593Smuzhiyun {
18*4882a593Smuzhiyun 	iowrite32(WDTRSTCR_RESET, base + WDTRSTCR);
19*4882a593Smuzhiyun 	return 0;
20*4882a593Smuzhiyun }
21*4882a593Smuzhiyun 
22*4882a593Smuzhiyun struct rst_config {
23*4882a593Smuzhiyun 	unsigned int modemr;		/* Mode Monitoring Register Offset */
24*4882a593Smuzhiyun 	int (*configure)(void __iomem *base);	/* Platform specific config */
25*4882a593Smuzhiyun };
26*4882a593Smuzhiyun 
27*4882a593Smuzhiyun static const struct rst_config rcar_rst_gen1 __initconst = {
28*4882a593Smuzhiyun 	.modemr = 0x20,
29*4882a593Smuzhiyun };
30*4882a593Smuzhiyun 
31*4882a593Smuzhiyun static const struct rst_config rcar_rst_gen2 __initconst = {
32*4882a593Smuzhiyun 	.modemr = 0x60,
33*4882a593Smuzhiyun 	.configure = rcar_rst_enable_wdt_reset,
34*4882a593Smuzhiyun };
35*4882a593Smuzhiyun 
36*4882a593Smuzhiyun static const struct rst_config rcar_rst_gen3 __initconst = {
37*4882a593Smuzhiyun 	.modemr = 0x60,
38*4882a593Smuzhiyun };
39*4882a593Smuzhiyun 
40*4882a593Smuzhiyun static const struct rst_config rcar_rst_r8a779a0 __initconst = {
41*4882a593Smuzhiyun 	.modemr = 0x00,		/* MODEMR0 and it has CPG related bits */
42*4882a593Smuzhiyun };
43*4882a593Smuzhiyun 
44*4882a593Smuzhiyun static const struct of_device_id rcar_rst_matches[] __initconst = {
45*4882a593Smuzhiyun 	/* RZ/G1 is handled like R-Car Gen2 */
46*4882a593Smuzhiyun 	{ .compatible = "renesas,r8a7742-rst", .data = &rcar_rst_gen2 },
47*4882a593Smuzhiyun 	{ .compatible = "renesas,r8a7743-rst", .data = &rcar_rst_gen2 },
48*4882a593Smuzhiyun 	{ .compatible = "renesas,r8a7744-rst", .data = &rcar_rst_gen2 },
49*4882a593Smuzhiyun 	{ .compatible = "renesas,r8a7745-rst", .data = &rcar_rst_gen2 },
50*4882a593Smuzhiyun 	{ .compatible = "renesas,r8a77470-rst", .data = &rcar_rst_gen2 },
51*4882a593Smuzhiyun 	/* RZ/G2 is handled like R-Car Gen3 */
52*4882a593Smuzhiyun 	{ .compatible = "renesas,r8a774a1-rst", .data = &rcar_rst_gen3 },
53*4882a593Smuzhiyun 	{ .compatible = "renesas,r8a774b1-rst", .data = &rcar_rst_gen3 },
54*4882a593Smuzhiyun 	{ .compatible = "renesas,r8a774c0-rst", .data = &rcar_rst_gen3 },
55*4882a593Smuzhiyun 	{ .compatible = "renesas,r8a774e1-rst", .data = &rcar_rst_gen3 },
56*4882a593Smuzhiyun 	/* R-Car Gen1 */
57*4882a593Smuzhiyun 	{ .compatible = "renesas,r8a7778-reset-wdt", .data = &rcar_rst_gen1 },
58*4882a593Smuzhiyun 	{ .compatible = "renesas,r8a7779-reset-wdt", .data = &rcar_rst_gen1 },
59*4882a593Smuzhiyun 	/* R-Car Gen2 */
60*4882a593Smuzhiyun 	{ .compatible = "renesas,r8a7790-rst", .data = &rcar_rst_gen2 },
61*4882a593Smuzhiyun 	{ .compatible = "renesas,r8a7791-rst", .data = &rcar_rst_gen2 },
62*4882a593Smuzhiyun 	{ .compatible = "renesas,r8a7792-rst", .data = &rcar_rst_gen2 },
63*4882a593Smuzhiyun 	{ .compatible = "renesas,r8a7793-rst", .data = &rcar_rst_gen2 },
64*4882a593Smuzhiyun 	{ .compatible = "renesas,r8a7794-rst", .data = &rcar_rst_gen2 },
65*4882a593Smuzhiyun 	/* R-Car Gen3 */
66*4882a593Smuzhiyun 	{ .compatible = "renesas,r8a7795-rst", .data = &rcar_rst_gen3 },
67*4882a593Smuzhiyun 	{ .compatible = "renesas,r8a7796-rst", .data = &rcar_rst_gen3 },
68*4882a593Smuzhiyun 	{ .compatible = "renesas,r8a77961-rst", .data = &rcar_rst_gen3 },
69*4882a593Smuzhiyun 	{ .compatible = "renesas,r8a77965-rst", .data = &rcar_rst_gen3 },
70*4882a593Smuzhiyun 	{ .compatible = "renesas,r8a77970-rst", .data = &rcar_rst_gen3 },
71*4882a593Smuzhiyun 	{ .compatible = "renesas,r8a77980-rst", .data = &rcar_rst_gen3 },
72*4882a593Smuzhiyun 	{ .compatible = "renesas,r8a77990-rst", .data = &rcar_rst_gen3 },
73*4882a593Smuzhiyun 	{ .compatible = "renesas,r8a77995-rst", .data = &rcar_rst_gen3 },
74*4882a593Smuzhiyun 	/* R-Car V3U */
75*4882a593Smuzhiyun 	{ .compatible = "renesas,r8a779a0-rst", .data = &rcar_rst_r8a779a0 },
76*4882a593Smuzhiyun 	{ /* sentinel */ }
77*4882a593Smuzhiyun };
78*4882a593Smuzhiyun 
79*4882a593Smuzhiyun static void __iomem *rcar_rst_base __initdata;
80*4882a593Smuzhiyun static u32 saved_mode __initdata;
81*4882a593Smuzhiyun 
rcar_rst_init(void)82*4882a593Smuzhiyun static int __init rcar_rst_init(void)
83*4882a593Smuzhiyun {
84*4882a593Smuzhiyun 	const struct of_device_id *match;
85*4882a593Smuzhiyun 	const struct rst_config *cfg;
86*4882a593Smuzhiyun 	struct device_node *np;
87*4882a593Smuzhiyun 	void __iomem *base;
88*4882a593Smuzhiyun 	int error = 0;
89*4882a593Smuzhiyun 
90*4882a593Smuzhiyun 	np = of_find_matching_node_and_match(NULL, rcar_rst_matches, &match);
91*4882a593Smuzhiyun 	if (!np)
92*4882a593Smuzhiyun 		return -ENODEV;
93*4882a593Smuzhiyun 
94*4882a593Smuzhiyun 	base = of_iomap(np, 0);
95*4882a593Smuzhiyun 	if (!base) {
96*4882a593Smuzhiyun 		pr_warn("%pOF: Cannot map regs\n", np);
97*4882a593Smuzhiyun 		error = -ENOMEM;
98*4882a593Smuzhiyun 		goto out_put;
99*4882a593Smuzhiyun 	}
100*4882a593Smuzhiyun 
101*4882a593Smuzhiyun 	rcar_rst_base = base;
102*4882a593Smuzhiyun 	cfg = match->data;
103*4882a593Smuzhiyun 	saved_mode = ioread32(base + cfg->modemr);
104*4882a593Smuzhiyun 	if (cfg->configure) {
105*4882a593Smuzhiyun 		error = cfg->configure(base);
106*4882a593Smuzhiyun 		if (error) {
107*4882a593Smuzhiyun 			pr_warn("%pOF: Cannot run SoC specific configuration\n",
108*4882a593Smuzhiyun 				np);
109*4882a593Smuzhiyun 			goto out_put;
110*4882a593Smuzhiyun 		}
111*4882a593Smuzhiyun 	}
112*4882a593Smuzhiyun 
113*4882a593Smuzhiyun 	pr_debug("%pOF: MODE = 0x%08x\n", np, saved_mode);
114*4882a593Smuzhiyun 
115*4882a593Smuzhiyun out_put:
116*4882a593Smuzhiyun 	of_node_put(np);
117*4882a593Smuzhiyun 	return error;
118*4882a593Smuzhiyun }
119*4882a593Smuzhiyun 
rcar_rst_read_mode_pins(u32 * mode)120*4882a593Smuzhiyun int __init rcar_rst_read_mode_pins(u32 *mode)
121*4882a593Smuzhiyun {
122*4882a593Smuzhiyun 	int error;
123*4882a593Smuzhiyun 
124*4882a593Smuzhiyun 	if (!rcar_rst_base) {
125*4882a593Smuzhiyun 		error = rcar_rst_init();
126*4882a593Smuzhiyun 		if (error)
127*4882a593Smuzhiyun 			return error;
128*4882a593Smuzhiyun 	}
129*4882a593Smuzhiyun 
130*4882a593Smuzhiyun 	*mode = saved_mode;
131*4882a593Smuzhiyun 	return 0;
132*4882a593Smuzhiyun }
133