xref: /OK3568_Linux_fs/kernel/drivers/soc/renesas/r8a7742-sysc.c (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun  * Renesas RZ/G1H System Controller
4*4882a593Smuzhiyun  *
5*4882a593Smuzhiyun  * Copyright (C) 2020 Renesas Electronics Corp.
6*4882a593Smuzhiyun  */
7*4882a593Smuzhiyun 
8*4882a593Smuzhiyun #include <linux/kernel.h>
9*4882a593Smuzhiyun 
10*4882a593Smuzhiyun #include <dt-bindings/power/r8a7742-sysc.h>
11*4882a593Smuzhiyun 
12*4882a593Smuzhiyun #include "rcar-sysc.h"
13*4882a593Smuzhiyun 
14*4882a593Smuzhiyun static const struct rcar_sysc_area r8a7742_areas[] __initconst = {
15*4882a593Smuzhiyun 	{ "always-on",	    0, 0, R8A7742_PD_ALWAYS_ON,	-1, PD_ALWAYS_ON },
16*4882a593Smuzhiyun 	{ "ca15-scu",	0x180, 0, R8A7742_PD_CA15_SCU,	R8A7742_PD_ALWAYS_ON,
17*4882a593Smuzhiyun 	  PD_SCU },
18*4882a593Smuzhiyun 	{ "ca15-cpu0",	 0x40, 0, R8A7742_PD_CA15_CPU0,	R8A7742_PD_CA15_SCU,
19*4882a593Smuzhiyun 	  PD_CPU_NOCR },
20*4882a593Smuzhiyun 	{ "ca15-cpu1",	 0x40, 1, R8A7742_PD_CA15_CPU1,	R8A7742_PD_CA15_SCU,
21*4882a593Smuzhiyun 	  PD_CPU_NOCR },
22*4882a593Smuzhiyun 	{ "ca15-cpu2",	 0x40, 2, R8A7742_PD_CA15_CPU2,	R8A7742_PD_CA15_SCU,
23*4882a593Smuzhiyun 	  PD_CPU_NOCR },
24*4882a593Smuzhiyun 	{ "ca15-cpu3",	 0x40, 3, R8A7742_PD_CA15_CPU3,	R8A7742_PD_CA15_SCU,
25*4882a593Smuzhiyun 	  PD_CPU_NOCR },
26*4882a593Smuzhiyun 	{ "ca7-scu",	0x100, 0, R8A7742_PD_CA7_SCU,	R8A7742_PD_ALWAYS_ON,
27*4882a593Smuzhiyun 	  PD_SCU },
28*4882a593Smuzhiyun 	{ "ca7-cpu0",	0x1c0, 0, R8A7742_PD_CA7_CPU0,	R8A7742_PD_CA7_SCU,
29*4882a593Smuzhiyun 	  PD_CPU_NOCR },
30*4882a593Smuzhiyun 	{ "ca7-cpu1",	0x1c0, 1, R8A7742_PD_CA7_CPU1,	R8A7742_PD_CA7_SCU,
31*4882a593Smuzhiyun 	  PD_CPU_NOCR },
32*4882a593Smuzhiyun 	{ "ca7-cpu2",	0x1c0, 2, R8A7742_PD_CA7_CPU2,	R8A7742_PD_CA7_SCU,
33*4882a593Smuzhiyun 	  PD_CPU_NOCR },
34*4882a593Smuzhiyun 	{ "ca7-cpu3",	0x1c0, 3, R8A7742_PD_CA7_CPU3,	R8A7742_PD_CA7_SCU,
35*4882a593Smuzhiyun 	  PD_CPU_NOCR },
36*4882a593Smuzhiyun 	{ "rgx",	 0xc0, 0, R8A7742_PD_RGX,	R8A7742_PD_ALWAYS_ON },
37*4882a593Smuzhiyun };
38*4882a593Smuzhiyun 
39*4882a593Smuzhiyun const struct rcar_sysc_info r8a7742_sysc_info __initconst = {
40*4882a593Smuzhiyun 	.areas = r8a7742_areas,
41*4882a593Smuzhiyun 	.num_areas = ARRAY_SIZE(r8a7742_areas),
42*4882a593Smuzhiyun };
43