xref: /OK3568_Linux_fs/kernel/drivers/soc/qcom/smp2p.c (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0-only
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun  * Copyright (c) 2015, Sony Mobile Communications AB.
4*4882a593Smuzhiyun  * Copyright (c) 2012-2013, The Linux Foundation. All rights reserved.
5*4882a593Smuzhiyun  */
6*4882a593Smuzhiyun 
7*4882a593Smuzhiyun #include <linux/interrupt.h>
8*4882a593Smuzhiyun #include <linux/list.h>
9*4882a593Smuzhiyun #include <linux/io.h>
10*4882a593Smuzhiyun #include <linux/of.h>
11*4882a593Smuzhiyun #include <linux/irq.h>
12*4882a593Smuzhiyun #include <linux/irqdomain.h>
13*4882a593Smuzhiyun #include <linux/mailbox_client.h>
14*4882a593Smuzhiyun #include <linux/mfd/syscon.h>
15*4882a593Smuzhiyun #include <linux/module.h>
16*4882a593Smuzhiyun #include <linux/platform_device.h>
17*4882a593Smuzhiyun #include <linux/regmap.h>
18*4882a593Smuzhiyun #include <linux/soc/qcom/smem.h>
19*4882a593Smuzhiyun #include <linux/soc/qcom/smem_state.h>
20*4882a593Smuzhiyun #include <linux/spinlock.h>
21*4882a593Smuzhiyun 
22*4882a593Smuzhiyun /*
23*4882a593Smuzhiyun  * The Shared Memory Point to Point (SMP2P) protocol facilitates communication
24*4882a593Smuzhiyun  * of a single 32-bit value between two processors.  Each value has a single
25*4882a593Smuzhiyun  * writer (the local side) and a single reader (the remote side). Values are
26*4882a593Smuzhiyun  * uniquely identified in the system by the directed edge (local processor ID
27*4882a593Smuzhiyun  * to remote processor ID) and a string identifier.
28*4882a593Smuzhiyun  *
29*4882a593Smuzhiyun  * Each processor is responsible for creating the outgoing SMEM items and each
30*4882a593Smuzhiyun  * item is writable by the local processor and readable by the remote
31*4882a593Smuzhiyun  * processor.  By using two separate SMEM items that are single-reader and
32*4882a593Smuzhiyun  * single-writer, SMP2P does not require any remote locking mechanisms.
33*4882a593Smuzhiyun  *
34*4882a593Smuzhiyun  * The driver uses the Linux GPIO and interrupt framework to expose a virtual
35*4882a593Smuzhiyun  * GPIO for each outbound entry and a virtual interrupt controller for each
36*4882a593Smuzhiyun  * inbound entry.
37*4882a593Smuzhiyun  */
38*4882a593Smuzhiyun 
39*4882a593Smuzhiyun #define SMP2P_MAX_ENTRY 16
40*4882a593Smuzhiyun #define SMP2P_MAX_ENTRY_NAME 16
41*4882a593Smuzhiyun 
42*4882a593Smuzhiyun #define SMP2P_FEATURE_SSR_ACK 0x1
43*4882a593Smuzhiyun 
44*4882a593Smuzhiyun #define SMP2P_MAGIC 0x504d5324
45*4882a593Smuzhiyun 
46*4882a593Smuzhiyun /**
47*4882a593Smuzhiyun  * struct smp2p_smem_item - in memory communication structure
48*4882a593Smuzhiyun  * @magic:		magic number
49*4882a593Smuzhiyun  * @version:		version - must be 1
50*4882a593Smuzhiyun  * @features:		features flag - currently unused
51*4882a593Smuzhiyun  * @local_pid:		processor id of sending end
52*4882a593Smuzhiyun  * @remote_pid:		processor id of receiving end
53*4882a593Smuzhiyun  * @total_entries:	number of entries - always SMP2P_MAX_ENTRY
54*4882a593Smuzhiyun  * @valid_entries:	number of allocated entries
55*4882a593Smuzhiyun  * @flags:
56*4882a593Smuzhiyun  * @entries:		individual communication entries
57*4882a593Smuzhiyun  *     @name:		name of the entry
58*4882a593Smuzhiyun  *     @value:		content of the entry
59*4882a593Smuzhiyun  */
60*4882a593Smuzhiyun struct smp2p_smem_item {
61*4882a593Smuzhiyun 	u32 magic;
62*4882a593Smuzhiyun 	u8 version;
63*4882a593Smuzhiyun 	unsigned features:24;
64*4882a593Smuzhiyun 	u16 local_pid;
65*4882a593Smuzhiyun 	u16 remote_pid;
66*4882a593Smuzhiyun 	u16 total_entries;
67*4882a593Smuzhiyun 	u16 valid_entries;
68*4882a593Smuzhiyun 	u32 flags;
69*4882a593Smuzhiyun 
70*4882a593Smuzhiyun 	struct {
71*4882a593Smuzhiyun 		u8 name[SMP2P_MAX_ENTRY_NAME];
72*4882a593Smuzhiyun 		u32 value;
73*4882a593Smuzhiyun 	} entries[SMP2P_MAX_ENTRY];
74*4882a593Smuzhiyun } __packed;
75*4882a593Smuzhiyun 
76*4882a593Smuzhiyun /**
77*4882a593Smuzhiyun  * struct smp2p_entry - driver context matching one entry
78*4882a593Smuzhiyun  * @node:	list entry to keep track of allocated entries
79*4882a593Smuzhiyun  * @smp2p:	reference to the device driver context
80*4882a593Smuzhiyun  * @name:	name of the entry, to match against smp2p_smem_item
81*4882a593Smuzhiyun  * @value:	pointer to smp2p_smem_item entry value
82*4882a593Smuzhiyun  * @last_value:	last handled value
83*4882a593Smuzhiyun  * @domain:	irq_domain for inbound entries
84*4882a593Smuzhiyun  * @irq_enabled:bitmap to track enabled irq bits
85*4882a593Smuzhiyun  * @irq_rising:	bitmap to mark irq bits for rising detection
86*4882a593Smuzhiyun  * @irq_falling:bitmap to mark irq bits for falling detection
87*4882a593Smuzhiyun  * @state:	smem state handle
88*4882a593Smuzhiyun  * @lock:	spinlock to protect read-modify-write of the value
89*4882a593Smuzhiyun  */
90*4882a593Smuzhiyun struct smp2p_entry {
91*4882a593Smuzhiyun 	struct list_head node;
92*4882a593Smuzhiyun 	struct qcom_smp2p *smp2p;
93*4882a593Smuzhiyun 
94*4882a593Smuzhiyun 	const char *name;
95*4882a593Smuzhiyun 	u32 *value;
96*4882a593Smuzhiyun 	u32 last_value;
97*4882a593Smuzhiyun 
98*4882a593Smuzhiyun 	struct irq_domain *domain;
99*4882a593Smuzhiyun 	DECLARE_BITMAP(irq_enabled, 32);
100*4882a593Smuzhiyun 	DECLARE_BITMAP(irq_rising, 32);
101*4882a593Smuzhiyun 	DECLARE_BITMAP(irq_falling, 32);
102*4882a593Smuzhiyun 
103*4882a593Smuzhiyun 	struct qcom_smem_state *state;
104*4882a593Smuzhiyun 
105*4882a593Smuzhiyun 	spinlock_t lock;
106*4882a593Smuzhiyun };
107*4882a593Smuzhiyun 
108*4882a593Smuzhiyun #define SMP2P_INBOUND	0
109*4882a593Smuzhiyun #define SMP2P_OUTBOUND	1
110*4882a593Smuzhiyun 
111*4882a593Smuzhiyun /**
112*4882a593Smuzhiyun  * struct qcom_smp2p - device driver context
113*4882a593Smuzhiyun  * @dev:	device driver handle
114*4882a593Smuzhiyun  * @in:		pointer to the inbound smem item
115*4882a593Smuzhiyun  * @smem_items:	ids of the two smem items
116*4882a593Smuzhiyun  * @valid_entries: already scanned inbound entries
117*4882a593Smuzhiyun  * @local_pid:	processor id of the inbound edge
118*4882a593Smuzhiyun  * @remote_pid:	processor id of the outbound edge
119*4882a593Smuzhiyun  * @ipc_regmap:	regmap for the outbound ipc
120*4882a593Smuzhiyun  * @ipc_offset:	offset within the regmap
121*4882a593Smuzhiyun  * @ipc_bit:	bit in regmap@offset to kick to signal remote processor
122*4882a593Smuzhiyun  * @mbox_client: mailbox client handle
123*4882a593Smuzhiyun  * @mbox_chan:	apcs ipc mailbox channel handle
124*4882a593Smuzhiyun  * @inbound:	list of inbound entries
125*4882a593Smuzhiyun  * @outbound:	list of outbound entries
126*4882a593Smuzhiyun  */
127*4882a593Smuzhiyun struct qcom_smp2p {
128*4882a593Smuzhiyun 	struct device *dev;
129*4882a593Smuzhiyun 
130*4882a593Smuzhiyun 	struct smp2p_smem_item *in;
131*4882a593Smuzhiyun 	struct smp2p_smem_item *out;
132*4882a593Smuzhiyun 
133*4882a593Smuzhiyun 	unsigned smem_items[SMP2P_OUTBOUND + 1];
134*4882a593Smuzhiyun 
135*4882a593Smuzhiyun 	unsigned valid_entries;
136*4882a593Smuzhiyun 
137*4882a593Smuzhiyun 	unsigned local_pid;
138*4882a593Smuzhiyun 	unsigned remote_pid;
139*4882a593Smuzhiyun 
140*4882a593Smuzhiyun 	struct regmap *ipc_regmap;
141*4882a593Smuzhiyun 	int ipc_offset;
142*4882a593Smuzhiyun 	int ipc_bit;
143*4882a593Smuzhiyun 
144*4882a593Smuzhiyun 	struct mbox_client mbox_client;
145*4882a593Smuzhiyun 	struct mbox_chan *mbox_chan;
146*4882a593Smuzhiyun 
147*4882a593Smuzhiyun 	struct list_head inbound;
148*4882a593Smuzhiyun 	struct list_head outbound;
149*4882a593Smuzhiyun };
150*4882a593Smuzhiyun 
qcom_smp2p_kick(struct qcom_smp2p * smp2p)151*4882a593Smuzhiyun static void qcom_smp2p_kick(struct qcom_smp2p *smp2p)
152*4882a593Smuzhiyun {
153*4882a593Smuzhiyun 	/* Make sure any updated data is written before the kick */
154*4882a593Smuzhiyun 	wmb();
155*4882a593Smuzhiyun 
156*4882a593Smuzhiyun 	if (smp2p->mbox_chan) {
157*4882a593Smuzhiyun 		mbox_send_message(smp2p->mbox_chan, NULL);
158*4882a593Smuzhiyun 		mbox_client_txdone(smp2p->mbox_chan, 0);
159*4882a593Smuzhiyun 	} else {
160*4882a593Smuzhiyun 		regmap_write(smp2p->ipc_regmap, smp2p->ipc_offset, BIT(smp2p->ipc_bit));
161*4882a593Smuzhiyun 	}
162*4882a593Smuzhiyun }
163*4882a593Smuzhiyun 
164*4882a593Smuzhiyun /**
165*4882a593Smuzhiyun  * qcom_smp2p_intr() - interrupt handler for incoming notifications
166*4882a593Smuzhiyun  * @irq:	unused
167*4882a593Smuzhiyun  * @data:	smp2p driver context
168*4882a593Smuzhiyun  *
169*4882a593Smuzhiyun  * Handle notifications from the remote side to handle newly allocated entries
170*4882a593Smuzhiyun  * or any changes to the state bits of existing entries.
171*4882a593Smuzhiyun  */
qcom_smp2p_intr(int irq,void * data)172*4882a593Smuzhiyun static irqreturn_t qcom_smp2p_intr(int irq, void *data)
173*4882a593Smuzhiyun {
174*4882a593Smuzhiyun 	struct smp2p_smem_item *in;
175*4882a593Smuzhiyun 	struct smp2p_entry *entry;
176*4882a593Smuzhiyun 	struct qcom_smp2p *smp2p = data;
177*4882a593Smuzhiyun 	unsigned smem_id = smp2p->smem_items[SMP2P_INBOUND];
178*4882a593Smuzhiyun 	unsigned pid = smp2p->remote_pid;
179*4882a593Smuzhiyun 	size_t size;
180*4882a593Smuzhiyun 	int irq_pin;
181*4882a593Smuzhiyun 	u32 status;
182*4882a593Smuzhiyun 	char buf[SMP2P_MAX_ENTRY_NAME];
183*4882a593Smuzhiyun 	u32 val;
184*4882a593Smuzhiyun 	int i;
185*4882a593Smuzhiyun 
186*4882a593Smuzhiyun 	in = smp2p->in;
187*4882a593Smuzhiyun 
188*4882a593Smuzhiyun 	/* Acquire smem item, if not already found */
189*4882a593Smuzhiyun 	if (!in) {
190*4882a593Smuzhiyun 		in = qcom_smem_get(pid, smem_id, &size);
191*4882a593Smuzhiyun 		if (IS_ERR(in)) {
192*4882a593Smuzhiyun 			dev_err(smp2p->dev,
193*4882a593Smuzhiyun 				"Unable to acquire remote smp2p item\n");
194*4882a593Smuzhiyun 			return IRQ_HANDLED;
195*4882a593Smuzhiyun 		}
196*4882a593Smuzhiyun 
197*4882a593Smuzhiyun 		smp2p->in = in;
198*4882a593Smuzhiyun 	}
199*4882a593Smuzhiyun 
200*4882a593Smuzhiyun 	/* Match newly created entries */
201*4882a593Smuzhiyun 	for (i = smp2p->valid_entries; i < in->valid_entries; i++) {
202*4882a593Smuzhiyun 		list_for_each_entry(entry, &smp2p->inbound, node) {
203*4882a593Smuzhiyun 			memcpy(buf, in->entries[i].name, sizeof(buf));
204*4882a593Smuzhiyun 			if (!strcmp(buf, entry->name)) {
205*4882a593Smuzhiyun 				entry->value = &in->entries[i].value;
206*4882a593Smuzhiyun 				break;
207*4882a593Smuzhiyun 			}
208*4882a593Smuzhiyun 		}
209*4882a593Smuzhiyun 	}
210*4882a593Smuzhiyun 	smp2p->valid_entries = i;
211*4882a593Smuzhiyun 
212*4882a593Smuzhiyun 	/* Fire interrupts based on any value changes */
213*4882a593Smuzhiyun 	list_for_each_entry(entry, &smp2p->inbound, node) {
214*4882a593Smuzhiyun 		/* Ignore entries not yet allocated by the remote side */
215*4882a593Smuzhiyun 		if (!entry->value)
216*4882a593Smuzhiyun 			continue;
217*4882a593Smuzhiyun 
218*4882a593Smuzhiyun 		val = readl(entry->value);
219*4882a593Smuzhiyun 
220*4882a593Smuzhiyun 		status = val ^ entry->last_value;
221*4882a593Smuzhiyun 		entry->last_value = val;
222*4882a593Smuzhiyun 
223*4882a593Smuzhiyun 		/* No changes of this entry? */
224*4882a593Smuzhiyun 		if (!status)
225*4882a593Smuzhiyun 			continue;
226*4882a593Smuzhiyun 
227*4882a593Smuzhiyun 		for_each_set_bit(i, entry->irq_enabled, 32) {
228*4882a593Smuzhiyun 			if (!(status & BIT(i)))
229*4882a593Smuzhiyun 				continue;
230*4882a593Smuzhiyun 
231*4882a593Smuzhiyun 			if ((val & BIT(i) && test_bit(i, entry->irq_rising)) ||
232*4882a593Smuzhiyun 			    (!(val & BIT(i)) && test_bit(i, entry->irq_falling))) {
233*4882a593Smuzhiyun 				irq_pin = irq_find_mapping(entry->domain, i);
234*4882a593Smuzhiyun 				handle_nested_irq(irq_pin);
235*4882a593Smuzhiyun 			}
236*4882a593Smuzhiyun 		}
237*4882a593Smuzhiyun 	}
238*4882a593Smuzhiyun 
239*4882a593Smuzhiyun 	return IRQ_HANDLED;
240*4882a593Smuzhiyun }
241*4882a593Smuzhiyun 
smp2p_mask_irq(struct irq_data * irqd)242*4882a593Smuzhiyun static void smp2p_mask_irq(struct irq_data *irqd)
243*4882a593Smuzhiyun {
244*4882a593Smuzhiyun 	struct smp2p_entry *entry = irq_data_get_irq_chip_data(irqd);
245*4882a593Smuzhiyun 	irq_hw_number_t irq = irqd_to_hwirq(irqd);
246*4882a593Smuzhiyun 
247*4882a593Smuzhiyun 	clear_bit(irq, entry->irq_enabled);
248*4882a593Smuzhiyun }
249*4882a593Smuzhiyun 
smp2p_unmask_irq(struct irq_data * irqd)250*4882a593Smuzhiyun static void smp2p_unmask_irq(struct irq_data *irqd)
251*4882a593Smuzhiyun {
252*4882a593Smuzhiyun 	struct smp2p_entry *entry = irq_data_get_irq_chip_data(irqd);
253*4882a593Smuzhiyun 	irq_hw_number_t irq = irqd_to_hwirq(irqd);
254*4882a593Smuzhiyun 
255*4882a593Smuzhiyun 	set_bit(irq, entry->irq_enabled);
256*4882a593Smuzhiyun }
257*4882a593Smuzhiyun 
smp2p_set_irq_type(struct irq_data * irqd,unsigned int type)258*4882a593Smuzhiyun static int smp2p_set_irq_type(struct irq_data *irqd, unsigned int type)
259*4882a593Smuzhiyun {
260*4882a593Smuzhiyun 	struct smp2p_entry *entry = irq_data_get_irq_chip_data(irqd);
261*4882a593Smuzhiyun 	irq_hw_number_t irq = irqd_to_hwirq(irqd);
262*4882a593Smuzhiyun 
263*4882a593Smuzhiyun 	if (!(type & IRQ_TYPE_EDGE_BOTH))
264*4882a593Smuzhiyun 		return -EINVAL;
265*4882a593Smuzhiyun 
266*4882a593Smuzhiyun 	if (type & IRQ_TYPE_EDGE_RISING)
267*4882a593Smuzhiyun 		set_bit(irq, entry->irq_rising);
268*4882a593Smuzhiyun 	else
269*4882a593Smuzhiyun 		clear_bit(irq, entry->irq_rising);
270*4882a593Smuzhiyun 
271*4882a593Smuzhiyun 	if (type & IRQ_TYPE_EDGE_FALLING)
272*4882a593Smuzhiyun 		set_bit(irq, entry->irq_falling);
273*4882a593Smuzhiyun 	else
274*4882a593Smuzhiyun 		clear_bit(irq, entry->irq_falling);
275*4882a593Smuzhiyun 
276*4882a593Smuzhiyun 	return 0;
277*4882a593Smuzhiyun }
278*4882a593Smuzhiyun 
279*4882a593Smuzhiyun static struct irq_chip smp2p_irq_chip = {
280*4882a593Smuzhiyun 	.name           = "smp2p",
281*4882a593Smuzhiyun 	.irq_mask       = smp2p_mask_irq,
282*4882a593Smuzhiyun 	.irq_unmask     = smp2p_unmask_irq,
283*4882a593Smuzhiyun 	.irq_set_type	= smp2p_set_irq_type,
284*4882a593Smuzhiyun };
285*4882a593Smuzhiyun 
smp2p_irq_map(struct irq_domain * d,unsigned int irq,irq_hw_number_t hw)286*4882a593Smuzhiyun static int smp2p_irq_map(struct irq_domain *d,
287*4882a593Smuzhiyun 			 unsigned int irq,
288*4882a593Smuzhiyun 			 irq_hw_number_t hw)
289*4882a593Smuzhiyun {
290*4882a593Smuzhiyun 	struct smp2p_entry *entry = d->host_data;
291*4882a593Smuzhiyun 
292*4882a593Smuzhiyun 	irq_set_chip_and_handler(irq, &smp2p_irq_chip, handle_level_irq);
293*4882a593Smuzhiyun 	irq_set_chip_data(irq, entry);
294*4882a593Smuzhiyun 	irq_set_nested_thread(irq, 1);
295*4882a593Smuzhiyun 	irq_set_noprobe(irq);
296*4882a593Smuzhiyun 
297*4882a593Smuzhiyun 	return 0;
298*4882a593Smuzhiyun }
299*4882a593Smuzhiyun 
300*4882a593Smuzhiyun static const struct irq_domain_ops smp2p_irq_ops = {
301*4882a593Smuzhiyun 	.map = smp2p_irq_map,
302*4882a593Smuzhiyun 	.xlate = irq_domain_xlate_twocell,
303*4882a593Smuzhiyun };
304*4882a593Smuzhiyun 
qcom_smp2p_inbound_entry(struct qcom_smp2p * smp2p,struct smp2p_entry * entry,struct device_node * node)305*4882a593Smuzhiyun static int qcom_smp2p_inbound_entry(struct qcom_smp2p *smp2p,
306*4882a593Smuzhiyun 				    struct smp2p_entry *entry,
307*4882a593Smuzhiyun 				    struct device_node *node)
308*4882a593Smuzhiyun {
309*4882a593Smuzhiyun 	entry->domain = irq_domain_add_linear(node, 32, &smp2p_irq_ops, entry);
310*4882a593Smuzhiyun 	if (!entry->domain) {
311*4882a593Smuzhiyun 		dev_err(smp2p->dev, "failed to add irq_domain\n");
312*4882a593Smuzhiyun 		return -ENOMEM;
313*4882a593Smuzhiyun 	}
314*4882a593Smuzhiyun 
315*4882a593Smuzhiyun 	return 0;
316*4882a593Smuzhiyun }
317*4882a593Smuzhiyun 
smp2p_update_bits(void * data,u32 mask,u32 value)318*4882a593Smuzhiyun static int smp2p_update_bits(void *data, u32 mask, u32 value)
319*4882a593Smuzhiyun {
320*4882a593Smuzhiyun 	struct smp2p_entry *entry = data;
321*4882a593Smuzhiyun 	unsigned long flags;
322*4882a593Smuzhiyun 	u32 orig;
323*4882a593Smuzhiyun 	u32 val;
324*4882a593Smuzhiyun 
325*4882a593Smuzhiyun 	spin_lock_irqsave(&entry->lock, flags);
326*4882a593Smuzhiyun 	val = orig = readl(entry->value);
327*4882a593Smuzhiyun 	val &= ~mask;
328*4882a593Smuzhiyun 	val |= value;
329*4882a593Smuzhiyun 	writel(val, entry->value);
330*4882a593Smuzhiyun 	spin_unlock_irqrestore(&entry->lock, flags);
331*4882a593Smuzhiyun 
332*4882a593Smuzhiyun 	if (val != orig)
333*4882a593Smuzhiyun 		qcom_smp2p_kick(entry->smp2p);
334*4882a593Smuzhiyun 
335*4882a593Smuzhiyun 	return 0;
336*4882a593Smuzhiyun }
337*4882a593Smuzhiyun 
338*4882a593Smuzhiyun static const struct qcom_smem_state_ops smp2p_state_ops = {
339*4882a593Smuzhiyun 	.update_bits = smp2p_update_bits,
340*4882a593Smuzhiyun };
341*4882a593Smuzhiyun 
qcom_smp2p_outbound_entry(struct qcom_smp2p * smp2p,struct smp2p_entry * entry,struct device_node * node)342*4882a593Smuzhiyun static int qcom_smp2p_outbound_entry(struct qcom_smp2p *smp2p,
343*4882a593Smuzhiyun 				     struct smp2p_entry *entry,
344*4882a593Smuzhiyun 				     struct device_node *node)
345*4882a593Smuzhiyun {
346*4882a593Smuzhiyun 	struct smp2p_smem_item *out = smp2p->out;
347*4882a593Smuzhiyun 	char buf[SMP2P_MAX_ENTRY_NAME] = {};
348*4882a593Smuzhiyun 
349*4882a593Smuzhiyun 	/* Allocate an entry from the smem item */
350*4882a593Smuzhiyun 	strlcpy(buf, entry->name, SMP2P_MAX_ENTRY_NAME);
351*4882a593Smuzhiyun 	memcpy(out->entries[out->valid_entries].name, buf, SMP2P_MAX_ENTRY_NAME);
352*4882a593Smuzhiyun 
353*4882a593Smuzhiyun 	/* Make the logical entry reference the physical value */
354*4882a593Smuzhiyun 	entry->value = &out->entries[out->valid_entries].value;
355*4882a593Smuzhiyun 
356*4882a593Smuzhiyun 	out->valid_entries++;
357*4882a593Smuzhiyun 
358*4882a593Smuzhiyun 	entry->state = qcom_smem_state_register(node, &smp2p_state_ops, entry);
359*4882a593Smuzhiyun 	if (IS_ERR(entry->state)) {
360*4882a593Smuzhiyun 		dev_err(smp2p->dev, "failed to register qcom_smem_state\n");
361*4882a593Smuzhiyun 		return PTR_ERR(entry->state);
362*4882a593Smuzhiyun 	}
363*4882a593Smuzhiyun 
364*4882a593Smuzhiyun 	return 0;
365*4882a593Smuzhiyun }
366*4882a593Smuzhiyun 
qcom_smp2p_alloc_outbound_item(struct qcom_smp2p * smp2p)367*4882a593Smuzhiyun static int qcom_smp2p_alloc_outbound_item(struct qcom_smp2p *smp2p)
368*4882a593Smuzhiyun {
369*4882a593Smuzhiyun 	struct smp2p_smem_item *out;
370*4882a593Smuzhiyun 	unsigned smem_id = smp2p->smem_items[SMP2P_OUTBOUND];
371*4882a593Smuzhiyun 	unsigned pid = smp2p->remote_pid;
372*4882a593Smuzhiyun 	int ret;
373*4882a593Smuzhiyun 
374*4882a593Smuzhiyun 	ret = qcom_smem_alloc(pid, smem_id, sizeof(*out));
375*4882a593Smuzhiyun 	if (ret < 0 && ret != -EEXIST) {
376*4882a593Smuzhiyun 		if (ret != -EPROBE_DEFER)
377*4882a593Smuzhiyun 			dev_err(smp2p->dev,
378*4882a593Smuzhiyun 				"unable to allocate local smp2p item\n");
379*4882a593Smuzhiyun 		return ret;
380*4882a593Smuzhiyun 	}
381*4882a593Smuzhiyun 
382*4882a593Smuzhiyun 	out = qcom_smem_get(pid, smem_id, NULL);
383*4882a593Smuzhiyun 	if (IS_ERR(out)) {
384*4882a593Smuzhiyun 		dev_err(smp2p->dev, "Unable to acquire local smp2p item\n");
385*4882a593Smuzhiyun 		return PTR_ERR(out);
386*4882a593Smuzhiyun 	}
387*4882a593Smuzhiyun 
388*4882a593Smuzhiyun 	memset(out, 0, sizeof(*out));
389*4882a593Smuzhiyun 	out->magic = SMP2P_MAGIC;
390*4882a593Smuzhiyun 	out->local_pid = smp2p->local_pid;
391*4882a593Smuzhiyun 	out->remote_pid = smp2p->remote_pid;
392*4882a593Smuzhiyun 	out->total_entries = SMP2P_MAX_ENTRY;
393*4882a593Smuzhiyun 	out->valid_entries = 0;
394*4882a593Smuzhiyun 
395*4882a593Smuzhiyun 	/*
396*4882a593Smuzhiyun 	 * Make sure the rest of the header is written before we validate the
397*4882a593Smuzhiyun 	 * item by writing a valid version number.
398*4882a593Smuzhiyun 	 */
399*4882a593Smuzhiyun 	wmb();
400*4882a593Smuzhiyun 	out->version = 1;
401*4882a593Smuzhiyun 
402*4882a593Smuzhiyun 	qcom_smp2p_kick(smp2p);
403*4882a593Smuzhiyun 
404*4882a593Smuzhiyun 	smp2p->out = out;
405*4882a593Smuzhiyun 
406*4882a593Smuzhiyun 	return 0;
407*4882a593Smuzhiyun }
408*4882a593Smuzhiyun 
smp2p_parse_ipc(struct qcom_smp2p * smp2p)409*4882a593Smuzhiyun static int smp2p_parse_ipc(struct qcom_smp2p *smp2p)
410*4882a593Smuzhiyun {
411*4882a593Smuzhiyun 	struct device_node *syscon;
412*4882a593Smuzhiyun 	struct device *dev = smp2p->dev;
413*4882a593Smuzhiyun 	const char *key;
414*4882a593Smuzhiyun 	int ret;
415*4882a593Smuzhiyun 
416*4882a593Smuzhiyun 	syscon = of_parse_phandle(dev->of_node, "qcom,ipc", 0);
417*4882a593Smuzhiyun 	if (!syscon) {
418*4882a593Smuzhiyun 		dev_err(dev, "no qcom,ipc node\n");
419*4882a593Smuzhiyun 		return -ENODEV;
420*4882a593Smuzhiyun 	}
421*4882a593Smuzhiyun 
422*4882a593Smuzhiyun 	smp2p->ipc_regmap = syscon_node_to_regmap(syscon);
423*4882a593Smuzhiyun 	of_node_put(syscon);
424*4882a593Smuzhiyun 	if (IS_ERR(smp2p->ipc_regmap))
425*4882a593Smuzhiyun 		return PTR_ERR(smp2p->ipc_regmap);
426*4882a593Smuzhiyun 
427*4882a593Smuzhiyun 	key = "qcom,ipc";
428*4882a593Smuzhiyun 	ret = of_property_read_u32_index(dev->of_node, key, 1, &smp2p->ipc_offset);
429*4882a593Smuzhiyun 	if (ret < 0) {
430*4882a593Smuzhiyun 		dev_err(dev, "no offset in %s\n", key);
431*4882a593Smuzhiyun 		return -EINVAL;
432*4882a593Smuzhiyun 	}
433*4882a593Smuzhiyun 
434*4882a593Smuzhiyun 	ret = of_property_read_u32_index(dev->of_node, key, 2, &smp2p->ipc_bit);
435*4882a593Smuzhiyun 	if (ret < 0) {
436*4882a593Smuzhiyun 		dev_err(dev, "no bit in %s\n", key);
437*4882a593Smuzhiyun 		return -EINVAL;
438*4882a593Smuzhiyun 	}
439*4882a593Smuzhiyun 
440*4882a593Smuzhiyun 	return 0;
441*4882a593Smuzhiyun }
442*4882a593Smuzhiyun 
qcom_smp2p_probe(struct platform_device * pdev)443*4882a593Smuzhiyun static int qcom_smp2p_probe(struct platform_device *pdev)
444*4882a593Smuzhiyun {
445*4882a593Smuzhiyun 	struct smp2p_entry *entry;
446*4882a593Smuzhiyun 	struct device_node *node;
447*4882a593Smuzhiyun 	struct qcom_smp2p *smp2p;
448*4882a593Smuzhiyun 	const char *key;
449*4882a593Smuzhiyun 	int irq;
450*4882a593Smuzhiyun 	int ret;
451*4882a593Smuzhiyun 
452*4882a593Smuzhiyun 	smp2p = devm_kzalloc(&pdev->dev, sizeof(*smp2p), GFP_KERNEL);
453*4882a593Smuzhiyun 	if (!smp2p)
454*4882a593Smuzhiyun 		return -ENOMEM;
455*4882a593Smuzhiyun 
456*4882a593Smuzhiyun 	smp2p->dev = &pdev->dev;
457*4882a593Smuzhiyun 	INIT_LIST_HEAD(&smp2p->inbound);
458*4882a593Smuzhiyun 	INIT_LIST_HEAD(&smp2p->outbound);
459*4882a593Smuzhiyun 
460*4882a593Smuzhiyun 	platform_set_drvdata(pdev, smp2p);
461*4882a593Smuzhiyun 
462*4882a593Smuzhiyun 	key = "qcom,smem";
463*4882a593Smuzhiyun 	ret = of_property_read_u32_array(pdev->dev.of_node, key,
464*4882a593Smuzhiyun 					 smp2p->smem_items, 2);
465*4882a593Smuzhiyun 	if (ret)
466*4882a593Smuzhiyun 		return ret;
467*4882a593Smuzhiyun 
468*4882a593Smuzhiyun 	key = "qcom,local-pid";
469*4882a593Smuzhiyun 	ret = of_property_read_u32(pdev->dev.of_node, key, &smp2p->local_pid);
470*4882a593Smuzhiyun 	if (ret)
471*4882a593Smuzhiyun 		goto report_read_failure;
472*4882a593Smuzhiyun 
473*4882a593Smuzhiyun 	key = "qcom,remote-pid";
474*4882a593Smuzhiyun 	ret = of_property_read_u32(pdev->dev.of_node, key, &smp2p->remote_pid);
475*4882a593Smuzhiyun 	if (ret)
476*4882a593Smuzhiyun 		goto report_read_failure;
477*4882a593Smuzhiyun 
478*4882a593Smuzhiyun 	irq = platform_get_irq(pdev, 0);
479*4882a593Smuzhiyun 	if (irq < 0)
480*4882a593Smuzhiyun 		return irq;
481*4882a593Smuzhiyun 
482*4882a593Smuzhiyun 	smp2p->mbox_client.dev = &pdev->dev;
483*4882a593Smuzhiyun 	smp2p->mbox_client.knows_txdone = true;
484*4882a593Smuzhiyun 	smp2p->mbox_chan = mbox_request_channel(&smp2p->mbox_client, 0);
485*4882a593Smuzhiyun 	if (IS_ERR(smp2p->mbox_chan)) {
486*4882a593Smuzhiyun 		if (PTR_ERR(smp2p->mbox_chan) != -ENODEV)
487*4882a593Smuzhiyun 			return PTR_ERR(smp2p->mbox_chan);
488*4882a593Smuzhiyun 
489*4882a593Smuzhiyun 		smp2p->mbox_chan = NULL;
490*4882a593Smuzhiyun 
491*4882a593Smuzhiyun 		ret = smp2p_parse_ipc(smp2p);
492*4882a593Smuzhiyun 		if (ret)
493*4882a593Smuzhiyun 			return ret;
494*4882a593Smuzhiyun 	}
495*4882a593Smuzhiyun 
496*4882a593Smuzhiyun 	ret = qcom_smp2p_alloc_outbound_item(smp2p);
497*4882a593Smuzhiyun 	if (ret < 0)
498*4882a593Smuzhiyun 		goto release_mbox;
499*4882a593Smuzhiyun 
500*4882a593Smuzhiyun 	for_each_available_child_of_node(pdev->dev.of_node, node) {
501*4882a593Smuzhiyun 		entry = devm_kzalloc(&pdev->dev, sizeof(*entry), GFP_KERNEL);
502*4882a593Smuzhiyun 		if (!entry) {
503*4882a593Smuzhiyun 			ret = -ENOMEM;
504*4882a593Smuzhiyun 			goto unwind_interfaces;
505*4882a593Smuzhiyun 		}
506*4882a593Smuzhiyun 
507*4882a593Smuzhiyun 		entry->smp2p = smp2p;
508*4882a593Smuzhiyun 		spin_lock_init(&entry->lock);
509*4882a593Smuzhiyun 
510*4882a593Smuzhiyun 		ret = of_property_read_string(node, "qcom,entry-name", &entry->name);
511*4882a593Smuzhiyun 		if (ret < 0)
512*4882a593Smuzhiyun 			goto unwind_interfaces;
513*4882a593Smuzhiyun 
514*4882a593Smuzhiyun 		if (of_property_read_bool(node, "interrupt-controller")) {
515*4882a593Smuzhiyun 			ret = qcom_smp2p_inbound_entry(smp2p, entry, node);
516*4882a593Smuzhiyun 			if (ret < 0)
517*4882a593Smuzhiyun 				goto unwind_interfaces;
518*4882a593Smuzhiyun 
519*4882a593Smuzhiyun 			list_add(&entry->node, &smp2p->inbound);
520*4882a593Smuzhiyun 		} else  {
521*4882a593Smuzhiyun 			ret = qcom_smp2p_outbound_entry(smp2p, entry, node);
522*4882a593Smuzhiyun 			if (ret < 0)
523*4882a593Smuzhiyun 				goto unwind_interfaces;
524*4882a593Smuzhiyun 
525*4882a593Smuzhiyun 			list_add(&entry->node, &smp2p->outbound);
526*4882a593Smuzhiyun 		}
527*4882a593Smuzhiyun 	}
528*4882a593Smuzhiyun 
529*4882a593Smuzhiyun 	/* Kick the outgoing edge after allocating entries */
530*4882a593Smuzhiyun 	qcom_smp2p_kick(smp2p);
531*4882a593Smuzhiyun 
532*4882a593Smuzhiyun 	ret = devm_request_threaded_irq(&pdev->dev, irq,
533*4882a593Smuzhiyun 					NULL, qcom_smp2p_intr,
534*4882a593Smuzhiyun 					IRQF_ONESHOT,
535*4882a593Smuzhiyun 					"smp2p", (void *)smp2p);
536*4882a593Smuzhiyun 	if (ret) {
537*4882a593Smuzhiyun 		dev_err(&pdev->dev, "failed to request interrupt\n");
538*4882a593Smuzhiyun 		goto unwind_interfaces;
539*4882a593Smuzhiyun 	}
540*4882a593Smuzhiyun 
541*4882a593Smuzhiyun 
542*4882a593Smuzhiyun 	return 0;
543*4882a593Smuzhiyun 
544*4882a593Smuzhiyun unwind_interfaces:
545*4882a593Smuzhiyun 	list_for_each_entry(entry, &smp2p->inbound, node)
546*4882a593Smuzhiyun 		irq_domain_remove(entry->domain);
547*4882a593Smuzhiyun 
548*4882a593Smuzhiyun 	list_for_each_entry(entry, &smp2p->outbound, node)
549*4882a593Smuzhiyun 		qcom_smem_state_unregister(entry->state);
550*4882a593Smuzhiyun 
551*4882a593Smuzhiyun 	smp2p->out->valid_entries = 0;
552*4882a593Smuzhiyun 
553*4882a593Smuzhiyun release_mbox:
554*4882a593Smuzhiyun 	mbox_free_channel(smp2p->mbox_chan);
555*4882a593Smuzhiyun 
556*4882a593Smuzhiyun 	return ret;
557*4882a593Smuzhiyun 
558*4882a593Smuzhiyun report_read_failure:
559*4882a593Smuzhiyun 	dev_err(&pdev->dev, "failed to read %s\n", key);
560*4882a593Smuzhiyun 	return -EINVAL;
561*4882a593Smuzhiyun }
562*4882a593Smuzhiyun 
qcom_smp2p_remove(struct platform_device * pdev)563*4882a593Smuzhiyun static int qcom_smp2p_remove(struct platform_device *pdev)
564*4882a593Smuzhiyun {
565*4882a593Smuzhiyun 	struct qcom_smp2p *smp2p = platform_get_drvdata(pdev);
566*4882a593Smuzhiyun 	struct smp2p_entry *entry;
567*4882a593Smuzhiyun 
568*4882a593Smuzhiyun 	list_for_each_entry(entry, &smp2p->inbound, node)
569*4882a593Smuzhiyun 		irq_domain_remove(entry->domain);
570*4882a593Smuzhiyun 
571*4882a593Smuzhiyun 	list_for_each_entry(entry, &smp2p->outbound, node)
572*4882a593Smuzhiyun 		qcom_smem_state_unregister(entry->state);
573*4882a593Smuzhiyun 
574*4882a593Smuzhiyun 	mbox_free_channel(smp2p->mbox_chan);
575*4882a593Smuzhiyun 
576*4882a593Smuzhiyun 	smp2p->out->valid_entries = 0;
577*4882a593Smuzhiyun 
578*4882a593Smuzhiyun 	return 0;
579*4882a593Smuzhiyun }
580*4882a593Smuzhiyun 
581*4882a593Smuzhiyun static const struct of_device_id qcom_smp2p_of_match[] = {
582*4882a593Smuzhiyun 	{ .compatible = "qcom,smp2p" },
583*4882a593Smuzhiyun 	{}
584*4882a593Smuzhiyun };
585*4882a593Smuzhiyun MODULE_DEVICE_TABLE(of, qcom_smp2p_of_match);
586*4882a593Smuzhiyun 
587*4882a593Smuzhiyun static struct platform_driver qcom_smp2p_driver = {
588*4882a593Smuzhiyun 	.probe = qcom_smp2p_probe,
589*4882a593Smuzhiyun 	.remove = qcom_smp2p_remove,
590*4882a593Smuzhiyun 	.driver  = {
591*4882a593Smuzhiyun 		.name  = "qcom_smp2p",
592*4882a593Smuzhiyun 		.of_match_table = qcom_smp2p_of_match,
593*4882a593Smuzhiyun 	},
594*4882a593Smuzhiyun };
595*4882a593Smuzhiyun module_platform_driver(qcom_smp2p_driver);
596*4882a593Smuzhiyun 
597*4882a593Smuzhiyun MODULE_DESCRIPTION("Qualcomm Shared Memory Point to Point driver");
598*4882a593Smuzhiyun MODULE_LICENSE("GPL v2");
599