1*4882a593Smuzhiyun /* SPDX-License-Identifier: GPL-2.0 */ 2*4882a593Smuzhiyun /* 3*4882a593Smuzhiyun * Copyright (c) 2016-2018, The Linux Foundation. All rights reserved. 4*4882a593Smuzhiyun */ 5*4882a593Smuzhiyun 6*4882a593Smuzhiyun 7*4882a593Smuzhiyun #ifndef __RPM_INTERNAL_H__ 8*4882a593Smuzhiyun #define __RPM_INTERNAL_H__ 9*4882a593Smuzhiyun 10*4882a593Smuzhiyun #include <linux/bitmap.h> 11*4882a593Smuzhiyun #include <linux/wait.h> 12*4882a593Smuzhiyun #include <soc/qcom/tcs.h> 13*4882a593Smuzhiyun 14*4882a593Smuzhiyun #define TCS_TYPE_NR 4 15*4882a593Smuzhiyun #define MAX_CMDS_PER_TCS 16 16*4882a593Smuzhiyun #define MAX_TCS_PER_TYPE 3 17*4882a593Smuzhiyun #define MAX_TCS_NR (MAX_TCS_PER_TYPE * TCS_TYPE_NR) 18*4882a593Smuzhiyun #define MAX_TCS_SLOTS (MAX_CMDS_PER_TCS * MAX_TCS_PER_TYPE) 19*4882a593Smuzhiyun 20*4882a593Smuzhiyun struct rsc_drv; 21*4882a593Smuzhiyun 22*4882a593Smuzhiyun /** 23*4882a593Smuzhiyun * struct tcs_group: group of Trigger Command Sets (TCS) to send state requests 24*4882a593Smuzhiyun * to the controller 25*4882a593Smuzhiyun * 26*4882a593Smuzhiyun * @drv: The controller. 27*4882a593Smuzhiyun * @type: Type of the TCS in this group - active, sleep, wake. 28*4882a593Smuzhiyun * @mask: Mask of the TCSes relative to all the TCSes in the RSC. 29*4882a593Smuzhiyun * @offset: Start of the TCS group relative to the TCSes in the RSC. 30*4882a593Smuzhiyun * @num_tcs: Number of TCSes in this type. 31*4882a593Smuzhiyun * @ncpt: Number of commands in each TCS. 32*4882a593Smuzhiyun * @req: Requests that are sent from the TCS; only used for ACTIVE_ONLY 33*4882a593Smuzhiyun * transfers (could be on a wake/sleep TCS if we are borrowing for 34*4882a593Smuzhiyun * an ACTIVE_ONLY transfer). 35*4882a593Smuzhiyun * Start: grab drv->lock, set req, set tcs_in_use, drop drv->lock, 36*4882a593Smuzhiyun * trigger 37*4882a593Smuzhiyun * End: get irq, access req, 38*4882a593Smuzhiyun * grab drv->lock, clear tcs_in_use, drop drv->lock 39*4882a593Smuzhiyun * @slots: Indicates which of @cmd_addr are occupied; only used for 40*4882a593Smuzhiyun * SLEEP / WAKE TCSs. Things are tightly packed in the 41*4882a593Smuzhiyun * case that (ncpt < MAX_CMDS_PER_TCS). That is if ncpt = 2 and 42*4882a593Smuzhiyun * MAX_CMDS_PER_TCS = 16 then bit[2] = the first bit in 2nd TCS. 43*4882a593Smuzhiyun */ 44*4882a593Smuzhiyun struct tcs_group { 45*4882a593Smuzhiyun struct rsc_drv *drv; 46*4882a593Smuzhiyun int type; 47*4882a593Smuzhiyun u32 mask; 48*4882a593Smuzhiyun u32 offset; 49*4882a593Smuzhiyun int num_tcs; 50*4882a593Smuzhiyun int ncpt; 51*4882a593Smuzhiyun const struct tcs_request *req[MAX_TCS_PER_TYPE]; 52*4882a593Smuzhiyun DECLARE_BITMAP(slots, MAX_TCS_SLOTS); 53*4882a593Smuzhiyun }; 54*4882a593Smuzhiyun 55*4882a593Smuzhiyun /** 56*4882a593Smuzhiyun * struct rpmh_request: the message to be sent to rpmh-rsc 57*4882a593Smuzhiyun * 58*4882a593Smuzhiyun * @msg: the request 59*4882a593Smuzhiyun * @cmd: the payload that will be part of the @msg 60*4882a593Smuzhiyun * @completion: triggered when request is done 61*4882a593Smuzhiyun * @dev: the device making the request 62*4882a593Smuzhiyun * @err: err return from the controller 63*4882a593Smuzhiyun * @needs_free: check to free dynamically allocated request object 64*4882a593Smuzhiyun */ 65*4882a593Smuzhiyun struct rpmh_request { 66*4882a593Smuzhiyun struct tcs_request msg; 67*4882a593Smuzhiyun struct tcs_cmd cmd[MAX_RPMH_PAYLOAD]; 68*4882a593Smuzhiyun struct completion *completion; 69*4882a593Smuzhiyun const struct device *dev; 70*4882a593Smuzhiyun int err; 71*4882a593Smuzhiyun bool needs_free; 72*4882a593Smuzhiyun }; 73*4882a593Smuzhiyun 74*4882a593Smuzhiyun /** 75*4882a593Smuzhiyun * struct rpmh_ctrlr: our representation of the controller 76*4882a593Smuzhiyun * 77*4882a593Smuzhiyun * @cache: the list of cached requests 78*4882a593Smuzhiyun * @cache_lock: synchronize access to the cache data 79*4882a593Smuzhiyun * @dirty: was the cache updated since flush 80*4882a593Smuzhiyun * @batch_cache: Cache sleep and wake requests sent as batch 81*4882a593Smuzhiyun */ 82*4882a593Smuzhiyun struct rpmh_ctrlr { 83*4882a593Smuzhiyun struct list_head cache; 84*4882a593Smuzhiyun spinlock_t cache_lock; 85*4882a593Smuzhiyun bool dirty; 86*4882a593Smuzhiyun struct list_head batch_cache; 87*4882a593Smuzhiyun }; 88*4882a593Smuzhiyun 89*4882a593Smuzhiyun /** 90*4882a593Smuzhiyun * struct rsc_drv: the Direct Resource Voter (DRV) of the 91*4882a593Smuzhiyun * Resource State Coordinator controller (RSC) 92*4882a593Smuzhiyun * 93*4882a593Smuzhiyun * @name: Controller identifier. 94*4882a593Smuzhiyun * @tcs_base: Start address of the TCS registers in this controller. 95*4882a593Smuzhiyun * @id: Instance id in the controller (Direct Resource Voter). 96*4882a593Smuzhiyun * @num_tcs: Number of TCSes in this DRV. 97*4882a593Smuzhiyun * @rsc_pm: CPU PM notifier for controller. 98*4882a593Smuzhiyun * Used when solver mode is not present. 99*4882a593Smuzhiyun * @cpus_in_pm: Number of CPUs not in idle power collapse. 100*4882a593Smuzhiyun * Used when solver mode is not present. 101*4882a593Smuzhiyun * @tcs: TCS groups. 102*4882a593Smuzhiyun * @tcs_in_use: S/W state of the TCS; only set for ACTIVE_ONLY 103*4882a593Smuzhiyun * transfers, but might show a sleep/wake TCS in use if 104*4882a593Smuzhiyun * it was borrowed for an active_only transfer. You 105*4882a593Smuzhiyun * must hold the lock in this struct (AKA drv->lock) in 106*4882a593Smuzhiyun * order to update this. 107*4882a593Smuzhiyun * @lock: Synchronize state of the controller. If RPMH's cache 108*4882a593Smuzhiyun * lock will also be held, the order is: drv->lock then 109*4882a593Smuzhiyun * cache_lock. 110*4882a593Smuzhiyun * @tcs_wait: Wait queue used to wait for @tcs_in_use to free up a 111*4882a593Smuzhiyun * slot 112*4882a593Smuzhiyun * @client: Handle to the DRV's client. 113*4882a593Smuzhiyun */ 114*4882a593Smuzhiyun struct rsc_drv { 115*4882a593Smuzhiyun const char *name; 116*4882a593Smuzhiyun void __iomem *tcs_base; 117*4882a593Smuzhiyun int id; 118*4882a593Smuzhiyun int num_tcs; 119*4882a593Smuzhiyun struct notifier_block rsc_pm; 120*4882a593Smuzhiyun atomic_t cpus_in_pm; 121*4882a593Smuzhiyun struct tcs_group tcs[TCS_TYPE_NR]; 122*4882a593Smuzhiyun DECLARE_BITMAP(tcs_in_use, MAX_TCS_NR); 123*4882a593Smuzhiyun spinlock_t lock; 124*4882a593Smuzhiyun wait_queue_head_t tcs_wait; 125*4882a593Smuzhiyun struct rpmh_ctrlr client; 126*4882a593Smuzhiyun }; 127*4882a593Smuzhiyun 128*4882a593Smuzhiyun int rpmh_rsc_send_data(struct rsc_drv *drv, const struct tcs_request *msg); 129*4882a593Smuzhiyun int rpmh_rsc_write_ctrl_data(struct rsc_drv *drv, 130*4882a593Smuzhiyun const struct tcs_request *msg); 131*4882a593Smuzhiyun void rpmh_rsc_invalidate(struct rsc_drv *drv); 132*4882a593Smuzhiyun 133*4882a593Smuzhiyun void rpmh_tx_done(const struct tcs_request *msg, int r); 134*4882a593Smuzhiyun int rpmh_flush(struct rpmh_ctrlr *ctrlr); 135*4882a593Smuzhiyun 136*4882a593Smuzhiyun #endif /* __RPM_INTERNAL_H__ */ 137