1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0-only
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun *
4*4882a593Smuzhiyun * Copyright (C) 2011-2015 John Crispin <blogic@phrozen.org>
5*4882a593Smuzhiyun * Copyright (C) 2015 Martin Blumenstingl <martin.blumenstingl@googlemail.com>
6*4882a593Smuzhiyun * Copyright (C) 2017 Hauke Mehrtens <hauke@hauke-m.de>
7*4882a593Smuzhiyun */
8*4882a593Smuzhiyun
9*4882a593Smuzhiyun #include <linux/device.h>
10*4882a593Smuzhiyun #include <linux/err.h>
11*4882a593Smuzhiyun #include <linux/mfd/syscon.h>
12*4882a593Smuzhiyun #include <linux/module.h>
13*4882a593Smuzhiyun #include <linux/of.h>
14*4882a593Smuzhiyun #include <linux/of_platform.h>
15*4882a593Smuzhiyun #include <linux/platform_device.h>
16*4882a593Smuzhiyun #include <linux/property.h>
17*4882a593Smuzhiyun #include <linux/regmap.h>
18*4882a593Smuzhiyun
19*4882a593Smuzhiyun #include <lantiq_soc.h>
20*4882a593Smuzhiyun
21*4882a593Smuzhiyun #define XBAR_ALWAYS_LAST 0x430
22*4882a593Smuzhiyun #define XBAR_FPI_BURST_EN BIT(1)
23*4882a593Smuzhiyun #define XBAR_AHB_BURST_EN BIT(2)
24*4882a593Smuzhiyun
25*4882a593Smuzhiyun #define RCU_VR9_BE_AHB1S 0x00000008
26*4882a593Smuzhiyun
ltq_fpi_probe(struct platform_device * pdev)27*4882a593Smuzhiyun static int ltq_fpi_probe(struct platform_device *pdev)
28*4882a593Smuzhiyun {
29*4882a593Smuzhiyun struct device *dev = &pdev->dev;
30*4882a593Smuzhiyun struct device_node *np = dev->of_node;
31*4882a593Smuzhiyun struct regmap *rcu_regmap;
32*4882a593Smuzhiyun void __iomem *xbar_membase;
33*4882a593Smuzhiyun u32 rcu_ahb_endianness_reg_offset;
34*4882a593Smuzhiyun int ret;
35*4882a593Smuzhiyun
36*4882a593Smuzhiyun xbar_membase = devm_platform_ioremap_resource(pdev, 0);
37*4882a593Smuzhiyun if (IS_ERR(xbar_membase))
38*4882a593Smuzhiyun return PTR_ERR(xbar_membase);
39*4882a593Smuzhiyun
40*4882a593Smuzhiyun /* RCU configuration is optional */
41*4882a593Smuzhiyun rcu_regmap = syscon_regmap_lookup_by_phandle(np, "lantiq,rcu");
42*4882a593Smuzhiyun if (IS_ERR(rcu_regmap))
43*4882a593Smuzhiyun return PTR_ERR(rcu_regmap);
44*4882a593Smuzhiyun
45*4882a593Smuzhiyun ret = device_property_read_u32(dev, "lantiq,offset-endianness",
46*4882a593Smuzhiyun &rcu_ahb_endianness_reg_offset);
47*4882a593Smuzhiyun if (ret) {
48*4882a593Smuzhiyun dev_err(&pdev->dev, "Failed to get RCU reg offset\n");
49*4882a593Smuzhiyun return ret;
50*4882a593Smuzhiyun }
51*4882a593Smuzhiyun
52*4882a593Smuzhiyun ret = regmap_update_bits(rcu_regmap, rcu_ahb_endianness_reg_offset,
53*4882a593Smuzhiyun RCU_VR9_BE_AHB1S, RCU_VR9_BE_AHB1S);
54*4882a593Smuzhiyun if (ret) {
55*4882a593Smuzhiyun dev_warn(&pdev->dev,
56*4882a593Smuzhiyun "Failed to configure RCU AHB endianness\n");
57*4882a593Smuzhiyun return ret;
58*4882a593Smuzhiyun }
59*4882a593Smuzhiyun
60*4882a593Smuzhiyun /* disable fpi burst */
61*4882a593Smuzhiyun ltq_w32_mask(XBAR_FPI_BURST_EN, 0, xbar_membase + XBAR_ALWAYS_LAST);
62*4882a593Smuzhiyun
63*4882a593Smuzhiyun return of_platform_populate(dev->of_node, NULL, NULL, dev);
64*4882a593Smuzhiyun }
65*4882a593Smuzhiyun
66*4882a593Smuzhiyun static const struct of_device_id ltq_fpi_match[] = {
67*4882a593Smuzhiyun { .compatible = "lantiq,xrx200-fpi" },
68*4882a593Smuzhiyun {},
69*4882a593Smuzhiyun };
70*4882a593Smuzhiyun MODULE_DEVICE_TABLE(of, ltq_fpi_match);
71*4882a593Smuzhiyun
72*4882a593Smuzhiyun static struct platform_driver ltq_fpi_driver = {
73*4882a593Smuzhiyun .probe = ltq_fpi_probe,
74*4882a593Smuzhiyun .driver = {
75*4882a593Smuzhiyun .name = "fpi-xway",
76*4882a593Smuzhiyun .of_match_table = ltq_fpi_match,
77*4882a593Smuzhiyun },
78*4882a593Smuzhiyun };
79*4882a593Smuzhiyun
80*4882a593Smuzhiyun module_platform_driver(ltq_fpi_driver);
81*4882a593Smuzhiyun
82*4882a593Smuzhiyun MODULE_DESCRIPTION("Lantiq FPI bus driver");
83*4882a593Smuzhiyun MODULE_LICENSE("GPL");
84