1*4882a593Smuzhiyun // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun * Freescale DPAA2 Platforms Console Driver
4*4882a593Smuzhiyun *
5*4882a593Smuzhiyun * Copyright 2015-2016 Freescale Semiconductor Inc.
6*4882a593Smuzhiyun * Copyright 2018 NXP
7*4882a593Smuzhiyun */
8*4882a593Smuzhiyun
9*4882a593Smuzhiyun #define pr_fmt(fmt) "dpaa2-console: " fmt
10*4882a593Smuzhiyun
11*4882a593Smuzhiyun #include <linux/module.h>
12*4882a593Smuzhiyun #include <linux/of_device.h>
13*4882a593Smuzhiyun #include <linux/of_address.h>
14*4882a593Smuzhiyun #include <linux/miscdevice.h>
15*4882a593Smuzhiyun #include <linux/uaccess.h>
16*4882a593Smuzhiyun #include <linux/slab.h>
17*4882a593Smuzhiyun #include <linux/fs.h>
18*4882a593Smuzhiyun #include <linux/io.h>
19*4882a593Smuzhiyun
20*4882a593Smuzhiyun /* MC firmware base low/high registers indexes */
21*4882a593Smuzhiyun #define MCFBALR_OFFSET 0
22*4882a593Smuzhiyun #define MCFBAHR_OFFSET 1
23*4882a593Smuzhiyun
24*4882a593Smuzhiyun /* Bit masks used to get the most/least significant part of the MC base addr */
25*4882a593Smuzhiyun #define MC_FW_ADDR_MASK_HIGH 0x1FFFF
26*4882a593Smuzhiyun #define MC_FW_ADDR_MASK_LOW 0xE0000000
27*4882a593Smuzhiyun
28*4882a593Smuzhiyun #define MC_BUFFER_OFFSET 0x01000000
29*4882a593Smuzhiyun #define MC_BUFFER_SIZE (1024 * 1024 * 16)
30*4882a593Smuzhiyun #define MC_OFFSET_DELTA MC_BUFFER_OFFSET
31*4882a593Smuzhiyun
32*4882a593Smuzhiyun #define AIOP_BUFFER_OFFSET 0x06000000
33*4882a593Smuzhiyun #define AIOP_BUFFER_SIZE (1024 * 1024 * 16)
34*4882a593Smuzhiyun #define AIOP_OFFSET_DELTA 0
35*4882a593Smuzhiyun
36*4882a593Smuzhiyun #define LOG_HEADER_FLAG_BUFFER_WRAPAROUND 0x80000000
37*4882a593Smuzhiyun #define LAST_BYTE(a) ((a) & ~(LOG_HEADER_FLAG_BUFFER_WRAPAROUND))
38*4882a593Smuzhiyun
39*4882a593Smuzhiyun /* MC and AIOP Magic words */
40*4882a593Smuzhiyun #define MAGIC_MC 0x4d430100
41*4882a593Smuzhiyun #define MAGIC_AIOP 0x41494F50
42*4882a593Smuzhiyun
43*4882a593Smuzhiyun struct log_header {
44*4882a593Smuzhiyun __le32 magic_word;
45*4882a593Smuzhiyun char reserved[4];
46*4882a593Smuzhiyun __le32 buf_start;
47*4882a593Smuzhiyun __le32 buf_length;
48*4882a593Smuzhiyun __le32 last_byte;
49*4882a593Smuzhiyun };
50*4882a593Smuzhiyun
51*4882a593Smuzhiyun struct console_data {
52*4882a593Smuzhiyun void __iomem *map_addr;
53*4882a593Smuzhiyun struct log_header __iomem *hdr;
54*4882a593Smuzhiyun void __iomem *start_addr;
55*4882a593Smuzhiyun void __iomem *end_addr;
56*4882a593Smuzhiyun void __iomem *end_of_data;
57*4882a593Smuzhiyun void __iomem *cur_ptr;
58*4882a593Smuzhiyun };
59*4882a593Smuzhiyun
60*4882a593Smuzhiyun static struct resource mc_base_addr;
61*4882a593Smuzhiyun
adjust_end(struct console_data * cd)62*4882a593Smuzhiyun static inline void adjust_end(struct console_data *cd)
63*4882a593Smuzhiyun {
64*4882a593Smuzhiyun u32 last_byte = readl(&cd->hdr->last_byte);
65*4882a593Smuzhiyun
66*4882a593Smuzhiyun cd->end_of_data = cd->start_addr + LAST_BYTE(last_byte);
67*4882a593Smuzhiyun }
68*4882a593Smuzhiyun
get_mc_fw_base_address(void)69*4882a593Smuzhiyun static u64 get_mc_fw_base_address(void)
70*4882a593Smuzhiyun {
71*4882a593Smuzhiyun u64 mcfwbase = 0ULL;
72*4882a593Smuzhiyun u32 __iomem *mcfbaregs;
73*4882a593Smuzhiyun
74*4882a593Smuzhiyun mcfbaregs = ioremap(mc_base_addr.start, resource_size(&mc_base_addr));
75*4882a593Smuzhiyun if (!mcfbaregs) {
76*4882a593Smuzhiyun pr_err("could not map MC Firmware Base registers\n");
77*4882a593Smuzhiyun return 0;
78*4882a593Smuzhiyun }
79*4882a593Smuzhiyun
80*4882a593Smuzhiyun mcfwbase = readl(mcfbaregs + MCFBAHR_OFFSET) &
81*4882a593Smuzhiyun MC_FW_ADDR_MASK_HIGH;
82*4882a593Smuzhiyun mcfwbase <<= 32;
83*4882a593Smuzhiyun mcfwbase |= readl(mcfbaregs + MCFBALR_OFFSET) & MC_FW_ADDR_MASK_LOW;
84*4882a593Smuzhiyun iounmap(mcfbaregs);
85*4882a593Smuzhiyun
86*4882a593Smuzhiyun pr_debug("MC base address at 0x%016llx\n", mcfwbase);
87*4882a593Smuzhiyun return mcfwbase;
88*4882a593Smuzhiyun }
89*4882a593Smuzhiyun
dpaa2_console_size(struct console_data * cd)90*4882a593Smuzhiyun static ssize_t dpaa2_console_size(struct console_data *cd)
91*4882a593Smuzhiyun {
92*4882a593Smuzhiyun ssize_t size;
93*4882a593Smuzhiyun
94*4882a593Smuzhiyun if (cd->cur_ptr <= cd->end_of_data)
95*4882a593Smuzhiyun size = cd->end_of_data - cd->cur_ptr;
96*4882a593Smuzhiyun else
97*4882a593Smuzhiyun size = (cd->end_addr - cd->cur_ptr) +
98*4882a593Smuzhiyun (cd->end_of_data - cd->start_addr);
99*4882a593Smuzhiyun
100*4882a593Smuzhiyun return size;
101*4882a593Smuzhiyun }
102*4882a593Smuzhiyun
dpaa2_generic_console_open(struct inode * node,struct file * fp,u64 offset,u64 size,u32 expected_magic,u32 offset_delta)103*4882a593Smuzhiyun static int dpaa2_generic_console_open(struct inode *node, struct file *fp,
104*4882a593Smuzhiyun u64 offset, u64 size,
105*4882a593Smuzhiyun u32 expected_magic,
106*4882a593Smuzhiyun u32 offset_delta)
107*4882a593Smuzhiyun {
108*4882a593Smuzhiyun u32 read_magic, wrapped, last_byte, buf_start, buf_length;
109*4882a593Smuzhiyun struct console_data *cd;
110*4882a593Smuzhiyun u64 base_addr;
111*4882a593Smuzhiyun int err;
112*4882a593Smuzhiyun
113*4882a593Smuzhiyun cd = kmalloc(sizeof(*cd), GFP_KERNEL);
114*4882a593Smuzhiyun if (!cd)
115*4882a593Smuzhiyun return -ENOMEM;
116*4882a593Smuzhiyun
117*4882a593Smuzhiyun base_addr = get_mc_fw_base_address();
118*4882a593Smuzhiyun if (!base_addr) {
119*4882a593Smuzhiyun err = -EIO;
120*4882a593Smuzhiyun goto err_fwba;
121*4882a593Smuzhiyun }
122*4882a593Smuzhiyun
123*4882a593Smuzhiyun cd->map_addr = ioremap(base_addr + offset, size);
124*4882a593Smuzhiyun if (!cd->map_addr) {
125*4882a593Smuzhiyun pr_err("cannot map console log memory\n");
126*4882a593Smuzhiyun err = -EIO;
127*4882a593Smuzhiyun goto err_ioremap;
128*4882a593Smuzhiyun }
129*4882a593Smuzhiyun
130*4882a593Smuzhiyun cd->hdr = (struct log_header __iomem *)cd->map_addr;
131*4882a593Smuzhiyun read_magic = readl(&cd->hdr->magic_word);
132*4882a593Smuzhiyun last_byte = readl(&cd->hdr->last_byte);
133*4882a593Smuzhiyun buf_start = readl(&cd->hdr->buf_start);
134*4882a593Smuzhiyun buf_length = readl(&cd->hdr->buf_length);
135*4882a593Smuzhiyun
136*4882a593Smuzhiyun if (read_magic != expected_magic) {
137*4882a593Smuzhiyun pr_warn("expected = %08x, read = %08x\n",
138*4882a593Smuzhiyun expected_magic, read_magic);
139*4882a593Smuzhiyun err = -EIO;
140*4882a593Smuzhiyun goto err_magic;
141*4882a593Smuzhiyun }
142*4882a593Smuzhiyun
143*4882a593Smuzhiyun cd->start_addr = cd->map_addr + buf_start - offset_delta;
144*4882a593Smuzhiyun cd->end_addr = cd->start_addr + buf_length;
145*4882a593Smuzhiyun
146*4882a593Smuzhiyun wrapped = last_byte & LOG_HEADER_FLAG_BUFFER_WRAPAROUND;
147*4882a593Smuzhiyun
148*4882a593Smuzhiyun adjust_end(cd);
149*4882a593Smuzhiyun if (wrapped && cd->end_of_data != cd->end_addr)
150*4882a593Smuzhiyun cd->cur_ptr = cd->end_of_data + 1;
151*4882a593Smuzhiyun else
152*4882a593Smuzhiyun cd->cur_ptr = cd->start_addr;
153*4882a593Smuzhiyun
154*4882a593Smuzhiyun fp->private_data = cd;
155*4882a593Smuzhiyun
156*4882a593Smuzhiyun return 0;
157*4882a593Smuzhiyun
158*4882a593Smuzhiyun err_magic:
159*4882a593Smuzhiyun iounmap(cd->map_addr);
160*4882a593Smuzhiyun
161*4882a593Smuzhiyun err_ioremap:
162*4882a593Smuzhiyun err_fwba:
163*4882a593Smuzhiyun kfree(cd);
164*4882a593Smuzhiyun
165*4882a593Smuzhiyun return err;
166*4882a593Smuzhiyun }
167*4882a593Smuzhiyun
dpaa2_mc_console_open(struct inode * node,struct file * fp)168*4882a593Smuzhiyun static int dpaa2_mc_console_open(struct inode *node, struct file *fp)
169*4882a593Smuzhiyun {
170*4882a593Smuzhiyun return dpaa2_generic_console_open(node, fp,
171*4882a593Smuzhiyun MC_BUFFER_OFFSET, MC_BUFFER_SIZE,
172*4882a593Smuzhiyun MAGIC_MC, MC_OFFSET_DELTA);
173*4882a593Smuzhiyun }
174*4882a593Smuzhiyun
dpaa2_aiop_console_open(struct inode * node,struct file * fp)175*4882a593Smuzhiyun static int dpaa2_aiop_console_open(struct inode *node, struct file *fp)
176*4882a593Smuzhiyun {
177*4882a593Smuzhiyun return dpaa2_generic_console_open(node, fp,
178*4882a593Smuzhiyun AIOP_BUFFER_OFFSET, AIOP_BUFFER_SIZE,
179*4882a593Smuzhiyun MAGIC_AIOP, AIOP_OFFSET_DELTA);
180*4882a593Smuzhiyun }
181*4882a593Smuzhiyun
dpaa2_console_close(struct inode * node,struct file * fp)182*4882a593Smuzhiyun static int dpaa2_console_close(struct inode *node, struct file *fp)
183*4882a593Smuzhiyun {
184*4882a593Smuzhiyun struct console_data *cd = fp->private_data;
185*4882a593Smuzhiyun
186*4882a593Smuzhiyun iounmap(cd->map_addr);
187*4882a593Smuzhiyun kfree(cd);
188*4882a593Smuzhiyun return 0;
189*4882a593Smuzhiyun }
190*4882a593Smuzhiyun
dpaa2_console_read(struct file * fp,char __user * buf,size_t count,loff_t * f_pos)191*4882a593Smuzhiyun static ssize_t dpaa2_console_read(struct file *fp, char __user *buf,
192*4882a593Smuzhiyun size_t count, loff_t *f_pos)
193*4882a593Smuzhiyun {
194*4882a593Smuzhiyun struct console_data *cd = fp->private_data;
195*4882a593Smuzhiyun size_t bytes = dpaa2_console_size(cd);
196*4882a593Smuzhiyun size_t bytes_end = cd->end_addr - cd->cur_ptr;
197*4882a593Smuzhiyun size_t written = 0;
198*4882a593Smuzhiyun void *kbuf;
199*4882a593Smuzhiyun int err;
200*4882a593Smuzhiyun
201*4882a593Smuzhiyun /* Check if we need to adjust the end of data addr */
202*4882a593Smuzhiyun adjust_end(cd);
203*4882a593Smuzhiyun
204*4882a593Smuzhiyun if (cd->end_of_data == cd->cur_ptr)
205*4882a593Smuzhiyun return 0;
206*4882a593Smuzhiyun
207*4882a593Smuzhiyun if (count < bytes)
208*4882a593Smuzhiyun bytes = count;
209*4882a593Smuzhiyun
210*4882a593Smuzhiyun kbuf = kmalloc(bytes, GFP_KERNEL);
211*4882a593Smuzhiyun if (!kbuf)
212*4882a593Smuzhiyun return -ENOMEM;
213*4882a593Smuzhiyun
214*4882a593Smuzhiyun if (bytes > bytes_end) {
215*4882a593Smuzhiyun memcpy_fromio(kbuf, cd->cur_ptr, bytes_end);
216*4882a593Smuzhiyun if (copy_to_user(buf, kbuf, bytes_end)) {
217*4882a593Smuzhiyun err = -EFAULT;
218*4882a593Smuzhiyun goto err_free_buf;
219*4882a593Smuzhiyun }
220*4882a593Smuzhiyun buf += bytes_end;
221*4882a593Smuzhiyun cd->cur_ptr = cd->start_addr;
222*4882a593Smuzhiyun bytes -= bytes_end;
223*4882a593Smuzhiyun written += bytes_end;
224*4882a593Smuzhiyun }
225*4882a593Smuzhiyun
226*4882a593Smuzhiyun memcpy_fromio(kbuf, cd->cur_ptr, bytes);
227*4882a593Smuzhiyun if (copy_to_user(buf, kbuf, bytes)) {
228*4882a593Smuzhiyun err = -EFAULT;
229*4882a593Smuzhiyun goto err_free_buf;
230*4882a593Smuzhiyun }
231*4882a593Smuzhiyun cd->cur_ptr += bytes;
232*4882a593Smuzhiyun written += bytes;
233*4882a593Smuzhiyun
234*4882a593Smuzhiyun kfree(kbuf);
235*4882a593Smuzhiyun return written;
236*4882a593Smuzhiyun
237*4882a593Smuzhiyun err_free_buf:
238*4882a593Smuzhiyun kfree(kbuf);
239*4882a593Smuzhiyun
240*4882a593Smuzhiyun return err;
241*4882a593Smuzhiyun }
242*4882a593Smuzhiyun
243*4882a593Smuzhiyun static const struct file_operations dpaa2_mc_console_fops = {
244*4882a593Smuzhiyun .owner = THIS_MODULE,
245*4882a593Smuzhiyun .open = dpaa2_mc_console_open,
246*4882a593Smuzhiyun .release = dpaa2_console_close,
247*4882a593Smuzhiyun .read = dpaa2_console_read,
248*4882a593Smuzhiyun };
249*4882a593Smuzhiyun
250*4882a593Smuzhiyun static struct miscdevice dpaa2_mc_console_dev = {
251*4882a593Smuzhiyun .minor = MISC_DYNAMIC_MINOR,
252*4882a593Smuzhiyun .name = "dpaa2_mc_console",
253*4882a593Smuzhiyun .fops = &dpaa2_mc_console_fops
254*4882a593Smuzhiyun };
255*4882a593Smuzhiyun
256*4882a593Smuzhiyun static const struct file_operations dpaa2_aiop_console_fops = {
257*4882a593Smuzhiyun .owner = THIS_MODULE,
258*4882a593Smuzhiyun .open = dpaa2_aiop_console_open,
259*4882a593Smuzhiyun .release = dpaa2_console_close,
260*4882a593Smuzhiyun .read = dpaa2_console_read,
261*4882a593Smuzhiyun };
262*4882a593Smuzhiyun
263*4882a593Smuzhiyun static struct miscdevice dpaa2_aiop_console_dev = {
264*4882a593Smuzhiyun .minor = MISC_DYNAMIC_MINOR,
265*4882a593Smuzhiyun .name = "dpaa2_aiop_console",
266*4882a593Smuzhiyun .fops = &dpaa2_aiop_console_fops
267*4882a593Smuzhiyun };
268*4882a593Smuzhiyun
dpaa2_console_probe(struct platform_device * pdev)269*4882a593Smuzhiyun static int dpaa2_console_probe(struct platform_device *pdev)
270*4882a593Smuzhiyun {
271*4882a593Smuzhiyun int error;
272*4882a593Smuzhiyun
273*4882a593Smuzhiyun error = of_address_to_resource(pdev->dev.of_node, 0, &mc_base_addr);
274*4882a593Smuzhiyun if (error < 0) {
275*4882a593Smuzhiyun pr_err("of_address_to_resource() failed for %pOF with %d\n",
276*4882a593Smuzhiyun pdev->dev.of_node, error);
277*4882a593Smuzhiyun return error;
278*4882a593Smuzhiyun }
279*4882a593Smuzhiyun
280*4882a593Smuzhiyun error = misc_register(&dpaa2_mc_console_dev);
281*4882a593Smuzhiyun if (error) {
282*4882a593Smuzhiyun pr_err("cannot register device %s\n",
283*4882a593Smuzhiyun dpaa2_mc_console_dev.name);
284*4882a593Smuzhiyun goto err_register_mc;
285*4882a593Smuzhiyun }
286*4882a593Smuzhiyun
287*4882a593Smuzhiyun error = misc_register(&dpaa2_aiop_console_dev);
288*4882a593Smuzhiyun if (error) {
289*4882a593Smuzhiyun pr_err("cannot register device %s\n",
290*4882a593Smuzhiyun dpaa2_aiop_console_dev.name);
291*4882a593Smuzhiyun goto err_register_aiop;
292*4882a593Smuzhiyun }
293*4882a593Smuzhiyun
294*4882a593Smuzhiyun return 0;
295*4882a593Smuzhiyun
296*4882a593Smuzhiyun err_register_aiop:
297*4882a593Smuzhiyun misc_deregister(&dpaa2_mc_console_dev);
298*4882a593Smuzhiyun err_register_mc:
299*4882a593Smuzhiyun return error;
300*4882a593Smuzhiyun }
301*4882a593Smuzhiyun
dpaa2_console_remove(struct platform_device * pdev)302*4882a593Smuzhiyun static int dpaa2_console_remove(struct platform_device *pdev)
303*4882a593Smuzhiyun {
304*4882a593Smuzhiyun misc_deregister(&dpaa2_mc_console_dev);
305*4882a593Smuzhiyun misc_deregister(&dpaa2_aiop_console_dev);
306*4882a593Smuzhiyun
307*4882a593Smuzhiyun return 0;
308*4882a593Smuzhiyun }
309*4882a593Smuzhiyun
310*4882a593Smuzhiyun static const struct of_device_id dpaa2_console_match_table[] = {
311*4882a593Smuzhiyun { .compatible = "fsl,dpaa2-console",},
312*4882a593Smuzhiyun {},
313*4882a593Smuzhiyun };
314*4882a593Smuzhiyun
315*4882a593Smuzhiyun MODULE_DEVICE_TABLE(of, dpaa2_console_match_table);
316*4882a593Smuzhiyun
317*4882a593Smuzhiyun static struct platform_driver dpaa2_console_driver = {
318*4882a593Smuzhiyun .driver = {
319*4882a593Smuzhiyun .name = "dpaa2-console",
320*4882a593Smuzhiyun .pm = NULL,
321*4882a593Smuzhiyun .of_match_table = dpaa2_console_match_table,
322*4882a593Smuzhiyun },
323*4882a593Smuzhiyun .probe = dpaa2_console_probe,
324*4882a593Smuzhiyun .remove = dpaa2_console_remove,
325*4882a593Smuzhiyun };
326*4882a593Smuzhiyun module_platform_driver(dpaa2_console_driver);
327*4882a593Smuzhiyun
328*4882a593Smuzhiyun MODULE_LICENSE("Dual BSD/GPL");
329*4882a593Smuzhiyun MODULE_AUTHOR("Roy Pledge <roy.pledge@nxp.com>");
330*4882a593Smuzhiyun MODULE_DESCRIPTION("DPAA2 console driver");
331