1*4882a593Smuzhiyun // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun * Copyright (c) 2019 Amlogic, Inc.
4*4882a593Smuzhiyun * Author: Jianxin Pan <jianxin.pan@amlogic.com>
5*4882a593Smuzhiyun */
6*4882a593Smuzhiyun
7*4882a593Smuzhiyun #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
8*4882a593Smuzhiyun
9*4882a593Smuzhiyun #include <linux/io.h>
10*4882a593Smuzhiyun #include <linux/of_device.h>
11*4882a593Smuzhiyun #include <linux/platform_device.h>
12*4882a593Smuzhiyun #include <linux/pm_domain.h>
13*4882a593Smuzhiyun #include <dt-bindings/power/meson-a1-power.h>
14*4882a593Smuzhiyun #include <linux/arm-smccc.h>
15*4882a593Smuzhiyun #include <linux/firmware/meson/meson_sm.h>
16*4882a593Smuzhiyun #include <linux/module.h>
17*4882a593Smuzhiyun
18*4882a593Smuzhiyun #define PWRC_ON 1
19*4882a593Smuzhiyun #define PWRC_OFF 0
20*4882a593Smuzhiyun
21*4882a593Smuzhiyun struct meson_secure_pwrc_domain {
22*4882a593Smuzhiyun struct generic_pm_domain base;
23*4882a593Smuzhiyun unsigned int index;
24*4882a593Smuzhiyun struct meson_secure_pwrc *pwrc;
25*4882a593Smuzhiyun };
26*4882a593Smuzhiyun
27*4882a593Smuzhiyun struct meson_secure_pwrc {
28*4882a593Smuzhiyun struct meson_secure_pwrc_domain *domains;
29*4882a593Smuzhiyun struct genpd_onecell_data xlate;
30*4882a593Smuzhiyun struct meson_sm_firmware *fw;
31*4882a593Smuzhiyun };
32*4882a593Smuzhiyun
33*4882a593Smuzhiyun struct meson_secure_pwrc_domain_desc {
34*4882a593Smuzhiyun unsigned int index;
35*4882a593Smuzhiyun unsigned int flags;
36*4882a593Smuzhiyun char *name;
37*4882a593Smuzhiyun bool (*is_off)(struct meson_secure_pwrc_domain *pwrc_domain);
38*4882a593Smuzhiyun };
39*4882a593Smuzhiyun
40*4882a593Smuzhiyun struct meson_secure_pwrc_domain_data {
41*4882a593Smuzhiyun unsigned int count;
42*4882a593Smuzhiyun struct meson_secure_pwrc_domain_desc *domains;
43*4882a593Smuzhiyun };
44*4882a593Smuzhiyun
pwrc_secure_is_off(struct meson_secure_pwrc_domain * pwrc_domain)45*4882a593Smuzhiyun static bool pwrc_secure_is_off(struct meson_secure_pwrc_domain *pwrc_domain)
46*4882a593Smuzhiyun {
47*4882a593Smuzhiyun int is_off = 1;
48*4882a593Smuzhiyun
49*4882a593Smuzhiyun if (meson_sm_call(pwrc_domain->pwrc->fw, SM_A1_PWRC_GET, &is_off,
50*4882a593Smuzhiyun pwrc_domain->index, 0, 0, 0, 0) < 0)
51*4882a593Smuzhiyun pr_err("failed to get power domain status\n");
52*4882a593Smuzhiyun
53*4882a593Smuzhiyun return is_off;
54*4882a593Smuzhiyun }
55*4882a593Smuzhiyun
meson_secure_pwrc_off(struct generic_pm_domain * domain)56*4882a593Smuzhiyun static int meson_secure_pwrc_off(struct generic_pm_domain *domain)
57*4882a593Smuzhiyun {
58*4882a593Smuzhiyun int ret = 0;
59*4882a593Smuzhiyun struct meson_secure_pwrc_domain *pwrc_domain =
60*4882a593Smuzhiyun container_of(domain, struct meson_secure_pwrc_domain, base);
61*4882a593Smuzhiyun
62*4882a593Smuzhiyun if (meson_sm_call(pwrc_domain->pwrc->fw, SM_A1_PWRC_SET, NULL,
63*4882a593Smuzhiyun pwrc_domain->index, PWRC_OFF, 0, 0, 0) < 0) {
64*4882a593Smuzhiyun pr_err("failed to set power domain off\n");
65*4882a593Smuzhiyun ret = -EINVAL;
66*4882a593Smuzhiyun }
67*4882a593Smuzhiyun
68*4882a593Smuzhiyun return ret;
69*4882a593Smuzhiyun }
70*4882a593Smuzhiyun
meson_secure_pwrc_on(struct generic_pm_domain * domain)71*4882a593Smuzhiyun static int meson_secure_pwrc_on(struct generic_pm_domain *domain)
72*4882a593Smuzhiyun {
73*4882a593Smuzhiyun int ret = 0;
74*4882a593Smuzhiyun struct meson_secure_pwrc_domain *pwrc_domain =
75*4882a593Smuzhiyun container_of(domain, struct meson_secure_pwrc_domain, base);
76*4882a593Smuzhiyun
77*4882a593Smuzhiyun if (meson_sm_call(pwrc_domain->pwrc->fw, SM_A1_PWRC_SET, NULL,
78*4882a593Smuzhiyun pwrc_domain->index, PWRC_ON, 0, 0, 0) < 0) {
79*4882a593Smuzhiyun pr_err("failed to set power domain on\n");
80*4882a593Smuzhiyun ret = -EINVAL;
81*4882a593Smuzhiyun }
82*4882a593Smuzhiyun
83*4882a593Smuzhiyun return ret;
84*4882a593Smuzhiyun }
85*4882a593Smuzhiyun
86*4882a593Smuzhiyun #define SEC_PD(__name, __flag) \
87*4882a593Smuzhiyun [PWRC_##__name##_ID] = \
88*4882a593Smuzhiyun { \
89*4882a593Smuzhiyun .name = #__name, \
90*4882a593Smuzhiyun .index = PWRC_##__name##_ID, \
91*4882a593Smuzhiyun .is_off = pwrc_secure_is_off, \
92*4882a593Smuzhiyun .flags = __flag, \
93*4882a593Smuzhiyun }
94*4882a593Smuzhiyun
95*4882a593Smuzhiyun static struct meson_secure_pwrc_domain_desc a1_pwrc_domains[] = {
96*4882a593Smuzhiyun SEC_PD(DSPA, 0),
97*4882a593Smuzhiyun SEC_PD(DSPB, 0),
98*4882a593Smuzhiyun /* UART should keep working in ATF after suspend and before resume */
99*4882a593Smuzhiyun SEC_PD(UART, GENPD_FLAG_ALWAYS_ON),
100*4882a593Smuzhiyun /* DMC is for DDR PHY ana/dig and DMC, and should be always on */
101*4882a593Smuzhiyun SEC_PD(DMC, GENPD_FLAG_ALWAYS_ON),
102*4882a593Smuzhiyun SEC_PD(I2C, 0),
103*4882a593Smuzhiyun SEC_PD(PSRAM, 0),
104*4882a593Smuzhiyun SEC_PD(ACODEC, 0),
105*4882a593Smuzhiyun SEC_PD(AUDIO, 0),
106*4882a593Smuzhiyun SEC_PD(OTP, 0),
107*4882a593Smuzhiyun SEC_PD(DMA, 0),
108*4882a593Smuzhiyun SEC_PD(SD_EMMC, 0),
109*4882a593Smuzhiyun SEC_PD(RAMA, 0),
110*4882a593Smuzhiyun /* SRAMB is used as ATF runtime memory, and should be always on */
111*4882a593Smuzhiyun SEC_PD(RAMB, GENPD_FLAG_ALWAYS_ON),
112*4882a593Smuzhiyun SEC_PD(IR, 0),
113*4882a593Smuzhiyun SEC_PD(SPICC, 0),
114*4882a593Smuzhiyun SEC_PD(SPIFC, 0),
115*4882a593Smuzhiyun SEC_PD(USB, 0),
116*4882a593Smuzhiyun /* NIC is for the Arm NIC-400 interconnect, and should be always on */
117*4882a593Smuzhiyun SEC_PD(NIC, GENPD_FLAG_ALWAYS_ON),
118*4882a593Smuzhiyun SEC_PD(PDMIN, 0),
119*4882a593Smuzhiyun SEC_PD(RSA, 0),
120*4882a593Smuzhiyun };
121*4882a593Smuzhiyun
meson_secure_pwrc_probe(struct platform_device * pdev)122*4882a593Smuzhiyun static int meson_secure_pwrc_probe(struct platform_device *pdev)
123*4882a593Smuzhiyun {
124*4882a593Smuzhiyun int i;
125*4882a593Smuzhiyun struct device_node *sm_np;
126*4882a593Smuzhiyun struct meson_secure_pwrc *pwrc;
127*4882a593Smuzhiyun const struct meson_secure_pwrc_domain_data *match;
128*4882a593Smuzhiyun
129*4882a593Smuzhiyun match = of_device_get_match_data(&pdev->dev);
130*4882a593Smuzhiyun if (!match) {
131*4882a593Smuzhiyun dev_err(&pdev->dev, "failed to get match data\n");
132*4882a593Smuzhiyun return -ENODEV;
133*4882a593Smuzhiyun }
134*4882a593Smuzhiyun
135*4882a593Smuzhiyun sm_np = of_find_compatible_node(NULL, NULL, "amlogic,meson-gxbb-sm");
136*4882a593Smuzhiyun if (!sm_np) {
137*4882a593Smuzhiyun dev_err(&pdev->dev, "no secure-monitor node\n");
138*4882a593Smuzhiyun return -ENODEV;
139*4882a593Smuzhiyun }
140*4882a593Smuzhiyun
141*4882a593Smuzhiyun pwrc = devm_kzalloc(&pdev->dev, sizeof(*pwrc), GFP_KERNEL);
142*4882a593Smuzhiyun if (!pwrc) {
143*4882a593Smuzhiyun of_node_put(sm_np);
144*4882a593Smuzhiyun return -ENOMEM;
145*4882a593Smuzhiyun }
146*4882a593Smuzhiyun
147*4882a593Smuzhiyun pwrc->fw = meson_sm_get(sm_np);
148*4882a593Smuzhiyun of_node_put(sm_np);
149*4882a593Smuzhiyun if (!pwrc->fw)
150*4882a593Smuzhiyun return -EPROBE_DEFER;
151*4882a593Smuzhiyun
152*4882a593Smuzhiyun pwrc->xlate.domains = devm_kcalloc(&pdev->dev, match->count,
153*4882a593Smuzhiyun sizeof(*pwrc->xlate.domains),
154*4882a593Smuzhiyun GFP_KERNEL);
155*4882a593Smuzhiyun if (!pwrc->xlate.domains)
156*4882a593Smuzhiyun return -ENOMEM;
157*4882a593Smuzhiyun
158*4882a593Smuzhiyun pwrc->domains = devm_kcalloc(&pdev->dev, match->count,
159*4882a593Smuzhiyun sizeof(*pwrc->domains), GFP_KERNEL);
160*4882a593Smuzhiyun if (!pwrc->domains)
161*4882a593Smuzhiyun return -ENOMEM;
162*4882a593Smuzhiyun
163*4882a593Smuzhiyun pwrc->xlate.num_domains = match->count;
164*4882a593Smuzhiyun platform_set_drvdata(pdev, pwrc);
165*4882a593Smuzhiyun
166*4882a593Smuzhiyun for (i = 0 ; i < match->count ; ++i) {
167*4882a593Smuzhiyun struct meson_secure_pwrc_domain *dom = &pwrc->domains[i];
168*4882a593Smuzhiyun
169*4882a593Smuzhiyun if (!match->domains[i].index)
170*4882a593Smuzhiyun continue;
171*4882a593Smuzhiyun
172*4882a593Smuzhiyun dom->pwrc = pwrc;
173*4882a593Smuzhiyun dom->index = match->domains[i].index;
174*4882a593Smuzhiyun dom->base.name = match->domains[i].name;
175*4882a593Smuzhiyun dom->base.flags = match->domains[i].flags;
176*4882a593Smuzhiyun dom->base.power_on = meson_secure_pwrc_on;
177*4882a593Smuzhiyun dom->base.power_off = meson_secure_pwrc_off;
178*4882a593Smuzhiyun
179*4882a593Smuzhiyun pm_genpd_init(&dom->base, NULL, match->domains[i].is_off(dom));
180*4882a593Smuzhiyun
181*4882a593Smuzhiyun pwrc->xlate.domains[i] = &dom->base;
182*4882a593Smuzhiyun }
183*4882a593Smuzhiyun
184*4882a593Smuzhiyun return of_genpd_add_provider_onecell(pdev->dev.of_node, &pwrc->xlate);
185*4882a593Smuzhiyun }
186*4882a593Smuzhiyun
187*4882a593Smuzhiyun static struct meson_secure_pwrc_domain_data meson_secure_a1_pwrc_data = {
188*4882a593Smuzhiyun .domains = a1_pwrc_domains,
189*4882a593Smuzhiyun .count = ARRAY_SIZE(a1_pwrc_domains),
190*4882a593Smuzhiyun };
191*4882a593Smuzhiyun
192*4882a593Smuzhiyun static const struct of_device_id meson_secure_pwrc_match_table[] = {
193*4882a593Smuzhiyun {
194*4882a593Smuzhiyun .compatible = "amlogic,meson-a1-pwrc",
195*4882a593Smuzhiyun .data = &meson_secure_a1_pwrc_data,
196*4882a593Smuzhiyun },
197*4882a593Smuzhiyun { /* sentinel */ }
198*4882a593Smuzhiyun };
199*4882a593Smuzhiyun MODULE_DEVICE_TABLE(of, meson_secure_pwrc_match_table);
200*4882a593Smuzhiyun
201*4882a593Smuzhiyun static struct platform_driver meson_secure_pwrc_driver = {
202*4882a593Smuzhiyun .probe = meson_secure_pwrc_probe,
203*4882a593Smuzhiyun .driver = {
204*4882a593Smuzhiyun .name = "meson_secure_pwrc",
205*4882a593Smuzhiyun .of_match_table = meson_secure_pwrc_match_table,
206*4882a593Smuzhiyun },
207*4882a593Smuzhiyun };
208*4882a593Smuzhiyun module_platform_driver(meson_secure_pwrc_driver);
209*4882a593Smuzhiyun MODULE_LICENSE("Dual MIT/GPL");
210