1*4882a593Smuzhiyun /* SPDX-License-Identifier: GPL-2.0 */ 2*4882a593Smuzhiyun #ifndef _WD719X_H_ 3*4882a593Smuzhiyun #define _WD719X_H_ 4*4882a593Smuzhiyun 5*4882a593Smuzhiyun #define WD719X_SG 255 /* Scatter/gather size */ 6*4882a593Smuzhiyun 7*4882a593Smuzhiyun struct wd719x_sglist { 8*4882a593Smuzhiyun __le32 ptr; 9*4882a593Smuzhiyun __le32 length; 10*4882a593Smuzhiyun } __packed; 11*4882a593Smuzhiyun 12*4882a593Smuzhiyun enum wd719x_card_type { 13*4882a593Smuzhiyun WD719X_TYPE_UNKNOWN = 0, 14*4882a593Smuzhiyun WD719X_TYPE_7193, 15*4882a593Smuzhiyun WD719X_TYPE_7197, 16*4882a593Smuzhiyun WD719X_TYPE_7296, 17*4882a593Smuzhiyun }; 18*4882a593Smuzhiyun 19*4882a593Smuzhiyun union wd719x_regs { 20*4882a593Smuzhiyun __le32 all; /* All Status at once */ 21*4882a593Smuzhiyun struct { 22*4882a593Smuzhiyun u8 OPC; /* Opcode register */ 23*4882a593Smuzhiyun u8 SCSI; /* SCSI Errors */ 24*4882a593Smuzhiyun u8 SUE; /* Spider unique Errors */ 25*4882a593Smuzhiyun u8 INT; /* Interrupt Status */ 26*4882a593Smuzhiyun } bytes; 27*4882a593Smuzhiyun }; 28*4882a593Smuzhiyun 29*4882a593Smuzhiyun /* Spider Command Block (SCB) */ 30*4882a593Smuzhiyun struct wd719x_scb { 31*4882a593Smuzhiyun __le32 Int_SCB; /* 00-03 Internal SCB link pointer (must be cleared) */ 32*4882a593Smuzhiyun u8 SCB_opcode; /* 04 SCB Command opcode */ 33*4882a593Smuzhiyun u8 CDB_tag; /* 05 SCSI Tag byte for CDB queues (0 if untagged) */ 34*4882a593Smuzhiyun u8 lun; /* 06 SCSI LUN */ 35*4882a593Smuzhiyun u8 devid; /* 07 SCSI Device ID */ 36*4882a593Smuzhiyun u8 CDB[16]; /* 08-23 SCSI CDB (16 bytes as defined by ANSI spec. */ 37*4882a593Smuzhiyun __le32 data_p; /* 24-27 Data transfer address (or SG list address) */ 38*4882a593Smuzhiyun __le32 data_length; /* 28-31 Data transfer Length (or SG list length) */ 39*4882a593Smuzhiyun __le32 CDB_link; /* 32-35 SCSI CDB Link Ptr */ 40*4882a593Smuzhiyun __le32 sense_buf; /* 36-39 Auto request sense buffer address */ 41*4882a593Smuzhiyun u8 sense_buf_length;/* 40 Auto request sense transfer length */ 42*4882a593Smuzhiyun u8 reserved; /* 41 reserved */ 43*4882a593Smuzhiyun u8 SCB_options; /* 42 SCB-options */ 44*4882a593Smuzhiyun u8 SCB_tag_msg; /* 43 Tagged messages options */ 45*4882a593Smuzhiyun /* Not filled in by host */ 46*4882a593Smuzhiyun __le32 req_ptr; /* 44-47 Ptr to Host Request returned on interrupt */ 47*4882a593Smuzhiyun u8 host_opcode; /* 48 Host Command Opcode (same as AMR_00) */ 48*4882a593Smuzhiyun u8 scsi_stat; /* 49 SCSI Status returned */ 49*4882a593Smuzhiyun u8 ret_error; /* 50 SPIDER Unique Error Code returned (SUE) */ 50*4882a593Smuzhiyun u8 int_stat; /* 51 Message u8 / Interrupt Status byte returned */ 51*4882a593Smuzhiyun __le32 transferred; /* 52-55 Bytes Transferred */ 52*4882a593Smuzhiyun u8 last_trans[3]; /* 56-58 Bytes Transferred in last session */ 53*4882a593Smuzhiyun u8 length; /* 59 SCSI Messages Length (1-8) */ 54*4882a593Smuzhiyun u8 sync_offset; /* 60 Synchronous offset */ 55*4882a593Smuzhiyun u8 sync_rate; /* 61 Synchronous rate */ 56*4882a593Smuzhiyun u8 flags[2]; /* 62-63 SCB specific flags (local to each thread) */ 57*4882a593Smuzhiyun /* everything below is for driver use (not used by card) */ 58*4882a593Smuzhiyun dma_addr_t phys; /* bus address of the SCB */ 59*4882a593Smuzhiyun struct scsi_cmnd *cmd; /* a copy of the pointer we were passed */ 60*4882a593Smuzhiyun struct list_head list; 61*4882a593Smuzhiyun struct wd719x_sglist sg_list[WD719X_SG] __aligned(8); /* SG list */ 62*4882a593Smuzhiyun } __packed; 63*4882a593Smuzhiyun 64*4882a593Smuzhiyun struct wd719x { 65*4882a593Smuzhiyun struct Scsi_Host *sh; /* pointer to host structure */ 66*4882a593Smuzhiyun struct pci_dev *pdev; 67*4882a593Smuzhiyun void __iomem *base; 68*4882a593Smuzhiyun enum wd719x_card_type type; /* type of card */ 69*4882a593Smuzhiyun void *fw_virt; /* firmware buffer CPU address */ 70*4882a593Smuzhiyun dma_addr_t fw_phys; /* firmware buffer bus address */ 71*4882a593Smuzhiyun size_t fw_size; /* firmware buffer size */ 72*4882a593Smuzhiyun struct wd719x_host_param *params; /* host parameters (EEPROM) */ 73*4882a593Smuzhiyun dma_addr_t params_phys; /* host parameters bus address */ 74*4882a593Smuzhiyun void *hash_virt; /* hash table CPU address */ 75*4882a593Smuzhiyun dma_addr_t hash_phys; /* hash table bus address */ 76*4882a593Smuzhiyun struct list_head active_scbs; 77*4882a593Smuzhiyun }; 78*4882a593Smuzhiyun 79*4882a593Smuzhiyun /* timeout delays in microsecs */ 80*4882a593Smuzhiyun #define WD719X_WAIT_FOR_CMD_READY 500 81*4882a593Smuzhiyun #define WD719X_WAIT_FOR_RISC 2000 82*4882a593Smuzhiyun #define WD719X_WAIT_FOR_SCSI_RESET 3000000 83*4882a593Smuzhiyun 84*4882a593Smuzhiyun /* All commands except 0x00 generate an interrupt */ 85*4882a593Smuzhiyun #define WD719X_CMD_READY 0x00 /* Command register ready (or noop) */ 86*4882a593Smuzhiyun #define WD719X_CMD_INIT_RISC 0x01 /* Initialize RISC */ 87*4882a593Smuzhiyun /* 0x02 is reserved */ 88*4882a593Smuzhiyun #define WD719X_CMD_BUSRESET 0x03 /* Assert SCSI bus reset */ 89*4882a593Smuzhiyun #define WD719X_CMD_READ_FIRMVER 0x04 /* Read the Firmware Revision */ 90*4882a593Smuzhiyun #define WD719X_CMD_ECHO_BYTES 0x05 /* Echo command bytes (DW) */ 91*4882a593Smuzhiyun /* 0x06 is reserved */ 92*4882a593Smuzhiyun /* 0x07 is reserved */ 93*4882a593Smuzhiyun #define WD719X_CMD_GET_PARAM 0x08 /* Get programmable parameters */ 94*4882a593Smuzhiyun #define WD719X_CMD_SET_PARAM 0x09 /* Set programmable parameters */ 95*4882a593Smuzhiyun #define WD719X_CMD_SLEEP 0x0a /* Put SPIDER to sleep */ 96*4882a593Smuzhiyun #define WD719X_CMD_READ_INIT 0x0b /* Read initialization parameters */ 97*4882a593Smuzhiyun #define WD719X_CMD_RESTORE_INIT 0x0c /* Restore initialization parameters */ 98*4882a593Smuzhiyun /* 0x0d is reserved */ 99*4882a593Smuzhiyun /* 0x0e is reserved */ 100*4882a593Smuzhiyun /* 0x0f is reserved */ 101*4882a593Smuzhiyun #define WD719X_CMD_ABORT_TAG 0x10 /* Send Abort tag message to target */ 102*4882a593Smuzhiyun #define WD719X_CMD_ABORT 0x11 /* Send Abort message to target */ 103*4882a593Smuzhiyun #define WD719X_CMD_RESET 0x12 /* Send Reset message to target */ 104*4882a593Smuzhiyun #define WD719X_CMD_INIT_SCAM 0x13 /* Initiate SCAM */ 105*4882a593Smuzhiyun #define WD719X_CMD_GET_SYNC 0x14 /* Get synchronous rates */ 106*4882a593Smuzhiyun #define WD719X_CMD_SET_SYNC 0x15 /* Set synchronous rates */ 107*4882a593Smuzhiyun #define WD719X_CMD_GET_WIDTH 0x16 /* Get SCSI bus width */ 108*4882a593Smuzhiyun #define WD719X_CMD_SET_WIDTH 0x17 /* Set SCSI bus width */ 109*4882a593Smuzhiyun #define WD719X_CMD_GET_TAGS 0x18 /* Get tag flags */ 110*4882a593Smuzhiyun #define WD719X_CMD_SET_TAGS 0x19 /* Set tag flags */ 111*4882a593Smuzhiyun #define WD719X_CMD_GET_PARAM2 0x1a /* Get programmable params (format 2) */ 112*4882a593Smuzhiyun #define WD719X_CMD_SET_PARAM2 0x1b /* Set programmable params (format 2) */ 113*4882a593Smuzhiyun /* Commands with request pointers (mailbox) */ 114*4882a593Smuzhiyun #define WD719X_CMD_PROCESS_SCB 0x80 /* Process SCSI Control Block (SCB) */ 115*4882a593Smuzhiyun /* No interrupt generated on acceptance of SCB pointer */ 116*4882a593Smuzhiyun 117*4882a593Smuzhiyun /* interrupt status defines */ 118*4882a593Smuzhiyun #define WD719X_INT_NONE 0x00 /* No interrupt pending */ 119*4882a593Smuzhiyun #define WD719X_INT_NOERRORS 0x01 /* Command completed with no errors */ 120*4882a593Smuzhiyun #define WD719X_INT_LINKNOERRORS 0x02 /* link cmd completed with no errors */ 121*4882a593Smuzhiyun #define WD719X_INT_LINKNOSTATUS 0x03 /* link cmd completed with no flag set */ 122*4882a593Smuzhiyun #define WD719X_INT_ERRORSLOGGED 0x04 /* cmd completed with errors logged */ 123*4882a593Smuzhiyun #define WD719X_INT_SPIDERFAILED 0x05 /* cmd failed without valid SCSI status */ 124*4882a593Smuzhiyun #define WD719X_INT_BADINT 0x80 /* unsolicited interrupt */ 125*4882a593Smuzhiyun #define WD719X_INT_PIOREADY 0xf0 /* data ready for PIO output */ 126*4882a593Smuzhiyun 127*4882a593Smuzhiyun /* Spider Unique Error Codes (SUE) */ 128*4882a593Smuzhiyun #define WD719X_SUE_NOERRORS 0x00 /* No errors detected by SPIDER */ 129*4882a593Smuzhiyun #define WD719X_SUE_REJECTED 0x01 /* Command Rejected (bad opcode/param) */ 130*4882a593Smuzhiyun #define WD719X_SUE_SCBQFULL 0x02 /* SCB queue full */ 131*4882a593Smuzhiyun /* 0x03 is reserved */ 132*4882a593Smuzhiyun #define WD719X_SUE_TERM 0x04 /* Host terminated SCB via primative cmd */ 133*4882a593Smuzhiyun #define WD719X_SUE_CHAN1PAR 0x05 /* PCI Channel 1 parity error occurred */ 134*4882a593Smuzhiyun #define WD719X_SUE_CHAN1ABORT 0x06 /* PCI Channel 1 system abort occurred */ 135*4882a593Smuzhiyun #define WD719X_SUE_CHAN23PAR 0x07 /* PCI Channel 2/3 parity error occurred */ 136*4882a593Smuzhiyun #define WD719X_SUE_CHAN23ABORT 0x08 /* PCI Channel 2/3 system abort occurred */ 137*4882a593Smuzhiyun #define WD719X_SUE_TIMEOUT 0x10 /* Selection/reselection timeout */ 138*4882a593Smuzhiyun #define WD719X_SUE_RESET 0x11 /* SCSI bus reset occurred */ 139*4882a593Smuzhiyun #define WD719X_SUE_BUSERROR 0x12 /* SCSI bus error */ 140*4882a593Smuzhiyun #define WD719X_SUE_WRONGWAY 0x13 /* Wrong data transfer dir set by target */ 141*4882a593Smuzhiyun #define WD719X_SUE_BADPHASE 0x14 /* SCSI phase illegal or unexpected */ 142*4882a593Smuzhiyun #define WD719X_SUE_TOOLONG 0x15 /* target requested too much data */ 143*4882a593Smuzhiyun #define WD719X_SUE_BUSFREE 0x16 /* Unexpected SCSI bus free */ 144*4882a593Smuzhiyun #define WD719X_SUE_ARSDONE 0x17 /* Auto request sense executed */ 145*4882a593Smuzhiyun #define WD719X_SUE_IGNORED 0x18 /* SCSI message was ignored by target */ 146*4882a593Smuzhiyun #define WD719X_SUE_WRONGTAGS 0x19 /* Tagged SCB & tags off (or vice versa) */ 147*4882a593Smuzhiyun #define WD719X_SUE_BADTAGS 0x1a /* Wrong tag message type for target */ 148*4882a593Smuzhiyun #define WD719X_SUE_NOSCAMID 0x1b /* No SCAM soft ID available */ 149*4882a593Smuzhiyun 150*4882a593Smuzhiyun /* code sizes */ 151*4882a593Smuzhiyun #define WD719X_HASH_TABLE_SIZE 4096 152*4882a593Smuzhiyun 153*4882a593Smuzhiyun /* Advanced Mode Registers */ 154*4882a593Smuzhiyun /* Regs 0x00..0x1f are for Advanced Mode of the card (RISC is running). */ 155*4882a593Smuzhiyun #define WD719X_AMR_COMMAND 0x00 156*4882a593Smuzhiyun #define WD719X_AMR_CMD_PARAM 0x01 157*4882a593Smuzhiyun #define WD719X_AMR_CMD_PARAM_2 0x02 158*4882a593Smuzhiyun #define WD719X_AMR_CMD_PARAM_3 0x03 159*4882a593Smuzhiyun #define WD719X_AMR_SCB_IN 0x04 160*4882a593Smuzhiyun 161*4882a593Smuzhiyun #define WD719X_AMR_BIOS_SHARE_INT 0x0f 162*4882a593Smuzhiyun 163*4882a593Smuzhiyun #define WD719X_AMR_SCB_OUT 0x18 164*4882a593Smuzhiyun #define WD719X_AMR_OP_CODE 0x1c 165*4882a593Smuzhiyun #define WD719X_AMR_SCSI_STATUS 0x1d 166*4882a593Smuzhiyun #define WD719X_AMR_SCB_ERROR 0x1e 167*4882a593Smuzhiyun #define WD719X_AMR_INT_STATUS 0x1f 168*4882a593Smuzhiyun 169*4882a593Smuzhiyun #define WD719X_DISABLE_INT 0x80 170*4882a593Smuzhiyun 171*4882a593Smuzhiyun /* SCB flags */ 172*4882a593Smuzhiyun #define WD719X_SCB_FLAGS_CHECK_DIRECTION 0x01 173*4882a593Smuzhiyun #define WD719X_SCB_FLAGS_PCI_TO_SCSI 0x02 174*4882a593Smuzhiyun #define WD719X_SCB_FLAGS_AUTO_REQUEST_SENSE 0x10 175*4882a593Smuzhiyun #define WD719X_SCB_FLAGS_DO_SCATTER_GATHER 0x20 176*4882a593Smuzhiyun #define WD719X_SCB_FLAGS_NO_DISCONNECT 0x40 177*4882a593Smuzhiyun 178*4882a593Smuzhiyun /* PCI Registers used for reset, initial code download */ 179*4882a593Smuzhiyun /* Regs 0x20..0x3f are for Normal (DOS) mode (RISC is asleep). */ 180*4882a593Smuzhiyun #define WD719X_PCI_GPIO_CONTROL 0x3C 181*4882a593Smuzhiyun #define WD719X_PCI_GPIO_DATA 0x3D 182*4882a593Smuzhiyun #define WD719X_PCI_PORT_RESET 0x3E 183*4882a593Smuzhiyun #define WD719X_PCI_MODE_SELECT 0x3F 184*4882a593Smuzhiyun 185*4882a593Smuzhiyun #define WD719X_PCI_EXTERNAL_ADDR 0x60 186*4882a593Smuzhiyun #define WD719X_PCI_INTERNAL_ADDR 0x64 187*4882a593Smuzhiyun #define WD719X_PCI_DMA_TRANSFER_SIZE 0x66 188*4882a593Smuzhiyun #define WD719X_PCI_CHANNEL2_3CMD 0x68 189*4882a593Smuzhiyun #define WD719X_PCI_CHANNEL2_3STATUS 0x69 190*4882a593Smuzhiyun 191*4882a593Smuzhiyun #define WD719X_GPIO_ID_BITS 0x0a 192*4882a593Smuzhiyun #define WD719X_PRAM_BASE_ADDR 0x00 193*4882a593Smuzhiyun 194*4882a593Smuzhiyun /* codes written to or read from the card */ 195*4882a593Smuzhiyun #define WD719X_PCI_RESET 0x01 196*4882a593Smuzhiyun #define WD719X_ENABLE_ADVANCE_MODE 0x01 197*4882a593Smuzhiyun 198*4882a593Smuzhiyun #define WD719X_START_CHANNEL2_3DMA 0x17 199*4882a593Smuzhiyun #define WD719X_START_CHANNEL2_3DONE 0x01 200*4882a593Smuzhiyun #define WD719X_START_CHANNEL2_3ABORT 0x20 201*4882a593Smuzhiyun 202*4882a593Smuzhiyun /* 33C296 GPIO bits for EEPROM pins */ 203*4882a593Smuzhiyun #define WD719X_EE_DI (1 << 1) 204*4882a593Smuzhiyun #define WD719X_EE_CS (1 << 2) 205*4882a593Smuzhiyun #define WD719X_EE_CLK (1 << 3) 206*4882a593Smuzhiyun #define WD719X_EE_DO (1 << 4) 207*4882a593Smuzhiyun 208*4882a593Smuzhiyun /* EEPROM contents */ 209*4882a593Smuzhiyun struct wd719x_eeprom_header { 210*4882a593Smuzhiyun u8 sig1; 211*4882a593Smuzhiyun u8 sig2; 212*4882a593Smuzhiyun u8 version; 213*4882a593Smuzhiyun u8 checksum; 214*4882a593Smuzhiyun u8 cfg_offset; 215*4882a593Smuzhiyun u8 cfg_size; 216*4882a593Smuzhiyun u8 setup_offset; 217*4882a593Smuzhiyun u8 setup_size; 218*4882a593Smuzhiyun } __packed; 219*4882a593Smuzhiyun 220*4882a593Smuzhiyun #define WD719X_EE_SIG1 0 221*4882a593Smuzhiyun #define WD719X_EE_SIG2 1 222*4882a593Smuzhiyun #define WD719X_EE_VERSION 2 223*4882a593Smuzhiyun #define WD719X_EE_CHECKSUM 3 224*4882a593Smuzhiyun #define WD719X_EE_CFG_OFFSET 4 225*4882a593Smuzhiyun #define WD719X_EE_CFG_SIZE 5 226*4882a593Smuzhiyun #define WD719X_EE_SETUP_OFFSET 6 227*4882a593Smuzhiyun #define WD719X_EE_SETUP_SIZE 7 228*4882a593Smuzhiyun 229*4882a593Smuzhiyun #define WD719X_EE_SCSI_ID_MASK 0xf 230*4882a593Smuzhiyun 231*4882a593Smuzhiyun /* SPIDER Host Parameters Block (=EEPROM configuration block) */ 232*4882a593Smuzhiyun struct wd719x_host_param { 233*4882a593Smuzhiyun u8 ch_1_th; /* FIFO threshold */ 234*4882a593Smuzhiyun u8 scsi_conf; /* SCSI configuration */ 235*4882a593Smuzhiyun u8 own_scsi_id; /* controller SCSI ID */ 236*4882a593Smuzhiyun u8 sel_timeout; /* selection timeout*/ 237*4882a593Smuzhiyun u8 sleep_timer; /* seep timer */ 238*4882a593Smuzhiyun __le16 cdb_size;/* CDB size groups */ 239*4882a593Smuzhiyun __le16 tag_en; /* Tag msg enables (ID 0-15) */ 240*4882a593Smuzhiyun u8 scsi_pad; /* SCSI pad control */ 241*4882a593Smuzhiyun __le32 wide; /* WIDE msg options (ID 0-15) */ 242*4882a593Smuzhiyun __le32 sync; /* SYNC msg options (ID 0-15) */ 243*4882a593Smuzhiyun u8 soft_mask; /* soft error mask */ 244*4882a593Smuzhiyun u8 unsol_mask; /* unsolicited error mask */ 245*4882a593Smuzhiyun } __packed; 246*4882a593Smuzhiyun 247*4882a593Smuzhiyun #endif /* _WD719X_H_ */ 248