1*4882a593Smuzhiyun /* SPDX-License-Identifier: GPL-2.0-only */ 2*4882a593Smuzhiyun /* Copyright (c) 2015, The Linux Foundation. All rights reserved. 3*4882a593Smuzhiyun */ 4*4882a593Smuzhiyun 5*4882a593Smuzhiyun #ifndef UFSHCD_PLTFRM_H_ 6*4882a593Smuzhiyun #define UFSHCD_PLTFRM_H_ 7*4882a593Smuzhiyun 8*4882a593Smuzhiyun #include "ufshcd.h" 9*4882a593Smuzhiyun 10*4882a593Smuzhiyun #define UFS_PWM_MODE 1 11*4882a593Smuzhiyun #define UFS_HS_MODE 2 12*4882a593Smuzhiyun 13*4882a593Smuzhiyun struct ufs_dev_params { 14*4882a593Smuzhiyun u32 pwm_rx_gear; /* pwm rx gear to work in */ 15*4882a593Smuzhiyun u32 pwm_tx_gear; /* pwm tx gear to work in */ 16*4882a593Smuzhiyun u32 hs_rx_gear; /* hs rx gear to work in */ 17*4882a593Smuzhiyun u32 hs_tx_gear; /* hs tx gear to work in */ 18*4882a593Smuzhiyun u32 rx_lanes; /* number of rx lanes */ 19*4882a593Smuzhiyun u32 tx_lanes; /* number of tx lanes */ 20*4882a593Smuzhiyun u32 rx_pwr_pwm; /* rx pwm working pwr */ 21*4882a593Smuzhiyun u32 tx_pwr_pwm; /* tx pwm working pwr */ 22*4882a593Smuzhiyun u32 rx_pwr_hs; /* rx hs working pwr */ 23*4882a593Smuzhiyun u32 tx_pwr_hs; /* tx hs working pwr */ 24*4882a593Smuzhiyun u32 hs_rate; /* rate A/B to work in HS */ 25*4882a593Smuzhiyun u32 desired_working_mode; 26*4882a593Smuzhiyun }; 27*4882a593Smuzhiyun 28*4882a593Smuzhiyun int ufshcd_get_pwr_dev_param(struct ufs_dev_params *dev_param, 29*4882a593Smuzhiyun struct ufs_pa_layer_attr *dev_max, 30*4882a593Smuzhiyun struct ufs_pa_layer_attr *agreed_pwr); 31*4882a593Smuzhiyun int ufshcd_pltfrm_init(struct platform_device *pdev, 32*4882a593Smuzhiyun const struct ufs_hba_variant_ops *vops); 33*4882a593Smuzhiyun void ufshcd_pltfrm_shutdown(struct platform_device *pdev); 34*4882a593Smuzhiyun 35*4882a593Smuzhiyun #ifdef CONFIG_PM 36*4882a593Smuzhiyun 37*4882a593Smuzhiyun int ufshcd_pltfrm_suspend(struct device *dev); 38*4882a593Smuzhiyun int ufshcd_pltfrm_resume(struct device *dev); 39*4882a593Smuzhiyun int ufshcd_pltfrm_runtime_suspend(struct device *dev); 40*4882a593Smuzhiyun int ufshcd_pltfrm_runtime_resume(struct device *dev); 41*4882a593Smuzhiyun int ufshcd_pltfrm_runtime_idle(struct device *dev); 42*4882a593Smuzhiyun 43*4882a593Smuzhiyun #else /* !CONFIG_PM */ 44*4882a593Smuzhiyun 45*4882a593Smuzhiyun #define ufshcd_pltfrm_suspend NULL 46*4882a593Smuzhiyun #define ufshcd_pltfrm_resume NULL 47*4882a593Smuzhiyun #define ufshcd_pltfrm_runtime_suspend NULL 48*4882a593Smuzhiyun #define ufshcd_pltfrm_runtime_resume NULL 49*4882a593Smuzhiyun #define ufshcd_pltfrm_runtime_idle NULL 50*4882a593Smuzhiyun 51*4882a593Smuzhiyun #endif /* CONFIG_PM */ 52*4882a593Smuzhiyun 53*4882a593Smuzhiyun #endif /* UFSHCD_PLTFRM_H_ */ 54