xref: /OK3568_Linux_fs/kernel/drivers/scsi/snic/vnic_wq.h (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun /*
2*4882a593Smuzhiyun  * Copyright 2014 Cisco Systems, Inc.  All rights reserved.
3*4882a593Smuzhiyun  *
4*4882a593Smuzhiyun  * This program is free software; you may redistribute it and/or modify
5*4882a593Smuzhiyun  * it under the terms of the GNU General Public License as published by
6*4882a593Smuzhiyun  * the Free Software Foundation; version 2 of the License.
7*4882a593Smuzhiyun  *
8*4882a593Smuzhiyun  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
9*4882a593Smuzhiyun  * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
10*4882a593Smuzhiyun  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
11*4882a593Smuzhiyun  * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
12*4882a593Smuzhiyun  * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
13*4882a593Smuzhiyun  * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
14*4882a593Smuzhiyun  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
15*4882a593Smuzhiyun  * SOFTWARE.
16*4882a593Smuzhiyun  */
17*4882a593Smuzhiyun 
18*4882a593Smuzhiyun #ifndef _VNIC_WQ_H_
19*4882a593Smuzhiyun #define _VNIC_WQ_H_
20*4882a593Smuzhiyun 
21*4882a593Smuzhiyun #include <linux/pci.h>
22*4882a593Smuzhiyun #include "vnic_dev.h"
23*4882a593Smuzhiyun #include "vnic_cq.h"
24*4882a593Smuzhiyun 
25*4882a593Smuzhiyun /* Work queue control */
26*4882a593Smuzhiyun struct vnic_wq_ctrl {
27*4882a593Smuzhiyun 	u64 ring_base;			/* 0x00 */
28*4882a593Smuzhiyun 	u32 ring_size;			/* 0x08 */
29*4882a593Smuzhiyun 	u32 pad0;
30*4882a593Smuzhiyun 	u32 posted_index;		/* 0x10 */
31*4882a593Smuzhiyun 	u32 pad1;
32*4882a593Smuzhiyun 	u32 cq_index;			/* 0x18 */
33*4882a593Smuzhiyun 	u32 pad2;
34*4882a593Smuzhiyun 	u32 enable;			/* 0x20 */
35*4882a593Smuzhiyun 	u32 pad3;
36*4882a593Smuzhiyun 	u32 running;			/* 0x28 */
37*4882a593Smuzhiyun 	u32 pad4;
38*4882a593Smuzhiyun 	u32 fetch_index;		/* 0x30 */
39*4882a593Smuzhiyun 	u32 pad5;
40*4882a593Smuzhiyun 	u32 dca_value;			/* 0x38 */
41*4882a593Smuzhiyun 	u32 pad6;
42*4882a593Smuzhiyun 	u32 error_interrupt_enable;	/* 0x40 */
43*4882a593Smuzhiyun 	u32 pad7;
44*4882a593Smuzhiyun 	u32 error_interrupt_offset;	/* 0x48 */
45*4882a593Smuzhiyun 	u32 pad8;
46*4882a593Smuzhiyun 	u32 error_status;		/* 0x50 */
47*4882a593Smuzhiyun 	u32 pad9;
48*4882a593Smuzhiyun };
49*4882a593Smuzhiyun 
50*4882a593Smuzhiyun struct vnic_wq_buf {
51*4882a593Smuzhiyun 	struct vnic_wq_buf *next;
52*4882a593Smuzhiyun 	dma_addr_t dma_addr;
53*4882a593Smuzhiyun 	void *os_buf;
54*4882a593Smuzhiyun 	unsigned int len;
55*4882a593Smuzhiyun 	unsigned int index;
56*4882a593Smuzhiyun 	int sop;
57*4882a593Smuzhiyun 	void *desc;
58*4882a593Smuzhiyun };
59*4882a593Smuzhiyun 
60*4882a593Smuzhiyun /* Break the vnic_wq_buf allocations into blocks of 64 entries */
61*4882a593Smuzhiyun #define VNIC_WQ_BUF_MIN_BLK_ENTRIES 32
62*4882a593Smuzhiyun #define VNIC_WQ_BUF_DFLT_BLK_ENTRIES 64
63*4882a593Smuzhiyun #define VNIC_WQ_BUF_BLK_ENTRIES(entries) \
64*4882a593Smuzhiyun 	((unsigned int)(entries < VNIC_WQ_BUF_DFLT_BLK_ENTRIES) ? \
65*4882a593Smuzhiyun 		VNIC_WQ_BUF_MIN_BLK_ENTRIES : VNIC_WQ_BUF_DFLT_BLK_ENTRIES)
66*4882a593Smuzhiyun #define VNIC_WQ_BUF_BLK_SZ \
67*4882a593Smuzhiyun 	(VNIC_WQ_BUF_DFLT_BLK_ENTRIES * sizeof(struct vnic_wq_buf))
68*4882a593Smuzhiyun #define VNIC_WQ_BUF_BLKS_NEEDED(entries) \
69*4882a593Smuzhiyun 	DIV_ROUND_UP(entries, VNIC_WQ_BUF_DFLT_BLK_ENTRIES)
70*4882a593Smuzhiyun #define VNIC_WQ_BUF_BLKS_NEEDED(entries) \
71*4882a593Smuzhiyun 	DIV_ROUND_UP(entries, VNIC_WQ_BUF_DFLT_BLK_ENTRIES)
72*4882a593Smuzhiyun #define VNIC_WQ_BUF_BLKS_MAX VNIC_WQ_BUF_BLKS_NEEDED(4096)
73*4882a593Smuzhiyun 
74*4882a593Smuzhiyun struct vnic_wq {
75*4882a593Smuzhiyun 	unsigned int index;
76*4882a593Smuzhiyun 	struct vnic_dev *vdev;
77*4882a593Smuzhiyun 	struct vnic_wq_ctrl __iomem *ctrl;	/* memory-mapped */
78*4882a593Smuzhiyun 	struct vnic_dev_ring ring;
79*4882a593Smuzhiyun 	struct vnic_wq_buf *bufs[VNIC_WQ_BUF_BLKS_MAX];
80*4882a593Smuzhiyun 	struct vnic_wq_buf *to_use;
81*4882a593Smuzhiyun 	struct vnic_wq_buf *to_clean;
82*4882a593Smuzhiyun 	unsigned int pkts_outstanding;
83*4882a593Smuzhiyun };
84*4882a593Smuzhiyun 
svnic_wq_desc_avail(struct vnic_wq * wq)85*4882a593Smuzhiyun static inline unsigned int svnic_wq_desc_avail(struct vnic_wq *wq)
86*4882a593Smuzhiyun {
87*4882a593Smuzhiyun 	/* how many does SW own? */
88*4882a593Smuzhiyun 	return wq->ring.desc_avail;
89*4882a593Smuzhiyun }
90*4882a593Smuzhiyun 
svnic_wq_desc_used(struct vnic_wq * wq)91*4882a593Smuzhiyun static inline unsigned int svnic_wq_desc_used(struct vnic_wq *wq)
92*4882a593Smuzhiyun {
93*4882a593Smuzhiyun 	/* how many does HW own? */
94*4882a593Smuzhiyun 	return wq->ring.desc_count - wq->ring.desc_avail - 1;
95*4882a593Smuzhiyun }
96*4882a593Smuzhiyun 
svnic_wq_next_desc(struct vnic_wq * wq)97*4882a593Smuzhiyun static inline void *svnic_wq_next_desc(struct vnic_wq *wq)
98*4882a593Smuzhiyun {
99*4882a593Smuzhiyun 	return wq->to_use->desc;
100*4882a593Smuzhiyun }
101*4882a593Smuzhiyun 
svnic_wq_post(struct vnic_wq * wq,void * os_buf,dma_addr_t dma_addr,unsigned int len,int sop,int eop)102*4882a593Smuzhiyun static inline void svnic_wq_post(struct vnic_wq *wq,
103*4882a593Smuzhiyun 	void *os_buf, dma_addr_t dma_addr,
104*4882a593Smuzhiyun 	unsigned int len, int sop, int eop)
105*4882a593Smuzhiyun {
106*4882a593Smuzhiyun 	struct vnic_wq_buf *buf = wq->to_use;
107*4882a593Smuzhiyun 
108*4882a593Smuzhiyun 	buf->sop = sop;
109*4882a593Smuzhiyun 	buf->os_buf = eop ? os_buf : NULL;
110*4882a593Smuzhiyun 	buf->dma_addr = dma_addr;
111*4882a593Smuzhiyun 	buf->len = len;
112*4882a593Smuzhiyun 
113*4882a593Smuzhiyun 	buf = buf->next;
114*4882a593Smuzhiyun 	if (eop) {
115*4882a593Smuzhiyun 		/* Adding write memory barrier prevents compiler and/or CPU
116*4882a593Smuzhiyun 		 * reordering, thus avoiding descriptor posting before
117*4882a593Smuzhiyun 		 * descriptor is initialized. Otherwise, hardware can read
118*4882a593Smuzhiyun 		 * stale descriptor fields.
119*4882a593Smuzhiyun 		 */
120*4882a593Smuzhiyun 		wmb();
121*4882a593Smuzhiyun 		iowrite32(buf->index, &wq->ctrl->posted_index);
122*4882a593Smuzhiyun 	}
123*4882a593Smuzhiyun 	wq->to_use = buf;
124*4882a593Smuzhiyun 
125*4882a593Smuzhiyun 	wq->ring.desc_avail--;
126*4882a593Smuzhiyun }
127*4882a593Smuzhiyun 
svnic_wq_service(struct vnic_wq * wq,struct cq_desc * cq_desc,u16 completed_index,void (* buf_service)(struct vnic_wq * wq,struct cq_desc * cq_desc,struct vnic_wq_buf * buf,void * opaque),void * opaque)128*4882a593Smuzhiyun static inline void svnic_wq_service(struct vnic_wq *wq,
129*4882a593Smuzhiyun 	struct cq_desc *cq_desc, u16 completed_index,
130*4882a593Smuzhiyun 	void (*buf_service)(struct vnic_wq *wq,
131*4882a593Smuzhiyun 	struct cq_desc *cq_desc, struct vnic_wq_buf *buf, void *opaque),
132*4882a593Smuzhiyun 	void *opaque)
133*4882a593Smuzhiyun {
134*4882a593Smuzhiyun 	struct vnic_wq_buf *buf;
135*4882a593Smuzhiyun 
136*4882a593Smuzhiyun 	buf = wq->to_clean;
137*4882a593Smuzhiyun 	while (1) {
138*4882a593Smuzhiyun 
139*4882a593Smuzhiyun 		(*buf_service)(wq, cq_desc, buf, opaque);
140*4882a593Smuzhiyun 
141*4882a593Smuzhiyun 		wq->ring.desc_avail++;
142*4882a593Smuzhiyun 
143*4882a593Smuzhiyun 		wq->to_clean = buf->next;
144*4882a593Smuzhiyun 
145*4882a593Smuzhiyun 		if (buf->index == completed_index)
146*4882a593Smuzhiyun 			break;
147*4882a593Smuzhiyun 
148*4882a593Smuzhiyun 		buf = wq->to_clean;
149*4882a593Smuzhiyun 	}
150*4882a593Smuzhiyun }
151*4882a593Smuzhiyun 
152*4882a593Smuzhiyun void svnic_wq_free(struct vnic_wq *wq);
153*4882a593Smuzhiyun int svnic_wq_alloc(struct vnic_dev *vdev, struct vnic_wq *wq,
154*4882a593Smuzhiyun 	unsigned int index, unsigned int desc_count, unsigned int desc_size);
155*4882a593Smuzhiyun int vnic_wq_devcmd2_alloc(struct vnic_dev *vdev, struct vnic_wq *wq,
156*4882a593Smuzhiyun 		unsigned int desc_count, unsigned int desc_size);
157*4882a593Smuzhiyun void vnic_wq_init_start(struct vnic_wq *wq, unsigned int cq_index,
158*4882a593Smuzhiyun 		unsigned int fetch_index, unsigned int post_index,
159*4882a593Smuzhiyun 		unsigned int error_interrupt_enable,
160*4882a593Smuzhiyun 		unsigned int error_interrupt_offset);
161*4882a593Smuzhiyun 
162*4882a593Smuzhiyun void svnic_wq_init(struct vnic_wq *wq, unsigned int cq_index,
163*4882a593Smuzhiyun 	unsigned int error_interrupt_enable,
164*4882a593Smuzhiyun 	unsigned int error_interrupt_offset);
165*4882a593Smuzhiyun unsigned int svnic_wq_error_status(struct vnic_wq *wq);
166*4882a593Smuzhiyun void svnic_wq_enable(struct vnic_wq *wq);
167*4882a593Smuzhiyun int svnic_wq_disable(struct vnic_wq *wq);
168*4882a593Smuzhiyun void svnic_wq_clean(struct vnic_wq *wq,
169*4882a593Smuzhiyun 	void (*buf_clean)(struct vnic_wq *wq, struct vnic_wq_buf *buf));
170*4882a593Smuzhiyun #endif /* _VNIC_WQ_H_ */
171