1*4882a593Smuzhiyun /*
2*4882a593Smuzhiyun * Copyright 2014 Cisco Systems, Inc. All rights reserved.
3*4882a593Smuzhiyun *
4*4882a593Smuzhiyun * This program is free software; you may redistribute it and/or modify
5*4882a593Smuzhiyun * it under the terms of the GNU General Public License as published by
6*4882a593Smuzhiyun * the Free Software Foundation; version 2 of the License.
7*4882a593Smuzhiyun *
8*4882a593Smuzhiyun * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
9*4882a593Smuzhiyun * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
10*4882a593Smuzhiyun * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
11*4882a593Smuzhiyun * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
12*4882a593Smuzhiyun * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
13*4882a593Smuzhiyun * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
14*4882a593Smuzhiyun * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
15*4882a593Smuzhiyun * SOFTWARE.
16*4882a593Smuzhiyun */
17*4882a593Smuzhiyun
18*4882a593Smuzhiyun #ifndef __SNIC_STATS_H
19*4882a593Smuzhiyun #define __SNIC_STATS_H
20*4882a593Smuzhiyun
21*4882a593Smuzhiyun struct snic_io_stats {
22*4882a593Smuzhiyun atomic64_t active; /* Active IOs */
23*4882a593Smuzhiyun atomic64_t max_active; /* Max # active IOs */
24*4882a593Smuzhiyun atomic64_t max_sgl; /* Max # SGLs for any IO */
25*4882a593Smuzhiyun atomic64_t max_time; /* Max time to process IO */
26*4882a593Smuzhiyun atomic64_t max_qtime; /* Max time to Queue the IO */
27*4882a593Smuzhiyun atomic64_t max_cmpl_time; /* Max time to complete the IO */
28*4882a593Smuzhiyun atomic64_t sgl_cnt[SNIC_MAX_SG_DESC_CNT]; /* SGL Counters */
29*4882a593Smuzhiyun atomic64_t max_io_sz; /* Max IO Size */
30*4882a593Smuzhiyun atomic64_t compl; /* IO Completions */
31*4882a593Smuzhiyun atomic64_t fail; /* IO Failures */
32*4882a593Smuzhiyun atomic64_t req_null; /* req or req info is NULL */
33*4882a593Smuzhiyun atomic64_t alloc_fail; /* Alloc Failures */
34*4882a593Smuzhiyun atomic64_t sc_null;
35*4882a593Smuzhiyun atomic64_t io_not_found; /* IO Not Found */
36*4882a593Smuzhiyun atomic64_t num_ios; /* Number of IOs */
37*4882a593Smuzhiyun };
38*4882a593Smuzhiyun
39*4882a593Smuzhiyun struct snic_abort_stats {
40*4882a593Smuzhiyun atomic64_t num; /* Abort counter */
41*4882a593Smuzhiyun atomic64_t fail; /* Abort Failure Counter */
42*4882a593Smuzhiyun atomic64_t drv_tmo; /* Abort Driver Timeouts */
43*4882a593Smuzhiyun atomic64_t fw_tmo; /* Abort Firmware Timeouts */
44*4882a593Smuzhiyun atomic64_t io_not_found;/* Abort IO Not Found */
45*4882a593Smuzhiyun atomic64_t q_fail; /* Abort Queuing Failed */
46*4882a593Smuzhiyun };
47*4882a593Smuzhiyun
48*4882a593Smuzhiyun struct snic_reset_stats {
49*4882a593Smuzhiyun atomic64_t dev_resets; /* Device Reset Counter */
50*4882a593Smuzhiyun atomic64_t dev_reset_fail; /* Device Reset Failures */
51*4882a593Smuzhiyun atomic64_t dev_reset_aborts; /* Device Reset Aborts */
52*4882a593Smuzhiyun atomic64_t dev_reset_tmo; /* Device Reset Timeout */
53*4882a593Smuzhiyun atomic64_t dev_reset_terms; /* Device Reset terminate */
54*4882a593Smuzhiyun atomic64_t hba_resets; /* hba/firmware resets */
55*4882a593Smuzhiyun atomic64_t hba_reset_cmpl; /* hba/firmware reset completions */
56*4882a593Smuzhiyun atomic64_t hba_reset_fail; /* hba/firmware failures */
57*4882a593Smuzhiyun atomic64_t snic_resets; /* snic resets */
58*4882a593Smuzhiyun atomic64_t snic_reset_compl; /* snic reset completions */
59*4882a593Smuzhiyun atomic64_t snic_reset_fail; /* snic reset failures */
60*4882a593Smuzhiyun };
61*4882a593Smuzhiyun
62*4882a593Smuzhiyun struct snic_fw_stats {
63*4882a593Smuzhiyun atomic64_t actv_reqs; /* Active Requests */
64*4882a593Smuzhiyun atomic64_t max_actv_reqs; /* Max Active Requests */
65*4882a593Smuzhiyun atomic64_t out_of_res; /* Firmware Out Of Resources */
66*4882a593Smuzhiyun atomic64_t io_errs; /* Firmware IO Firmware Errors */
67*4882a593Smuzhiyun atomic64_t scsi_errs; /* Target hits check condition */
68*4882a593Smuzhiyun };
69*4882a593Smuzhiyun
70*4882a593Smuzhiyun struct snic_misc_stats {
71*4882a593Smuzhiyun u64 last_isr_time;
72*4882a593Smuzhiyun u64 last_ack_time;
73*4882a593Smuzhiyun atomic64_t ack_isr_cnt;
74*4882a593Smuzhiyun atomic64_t cmpl_isr_cnt;
75*4882a593Smuzhiyun atomic64_t errnotify_isr_cnt;
76*4882a593Smuzhiyun atomic64_t max_cq_ents; /* Max CQ Entries */
77*4882a593Smuzhiyun atomic64_t data_cnt_mismat; /* Data Count Mismatch */
78*4882a593Smuzhiyun atomic64_t io_tmo;
79*4882a593Smuzhiyun atomic64_t io_aborted;
80*4882a593Smuzhiyun atomic64_t sgl_inval; /* SGL Invalid */
81*4882a593Smuzhiyun atomic64_t abts_wq_alloc_fail; /* Abort Path WQ desc alloc failure */
82*4882a593Smuzhiyun atomic64_t devrst_wq_alloc_fail;/* Device Reset - WQ desc alloc fail */
83*4882a593Smuzhiyun atomic64_t wq_alloc_fail; /* IO WQ desc alloc failure */
84*4882a593Smuzhiyun atomic64_t no_icmnd_itmf_cmpls;
85*4882a593Smuzhiyun atomic64_t io_under_run;
86*4882a593Smuzhiyun atomic64_t qfull;
87*4882a593Smuzhiyun atomic64_t qsz_rampup;
88*4882a593Smuzhiyun atomic64_t qsz_rampdown;
89*4882a593Smuzhiyun atomic64_t last_qsz;
90*4882a593Smuzhiyun atomic64_t tgt_not_rdy;
91*4882a593Smuzhiyun };
92*4882a593Smuzhiyun
93*4882a593Smuzhiyun struct snic_stats {
94*4882a593Smuzhiyun struct snic_io_stats io;
95*4882a593Smuzhiyun struct snic_abort_stats abts;
96*4882a593Smuzhiyun struct snic_reset_stats reset;
97*4882a593Smuzhiyun struct snic_fw_stats fw;
98*4882a593Smuzhiyun struct snic_misc_stats misc;
99*4882a593Smuzhiyun atomic64_t io_cmpl_skip;
100*4882a593Smuzhiyun };
101*4882a593Smuzhiyun
102*4882a593Smuzhiyun void snic_stats_debugfs_init(struct snic *);
103*4882a593Smuzhiyun void snic_stats_debugfs_remove(struct snic *);
104*4882a593Smuzhiyun
105*4882a593Smuzhiyun /* Auxillary function to update active IO counter */
106*4882a593Smuzhiyun static inline void
snic_stats_update_active_ios(struct snic_stats * s_stats)107*4882a593Smuzhiyun snic_stats_update_active_ios(struct snic_stats *s_stats)
108*4882a593Smuzhiyun {
109*4882a593Smuzhiyun struct snic_io_stats *io = &s_stats->io;
110*4882a593Smuzhiyun int nr_active_ios;
111*4882a593Smuzhiyun
112*4882a593Smuzhiyun nr_active_ios = atomic64_read(&io->active);
113*4882a593Smuzhiyun if (atomic64_read(&io->max_active) < nr_active_ios)
114*4882a593Smuzhiyun atomic64_set(&io->max_active, nr_active_ios);
115*4882a593Smuzhiyun
116*4882a593Smuzhiyun atomic64_inc(&io->num_ios);
117*4882a593Smuzhiyun }
118*4882a593Smuzhiyun
119*4882a593Smuzhiyun /* Auxillary function to update IO completion counter */
120*4882a593Smuzhiyun static inline void
snic_stats_update_io_cmpl(struct snic_stats * s_stats)121*4882a593Smuzhiyun snic_stats_update_io_cmpl(struct snic_stats *s_stats)
122*4882a593Smuzhiyun {
123*4882a593Smuzhiyun atomic64_dec(&s_stats->io.active);
124*4882a593Smuzhiyun if (unlikely(atomic64_read(&s_stats->io_cmpl_skip)))
125*4882a593Smuzhiyun atomic64_dec(&s_stats->io_cmpl_skip);
126*4882a593Smuzhiyun else
127*4882a593Smuzhiyun atomic64_inc(&s_stats->io.compl);
128*4882a593Smuzhiyun }
129*4882a593Smuzhiyun #endif /* __SNIC_STATS_H */
130