1*4882a593Smuzhiyun /* 2*4882a593Smuzhiyun * Copyright 2014 Cisco Systems, Inc. All rights reserved. 3*4882a593Smuzhiyun * 4*4882a593Smuzhiyun * This program is free software; you may redistribute it and/or modify 5*4882a593Smuzhiyun * it under the terms of the GNU General Public License as published by 6*4882a593Smuzhiyun * the Free Software Foundation; version 2 of the License. 7*4882a593Smuzhiyun * 8*4882a593Smuzhiyun * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, 9*4882a593Smuzhiyun * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF 10*4882a593Smuzhiyun * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND 11*4882a593Smuzhiyun * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS 12*4882a593Smuzhiyun * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN 13*4882a593Smuzhiyun * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN 14*4882a593Smuzhiyun * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE 15*4882a593Smuzhiyun * SOFTWARE. 16*4882a593Smuzhiyun */ 17*4882a593Smuzhiyun 18*4882a593Smuzhiyun #ifndef _SNIC_IO_H 19*4882a593Smuzhiyun #define _SNIC_IO_H 20*4882a593Smuzhiyun 21*4882a593Smuzhiyun #define SNIC_DFLT_SG_DESC_CNT 32 /* Default descriptors for sgl */ 22*4882a593Smuzhiyun #define SNIC_MAX_SG_DESC_CNT 60 /* Max descriptor for sgl */ 23*4882a593Smuzhiyun #define SNIC_SG_DESC_ALIGN 16 /* Descriptor address alignment */ 24*4882a593Smuzhiyun 25*4882a593Smuzhiyun /* SG descriptor for snic */ 26*4882a593Smuzhiyun struct snic_sg_desc { 27*4882a593Smuzhiyun __le64 addr; 28*4882a593Smuzhiyun __le32 len; 29*4882a593Smuzhiyun u32 _resvd; 30*4882a593Smuzhiyun }; 31*4882a593Smuzhiyun 32*4882a593Smuzhiyun struct snic_dflt_sgl { 33*4882a593Smuzhiyun struct snic_sg_desc sg_desc[SNIC_DFLT_SG_DESC_CNT]; 34*4882a593Smuzhiyun }; 35*4882a593Smuzhiyun 36*4882a593Smuzhiyun struct snic_max_sgl { 37*4882a593Smuzhiyun struct snic_sg_desc sg_desc[SNIC_MAX_SG_DESC_CNT]; 38*4882a593Smuzhiyun }; 39*4882a593Smuzhiyun 40*4882a593Smuzhiyun enum snic_req_cache_type { 41*4882a593Smuzhiyun SNIC_REQ_CACHE_DFLT_SGL = 0, /* cache with default size sgl */ 42*4882a593Smuzhiyun SNIC_REQ_CACHE_MAX_SGL, /* cache with max size sgl */ 43*4882a593Smuzhiyun SNIC_REQ_TM_CACHE, /* cache for task mgmt reqs contains 44*4882a593Smuzhiyun snic_host_req objects only*/ 45*4882a593Smuzhiyun SNIC_REQ_MAX_CACHES /* number of sgl caches */ 46*4882a593Smuzhiyun }; 47*4882a593Smuzhiyun 48*4882a593Smuzhiyun /* Per IO internal state */ 49*4882a593Smuzhiyun struct snic_internal_io_state { 50*4882a593Smuzhiyun char *rqi; 51*4882a593Smuzhiyun u64 flags; 52*4882a593Smuzhiyun u32 state; 53*4882a593Smuzhiyun u32 abts_status; /* Abort completion status */ 54*4882a593Smuzhiyun u32 lr_status; /* device reset completion status */ 55*4882a593Smuzhiyun }; 56*4882a593Smuzhiyun 57*4882a593Smuzhiyun /* IO state machine */ 58*4882a593Smuzhiyun enum snic_ioreq_state { 59*4882a593Smuzhiyun SNIC_IOREQ_NOT_INITED = 0, 60*4882a593Smuzhiyun SNIC_IOREQ_PENDING, 61*4882a593Smuzhiyun SNIC_IOREQ_ABTS_PENDING, 62*4882a593Smuzhiyun SNIC_IOREQ_ABTS_COMPLETE, 63*4882a593Smuzhiyun SNIC_IOREQ_LR_PENDING, 64*4882a593Smuzhiyun SNIC_IOREQ_LR_COMPLETE, 65*4882a593Smuzhiyun SNIC_IOREQ_COMPLETE, 66*4882a593Smuzhiyun }; 67*4882a593Smuzhiyun 68*4882a593Smuzhiyun struct snic; 69*4882a593Smuzhiyun struct snic_host_req; 70*4882a593Smuzhiyun 71*4882a593Smuzhiyun /* 72*4882a593Smuzhiyun * snic_req_info : Contains info about IO, one per scsi command. 73*4882a593Smuzhiyun * Notes: Make sure that the structure is aligned to 16 B 74*4882a593Smuzhiyun * this helps in easy access to snic_req_info from snic_host_req 75*4882a593Smuzhiyun */ 76*4882a593Smuzhiyun struct snic_req_info { 77*4882a593Smuzhiyun struct list_head list; 78*4882a593Smuzhiyun struct snic_host_req *req; 79*4882a593Smuzhiyun u64 start_time; /* start time in jiffies */ 80*4882a593Smuzhiyun u16 rq_pool_type; /* noticion of request pool type */ 81*4882a593Smuzhiyun u16 req_len; /* buf len passing to fw (req + sgl)*/ 82*4882a593Smuzhiyun u32 tgt_id; 83*4882a593Smuzhiyun 84*4882a593Smuzhiyun u32 tm_tag; 85*4882a593Smuzhiyun u8 io_cmpl:1; /* sets to 1 when fw completes IO */ 86*4882a593Smuzhiyun u8 resvd[3]; 87*4882a593Smuzhiyun struct scsi_cmnd *sc; /* Associated scsi cmd */ 88*4882a593Smuzhiyun struct snic *snic; /* Associated snic */ 89*4882a593Smuzhiyun ulong sge_va; /* Pointer to Resp Buffer */ 90*4882a593Smuzhiyun u64 snsbuf_va; 91*4882a593Smuzhiyun 92*4882a593Smuzhiyun struct snic_host_req *abort_req; 93*4882a593Smuzhiyun struct completion *abts_done; 94*4882a593Smuzhiyun 95*4882a593Smuzhiyun struct snic_host_req *dr_req; 96*4882a593Smuzhiyun struct completion *dr_done; 97*4882a593Smuzhiyun }; 98*4882a593Smuzhiyun 99*4882a593Smuzhiyun 100*4882a593Smuzhiyun #define rqi_to_req(rqi) \ 101*4882a593Smuzhiyun ((struct snic_host_req *) (((struct snic_req_info *)rqi)->req)) 102*4882a593Smuzhiyun 103*4882a593Smuzhiyun #define req_to_rqi(req) \ 104*4882a593Smuzhiyun ((struct snic_req_info *) (((struct snic_host_req *)req)->hdr.init_ctx)) 105*4882a593Smuzhiyun 106*4882a593Smuzhiyun #define req_to_sgl(req) \ 107*4882a593Smuzhiyun ((struct snic_sg_desc *) (((struct snic_host_req *)req)+1)) 108*4882a593Smuzhiyun 109*4882a593Smuzhiyun struct snic_req_info * 110*4882a593Smuzhiyun snic_req_init(struct snic *, int sg_cnt); 111*4882a593Smuzhiyun void snic_req_free(struct snic *, struct snic_req_info *); 112*4882a593Smuzhiyun void snic_calc_io_process_time(struct snic *, struct snic_req_info *); 113*4882a593Smuzhiyun void snic_pci_unmap_rsp_buf(struct snic *, struct snic_req_info *); 114*4882a593Smuzhiyun struct snic_host_req * 115*4882a593Smuzhiyun snic_abort_req_init(struct snic *, struct snic_req_info *); 116*4882a593Smuzhiyun struct snic_host_req * 117*4882a593Smuzhiyun snic_dr_req_init(struct snic *, struct snic_req_info *); 118*4882a593Smuzhiyun #endif /* _SNIC_IO_H */ 119