xref: /OK3568_Linux_fs/kernel/drivers/scsi/smartpqi/smartpqi_init.c (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun  *    driver for Microsemi PQI-based storage controllers
4*4882a593Smuzhiyun  *    Copyright (c) 2019-2020 Microchip Technology Inc. and its subsidiaries
5*4882a593Smuzhiyun  *    Copyright (c) 2016-2018 Microsemi Corporation
6*4882a593Smuzhiyun  *    Copyright (c) 2016 PMC-Sierra, Inc.
7*4882a593Smuzhiyun  *
8*4882a593Smuzhiyun  *    Questions/Comments/Bugfixes to storagedev@microchip.com
9*4882a593Smuzhiyun  *
10*4882a593Smuzhiyun  */
11*4882a593Smuzhiyun 
12*4882a593Smuzhiyun #include <linux/module.h>
13*4882a593Smuzhiyun #include <linux/kernel.h>
14*4882a593Smuzhiyun #include <linux/pci.h>
15*4882a593Smuzhiyun #include <linux/delay.h>
16*4882a593Smuzhiyun #include <linux/interrupt.h>
17*4882a593Smuzhiyun #include <linux/sched.h>
18*4882a593Smuzhiyun #include <linux/rtc.h>
19*4882a593Smuzhiyun #include <linux/bcd.h>
20*4882a593Smuzhiyun #include <linux/reboot.h>
21*4882a593Smuzhiyun #include <linux/cciss_ioctl.h>
22*4882a593Smuzhiyun #include <linux/blk-mq-pci.h>
23*4882a593Smuzhiyun #include <scsi/scsi_host.h>
24*4882a593Smuzhiyun #include <scsi/scsi_cmnd.h>
25*4882a593Smuzhiyun #include <scsi/scsi_device.h>
26*4882a593Smuzhiyun #include <scsi/scsi_eh.h>
27*4882a593Smuzhiyun #include <scsi/scsi_transport_sas.h>
28*4882a593Smuzhiyun #include <asm/unaligned.h>
29*4882a593Smuzhiyun #include "smartpqi.h"
30*4882a593Smuzhiyun #include "smartpqi_sis.h"
31*4882a593Smuzhiyun 
32*4882a593Smuzhiyun #if !defined(BUILD_TIMESTAMP)
33*4882a593Smuzhiyun #define BUILD_TIMESTAMP
34*4882a593Smuzhiyun #endif
35*4882a593Smuzhiyun 
36*4882a593Smuzhiyun #define DRIVER_VERSION		"1.2.16-010"
37*4882a593Smuzhiyun #define DRIVER_MAJOR		1
38*4882a593Smuzhiyun #define DRIVER_MINOR		2
39*4882a593Smuzhiyun #define DRIVER_RELEASE		16
40*4882a593Smuzhiyun #define DRIVER_REVISION		10
41*4882a593Smuzhiyun 
42*4882a593Smuzhiyun #define DRIVER_NAME		"Microsemi PQI Driver (v" \
43*4882a593Smuzhiyun 				DRIVER_VERSION BUILD_TIMESTAMP ")"
44*4882a593Smuzhiyun #define DRIVER_NAME_SHORT	"smartpqi"
45*4882a593Smuzhiyun 
46*4882a593Smuzhiyun #define PQI_EXTRA_SGL_MEMORY	(12 * sizeof(struct pqi_sg_descriptor))
47*4882a593Smuzhiyun 
48*4882a593Smuzhiyun MODULE_AUTHOR("Microsemi");
49*4882a593Smuzhiyun MODULE_DESCRIPTION("Driver for Microsemi Smart Family Controller version "
50*4882a593Smuzhiyun 	DRIVER_VERSION);
51*4882a593Smuzhiyun MODULE_SUPPORTED_DEVICE("Microsemi Smart Family Controllers");
52*4882a593Smuzhiyun MODULE_VERSION(DRIVER_VERSION);
53*4882a593Smuzhiyun MODULE_LICENSE("GPL");
54*4882a593Smuzhiyun 
55*4882a593Smuzhiyun static void pqi_take_ctrl_offline(struct pqi_ctrl_info *ctrl_info);
56*4882a593Smuzhiyun static void pqi_ctrl_offline_worker(struct work_struct *work);
57*4882a593Smuzhiyun static void pqi_retry_raid_bypass_requests(struct pqi_ctrl_info *ctrl_info);
58*4882a593Smuzhiyun static int pqi_scan_scsi_devices(struct pqi_ctrl_info *ctrl_info);
59*4882a593Smuzhiyun static void pqi_scan_start(struct Scsi_Host *shost);
60*4882a593Smuzhiyun static void pqi_start_io(struct pqi_ctrl_info *ctrl_info,
61*4882a593Smuzhiyun 	struct pqi_queue_group *queue_group, enum pqi_io_path path,
62*4882a593Smuzhiyun 	struct pqi_io_request *io_request);
63*4882a593Smuzhiyun static int pqi_submit_raid_request_synchronous(struct pqi_ctrl_info *ctrl_info,
64*4882a593Smuzhiyun 	struct pqi_iu_header *request, unsigned int flags,
65*4882a593Smuzhiyun 	struct pqi_raid_error_info *error_info, unsigned long timeout_msecs);
66*4882a593Smuzhiyun static int pqi_aio_submit_io(struct pqi_ctrl_info *ctrl_info,
67*4882a593Smuzhiyun 	struct scsi_cmnd *scmd, u32 aio_handle, u8 *cdb,
68*4882a593Smuzhiyun 	unsigned int cdb_length, struct pqi_queue_group *queue_group,
69*4882a593Smuzhiyun 	struct pqi_encryption_info *encryption_info, bool raid_bypass);
70*4882a593Smuzhiyun static void pqi_ofa_ctrl_quiesce(struct pqi_ctrl_info *ctrl_info);
71*4882a593Smuzhiyun static void pqi_ofa_ctrl_unquiesce(struct pqi_ctrl_info *ctrl_info);
72*4882a593Smuzhiyun static int pqi_ofa_ctrl_restart(struct pqi_ctrl_info *ctrl_info);
73*4882a593Smuzhiyun static void pqi_ofa_setup_host_buffer(struct pqi_ctrl_info *ctrl_info,
74*4882a593Smuzhiyun 	u32 bytes_requested);
75*4882a593Smuzhiyun static void pqi_ofa_free_host_buffer(struct pqi_ctrl_info *ctrl_info);
76*4882a593Smuzhiyun static int pqi_ofa_host_memory_update(struct pqi_ctrl_info *ctrl_info);
77*4882a593Smuzhiyun static int pqi_device_wait_for_pending_io(struct pqi_ctrl_info *ctrl_info,
78*4882a593Smuzhiyun 	struct pqi_scsi_dev *device, unsigned long timeout_secs);
79*4882a593Smuzhiyun 
80*4882a593Smuzhiyun /* for flags argument to pqi_submit_raid_request_synchronous() */
81*4882a593Smuzhiyun #define PQI_SYNC_FLAGS_INTERRUPTABLE	0x1
82*4882a593Smuzhiyun 
83*4882a593Smuzhiyun static struct scsi_transport_template *pqi_sas_transport_template;
84*4882a593Smuzhiyun 
85*4882a593Smuzhiyun static atomic_t pqi_controller_count = ATOMIC_INIT(0);
86*4882a593Smuzhiyun 
87*4882a593Smuzhiyun enum pqi_lockup_action {
88*4882a593Smuzhiyun 	NONE,
89*4882a593Smuzhiyun 	REBOOT,
90*4882a593Smuzhiyun 	PANIC
91*4882a593Smuzhiyun };
92*4882a593Smuzhiyun 
93*4882a593Smuzhiyun static enum pqi_lockup_action pqi_lockup_action = NONE;
94*4882a593Smuzhiyun 
95*4882a593Smuzhiyun static struct {
96*4882a593Smuzhiyun 	enum pqi_lockup_action	action;
97*4882a593Smuzhiyun 	char			*name;
98*4882a593Smuzhiyun } pqi_lockup_actions[] = {
99*4882a593Smuzhiyun 	{
100*4882a593Smuzhiyun 		.action = NONE,
101*4882a593Smuzhiyun 		.name = "none",
102*4882a593Smuzhiyun 	},
103*4882a593Smuzhiyun 	{
104*4882a593Smuzhiyun 		.action = REBOOT,
105*4882a593Smuzhiyun 		.name = "reboot",
106*4882a593Smuzhiyun 	},
107*4882a593Smuzhiyun 	{
108*4882a593Smuzhiyun 		.action = PANIC,
109*4882a593Smuzhiyun 		.name = "panic",
110*4882a593Smuzhiyun 	},
111*4882a593Smuzhiyun };
112*4882a593Smuzhiyun 
113*4882a593Smuzhiyun static unsigned int pqi_supported_event_types[] = {
114*4882a593Smuzhiyun 	PQI_EVENT_TYPE_HOTPLUG,
115*4882a593Smuzhiyun 	PQI_EVENT_TYPE_HARDWARE,
116*4882a593Smuzhiyun 	PQI_EVENT_TYPE_PHYSICAL_DEVICE,
117*4882a593Smuzhiyun 	PQI_EVENT_TYPE_LOGICAL_DEVICE,
118*4882a593Smuzhiyun 	PQI_EVENT_TYPE_OFA,
119*4882a593Smuzhiyun 	PQI_EVENT_TYPE_AIO_STATE_CHANGE,
120*4882a593Smuzhiyun 	PQI_EVENT_TYPE_AIO_CONFIG_CHANGE,
121*4882a593Smuzhiyun };
122*4882a593Smuzhiyun 
123*4882a593Smuzhiyun static int pqi_disable_device_id_wildcards;
124*4882a593Smuzhiyun module_param_named(disable_device_id_wildcards,
125*4882a593Smuzhiyun 	pqi_disable_device_id_wildcards, int, 0644);
126*4882a593Smuzhiyun MODULE_PARM_DESC(disable_device_id_wildcards,
127*4882a593Smuzhiyun 	"Disable device ID wildcards.");
128*4882a593Smuzhiyun 
129*4882a593Smuzhiyun static int pqi_disable_heartbeat;
130*4882a593Smuzhiyun module_param_named(disable_heartbeat,
131*4882a593Smuzhiyun 	pqi_disable_heartbeat, int, 0644);
132*4882a593Smuzhiyun MODULE_PARM_DESC(disable_heartbeat,
133*4882a593Smuzhiyun 	"Disable heartbeat.");
134*4882a593Smuzhiyun 
135*4882a593Smuzhiyun static int pqi_disable_ctrl_shutdown;
136*4882a593Smuzhiyun module_param_named(disable_ctrl_shutdown,
137*4882a593Smuzhiyun 	pqi_disable_ctrl_shutdown, int, 0644);
138*4882a593Smuzhiyun MODULE_PARM_DESC(disable_ctrl_shutdown,
139*4882a593Smuzhiyun 	"Disable controller shutdown when controller locked up.");
140*4882a593Smuzhiyun 
141*4882a593Smuzhiyun static char *pqi_lockup_action_param;
142*4882a593Smuzhiyun module_param_named(lockup_action,
143*4882a593Smuzhiyun 	pqi_lockup_action_param, charp, 0644);
144*4882a593Smuzhiyun MODULE_PARM_DESC(lockup_action, "Action to take when controller locked up.\n"
145*4882a593Smuzhiyun 	"\t\tSupported: none, reboot, panic\n"
146*4882a593Smuzhiyun 	"\t\tDefault: none");
147*4882a593Smuzhiyun 
148*4882a593Smuzhiyun static int pqi_expose_ld_first;
149*4882a593Smuzhiyun module_param_named(expose_ld_first,
150*4882a593Smuzhiyun 	pqi_expose_ld_first, int, 0644);
151*4882a593Smuzhiyun MODULE_PARM_DESC(expose_ld_first,
152*4882a593Smuzhiyun 	"Expose logical drives before physical drives.");
153*4882a593Smuzhiyun 
154*4882a593Smuzhiyun static int pqi_hide_vsep;
155*4882a593Smuzhiyun module_param_named(hide_vsep,
156*4882a593Smuzhiyun 	pqi_hide_vsep, int, 0644);
157*4882a593Smuzhiyun MODULE_PARM_DESC(hide_vsep,
158*4882a593Smuzhiyun 	"Hide the virtual SEP for direct attached drives.");
159*4882a593Smuzhiyun 
160*4882a593Smuzhiyun static char *raid_levels[] = {
161*4882a593Smuzhiyun 	"RAID-0",
162*4882a593Smuzhiyun 	"RAID-4",
163*4882a593Smuzhiyun 	"RAID-1(1+0)",
164*4882a593Smuzhiyun 	"RAID-5",
165*4882a593Smuzhiyun 	"RAID-5+1",
166*4882a593Smuzhiyun 	"RAID-ADG",
167*4882a593Smuzhiyun 	"RAID-1(ADM)",
168*4882a593Smuzhiyun };
169*4882a593Smuzhiyun 
pqi_raid_level_to_string(u8 raid_level)170*4882a593Smuzhiyun static char *pqi_raid_level_to_string(u8 raid_level)
171*4882a593Smuzhiyun {
172*4882a593Smuzhiyun 	if (raid_level < ARRAY_SIZE(raid_levels))
173*4882a593Smuzhiyun 		return raid_levels[raid_level];
174*4882a593Smuzhiyun 
175*4882a593Smuzhiyun 	return "RAID UNKNOWN";
176*4882a593Smuzhiyun }
177*4882a593Smuzhiyun 
178*4882a593Smuzhiyun #define SA_RAID_0		0
179*4882a593Smuzhiyun #define SA_RAID_4		1
180*4882a593Smuzhiyun #define SA_RAID_1		2	/* also used for RAID 10 */
181*4882a593Smuzhiyun #define SA_RAID_5		3	/* also used for RAID 50 */
182*4882a593Smuzhiyun #define SA_RAID_51		4
183*4882a593Smuzhiyun #define SA_RAID_6		5	/* also used for RAID 60 */
184*4882a593Smuzhiyun #define SA_RAID_ADM		6	/* also used for RAID 1+0 ADM */
185*4882a593Smuzhiyun #define SA_RAID_MAX		SA_RAID_ADM
186*4882a593Smuzhiyun #define SA_RAID_UNKNOWN		0xff
187*4882a593Smuzhiyun 
pqi_scsi_done(struct scsi_cmnd * scmd)188*4882a593Smuzhiyun static inline void pqi_scsi_done(struct scsi_cmnd *scmd)
189*4882a593Smuzhiyun {
190*4882a593Smuzhiyun 	pqi_prep_for_scsi_done(scmd);
191*4882a593Smuzhiyun 	scmd->scsi_done(scmd);
192*4882a593Smuzhiyun }
193*4882a593Smuzhiyun 
pqi_disable_write_same(struct scsi_device * sdev)194*4882a593Smuzhiyun static inline void pqi_disable_write_same(struct scsi_device *sdev)
195*4882a593Smuzhiyun {
196*4882a593Smuzhiyun 	sdev->no_write_same = 1;
197*4882a593Smuzhiyun }
198*4882a593Smuzhiyun 
pqi_scsi3addr_equal(u8 * scsi3addr1,u8 * scsi3addr2)199*4882a593Smuzhiyun static inline bool pqi_scsi3addr_equal(u8 *scsi3addr1, u8 *scsi3addr2)
200*4882a593Smuzhiyun {
201*4882a593Smuzhiyun 	return memcmp(scsi3addr1, scsi3addr2, 8) == 0;
202*4882a593Smuzhiyun }
203*4882a593Smuzhiyun 
pqi_is_logical_device(struct pqi_scsi_dev * device)204*4882a593Smuzhiyun static inline bool pqi_is_logical_device(struct pqi_scsi_dev *device)
205*4882a593Smuzhiyun {
206*4882a593Smuzhiyun 	return !device->is_physical_device;
207*4882a593Smuzhiyun }
208*4882a593Smuzhiyun 
pqi_is_external_raid_addr(u8 * scsi3addr)209*4882a593Smuzhiyun static inline bool pqi_is_external_raid_addr(u8 *scsi3addr)
210*4882a593Smuzhiyun {
211*4882a593Smuzhiyun 	return scsi3addr[2] != 0;
212*4882a593Smuzhiyun }
213*4882a593Smuzhiyun 
pqi_ctrl_offline(struct pqi_ctrl_info * ctrl_info)214*4882a593Smuzhiyun static inline bool pqi_ctrl_offline(struct pqi_ctrl_info *ctrl_info)
215*4882a593Smuzhiyun {
216*4882a593Smuzhiyun 	return !ctrl_info->controller_online;
217*4882a593Smuzhiyun }
218*4882a593Smuzhiyun 
pqi_check_ctrl_health(struct pqi_ctrl_info * ctrl_info)219*4882a593Smuzhiyun static inline void pqi_check_ctrl_health(struct pqi_ctrl_info *ctrl_info)
220*4882a593Smuzhiyun {
221*4882a593Smuzhiyun 	if (ctrl_info->controller_online)
222*4882a593Smuzhiyun 		if (!sis_is_firmware_running(ctrl_info))
223*4882a593Smuzhiyun 			pqi_take_ctrl_offline(ctrl_info);
224*4882a593Smuzhiyun }
225*4882a593Smuzhiyun 
pqi_is_hba_lunid(u8 * scsi3addr)226*4882a593Smuzhiyun static inline bool pqi_is_hba_lunid(u8 *scsi3addr)
227*4882a593Smuzhiyun {
228*4882a593Smuzhiyun 	return pqi_scsi3addr_equal(scsi3addr, RAID_CTLR_LUNID);
229*4882a593Smuzhiyun }
230*4882a593Smuzhiyun 
pqi_get_ctrl_mode(struct pqi_ctrl_info * ctrl_info)231*4882a593Smuzhiyun static inline enum pqi_ctrl_mode pqi_get_ctrl_mode(
232*4882a593Smuzhiyun 	struct pqi_ctrl_info *ctrl_info)
233*4882a593Smuzhiyun {
234*4882a593Smuzhiyun 	return sis_read_driver_scratch(ctrl_info);
235*4882a593Smuzhiyun }
236*4882a593Smuzhiyun 
pqi_save_ctrl_mode(struct pqi_ctrl_info * ctrl_info,enum pqi_ctrl_mode mode)237*4882a593Smuzhiyun static inline void pqi_save_ctrl_mode(struct pqi_ctrl_info *ctrl_info,
238*4882a593Smuzhiyun 	enum pqi_ctrl_mode mode)
239*4882a593Smuzhiyun {
240*4882a593Smuzhiyun 	sis_write_driver_scratch(ctrl_info, mode);
241*4882a593Smuzhiyun }
242*4882a593Smuzhiyun 
pqi_ctrl_block_device_reset(struct pqi_ctrl_info * ctrl_info)243*4882a593Smuzhiyun static inline void pqi_ctrl_block_device_reset(struct pqi_ctrl_info *ctrl_info)
244*4882a593Smuzhiyun {
245*4882a593Smuzhiyun 	ctrl_info->block_device_reset = true;
246*4882a593Smuzhiyun }
247*4882a593Smuzhiyun 
pqi_device_reset_blocked(struct pqi_ctrl_info * ctrl_info)248*4882a593Smuzhiyun static inline bool pqi_device_reset_blocked(struct pqi_ctrl_info *ctrl_info)
249*4882a593Smuzhiyun {
250*4882a593Smuzhiyun 	return ctrl_info->block_device_reset;
251*4882a593Smuzhiyun }
252*4882a593Smuzhiyun 
pqi_ctrl_blocked(struct pqi_ctrl_info * ctrl_info)253*4882a593Smuzhiyun static inline bool pqi_ctrl_blocked(struct pqi_ctrl_info *ctrl_info)
254*4882a593Smuzhiyun {
255*4882a593Smuzhiyun 	return ctrl_info->block_requests;
256*4882a593Smuzhiyun }
257*4882a593Smuzhiyun 
pqi_ctrl_block_requests(struct pqi_ctrl_info * ctrl_info)258*4882a593Smuzhiyun static inline void pqi_ctrl_block_requests(struct pqi_ctrl_info *ctrl_info)
259*4882a593Smuzhiyun {
260*4882a593Smuzhiyun 	ctrl_info->block_requests = true;
261*4882a593Smuzhiyun 	scsi_block_requests(ctrl_info->scsi_host);
262*4882a593Smuzhiyun }
263*4882a593Smuzhiyun 
pqi_ctrl_unblock_requests(struct pqi_ctrl_info * ctrl_info)264*4882a593Smuzhiyun static inline void pqi_ctrl_unblock_requests(struct pqi_ctrl_info *ctrl_info)
265*4882a593Smuzhiyun {
266*4882a593Smuzhiyun 	ctrl_info->block_requests = false;
267*4882a593Smuzhiyun 	wake_up_all(&ctrl_info->block_requests_wait);
268*4882a593Smuzhiyun 	pqi_retry_raid_bypass_requests(ctrl_info);
269*4882a593Smuzhiyun 	scsi_unblock_requests(ctrl_info->scsi_host);
270*4882a593Smuzhiyun }
271*4882a593Smuzhiyun 
pqi_wait_if_ctrl_blocked(struct pqi_ctrl_info * ctrl_info,unsigned long timeout_msecs)272*4882a593Smuzhiyun static unsigned long pqi_wait_if_ctrl_blocked(struct pqi_ctrl_info *ctrl_info,
273*4882a593Smuzhiyun 	unsigned long timeout_msecs)
274*4882a593Smuzhiyun {
275*4882a593Smuzhiyun 	unsigned long remaining_msecs;
276*4882a593Smuzhiyun 
277*4882a593Smuzhiyun 	if (!pqi_ctrl_blocked(ctrl_info))
278*4882a593Smuzhiyun 		return timeout_msecs;
279*4882a593Smuzhiyun 
280*4882a593Smuzhiyun 	atomic_inc(&ctrl_info->num_blocked_threads);
281*4882a593Smuzhiyun 
282*4882a593Smuzhiyun 	if (timeout_msecs == NO_TIMEOUT) {
283*4882a593Smuzhiyun 		wait_event(ctrl_info->block_requests_wait,
284*4882a593Smuzhiyun 			!pqi_ctrl_blocked(ctrl_info));
285*4882a593Smuzhiyun 		remaining_msecs = timeout_msecs;
286*4882a593Smuzhiyun 	} else {
287*4882a593Smuzhiyun 		unsigned long remaining_jiffies;
288*4882a593Smuzhiyun 
289*4882a593Smuzhiyun 		remaining_jiffies =
290*4882a593Smuzhiyun 			wait_event_timeout(ctrl_info->block_requests_wait,
291*4882a593Smuzhiyun 				!pqi_ctrl_blocked(ctrl_info),
292*4882a593Smuzhiyun 				msecs_to_jiffies(timeout_msecs));
293*4882a593Smuzhiyun 		remaining_msecs = jiffies_to_msecs(remaining_jiffies);
294*4882a593Smuzhiyun 	}
295*4882a593Smuzhiyun 
296*4882a593Smuzhiyun 	atomic_dec(&ctrl_info->num_blocked_threads);
297*4882a593Smuzhiyun 
298*4882a593Smuzhiyun 	return remaining_msecs;
299*4882a593Smuzhiyun }
300*4882a593Smuzhiyun 
pqi_ctrl_wait_until_quiesced(struct pqi_ctrl_info * ctrl_info)301*4882a593Smuzhiyun static inline void pqi_ctrl_wait_until_quiesced(struct pqi_ctrl_info *ctrl_info)
302*4882a593Smuzhiyun {
303*4882a593Smuzhiyun 	while (atomic_read(&ctrl_info->num_busy_threads) >
304*4882a593Smuzhiyun 		atomic_read(&ctrl_info->num_blocked_threads))
305*4882a593Smuzhiyun 		usleep_range(1000, 2000);
306*4882a593Smuzhiyun }
307*4882a593Smuzhiyun 
pqi_device_offline(struct pqi_scsi_dev * device)308*4882a593Smuzhiyun static inline bool pqi_device_offline(struct pqi_scsi_dev *device)
309*4882a593Smuzhiyun {
310*4882a593Smuzhiyun 	return device->device_offline;
311*4882a593Smuzhiyun }
312*4882a593Smuzhiyun 
pqi_device_reset_start(struct pqi_scsi_dev * device)313*4882a593Smuzhiyun static inline void pqi_device_reset_start(struct pqi_scsi_dev *device)
314*4882a593Smuzhiyun {
315*4882a593Smuzhiyun 	device->in_reset = true;
316*4882a593Smuzhiyun }
317*4882a593Smuzhiyun 
pqi_device_reset_done(struct pqi_scsi_dev * device)318*4882a593Smuzhiyun static inline void pqi_device_reset_done(struct pqi_scsi_dev *device)
319*4882a593Smuzhiyun {
320*4882a593Smuzhiyun 	device->in_reset = false;
321*4882a593Smuzhiyun }
322*4882a593Smuzhiyun 
pqi_device_in_reset(struct pqi_scsi_dev * device)323*4882a593Smuzhiyun static inline bool pqi_device_in_reset(struct pqi_scsi_dev *device)
324*4882a593Smuzhiyun {
325*4882a593Smuzhiyun 	return device->in_reset;
326*4882a593Smuzhiyun }
327*4882a593Smuzhiyun 
pqi_ctrl_ofa_start(struct pqi_ctrl_info * ctrl_info)328*4882a593Smuzhiyun static inline void pqi_ctrl_ofa_start(struct pqi_ctrl_info *ctrl_info)
329*4882a593Smuzhiyun {
330*4882a593Smuzhiyun 	ctrl_info->in_ofa = true;
331*4882a593Smuzhiyun }
332*4882a593Smuzhiyun 
pqi_ctrl_ofa_done(struct pqi_ctrl_info * ctrl_info)333*4882a593Smuzhiyun static inline void pqi_ctrl_ofa_done(struct pqi_ctrl_info *ctrl_info)
334*4882a593Smuzhiyun {
335*4882a593Smuzhiyun 	ctrl_info->in_ofa = false;
336*4882a593Smuzhiyun }
337*4882a593Smuzhiyun 
pqi_ctrl_in_ofa(struct pqi_ctrl_info * ctrl_info)338*4882a593Smuzhiyun static inline bool pqi_ctrl_in_ofa(struct pqi_ctrl_info *ctrl_info)
339*4882a593Smuzhiyun {
340*4882a593Smuzhiyun 	return ctrl_info->in_ofa;
341*4882a593Smuzhiyun }
342*4882a593Smuzhiyun 
pqi_device_remove_start(struct pqi_scsi_dev * device)343*4882a593Smuzhiyun static inline void pqi_device_remove_start(struct pqi_scsi_dev *device)
344*4882a593Smuzhiyun {
345*4882a593Smuzhiyun 	device->in_remove = true;
346*4882a593Smuzhiyun }
347*4882a593Smuzhiyun 
pqi_device_in_remove(struct pqi_ctrl_info * ctrl_info,struct pqi_scsi_dev * device)348*4882a593Smuzhiyun static inline bool pqi_device_in_remove(struct pqi_ctrl_info *ctrl_info,
349*4882a593Smuzhiyun 					struct pqi_scsi_dev *device)
350*4882a593Smuzhiyun {
351*4882a593Smuzhiyun 	return device->in_remove && !ctrl_info->in_shutdown;
352*4882a593Smuzhiyun }
353*4882a593Smuzhiyun 
pqi_ctrl_shutdown_start(struct pqi_ctrl_info * ctrl_info)354*4882a593Smuzhiyun static inline void pqi_ctrl_shutdown_start(struct pqi_ctrl_info *ctrl_info)
355*4882a593Smuzhiyun {
356*4882a593Smuzhiyun 	ctrl_info->in_shutdown = true;
357*4882a593Smuzhiyun }
358*4882a593Smuzhiyun 
pqi_ctrl_in_shutdown(struct pqi_ctrl_info * ctrl_info)359*4882a593Smuzhiyun static inline bool pqi_ctrl_in_shutdown(struct pqi_ctrl_info *ctrl_info)
360*4882a593Smuzhiyun {
361*4882a593Smuzhiyun 	return ctrl_info->in_shutdown;
362*4882a593Smuzhiyun }
363*4882a593Smuzhiyun 
pqi_schedule_rescan_worker_with_delay(struct pqi_ctrl_info * ctrl_info,unsigned long delay)364*4882a593Smuzhiyun static inline void pqi_schedule_rescan_worker_with_delay(
365*4882a593Smuzhiyun 	struct pqi_ctrl_info *ctrl_info, unsigned long delay)
366*4882a593Smuzhiyun {
367*4882a593Smuzhiyun 	if (pqi_ctrl_offline(ctrl_info))
368*4882a593Smuzhiyun 		return;
369*4882a593Smuzhiyun 	if (pqi_ctrl_in_ofa(ctrl_info))
370*4882a593Smuzhiyun 		return;
371*4882a593Smuzhiyun 
372*4882a593Smuzhiyun 	schedule_delayed_work(&ctrl_info->rescan_work, delay);
373*4882a593Smuzhiyun }
374*4882a593Smuzhiyun 
pqi_schedule_rescan_worker(struct pqi_ctrl_info * ctrl_info)375*4882a593Smuzhiyun static inline void pqi_schedule_rescan_worker(struct pqi_ctrl_info *ctrl_info)
376*4882a593Smuzhiyun {
377*4882a593Smuzhiyun 	pqi_schedule_rescan_worker_with_delay(ctrl_info, 0);
378*4882a593Smuzhiyun }
379*4882a593Smuzhiyun 
380*4882a593Smuzhiyun #define PQI_RESCAN_WORK_DELAY	(10 * PQI_HZ)
381*4882a593Smuzhiyun 
pqi_schedule_rescan_worker_delayed(struct pqi_ctrl_info * ctrl_info)382*4882a593Smuzhiyun static inline void pqi_schedule_rescan_worker_delayed(
383*4882a593Smuzhiyun 	struct pqi_ctrl_info *ctrl_info)
384*4882a593Smuzhiyun {
385*4882a593Smuzhiyun 	pqi_schedule_rescan_worker_with_delay(ctrl_info, PQI_RESCAN_WORK_DELAY);
386*4882a593Smuzhiyun }
387*4882a593Smuzhiyun 
pqi_cancel_rescan_worker(struct pqi_ctrl_info * ctrl_info)388*4882a593Smuzhiyun static inline void pqi_cancel_rescan_worker(struct pqi_ctrl_info *ctrl_info)
389*4882a593Smuzhiyun {
390*4882a593Smuzhiyun 	cancel_delayed_work_sync(&ctrl_info->rescan_work);
391*4882a593Smuzhiyun }
392*4882a593Smuzhiyun 
pqi_cancel_event_worker(struct pqi_ctrl_info * ctrl_info)393*4882a593Smuzhiyun static inline void pqi_cancel_event_worker(struct pqi_ctrl_info *ctrl_info)
394*4882a593Smuzhiyun {
395*4882a593Smuzhiyun 	cancel_work_sync(&ctrl_info->event_work);
396*4882a593Smuzhiyun }
397*4882a593Smuzhiyun 
pqi_read_heartbeat_counter(struct pqi_ctrl_info * ctrl_info)398*4882a593Smuzhiyun static inline u32 pqi_read_heartbeat_counter(struct pqi_ctrl_info *ctrl_info)
399*4882a593Smuzhiyun {
400*4882a593Smuzhiyun 	if (!ctrl_info->heartbeat_counter)
401*4882a593Smuzhiyun 		return 0;
402*4882a593Smuzhiyun 
403*4882a593Smuzhiyun 	return readl(ctrl_info->heartbeat_counter);
404*4882a593Smuzhiyun }
405*4882a593Smuzhiyun 
pqi_read_soft_reset_status(struct pqi_ctrl_info * ctrl_info)406*4882a593Smuzhiyun static inline u8 pqi_read_soft_reset_status(struct pqi_ctrl_info *ctrl_info)
407*4882a593Smuzhiyun {
408*4882a593Smuzhiyun 	if (!ctrl_info->soft_reset_status)
409*4882a593Smuzhiyun 		return 0;
410*4882a593Smuzhiyun 
411*4882a593Smuzhiyun 	return readb(ctrl_info->soft_reset_status);
412*4882a593Smuzhiyun }
413*4882a593Smuzhiyun 
pqi_clear_soft_reset_status(struct pqi_ctrl_info * ctrl_info,u8 clear)414*4882a593Smuzhiyun static inline void pqi_clear_soft_reset_status(struct pqi_ctrl_info *ctrl_info,
415*4882a593Smuzhiyun 	u8 clear)
416*4882a593Smuzhiyun {
417*4882a593Smuzhiyun 	u8 status;
418*4882a593Smuzhiyun 
419*4882a593Smuzhiyun 	if (!ctrl_info->soft_reset_status)
420*4882a593Smuzhiyun 		return;
421*4882a593Smuzhiyun 
422*4882a593Smuzhiyun 	status = pqi_read_soft_reset_status(ctrl_info);
423*4882a593Smuzhiyun 	status &= ~clear;
424*4882a593Smuzhiyun 	writeb(status, ctrl_info->soft_reset_status);
425*4882a593Smuzhiyun }
426*4882a593Smuzhiyun 
pqi_map_single(struct pci_dev * pci_dev,struct pqi_sg_descriptor * sg_descriptor,void * buffer,size_t buffer_length,enum dma_data_direction data_direction)427*4882a593Smuzhiyun static int pqi_map_single(struct pci_dev *pci_dev,
428*4882a593Smuzhiyun 	struct pqi_sg_descriptor *sg_descriptor, void *buffer,
429*4882a593Smuzhiyun 	size_t buffer_length, enum dma_data_direction data_direction)
430*4882a593Smuzhiyun {
431*4882a593Smuzhiyun 	dma_addr_t bus_address;
432*4882a593Smuzhiyun 
433*4882a593Smuzhiyun 	if (!buffer || buffer_length == 0 || data_direction == DMA_NONE)
434*4882a593Smuzhiyun 		return 0;
435*4882a593Smuzhiyun 
436*4882a593Smuzhiyun 	bus_address = dma_map_single(&pci_dev->dev, buffer, buffer_length,
437*4882a593Smuzhiyun 		data_direction);
438*4882a593Smuzhiyun 	if (dma_mapping_error(&pci_dev->dev, bus_address))
439*4882a593Smuzhiyun 		return -ENOMEM;
440*4882a593Smuzhiyun 
441*4882a593Smuzhiyun 	put_unaligned_le64((u64)bus_address, &sg_descriptor->address);
442*4882a593Smuzhiyun 	put_unaligned_le32(buffer_length, &sg_descriptor->length);
443*4882a593Smuzhiyun 	put_unaligned_le32(CISS_SG_LAST, &sg_descriptor->flags);
444*4882a593Smuzhiyun 
445*4882a593Smuzhiyun 	return 0;
446*4882a593Smuzhiyun }
447*4882a593Smuzhiyun 
pqi_pci_unmap(struct pci_dev * pci_dev,struct pqi_sg_descriptor * descriptors,int num_descriptors,enum dma_data_direction data_direction)448*4882a593Smuzhiyun static void pqi_pci_unmap(struct pci_dev *pci_dev,
449*4882a593Smuzhiyun 	struct pqi_sg_descriptor *descriptors, int num_descriptors,
450*4882a593Smuzhiyun 	enum dma_data_direction data_direction)
451*4882a593Smuzhiyun {
452*4882a593Smuzhiyun 	int i;
453*4882a593Smuzhiyun 
454*4882a593Smuzhiyun 	if (data_direction == DMA_NONE)
455*4882a593Smuzhiyun 		return;
456*4882a593Smuzhiyun 
457*4882a593Smuzhiyun 	for (i = 0; i < num_descriptors; i++)
458*4882a593Smuzhiyun 		dma_unmap_single(&pci_dev->dev,
459*4882a593Smuzhiyun 			(dma_addr_t)get_unaligned_le64(&descriptors[i].address),
460*4882a593Smuzhiyun 			get_unaligned_le32(&descriptors[i].length),
461*4882a593Smuzhiyun 			data_direction);
462*4882a593Smuzhiyun }
463*4882a593Smuzhiyun 
pqi_build_raid_path_request(struct pqi_ctrl_info * ctrl_info,struct pqi_raid_path_request * request,u8 cmd,u8 * scsi3addr,void * buffer,size_t buffer_length,u16 vpd_page,enum dma_data_direction * dir)464*4882a593Smuzhiyun static int pqi_build_raid_path_request(struct pqi_ctrl_info *ctrl_info,
465*4882a593Smuzhiyun 	struct pqi_raid_path_request *request, u8 cmd,
466*4882a593Smuzhiyun 	u8 *scsi3addr, void *buffer, size_t buffer_length,
467*4882a593Smuzhiyun 	u16 vpd_page, enum dma_data_direction *dir)
468*4882a593Smuzhiyun {
469*4882a593Smuzhiyun 	u8 *cdb;
470*4882a593Smuzhiyun 	size_t cdb_length = buffer_length;
471*4882a593Smuzhiyun 
472*4882a593Smuzhiyun 	memset(request, 0, sizeof(*request));
473*4882a593Smuzhiyun 
474*4882a593Smuzhiyun 	request->header.iu_type = PQI_REQUEST_IU_RAID_PATH_IO;
475*4882a593Smuzhiyun 	put_unaligned_le16(offsetof(struct pqi_raid_path_request,
476*4882a593Smuzhiyun 		sg_descriptors[1]) - PQI_REQUEST_HEADER_LENGTH,
477*4882a593Smuzhiyun 		&request->header.iu_length);
478*4882a593Smuzhiyun 	put_unaligned_le32(buffer_length, &request->buffer_length);
479*4882a593Smuzhiyun 	memcpy(request->lun_number, scsi3addr, sizeof(request->lun_number));
480*4882a593Smuzhiyun 	request->task_attribute = SOP_TASK_ATTRIBUTE_SIMPLE;
481*4882a593Smuzhiyun 	request->additional_cdb_bytes_usage = SOP_ADDITIONAL_CDB_BYTES_0;
482*4882a593Smuzhiyun 
483*4882a593Smuzhiyun 	cdb = request->cdb;
484*4882a593Smuzhiyun 
485*4882a593Smuzhiyun 	switch (cmd) {
486*4882a593Smuzhiyun 	case INQUIRY:
487*4882a593Smuzhiyun 		request->data_direction = SOP_READ_FLAG;
488*4882a593Smuzhiyun 		cdb[0] = INQUIRY;
489*4882a593Smuzhiyun 		if (vpd_page & VPD_PAGE) {
490*4882a593Smuzhiyun 			cdb[1] = 0x1;
491*4882a593Smuzhiyun 			cdb[2] = (u8)vpd_page;
492*4882a593Smuzhiyun 		}
493*4882a593Smuzhiyun 		cdb[4] = (u8)cdb_length;
494*4882a593Smuzhiyun 		break;
495*4882a593Smuzhiyun 	case CISS_REPORT_LOG:
496*4882a593Smuzhiyun 	case CISS_REPORT_PHYS:
497*4882a593Smuzhiyun 		request->data_direction = SOP_READ_FLAG;
498*4882a593Smuzhiyun 		cdb[0] = cmd;
499*4882a593Smuzhiyun 		if (cmd == CISS_REPORT_PHYS)
500*4882a593Smuzhiyun 			cdb[1] = CISS_REPORT_PHYS_FLAG_OTHER;
501*4882a593Smuzhiyun 		else
502*4882a593Smuzhiyun 			cdb[1] = CISS_REPORT_LOG_FLAG_UNIQUE_LUN_ID;
503*4882a593Smuzhiyun 		put_unaligned_be32(cdb_length, &cdb[6]);
504*4882a593Smuzhiyun 		break;
505*4882a593Smuzhiyun 	case CISS_GET_RAID_MAP:
506*4882a593Smuzhiyun 		request->data_direction = SOP_READ_FLAG;
507*4882a593Smuzhiyun 		cdb[0] = CISS_READ;
508*4882a593Smuzhiyun 		cdb[1] = CISS_GET_RAID_MAP;
509*4882a593Smuzhiyun 		put_unaligned_be32(cdb_length, &cdb[6]);
510*4882a593Smuzhiyun 		break;
511*4882a593Smuzhiyun 	case SA_FLUSH_CACHE:
512*4882a593Smuzhiyun 		request->data_direction = SOP_WRITE_FLAG;
513*4882a593Smuzhiyun 		cdb[0] = BMIC_WRITE;
514*4882a593Smuzhiyun 		cdb[6] = BMIC_FLUSH_CACHE;
515*4882a593Smuzhiyun 		put_unaligned_be16(cdb_length, &cdb[7]);
516*4882a593Smuzhiyun 		break;
517*4882a593Smuzhiyun 	case BMIC_SENSE_DIAG_OPTIONS:
518*4882a593Smuzhiyun 		cdb_length = 0;
519*4882a593Smuzhiyun 		fallthrough;
520*4882a593Smuzhiyun 	case BMIC_IDENTIFY_CONTROLLER:
521*4882a593Smuzhiyun 	case BMIC_IDENTIFY_PHYSICAL_DEVICE:
522*4882a593Smuzhiyun 	case BMIC_SENSE_SUBSYSTEM_INFORMATION:
523*4882a593Smuzhiyun 		request->data_direction = SOP_READ_FLAG;
524*4882a593Smuzhiyun 		cdb[0] = BMIC_READ;
525*4882a593Smuzhiyun 		cdb[6] = cmd;
526*4882a593Smuzhiyun 		put_unaligned_be16(cdb_length, &cdb[7]);
527*4882a593Smuzhiyun 		break;
528*4882a593Smuzhiyun 	case BMIC_SET_DIAG_OPTIONS:
529*4882a593Smuzhiyun 		cdb_length = 0;
530*4882a593Smuzhiyun 		fallthrough;
531*4882a593Smuzhiyun 	case BMIC_WRITE_HOST_WELLNESS:
532*4882a593Smuzhiyun 		request->data_direction = SOP_WRITE_FLAG;
533*4882a593Smuzhiyun 		cdb[0] = BMIC_WRITE;
534*4882a593Smuzhiyun 		cdb[6] = cmd;
535*4882a593Smuzhiyun 		put_unaligned_be16(cdb_length, &cdb[7]);
536*4882a593Smuzhiyun 		break;
537*4882a593Smuzhiyun 	case BMIC_CSMI_PASSTHRU:
538*4882a593Smuzhiyun 		request->data_direction = SOP_BIDIRECTIONAL;
539*4882a593Smuzhiyun 		cdb[0] = BMIC_WRITE;
540*4882a593Smuzhiyun 		cdb[5] = CSMI_CC_SAS_SMP_PASSTHRU;
541*4882a593Smuzhiyun 		cdb[6] = cmd;
542*4882a593Smuzhiyun 		put_unaligned_be16(cdb_length, &cdb[7]);
543*4882a593Smuzhiyun 		break;
544*4882a593Smuzhiyun 	default:
545*4882a593Smuzhiyun 		dev_err(&ctrl_info->pci_dev->dev, "unknown command 0x%c\n", cmd);
546*4882a593Smuzhiyun 		break;
547*4882a593Smuzhiyun 	}
548*4882a593Smuzhiyun 
549*4882a593Smuzhiyun 	switch (request->data_direction) {
550*4882a593Smuzhiyun 	case SOP_READ_FLAG:
551*4882a593Smuzhiyun 		*dir = DMA_FROM_DEVICE;
552*4882a593Smuzhiyun 		break;
553*4882a593Smuzhiyun 	case SOP_WRITE_FLAG:
554*4882a593Smuzhiyun 		*dir = DMA_TO_DEVICE;
555*4882a593Smuzhiyun 		break;
556*4882a593Smuzhiyun 	case SOP_NO_DIRECTION_FLAG:
557*4882a593Smuzhiyun 		*dir = DMA_NONE;
558*4882a593Smuzhiyun 		break;
559*4882a593Smuzhiyun 	default:
560*4882a593Smuzhiyun 		*dir = DMA_BIDIRECTIONAL;
561*4882a593Smuzhiyun 		break;
562*4882a593Smuzhiyun 	}
563*4882a593Smuzhiyun 
564*4882a593Smuzhiyun 	return pqi_map_single(ctrl_info->pci_dev, &request->sg_descriptors[0],
565*4882a593Smuzhiyun 		buffer, buffer_length, *dir);
566*4882a593Smuzhiyun }
567*4882a593Smuzhiyun 
pqi_reinit_io_request(struct pqi_io_request * io_request)568*4882a593Smuzhiyun static inline void pqi_reinit_io_request(struct pqi_io_request *io_request)
569*4882a593Smuzhiyun {
570*4882a593Smuzhiyun 	io_request->scmd = NULL;
571*4882a593Smuzhiyun 	io_request->status = 0;
572*4882a593Smuzhiyun 	io_request->error_info = NULL;
573*4882a593Smuzhiyun 	io_request->raid_bypass = false;
574*4882a593Smuzhiyun }
575*4882a593Smuzhiyun 
pqi_alloc_io_request(struct pqi_ctrl_info * ctrl_info)576*4882a593Smuzhiyun static struct pqi_io_request *pqi_alloc_io_request(
577*4882a593Smuzhiyun 	struct pqi_ctrl_info *ctrl_info)
578*4882a593Smuzhiyun {
579*4882a593Smuzhiyun 	struct pqi_io_request *io_request;
580*4882a593Smuzhiyun 	u16 i = ctrl_info->next_io_request_slot;	/* benignly racy */
581*4882a593Smuzhiyun 
582*4882a593Smuzhiyun 	while (1) {
583*4882a593Smuzhiyun 		io_request = &ctrl_info->io_request_pool[i];
584*4882a593Smuzhiyun 		if (atomic_inc_return(&io_request->refcount) == 1)
585*4882a593Smuzhiyun 			break;
586*4882a593Smuzhiyun 		atomic_dec(&io_request->refcount);
587*4882a593Smuzhiyun 		i = (i + 1) % ctrl_info->max_io_slots;
588*4882a593Smuzhiyun 	}
589*4882a593Smuzhiyun 
590*4882a593Smuzhiyun 	/* benignly racy */
591*4882a593Smuzhiyun 	ctrl_info->next_io_request_slot = (i + 1) % ctrl_info->max_io_slots;
592*4882a593Smuzhiyun 
593*4882a593Smuzhiyun 	pqi_reinit_io_request(io_request);
594*4882a593Smuzhiyun 
595*4882a593Smuzhiyun 	return io_request;
596*4882a593Smuzhiyun }
597*4882a593Smuzhiyun 
pqi_free_io_request(struct pqi_io_request * io_request)598*4882a593Smuzhiyun static void pqi_free_io_request(struct pqi_io_request *io_request)
599*4882a593Smuzhiyun {
600*4882a593Smuzhiyun 	atomic_dec(&io_request->refcount);
601*4882a593Smuzhiyun }
602*4882a593Smuzhiyun 
pqi_send_scsi_raid_request(struct pqi_ctrl_info * ctrl_info,u8 cmd,u8 * scsi3addr,void * buffer,size_t buffer_length,u16 vpd_page,struct pqi_raid_error_info * error_info,unsigned long timeout_msecs)603*4882a593Smuzhiyun static int pqi_send_scsi_raid_request(struct pqi_ctrl_info *ctrl_info, u8 cmd,
604*4882a593Smuzhiyun 	u8 *scsi3addr, void *buffer, size_t buffer_length, u16 vpd_page,
605*4882a593Smuzhiyun 	struct pqi_raid_error_info *error_info,	unsigned long timeout_msecs)
606*4882a593Smuzhiyun {
607*4882a593Smuzhiyun 	int rc;
608*4882a593Smuzhiyun 	struct pqi_raid_path_request request;
609*4882a593Smuzhiyun 	enum dma_data_direction dir;
610*4882a593Smuzhiyun 
611*4882a593Smuzhiyun 	rc = pqi_build_raid_path_request(ctrl_info, &request,
612*4882a593Smuzhiyun 		cmd, scsi3addr, buffer,
613*4882a593Smuzhiyun 		buffer_length, vpd_page, &dir);
614*4882a593Smuzhiyun 	if (rc)
615*4882a593Smuzhiyun 		return rc;
616*4882a593Smuzhiyun 
617*4882a593Smuzhiyun 	rc = pqi_submit_raid_request_synchronous(ctrl_info, &request.header, 0,
618*4882a593Smuzhiyun 		error_info, timeout_msecs);
619*4882a593Smuzhiyun 
620*4882a593Smuzhiyun 	pqi_pci_unmap(ctrl_info->pci_dev, request.sg_descriptors, 1, dir);
621*4882a593Smuzhiyun 
622*4882a593Smuzhiyun 	return rc;
623*4882a593Smuzhiyun }
624*4882a593Smuzhiyun 
625*4882a593Smuzhiyun /* helper functions for pqi_send_scsi_raid_request */
626*4882a593Smuzhiyun 
pqi_send_ctrl_raid_request(struct pqi_ctrl_info * ctrl_info,u8 cmd,void * buffer,size_t buffer_length)627*4882a593Smuzhiyun static inline int pqi_send_ctrl_raid_request(struct pqi_ctrl_info *ctrl_info,
628*4882a593Smuzhiyun 	u8 cmd, void *buffer, size_t buffer_length)
629*4882a593Smuzhiyun {
630*4882a593Smuzhiyun 	return pqi_send_scsi_raid_request(ctrl_info, cmd, RAID_CTLR_LUNID,
631*4882a593Smuzhiyun 		buffer, buffer_length, 0, NULL, NO_TIMEOUT);
632*4882a593Smuzhiyun }
633*4882a593Smuzhiyun 
pqi_send_ctrl_raid_with_error(struct pqi_ctrl_info * ctrl_info,u8 cmd,void * buffer,size_t buffer_length,struct pqi_raid_error_info * error_info)634*4882a593Smuzhiyun static inline int pqi_send_ctrl_raid_with_error(struct pqi_ctrl_info *ctrl_info,
635*4882a593Smuzhiyun 	u8 cmd, void *buffer, size_t buffer_length,
636*4882a593Smuzhiyun 	struct pqi_raid_error_info *error_info)
637*4882a593Smuzhiyun {
638*4882a593Smuzhiyun 	return pqi_send_scsi_raid_request(ctrl_info, cmd, RAID_CTLR_LUNID,
639*4882a593Smuzhiyun 		buffer, buffer_length, 0, error_info, NO_TIMEOUT);
640*4882a593Smuzhiyun }
641*4882a593Smuzhiyun 
pqi_identify_controller(struct pqi_ctrl_info * ctrl_info,struct bmic_identify_controller * buffer)642*4882a593Smuzhiyun static inline int pqi_identify_controller(struct pqi_ctrl_info *ctrl_info,
643*4882a593Smuzhiyun 	struct bmic_identify_controller *buffer)
644*4882a593Smuzhiyun {
645*4882a593Smuzhiyun 	return pqi_send_ctrl_raid_request(ctrl_info, BMIC_IDENTIFY_CONTROLLER,
646*4882a593Smuzhiyun 		buffer, sizeof(*buffer));
647*4882a593Smuzhiyun }
648*4882a593Smuzhiyun 
pqi_sense_subsystem_info(struct pqi_ctrl_info * ctrl_info,struct bmic_sense_subsystem_info * sense_info)649*4882a593Smuzhiyun static inline int pqi_sense_subsystem_info(struct  pqi_ctrl_info *ctrl_info,
650*4882a593Smuzhiyun 	struct bmic_sense_subsystem_info *sense_info)
651*4882a593Smuzhiyun {
652*4882a593Smuzhiyun 	return pqi_send_ctrl_raid_request(ctrl_info,
653*4882a593Smuzhiyun 		BMIC_SENSE_SUBSYSTEM_INFORMATION, sense_info,
654*4882a593Smuzhiyun 		sizeof(*sense_info));
655*4882a593Smuzhiyun }
656*4882a593Smuzhiyun 
pqi_scsi_inquiry(struct pqi_ctrl_info * ctrl_info,u8 * scsi3addr,u16 vpd_page,void * buffer,size_t buffer_length)657*4882a593Smuzhiyun static inline int pqi_scsi_inquiry(struct pqi_ctrl_info *ctrl_info,
658*4882a593Smuzhiyun 	u8 *scsi3addr, u16 vpd_page, void *buffer, size_t buffer_length)
659*4882a593Smuzhiyun {
660*4882a593Smuzhiyun 	return pqi_send_scsi_raid_request(ctrl_info, INQUIRY, scsi3addr,
661*4882a593Smuzhiyun 		buffer, buffer_length, vpd_page, NULL, NO_TIMEOUT);
662*4882a593Smuzhiyun }
663*4882a593Smuzhiyun 
pqi_identify_physical_device(struct pqi_ctrl_info * ctrl_info,struct pqi_scsi_dev * device,struct bmic_identify_physical_device * buffer,size_t buffer_length)664*4882a593Smuzhiyun static int pqi_identify_physical_device(struct pqi_ctrl_info *ctrl_info,
665*4882a593Smuzhiyun 	struct pqi_scsi_dev *device,
666*4882a593Smuzhiyun 	struct bmic_identify_physical_device *buffer, size_t buffer_length)
667*4882a593Smuzhiyun {
668*4882a593Smuzhiyun 	int rc;
669*4882a593Smuzhiyun 	enum dma_data_direction dir;
670*4882a593Smuzhiyun 	u16 bmic_device_index;
671*4882a593Smuzhiyun 	struct pqi_raid_path_request request;
672*4882a593Smuzhiyun 
673*4882a593Smuzhiyun 	rc = pqi_build_raid_path_request(ctrl_info, &request,
674*4882a593Smuzhiyun 		BMIC_IDENTIFY_PHYSICAL_DEVICE, RAID_CTLR_LUNID, buffer,
675*4882a593Smuzhiyun 		buffer_length, 0, &dir);
676*4882a593Smuzhiyun 	if (rc)
677*4882a593Smuzhiyun 		return rc;
678*4882a593Smuzhiyun 
679*4882a593Smuzhiyun 	bmic_device_index = CISS_GET_DRIVE_NUMBER(device->scsi3addr);
680*4882a593Smuzhiyun 	request.cdb[2] = (u8)bmic_device_index;
681*4882a593Smuzhiyun 	request.cdb[9] = (u8)(bmic_device_index >> 8);
682*4882a593Smuzhiyun 
683*4882a593Smuzhiyun 	rc = pqi_submit_raid_request_synchronous(ctrl_info, &request.header,
684*4882a593Smuzhiyun 		0, NULL, NO_TIMEOUT);
685*4882a593Smuzhiyun 
686*4882a593Smuzhiyun 	pqi_pci_unmap(ctrl_info->pci_dev, request.sg_descriptors, 1, dir);
687*4882a593Smuzhiyun 
688*4882a593Smuzhiyun 	return rc;
689*4882a593Smuzhiyun }
690*4882a593Smuzhiyun 
pqi_flush_cache(struct pqi_ctrl_info * ctrl_info,enum bmic_flush_cache_shutdown_event shutdown_event)691*4882a593Smuzhiyun static int pqi_flush_cache(struct pqi_ctrl_info *ctrl_info,
692*4882a593Smuzhiyun 	enum bmic_flush_cache_shutdown_event shutdown_event)
693*4882a593Smuzhiyun {
694*4882a593Smuzhiyun 	int rc;
695*4882a593Smuzhiyun 	struct bmic_flush_cache *flush_cache;
696*4882a593Smuzhiyun 
697*4882a593Smuzhiyun 	/*
698*4882a593Smuzhiyun 	 * Don't bother trying to flush the cache if the controller is
699*4882a593Smuzhiyun 	 * locked up.
700*4882a593Smuzhiyun 	 */
701*4882a593Smuzhiyun 	if (pqi_ctrl_offline(ctrl_info))
702*4882a593Smuzhiyun 		return -ENXIO;
703*4882a593Smuzhiyun 
704*4882a593Smuzhiyun 	flush_cache = kzalloc(sizeof(*flush_cache), GFP_KERNEL);
705*4882a593Smuzhiyun 	if (!flush_cache)
706*4882a593Smuzhiyun 		return -ENOMEM;
707*4882a593Smuzhiyun 
708*4882a593Smuzhiyun 	flush_cache->shutdown_event = shutdown_event;
709*4882a593Smuzhiyun 
710*4882a593Smuzhiyun 	rc = pqi_send_ctrl_raid_request(ctrl_info, SA_FLUSH_CACHE, flush_cache,
711*4882a593Smuzhiyun 		sizeof(*flush_cache));
712*4882a593Smuzhiyun 
713*4882a593Smuzhiyun 	kfree(flush_cache);
714*4882a593Smuzhiyun 
715*4882a593Smuzhiyun 	return rc;
716*4882a593Smuzhiyun }
717*4882a593Smuzhiyun 
pqi_csmi_smp_passthru(struct pqi_ctrl_info * ctrl_info,struct bmic_csmi_smp_passthru_buffer * buffer,size_t buffer_length,struct pqi_raid_error_info * error_info)718*4882a593Smuzhiyun int pqi_csmi_smp_passthru(struct pqi_ctrl_info *ctrl_info,
719*4882a593Smuzhiyun 	struct bmic_csmi_smp_passthru_buffer *buffer, size_t buffer_length,
720*4882a593Smuzhiyun 	struct pqi_raid_error_info *error_info)
721*4882a593Smuzhiyun {
722*4882a593Smuzhiyun 	return pqi_send_ctrl_raid_with_error(ctrl_info, BMIC_CSMI_PASSTHRU,
723*4882a593Smuzhiyun 		buffer, buffer_length, error_info);
724*4882a593Smuzhiyun }
725*4882a593Smuzhiyun 
726*4882a593Smuzhiyun #define PQI_FETCH_PTRAID_DATA		(1 << 31)
727*4882a593Smuzhiyun 
pqi_set_diag_rescan(struct pqi_ctrl_info * ctrl_info)728*4882a593Smuzhiyun static int pqi_set_diag_rescan(struct pqi_ctrl_info *ctrl_info)
729*4882a593Smuzhiyun {
730*4882a593Smuzhiyun 	int rc;
731*4882a593Smuzhiyun 	struct bmic_diag_options *diag;
732*4882a593Smuzhiyun 
733*4882a593Smuzhiyun 	diag = kzalloc(sizeof(*diag), GFP_KERNEL);
734*4882a593Smuzhiyun 	if (!diag)
735*4882a593Smuzhiyun 		return -ENOMEM;
736*4882a593Smuzhiyun 
737*4882a593Smuzhiyun 	rc = pqi_send_ctrl_raid_request(ctrl_info, BMIC_SENSE_DIAG_OPTIONS,
738*4882a593Smuzhiyun 		diag, sizeof(*diag));
739*4882a593Smuzhiyun 	if (rc)
740*4882a593Smuzhiyun 		goto out;
741*4882a593Smuzhiyun 
742*4882a593Smuzhiyun 	diag->options |= cpu_to_le32(PQI_FETCH_PTRAID_DATA);
743*4882a593Smuzhiyun 
744*4882a593Smuzhiyun 	rc = pqi_send_ctrl_raid_request(ctrl_info, BMIC_SET_DIAG_OPTIONS, diag,
745*4882a593Smuzhiyun 		sizeof(*diag));
746*4882a593Smuzhiyun 
747*4882a593Smuzhiyun out:
748*4882a593Smuzhiyun 	kfree(diag);
749*4882a593Smuzhiyun 
750*4882a593Smuzhiyun 	return rc;
751*4882a593Smuzhiyun }
752*4882a593Smuzhiyun 
pqi_write_host_wellness(struct pqi_ctrl_info * ctrl_info,void * buffer,size_t buffer_length)753*4882a593Smuzhiyun static inline int pqi_write_host_wellness(struct pqi_ctrl_info *ctrl_info,
754*4882a593Smuzhiyun 	void *buffer, size_t buffer_length)
755*4882a593Smuzhiyun {
756*4882a593Smuzhiyun 	return pqi_send_ctrl_raid_request(ctrl_info, BMIC_WRITE_HOST_WELLNESS,
757*4882a593Smuzhiyun 		buffer, buffer_length);
758*4882a593Smuzhiyun }
759*4882a593Smuzhiyun 
760*4882a593Smuzhiyun #pragma pack(1)
761*4882a593Smuzhiyun 
762*4882a593Smuzhiyun struct bmic_host_wellness_driver_version {
763*4882a593Smuzhiyun 	u8	start_tag[4];
764*4882a593Smuzhiyun 	u8	driver_version_tag[2];
765*4882a593Smuzhiyun 	__le16	driver_version_length;
766*4882a593Smuzhiyun 	char	driver_version[32];
767*4882a593Smuzhiyun 	u8	dont_write_tag[2];
768*4882a593Smuzhiyun 	u8	end_tag[2];
769*4882a593Smuzhiyun };
770*4882a593Smuzhiyun 
771*4882a593Smuzhiyun #pragma pack()
772*4882a593Smuzhiyun 
pqi_write_driver_version_to_host_wellness(struct pqi_ctrl_info * ctrl_info)773*4882a593Smuzhiyun static int pqi_write_driver_version_to_host_wellness(
774*4882a593Smuzhiyun 	struct pqi_ctrl_info *ctrl_info)
775*4882a593Smuzhiyun {
776*4882a593Smuzhiyun 	int rc;
777*4882a593Smuzhiyun 	struct bmic_host_wellness_driver_version *buffer;
778*4882a593Smuzhiyun 	size_t buffer_length;
779*4882a593Smuzhiyun 
780*4882a593Smuzhiyun 	buffer_length = sizeof(*buffer);
781*4882a593Smuzhiyun 
782*4882a593Smuzhiyun 	buffer = kmalloc(buffer_length, GFP_KERNEL);
783*4882a593Smuzhiyun 	if (!buffer)
784*4882a593Smuzhiyun 		return -ENOMEM;
785*4882a593Smuzhiyun 
786*4882a593Smuzhiyun 	buffer->start_tag[0] = '<';
787*4882a593Smuzhiyun 	buffer->start_tag[1] = 'H';
788*4882a593Smuzhiyun 	buffer->start_tag[2] = 'W';
789*4882a593Smuzhiyun 	buffer->start_tag[3] = '>';
790*4882a593Smuzhiyun 	buffer->driver_version_tag[0] = 'D';
791*4882a593Smuzhiyun 	buffer->driver_version_tag[1] = 'V';
792*4882a593Smuzhiyun 	put_unaligned_le16(sizeof(buffer->driver_version),
793*4882a593Smuzhiyun 		&buffer->driver_version_length);
794*4882a593Smuzhiyun 	strncpy(buffer->driver_version, "Linux " DRIVER_VERSION,
795*4882a593Smuzhiyun 		sizeof(buffer->driver_version) - 1);
796*4882a593Smuzhiyun 	buffer->driver_version[sizeof(buffer->driver_version) - 1] = '\0';
797*4882a593Smuzhiyun 	buffer->dont_write_tag[0] = 'D';
798*4882a593Smuzhiyun 	buffer->dont_write_tag[1] = 'W';
799*4882a593Smuzhiyun 	buffer->end_tag[0] = 'Z';
800*4882a593Smuzhiyun 	buffer->end_tag[1] = 'Z';
801*4882a593Smuzhiyun 
802*4882a593Smuzhiyun 	rc = pqi_write_host_wellness(ctrl_info, buffer, buffer_length);
803*4882a593Smuzhiyun 
804*4882a593Smuzhiyun 	kfree(buffer);
805*4882a593Smuzhiyun 
806*4882a593Smuzhiyun 	return rc;
807*4882a593Smuzhiyun }
808*4882a593Smuzhiyun 
809*4882a593Smuzhiyun #pragma pack(1)
810*4882a593Smuzhiyun 
811*4882a593Smuzhiyun struct bmic_host_wellness_time {
812*4882a593Smuzhiyun 	u8	start_tag[4];
813*4882a593Smuzhiyun 	u8	time_tag[2];
814*4882a593Smuzhiyun 	__le16	time_length;
815*4882a593Smuzhiyun 	u8	time[8];
816*4882a593Smuzhiyun 	u8	dont_write_tag[2];
817*4882a593Smuzhiyun 	u8	end_tag[2];
818*4882a593Smuzhiyun };
819*4882a593Smuzhiyun 
820*4882a593Smuzhiyun #pragma pack()
821*4882a593Smuzhiyun 
pqi_write_current_time_to_host_wellness(struct pqi_ctrl_info * ctrl_info)822*4882a593Smuzhiyun static int pqi_write_current_time_to_host_wellness(
823*4882a593Smuzhiyun 	struct pqi_ctrl_info *ctrl_info)
824*4882a593Smuzhiyun {
825*4882a593Smuzhiyun 	int rc;
826*4882a593Smuzhiyun 	struct bmic_host_wellness_time *buffer;
827*4882a593Smuzhiyun 	size_t buffer_length;
828*4882a593Smuzhiyun 	time64_t local_time;
829*4882a593Smuzhiyun 	unsigned int year;
830*4882a593Smuzhiyun 	struct tm tm;
831*4882a593Smuzhiyun 
832*4882a593Smuzhiyun 	buffer_length = sizeof(*buffer);
833*4882a593Smuzhiyun 
834*4882a593Smuzhiyun 	buffer = kmalloc(buffer_length, GFP_KERNEL);
835*4882a593Smuzhiyun 	if (!buffer)
836*4882a593Smuzhiyun 		return -ENOMEM;
837*4882a593Smuzhiyun 
838*4882a593Smuzhiyun 	buffer->start_tag[0] = '<';
839*4882a593Smuzhiyun 	buffer->start_tag[1] = 'H';
840*4882a593Smuzhiyun 	buffer->start_tag[2] = 'W';
841*4882a593Smuzhiyun 	buffer->start_tag[3] = '>';
842*4882a593Smuzhiyun 	buffer->time_tag[0] = 'T';
843*4882a593Smuzhiyun 	buffer->time_tag[1] = 'D';
844*4882a593Smuzhiyun 	put_unaligned_le16(sizeof(buffer->time),
845*4882a593Smuzhiyun 		&buffer->time_length);
846*4882a593Smuzhiyun 
847*4882a593Smuzhiyun 	local_time = ktime_get_real_seconds();
848*4882a593Smuzhiyun 	time64_to_tm(local_time, -sys_tz.tz_minuteswest * 60, &tm);
849*4882a593Smuzhiyun 	year = tm.tm_year + 1900;
850*4882a593Smuzhiyun 
851*4882a593Smuzhiyun 	buffer->time[0] = bin2bcd(tm.tm_hour);
852*4882a593Smuzhiyun 	buffer->time[1] = bin2bcd(tm.tm_min);
853*4882a593Smuzhiyun 	buffer->time[2] = bin2bcd(tm.tm_sec);
854*4882a593Smuzhiyun 	buffer->time[3] = 0;
855*4882a593Smuzhiyun 	buffer->time[4] = bin2bcd(tm.tm_mon + 1);
856*4882a593Smuzhiyun 	buffer->time[5] = bin2bcd(tm.tm_mday);
857*4882a593Smuzhiyun 	buffer->time[6] = bin2bcd(year / 100);
858*4882a593Smuzhiyun 	buffer->time[7] = bin2bcd(year % 100);
859*4882a593Smuzhiyun 
860*4882a593Smuzhiyun 	buffer->dont_write_tag[0] = 'D';
861*4882a593Smuzhiyun 	buffer->dont_write_tag[1] = 'W';
862*4882a593Smuzhiyun 	buffer->end_tag[0] = 'Z';
863*4882a593Smuzhiyun 	buffer->end_tag[1] = 'Z';
864*4882a593Smuzhiyun 
865*4882a593Smuzhiyun 	rc = pqi_write_host_wellness(ctrl_info, buffer, buffer_length);
866*4882a593Smuzhiyun 
867*4882a593Smuzhiyun 	kfree(buffer);
868*4882a593Smuzhiyun 
869*4882a593Smuzhiyun 	return rc;
870*4882a593Smuzhiyun }
871*4882a593Smuzhiyun 
872*4882a593Smuzhiyun #define PQI_UPDATE_TIME_WORK_INTERVAL	(24UL * 60 * 60 * PQI_HZ)
873*4882a593Smuzhiyun 
pqi_update_time_worker(struct work_struct * work)874*4882a593Smuzhiyun static void pqi_update_time_worker(struct work_struct *work)
875*4882a593Smuzhiyun {
876*4882a593Smuzhiyun 	int rc;
877*4882a593Smuzhiyun 	struct pqi_ctrl_info *ctrl_info;
878*4882a593Smuzhiyun 
879*4882a593Smuzhiyun 	ctrl_info = container_of(to_delayed_work(work), struct pqi_ctrl_info,
880*4882a593Smuzhiyun 		update_time_work);
881*4882a593Smuzhiyun 
882*4882a593Smuzhiyun 	if (pqi_ctrl_offline(ctrl_info))
883*4882a593Smuzhiyun 		return;
884*4882a593Smuzhiyun 
885*4882a593Smuzhiyun 	rc = pqi_write_current_time_to_host_wellness(ctrl_info);
886*4882a593Smuzhiyun 	if (rc)
887*4882a593Smuzhiyun 		dev_warn(&ctrl_info->pci_dev->dev,
888*4882a593Smuzhiyun 			"error updating time on controller\n");
889*4882a593Smuzhiyun 
890*4882a593Smuzhiyun 	schedule_delayed_work(&ctrl_info->update_time_work,
891*4882a593Smuzhiyun 		PQI_UPDATE_TIME_WORK_INTERVAL);
892*4882a593Smuzhiyun }
893*4882a593Smuzhiyun 
pqi_schedule_update_time_worker(struct pqi_ctrl_info * ctrl_info)894*4882a593Smuzhiyun static inline void pqi_schedule_update_time_worker(
895*4882a593Smuzhiyun 	struct pqi_ctrl_info *ctrl_info)
896*4882a593Smuzhiyun {
897*4882a593Smuzhiyun 	schedule_delayed_work(&ctrl_info->update_time_work, 0);
898*4882a593Smuzhiyun }
899*4882a593Smuzhiyun 
pqi_cancel_update_time_worker(struct pqi_ctrl_info * ctrl_info)900*4882a593Smuzhiyun static inline void pqi_cancel_update_time_worker(
901*4882a593Smuzhiyun 	struct pqi_ctrl_info *ctrl_info)
902*4882a593Smuzhiyun {
903*4882a593Smuzhiyun 	cancel_delayed_work_sync(&ctrl_info->update_time_work);
904*4882a593Smuzhiyun }
905*4882a593Smuzhiyun 
pqi_report_luns(struct pqi_ctrl_info * ctrl_info,u8 cmd,void * buffer,size_t buffer_length)906*4882a593Smuzhiyun static inline int pqi_report_luns(struct pqi_ctrl_info *ctrl_info, u8 cmd,
907*4882a593Smuzhiyun 	void *buffer, size_t buffer_length)
908*4882a593Smuzhiyun {
909*4882a593Smuzhiyun 	return pqi_send_ctrl_raid_request(ctrl_info, cmd, buffer,
910*4882a593Smuzhiyun 		buffer_length);
911*4882a593Smuzhiyun }
912*4882a593Smuzhiyun 
pqi_report_phys_logical_luns(struct pqi_ctrl_info * ctrl_info,u8 cmd,void ** buffer)913*4882a593Smuzhiyun static int pqi_report_phys_logical_luns(struct pqi_ctrl_info *ctrl_info, u8 cmd,
914*4882a593Smuzhiyun 	void **buffer)
915*4882a593Smuzhiyun {
916*4882a593Smuzhiyun 	int rc;
917*4882a593Smuzhiyun 	size_t lun_list_length;
918*4882a593Smuzhiyun 	size_t lun_data_length;
919*4882a593Smuzhiyun 	size_t new_lun_list_length;
920*4882a593Smuzhiyun 	void *lun_data = NULL;
921*4882a593Smuzhiyun 	struct report_lun_header *report_lun_header;
922*4882a593Smuzhiyun 
923*4882a593Smuzhiyun 	report_lun_header = kmalloc(sizeof(*report_lun_header), GFP_KERNEL);
924*4882a593Smuzhiyun 	if (!report_lun_header) {
925*4882a593Smuzhiyun 		rc = -ENOMEM;
926*4882a593Smuzhiyun 		goto out;
927*4882a593Smuzhiyun 	}
928*4882a593Smuzhiyun 
929*4882a593Smuzhiyun 	rc = pqi_report_luns(ctrl_info, cmd, report_lun_header,
930*4882a593Smuzhiyun 		sizeof(*report_lun_header));
931*4882a593Smuzhiyun 	if (rc)
932*4882a593Smuzhiyun 		goto out;
933*4882a593Smuzhiyun 
934*4882a593Smuzhiyun 	lun_list_length = get_unaligned_be32(&report_lun_header->list_length);
935*4882a593Smuzhiyun 
936*4882a593Smuzhiyun again:
937*4882a593Smuzhiyun 	lun_data_length = sizeof(struct report_lun_header) + lun_list_length;
938*4882a593Smuzhiyun 
939*4882a593Smuzhiyun 	lun_data = kmalloc(lun_data_length, GFP_KERNEL);
940*4882a593Smuzhiyun 	if (!lun_data) {
941*4882a593Smuzhiyun 		rc = -ENOMEM;
942*4882a593Smuzhiyun 		goto out;
943*4882a593Smuzhiyun 	}
944*4882a593Smuzhiyun 
945*4882a593Smuzhiyun 	if (lun_list_length == 0) {
946*4882a593Smuzhiyun 		memcpy(lun_data, report_lun_header, sizeof(*report_lun_header));
947*4882a593Smuzhiyun 		goto out;
948*4882a593Smuzhiyun 	}
949*4882a593Smuzhiyun 
950*4882a593Smuzhiyun 	rc = pqi_report_luns(ctrl_info, cmd, lun_data, lun_data_length);
951*4882a593Smuzhiyun 	if (rc)
952*4882a593Smuzhiyun 		goto out;
953*4882a593Smuzhiyun 
954*4882a593Smuzhiyun 	new_lun_list_length = get_unaligned_be32(
955*4882a593Smuzhiyun 		&((struct report_lun_header *)lun_data)->list_length);
956*4882a593Smuzhiyun 
957*4882a593Smuzhiyun 	if (new_lun_list_length > lun_list_length) {
958*4882a593Smuzhiyun 		lun_list_length = new_lun_list_length;
959*4882a593Smuzhiyun 		kfree(lun_data);
960*4882a593Smuzhiyun 		goto again;
961*4882a593Smuzhiyun 	}
962*4882a593Smuzhiyun 
963*4882a593Smuzhiyun out:
964*4882a593Smuzhiyun 	kfree(report_lun_header);
965*4882a593Smuzhiyun 
966*4882a593Smuzhiyun 	if (rc) {
967*4882a593Smuzhiyun 		kfree(lun_data);
968*4882a593Smuzhiyun 		lun_data = NULL;
969*4882a593Smuzhiyun 	}
970*4882a593Smuzhiyun 
971*4882a593Smuzhiyun 	*buffer = lun_data;
972*4882a593Smuzhiyun 
973*4882a593Smuzhiyun 	return rc;
974*4882a593Smuzhiyun }
975*4882a593Smuzhiyun 
pqi_report_phys_luns(struct pqi_ctrl_info * ctrl_info,void ** buffer)976*4882a593Smuzhiyun static inline int pqi_report_phys_luns(struct pqi_ctrl_info *ctrl_info,
977*4882a593Smuzhiyun 	void **buffer)
978*4882a593Smuzhiyun {
979*4882a593Smuzhiyun 	return pqi_report_phys_logical_luns(ctrl_info, CISS_REPORT_PHYS,
980*4882a593Smuzhiyun 		buffer);
981*4882a593Smuzhiyun }
982*4882a593Smuzhiyun 
pqi_report_logical_luns(struct pqi_ctrl_info * ctrl_info,void ** buffer)983*4882a593Smuzhiyun static inline int pqi_report_logical_luns(struct pqi_ctrl_info *ctrl_info,
984*4882a593Smuzhiyun 	void **buffer)
985*4882a593Smuzhiyun {
986*4882a593Smuzhiyun 	return pqi_report_phys_logical_luns(ctrl_info, CISS_REPORT_LOG, buffer);
987*4882a593Smuzhiyun }
988*4882a593Smuzhiyun 
pqi_get_device_lists(struct pqi_ctrl_info * ctrl_info,struct report_phys_lun_extended ** physdev_list,struct report_log_lun_extended ** logdev_list)989*4882a593Smuzhiyun static int pqi_get_device_lists(struct pqi_ctrl_info *ctrl_info,
990*4882a593Smuzhiyun 	struct report_phys_lun_extended **physdev_list,
991*4882a593Smuzhiyun 	struct report_log_lun_extended **logdev_list)
992*4882a593Smuzhiyun {
993*4882a593Smuzhiyun 	int rc;
994*4882a593Smuzhiyun 	size_t logdev_list_length;
995*4882a593Smuzhiyun 	size_t logdev_data_length;
996*4882a593Smuzhiyun 	struct report_log_lun_extended *internal_logdev_list;
997*4882a593Smuzhiyun 	struct report_log_lun_extended *logdev_data;
998*4882a593Smuzhiyun 	struct report_lun_header report_lun_header;
999*4882a593Smuzhiyun 
1000*4882a593Smuzhiyun 	rc = pqi_report_phys_luns(ctrl_info, (void **)physdev_list);
1001*4882a593Smuzhiyun 	if (rc)
1002*4882a593Smuzhiyun 		dev_err(&ctrl_info->pci_dev->dev,
1003*4882a593Smuzhiyun 			"report physical LUNs failed\n");
1004*4882a593Smuzhiyun 
1005*4882a593Smuzhiyun 	rc = pqi_report_logical_luns(ctrl_info, (void **)logdev_list);
1006*4882a593Smuzhiyun 	if (rc)
1007*4882a593Smuzhiyun 		dev_err(&ctrl_info->pci_dev->dev,
1008*4882a593Smuzhiyun 			"report logical LUNs failed\n");
1009*4882a593Smuzhiyun 
1010*4882a593Smuzhiyun 	/*
1011*4882a593Smuzhiyun 	 * Tack the controller itself onto the end of the logical device list.
1012*4882a593Smuzhiyun 	 */
1013*4882a593Smuzhiyun 
1014*4882a593Smuzhiyun 	logdev_data = *logdev_list;
1015*4882a593Smuzhiyun 
1016*4882a593Smuzhiyun 	if (logdev_data) {
1017*4882a593Smuzhiyun 		logdev_list_length =
1018*4882a593Smuzhiyun 			get_unaligned_be32(&logdev_data->header.list_length);
1019*4882a593Smuzhiyun 	} else {
1020*4882a593Smuzhiyun 		memset(&report_lun_header, 0, sizeof(report_lun_header));
1021*4882a593Smuzhiyun 		logdev_data =
1022*4882a593Smuzhiyun 			(struct report_log_lun_extended *)&report_lun_header;
1023*4882a593Smuzhiyun 		logdev_list_length = 0;
1024*4882a593Smuzhiyun 	}
1025*4882a593Smuzhiyun 
1026*4882a593Smuzhiyun 	logdev_data_length = sizeof(struct report_lun_header) +
1027*4882a593Smuzhiyun 		logdev_list_length;
1028*4882a593Smuzhiyun 
1029*4882a593Smuzhiyun 	internal_logdev_list = kmalloc(logdev_data_length +
1030*4882a593Smuzhiyun 		sizeof(struct report_log_lun_extended), GFP_KERNEL);
1031*4882a593Smuzhiyun 	if (!internal_logdev_list) {
1032*4882a593Smuzhiyun 		kfree(*logdev_list);
1033*4882a593Smuzhiyun 		*logdev_list = NULL;
1034*4882a593Smuzhiyun 		return -ENOMEM;
1035*4882a593Smuzhiyun 	}
1036*4882a593Smuzhiyun 
1037*4882a593Smuzhiyun 	memcpy(internal_logdev_list, logdev_data, logdev_data_length);
1038*4882a593Smuzhiyun 	memset((u8 *)internal_logdev_list + logdev_data_length, 0,
1039*4882a593Smuzhiyun 		sizeof(struct report_log_lun_extended_entry));
1040*4882a593Smuzhiyun 	put_unaligned_be32(logdev_list_length +
1041*4882a593Smuzhiyun 		sizeof(struct report_log_lun_extended_entry),
1042*4882a593Smuzhiyun 		&internal_logdev_list->header.list_length);
1043*4882a593Smuzhiyun 
1044*4882a593Smuzhiyun 	kfree(*logdev_list);
1045*4882a593Smuzhiyun 	*logdev_list = internal_logdev_list;
1046*4882a593Smuzhiyun 
1047*4882a593Smuzhiyun 	return 0;
1048*4882a593Smuzhiyun }
1049*4882a593Smuzhiyun 
pqi_set_bus_target_lun(struct pqi_scsi_dev * device,int bus,int target,int lun)1050*4882a593Smuzhiyun static inline void pqi_set_bus_target_lun(struct pqi_scsi_dev *device,
1051*4882a593Smuzhiyun 	int bus, int target, int lun)
1052*4882a593Smuzhiyun {
1053*4882a593Smuzhiyun 	device->bus = bus;
1054*4882a593Smuzhiyun 	device->target = target;
1055*4882a593Smuzhiyun 	device->lun = lun;
1056*4882a593Smuzhiyun }
1057*4882a593Smuzhiyun 
pqi_assign_bus_target_lun(struct pqi_scsi_dev * device)1058*4882a593Smuzhiyun static void pqi_assign_bus_target_lun(struct pqi_scsi_dev *device)
1059*4882a593Smuzhiyun {
1060*4882a593Smuzhiyun 	u8 *scsi3addr;
1061*4882a593Smuzhiyun 	u32 lunid;
1062*4882a593Smuzhiyun 	int bus;
1063*4882a593Smuzhiyun 	int target;
1064*4882a593Smuzhiyun 	int lun;
1065*4882a593Smuzhiyun 
1066*4882a593Smuzhiyun 	scsi3addr = device->scsi3addr;
1067*4882a593Smuzhiyun 	lunid = get_unaligned_le32(scsi3addr);
1068*4882a593Smuzhiyun 
1069*4882a593Smuzhiyun 	if (pqi_is_hba_lunid(scsi3addr)) {
1070*4882a593Smuzhiyun 		/* The specified device is the controller. */
1071*4882a593Smuzhiyun 		pqi_set_bus_target_lun(device, PQI_HBA_BUS, 0, lunid & 0x3fff);
1072*4882a593Smuzhiyun 		device->target_lun_valid = true;
1073*4882a593Smuzhiyun 		return;
1074*4882a593Smuzhiyun 	}
1075*4882a593Smuzhiyun 
1076*4882a593Smuzhiyun 	if (pqi_is_logical_device(device)) {
1077*4882a593Smuzhiyun 		if (device->is_external_raid_device) {
1078*4882a593Smuzhiyun 			bus = PQI_EXTERNAL_RAID_VOLUME_BUS;
1079*4882a593Smuzhiyun 			target = (lunid >> 16) & 0x3fff;
1080*4882a593Smuzhiyun 			lun = lunid & 0xff;
1081*4882a593Smuzhiyun 		} else {
1082*4882a593Smuzhiyun 			bus = PQI_RAID_VOLUME_BUS;
1083*4882a593Smuzhiyun 			target = 0;
1084*4882a593Smuzhiyun 			lun = lunid & 0x3fff;
1085*4882a593Smuzhiyun 		}
1086*4882a593Smuzhiyun 		pqi_set_bus_target_lun(device, bus, target, lun);
1087*4882a593Smuzhiyun 		device->target_lun_valid = true;
1088*4882a593Smuzhiyun 		return;
1089*4882a593Smuzhiyun 	}
1090*4882a593Smuzhiyun 
1091*4882a593Smuzhiyun 	/*
1092*4882a593Smuzhiyun 	 * Defer target and LUN assignment for non-controller physical devices
1093*4882a593Smuzhiyun 	 * because the SAS transport layer will make these assignments later.
1094*4882a593Smuzhiyun 	 */
1095*4882a593Smuzhiyun 	pqi_set_bus_target_lun(device, PQI_PHYSICAL_DEVICE_BUS, 0, 0);
1096*4882a593Smuzhiyun }
1097*4882a593Smuzhiyun 
pqi_get_raid_level(struct pqi_ctrl_info * ctrl_info,struct pqi_scsi_dev * device)1098*4882a593Smuzhiyun static void pqi_get_raid_level(struct pqi_ctrl_info *ctrl_info,
1099*4882a593Smuzhiyun 	struct pqi_scsi_dev *device)
1100*4882a593Smuzhiyun {
1101*4882a593Smuzhiyun 	int rc;
1102*4882a593Smuzhiyun 	u8 raid_level;
1103*4882a593Smuzhiyun 	u8 *buffer;
1104*4882a593Smuzhiyun 
1105*4882a593Smuzhiyun 	raid_level = SA_RAID_UNKNOWN;
1106*4882a593Smuzhiyun 
1107*4882a593Smuzhiyun 	buffer = kmalloc(64, GFP_KERNEL);
1108*4882a593Smuzhiyun 	if (buffer) {
1109*4882a593Smuzhiyun 		rc = pqi_scsi_inquiry(ctrl_info, device->scsi3addr,
1110*4882a593Smuzhiyun 			VPD_PAGE | CISS_VPD_LV_DEVICE_GEOMETRY, buffer, 64);
1111*4882a593Smuzhiyun 		if (rc == 0) {
1112*4882a593Smuzhiyun 			raid_level = buffer[8];
1113*4882a593Smuzhiyun 			if (raid_level > SA_RAID_MAX)
1114*4882a593Smuzhiyun 				raid_level = SA_RAID_UNKNOWN;
1115*4882a593Smuzhiyun 		}
1116*4882a593Smuzhiyun 		kfree(buffer);
1117*4882a593Smuzhiyun 	}
1118*4882a593Smuzhiyun 
1119*4882a593Smuzhiyun 	device->raid_level = raid_level;
1120*4882a593Smuzhiyun }
1121*4882a593Smuzhiyun 
pqi_validate_raid_map(struct pqi_ctrl_info * ctrl_info,struct pqi_scsi_dev * device,struct raid_map * raid_map)1122*4882a593Smuzhiyun static int pqi_validate_raid_map(struct pqi_ctrl_info *ctrl_info,
1123*4882a593Smuzhiyun 	struct pqi_scsi_dev *device, struct raid_map *raid_map)
1124*4882a593Smuzhiyun {
1125*4882a593Smuzhiyun 	char *err_msg;
1126*4882a593Smuzhiyun 	u32 raid_map_size;
1127*4882a593Smuzhiyun 	u32 r5or6_blocks_per_row;
1128*4882a593Smuzhiyun 
1129*4882a593Smuzhiyun 	raid_map_size = get_unaligned_le32(&raid_map->structure_size);
1130*4882a593Smuzhiyun 
1131*4882a593Smuzhiyun 	if (raid_map_size < offsetof(struct raid_map, disk_data)) {
1132*4882a593Smuzhiyun 		err_msg = "RAID map too small";
1133*4882a593Smuzhiyun 		goto bad_raid_map;
1134*4882a593Smuzhiyun 	}
1135*4882a593Smuzhiyun 
1136*4882a593Smuzhiyun 	if (device->raid_level == SA_RAID_1) {
1137*4882a593Smuzhiyun 		if (get_unaligned_le16(&raid_map->layout_map_count) != 2) {
1138*4882a593Smuzhiyun 			err_msg = "invalid RAID-1 map";
1139*4882a593Smuzhiyun 			goto bad_raid_map;
1140*4882a593Smuzhiyun 		}
1141*4882a593Smuzhiyun 	} else if (device->raid_level == SA_RAID_ADM) {
1142*4882a593Smuzhiyun 		if (get_unaligned_le16(&raid_map->layout_map_count) != 3) {
1143*4882a593Smuzhiyun 			err_msg = "invalid RAID-1(ADM) map";
1144*4882a593Smuzhiyun 			goto bad_raid_map;
1145*4882a593Smuzhiyun 		}
1146*4882a593Smuzhiyun 	} else if ((device->raid_level == SA_RAID_5 ||
1147*4882a593Smuzhiyun 		device->raid_level == SA_RAID_6) &&
1148*4882a593Smuzhiyun 		get_unaligned_le16(&raid_map->layout_map_count) > 1) {
1149*4882a593Smuzhiyun 		/* RAID 50/60 */
1150*4882a593Smuzhiyun 		r5or6_blocks_per_row =
1151*4882a593Smuzhiyun 			get_unaligned_le16(&raid_map->strip_size) *
1152*4882a593Smuzhiyun 			get_unaligned_le16(&raid_map->data_disks_per_row);
1153*4882a593Smuzhiyun 		if (r5or6_blocks_per_row == 0) {
1154*4882a593Smuzhiyun 			err_msg = "invalid RAID-5 or RAID-6 map";
1155*4882a593Smuzhiyun 			goto bad_raid_map;
1156*4882a593Smuzhiyun 		}
1157*4882a593Smuzhiyun 	}
1158*4882a593Smuzhiyun 
1159*4882a593Smuzhiyun 	return 0;
1160*4882a593Smuzhiyun 
1161*4882a593Smuzhiyun bad_raid_map:
1162*4882a593Smuzhiyun 	dev_warn(&ctrl_info->pci_dev->dev,
1163*4882a593Smuzhiyun 		"logical device %08x%08x %s\n",
1164*4882a593Smuzhiyun 		*((u32 *)&device->scsi3addr),
1165*4882a593Smuzhiyun 		*((u32 *)&device->scsi3addr[4]), err_msg);
1166*4882a593Smuzhiyun 
1167*4882a593Smuzhiyun 	return -EINVAL;
1168*4882a593Smuzhiyun }
1169*4882a593Smuzhiyun 
pqi_get_raid_map(struct pqi_ctrl_info * ctrl_info,struct pqi_scsi_dev * device)1170*4882a593Smuzhiyun static int pqi_get_raid_map(struct pqi_ctrl_info *ctrl_info,
1171*4882a593Smuzhiyun 	struct pqi_scsi_dev *device)
1172*4882a593Smuzhiyun {
1173*4882a593Smuzhiyun 	int rc;
1174*4882a593Smuzhiyun 	u32 raid_map_size;
1175*4882a593Smuzhiyun 	struct raid_map *raid_map;
1176*4882a593Smuzhiyun 
1177*4882a593Smuzhiyun 	raid_map = kmalloc(sizeof(*raid_map), GFP_KERNEL);
1178*4882a593Smuzhiyun 	if (!raid_map)
1179*4882a593Smuzhiyun 		return -ENOMEM;
1180*4882a593Smuzhiyun 
1181*4882a593Smuzhiyun 	rc = pqi_send_scsi_raid_request(ctrl_info, CISS_GET_RAID_MAP,
1182*4882a593Smuzhiyun 		device->scsi3addr, raid_map, sizeof(*raid_map),
1183*4882a593Smuzhiyun 		0, NULL, NO_TIMEOUT);
1184*4882a593Smuzhiyun 
1185*4882a593Smuzhiyun 	if (rc)
1186*4882a593Smuzhiyun 		goto error;
1187*4882a593Smuzhiyun 
1188*4882a593Smuzhiyun 	raid_map_size = get_unaligned_le32(&raid_map->structure_size);
1189*4882a593Smuzhiyun 
1190*4882a593Smuzhiyun 	if (raid_map_size > sizeof(*raid_map)) {
1191*4882a593Smuzhiyun 
1192*4882a593Smuzhiyun 		kfree(raid_map);
1193*4882a593Smuzhiyun 
1194*4882a593Smuzhiyun 		raid_map = kmalloc(raid_map_size, GFP_KERNEL);
1195*4882a593Smuzhiyun 		if (!raid_map)
1196*4882a593Smuzhiyun 			return -ENOMEM;
1197*4882a593Smuzhiyun 
1198*4882a593Smuzhiyun 		rc = pqi_send_scsi_raid_request(ctrl_info, CISS_GET_RAID_MAP,
1199*4882a593Smuzhiyun 			device->scsi3addr, raid_map, raid_map_size,
1200*4882a593Smuzhiyun 			0, NULL, NO_TIMEOUT);
1201*4882a593Smuzhiyun 		if (rc)
1202*4882a593Smuzhiyun 			goto error;
1203*4882a593Smuzhiyun 
1204*4882a593Smuzhiyun 		if (get_unaligned_le32(&raid_map->structure_size)
1205*4882a593Smuzhiyun 			!= raid_map_size) {
1206*4882a593Smuzhiyun 			dev_warn(&ctrl_info->pci_dev->dev,
1207*4882a593Smuzhiyun 				"Requested %d bytes, received %d bytes",
1208*4882a593Smuzhiyun 				raid_map_size,
1209*4882a593Smuzhiyun 				get_unaligned_le32(&raid_map->structure_size));
1210*4882a593Smuzhiyun 			rc = -EINVAL;
1211*4882a593Smuzhiyun 			goto error;
1212*4882a593Smuzhiyun 		}
1213*4882a593Smuzhiyun 	}
1214*4882a593Smuzhiyun 
1215*4882a593Smuzhiyun 	rc = pqi_validate_raid_map(ctrl_info, device, raid_map);
1216*4882a593Smuzhiyun 	if (rc)
1217*4882a593Smuzhiyun 		goto error;
1218*4882a593Smuzhiyun 
1219*4882a593Smuzhiyun 	device->raid_map = raid_map;
1220*4882a593Smuzhiyun 
1221*4882a593Smuzhiyun 	return 0;
1222*4882a593Smuzhiyun 
1223*4882a593Smuzhiyun error:
1224*4882a593Smuzhiyun 	kfree(raid_map);
1225*4882a593Smuzhiyun 
1226*4882a593Smuzhiyun 	return rc;
1227*4882a593Smuzhiyun }
1228*4882a593Smuzhiyun 
pqi_get_raid_bypass_status(struct pqi_ctrl_info * ctrl_info,struct pqi_scsi_dev * device)1229*4882a593Smuzhiyun static void pqi_get_raid_bypass_status(struct pqi_ctrl_info *ctrl_info,
1230*4882a593Smuzhiyun 	struct pqi_scsi_dev *device)
1231*4882a593Smuzhiyun {
1232*4882a593Smuzhiyun 	int rc;
1233*4882a593Smuzhiyun 	u8 *buffer;
1234*4882a593Smuzhiyun 	u8 bypass_status;
1235*4882a593Smuzhiyun 
1236*4882a593Smuzhiyun 	buffer = kmalloc(64, GFP_KERNEL);
1237*4882a593Smuzhiyun 	if (!buffer)
1238*4882a593Smuzhiyun 		return;
1239*4882a593Smuzhiyun 
1240*4882a593Smuzhiyun 	rc = pqi_scsi_inquiry(ctrl_info, device->scsi3addr,
1241*4882a593Smuzhiyun 		VPD_PAGE | CISS_VPD_LV_BYPASS_STATUS, buffer, 64);
1242*4882a593Smuzhiyun 	if (rc)
1243*4882a593Smuzhiyun 		goto out;
1244*4882a593Smuzhiyun 
1245*4882a593Smuzhiyun #define RAID_BYPASS_STATUS		4
1246*4882a593Smuzhiyun #define RAID_BYPASS_CONFIGURED		0x1
1247*4882a593Smuzhiyun #define RAID_BYPASS_ENABLED		0x2
1248*4882a593Smuzhiyun 
1249*4882a593Smuzhiyun 	bypass_status = buffer[RAID_BYPASS_STATUS];
1250*4882a593Smuzhiyun 	device->raid_bypass_configured =
1251*4882a593Smuzhiyun 		(bypass_status & RAID_BYPASS_CONFIGURED) != 0;
1252*4882a593Smuzhiyun 	if (device->raid_bypass_configured &&
1253*4882a593Smuzhiyun 		(bypass_status & RAID_BYPASS_ENABLED) &&
1254*4882a593Smuzhiyun 		pqi_get_raid_map(ctrl_info, device) == 0)
1255*4882a593Smuzhiyun 		device->raid_bypass_enabled = true;
1256*4882a593Smuzhiyun 
1257*4882a593Smuzhiyun out:
1258*4882a593Smuzhiyun 	kfree(buffer);
1259*4882a593Smuzhiyun }
1260*4882a593Smuzhiyun 
1261*4882a593Smuzhiyun /*
1262*4882a593Smuzhiyun  * Use vendor-specific VPD to determine online/offline status of a volume.
1263*4882a593Smuzhiyun  */
1264*4882a593Smuzhiyun 
pqi_get_volume_status(struct pqi_ctrl_info * ctrl_info,struct pqi_scsi_dev * device)1265*4882a593Smuzhiyun static void pqi_get_volume_status(struct pqi_ctrl_info *ctrl_info,
1266*4882a593Smuzhiyun 	struct pqi_scsi_dev *device)
1267*4882a593Smuzhiyun {
1268*4882a593Smuzhiyun 	int rc;
1269*4882a593Smuzhiyun 	size_t page_length;
1270*4882a593Smuzhiyun 	u8 volume_status = CISS_LV_STATUS_UNAVAILABLE;
1271*4882a593Smuzhiyun 	bool volume_offline = true;
1272*4882a593Smuzhiyun 	u32 volume_flags;
1273*4882a593Smuzhiyun 	struct ciss_vpd_logical_volume_status *vpd;
1274*4882a593Smuzhiyun 
1275*4882a593Smuzhiyun 	vpd = kmalloc(sizeof(*vpd), GFP_KERNEL);
1276*4882a593Smuzhiyun 	if (!vpd)
1277*4882a593Smuzhiyun 		goto no_buffer;
1278*4882a593Smuzhiyun 
1279*4882a593Smuzhiyun 	rc = pqi_scsi_inquiry(ctrl_info, device->scsi3addr,
1280*4882a593Smuzhiyun 		VPD_PAGE | CISS_VPD_LV_STATUS, vpd, sizeof(*vpd));
1281*4882a593Smuzhiyun 	if (rc)
1282*4882a593Smuzhiyun 		goto out;
1283*4882a593Smuzhiyun 
1284*4882a593Smuzhiyun 	if (vpd->page_code != CISS_VPD_LV_STATUS)
1285*4882a593Smuzhiyun 		goto out;
1286*4882a593Smuzhiyun 
1287*4882a593Smuzhiyun 	page_length = offsetof(struct ciss_vpd_logical_volume_status,
1288*4882a593Smuzhiyun 		volume_status) + vpd->page_length;
1289*4882a593Smuzhiyun 	if (page_length < sizeof(*vpd))
1290*4882a593Smuzhiyun 		goto out;
1291*4882a593Smuzhiyun 
1292*4882a593Smuzhiyun 	volume_status = vpd->volume_status;
1293*4882a593Smuzhiyun 	volume_flags = get_unaligned_be32(&vpd->flags);
1294*4882a593Smuzhiyun 	volume_offline = (volume_flags & CISS_LV_FLAGS_NO_HOST_IO) != 0;
1295*4882a593Smuzhiyun 
1296*4882a593Smuzhiyun out:
1297*4882a593Smuzhiyun 	kfree(vpd);
1298*4882a593Smuzhiyun no_buffer:
1299*4882a593Smuzhiyun 	device->volume_status = volume_status;
1300*4882a593Smuzhiyun 	device->volume_offline = volume_offline;
1301*4882a593Smuzhiyun }
1302*4882a593Smuzhiyun 
pqi_get_physical_device_info(struct pqi_ctrl_info * ctrl_info,struct pqi_scsi_dev * device,struct bmic_identify_physical_device * id_phys)1303*4882a593Smuzhiyun static int pqi_get_physical_device_info(struct pqi_ctrl_info *ctrl_info,
1304*4882a593Smuzhiyun 	struct pqi_scsi_dev *device,
1305*4882a593Smuzhiyun 	struct bmic_identify_physical_device *id_phys)
1306*4882a593Smuzhiyun {
1307*4882a593Smuzhiyun 	int rc;
1308*4882a593Smuzhiyun 
1309*4882a593Smuzhiyun 	memset(id_phys, 0, sizeof(*id_phys));
1310*4882a593Smuzhiyun 
1311*4882a593Smuzhiyun 	rc = pqi_identify_physical_device(ctrl_info, device,
1312*4882a593Smuzhiyun 		id_phys, sizeof(*id_phys));
1313*4882a593Smuzhiyun 	if (rc) {
1314*4882a593Smuzhiyun 		device->queue_depth = PQI_PHYSICAL_DISK_DEFAULT_MAX_QUEUE_DEPTH;
1315*4882a593Smuzhiyun 		return rc;
1316*4882a593Smuzhiyun 	}
1317*4882a593Smuzhiyun 
1318*4882a593Smuzhiyun 	scsi_sanitize_inquiry_string(&id_phys->model[0], 8);
1319*4882a593Smuzhiyun 	scsi_sanitize_inquiry_string(&id_phys->model[8], 16);
1320*4882a593Smuzhiyun 
1321*4882a593Smuzhiyun 	memcpy(device->vendor, &id_phys->model[0], sizeof(device->vendor));
1322*4882a593Smuzhiyun 	memcpy(device->model, &id_phys->model[8], sizeof(device->model));
1323*4882a593Smuzhiyun 
1324*4882a593Smuzhiyun 	device->box_index = id_phys->box_index;
1325*4882a593Smuzhiyun 	device->phys_box_on_bus = id_phys->phys_box_on_bus;
1326*4882a593Smuzhiyun 	device->phy_connected_dev_type = id_phys->phy_connected_dev_type[0];
1327*4882a593Smuzhiyun 	device->queue_depth =
1328*4882a593Smuzhiyun 		get_unaligned_le16(&id_phys->current_queue_depth_limit);
1329*4882a593Smuzhiyun 	device->active_path_index = id_phys->active_path_number;
1330*4882a593Smuzhiyun 	device->path_map = id_phys->redundant_path_present_map;
1331*4882a593Smuzhiyun 	memcpy(&device->box,
1332*4882a593Smuzhiyun 		&id_phys->alternate_paths_phys_box_on_port,
1333*4882a593Smuzhiyun 		sizeof(device->box));
1334*4882a593Smuzhiyun 	memcpy(&device->phys_connector,
1335*4882a593Smuzhiyun 		&id_phys->alternate_paths_phys_connector,
1336*4882a593Smuzhiyun 		sizeof(device->phys_connector));
1337*4882a593Smuzhiyun 	device->bay = id_phys->phys_bay_in_box;
1338*4882a593Smuzhiyun 
1339*4882a593Smuzhiyun 	return 0;
1340*4882a593Smuzhiyun }
1341*4882a593Smuzhiyun 
pqi_get_logical_device_info(struct pqi_ctrl_info * ctrl_info,struct pqi_scsi_dev * device)1342*4882a593Smuzhiyun static int pqi_get_logical_device_info(struct pqi_ctrl_info *ctrl_info,
1343*4882a593Smuzhiyun 	struct pqi_scsi_dev *device)
1344*4882a593Smuzhiyun {
1345*4882a593Smuzhiyun 	int rc;
1346*4882a593Smuzhiyun 	u8 *buffer;
1347*4882a593Smuzhiyun 
1348*4882a593Smuzhiyun 	buffer = kmalloc(64, GFP_KERNEL);
1349*4882a593Smuzhiyun 	if (!buffer)
1350*4882a593Smuzhiyun 		return -ENOMEM;
1351*4882a593Smuzhiyun 
1352*4882a593Smuzhiyun 	/* Send an inquiry to the device to see what it is. */
1353*4882a593Smuzhiyun 	rc = pqi_scsi_inquiry(ctrl_info, device->scsi3addr, 0, buffer, 64);
1354*4882a593Smuzhiyun 	if (rc)
1355*4882a593Smuzhiyun 		goto out;
1356*4882a593Smuzhiyun 
1357*4882a593Smuzhiyun 	scsi_sanitize_inquiry_string(&buffer[8], 8);
1358*4882a593Smuzhiyun 	scsi_sanitize_inquiry_string(&buffer[16], 16);
1359*4882a593Smuzhiyun 
1360*4882a593Smuzhiyun 	device->devtype = buffer[0] & 0x1f;
1361*4882a593Smuzhiyun 	memcpy(device->vendor, &buffer[8], sizeof(device->vendor));
1362*4882a593Smuzhiyun 	memcpy(device->model, &buffer[16], sizeof(device->model));
1363*4882a593Smuzhiyun 
1364*4882a593Smuzhiyun 	if (device->devtype == TYPE_DISK) {
1365*4882a593Smuzhiyun 		if (device->is_external_raid_device) {
1366*4882a593Smuzhiyun 			device->raid_level = SA_RAID_UNKNOWN;
1367*4882a593Smuzhiyun 			device->volume_status = CISS_LV_OK;
1368*4882a593Smuzhiyun 			device->volume_offline = false;
1369*4882a593Smuzhiyun 		} else {
1370*4882a593Smuzhiyun 			pqi_get_raid_level(ctrl_info, device);
1371*4882a593Smuzhiyun 			pqi_get_raid_bypass_status(ctrl_info, device);
1372*4882a593Smuzhiyun 			pqi_get_volume_status(ctrl_info, device);
1373*4882a593Smuzhiyun 		}
1374*4882a593Smuzhiyun 	}
1375*4882a593Smuzhiyun 
1376*4882a593Smuzhiyun out:
1377*4882a593Smuzhiyun 	kfree(buffer);
1378*4882a593Smuzhiyun 
1379*4882a593Smuzhiyun 	return rc;
1380*4882a593Smuzhiyun }
1381*4882a593Smuzhiyun 
pqi_get_device_info(struct pqi_ctrl_info * ctrl_info,struct pqi_scsi_dev * device,struct bmic_identify_physical_device * id_phys)1382*4882a593Smuzhiyun static int pqi_get_device_info(struct pqi_ctrl_info *ctrl_info,
1383*4882a593Smuzhiyun 	struct pqi_scsi_dev *device,
1384*4882a593Smuzhiyun 	struct bmic_identify_physical_device *id_phys)
1385*4882a593Smuzhiyun {
1386*4882a593Smuzhiyun 	int rc;
1387*4882a593Smuzhiyun 
1388*4882a593Smuzhiyun 	if (device->is_expander_smp_device)
1389*4882a593Smuzhiyun 		return 0;
1390*4882a593Smuzhiyun 
1391*4882a593Smuzhiyun 	if (pqi_is_logical_device(device))
1392*4882a593Smuzhiyun 		rc = pqi_get_logical_device_info(ctrl_info, device);
1393*4882a593Smuzhiyun 	else
1394*4882a593Smuzhiyun 		rc = pqi_get_physical_device_info(ctrl_info, device, id_phys);
1395*4882a593Smuzhiyun 
1396*4882a593Smuzhiyun 	return rc;
1397*4882a593Smuzhiyun }
1398*4882a593Smuzhiyun 
pqi_show_volume_status(struct pqi_ctrl_info * ctrl_info,struct pqi_scsi_dev * device)1399*4882a593Smuzhiyun static void pqi_show_volume_status(struct pqi_ctrl_info *ctrl_info,
1400*4882a593Smuzhiyun 	struct pqi_scsi_dev *device)
1401*4882a593Smuzhiyun {
1402*4882a593Smuzhiyun 	char *status;
1403*4882a593Smuzhiyun 	static const char unknown_state_str[] =
1404*4882a593Smuzhiyun 		"Volume is in an unknown state (%u)";
1405*4882a593Smuzhiyun 	char unknown_state_buffer[sizeof(unknown_state_str) + 10];
1406*4882a593Smuzhiyun 
1407*4882a593Smuzhiyun 	switch (device->volume_status) {
1408*4882a593Smuzhiyun 	case CISS_LV_OK:
1409*4882a593Smuzhiyun 		status = "Volume online";
1410*4882a593Smuzhiyun 		break;
1411*4882a593Smuzhiyun 	case CISS_LV_FAILED:
1412*4882a593Smuzhiyun 		status = "Volume failed";
1413*4882a593Smuzhiyun 		break;
1414*4882a593Smuzhiyun 	case CISS_LV_NOT_CONFIGURED:
1415*4882a593Smuzhiyun 		status = "Volume not configured";
1416*4882a593Smuzhiyun 		break;
1417*4882a593Smuzhiyun 	case CISS_LV_DEGRADED:
1418*4882a593Smuzhiyun 		status = "Volume degraded";
1419*4882a593Smuzhiyun 		break;
1420*4882a593Smuzhiyun 	case CISS_LV_READY_FOR_RECOVERY:
1421*4882a593Smuzhiyun 		status = "Volume ready for recovery operation";
1422*4882a593Smuzhiyun 		break;
1423*4882a593Smuzhiyun 	case CISS_LV_UNDERGOING_RECOVERY:
1424*4882a593Smuzhiyun 		status = "Volume undergoing recovery";
1425*4882a593Smuzhiyun 		break;
1426*4882a593Smuzhiyun 	case CISS_LV_WRONG_PHYSICAL_DRIVE_REPLACED:
1427*4882a593Smuzhiyun 		status = "Wrong physical drive was replaced";
1428*4882a593Smuzhiyun 		break;
1429*4882a593Smuzhiyun 	case CISS_LV_PHYSICAL_DRIVE_CONNECTION_PROBLEM:
1430*4882a593Smuzhiyun 		status = "A physical drive not properly connected";
1431*4882a593Smuzhiyun 		break;
1432*4882a593Smuzhiyun 	case CISS_LV_HARDWARE_OVERHEATING:
1433*4882a593Smuzhiyun 		status = "Hardware is overheating";
1434*4882a593Smuzhiyun 		break;
1435*4882a593Smuzhiyun 	case CISS_LV_HARDWARE_HAS_OVERHEATED:
1436*4882a593Smuzhiyun 		status = "Hardware has overheated";
1437*4882a593Smuzhiyun 		break;
1438*4882a593Smuzhiyun 	case CISS_LV_UNDERGOING_EXPANSION:
1439*4882a593Smuzhiyun 		status = "Volume undergoing expansion";
1440*4882a593Smuzhiyun 		break;
1441*4882a593Smuzhiyun 	case CISS_LV_NOT_AVAILABLE:
1442*4882a593Smuzhiyun 		status = "Volume waiting for transforming volume";
1443*4882a593Smuzhiyun 		break;
1444*4882a593Smuzhiyun 	case CISS_LV_QUEUED_FOR_EXPANSION:
1445*4882a593Smuzhiyun 		status = "Volume queued for expansion";
1446*4882a593Smuzhiyun 		break;
1447*4882a593Smuzhiyun 	case CISS_LV_DISABLED_SCSI_ID_CONFLICT:
1448*4882a593Smuzhiyun 		status = "Volume disabled due to SCSI ID conflict";
1449*4882a593Smuzhiyun 		break;
1450*4882a593Smuzhiyun 	case CISS_LV_EJECTED:
1451*4882a593Smuzhiyun 		status = "Volume has been ejected";
1452*4882a593Smuzhiyun 		break;
1453*4882a593Smuzhiyun 	case CISS_LV_UNDERGOING_ERASE:
1454*4882a593Smuzhiyun 		status = "Volume undergoing background erase";
1455*4882a593Smuzhiyun 		break;
1456*4882a593Smuzhiyun 	case CISS_LV_READY_FOR_PREDICTIVE_SPARE_REBUILD:
1457*4882a593Smuzhiyun 		status = "Volume ready for predictive spare rebuild";
1458*4882a593Smuzhiyun 		break;
1459*4882a593Smuzhiyun 	case CISS_LV_UNDERGOING_RPI:
1460*4882a593Smuzhiyun 		status = "Volume undergoing rapid parity initialization";
1461*4882a593Smuzhiyun 		break;
1462*4882a593Smuzhiyun 	case CISS_LV_PENDING_RPI:
1463*4882a593Smuzhiyun 		status = "Volume queued for rapid parity initialization";
1464*4882a593Smuzhiyun 		break;
1465*4882a593Smuzhiyun 	case CISS_LV_ENCRYPTED_NO_KEY:
1466*4882a593Smuzhiyun 		status = "Encrypted volume inaccessible - key not present";
1467*4882a593Smuzhiyun 		break;
1468*4882a593Smuzhiyun 	case CISS_LV_UNDERGOING_ENCRYPTION:
1469*4882a593Smuzhiyun 		status = "Volume undergoing encryption process";
1470*4882a593Smuzhiyun 		break;
1471*4882a593Smuzhiyun 	case CISS_LV_UNDERGOING_ENCRYPTION_REKEYING:
1472*4882a593Smuzhiyun 		status = "Volume undergoing encryption re-keying process";
1473*4882a593Smuzhiyun 		break;
1474*4882a593Smuzhiyun 	case CISS_LV_ENCRYPTED_IN_NON_ENCRYPTED_CONTROLLER:
1475*4882a593Smuzhiyun 		status = "Volume encrypted but encryption is disabled";
1476*4882a593Smuzhiyun 		break;
1477*4882a593Smuzhiyun 	case CISS_LV_PENDING_ENCRYPTION:
1478*4882a593Smuzhiyun 		status = "Volume pending migration to encrypted state";
1479*4882a593Smuzhiyun 		break;
1480*4882a593Smuzhiyun 	case CISS_LV_PENDING_ENCRYPTION_REKEYING:
1481*4882a593Smuzhiyun 		status = "Volume pending encryption rekeying";
1482*4882a593Smuzhiyun 		break;
1483*4882a593Smuzhiyun 	case CISS_LV_NOT_SUPPORTED:
1484*4882a593Smuzhiyun 		status = "Volume not supported on this controller";
1485*4882a593Smuzhiyun 		break;
1486*4882a593Smuzhiyun 	case CISS_LV_STATUS_UNAVAILABLE:
1487*4882a593Smuzhiyun 		status = "Volume status not available";
1488*4882a593Smuzhiyun 		break;
1489*4882a593Smuzhiyun 	default:
1490*4882a593Smuzhiyun 		snprintf(unknown_state_buffer, sizeof(unknown_state_buffer),
1491*4882a593Smuzhiyun 			unknown_state_str, device->volume_status);
1492*4882a593Smuzhiyun 		status = unknown_state_buffer;
1493*4882a593Smuzhiyun 		break;
1494*4882a593Smuzhiyun 	}
1495*4882a593Smuzhiyun 
1496*4882a593Smuzhiyun 	dev_info(&ctrl_info->pci_dev->dev,
1497*4882a593Smuzhiyun 		"scsi %d:%d:%d:%d %s\n",
1498*4882a593Smuzhiyun 		ctrl_info->scsi_host->host_no,
1499*4882a593Smuzhiyun 		device->bus, device->target, device->lun, status);
1500*4882a593Smuzhiyun }
1501*4882a593Smuzhiyun 
pqi_rescan_worker(struct work_struct * work)1502*4882a593Smuzhiyun static void pqi_rescan_worker(struct work_struct *work)
1503*4882a593Smuzhiyun {
1504*4882a593Smuzhiyun 	struct pqi_ctrl_info *ctrl_info;
1505*4882a593Smuzhiyun 
1506*4882a593Smuzhiyun 	ctrl_info = container_of(to_delayed_work(work), struct pqi_ctrl_info,
1507*4882a593Smuzhiyun 		rescan_work);
1508*4882a593Smuzhiyun 
1509*4882a593Smuzhiyun 	pqi_scan_scsi_devices(ctrl_info);
1510*4882a593Smuzhiyun }
1511*4882a593Smuzhiyun 
pqi_add_device(struct pqi_ctrl_info * ctrl_info,struct pqi_scsi_dev * device)1512*4882a593Smuzhiyun static int pqi_add_device(struct pqi_ctrl_info *ctrl_info,
1513*4882a593Smuzhiyun 	struct pqi_scsi_dev *device)
1514*4882a593Smuzhiyun {
1515*4882a593Smuzhiyun 	int rc;
1516*4882a593Smuzhiyun 
1517*4882a593Smuzhiyun 	if (pqi_is_logical_device(device))
1518*4882a593Smuzhiyun 		rc = scsi_add_device(ctrl_info->scsi_host, device->bus,
1519*4882a593Smuzhiyun 			device->target, device->lun);
1520*4882a593Smuzhiyun 	else
1521*4882a593Smuzhiyun 		rc = pqi_add_sas_device(ctrl_info->sas_host, device);
1522*4882a593Smuzhiyun 
1523*4882a593Smuzhiyun 	return rc;
1524*4882a593Smuzhiyun }
1525*4882a593Smuzhiyun 
1526*4882a593Smuzhiyun #define PQI_PENDING_IO_TIMEOUT_SECS	20
1527*4882a593Smuzhiyun 
pqi_remove_device(struct pqi_ctrl_info * ctrl_info,struct pqi_scsi_dev * device)1528*4882a593Smuzhiyun static inline void pqi_remove_device(struct pqi_ctrl_info *ctrl_info,
1529*4882a593Smuzhiyun 	struct pqi_scsi_dev *device)
1530*4882a593Smuzhiyun {
1531*4882a593Smuzhiyun 	int rc;
1532*4882a593Smuzhiyun 
1533*4882a593Smuzhiyun 	pqi_device_remove_start(device);
1534*4882a593Smuzhiyun 
1535*4882a593Smuzhiyun 	rc = pqi_device_wait_for_pending_io(ctrl_info, device, PQI_PENDING_IO_TIMEOUT_SECS);
1536*4882a593Smuzhiyun 	if (rc)
1537*4882a593Smuzhiyun 		dev_err(&ctrl_info->pci_dev->dev,
1538*4882a593Smuzhiyun 			"scsi %d:%d:%d:%d removing device with %d outstanding command(s)\n",
1539*4882a593Smuzhiyun 			ctrl_info->scsi_host->host_no, device->bus,
1540*4882a593Smuzhiyun 			device->target, device->lun,
1541*4882a593Smuzhiyun 			atomic_read(&device->scsi_cmds_outstanding));
1542*4882a593Smuzhiyun 
1543*4882a593Smuzhiyun 	if (pqi_is_logical_device(device))
1544*4882a593Smuzhiyun 		scsi_remove_device(device->sdev);
1545*4882a593Smuzhiyun 	else
1546*4882a593Smuzhiyun 		pqi_remove_sas_device(device);
1547*4882a593Smuzhiyun }
1548*4882a593Smuzhiyun 
1549*4882a593Smuzhiyun /* Assumes the SCSI device list lock is held. */
1550*4882a593Smuzhiyun 
pqi_find_scsi_dev(struct pqi_ctrl_info * ctrl_info,int bus,int target,int lun)1551*4882a593Smuzhiyun static struct pqi_scsi_dev *pqi_find_scsi_dev(struct pqi_ctrl_info *ctrl_info,
1552*4882a593Smuzhiyun 	int bus, int target, int lun)
1553*4882a593Smuzhiyun {
1554*4882a593Smuzhiyun 	struct pqi_scsi_dev *device;
1555*4882a593Smuzhiyun 
1556*4882a593Smuzhiyun 	list_for_each_entry(device, &ctrl_info->scsi_device_list, scsi_device_list_entry)
1557*4882a593Smuzhiyun 		if (device->bus == bus && device->target == target && device->lun == lun)
1558*4882a593Smuzhiyun 			return device;
1559*4882a593Smuzhiyun 
1560*4882a593Smuzhiyun 	return NULL;
1561*4882a593Smuzhiyun }
1562*4882a593Smuzhiyun 
pqi_device_equal(struct pqi_scsi_dev * dev1,struct pqi_scsi_dev * dev2)1563*4882a593Smuzhiyun static inline bool pqi_device_equal(struct pqi_scsi_dev *dev1,
1564*4882a593Smuzhiyun 	struct pqi_scsi_dev *dev2)
1565*4882a593Smuzhiyun {
1566*4882a593Smuzhiyun 	if (dev1->is_physical_device != dev2->is_physical_device)
1567*4882a593Smuzhiyun 		return false;
1568*4882a593Smuzhiyun 
1569*4882a593Smuzhiyun 	if (dev1->is_physical_device)
1570*4882a593Smuzhiyun 		return dev1->wwid == dev2->wwid;
1571*4882a593Smuzhiyun 
1572*4882a593Smuzhiyun 	return memcmp(dev1->volume_id, dev2->volume_id,
1573*4882a593Smuzhiyun 		sizeof(dev1->volume_id)) == 0;
1574*4882a593Smuzhiyun }
1575*4882a593Smuzhiyun 
1576*4882a593Smuzhiyun enum pqi_find_result {
1577*4882a593Smuzhiyun 	DEVICE_NOT_FOUND,
1578*4882a593Smuzhiyun 	DEVICE_CHANGED,
1579*4882a593Smuzhiyun 	DEVICE_SAME,
1580*4882a593Smuzhiyun };
1581*4882a593Smuzhiyun 
pqi_scsi_find_entry(struct pqi_ctrl_info * ctrl_info,struct pqi_scsi_dev * device_to_find,struct pqi_scsi_dev ** matching_device)1582*4882a593Smuzhiyun static enum pqi_find_result pqi_scsi_find_entry(struct pqi_ctrl_info *ctrl_info,
1583*4882a593Smuzhiyun 	struct pqi_scsi_dev *device_to_find, struct pqi_scsi_dev **matching_device)
1584*4882a593Smuzhiyun {
1585*4882a593Smuzhiyun 	struct pqi_scsi_dev *device;
1586*4882a593Smuzhiyun 
1587*4882a593Smuzhiyun 	list_for_each_entry(device, &ctrl_info->scsi_device_list, scsi_device_list_entry) {
1588*4882a593Smuzhiyun 		if (pqi_scsi3addr_equal(device_to_find->scsi3addr, device->scsi3addr)) {
1589*4882a593Smuzhiyun 			*matching_device = device;
1590*4882a593Smuzhiyun 			if (pqi_device_equal(device_to_find, device)) {
1591*4882a593Smuzhiyun 				if (device_to_find->volume_offline)
1592*4882a593Smuzhiyun 					return DEVICE_CHANGED;
1593*4882a593Smuzhiyun 				return DEVICE_SAME;
1594*4882a593Smuzhiyun 			}
1595*4882a593Smuzhiyun 			return DEVICE_CHANGED;
1596*4882a593Smuzhiyun 		}
1597*4882a593Smuzhiyun 	}
1598*4882a593Smuzhiyun 
1599*4882a593Smuzhiyun 	return DEVICE_NOT_FOUND;
1600*4882a593Smuzhiyun }
1601*4882a593Smuzhiyun 
pqi_device_type(struct pqi_scsi_dev * device)1602*4882a593Smuzhiyun static inline const char *pqi_device_type(struct pqi_scsi_dev *device)
1603*4882a593Smuzhiyun {
1604*4882a593Smuzhiyun 	if (device->is_expander_smp_device)
1605*4882a593Smuzhiyun 		return "Enclosure SMP    ";
1606*4882a593Smuzhiyun 
1607*4882a593Smuzhiyun 	return scsi_device_type(device->devtype);
1608*4882a593Smuzhiyun }
1609*4882a593Smuzhiyun 
1610*4882a593Smuzhiyun #define PQI_DEV_INFO_BUFFER_LENGTH	128
1611*4882a593Smuzhiyun 
pqi_dev_info(struct pqi_ctrl_info * ctrl_info,char * action,struct pqi_scsi_dev * device)1612*4882a593Smuzhiyun static void pqi_dev_info(struct pqi_ctrl_info *ctrl_info,
1613*4882a593Smuzhiyun 	char *action, struct pqi_scsi_dev *device)
1614*4882a593Smuzhiyun {
1615*4882a593Smuzhiyun 	ssize_t count;
1616*4882a593Smuzhiyun 	char buffer[PQI_DEV_INFO_BUFFER_LENGTH];
1617*4882a593Smuzhiyun 
1618*4882a593Smuzhiyun 	count = snprintf(buffer, PQI_DEV_INFO_BUFFER_LENGTH,
1619*4882a593Smuzhiyun 		"%d:%d:", ctrl_info->scsi_host->host_no, device->bus);
1620*4882a593Smuzhiyun 
1621*4882a593Smuzhiyun 	if (device->target_lun_valid)
1622*4882a593Smuzhiyun 		count += scnprintf(buffer + count,
1623*4882a593Smuzhiyun 			PQI_DEV_INFO_BUFFER_LENGTH - count,
1624*4882a593Smuzhiyun 			"%d:%d",
1625*4882a593Smuzhiyun 			device->target,
1626*4882a593Smuzhiyun 			device->lun);
1627*4882a593Smuzhiyun 	else
1628*4882a593Smuzhiyun 		count += scnprintf(buffer + count,
1629*4882a593Smuzhiyun 			PQI_DEV_INFO_BUFFER_LENGTH - count,
1630*4882a593Smuzhiyun 			"-:-");
1631*4882a593Smuzhiyun 
1632*4882a593Smuzhiyun 	if (pqi_is_logical_device(device))
1633*4882a593Smuzhiyun 		count += scnprintf(buffer + count,
1634*4882a593Smuzhiyun 			PQI_DEV_INFO_BUFFER_LENGTH - count,
1635*4882a593Smuzhiyun 			" %08x%08x",
1636*4882a593Smuzhiyun 			*((u32 *)&device->scsi3addr),
1637*4882a593Smuzhiyun 			*((u32 *)&device->scsi3addr[4]));
1638*4882a593Smuzhiyun 	else
1639*4882a593Smuzhiyun 		count += scnprintf(buffer + count,
1640*4882a593Smuzhiyun 			PQI_DEV_INFO_BUFFER_LENGTH - count,
1641*4882a593Smuzhiyun 			" %016llx", device->sas_address);
1642*4882a593Smuzhiyun 
1643*4882a593Smuzhiyun 	count += scnprintf(buffer + count, PQI_DEV_INFO_BUFFER_LENGTH - count,
1644*4882a593Smuzhiyun 		" %s %.8s %.16s ",
1645*4882a593Smuzhiyun 		pqi_device_type(device),
1646*4882a593Smuzhiyun 		device->vendor,
1647*4882a593Smuzhiyun 		device->model);
1648*4882a593Smuzhiyun 
1649*4882a593Smuzhiyun 	if (pqi_is_logical_device(device)) {
1650*4882a593Smuzhiyun 		if (device->devtype == TYPE_DISK)
1651*4882a593Smuzhiyun 			count += scnprintf(buffer + count,
1652*4882a593Smuzhiyun 				PQI_DEV_INFO_BUFFER_LENGTH - count,
1653*4882a593Smuzhiyun 				"SSDSmartPathCap%c En%c %-12s",
1654*4882a593Smuzhiyun 				device->raid_bypass_configured ? '+' : '-',
1655*4882a593Smuzhiyun 				device->raid_bypass_enabled ? '+' : '-',
1656*4882a593Smuzhiyun 				pqi_raid_level_to_string(device->raid_level));
1657*4882a593Smuzhiyun 	} else {
1658*4882a593Smuzhiyun 		count += scnprintf(buffer + count,
1659*4882a593Smuzhiyun 			PQI_DEV_INFO_BUFFER_LENGTH - count,
1660*4882a593Smuzhiyun 			"AIO%c", device->aio_enabled ? '+' : '-');
1661*4882a593Smuzhiyun 		if (device->devtype == TYPE_DISK ||
1662*4882a593Smuzhiyun 			device->devtype == TYPE_ZBC)
1663*4882a593Smuzhiyun 			count += scnprintf(buffer + count,
1664*4882a593Smuzhiyun 				PQI_DEV_INFO_BUFFER_LENGTH - count,
1665*4882a593Smuzhiyun 				" qd=%-6d", device->queue_depth);
1666*4882a593Smuzhiyun 	}
1667*4882a593Smuzhiyun 
1668*4882a593Smuzhiyun 	dev_info(&ctrl_info->pci_dev->dev, "%s %s\n", action, buffer);
1669*4882a593Smuzhiyun }
1670*4882a593Smuzhiyun 
1671*4882a593Smuzhiyun /* Assumes the SCSI device list lock is held. */
1672*4882a593Smuzhiyun 
pqi_scsi_update_device(struct pqi_scsi_dev * existing_device,struct pqi_scsi_dev * new_device)1673*4882a593Smuzhiyun static void pqi_scsi_update_device(struct pqi_scsi_dev *existing_device,
1674*4882a593Smuzhiyun 	struct pqi_scsi_dev *new_device)
1675*4882a593Smuzhiyun {
1676*4882a593Smuzhiyun 	existing_device->devtype = new_device->devtype;
1677*4882a593Smuzhiyun 	existing_device->device_type = new_device->device_type;
1678*4882a593Smuzhiyun 	existing_device->bus = new_device->bus;
1679*4882a593Smuzhiyun 	if (new_device->target_lun_valid) {
1680*4882a593Smuzhiyun 		existing_device->target = new_device->target;
1681*4882a593Smuzhiyun 		existing_device->lun = new_device->lun;
1682*4882a593Smuzhiyun 		existing_device->target_lun_valid = true;
1683*4882a593Smuzhiyun 	}
1684*4882a593Smuzhiyun 
1685*4882a593Smuzhiyun 	if ((existing_device->volume_status == CISS_LV_QUEUED_FOR_EXPANSION ||
1686*4882a593Smuzhiyun 		existing_device->volume_status == CISS_LV_UNDERGOING_EXPANSION) &&
1687*4882a593Smuzhiyun 		new_device->volume_status == CISS_LV_OK)
1688*4882a593Smuzhiyun 		existing_device->rescan = true;
1689*4882a593Smuzhiyun 
1690*4882a593Smuzhiyun 	/* By definition, the scsi3addr and wwid fields are already the same. */
1691*4882a593Smuzhiyun 
1692*4882a593Smuzhiyun 	existing_device->is_physical_device = new_device->is_physical_device;
1693*4882a593Smuzhiyun 	existing_device->is_external_raid_device =
1694*4882a593Smuzhiyun 		new_device->is_external_raid_device;
1695*4882a593Smuzhiyun 	existing_device->is_expander_smp_device =
1696*4882a593Smuzhiyun 		new_device->is_expander_smp_device;
1697*4882a593Smuzhiyun 	existing_device->aio_enabled = new_device->aio_enabled;
1698*4882a593Smuzhiyun 	memcpy(existing_device->vendor, new_device->vendor,
1699*4882a593Smuzhiyun 		sizeof(existing_device->vendor));
1700*4882a593Smuzhiyun 	memcpy(existing_device->model, new_device->model,
1701*4882a593Smuzhiyun 		sizeof(existing_device->model));
1702*4882a593Smuzhiyun 	existing_device->sas_address = new_device->sas_address;
1703*4882a593Smuzhiyun 	existing_device->raid_level = new_device->raid_level;
1704*4882a593Smuzhiyun 	existing_device->queue_depth = new_device->queue_depth;
1705*4882a593Smuzhiyun 	existing_device->aio_handle = new_device->aio_handle;
1706*4882a593Smuzhiyun 	existing_device->volume_status = new_device->volume_status;
1707*4882a593Smuzhiyun 	existing_device->active_path_index = new_device->active_path_index;
1708*4882a593Smuzhiyun 	existing_device->path_map = new_device->path_map;
1709*4882a593Smuzhiyun 	existing_device->bay = new_device->bay;
1710*4882a593Smuzhiyun 	existing_device->box_index = new_device->box_index;
1711*4882a593Smuzhiyun 	existing_device->phys_box_on_bus = new_device->phys_box_on_bus;
1712*4882a593Smuzhiyun 	existing_device->phy_connected_dev_type =
1713*4882a593Smuzhiyun 		new_device->phy_connected_dev_type;
1714*4882a593Smuzhiyun 	memcpy(existing_device->box, new_device->box,
1715*4882a593Smuzhiyun 		sizeof(existing_device->box));
1716*4882a593Smuzhiyun 	memcpy(existing_device->phys_connector, new_device->phys_connector,
1717*4882a593Smuzhiyun 		sizeof(existing_device->phys_connector));
1718*4882a593Smuzhiyun 	existing_device->offload_to_mirror = 0;
1719*4882a593Smuzhiyun 	kfree(existing_device->raid_map);
1720*4882a593Smuzhiyun 	existing_device->raid_map = new_device->raid_map;
1721*4882a593Smuzhiyun 	existing_device->raid_bypass_configured =
1722*4882a593Smuzhiyun 		new_device->raid_bypass_configured;
1723*4882a593Smuzhiyun 	existing_device->raid_bypass_enabled =
1724*4882a593Smuzhiyun 		new_device->raid_bypass_enabled;
1725*4882a593Smuzhiyun 	existing_device->device_offline = false;
1726*4882a593Smuzhiyun 
1727*4882a593Smuzhiyun 	/* To prevent this from being freed later. */
1728*4882a593Smuzhiyun 	new_device->raid_map = NULL;
1729*4882a593Smuzhiyun }
1730*4882a593Smuzhiyun 
pqi_free_device(struct pqi_scsi_dev * device)1731*4882a593Smuzhiyun static inline void pqi_free_device(struct pqi_scsi_dev *device)
1732*4882a593Smuzhiyun {
1733*4882a593Smuzhiyun 	if (device) {
1734*4882a593Smuzhiyun 		kfree(device->raid_map);
1735*4882a593Smuzhiyun 		kfree(device);
1736*4882a593Smuzhiyun 	}
1737*4882a593Smuzhiyun }
1738*4882a593Smuzhiyun 
1739*4882a593Smuzhiyun /*
1740*4882a593Smuzhiyun  * Called when exposing a new device to the OS fails in order to re-adjust
1741*4882a593Smuzhiyun  * our internal SCSI device list to match the SCSI ML's view.
1742*4882a593Smuzhiyun  */
1743*4882a593Smuzhiyun 
pqi_fixup_botched_add(struct pqi_ctrl_info * ctrl_info,struct pqi_scsi_dev * device)1744*4882a593Smuzhiyun static inline void pqi_fixup_botched_add(struct pqi_ctrl_info *ctrl_info,
1745*4882a593Smuzhiyun 	struct pqi_scsi_dev *device)
1746*4882a593Smuzhiyun {
1747*4882a593Smuzhiyun 	unsigned long flags;
1748*4882a593Smuzhiyun 
1749*4882a593Smuzhiyun 	spin_lock_irqsave(&ctrl_info->scsi_device_list_lock, flags);
1750*4882a593Smuzhiyun 	list_del(&device->scsi_device_list_entry);
1751*4882a593Smuzhiyun 	spin_unlock_irqrestore(&ctrl_info->scsi_device_list_lock, flags);
1752*4882a593Smuzhiyun 
1753*4882a593Smuzhiyun 	/* Allow the device structure to be freed later. */
1754*4882a593Smuzhiyun 	device->keep_device = false;
1755*4882a593Smuzhiyun }
1756*4882a593Smuzhiyun 
pqi_is_device_added(struct pqi_scsi_dev * device)1757*4882a593Smuzhiyun static inline bool pqi_is_device_added(struct pqi_scsi_dev *device)
1758*4882a593Smuzhiyun {
1759*4882a593Smuzhiyun 	if (device->is_expander_smp_device)
1760*4882a593Smuzhiyun 		return device->sas_port != NULL;
1761*4882a593Smuzhiyun 
1762*4882a593Smuzhiyun 	return device->sdev != NULL;
1763*4882a593Smuzhiyun }
1764*4882a593Smuzhiyun 
pqi_update_device_list(struct pqi_ctrl_info * ctrl_info,struct pqi_scsi_dev * new_device_list[],unsigned int num_new_devices)1765*4882a593Smuzhiyun static void pqi_update_device_list(struct pqi_ctrl_info *ctrl_info,
1766*4882a593Smuzhiyun 	struct pqi_scsi_dev *new_device_list[], unsigned int num_new_devices)
1767*4882a593Smuzhiyun {
1768*4882a593Smuzhiyun 	int rc;
1769*4882a593Smuzhiyun 	unsigned int i;
1770*4882a593Smuzhiyun 	unsigned long flags;
1771*4882a593Smuzhiyun 	enum pqi_find_result find_result;
1772*4882a593Smuzhiyun 	struct pqi_scsi_dev *device;
1773*4882a593Smuzhiyun 	struct pqi_scsi_dev *next;
1774*4882a593Smuzhiyun 	struct pqi_scsi_dev *matching_device;
1775*4882a593Smuzhiyun 	LIST_HEAD(add_list);
1776*4882a593Smuzhiyun 	LIST_HEAD(delete_list);
1777*4882a593Smuzhiyun 
1778*4882a593Smuzhiyun 	/*
1779*4882a593Smuzhiyun 	 * The idea here is to do as little work as possible while holding the
1780*4882a593Smuzhiyun 	 * spinlock.  That's why we go to great pains to defer anything other
1781*4882a593Smuzhiyun 	 * than updating the internal device list until after we release the
1782*4882a593Smuzhiyun 	 * spinlock.
1783*4882a593Smuzhiyun 	 */
1784*4882a593Smuzhiyun 
1785*4882a593Smuzhiyun 	spin_lock_irqsave(&ctrl_info->scsi_device_list_lock, flags);
1786*4882a593Smuzhiyun 
1787*4882a593Smuzhiyun 	/* Assume that all devices in the existing list have gone away. */
1788*4882a593Smuzhiyun 	list_for_each_entry(device, &ctrl_info->scsi_device_list, scsi_device_list_entry)
1789*4882a593Smuzhiyun 		device->device_gone = true;
1790*4882a593Smuzhiyun 
1791*4882a593Smuzhiyun 	for (i = 0; i < num_new_devices; i++) {
1792*4882a593Smuzhiyun 		device = new_device_list[i];
1793*4882a593Smuzhiyun 
1794*4882a593Smuzhiyun 		find_result = pqi_scsi_find_entry(ctrl_info, device,
1795*4882a593Smuzhiyun 			&matching_device);
1796*4882a593Smuzhiyun 
1797*4882a593Smuzhiyun 		switch (find_result) {
1798*4882a593Smuzhiyun 		case DEVICE_SAME:
1799*4882a593Smuzhiyun 			/*
1800*4882a593Smuzhiyun 			 * The newly found device is already in the existing
1801*4882a593Smuzhiyun 			 * device list.
1802*4882a593Smuzhiyun 			 */
1803*4882a593Smuzhiyun 			device->new_device = false;
1804*4882a593Smuzhiyun 			matching_device->device_gone = false;
1805*4882a593Smuzhiyun 			pqi_scsi_update_device(matching_device, device);
1806*4882a593Smuzhiyun 			break;
1807*4882a593Smuzhiyun 		case DEVICE_NOT_FOUND:
1808*4882a593Smuzhiyun 			/*
1809*4882a593Smuzhiyun 			 * The newly found device is NOT in the existing device
1810*4882a593Smuzhiyun 			 * list.
1811*4882a593Smuzhiyun 			 */
1812*4882a593Smuzhiyun 			device->new_device = true;
1813*4882a593Smuzhiyun 			break;
1814*4882a593Smuzhiyun 		case DEVICE_CHANGED:
1815*4882a593Smuzhiyun 			/*
1816*4882a593Smuzhiyun 			 * The original device has gone away and we need to add
1817*4882a593Smuzhiyun 			 * the new device.
1818*4882a593Smuzhiyun 			 */
1819*4882a593Smuzhiyun 			device->new_device = true;
1820*4882a593Smuzhiyun 			break;
1821*4882a593Smuzhiyun 		}
1822*4882a593Smuzhiyun 	}
1823*4882a593Smuzhiyun 
1824*4882a593Smuzhiyun 	/* Process all devices that have gone away. */
1825*4882a593Smuzhiyun 	list_for_each_entry_safe(device, next, &ctrl_info->scsi_device_list,
1826*4882a593Smuzhiyun 		scsi_device_list_entry) {
1827*4882a593Smuzhiyun 		if (device->device_gone) {
1828*4882a593Smuzhiyun 			list_del_init(&device->scsi_device_list_entry);
1829*4882a593Smuzhiyun 			list_add_tail(&device->delete_list_entry, &delete_list);
1830*4882a593Smuzhiyun 		}
1831*4882a593Smuzhiyun 	}
1832*4882a593Smuzhiyun 
1833*4882a593Smuzhiyun 	/* Process all new devices. */
1834*4882a593Smuzhiyun 	for (i = 0; i < num_new_devices; i++) {
1835*4882a593Smuzhiyun 		device = new_device_list[i];
1836*4882a593Smuzhiyun 		if (!device->new_device)
1837*4882a593Smuzhiyun 			continue;
1838*4882a593Smuzhiyun 		if (device->volume_offline)
1839*4882a593Smuzhiyun 			continue;
1840*4882a593Smuzhiyun 		list_add_tail(&device->scsi_device_list_entry,
1841*4882a593Smuzhiyun 			&ctrl_info->scsi_device_list);
1842*4882a593Smuzhiyun 		list_add_tail(&device->add_list_entry, &add_list);
1843*4882a593Smuzhiyun 		/* To prevent this device structure from being freed later. */
1844*4882a593Smuzhiyun 		device->keep_device = true;
1845*4882a593Smuzhiyun 	}
1846*4882a593Smuzhiyun 
1847*4882a593Smuzhiyun 	spin_unlock_irqrestore(&ctrl_info->scsi_device_list_lock, flags);
1848*4882a593Smuzhiyun 
1849*4882a593Smuzhiyun 	if (pqi_ctrl_in_ofa(ctrl_info))
1850*4882a593Smuzhiyun 		pqi_ctrl_ofa_done(ctrl_info);
1851*4882a593Smuzhiyun 
1852*4882a593Smuzhiyun 	/* Remove all devices that have gone away. */
1853*4882a593Smuzhiyun 	list_for_each_entry_safe(device, next, &delete_list, delete_list_entry) {
1854*4882a593Smuzhiyun 		if (device->volume_offline) {
1855*4882a593Smuzhiyun 			pqi_dev_info(ctrl_info, "offline", device);
1856*4882a593Smuzhiyun 			pqi_show_volume_status(ctrl_info, device);
1857*4882a593Smuzhiyun 		}
1858*4882a593Smuzhiyun 		list_del(&device->delete_list_entry);
1859*4882a593Smuzhiyun 		if (pqi_is_device_added(device)) {
1860*4882a593Smuzhiyun 			pqi_remove_device(ctrl_info, device);
1861*4882a593Smuzhiyun 		} else {
1862*4882a593Smuzhiyun 			if (!device->volume_offline)
1863*4882a593Smuzhiyun 				pqi_dev_info(ctrl_info, "removed", device);
1864*4882a593Smuzhiyun 			pqi_free_device(device);
1865*4882a593Smuzhiyun 		}
1866*4882a593Smuzhiyun 	}
1867*4882a593Smuzhiyun 
1868*4882a593Smuzhiyun 	/*
1869*4882a593Smuzhiyun 	 * Notify the SCSI ML if the queue depth of any existing device has
1870*4882a593Smuzhiyun 	 * changed.
1871*4882a593Smuzhiyun 	 */
1872*4882a593Smuzhiyun 	list_for_each_entry(device, &ctrl_info->scsi_device_list,
1873*4882a593Smuzhiyun 		scsi_device_list_entry) {
1874*4882a593Smuzhiyun 		if (device->sdev) {
1875*4882a593Smuzhiyun 			if (device->queue_depth !=
1876*4882a593Smuzhiyun 				device->advertised_queue_depth) {
1877*4882a593Smuzhiyun 				device->advertised_queue_depth = device->queue_depth;
1878*4882a593Smuzhiyun 				scsi_change_queue_depth(device->sdev,
1879*4882a593Smuzhiyun 					device->advertised_queue_depth);
1880*4882a593Smuzhiyun 			}
1881*4882a593Smuzhiyun 			if (device->rescan) {
1882*4882a593Smuzhiyun 				scsi_rescan_device(&device->sdev->sdev_gendev);
1883*4882a593Smuzhiyun 				device->rescan = false;
1884*4882a593Smuzhiyun 			}
1885*4882a593Smuzhiyun 		}
1886*4882a593Smuzhiyun 	}
1887*4882a593Smuzhiyun 
1888*4882a593Smuzhiyun 	/* Expose any new devices. */
1889*4882a593Smuzhiyun 	list_for_each_entry_safe(device, next, &add_list, add_list_entry) {
1890*4882a593Smuzhiyun 		if (!pqi_is_device_added(device)) {
1891*4882a593Smuzhiyun 			rc = pqi_add_device(ctrl_info, device);
1892*4882a593Smuzhiyun 			if (rc == 0) {
1893*4882a593Smuzhiyun 				pqi_dev_info(ctrl_info, "added", device);
1894*4882a593Smuzhiyun 			} else {
1895*4882a593Smuzhiyun 				dev_warn(&ctrl_info->pci_dev->dev,
1896*4882a593Smuzhiyun 					"scsi %d:%d:%d:%d addition failed, device not added\n",
1897*4882a593Smuzhiyun 					ctrl_info->scsi_host->host_no,
1898*4882a593Smuzhiyun 					device->bus, device->target,
1899*4882a593Smuzhiyun 					device->lun);
1900*4882a593Smuzhiyun 				pqi_fixup_botched_add(ctrl_info, device);
1901*4882a593Smuzhiyun 			}
1902*4882a593Smuzhiyun 		}
1903*4882a593Smuzhiyun 	}
1904*4882a593Smuzhiyun }
1905*4882a593Smuzhiyun 
pqi_is_supported_device(struct pqi_scsi_dev * device)1906*4882a593Smuzhiyun static inline bool pqi_is_supported_device(struct pqi_scsi_dev *device)
1907*4882a593Smuzhiyun {
1908*4882a593Smuzhiyun 	/*
1909*4882a593Smuzhiyun 	 * Only support the HBA controller itself as a RAID
1910*4882a593Smuzhiyun 	 * controller.  If it's a RAID controller other than
1911*4882a593Smuzhiyun 	 * the HBA itself (an external RAID controller, for
1912*4882a593Smuzhiyun 	 * example), we don't support it.
1913*4882a593Smuzhiyun 	 */
1914*4882a593Smuzhiyun 	if (device->device_type == SA_DEVICE_TYPE_CONTROLLER &&
1915*4882a593Smuzhiyun 		!pqi_is_hba_lunid(device->scsi3addr))
1916*4882a593Smuzhiyun 		return false;
1917*4882a593Smuzhiyun 
1918*4882a593Smuzhiyun 	return true;
1919*4882a593Smuzhiyun }
1920*4882a593Smuzhiyun 
pqi_skip_device(u8 * scsi3addr)1921*4882a593Smuzhiyun static inline bool pqi_skip_device(u8 *scsi3addr)
1922*4882a593Smuzhiyun {
1923*4882a593Smuzhiyun 	/* Ignore all masked devices. */
1924*4882a593Smuzhiyun 	if (MASKED_DEVICE(scsi3addr))
1925*4882a593Smuzhiyun 		return true;
1926*4882a593Smuzhiyun 
1927*4882a593Smuzhiyun 	return false;
1928*4882a593Smuzhiyun }
1929*4882a593Smuzhiyun 
pqi_mask_device(u8 * scsi3addr)1930*4882a593Smuzhiyun static inline void pqi_mask_device(u8 *scsi3addr)
1931*4882a593Smuzhiyun {
1932*4882a593Smuzhiyun 	scsi3addr[3] |= 0xc0;
1933*4882a593Smuzhiyun }
1934*4882a593Smuzhiyun 
pqi_is_device_with_sas_address(struct pqi_scsi_dev * device)1935*4882a593Smuzhiyun static inline bool pqi_is_device_with_sas_address(struct pqi_scsi_dev *device)
1936*4882a593Smuzhiyun {
1937*4882a593Smuzhiyun 	switch (device->device_type) {
1938*4882a593Smuzhiyun 	case SA_DEVICE_TYPE_SAS:
1939*4882a593Smuzhiyun 	case SA_DEVICE_TYPE_EXPANDER_SMP:
1940*4882a593Smuzhiyun 	case SA_DEVICE_TYPE_SES:
1941*4882a593Smuzhiyun 		return true;
1942*4882a593Smuzhiyun 	}
1943*4882a593Smuzhiyun 
1944*4882a593Smuzhiyun 	return false;
1945*4882a593Smuzhiyun }
1946*4882a593Smuzhiyun 
pqi_expose_device(struct pqi_scsi_dev * device)1947*4882a593Smuzhiyun static inline bool pqi_expose_device(struct pqi_scsi_dev *device)
1948*4882a593Smuzhiyun {
1949*4882a593Smuzhiyun 	return !device->is_physical_device ||
1950*4882a593Smuzhiyun 		!pqi_skip_device(device->scsi3addr);
1951*4882a593Smuzhiyun }
1952*4882a593Smuzhiyun 
pqi_update_scsi_devices(struct pqi_ctrl_info * ctrl_info)1953*4882a593Smuzhiyun static int pqi_update_scsi_devices(struct pqi_ctrl_info *ctrl_info)
1954*4882a593Smuzhiyun {
1955*4882a593Smuzhiyun 	int i;
1956*4882a593Smuzhiyun 	int rc;
1957*4882a593Smuzhiyun 	LIST_HEAD(new_device_list_head);
1958*4882a593Smuzhiyun 	struct report_phys_lun_extended *physdev_list = NULL;
1959*4882a593Smuzhiyun 	struct report_log_lun_extended *logdev_list = NULL;
1960*4882a593Smuzhiyun 	struct report_phys_lun_extended_entry *phys_lun_ext_entry;
1961*4882a593Smuzhiyun 	struct report_log_lun_extended_entry *log_lun_ext_entry;
1962*4882a593Smuzhiyun 	struct bmic_identify_physical_device *id_phys = NULL;
1963*4882a593Smuzhiyun 	u32 num_physicals;
1964*4882a593Smuzhiyun 	u32 num_logicals;
1965*4882a593Smuzhiyun 	struct pqi_scsi_dev **new_device_list = NULL;
1966*4882a593Smuzhiyun 	struct pqi_scsi_dev *device;
1967*4882a593Smuzhiyun 	struct pqi_scsi_dev *next;
1968*4882a593Smuzhiyun 	unsigned int num_new_devices;
1969*4882a593Smuzhiyun 	unsigned int num_valid_devices;
1970*4882a593Smuzhiyun 	bool is_physical_device;
1971*4882a593Smuzhiyun 	u8 *scsi3addr;
1972*4882a593Smuzhiyun 	unsigned int physical_index;
1973*4882a593Smuzhiyun 	unsigned int logical_index;
1974*4882a593Smuzhiyun 	static char *out_of_memory_msg =
1975*4882a593Smuzhiyun 		"failed to allocate memory, device discovery stopped";
1976*4882a593Smuzhiyun 
1977*4882a593Smuzhiyun 	rc = pqi_get_device_lists(ctrl_info, &physdev_list, &logdev_list);
1978*4882a593Smuzhiyun 	if (rc)
1979*4882a593Smuzhiyun 		goto out;
1980*4882a593Smuzhiyun 
1981*4882a593Smuzhiyun 	if (physdev_list)
1982*4882a593Smuzhiyun 		num_physicals =
1983*4882a593Smuzhiyun 			get_unaligned_be32(&physdev_list->header.list_length)
1984*4882a593Smuzhiyun 				/ sizeof(physdev_list->lun_entries[0]);
1985*4882a593Smuzhiyun 	else
1986*4882a593Smuzhiyun 		num_physicals = 0;
1987*4882a593Smuzhiyun 
1988*4882a593Smuzhiyun 	if (logdev_list)
1989*4882a593Smuzhiyun 		num_logicals =
1990*4882a593Smuzhiyun 			get_unaligned_be32(&logdev_list->header.list_length)
1991*4882a593Smuzhiyun 				/ sizeof(logdev_list->lun_entries[0]);
1992*4882a593Smuzhiyun 	else
1993*4882a593Smuzhiyun 		num_logicals = 0;
1994*4882a593Smuzhiyun 
1995*4882a593Smuzhiyun 	if (num_physicals) {
1996*4882a593Smuzhiyun 		/*
1997*4882a593Smuzhiyun 		 * We need this buffer for calls to pqi_get_physical_disk_info()
1998*4882a593Smuzhiyun 		 * below.  We allocate it here instead of inside
1999*4882a593Smuzhiyun 		 * pqi_get_physical_disk_info() because it's a fairly large
2000*4882a593Smuzhiyun 		 * buffer.
2001*4882a593Smuzhiyun 		 */
2002*4882a593Smuzhiyun 		id_phys = kmalloc(sizeof(*id_phys), GFP_KERNEL);
2003*4882a593Smuzhiyun 		if (!id_phys) {
2004*4882a593Smuzhiyun 			dev_warn(&ctrl_info->pci_dev->dev, "%s\n",
2005*4882a593Smuzhiyun 				out_of_memory_msg);
2006*4882a593Smuzhiyun 			rc = -ENOMEM;
2007*4882a593Smuzhiyun 			goto out;
2008*4882a593Smuzhiyun 		}
2009*4882a593Smuzhiyun 
2010*4882a593Smuzhiyun 		if (pqi_hide_vsep) {
2011*4882a593Smuzhiyun 			for (i = num_physicals - 1; i >= 0; i--) {
2012*4882a593Smuzhiyun 				phys_lun_ext_entry =
2013*4882a593Smuzhiyun 						&physdev_list->lun_entries[i];
2014*4882a593Smuzhiyun 				if (CISS_GET_DRIVE_NUMBER(
2015*4882a593Smuzhiyun 					phys_lun_ext_entry->lunid) ==
2016*4882a593Smuzhiyun 						PQI_VSEP_CISS_BTL) {
2017*4882a593Smuzhiyun 					pqi_mask_device(
2018*4882a593Smuzhiyun 						phys_lun_ext_entry->lunid);
2019*4882a593Smuzhiyun 					break;
2020*4882a593Smuzhiyun 				}
2021*4882a593Smuzhiyun 			}
2022*4882a593Smuzhiyun 		}
2023*4882a593Smuzhiyun 	}
2024*4882a593Smuzhiyun 
2025*4882a593Smuzhiyun 	num_new_devices = num_physicals + num_logicals;
2026*4882a593Smuzhiyun 
2027*4882a593Smuzhiyun 	new_device_list = kmalloc_array(num_new_devices,
2028*4882a593Smuzhiyun 					sizeof(*new_device_list),
2029*4882a593Smuzhiyun 					GFP_KERNEL);
2030*4882a593Smuzhiyun 	if (!new_device_list) {
2031*4882a593Smuzhiyun 		dev_warn(&ctrl_info->pci_dev->dev, "%s\n", out_of_memory_msg);
2032*4882a593Smuzhiyun 		rc = -ENOMEM;
2033*4882a593Smuzhiyun 		goto out;
2034*4882a593Smuzhiyun 	}
2035*4882a593Smuzhiyun 
2036*4882a593Smuzhiyun 	for (i = 0; i < num_new_devices; i++) {
2037*4882a593Smuzhiyun 		device = kzalloc(sizeof(*device), GFP_KERNEL);
2038*4882a593Smuzhiyun 		if (!device) {
2039*4882a593Smuzhiyun 			dev_warn(&ctrl_info->pci_dev->dev, "%s\n",
2040*4882a593Smuzhiyun 				out_of_memory_msg);
2041*4882a593Smuzhiyun 			rc = -ENOMEM;
2042*4882a593Smuzhiyun 			goto out;
2043*4882a593Smuzhiyun 		}
2044*4882a593Smuzhiyun 		list_add_tail(&device->new_device_list_entry,
2045*4882a593Smuzhiyun 			&new_device_list_head);
2046*4882a593Smuzhiyun 	}
2047*4882a593Smuzhiyun 
2048*4882a593Smuzhiyun 	device = NULL;
2049*4882a593Smuzhiyun 	num_valid_devices = 0;
2050*4882a593Smuzhiyun 	physical_index = 0;
2051*4882a593Smuzhiyun 	logical_index = 0;
2052*4882a593Smuzhiyun 
2053*4882a593Smuzhiyun 	for (i = 0; i < num_new_devices; i++) {
2054*4882a593Smuzhiyun 
2055*4882a593Smuzhiyun 		if ((!pqi_expose_ld_first && i < num_physicals) ||
2056*4882a593Smuzhiyun 			(pqi_expose_ld_first && i >= num_logicals)) {
2057*4882a593Smuzhiyun 			is_physical_device = true;
2058*4882a593Smuzhiyun 			phys_lun_ext_entry =
2059*4882a593Smuzhiyun 				&physdev_list->lun_entries[physical_index++];
2060*4882a593Smuzhiyun 			log_lun_ext_entry = NULL;
2061*4882a593Smuzhiyun 			scsi3addr = phys_lun_ext_entry->lunid;
2062*4882a593Smuzhiyun 		} else {
2063*4882a593Smuzhiyun 			is_physical_device = false;
2064*4882a593Smuzhiyun 			phys_lun_ext_entry = NULL;
2065*4882a593Smuzhiyun 			log_lun_ext_entry =
2066*4882a593Smuzhiyun 				&logdev_list->lun_entries[logical_index++];
2067*4882a593Smuzhiyun 			scsi3addr = log_lun_ext_entry->lunid;
2068*4882a593Smuzhiyun 		}
2069*4882a593Smuzhiyun 
2070*4882a593Smuzhiyun 		if (is_physical_device && pqi_skip_device(scsi3addr))
2071*4882a593Smuzhiyun 			continue;
2072*4882a593Smuzhiyun 
2073*4882a593Smuzhiyun 		if (device)
2074*4882a593Smuzhiyun 			device = list_next_entry(device, new_device_list_entry);
2075*4882a593Smuzhiyun 		else
2076*4882a593Smuzhiyun 			device = list_first_entry(&new_device_list_head,
2077*4882a593Smuzhiyun 				struct pqi_scsi_dev, new_device_list_entry);
2078*4882a593Smuzhiyun 
2079*4882a593Smuzhiyun 		memcpy(device->scsi3addr, scsi3addr, sizeof(device->scsi3addr));
2080*4882a593Smuzhiyun 		device->is_physical_device = is_physical_device;
2081*4882a593Smuzhiyun 		if (is_physical_device) {
2082*4882a593Smuzhiyun 			device->device_type = phys_lun_ext_entry->device_type;
2083*4882a593Smuzhiyun 			if (device->device_type == SA_DEVICE_TYPE_EXPANDER_SMP)
2084*4882a593Smuzhiyun 				device->is_expander_smp_device = true;
2085*4882a593Smuzhiyun 		} else {
2086*4882a593Smuzhiyun 			device->is_external_raid_device =
2087*4882a593Smuzhiyun 				pqi_is_external_raid_addr(scsi3addr);
2088*4882a593Smuzhiyun 		}
2089*4882a593Smuzhiyun 
2090*4882a593Smuzhiyun 		if (!pqi_is_supported_device(device))
2091*4882a593Smuzhiyun 			continue;
2092*4882a593Smuzhiyun 
2093*4882a593Smuzhiyun 		/* Gather information about the device. */
2094*4882a593Smuzhiyun 		rc = pqi_get_device_info(ctrl_info, device, id_phys);
2095*4882a593Smuzhiyun 		if (rc == -ENOMEM) {
2096*4882a593Smuzhiyun 			dev_warn(&ctrl_info->pci_dev->dev, "%s\n",
2097*4882a593Smuzhiyun 				out_of_memory_msg);
2098*4882a593Smuzhiyun 			goto out;
2099*4882a593Smuzhiyun 		}
2100*4882a593Smuzhiyun 		if (rc) {
2101*4882a593Smuzhiyun 			if (device->is_physical_device)
2102*4882a593Smuzhiyun 				dev_warn(&ctrl_info->pci_dev->dev,
2103*4882a593Smuzhiyun 					"obtaining device info failed, skipping physical device %016llx\n",
2104*4882a593Smuzhiyun 					get_unaligned_be64(
2105*4882a593Smuzhiyun 						&phys_lun_ext_entry->wwid));
2106*4882a593Smuzhiyun 			else
2107*4882a593Smuzhiyun 				dev_warn(&ctrl_info->pci_dev->dev,
2108*4882a593Smuzhiyun 					"obtaining device info failed, skipping logical device %08x%08x\n",
2109*4882a593Smuzhiyun 					*((u32 *)&device->scsi3addr),
2110*4882a593Smuzhiyun 					*((u32 *)&device->scsi3addr[4]));
2111*4882a593Smuzhiyun 			rc = 0;
2112*4882a593Smuzhiyun 			continue;
2113*4882a593Smuzhiyun 		}
2114*4882a593Smuzhiyun 
2115*4882a593Smuzhiyun 		pqi_assign_bus_target_lun(device);
2116*4882a593Smuzhiyun 
2117*4882a593Smuzhiyun 		if (device->is_physical_device) {
2118*4882a593Smuzhiyun 			device->wwid = phys_lun_ext_entry->wwid;
2119*4882a593Smuzhiyun 			if ((phys_lun_ext_entry->device_flags &
2120*4882a593Smuzhiyun 				CISS_REPORT_PHYS_DEV_FLAG_AIO_ENABLED) &&
2121*4882a593Smuzhiyun 				phys_lun_ext_entry->aio_handle) {
2122*4882a593Smuzhiyun 				device->aio_enabled = true;
2123*4882a593Smuzhiyun 				device->aio_handle =
2124*4882a593Smuzhiyun 					phys_lun_ext_entry->aio_handle;
2125*4882a593Smuzhiyun 			}
2126*4882a593Smuzhiyun 		} else {
2127*4882a593Smuzhiyun 			memcpy(device->volume_id, log_lun_ext_entry->volume_id,
2128*4882a593Smuzhiyun 				sizeof(device->volume_id));
2129*4882a593Smuzhiyun 		}
2130*4882a593Smuzhiyun 
2131*4882a593Smuzhiyun 		if (pqi_is_device_with_sas_address(device))
2132*4882a593Smuzhiyun 			device->sas_address = get_unaligned_be64(&device->wwid);
2133*4882a593Smuzhiyun 
2134*4882a593Smuzhiyun 		new_device_list[num_valid_devices++] = device;
2135*4882a593Smuzhiyun 	}
2136*4882a593Smuzhiyun 
2137*4882a593Smuzhiyun 	pqi_update_device_list(ctrl_info, new_device_list, num_valid_devices);
2138*4882a593Smuzhiyun 
2139*4882a593Smuzhiyun out:
2140*4882a593Smuzhiyun 	list_for_each_entry_safe(device, next, &new_device_list_head,
2141*4882a593Smuzhiyun 		new_device_list_entry) {
2142*4882a593Smuzhiyun 		if (device->keep_device)
2143*4882a593Smuzhiyun 			continue;
2144*4882a593Smuzhiyun 		list_del(&device->new_device_list_entry);
2145*4882a593Smuzhiyun 		pqi_free_device(device);
2146*4882a593Smuzhiyun 	}
2147*4882a593Smuzhiyun 
2148*4882a593Smuzhiyun 	kfree(new_device_list);
2149*4882a593Smuzhiyun 	kfree(physdev_list);
2150*4882a593Smuzhiyun 	kfree(logdev_list);
2151*4882a593Smuzhiyun 	kfree(id_phys);
2152*4882a593Smuzhiyun 
2153*4882a593Smuzhiyun 	return rc;
2154*4882a593Smuzhiyun }
2155*4882a593Smuzhiyun 
pqi_scan_scsi_devices(struct pqi_ctrl_info * ctrl_info)2156*4882a593Smuzhiyun static int pqi_scan_scsi_devices(struct pqi_ctrl_info *ctrl_info)
2157*4882a593Smuzhiyun {
2158*4882a593Smuzhiyun 	int rc = 0;
2159*4882a593Smuzhiyun 
2160*4882a593Smuzhiyun 	if (pqi_ctrl_offline(ctrl_info))
2161*4882a593Smuzhiyun 		return -ENXIO;
2162*4882a593Smuzhiyun 
2163*4882a593Smuzhiyun 	if (!mutex_trylock(&ctrl_info->scan_mutex)) {
2164*4882a593Smuzhiyun 		pqi_schedule_rescan_worker_delayed(ctrl_info);
2165*4882a593Smuzhiyun 		rc = -EINPROGRESS;
2166*4882a593Smuzhiyun 	} else {
2167*4882a593Smuzhiyun 		rc = pqi_update_scsi_devices(ctrl_info);
2168*4882a593Smuzhiyun 		if (rc)
2169*4882a593Smuzhiyun 			pqi_schedule_rescan_worker_delayed(ctrl_info);
2170*4882a593Smuzhiyun 		mutex_unlock(&ctrl_info->scan_mutex);
2171*4882a593Smuzhiyun 	}
2172*4882a593Smuzhiyun 
2173*4882a593Smuzhiyun 	return rc;
2174*4882a593Smuzhiyun }
2175*4882a593Smuzhiyun 
pqi_scan_start(struct Scsi_Host * shost)2176*4882a593Smuzhiyun static void pqi_scan_start(struct Scsi_Host *shost)
2177*4882a593Smuzhiyun {
2178*4882a593Smuzhiyun 	struct pqi_ctrl_info *ctrl_info;
2179*4882a593Smuzhiyun 
2180*4882a593Smuzhiyun 	ctrl_info = shost_to_hba(shost);
2181*4882a593Smuzhiyun 	if (pqi_ctrl_in_ofa(ctrl_info))
2182*4882a593Smuzhiyun 		return;
2183*4882a593Smuzhiyun 
2184*4882a593Smuzhiyun 	pqi_scan_scsi_devices(ctrl_info);
2185*4882a593Smuzhiyun }
2186*4882a593Smuzhiyun 
2187*4882a593Smuzhiyun /* Returns TRUE if scan is finished. */
2188*4882a593Smuzhiyun 
pqi_scan_finished(struct Scsi_Host * shost,unsigned long elapsed_time)2189*4882a593Smuzhiyun static int pqi_scan_finished(struct Scsi_Host *shost,
2190*4882a593Smuzhiyun 	unsigned long elapsed_time)
2191*4882a593Smuzhiyun {
2192*4882a593Smuzhiyun 	struct pqi_ctrl_info *ctrl_info;
2193*4882a593Smuzhiyun 
2194*4882a593Smuzhiyun 	ctrl_info = shost_priv(shost);
2195*4882a593Smuzhiyun 
2196*4882a593Smuzhiyun 	return !mutex_is_locked(&ctrl_info->scan_mutex);
2197*4882a593Smuzhiyun }
2198*4882a593Smuzhiyun 
pqi_wait_until_scan_finished(struct pqi_ctrl_info * ctrl_info)2199*4882a593Smuzhiyun static void pqi_wait_until_scan_finished(struct pqi_ctrl_info *ctrl_info)
2200*4882a593Smuzhiyun {
2201*4882a593Smuzhiyun 	mutex_lock(&ctrl_info->scan_mutex);
2202*4882a593Smuzhiyun 	mutex_unlock(&ctrl_info->scan_mutex);
2203*4882a593Smuzhiyun }
2204*4882a593Smuzhiyun 
pqi_wait_until_lun_reset_finished(struct pqi_ctrl_info * ctrl_info)2205*4882a593Smuzhiyun static void pqi_wait_until_lun_reset_finished(struct pqi_ctrl_info *ctrl_info)
2206*4882a593Smuzhiyun {
2207*4882a593Smuzhiyun 	mutex_lock(&ctrl_info->lun_reset_mutex);
2208*4882a593Smuzhiyun 	mutex_unlock(&ctrl_info->lun_reset_mutex);
2209*4882a593Smuzhiyun }
2210*4882a593Smuzhiyun 
pqi_wait_until_ofa_finished(struct pqi_ctrl_info * ctrl_info)2211*4882a593Smuzhiyun static void pqi_wait_until_ofa_finished(struct pqi_ctrl_info *ctrl_info)
2212*4882a593Smuzhiyun {
2213*4882a593Smuzhiyun 	mutex_lock(&ctrl_info->ofa_mutex);
2214*4882a593Smuzhiyun 	mutex_unlock(&ctrl_info->ofa_mutex);
2215*4882a593Smuzhiyun }
2216*4882a593Smuzhiyun 
pqi_set_encryption_info(struct pqi_encryption_info * encryption_info,struct raid_map * raid_map,u64 first_block)2217*4882a593Smuzhiyun static inline void pqi_set_encryption_info(
2218*4882a593Smuzhiyun 	struct pqi_encryption_info *encryption_info, struct raid_map *raid_map,
2219*4882a593Smuzhiyun 	u64 first_block)
2220*4882a593Smuzhiyun {
2221*4882a593Smuzhiyun 	u32 volume_blk_size;
2222*4882a593Smuzhiyun 
2223*4882a593Smuzhiyun 	/*
2224*4882a593Smuzhiyun 	 * Set the encryption tweak values based on logical block address.
2225*4882a593Smuzhiyun 	 * If the block size is 512, the tweak value is equal to the LBA.
2226*4882a593Smuzhiyun 	 * For other block sizes, tweak value is (LBA * block size) / 512.
2227*4882a593Smuzhiyun 	 */
2228*4882a593Smuzhiyun 	volume_blk_size = get_unaligned_le32(&raid_map->volume_blk_size);
2229*4882a593Smuzhiyun 	if (volume_blk_size != 512)
2230*4882a593Smuzhiyun 		first_block = (first_block * volume_blk_size) / 512;
2231*4882a593Smuzhiyun 
2232*4882a593Smuzhiyun 	encryption_info->data_encryption_key_index =
2233*4882a593Smuzhiyun 		get_unaligned_le16(&raid_map->data_encryption_key_index);
2234*4882a593Smuzhiyun 	encryption_info->encrypt_tweak_lower = lower_32_bits(first_block);
2235*4882a593Smuzhiyun 	encryption_info->encrypt_tweak_upper = upper_32_bits(first_block);
2236*4882a593Smuzhiyun }
2237*4882a593Smuzhiyun 
2238*4882a593Smuzhiyun /*
2239*4882a593Smuzhiyun  * Attempt to perform RAID bypass mapping for a logical volume I/O.
2240*4882a593Smuzhiyun  */
2241*4882a593Smuzhiyun 
2242*4882a593Smuzhiyun #define PQI_RAID_BYPASS_INELIGIBLE	1
2243*4882a593Smuzhiyun 
pqi_raid_bypass_submit_scsi_cmd(struct pqi_ctrl_info * ctrl_info,struct pqi_scsi_dev * device,struct scsi_cmnd * scmd,struct pqi_queue_group * queue_group)2244*4882a593Smuzhiyun static int pqi_raid_bypass_submit_scsi_cmd(struct pqi_ctrl_info *ctrl_info,
2245*4882a593Smuzhiyun 	struct pqi_scsi_dev *device, struct scsi_cmnd *scmd,
2246*4882a593Smuzhiyun 	struct pqi_queue_group *queue_group)
2247*4882a593Smuzhiyun {
2248*4882a593Smuzhiyun 	struct raid_map *raid_map;
2249*4882a593Smuzhiyun 	bool is_write = false;
2250*4882a593Smuzhiyun 	u32 map_index;
2251*4882a593Smuzhiyun 	u64 first_block;
2252*4882a593Smuzhiyun 	u64 last_block;
2253*4882a593Smuzhiyun 	u32 block_cnt;
2254*4882a593Smuzhiyun 	u32 blocks_per_row;
2255*4882a593Smuzhiyun 	u64 first_row;
2256*4882a593Smuzhiyun 	u64 last_row;
2257*4882a593Smuzhiyun 	u32 first_row_offset;
2258*4882a593Smuzhiyun 	u32 last_row_offset;
2259*4882a593Smuzhiyun 	u32 first_column;
2260*4882a593Smuzhiyun 	u32 last_column;
2261*4882a593Smuzhiyun 	u64 r0_first_row;
2262*4882a593Smuzhiyun 	u64 r0_last_row;
2263*4882a593Smuzhiyun 	u32 r5or6_blocks_per_row;
2264*4882a593Smuzhiyun 	u64 r5or6_first_row;
2265*4882a593Smuzhiyun 	u64 r5or6_last_row;
2266*4882a593Smuzhiyun 	u32 r5or6_first_row_offset;
2267*4882a593Smuzhiyun 	u32 r5or6_last_row_offset;
2268*4882a593Smuzhiyun 	u32 r5or6_first_column;
2269*4882a593Smuzhiyun 	u32 r5or6_last_column;
2270*4882a593Smuzhiyun 	u16 data_disks_per_row;
2271*4882a593Smuzhiyun 	u32 total_disks_per_row;
2272*4882a593Smuzhiyun 	u16 layout_map_count;
2273*4882a593Smuzhiyun 	u32 stripesize;
2274*4882a593Smuzhiyun 	u16 strip_size;
2275*4882a593Smuzhiyun 	u32 first_group;
2276*4882a593Smuzhiyun 	u32 last_group;
2277*4882a593Smuzhiyun 	u32 current_group;
2278*4882a593Smuzhiyun 	u32 map_row;
2279*4882a593Smuzhiyun 	u32 aio_handle;
2280*4882a593Smuzhiyun 	u64 disk_block;
2281*4882a593Smuzhiyun 	u32 disk_block_cnt;
2282*4882a593Smuzhiyun 	u8 cdb[16];
2283*4882a593Smuzhiyun 	u8 cdb_length;
2284*4882a593Smuzhiyun 	int offload_to_mirror;
2285*4882a593Smuzhiyun 	struct pqi_encryption_info *encryption_info_ptr;
2286*4882a593Smuzhiyun 	struct pqi_encryption_info encryption_info;
2287*4882a593Smuzhiyun #if BITS_PER_LONG == 32
2288*4882a593Smuzhiyun 	u64 tmpdiv;
2289*4882a593Smuzhiyun #endif
2290*4882a593Smuzhiyun 
2291*4882a593Smuzhiyun 	/* Check for valid opcode, get LBA and block count. */
2292*4882a593Smuzhiyun 	switch (scmd->cmnd[0]) {
2293*4882a593Smuzhiyun 	case WRITE_6:
2294*4882a593Smuzhiyun 		is_write = true;
2295*4882a593Smuzhiyun 		fallthrough;
2296*4882a593Smuzhiyun 	case READ_6:
2297*4882a593Smuzhiyun 		first_block = (u64)(((scmd->cmnd[1] & 0x1f) << 16) |
2298*4882a593Smuzhiyun 			(scmd->cmnd[2] << 8) | scmd->cmnd[3]);
2299*4882a593Smuzhiyun 		block_cnt = (u32)scmd->cmnd[4];
2300*4882a593Smuzhiyun 		if (block_cnt == 0)
2301*4882a593Smuzhiyun 			block_cnt = 256;
2302*4882a593Smuzhiyun 		break;
2303*4882a593Smuzhiyun 	case WRITE_10:
2304*4882a593Smuzhiyun 		is_write = true;
2305*4882a593Smuzhiyun 		fallthrough;
2306*4882a593Smuzhiyun 	case READ_10:
2307*4882a593Smuzhiyun 		first_block = (u64)get_unaligned_be32(&scmd->cmnd[2]);
2308*4882a593Smuzhiyun 		block_cnt = (u32)get_unaligned_be16(&scmd->cmnd[7]);
2309*4882a593Smuzhiyun 		break;
2310*4882a593Smuzhiyun 	case WRITE_12:
2311*4882a593Smuzhiyun 		is_write = true;
2312*4882a593Smuzhiyun 		fallthrough;
2313*4882a593Smuzhiyun 	case READ_12:
2314*4882a593Smuzhiyun 		first_block = (u64)get_unaligned_be32(&scmd->cmnd[2]);
2315*4882a593Smuzhiyun 		block_cnt = get_unaligned_be32(&scmd->cmnd[6]);
2316*4882a593Smuzhiyun 		break;
2317*4882a593Smuzhiyun 	case WRITE_16:
2318*4882a593Smuzhiyun 		is_write = true;
2319*4882a593Smuzhiyun 		fallthrough;
2320*4882a593Smuzhiyun 	case READ_16:
2321*4882a593Smuzhiyun 		first_block = get_unaligned_be64(&scmd->cmnd[2]);
2322*4882a593Smuzhiyun 		block_cnt = get_unaligned_be32(&scmd->cmnd[10]);
2323*4882a593Smuzhiyun 		break;
2324*4882a593Smuzhiyun 	default:
2325*4882a593Smuzhiyun 		/* Process via normal I/O path. */
2326*4882a593Smuzhiyun 		return PQI_RAID_BYPASS_INELIGIBLE;
2327*4882a593Smuzhiyun 	}
2328*4882a593Smuzhiyun 
2329*4882a593Smuzhiyun 	/* Check for write to non-RAID-0. */
2330*4882a593Smuzhiyun 	if (is_write && device->raid_level != SA_RAID_0)
2331*4882a593Smuzhiyun 		return PQI_RAID_BYPASS_INELIGIBLE;
2332*4882a593Smuzhiyun 
2333*4882a593Smuzhiyun 	if (unlikely(block_cnt == 0))
2334*4882a593Smuzhiyun 		return PQI_RAID_BYPASS_INELIGIBLE;
2335*4882a593Smuzhiyun 
2336*4882a593Smuzhiyun 	last_block = first_block + block_cnt - 1;
2337*4882a593Smuzhiyun 	raid_map = device->raid_map;
2338*4882a593Smuzhiyun 
2339*4882a593Smuzhiyun 	/* Check for invalid block or wraparound. */
2340*4882a593Smuzhiyun 	if (last_block >= get_unaligned_le64(&raid_map->volume_blk_cnt) ||
2341*4882a593Smuzhiyun 		last_block < first_block)
2342*4882a593Smuzhiyun 		return PQI_RAID_BYPASS_INELIGIBLE;
2343*4882a593Smuzhiyun 
2344*4882a593Smuzhiyun 	data_disks_per_row = get_unaligned_le16(&raid_map->data_disks_per_row);
2345*4882a593Smuzhiyun 	strip_size = get_unaligned_le16(&raid_map->strip_size);
2346*4882a593Smuzhiyun 	layout_map_count = get_unaligned_le16(&raid_map->layout_map_count);
2347*4882a593Smuzhiyun 
2348*4882a593Smuzhiyun 	/* Calculate stripe information for the request. */
2349*4882a593Smuzhiyun 	blocks_per_row = data_disks_per_row * strip_size;
2350*4882a593Smuzhiyun #if BITS_PER_LONG == 32
2351*4882a593Smuzhiyun 	tmpdiv = first_block;
2352*4882a593Smuzhiyun 	do_div(tmpdiv, blocks_per_row);
2353*4882a593Smuzhiyun 	first_row = tmpdiv;
2354*4882a593Smuzhiyun 	tmpdiv = last_block;
2355*4882a593Smuzhiyun 	do_div(tmpdiv, blocks_per_row);
2356*4882a593Smuzhiyun 	last_row = tmpdiv;
2357*4882a593Smuzhiyun 	first_row_offset = (u32)(first_block - (first_row * blocks_per_row));
2358*4882a593Smuzhiyun 	last_row_offset = (u32)(last_block - (last_row * blocks_per_row));
2359*4882a593Smuzhiyun 	tmpdiv = first_row_offset;
2360*4882a593Smuzhiyun 	do_div(tmpdiv, strip_size);
2361*4882a593Smuzhiyun 	first_column = tmpdiv;
2362*4882a593Smuzhiyun 	tmpdiv = last_row_offset;
2363*4882a593Smuzhiyun 	do_div(tmpdiv, strip_size);
2364*4882a593Smuzhiyun 	last_column = tmpdiv;
2365*4882a593Smuzhiyun #else
2366*4882a593Smuzhiyun 	first_row = first_block / blocks_per_row;
2367*4882a593Smuzhiyun 	last_row = last_block / blocks_per_row;
2368*4882a593Smuzhiyun 	first_row_offset = (u32)(first_block - (first_row * blocks_per_row));
2369*4882a593Smuzhiyun 	last_row_offset = (u32)(last_block - (last_row * blocks_per_row));
2370*4882a593Smuzhiyun 	first_column = first_row_offset / strip_size;
2371*4882a593Smuzhiyun 	last_column = last_row_offset / strip_size;
2372*4882a593Smuzhiyun #endif
2373*4882a593Smuzhiyun 
2374*4882a593Smuzhiyun 	/* If this isn't a single row/column then give to the controller. */
2375*4882a593Smuzhiyun 	if (first_row != last_row || first_column != last_column)
2376*4882a593Smuzhiyun 		return PQI_RAID_BYPASS_INELIGIBLE;
2377*4882a593Smuzhiyun 
2378*4882a593Smuzhiyun 	/* Proceeding with driver mapping. */
2379*4882a593Smuzhiyun 	total_disks_per_row = data_disks_per_row +
2380*4882a593Smuzhiyun 		get_unaligned_le16(&raid_map->metadata_disks_per_row);
2381*4882a593Smuzhiyun 	map_row = ((u32)(first_row >> raid_map->parity_rotation_shift)) %
2382*4882a593Smuzhiyun 		get_unaligned_le16(&raid_map->row_cnt);
2383*4882a593Smuzhiyun 	map_index = (map_row * total_disks_per_row) + first_column;
2384*4882a593Smuzhiyun 
2385*4882a593Smuzhiyun 	/* RAID 1 */
2386*4882a593Smuzhiyun 	if (device->raid_level == SA_RAID_1) {
2387*4882a593Smuzhiyun 		if (device->offload_to_mirror)
2388*4882a593Smuzhiyun 			map_index += data_disks_per_row;
2389*4882a593Smuzhiyun 		device->offload_to_mirror = !device->offload_to_mirror;
2390*4882a593Smuzhiyun 	} else if (device->raid_level == SA_RAID_ADM) {
2391*4882a593Smuzhiyun 		/* RAID ADM */
2392*4882a593Smuzhiyun 		/*
2393*4882a593Smuzhiyun 		 * Handles N-way mirrors  (R1-ADM) and R10 with # of drives
2394*4882a593Smuzhiyun 		 * divisible by 3.
2395*4882a593Smuzhiyun 		 */
2396*4882a593Smuzhiyun 		offload_to_mirror = device->offload_to_mirror;
2397*4882a593Smuzhiyun 		if (offload_to_mirror == 0)  {
2398*4882a593Smuzhiyun 			/* use physical disk in the first mirrored group. */
2399*4882a593Smuzhiyun 			map_index %= data_disks_per_row;
2400*4882a593Smuzhiyun 		} else {
2401*4882a593Smuzhiyun 			do {
2402*4882a593Smuzhiyun 				/*
2403*4882a593Smuzhiyun 				 * Determine mirror group that map_index
2404*4882a593Smuzhiyun 				 * indicates.
2405*4882a593Smuzhiyun 				 */
2406*4882a593Smuzhiyun 				current_group = map_index / data_disks_per_row;
2407*4882a593Smuzhiyun 
2408*4882a593Smuzhiyun 				if (offload_to_mirror != current_group) {
2409*4882a593Smuzhiyun 					if (current_group <
2410*4882a593Smuzhiyun 						layout_map_count - 1) {
2411*4882a593Smuzhiyun 						/*
2412*4882a593Smuzhiyun 						 * Select raid index from
2413*4882a593Smuzhiyun 						 * next group.
2414*4882a593Smuzhiyun 						 */
2415*4882a593Smuzhiyun 						map_index += data_disks_per_row;
2416*4882a593Smuzhiyun 						current_group++;
2417*4882a593Smuzhiyun 					} else {
2418*4882a593Smuzhiyun 						/*
2419*4882a593Smuzhiyun 						 * Select raid index from first
2420*4882a593Smuzhiyun 						 * group.
2421*4882a593Smuzhiyun 						 */
2422*4882a593Smuzhiyun 						map_index %= data_disks_per_row;
2423*4882a593Smuzhiyun 						current_group = 0;
2424*4882a593Smuzhiyun 					}
2425*4882a593Smuzhiyun 				}
2426*4882a593Smuzhiyun 			} while (offload_to_mirror != current_group);
2427*4882a593Smuzhiyun 		}
2428*4882a593Smuzhiyun 
2429*4882a593Smuzhiyun 		/* Set mirror group to use next time. */
2430*4882a593Smuzhiyun 		offload_to_mirror =
2431*4882a593Smuzhiyun 			(offload_to_mirror >= layout_map_count - 1) ?
2432*4882a593Smuzhiyun 				0 : offload_to_mirror + 1;
2433*4882a593Smuzhiyun 		device->offload_to_mirror = offload_to_mirror;
2434*4882a593Smuzhiyun 		/*
2435*4882a593Smuzhiyun 		 * Avoid direct use of device->offload_to_mirror within this
2436*4882a593Smuzhiyun 		 * function since multiple threads might simultaneously
2437*4882a593Smuzhiyun 		 * increment it beyond the range of device->layout_map_count -1.
2438*4882a593Smuzhiyun 		 */
2439*4882a593Smuzhiyun 	} else if ((device->raid_level == SA_RAID_5 ||
2440*4882a593Smuzhiyun 		device->raid_level == SA_RAID_6) && layout_map_count > 1) {
2441*4882a593Smuzhiyun 		/* RAID 50/60 */
2442*4882a593Smuzhiyun 		/* Verify first and last block are in same RAID group */
2443*4882a593Smuzhiyun 		r5or6_blocks_per_row = strip_size * data_disks_per_row;
2444*4882a593Smuzhiyun 		stripesize = r5or6_blocks_per_row * layout_map_count;
2445*4882a593Smuzhiyun #if BITS_PER_LONG == 32
2446*4882a593Smuzhiyun 		tmpdiv = first_block;
2447*4882a593Smuzhiyun 		first_group = do_div(tmpdiv, stripesize);
2448*4882a593Smuzhiyun 		tmpdiv = first_group;
2449*4882a593Smuzhiyun 		do_div(tmpdiv, r5or6_blocks_per_row);
2450*4882a593Smuzhiyun 		first_group = tmpdiv;
2451*4882a593Smuzhiyun 		tmpdiv = last_block;
2452*4882a593Smuzhiyun 		last_group = do_div(tmpdiv, stripesize);
2453*4882a593Smuzhiyun 		tmpdiv = last_group;
2454*4882a593Smuzhiyun 		do_div(tmpdiv, r5or6_blocks_per_row);
2455*4882a593Smuzhiyun 		last_group = tmpdiv;
2456*4882a593Smuzhiyun #else
2457*4882a593Smuzhiyun 		first_group = (first_block % stripesize) / r5or6_blocks_per_row;
2458*4882a593Smuzhiyun 		last_group = (last_block % stripesize) / r5or6_blocks_per_row;
2459*4882a593Smuzhiyun #endif
2460*4882a593Smuzhiyun 		if (first_group != last_group)
2461*4882a593Smuzhiyun 			return PQI_RAID_BYPASS_INELIGIBLE;
2462*4882a593Smuzhiyun 
2463*4882a593Smuzhiyun 		/* Verify request is in a single row of RAID 5/6 */
2464*4882a593Smuzhiyun #if BITS_PER_LONG == 32
2465*4882a593Smuzhiyun 		tmpdiv = first_block;
2466*4882a593Smuzhiyun 		do_div(tmpdiv, stripesize);
2467*4882a593Smuzhiyun 		first_row = r5or6_first_row = r0_first_row = tmpdiv;
2468*4882a593Smuzhiyun 		tmpdiv = last_block;
2469*4882a593Smuzhiyun 		do_div(tmpdiv, stripesize);
2470*4882a593Smuzhiyun 		r5or6_last_row = r0_last_row = tmpdiv;
2471*4882a593Smuzhiyun #else
2472*4882a593Smuzhiyun 		first_row = r5or6_first_row = r0_first_row =
2473*4882a593Smuzhiyun 			first_block / stripesize;
2474*4882a593Smuzhiyun 		r5or6_last_row = r0_last_row = last_block / stripesize;
2475*4882a593Smuzhiyun #endif
2476*4882a593Smuzhiyun 		if (r5or6_first_row != r5or6_last_row)
2477*4882a593Smuzhiyun 			return PQI_RAID_BYPASS_INELIGIBLE;
2478*4882a593Smuzhiyun 
2479*4882a593Smuzhiyun 		/* Verify request is in a single column */
2480*4882a593Smuzhiyun #if BITS_PER_LONG == 32
2481*4882a593Smuzhiyun 		tmpdiv = first_block;
2482*4882a593Smuzhiyun 		first_row_offset = do_div(tmpdiv, stripesize);
2483*4882a593Smuzhiyun 		tmpdiv = first_row_offset;
2484*4882a593Smuzhiyun 		first_row_offset = (u32)do_div(tmpdiv, r5or6_blocks_per_row);
2485*4882a593Smuzhiyun 		r5or6_first_row_offset = first_row_offset;
2486*4882a593Smuzhiyun 		tmpdiv = last_block;
2487*4882a593Smuzhiyun 		r5or6_last_row_offset = do_div(tmpdiv, stripesize);
2488*4882a593Smuzhiyun 		tmpdiv = r5or6_last_row_offset;
2489*4882a593Smuzhiyun 		r5or6_last_row_offset = do_div(tmpdiv, r5or6_blocks_per_row);
2490*4882a593Smuzhiyun 		tmpdiv = r5or6_first_row_offset;
2491*4882a593Smuzhiyun 		do_div(tmpdiv, strip_size);
2492*4882a593Smuzhiyun 		first_column = r5or6_first_column = tmpdiv;
2493*4882a593Smuzhiyun 		tmpdiv = r5or6_last_row_offset;
2494*4882a593Smuzhiyun 		do_div(tmpdiv, strip_size);
2495*4882a593Smuzhiyun 		r5or6_last_column = tmpdiv;
2496*4882a593Smuzhiyun #else
2497*4882a593Smuzhiyun 		first_row_offset = r5or6_first_row_offset =
2498*4882a593Smuzhiyun 			(u32)((first_block % stripesize) %
2499*4882a593Smuzhiyun 			r5or6_blocks_per_row);
2500*4882a593Smuzhiyun 
2501*4882a593Smuzhiyun 		r5or6_last_row_offset =
2502*4882a593Smuzhiyun 			(u32)((last_block % stripesize) %
2503*4882a593Smuzhiyun 			r5or6_blocks_per_row);
2504*4882a593Smuzhiyun 
2505*4882a593Smuzhiyun 		first_column = r5or6_first_row_offset / strip_size;
2506*4882a593Smuzhiyun 		r5or6_first_column = first_column;
2507*4882a593Smuzhiyun 		r5or6_last_column = r5or6_last_row_offset / strip_size;
2508*4882a593Smuzhiyun #endif
2509*4882a593Smuzhiyun 		if (r5or6_first_column != r5or6_last_column)
2510*4882a593Smuzhiyun 			return PQI_RAID_BYPASS_INELIGIBLE;
2511*4882a593Smuzhiyun 
2512*4882a593Smuzhiyun 		/* Request is eligible */
2513*4882a593Smuzhiyun 		map_row =
2514*4882a593Smuzhiyun 			((u32)(first_row >> raid_map->parity_rotation_shift)) %
2515*4882a593Smuzhiyun 			get_unaligned_le16(&raid_map->row_cnt);
2516*4882a593Smuzhiyun 
2517*4882a593Smuzhiyun 		map_index = (first_group *
2518*4882a593Smuzhiyun 			(get_unaligned_le16(&raid_map->row_cnt) *
2519*4882a593Smuzhiyun 			total_disks_per_row)) +
2520*4882a593Smuzhiyun 			(map_row * total_disks_per_row) + first_column;
2521*4882a593Smuzhiyun 	}
2522*4882a593Smuzhiyun 
2523*4882a593Smuzhiyun 	aio_handle = raid_map->disk_data[map_index].aio_handle;
2524*4882a593Smuzhiyun 	disk_block = get_unaligned_le64(&raid_map->disk_starting_blk) +
2525*4882a593Smuzhiyun 		first_row * strip_size +
2526*4882a593Smuzhiyun 		(first_row_offset - first_column * strip_size);
2527*4882a593Smuzhiyun 	disk_block_cnt = block_cnt;
2528*4882a593Smuzhiyun 
2529*4882a593Smuzhiyun 	/* Handle differing logical/physical block sizes. */
2530*4882a593Smuzhiyun 	if (raid_map->phys_blk_shift) {
2531*4882a593Smuzhiyun 		disk_block <<= raid_map->phys_blk_shift;
2532*4882a593Smuzhiyun 		disk_block_cnt <<= raid_map->phys_blk_shift;
2533*4882a593Smuzhiyun 	}
2534*4882a593Smuzhiyun 
2535*4882a593Smuzhiyun 	if (unlikely(disk_block_cnt > 0xffff))
2536*4882a593Smuzhiyun 		return PQI_RAID_BYPASS_INELIGIBLE;
2537*4882a593Smuzhiyun 
2538*4882a593Smuzhiyun 	/* Build the new CDB for the physical disk I/O. */
2539*4882a593Smuzhiyun 	if (disk_block > 0xffffffff) {
2540*4882a593Smuzhiyun 		cdb[0] = is_write ? WRITE_16 : READ_16;
2541*4882a593Smuzhiyun 		cdb[1] = 0;
2542*4882a593Smuzhiyun 		put_unaligned_be64(disk_block, &cdb[2]);
2543*4882a593Smuzhiyun 		put_unaligned_be32(disk_block_cnt, &cdb[10]);
2544*4882a593Smuzhiyun 		cdb[14] = 0;
2545*4882a593Smuzhiyun 		cdb[15] = 0;
2546*4882a593Smuzhiyun 		cdb_length = 16;
2547*4882a593Smuzhiyun 	} else {
2548*4882a593Smuzhiyun 		cdb[0] = is_write ? WRITE_10 : READ_10;
2549*4882a593Smuzhiyun 		cdb[1] = 0;
2550*4882a593Smuzhiyun 		put_unaligned_be32((u32)disk_block, &cdb[2]);
2551*4882a593Smuzhiyun 		cdb[6] = 0;
2552*4882a593Smuzhiyun 		put_unaligned_be16((u16)disk_block_cnt, &cdb[7]);
2553*4882a593Smuzhiyun 		cdb[9] = 0;
2554*4882a593Smuzhiyun 		cdb_length = 10;
2555*4882a593Smuzhiyun 	}
2556*4882a593Smuzhiyun 
2557*4882a593Smuzhiyun 	if (get_unaligned_le16(&raid_map->flags) &
2558*4882a593Smuzhiyun 		RAID_MAP_ENCRYPTION_ENABLED) {
2559*4882a593Smuzhiyun 		pqi_set_encryption_info(&encryption_info, raid_map,
2560*4882a593Smuzhiyun 			first_block);
2561*4882a593Smuzhiyun 		encryption_info_ptr = &encryption_info;
2562*4882a593Smuzhiyun 	} else {
2563*4882a593Smuzhiyun 		encryption_info_ptr = NULL;
2564*4882a593Smuzhiyun 	}
2565*4882a593Smuzhiyun 
2566*4882a593Smuzhiyun 	return pqi_aio_submit_io(ctrl_info, scmd, aio_handle,
2567*4882a593Smuzhiyun 		cdb, cdb_length, queue_group, encryption_info_ptr, true);
2568*4882a593Smuzhiyun }
2569*4882a593Smuzhiyun 
2570*4882a593Smuzhiyun #define PQI_STATUS_IDLE		0x0
2571*4882a593Smuzhiyun 
2572*4882a593Smuzhiyun #define PQI_CREATE_ADMIN_QUEUE_PAIR	1
2573*4882a593Smuzhiyun #define PQI_DELETE_ADMIN_QUEUE_PAIR	2
2574*4882a593Smuzhiyun 
2575*4882a593Smuzhiyun #define PQI_DEVICE_STATE_POWER_ON_AND_RESET		0x0
2576*4882a593Smuzhiyun #define PQI_DEVICE_STATE_STATUS_AVAILABLE		0x1
2577*4882a593Smuzhiyun #define PQI_DEVICE_STATE_ALL_REGISTERS_READY		0x2
2578*4882a593Smuzhiyun #define PQI_DEVICE_STATE_ADMIN_QUEUE_PAIR_READY		0x3
2579*4882a593Smuzhiyun #define PQI_DEVICE_STATE_ERROR				0x4
2580*4882a593Smuzhiyun 
2581*4882a593Smuzhiyun #define PQI_MODE_READY_TIMEOUT_SECS		30
2582*4882a593Smuzhiyun #define PQI_MODE_READY_POLL_INTERVAL_MSECS	1
2583*4882a593Smuzhiyun 
pqi_wait_for_pqi_mode_ready(struct pqi_ctrl_info * ctrl_info)2584*4882a593Smuzhiyun static int pqi_wait_for_pqi_mode_ready(struct pqi_ctrl_info *ctrl_info)
2585*4882a593Smuzhiyun {
2586*4882a593Smuzhiyun 	struct pqi_device_registers __iomem *pqi_registers;
2587*4882a593Smuzhiyun 	unsigned long timeout;
2588*4882a593Smuzhiyun 	u64 signature;
2589*4882a593Smuzhiyun 	u8 status;
2590*4882a593Smuzhiyun 
2591*4882a593Smuzhiyun 	pqi_registers = ctrl_info->pqi_registers;
2592*4882a593Smuzhiyun 	timeout = (PQI_MODE_READY_TIMEOUT_SECS * PQI_HZ) + jiffies;
2593*4882a593Smuzhiyun 
2594*4882a593Smuzhiyun 	while (1) {
2595*4882a593Smuzhiyun 		signature = readq(&pqi_registers->signature);
2596*4882a593Smuzhiyun 		if (memcmp(&signature, PQI_DEVICE_SIGNATURE,
2597*4882a593Smuzhiyun 			sizeof(signature)) == 0)
2598*4882a593Smuzhiyun 			break;
2599*4882a593Smuzhiyun 		if (time_after(jiffies, timeout)) {
2600*4882a593Smuzhiyun 			dev_err(&ctrl_info->pci_dev->dev,
2601*4882a593Smuzhiyun 				"timed out waiting for PQI signature\n");
2602*4882a593Smuzhiyun 			return -ETIMEDOUT;
2603*4882a593Smuzhiyun 		}
2604*4882a593Smuzhiyun 		msleep(PQI_MODE_READY_POLL_INTERVAL_MSECS);
2605*4882a593Smuzhiyun 	}
2606*4882a593Smuzhiyun 
2607*4882a593Smuzhiyun 	while (1) {
2608*4882a593Smuzhiyun 		status = readb(&pqi_registers->function_and_status_code);
2609*4882a593Smuzhiyun 		if (status == PQI_STATUS_IDLE)
2610*4882a593Smuzhiyun 			break;
2611*4882a593Smuzhiyun 		if (time_after(jiffies, timeout)) {
2612*4882a593Smuzhiyun 			dev_err(&ctrl_info->pci_dev->dev,
2613*4882a593Smuzhiyun 				"timed out waiting for PQI IDLE\n");
2614*4882a593Smuzhiyun 			return -ETIMEDOUT;
2615*4882a593Smuzhiyun 		}
2616*4882a593Smuzhiyun 		msleep(PQI_MODE_READY_POLL_INTERVAL_MSECS);
2617*4882a593Smuzhiyun 	}
2618*4882a593Smuzhiyun 
2619*4882a593Smuzhiyun 	while (1) {
2620*4882a593Smuzhiyun 		if (readl(&pqi_registers->device_status) ==
2621*4882a593Smuzhiyun 			PQI_DEVICE_STATE_ALL_REGISTERS_READY)
2622*4882a593Smuzhiyun 			break;
2623*4882a593Smuzhiyun 		if (time_after(jiffies, timeout)) {
2624*4882a593Smuzhiyun 			dev_err(&ctrl_info->pci_dev->dev,
2625*4882a593Smuzhiyun 				"timed out waiting for PQI all registers ready\n");
2626*4882a593Smuzhiyun 			return -ETIMEDOUT;
2627*4882a593Smuzhiyun 		}
2628*4882a593Smuzhiyun 		msleep(PQI_MODE_READY_POLL_INTERVAL_MSECS);
2629*4882a593Smuzhiyun 	}
2630*4882a593Smuzhiyun 
2631*4882a593Smuzhiyun 	return 0;
2632*4882a593Smuzhiyun }
2633*4882a593Smuzhiyun 
pqi_aio_path_disabled(struct pqi_io_request * io_request)2634*4882a593Smuzhiyun static inline void pqi_aio_path_disabled(struct pqi_io_request *io_request)
2635*4882a593Smuzhiyun {
2636*4882a593Smuzhiyun 	struct pqi_scsi_dev *device;
2637*4882a593Smuzhiyun 
2638*4882a593Smuzhiyun 	device = io_request->scmd->device->hostdata;
2639*4882a593Smuzhiyun 	device->raid_bypass_enabled = false;
2640*4882a593Smuzhiyun 	device->aio_enabled = false;
2641*4882a593Smuzhiyun }
2642*4882a593Smuzhiyun 
pqi_take_device_offline(struct scsi_device * sdev,char * path)2643*4882a593Smuzhiyun static inline void pqi_take_device_offline(struct scsi_device *sdev, char *path)
2644*4882a593Smuzhiyun {
2645*4882a593Smuzhiyun 	struct pqi_ctrl_info *ctrl_info;
2646*4882a593Smuzhiyun 	struct pqi_scsi_dev *device;
2647*4882a593Smuzhiyun 
2648*4882a593Smuzhiyun 	device = sdev->hostdata;
2649*4882a593Smuzhiyun 	if (device->device_offline)
2650*4882a593Smuzhiyun 		return;
2651*4882a593Smuzhiyun 
2652*4882a593Smuzhiyun 	device->device_offline = true;
2653*4882a593Smuzhiyun 	ctrl_info = shost_to_hba(sdev->host);
2654*4882a593Smuzhiyun 	pqi_schedule_rescan_worker(ctrl_info);
2655*4882a593Smuzhiyun 	dev_err(&ctrl_info->pci_dev->dev, "re-scanning %s scsi %d:%d:%d:%d\n",
2656*4882a593Smuzhiyun 		path, ctrl_info->scsi_host->host_no, device->bus,
2657*4882a593Smuzhiyun 		device->target, device->lun);
2658*4882a593Smuzhiyun }
2659*4882a593Smuzhiyun 
pqi_process_raid_io_error(struct pqi_io_request * io_request)2660*4882a593Smuzhiyun static void pqi_process_raid_io_error(struct pqi_io_request *io_request)
2661*4882a593Smuzhiyun {
2662*4882a593Smuzhiyun 	u8 scsi_status;
2663*4882a593Smuzhiyun 	u8 host_byte;
2664*4882a593Smuzhiyun 	struct scsi_cmnd *scmd;
2665*4882a593Smuzhiyun 	struct pqi_raid_error_info *error_info;
2666*4882a593Smuzhiyun 	size_t sense_data_length;
2667*4882a593Smuzhiyun 	int residual_count;
2668*4882a593Smuzhiyun 	int xfer_count;
2669*4882a593Smuzhiyun 	struct scsi_sense_hdr sshdr;
2670*4882a593Smuzhiyun 
2671*4882a593Smuzhiyun 	scmd = io_request->scmd;
2672*4882a593Smuzhiyun 	if (!scmd)
2673*4882a593Smuzhiyun 		return;
2674*4882a593Smuzhiyun 
2675*4882a593Smuzhiyun 	error_info = io_request->error_info;
2676*4882a593Smuzhiyun 	scsi_status = error_info->status;
2677*4882a593Smuzhiyun 	host_byte = DID_OK;
2678*4882a593Smuzhiyun 
2679*4882a593Smuzhiyun 	switch (error_info->data_out_result) {
2680*4882a593Smuzhiyun 	case PQI_DATA_IN_OUT_GOOD:
2681*4882a593Smuzhiyun 		break;
2682*4882a593Smuzhiyun 	case PQI_DATA_IN_OUT_UNDERFLOW:
2683*4882a593Smuzhiyun 		xfer_count =
2684*4882a593Smuzhiyun 			get_unaligned_le32(&error_info->data_out_transferred);
2685*4882a593Smuzhiyun 		residual_count = scsi_bufflen(scmd) - xfer_count;
2686*4882a593Smuzhiyun 		scsi_set_resid(scmd, residual_count);
2687*4882a593Smuzhiyun 		if (xfer_count < scmd->underflow)
2688*4882a593Smuzhiyun 			host_byte = DID_SOFT_ERROR;
2689*4882a593Smuzhiyun 		break;
2690*4882a593Smuzhiyun 	case PQI_DATA_IN_OUT_UNSOLICITED_ABORT:
2691*4882a593Smuzhiyun 	case PQI_DATA_IN_OUT_ABORTED:
2692*4882a593Smuzhiyun 		host_byte = DID_ABORT;
2693*4882a593Smuzhiyun 		break;
2694*4882a593Smuzhiyun 	case PQI_DATA_IN_OUT_TIMEOUT:
2695*4882a593Smuzhiyun 		host_byte = DID_TIME_OUT;
2696*4882a593Smuzhiyun 		break;
2697*4882a593Smuzhiyun 	case PQI_DATA_IN_OUT_BUFFER_OVERFLOW:
2698*4882a593Smuzhiyun 	case PQI_DATA_IN_OUT_PROTOCOL_ERROR:
2699*4882a593Smuzhiyun 	case PQI_DATA_IN_OUT_BUFFER_ERROR:
2700*4882a593Smuzhiyun 	case PQI_DATA_IN_OUT_BUFFER_OVERFLOW_DESCRIPTOR_AREA:
2701*4882a593Smuzhiyun 	case PQI_DATA_IN_OUT_BUFFER_OVERFLOW_BRIDGE:
2702*4882a593Smuzhiyun 	case PQI_DATA_IN_OUT_ERROR:
2703*4882a593Smuzhiyun 	case PQI_DATA_IN_OUT_HARDWARE_ERROR:
2704*4882a593Smuzhiyun 	case PQI_DATA_IN_OUT_PCIE_FABRIC_ERROR:
2705*4882a593Smuzhiyun 	case PQI_DATA_IN_OUT_PCIE_COMPLETION_TIMEOUT:
2706*4882a593Smuzhiyun 	case PQI_DATA_IN_OUT_PCIE_COMPLETER_ABORT_RECEIVED:
2707*4882a593Smuzhiyun 	case PQI_DATA_IN_OUT_PCIE_UNSUPPORTED_REQUEST_RECEIVED:
2708*4882a593Smuzhiyun 	case PQI_DATA_IN_OUT_PCIE_ECRC_CHECK_FAILED:
2709*4882a593Smuzhiyun 	case PQI_DATA_IN_OUT_PCIE_UNSUPPORTED_REQUEST:
2710*4882a593Smuzhiyun 	case PQI_DATA_IN_OUT_PCIE_ACS_VIOLATION:
2711*4882a593Smuzhiyun 	case PQI_DATA_IN_OUT_PCIE_TLP_PREFIX_BLOCKED:
2712*4882a593Smuzhiyun 	case PQI_DATA_IN_OUT_PCIE_POISONED_MEMORY_READ:
2713*4882a593Smuzhiyun 	default:
2714*4882a593Smuzhiyun 		host_byte = DID_ERROR;
2715*4882a593Smuzhiyun 		break;
2716*4882a593Smuzhiyun 	}
2717*4882a593Smuzhiyun 
2718*4882a593Smuzhiyun 	sense_data_length = get_unaligned_le16(&error_info->sense_data_length);
2719*4882a593Smuzhiyun 	if (sense_data_length == 0)
2720*4882a593Smuzhiyun 		sense_data_length =
2721*4882a593Smuzhiyun 			get_unaligned_le16(&error_info->response_data_length);
2722*4882a593Smuzhiyun 	if (sense_data_length) {
2723*4882a593Smuzhiyun 		if (sense_data_length > sizeof(error_info->data))
2724*4882a593Smuzhiyun 			sense_data_length = sizeof(error_info->data);
2725*4882a593Smuzhiyun 
2726*4882a593Smuzhiyun 		if (scsi_status == SAM_STAT_CHECK_CONDITION &&
2727*4882a593Smuzhiyun 			scsi_normalize_sense(error_info->data,
2728*4882a593Smuzhiyun 				sense_data_length, &sshdr) &&
2729*4882a593Smuzhiyun 				sshdr.sense_key == HARDWARE_ERROR &&
2730*4882a593Smuzhiyun 				sshdr.asc == 0x3e) {
2731*4882a593Smuzhiyun 			struct pqi_ctrl_info *ctrl_info = shost_to_hba(scmd->device->host);
2732*4882a593Smuzhiyun 			struct pqi_scsi_dev *device = scmd->device->hostdata;
2733*4882a593Smuzhiyun 
2734*4882a593Smuzhiyun 			switch (sshdr.ascq) {
2735*4882a593Smuzhiyun 			case 0x1: /* LOGICAL UNIT FAILURE */
2736*4882a593Smuzhiyun 				if (printk_ratelimit())
2737*4882a593Smuzhiyun 					scmd_printk(KERN_ERR, scmd, "received 'logical unit failure' from controller for scsi %d:%d:%d:%d\n",
2738*4882a593Smuzhiyun 						ctrl_info->scsi_host->host_no, device->bus, device->target, device->lun);
2739*4882a593Smuzhiyun 				pqi_take_device_offline(scmd->device, "RAID");
2740*4882a593Smuzhiyun 				host_byte = DID_NO_CONNECT;
2741*4882a593Smuzhiyun 				break;
2742*4882a593Smuzhiyun 
2743*4882a593Smuzhiyun 			default: /* See http://www.t10.org/lists/asc-num.htm#ASC_3E */
2744*4882a593Smuzhiyun 				if (printk_ratelimit())
2745*4882a593Smuzhiyun 					scmd_printk(KERN_ERR, scmd, "received unhandled error %d from controller for scsi %d:%d:%d:%d\n",
2746*4882a593Smuzhiyun 						sshdr.ascq, ctrl_info->scsi_host->host_no, device->bus, device->target, device->lun);
2747*4882a593Smuzhiyun 				break;
2748*4882a593Smuzhiyun 			}
2749*4882a593Smuzhiyun 		}
2750*4882a593Smuzhiyun 
2751*4882a593Smuzhiyun 		if (sense_data_length > SCSI_SENSE_BUFFERSIZE)
2752*4882a593Smuzhiyun 			sense_data_length = SCSI_SENSE_BUFFERSIZE;
2753*4882a593Smuzhiyun 		memcpy(scmd->sense_buffer, error_info->data,
2754*4882a593Smuzhiyun 			sense_data_length);
2755*4882a593Smuzhiyun 	}
2756*4882a593Smuzhiyun 
2757*4882a593Smuzhiyun 	scmd->result = scsi_status;
2758*4882a593Smuzhiyun 	set_host_byte(scmd, host_byte);
2759*4882a593Smuzhiyun }
2760*4882a593Smuzhiyun 
pqi_process_aio_io_error(struct pqi_io_request * io_request)2761*4882a593Smuzhiyun static void pqi_process_aio_io_error(struct pqi_io_request *io_request)
2762*4882a593Smuzhiyun {
2763*4882a593Smuzhiyun 	u8 scsi_status;
2764*4882a593Smuzhiyun 	u8 host_byte;
2765*4882a593Smuzhiyun 	struct scsi_cmnd *scmd;
2766*4882a593Smuzhiyun 	struct pqi_aio_error_info *error_info;
2767*4882a593Smuzhiyun 	size_t sense_data_length;
2768*4882a593Smuzhiyun 	int residual_count;
2769*4882a593Smuzhiyun 	int xfer_count;
2770*4882a593Smuzhiyun 	bool device_offline;
2771*4882a593Smuzhiyun 
2772*4882a593Smuzhiyun 	scmd = io_request->scmd;
2773*4882a593Smuzhiyun 	error_info = io_request->error_info;
2774*4882a593Smuzhiyun 	host_byte = DID_OK;
2775*4882a593Smuzhiyun 	sense_data_length = 0;
2776*4882a593Smuzhiyun 	device_offline = false;
2777*4882a593Smuzhiyun 
2778*4882a593Smuzhiyun 	switch (error_info->service_response) {
2779*4882a593Smuzhiyun 	case PQI_AIO_SERV_RESPONSE_COMPLETE:
2780*4882a593Smuzhiyun 		scsi_status = error_info->status;
2781*4882a593Smuzhiyun 		break;
2782*4882a593Smuzhiyun 	case PQI_AIO_SERV_RESPONSE_FAILURE:
2783*4882a593Smuzhiyun 		switch (error_info->status) {
2784*4882a593Smuzhiyun 		case PQI_AIO_STATUS_IO_ABORTED:
2785*4882a593Smuzhiyun 			scsi_status = SAM_STAT_TASK_ABORTED;
2786*4882a593Smuzhiyun 			break;
2787*4882a593Smuzhiyun 		case PQI_AIO_STATUS_UNDERRUN:
2788*4882a593Smuzhiyun 			scsi_status = SAM_STAT_GOOD;
2789*4882a593Smuzhiyun 			residual_count = get_unaligned_le32(
2790*4882a593Smuzhiyun 						&error_info->residual_count);
2791*4882a593Smuzhiyun 			scsi_set_resid(scmd, residual_count);
2792*4882a593Smuzhiyun 			xfer_count = scsi_bufflen(scmd) - residual_count;
2793*4882a593Smuzhiyun 			if (xfer_count < scmd->underflow)
2794*4882a593Smuzhiyun 				host_byte = DID_SOFT_ERROR;
2795*4882a593Smuzhiyun 			break;
2796*4882a593Smuzhiyun 		case PQI_AIO_STATUS_OVERRUN:
2797*4882a593Smuzhiyun 			scsi_status = SAM_STAT_GOOD;
2798*4882a593Smuzhiyun 			break;
2799*4882a593Smuzhiyun 		case PQI_AIO_STATUS_AIO_PATH_DISABLED:
2800*4882a593Smuzhiyun 			pqi_aio_path_disabled(io_request);
2801*4882a593Smuzhiyun 			scsi_status = SAM_STAT_GOOD;
2802*4882a593Smuzhiyun 			io_request->status = -EAGAIN;
2803*4882a593Smuzhiyun 			break;
2804*4882a593Smuzhiyun 		case PQI_AIO_STATUS_NO_PATH_TO_DEVICE:
2805*4882a593Smuzhiyun 		case PQI_AIO_STATUS_INVALID_DEVICE:
2806*4882a593Smuzhiyun 			if (!io_request->raid_bypass) {
2807*4882a593Smuzhiyun 				device_offline = true;
2808*4882a593Smuzhiyun 				pqi_take_device_offline(scmd->device, "AIO");
2809*4882a593Smuzhiyun 				host_byte = DID_NO_CONNECT;
2810*4882a593Smuzhiyun 			}
2811*4882a593Smuzhiyun 			scsi_status = SAM_STAT_CHECK_CONDITION;
2812*4882a593Smuzhiyun 			break;
2813*4882a593Smuzhiyun 		case PQI_AIO_STATUS_IO_ERROR:
2814*4882a593Smuzhiyun 		default:
2815*4882a593Smuzhiyun 			scsi_status = SAM_STAT_CHECK_CONDITION;
2816*4882a593Smuzhiyun 			break;
2817*4882a593Smuzhiyun 		}
2818*4882a593Smuzhiyun 		break;
2819*4882a593Smuzhiyun 	case PQI_AIO_SERV_RESPONSE_TMF_COMPLETE:
2820*4882a593Smuzhiyun 	case PQI_AIO_SERV_RESPONSE_TMF_SUCCEEDED:
2821*4882a593Smuzhiyun 		scsi_status = SAM_STAT_GOOD;
2822*4882a593Smuzhiyun 		break;
2823*4882a593Smuzhiyun 	case PQI_AIO_SERV_RESPONSE_TMF_REJECTED:
2824*4882a593Smuzhiyun 	case PQI_AIO_SERV_RESPONSE_TMF_INCORRECT_LUN:
2825*4882a593Smuzhiyun 	default:
2826*4882a593Smuzhiyun 		scsi_status = SAM_STAT_CHECK_CONDITION;
2827*4882a593Smuzhiyun 		break;
2828*4882a593Smuzhiyun 	}
2829*4882a593Smuzhiyun 
2830*4882a593Smuzhiyun 	if (error_info->data_present) {
2831*4882a593Smuzhiyun 		sense_data_length =
2832*4882a593Smuzhiyun 			get_unaligned_le16(&error_info->data_length);
2833*4882a593Smuzhiyun 		if (sense_data_length) {
2834*4882a593Smuzhiyun 			if (sense_data_length > sizeof(error_info->data))
2835*4882a593Smuzhiyun 				sense_data_length = sizeof(error_info->data);
2836*4882a593Smuzhiyun 			if (sense_data_length > SCSI_SENSE_BUFFERSIZE)
2837*4882a593Smuzhiyun 				sense_data_length = SCSI_SENSE_BUFFERSIZE;
2838*4882a593Smuzhiyun 			memcpy(scmd->sense_buffer, error_info->data,
2839*4882a593Smuzhiyun 				sense_data_length);
2840*4882a593Smuzhiyun 		}
2841*4882a593Smuzhiyun 	}
2842*4882a593Smuzhiyun 
2843*4882a593Smuzhiyun 	if (device_offline && sense_data_length == 0)
2844*4882a593Smuzhiyun 		scsi_build_sense_buffer(0, scmd->sense_buffer, HARDWARE_ERROR,
2845*4882a593Smuzhiyun 			0x3e, 0x1);
2846*4882a593Smuzhiyun 
2847*4882a593Smuzhiyun 	scmd->result = scsi_status;
2848*4882a593Smuzhiyun 	set_host_byte(scmd, host_byte);
2849*4882a593Smuzhiyun }
2850*4882a593Smuzhiyun 
pqi_process_io_error(unsigned int iu_type,struct pqi_io_request * io_request)2851*4882a593Smuzhiyun static void pqi_process_io_error(unsigned int iu_type,
2852*4882a593Smuzhiyun 	struct pqi_io_request *io_request)
2853*4882a593Smuzhiyun {
2854*4882a593Smuzhiyun 	switch (iu_type) {
2855*4882a593Smuzhiyun 	case PQI_RESPONSE_IU_RAID_PATH_IO_ERROR:
2856*4882a593Smuzhiyun 		pqi_process_raid_io_error(io_request);
2857*4882a593Smuzhiyun 		break;
2858*4882a593Smuzhiyun 	case PQI_RESPONSE_IU_AIO_PATH_IO_ERROR:
2859*4882a593Smuzhiyun 		pqi_process_aio_io_error(io_request);
2860*4882a593Smuzhiyun 		break;
2861*4882a593Smuzhiyun 	}
2862*4882a593Smuzhiyun }
2863*4882a593Smuzhiyun 
pqi_interpret_task_management_response(struct pqi_task_management_response * response)2864*4882a593Smuzhiyun static int pqi_interpret_task_management_response(
2865*4882a593Smuzhiyun 	struct pqi_task_management_response *response)
2866*4882a593Smuzhiyun {
2867*4882a593Smuzhiyun 	int rc;
2868*4882a593Smuzhiyun 
2869*4882a593Smuzhiyun 	switch (response->response_code) {
2870*4882a593Smuzhiyun 	case SOP_TMF_COMPLETE:
2871*4882a593Smuzhiyun 	case SOP_TMF_FUNCTION_SUCCEEDED:
2872*4882a593Smuzhiyun 		rc = 0;
2873*4882a593Smuzhiyun 		break;
2874*4882a593Smuzhiyun 	case SOP_TMF_REJECTED:
2875*4882a593Smuzhiyun 		rc = -EAGAIN;
2876*4882a593Smuzhiyun 		break;
2877*4882a593Smuzhiyun 	default:
2878*4882a593Smuzhiyun 		rc = -EIO;
2879*4882a593Smuzhiyun 		break;
2880*4882a593Smuzhiyun 	}
2881*4882a593Smuzhiyun 
2882*4882a593Smuzhiyun 	return rc;
2883*4882a593Smuzhiyun }
2884*4882a593Smuzhiyun 
pqi_invalid_response(struct pqi_ctrl_info * ctrl_info)2885*4882a593Smuzhiyun static inline void pqi_invalid_response(struct pqi_ctrl_info *ctrl_info)
2886*4882a593Smuzhiyun {
2887*4882a593Smuzhiyun 	pqi_take_ctrl_offline(ctrl_info);
2888*4882a593Smuzhiyun }
2889*4882a593Smuzhiyun 
pqi_process_io_intr(struct pqi_ctrl_info * ctrl_info,struct pqi_queue_group * queue_group)2890*4882a593Smuzhiyun static int pqi_process_io_intr(struct pqi_ctrl_info *ctrl_info, struct pqi_queue_group *queue_group)
2891*4882a593Smuzhiyun {
2892*4882a593Smuzhiyun 	int num_responses;
2893*4882a593Smuzhiyun 	pqi_index_t oq_pi;
2894*4882a593Smuzhiyun 	pqi_index_t oq_ci;
2895*4882a593Smuzhiyun 	struct pqi_io_request *io_request;
2896*4882a593Smuzhiyun 	struct pqi_io_response *response;
2897*4882a593Smuzhiyun 	u16 request_id;
2898*4882a593Smuzhiyun 
2899*4882a593Smuzhiyun 	num_responses = 0;
2900*4882a593Smuzhiyun 	oq_ci = queue_group->oq_ci_copy;
2901*4882a593Smuzhiyun 
2902*4882a593Smuzhiyun 	while (1) {
2903*4882a593Smuzhiyun 		oq_pi = readl(queue_group->oq_pi);
2904*4882a593Smuzhiyun 		if (oq_pi >= ctrl_info->num_elements_per_oq) {
2905*4882a593Smuzhiyun 			pqi_invalid_response(ctrl_info);
2906*4882a593Smuzhiyun 			dev_err(&ctrl_info->pci_dev->dev,
2907*4882a593Smuzhiyun 				"I/O interrupt: producer index (%u) out of range (0-%u): consumer index: %u\n",
2908*4882a593Smuzhiyun 				oq_pi, ctrl_info->num_elements_per_oq - 1, oq_ci);
2909*4882a593Smuzhiyun 			return -1;
2910*4882a593Smuzhiyun 		}
2911*4882a593Smuzhiyun 		if (oq_pi == oq_ci)
2912*4882a593Smuzhiyun 			break;
2913*4882a593Smuzhiyun 
2914*4882a593Smuzhiyun 		num_responses++;
2915*4882a593Smuzhiyun 		response = queue_group->oq_element_array +
2916*4882a593Smuzhiyun 			(oq_ci * PQI_OPERATIONAL_OQ_ELEMENT_LENGTH);
2917*4882a593Smuzhiyun 
2918*4882a593Smuzhiyun 		request_id = get_unaligned_le16(&response->request_id);
2919*4882a593Smuzhiyun 		if (request_id >= ctrl_info->max_io_slots) {
2920*4882a593Smuzhiyun 			pqi_invalid_response(ctrl_info);
2921*4882a593Smuzhiyun 			dev_err(&ctrl_info->pci_dev->dev,
2922*4882a593Smuzhiyun 				"request ID in response (%u) out of range (0-%u): producer index: %u  consumer index: %u\n",
2923*4882a593Smuzhiyun 				request_id, ctrl_info->max_io_slots - 1, oq_pi, oq_ci);
2924*4882a593Smuzhiyun 			return -1;
2925*4882a593Smuzhiyun 		}
2926*4882a593Smuzhiyun 
2927*4882a593Smuzhiyun 		io_request = &ctrl_info->io_request_pool[request_id];
2928*4882a593Smuzhiyun 		if (atomic_read(&io_request->refcount) == 0) {
2929*4882a593Smuzhiyun 			pqi_invalid_response(ctrl_info);
2930*4882a593Smuzhiyun 			dev_err(&ctrl_info->pci_dev->dev,
2931*4882a593Smuzhiyun 				"request ID in response (%u) does not match an outstanding I/O request: producer index: %u  consumer index: %u\n",
2932*4882a593Smuzhiyun 				request_id, oq_pi, oq_ci);
2933*4882a593Smuzhiyun 			return -1;
2934*4882a593Smuzhiyun 		}
2935*4882a593Smuzhiyun 
2936*4882a593Smuzhiyun 		switch (response->header.iu_type) {
2937*4882a593Smuzhiyun 		case PQI_RESPONSE_IU_RAID_PATH_IO_SUCCESS:
2938*4882a593Smuzhiyun 		case PQI_RESPONSE_IU_AIO_PATH_IO_SUCCESS:
2939*4882a593Smuzhiyun 			if (io_request->scmd)
2940*4882a593Smuzhiyun 				io_request->scmd->result = 0;
2941*4882a593Smuzhiyun 			fallthrough;
2942*4882a593Smuzhiyun 		case PQI_RESPONSE_IU_GENERAL_MANAGEMENT:
2943*4882a593Smuzhiyun 			break;
2944*4882a593Smuzhiyun 		case PQI_RESPONSE_IU_VENDOR_GENERAL:
2945*4882a593Smuzhiyun 			io_request->status =
2946*4882a593Smuzhiyun 				get_unaligned_le16(
2947*4882a593Smuzhiyun 				&((struct pqi_vendor_general_response *)
2948*4882a593Smuzhiyun 					response)->status);
2949*4882a593Smuzhiyun 			break;
2950*4882a593Smuzhiyun 		case PQI_RESPONSE_IU_TASK_MANAGEMENT:
2951*4882a593Smuzhiyun 			io_request->status =
2952*4882a593Smuzhiyun 				pqi_interpret_task_management_response(
2953*4882a593Smuzhiyun 					(void *)response);
2954*4882a593Smuzhiyun 			break;
2955*4882a593Smuzhiyun 		case PQI_RESPONSE_IU_AIO_PATH_DISABLED:
2956*4882a593Smuzhiyun 			pqi_aio_path_disabled(io_request);
2957*4882a593Smuzhiyun 			io_request->status = -EAGAIN;
2958*4882a593Smuzhiyun 			break;
2959*4882a593Smuzhiyun 		case PQI_RESPONSE_IU_RAID_PATH_IO_ERROR:
2960*4882a593Smuzhiyun 		case PQI_RESPONSE_IU_AIO_PATH_IO_ERROR:
2961*4882a593Smuzhiyun 			io_request->error_info = ctrl_info->error_buffer +
2962*4882a593Smuzhiyun 				(get_unaligned_le16(&response->error_index) *
2963*4882a593Smuzhiyun 				PQI_ERROR_BUFFER_ELEMENT_LENGTH);
2964*4882a593Smuzhiyun 			pqi_process_io_error(response->header.iu_type, io_request);
2965*4882a593Smuzhiyun 			break;
2966*4882a593Smuzhiyun 		default:
2967*4882a593Smuzhiyun 			pqi_invalid_response(ctrl_info);
2968*4882a593Smuzhiyun 			dev_err(&ctrl_info->pci_dev->dev,
2969*4882a593Smuzhiyun 				"unexpected IU type: 0x%x: producer index: %u  consumer index: %u\n",
2970*4882a593Smuzhiyun 				response->header.iu_type, oq_pi, oq_ci);
2971*4882a593Smuzhiyun 			return -1;
2972*4882a593Smuzhiyun 		}
2973*4882a593Smuzhiyun 
2974*4882a593Smuzhiyun 		io_request->io_complete_callback(io_request, io_request->context);
2975*4882a593Smuzhiyun 
2976*4882a593Smuzhiyun 		/*
2977*4882a593Smuzhiyun 		 * Note that the I/O request structure CANNOT BE TOUCHED after
2978*4882a593Smuzhiyun 		 * returning from the I/O completion callback!
2979*4882a593Smuzhiyun 		 */
2980*4882a593Smuzhiyun 		oq_ci = (oq_ci + 1) % ctrl_info->num_elements_per_oq;
2981*4882a593Smuzhiyun 	}
2982*4882a593Smuzhiyun 
2983*4882a593Smuzhiyun 	if (num_responses) {
2984*4882a593Smuzhiyun 		queue_group->oq_ci_copy = oq_ci;
2985*4882a593Smuzhiyun 		writel(oq_ci, queue_group->oq_ci);
2986*4882a593Smuzhiyun 	}
2987*4882a593Smuzhiyun 
2988*4882a593Smuzhiyun 	return num_responses;
2989*4882a593Smuzhiyun }
2990*4882a593Smuzhiyun 
pqi_num_elements_free(unsigned int pi,unsigned int ci,unsigned int elements_in_queue)2991*4882a593Smuzhiyun static inline unsigned int pqi_num_elements_free(unsigned int pi,
2992*4882a593Smuzhiyun 	unsigned int ci, unsigned int elements_in_queue)
2993*4882a593Smuzhiyun {
2994*4882a593Smuzhiyun 	unsigned int num_elements_used;
2995*4882a593Smuzhiyun 
2996*4882a593Smuzhiyun 	if (pi >= ci)
2997*4882a593Smuzhiyun 		num_elements_used = pi - ci;
2998*4882a593Smuzhiyun 	else
2999*4882a593Smuzhiyun 		num_elements_used = elements_in_queue - ci + pi;
3000*4882a593Smuzhiyun 
3001*4882a593Smuzhiyun 	return elements_in_queue - num_elements_used - 1;
3002*4882a593Smuzhiyun }
3003*4882a593Smuzhiyun 
pqi_send_event_ack(struct pqi_ctrl_info * ctrl_info,struct pqi_event_acknowledge_request * iu,size_t iu_length)3004*4882a593Smuzhiyun static void pqi_send_event_ack(struct pqi_ctrl_info *ctrl_info,
3005*4882a593Smuzhiyun 	struct pqi_event_acknowledge_request *iu, size_t iu_length)
3006*4882a593Smuzhiyun {
3007*4882a593Smuzhiyun 	pqi_index_t iq_pi;
3008*4882a593Smuzhiyun 	pqi_index_t iq_ci;
3009*4882a593Smuzhiyun 	unsigned long flags;
3010*4882a593Smuzhiyun 	void *next_element;
3011*4882a593Smuzhiyun 	struct pqi_queue_group *queue_group;
3012*4882a593Smuzhiyun 
3013*4882a593Smuzhiyun 	queue_group = &ctrl_info->queue_groups[PQI_DEFAULT_QUEUE_GROUP];
3014*4882a593Smuzhiyun 	put_unaligned_le16(queue_group->oq_id, &iu->header.response_queue_id);
3015*4882a593Smuzhiyun 
3016*4882a593Smuzhiyun 	while (1) {
3017*4882a593Smuzhiyun 		spin_lock_irqsave(&queue_group->submit_lock[RAID_PATH], flags);
3018*4882a593Smuzhiyun 
3019*4882a593Smuzhiyun 		iq_pi = queue_group->iq_pi_copy[RAID_PATH];
3020*4882a593Smuzhiyun 		iq_ci = readl(queue_group->iq_ci[RAID_PATH]);
3021*4882a593Smuzhiyun 
3022*4882a593Smuzhiyun 		if (pqi_num_elements_free(iq_pi, iq_ci,
3023*4882a593Smuzhiyun 			ctrl_info->num_elements_per_iq))
3024*4882a593Smuzhiyun 			break;
3025*4882a593Smuzhiyun 
3026*4882a593Smuzhiyun 		spin_unlock_irqrestore(
3027*4882a593Smuzhiyun 			&queue_group->submit_lock[RAID_PATH], flags);
3028*4882a593Smuzhiyun 
3029*4882a593Smuzhiyun 		if (pqi_ctrl_offline(ctrl_info))
3030*4882a593Smuzhiyun 			return;
3031*4882a593Smuzhiyun 	}
3032*4882a593Smuzhiyun 
3033*4882a593Smuzhiyun 	next_element = queue_group->iq_element_array[RAID_PATH] +
3034*4882a593Smuzhiyun 		(iq_pi * PQI_OPERATIONAL_IQ_ELEMENT_LENGTH);
3035*4882a593Smuzhiyun 
3036*4882a593Smuzhiyun 	memcpy(next_element, iu, iu_length);
3037*4882a593Smuzhiyun 
3038*4882a593Smuzhiyun 	iq_pi = (iq_pi + 1) % ctrl_info->num_elements_per_iq;
3039*4882a593Smuzhiyun 	queue_group->iq_pi_copy[RAID_PATH] = iq_pi;
3040*4882a593Smuzhiyun 
3041*4882a593Smuzhiyun 	/*
3042*4882a593Smuzhiyun 	 * This write notifies the controller that an IU is available to be
3043*4882a593Smuzhiyun 	 * processed.
3044*4882a593Smuzhiyun 	 */
3045*4882a593Smuzhiyun 	writel(iq_pi, queue_group->iq_pi[RAID_PATH]);
3046*4882a593Smuzhiyun 
3047*4882a593Smuzhiyun 	spin_unlock_irqrestore(&queue_group->submit_lock[RAID_PATH], flags);
3048*4882a593Smuzhiyun }
3049*4882a593Smuzhiyun 
pqi_acknowledge_event(struct pqi_ctrl_info * ctrl_info,struct pqi_event * event)3050*4882a593Smuzhiyun static void pqi_acknowledge_event(struct pqi_ctrl_info *ctrl_info,
3051*4882a593Smuzhiyun 	struct pqi_event *event)
3052*4882a593Smuzhiyun {
3053*4882a593Smuzhiyun 	struct pqi_event_acknowledge_request request;
3054*4882a593Smuzhiyun 
3055*4882a593Smuzhiyun 	memset(&request, 0, sizeof(request));
3056*4882a593Smuzhiyun 
3057*4882a593Smuzhiyun 	request.header.iu_type = PQI_REQUEST_IU_ACKNOWLEDGE_VENDOR_EVENT;
3058*4882a593Smuzhiyun 	put_unaligned_le16(sizeof(request) - PQI_REQUEST_HEADER_LENGTH,
3059*4882a593Smuzhiyun 		&request.header.iu_length);
3060*4882a593Smuzhiyun 	request.event_type = event->event_type;
3061*4882a593Smuzhiyun 	request.event_id = event->event_id;
3062*4882a593Smuzhiyun 	request.additional_event_id = event->additional_event_id;
3063*4882a593Smuzhiyun 
3064*4882a593Smuzhiyun 	pqi_send_event_ack(ctrl_info, &request, sizeof(request));
3065*4882a593Smuzhiyun }
3066*4882a593Smuzhiyun 
3067*4882a593Smuzhiyun #define PQI_SOFT_RESET_STATUS_TIMEOUT_SECS		30
3068*4882a593Smuzhiyun #define PQI_SOFT_RESET_STATUS_POLL_INTERVAL_SECS	1
3069*4882a593Smuzhiyun 
pqi_poll_for_soft_reset_status(struct pqi_ctrl_info * ctrl_info)3070*4882a593Smuzhiyun static enum pqi_soft_reset_status pqi_poll_for_soft_reset_status(
3071*4882a593Smuzhiyun 	struct pqi_ctrl_info *ctrl_info)
3072*4882a593Smuzhiyun {
3073*4882a593Smuzhiyun 	unsigned long timeout;
3074*4882a593Smuzhiyun 	u8 status;
3075*4882a593Smuzhiyun 
3076*4882a593Smuzhiyun 	timeout = (PQI_SOFT_RESET_STATUS_TIMEOUT_SECS * PQI_HZ) + jiffies;
3077*4882a593Smuzhiyun 
3078*4882a593Smuzhiyun 	while (1) {
3079*4882a593Smuzhiyun 		status = pqi_read_soft_reset_status(ctrl_info);
3080*4882a593Smuzhiyun 		if (status & PQI_SOFT_RESET_INITIATE)
3081*4882a593Smuzhiyun 			return RESET_INITIATE_DRIVER;
3082*4882a593Smuzhiyun 
3083*4882a593Smuzhiyun 		if (status & PQI_SOFT_RESET_ABORT)
3084*4882a593Smuzhiyun 			return RESET_ABORT;
3085*4882a593Smuzhiyun 
3086*4882a593Smuzhiyun 		if (time_after(jiffies, timeout)) {
3087*4882a593Smuzhiyun 			dev_err(&ctrl_info->pci_dev->dev,
3088*4882a593Smuzhiyun 				"timed out waiting for soft reset status\n");
3089*4882a593Smuzhiyun 			return RESET_TIMEDOUT;
3090*4882a593Smuzhiyun 		}
3091*4882a593Smuzhiyun 
3092*4882a593Smuzhiyun 		if (!sis_is_firmware_running(ctrl_info))
3093*4882a593Smuzhiyun 			return RESET_NORESPONSE;
3094*4882a593Smuzhiyun 
3095*4882a593Smuzhiyun 		ssleep(PQI_SOFT_RESET_STATUS_POLL_INTERVAL_SECS);
3096*4882a593Smuzhiyun 	}
3097*4882a593Smuzhiyun }
3098*4882a593Smuzhiyun 
pqi_process_soft_reset(struct pqi_ctrl_info * ctrl_info,enum pqi_soft_reset_status reset_status)3099*4882a593Smuzhiyun static void pqi_process_soft_reset(struct pqi_ctrl_info *ctrl_info,
3100*4882a593Smuzhiyun 	enum pqi_soft_reset_status reset_status)
3101*4882a593Smuzhiyun {
3102*4882a593Smuzhiyun 	int rc;
3103*4882a593Smuzhiyun 
3104*4882a593Smuzhiyun 	switch (reset_status) {
3105*4882a593Smuzhiyun 	case RESET_INITIATE_DRIVER:
3106*4882a593Smuzhiyun 	case RESET_TIMEDOUT:
3107*4882a593Smuzhiyun 		dev_info(&ctrl_info->pci_dev->dev,
3108*4882a593Smuzhiyun 			"resetting controller %u\n", ctrl_info->ctrl_id);
3109*4882a593Smuzhiyun 		sis_soft_reset(ctrl_info);
3110*4882a593Smuzhiyun 		fallthrough;
3111*4882a593Smuzhiyun 	case RESET_INITIATE_FIRMWARE:
3112*4882a593Smuzhiyun 		rc = pqi_ofa_ctrl_restart(ctrl_info);
3113*4882a593Smuzhiyun 		pqi_ofa_free_host_buffer(ctrl_info);
3114*4882a593Smuzhiyun 		dev_info(&ctrl_info->pci_dev->dev,
3115*4882a593Smuzhiyun 			"Online Firmware Activation for controller %u: %s\n",
3116*4882a593Smuzhiyun 			ctrl_info->ctrl_id, rc == 0 ? "SUCCESS" : "FAILED");
3117*4882a593Smuzhiyun 		break;
3118*4882a593Smuzhiyun 	case RESET_ABORT:
3119*4882a593Smuzhiyun 		pqi_ofa_ctrl_unquiesce(ctrl_info);
3120*4882a593Smuzhiyun 		dev_info(&ctrl_info->pci_dev->dev,
3121*4882a593Smuzhiyun 			"Online Firmware Activation for controller %u: %s\n",
3122*4882a593Smuzhiyun 			ctrl_info->ctrl_id, "ABORTED");
3123*4882a593Smuzhiyun 		break;
3124*4882a593Smuzhiyun 	case RESET_NORESPONSE:
3125*4882a593Smuzhiyun 		pqi_ofa_free_host_buffer(ctrl_info);
3126*4882a593Smuzhiyun 		pqi_take_ctrl_offline(ctrl_info);
3127*4882a593Smuzhiyun 		break;
3128*4882a593Smuzhiyun 	}
3129*4882a593Smuzhiyun }
3130*4882a593Smuzhiyun 
pqi_ofa_process_event(struct pqi_ctrl_info * ctrl_info,struct pqi_event * event)3131*4882a593Smuzhiyun static void pqi_ofa_process_event(struct pqi_ctrl_info *ctrl_info,
3132*4882a593Smuzhiyun 	struct pqi_event *event)
3133*4882a593Smuzhiyun {
3134*4882a593Smuzhiyun 	u16 event_id;
3135*4882a593Smuzhiyun 	enum pqi_soft_reset_status status;
3136*4882a593Smuzhiyun 
3137*4882a593Smuzhiyun 	event_id = get_unaligned_le16(&event->event_id);
3138*4882a593Smuzhiyun 
3139*4882a593Smuzhiyun 	mutex_lock(&ctrl_info->ofa_mutex);
3140*4882a593Smuzhiyun 
3141*4882a593Smuzhiyun 	if (event_id == PQI_EVENT_OFA_QUIESCE) {
3142*4882a593Smuzhiyun 		dev_info(&ctrl_info->pci_dev->dev,
3143*4882a593Smuzhiyun 			"Received Online Firmware Activation quiesce event for controller %u\n",
3144*4882a593Smuzhiyun 			ctrl_info->ctrl_id);
3145*4882a593Smuzhiyun 		pqi_ofa_ctrl_quiesce(ctrl_info);
3146*4882a593Smuzhiyun 		pqi_acknowledge_event(ctrl_info, event);
3147*4882a593Smuzhiyun 		if (ctrl_info->soft_reset_handshake_supported) {
3148*4882a593Smuzhiyun 			status = pqi_poll_for_soft_reset_status(ctrl_info);
3149*4882a593Smuzhiyun 			pqi_process_soft_reset(ctrl_info, status);
3150*4882a593Smuzhiyun 		} else {
3151*4882a593Smuzhiyun 			pqi_process_soft_reset(ctrl_info,
3152*4882a593Smuzhiyun 					RESET_INITIATE_FIRMWARE);
3153*4882a593Smuzhiyun 		}
3154*4882a593Smuzhiyun 
3155*4882a593Smuzhiyun 	} else if (event_id == PQI_EVENT_OFA_MEMORY_ALLOCATION) {
3156*4882a593Smuzhiyun 		pqi_acknowledge_event(ctrl_info, event);
3157*4882a593Smuzhiyun 		pqi_ofa_setup_host_buffer(ctrl_info,
3158*4882a593Smuzhiyun 			le32_to_cpu(event->ofa_bytes_requested));
3159*4882a593Smuzhiyun 		pqi_ofa_host_memory_update(ctrl_info);
3160*4882a593Smuzhiyun 	} else if (event_id == PQI_EVENT_OFA_CANCELLED) {
3161*4882a593Smuzhiyun 		pqi_ofa_free_host_buffer(ctrl_info);
3162*4882a593Smuzhiyun 		pqi_acknowledge_event(ctrl_info, event);
3163*4882a593Smuzhiyun 		dev_info(&ctrl_info->pci_dev->dev,
3164*4882a593Smuzhiyun 			"Online Firmware Activation(%u) cancel reason : %u\n",
3165*4882a593Smuzhiyun 			ctrl_info->ctrl_id, event->ofa_cancel_reason);
3166*4882a593Smuzhiyun 	}
3167*4882a593Smuzhiyun 
3168*4882a593Smuzhiyun 	mutex_unlock(&ctrl_info->ofa_mutex);
3169*4882a593Smuzhiyun }
3170*4882a593Smuzhiyun 
pqi_event_worker(struct work_struct * work)3171*4882a593Smuzhiyun static void pqi_event_worker(struct work_struct *work)
3172*4882a593Smuzhiyun {
3173*4882a593Smuzhiyun 	unsigned int i;
3174*4882a593Smuzhiyun 	struct pqi_ctrl_info *ctrl_info;
3175*4882a593Smuzhiyun 	struct pqi_event *event;
3176*4882a593Smuzhiyun 
3177*4882a593Smuzhiyun 	ctrl_info = container_of(work, struct pqi_ctrl_info, event_work);
3178*4882a593Smuzhiyun 
3179*4882a593Smuzhiyun 	pqi_ctrl_busy(ctrl_info);
3180*4882a593Smuzhiyun 	pqi_wait_if_ctrl_blocked(ctrl_info, NO_TIMEOUT);
3181*4882a593Smuzhiyun 	if (pqi_ctrl_offline(ctrl_info))
3182*4882a593Smuzhiyun 		goto out;
3183*4882a593Smuzhiyun 
3184*4882a593Smuzhiyun 	pqi_schedule_rescan_worker_delayed(ctrl_info);
3185*4882a593Smuzhiyun 
3186*4882a593Smuzhiyun 	event = ctrl_info->events;
3187*4882a593Smuzhiyun 	for (i = 0; i < PQI_NUM_SUPPORTED_EVENTS; i++) {
3188*4882a593Smuzhiyun 		if (event->pending) {
3189*4882a593Smuzhiyun 			event->pending = false;
3190*4882a593Smuzhiyun 			if (event->event_type == PQI_EVENT_TYPE_OFA) {
3191*4882a593Smuzhiyun 				pqi_ctrl_unbusy(ctrl_info);
3192*4882a593Smuzhiyun 				pqi_ofa_process_event(ctrl_info, event);
3193*4882a593Smuzhiyun 				return;
3194*4882a593Smuzhiyun 			}
3195*4882a593Smuzhiyun 			pqi_acknowledge_event(ctrl_info, event);
3196*4882a593Smuzhiyun 		}
3197*4882a593Smuzhiyun 		event++;
3198*4882a593Smuzhiyun 	}
3199*4882a593Smuzhiyun 
3200*4882a593Smuzhiyun out:
3201*4882a593Smuzhiyun 	pqi_ctrl_unbusy(ctrl_info);
3202*4882a593Smuzhiyun }
3203*4882a593Smuzhiyun 
3204*4882a593Smuzhiyun #define PQI_HEARTBEAT_TIMER_INTERVAL	(10 * PQI_HZ)
3205*4882a593Smuzhiyun 
pqi_heartbeat_timer_handler(struct timer_list * t)3206*4882a593Smuzhiyun static void pqi_heartbeat_timer_handler(struct timer_list *t)
3207*4882a593Smuzhiyun {
3208*4882a593Smuzhiyun 	int num_interrupts;
3209*4882a593Smuzhiyun 	u32 heartbeat_count;
3210*4882a593Smuzhiyun 	struct pqi_ctrl_info *ctrl_info = from_timer(ctrl_info, t,
3211*4882a593Smuzhiyun 						     heartbeat_timer);
3212*4882a593Smuzhiyun 
3213*4882a593Smuzhiyun 	pqi_check_ctrl_health(ctrl_info);
3214*4882a593Smuzhiyun 	if (pqi_ctrl_offline(ctrl_info))
3215*4882a593Smuzhiyun 		return;
3216*4882a593Smuzhiyun 
3217*4882a593Smuzhiyun 	num_interrupts = atomic_read(&ctrl_info->num_interrupts);
3218*4882a593Smuzhiyun 	heartbeat_count = pqi_read_heartbeat_counter(ctrl_info);
3219*4882a593Smuzhiyun 
3220*4882a593Smuzhiyun 	if (num_interrupts == ctrl_info->previous_num_interrupts) {
3221*4882a593Smuzhiyun 		if (heartbeat_count == ctrl_info->previous_heartbeat_count) {
3222*4882a593Smuzhiyun 			dev_err(&ctrl_info->pci_dev->dev,
3223*4882a593Smuzhiyun 				"no heartbeat detected - last heartbeat count: %u\n",
3224*4882a593Smuzhiyun 				heartbeat_count);
3225*4882a593Smuzhiyun 			pqi_take_ctrl_offline(ctrl_info);
3226*4882a593Smuzhiyun 			return;
3227*4882a593Smuzhiyun 		}
3228*4882a593Smuzhiyun 	} else {
3229*4882a593Smuzhiyun 		ctrl_info->previous_num_interrupts = num_interrupts;
3230*4882a593Smuzhiyun 	}
3231*4882a593Smuzhiyun 
3232*4882a593Smuzhiyun 	ctrl_info->previous_heartbeat_count = heartbeat_count;
3233*4882a593Smuzhiyun 	mod_timer(&ctrl_info->heartbeat_timer,
3234*4882a593Smuzhiyun 		jiffies + PQI_HEARTBEAT_TIMER_INTERVAL);
3235*4882a593Smuzhiyun }
3236*4882a593Smuzhiyun 
pqi_start_heartbeat_timer(struct pqi_ctrl_info * ctrl_info)3237*4882a593Smuzhiyun static void pqi_start_heartbeat_timer(struct pqi_ctrl_info *ctrl_info)
3238*4882a593Smuzhiyun {
3239*4882a593Smuzhiyun 	if (!ctrl_info->heartbeat_counter)
3240*4882a593Smuzhiyun 		return;
3241*4882a593Smuzhiyun 
3242*4882a593Smuzhiyun 	ctrl_info->previous_num_interrupts =
3243*4882a593Smuzhiyun 		atomic_read(&ctrl_info->num_interrupts);
3244*4882a593Smuzhiyun 	ctrl_info->previous_heartbeat_count =
3245*4882a593Smuzhiyun 		pqi_read_heartbeat_counter(ctrl_info);
3246*4882a593Smuzhiyun 
3247*4882a593Smuzhiyun 	ctrl_info->heartbeat_timer.expires =
3248*4882a593Smuzhiyun 		jiffies + PQI_HEARTBEAT_TIMER_INTERVAL;
3249*4882a593Smuzhiyun 	add_timer(&ctrl_info->heartbeat_timer);
3250*4882a593Smuzhiyun }
3251*4882a593Smuzhiyun 
pqi_stop_heartbeat_timer(struct pqi_ctrl_info * ctrl_info)3252*4882a593Smuzhiyun static inline void pqi_stop_heartbeat_timer(struct pqi_ctrl_info *ctrl_info)
3253*4882a593Smuzhiyun {
3254*4882a593Smuzhiyun 	del_timer_sync(&ctrl_info->heartbeat_timer);
3255*4882a593Smuzhiyun }
3256*4882a593Smuzhiyun 
pqi_event_type_to_event_index(unsigned int event_type)3257*4882a593Smuzhiyun static inline int pqi_event_type_to_event_index(unsigned int event_type)
3258*4882a593Smuzhiyun {
3259*4882a593Smuzhiyun 	int index;
3260*4882a593Smuzhiyun 
3261*4882a593Smuzhiyun 	for (index = 0; index < ARRAY_SIZE(pqi_supported_event_types); index++)
3262*4882a593Smuzhiyun 		if (event_type == pqi_supported_event_types[index])
3263*4882a593Smuzhiyun 			return index;
3264*4882a593Smuzhiyun 
3265*4882a593Smuzhiyun 	return -1;
3266*4882a593Smuzhiyun }
3267*4882a593Smuzhiyun 
pqi_is_supported_event(unsigned int event_type)3268*4882a593Smuzhiyun static inline bool pqi_is_supported_event(unsigned int event_type)
3269*4882a593Smuzhiyun {
3270*4882a593Smuzhiyun 	return pqi_event_type_to_event_index(event_type) != -1;
3271*4882a593Smuzhiyun }
3272*4882a593Smuzhiyun 
pqi_ofa_capture_event_payload(struct pqi_event * event,struct pqi_event_response * response)3273*4882a593Smuzhiyun static void pqi_ofa_capture_event_payload(struct pqi_event *event,
3274*4882a593Smuzhiyun 	struct pqi_event_response *response)
3275*4882a593Smuzhiyun {
3276*4882a593Smuzhiyun 	u16 event_id;
3277*4882a593Smuzhiyun 
3278*4882a593Smuzhiyun 	event_id = get_unaligned_le16(&event->event_id);
3279*4882a593Smuzhiyun 
3280*4882a593Smuzhiyun 	if (event->event_type == PQI_EVENT_TYPE_OFA) {
3281*4882a593Smuzhiyun 		if (event_id == PQI_EVENT_OFA_MEMORY_ALLOCATION) {
3282*4882a593Smuzhiyun 			event->ofa_bytes_requested =
3283*4882a593Smuzhiyun 			response->data.ofa_memory_allocation.bytes_requested;
3284*4882a593Smuzhiyun 		} else if (event_id == PQI_EVENT_OFA_CANCELLED) {
3285*4882a593Smuzhiyun 			event->ofa_cancel_reason =
3286*4882a593Smuzhiyun 			response->data.ofa_cancelled.reason;
3287*4882a593Smuzhiyun 		}
3288*4882a593Smuzhiyun 	}
3289*4882a593Smuzhiyun }
3290*4882a593Smuzhiyun 
pqi_process_event_intr(struct pqi_ctrl_info * ctrl_info)3291*4882a593Smuzhiyun static int pqi_process_event_intr(struct pqi_ctrl_info *ctrl_info)
3292*4882a593Smuzhiyun {
3293*4882a593Smuzhiyun 	int num_events;
3294*4882a593Smuzhiyun 	pqi_index_t oq_pi;
3295*4882a593Smuzhiyun 	pqi_index_t oq_ci;
3296*4882a593Smuzhiyun 	struct pqi_event_queue *event_queue;
3297*4882a593Smuzhiyun 	struct pqi_event_response *response;
3298*4882a593Smuzhiyun 	struct pqi_event *event;
3299*4882a593Smuzhiyun 	int event_index;
3300*4882a593Smuzhiyun 
3301*4882a593Smuzhiyun 	event_queue = &ctrl_info->event_queue;
3302*4882a593Smuzhiyun 	num_events = 0;
3303*4882a593Smuzhiyun 	oq_ci = event_queue->oq_ci_copy;
3304*4882a593Smuzhiyun 
3305*4882a593Smuzhiyun 	while (1) {
3306*4882a593Smuzhiyun 		oq_pi = readl(event_queue->oq_pi);
3307*4882a593Smuzhiyun 		if (oq_pi >= PQI_NUM_EVENT_QUEUE_ELEMENTS) {
3308*4882a593Smuzhiyun 			pqi_invalid_response(ctrl_info);
3309*4882a593Smuzhiyun 			dev_err(&ctrl_info->pci_dev->dev,
3310*4882a593Smuzhiyun 				"event interrupt: producer index (%u) out of range (0-%u): consumer index: %u\n",
3311*4882a593Smuzhiyun 				oq_pi, PQI_NUM_EVENT_QUEUE_ELEMENTS - 1, oq_ci);
3312*4882a593Smuzhiyun 			return -1;
3313*4882a593Smuzhiyun 		}
3314*4882a593Smuzhiyun 
3315*4882a593Smuzhiyun 		if (oq_pi == oq_ci)
3316*4882a593Smuzhiyun 			break;
3317*4882a593Smuzhiyun 
3318*4882a593Smuzhiyun 		num_events++;
3319*4882a593Smuzhiyun 		response = event_queue->oq_element_array + (oq_ci * PQI_EVENT_OQ_ELEMENT_LENGTH);
3320*4882a593Smuzhiyun 
3321*4882a593Smuzhiyun 		event_index =
3322*4882a593Smuzhiyun 			pqi_event_type_to_event_index(response->event_type);
3323*4882a593Smuzhiyun 
3324*4882a593Smuzhiyun 		if (event_index >= 0 && response->request_acknowledge) {
3325*4882a593Smuzhiyun 			event = &ctrl_info->events[event_index];
3326*4882a593Smuzhiyun 			event->pending = true;
3327*4882a593Smuzhiyun 			event->event_type = response->event_type;
3328*4882a593Smuzhiyun 			event->event_id = response->event_id;
3329*4882a593Smuzhiyun 			event->additional_event_id = response->additional_event_id;
3330*4882a593Smuzhiyun 			if (event->event_type == PQI_EVENT_TYPE_OFA)
3331*4882a593Smuzhiyun 				pqi_ofa_capture_event_payload(event, response);
3332*4882a593Smuzhiyun 		}
3333*4882a593Smuzhiyun 
3334*4882a593Smuzhiyun 		oq_ci = (oq_ci + 1) % PQI_NUM_EVENT_QUEUE_ELEMENTS;
3335*4882a593Smuzhiyun 	}
3336*4882a593Smuzhiyun 
3337*4882a593Smuzhiyun 	if (num_events) {
3338*4882a593Smuzhiyun 		event_queue->oq_ci_copy = oq_ci;
3339*4882a593Smuzhiyun 		writel(oq_ci, event_queue->oq_ci);
3340*4882a593Smuzhiyun 		schedule_work(&ctrl_info->event_work);
3341*4882a593Smuzhiyun 	}
3342*4882a593Smuzhiyun 
3343*4882a593Smuzhiyun 	return num_events;
3344*4882a593Smuzhiyun }
3345*4882a593Smuzhiyun 
3346*4882a593Smuzhiyun #define PQI_LEGACY_INTX_MASK	0x1
3347*4882a593Smuzhiyun 
pqi_configure_legacy_intx(struct pqi_ctrl_info * ctrl_info,bool enable_intx)3348*4882a593Smuzhiyun static inline void pqi_configure_legacy_intx(struct pqi_ctrl_info *ctrl_info,
3349*4882a593Smuzhiyun 	bool enable_intx)
3350*4882a593Smuzhiyun {
3351*4882a593Smuzhiyun 	u32 intx_mask;
3352*4882a593Smuzhiyun 	struct pqi_device_registers __iomem *pqi_registers;
3353*4882a593Smuzhiyun 	volatile void __iomem *register_addr;
3354*4882a593Smuzhiyun 
3355*4882a593Smuzhiyun 	pqi_registers = ctrl_info->pqi_registers;
3356*4882a593Smuzhiyun 
3357*4882a593Smuzhiyun 	if (enable_intx)
3358*4882a593Smuzhiyun 		register_addr = &pqi_registers->legacy_intx_mask_clear;
3359*4882a593Smuzhiyun 	else
3360*4882a593Smuzhiyun 		register_addr = &pqi_registers->legacy_intx_mask_set;
3361*4882a593Smuzhiyun 
3362*4882a593Smuzhiyun 	intx_mask = readl(register_addr);
3363*4882a593Smuzhiyun 	intx_mask |= PQI_LEGACY_INTX_MASK;
3364*4882a593Smuzhiyun 	writel(intx_mask, register_addr);
3365*4882a593Smuzhiyun }
3366*4882a593Smuzhiyun 
pqi_change_irq_mode(struct pqi_ctrl_info * ctrl_info,enum pqi_irq_mode new_mode)3367*4882a593Smuzhiyun static void pqi_change_irq_mode(struct pqi_ctrl_info *ctrl_info,
3368*4882a593Smuzhiyun 	enum pqi_irq_mode new_mode)
3369*4882a593Smuzhiyun {
3370*4882a593Smuzhiyun 	switch (ctrl_info->irq_mode) {
3371*4882a593Smuzhiyun 	case IRQ_MODE_MSIX:
3372*4882a593Smuzhiyun 		switch (new_mode) {
3373*4882a593Smuzhiyun 		case IRQ_MODE_MSIX:
3374*4882a593Smuzhiyun 			break;
3375*4882a593Smuzhiyun 		case IRQ_MODE_INTX:
3376*4882a593Smuzhiyun 			pqi_configure_legacy_intx(ctrl_info, true);
3377*4882a593Smuzhiyun 			sis_enable_intx(ctrl_info);
3378*4882a593Smuzhiyun 			break;
3379*4882a593Smuzhiyun 		case IRQ_MODE_NONE:
3380*4882a593Smuzhiyun 			break;
3381*4882a593Smuzhiyun 		}
3382*4882a593Smuzhiyun 		break;
3383*4882a593Smuzhiyun 	case IRQ_MODE_INTX:
3384*4882a593Smuzhiyun 		switch (new_mode) {
3385*4882a593Smuzhiyun 		case IRQ_MODE_MSIX:
3386*4882a593Smuzhiyun 			pqi_configure_legacy_intx(ctrl_info, false);
3387*4882a593Smuzhiyun 			sis_enable_msix(ctrl_info);
3388*4882a593Smuzhiyun 			break;
3389*4882a593Smuzhiyun 		case IRQ_MODE_INTX:
3390*4882a593Smuzhiyun 			break;
3391*4882a593Smuzhiyun 		case IRQ_MODE_NONE:
3392*4882a593Smuzhiyun 			pqi_configure_legacy_intx(ctrl_info, false);
3393*4882a593Smuzhiyun 			break;
3394*4882a593Smuzhiyun 		}
3395*4882a593Smuzhiyun 		break;
3396*4882a593Smuzhiyun 	case IRQ_MODE_NONE:
3397*4882a593Smuzhiyun 		switch (new_mode) {
3398*4882a593Smuzhiyun 		case IRQ_MODE_MSIX:
3399*4882a593Smuzhiyun 			sis_enable_msix(ctrl_info);
3400*4882a593Smuzhiyun 			break;
3401*4882a593Smuzhiyun 		case IRQ_MODE_INTX:
3402*4882a593Smuzhiyun 			pqi_configure_legacy_intx(ctrl_info, true);
3403*4882a593Smuzhiyun 			sis_enable_intx(ctrl_info);
3404*4882a593Smuzhiyun 			break;
3405*4882a593Smuzhiyun 		case IRQ_MODE_NONE:
3406*4882a593Smuzhiyun 			break;
3407*4882a593Smuzhiyun 		}
3408*4882a593Smuzhiyun 		break;
3409*4882a593Smuzhiyun 	}
3410*4882a593Smuzhiyun 
3411*4882a593Smuzhiyun 	ctrl_info->irq_mode = new_mode;
3412*4882a593Smuzhiyun }
3413*4882a593Smuzhiyun 
3414*4882a593Smuzhiyun #define PQI_LEGACY_INTX_PENDING		0x1
3415*4882a593Smuzhiyun 
pqi_is_valid_irq(struct pqi_ctrl_info * ctrl_info)3416*4882a593Smuzhiyun static inline bool pqi_is_valid_irq(struct pqi_ctrl_info *ctrl_info)
3417*4882a593Smuzhiyun {
3418*4882a593Smuzhiyun 	bool valid_irq;
3419*4882a593Smuzhiyun 	u32 intx_status;
3420*4882a593Smuzhiyun 
3421*4882a593Smuzhiyun 	switch (ctrl_info->irq_mode) {
3422*4882a593Smuzhiyun 	case IRQ_MODE_MSIX:
3423*4882a593Smuzhiyun 		valid_irq = true;
3424*4882a593Smuzhiyun 		break;
3425*4882a593Smuzhiyun 	case IRQ_MODE_INTX:
3426*4882a593Smuzhiyun 		intx_status =
3427*4882a593Smuzhiyun 			readl(&ctrl_info->pqi_registers->legacy_intx_status);
3428*4882a593Smuzhiyun 		if (intx_status & PQI_LEGACY_INTX_PENDING)
3429*4882a593Smuzhiyun 			valid_irq = true;
3430*4882a593Smuzhiyun 		else
3431*4882a593Smuzhiyun 			valid_irq = false;
3432*4882a593Smuzhiyun 		break;
3433*4882a593Smuzhiyun 	case IRQ_MODE_NONE:
3434*4882a593Smuzhiyun 	default:
3435*4882a593Smuzhiyun 		valid_irq = false;
3436*4882a593Smuzhiyun 		break;
3437*4882a593Smuzhiyun 	}
3438*4882a593Smuzhiyun 
3439*4882a593Smuzhiyun 	return valid_irq;
3440*4882a593Smuzhiyun }
3441*4882a593Smuzhiyun 
pqi_irq_handler(int irq,void * data)3442*4882a593Smuzhiyun static irqreturn_t pqi_irq_handler(int irq, void *data)
3443*4882a593Smuzhiyun {
3444*4882a593Smuzhiyun 	struct pqi_ctrl_info *ctrl_info;
3445*4882a593Smuzhiyun 	struct pqi_queue_group *queue_group;
3446*4882a593Smuzhiyun 	int num_io_responses_handled;
3447*4882a593Smuzhiyun 	int num_events_handled;
3448*4882a593Smuzhiyun 
3449*4882a593Smuzhiyun 	queue_group = data;
3450*4882a593Smuzhiyun 	ctrl_info = queue_group->ctrl_info;
3451*4882a593Smuzhiyun 
3452*4882a593Smuzhiyun 	if (!pqi_is_valid_irq(ctrl_info))
3453*4882a593Smuzhiyun 		return IRQ_NONE;
3454*4882a593Smuzhiyun 
3455*4882a593Smuzhiyun 	num_io_responses_handled = pqi_process_io_intr(ctrl_info, queue_group);
3456*4882a593Smuzhiyun 	if (num_io_responses_handled < 0)
3457*4882a593Smuzhiyun 		goto out;
3458*4882a593Smuzhiyun 
3459*4882a593Smuzhiyun 	if (irq == ctrl_info->event_irq) {
3460*4882a593Smuzhiyun 		num_events_handled = pqi_process_event_intr(ctrl_info);
3461*4882a593Smuzhiyun 		if (num_events_handled < 0)
3462*4882a593Smuzhiyun 			goto out;
3463*4882a593Smuzhiyun 	} else {
3464*4882a593Smuzhiyun 		num_events_handled = 0;
3465*4882a593Smuzhiyun 	}
3466*4882a593Smuzhiyun 
3467*4882a593Smuzhiyun 	if (num_io_responses_handled + num_events_handled > 0)
3468*4882a593Smuzhiyun 		atomic_inc(&ctrl_info->num_interrupts);
3469*4882a593Smuzhiyun 
3470*4882a593Smuzhiyun 	pqi_start_io(ctrl_info, queue_group, RAID_PATH, NULL);
3471*4882a593Smuzhiyun 	pqi_start_io(ctrl_info, queue_group, AIO_PATH, NULL);
3472*4882a593Smuzhiyun 
3473*4882a593Smuzhiyun out:
3474*4882a593Smuzhiyun 	return IRQ_HANDLED;
3475*4882a593Smuzhiyun }
3476*4882a593Smuzhiyun 
pqi_request_irqs(struct pqi_ctrl_info * ctrl_info)3477*4882a593Smuzhiyun static int pqi_request_irqs(struct pqi_ctrl_info *ctrl_info)
3478*4882a593Smuzhiyun {
3479*4882a593Smuzhiyun 	struct pci_dev *pci_dev = ctrl_info->pci_dev;
3480*4882a593Smuzhiyun 	int i;
3481*4882a593Smuzhiyun 	int rc;
3482*4882a593Smuzhiyun 
3483*4882a593Smuzhiyun 	ctrl_info->event_irq = pci_irq_vector(pci_dev, 0);
3484*4882a593Smuzhiyun 
3485*4882a593Smuzhiyun 	for (i = 0; i < ctrl_info->num_msix_vectors_enabled; i++) {
3486*4882a593Smuzhiyun 		rc = request_irq(pci_irq_vector(pci_dev, i), pqi_irq_handler, 0,
3487*4882a593Smuzhiyun 			DRIVER_NAME_SHORT, &ctrl_info->queue_groups[i]);
3488*4882a593Smuzhiyun 		if (rc) {
3489*4882a593Smuzhiyun 			dev_err(&pci_dev->dev,
3490*4882a593Smuzhiyun 				"irq %u init failed with error %d\n",
3491*4882a593Smuzhiyun 				pci_irq_vector(pci_dev, i), rc);
3492*4882a593Smuzhiyun 			return rc;
3493*4882a593Smuzhiyun 		}
3494*4882a593Smuzhiyun 		ctrl_info->num_msix_vectors_initialized++;
3495*4882a593Smuzhiyun 	}
3496*4882a593Smuzhiyun 
3497*4882a593Smuzhiyun 	return 0;
3498*4882a593Smuzhiyun }
3499*4882a593Smuzhiyun 
pqi_free_irqs(struct pqi_ctrl_info * ctrl_info)3500*4882a593Smuzhiyun static void pqi_free_irqs(struct pqi_ctrl_info *ctrl_info)
3501*4882a593Smuzhiyun {
3502*4882a593Smuzhiyun 	int i;
3503*4882a593Smuzhiyun 
3504*4882a593Smuzhiyun 	for (i = 0; i < ctrl_info->num_msix_vectors_initialized; i++)
3505*4882a593Smuzhiyun 		free_irq(pci_irq_vector(ctrl_info->pci_dev, i),
3506*4882a593Smuzhiyun 			&ctrl_info->queue_groups[i]);
3507*4882a593Smuzhiyun 
3508*4882a593Smuzhiyun 	ctrl_info->num_msix_vectors_initialized = 0;
3509*4882a593Smuzhiyun }
3510*4882a593Smuzhiyun 
pqi_enable_msix_interrupts(struct pqi_ctrl_info * ctrl_info)3511*4882a593Smuzhiyun static int pqi_enable_msix_interrupts(struct pqi_ctrl_info *ctrl_info)
3512*4882a593Smuzhiyun {
3513*4882a593Smuzhiyun 	int num_vectors_enabled;
3514*4882a593Smuzhiyun 
3515*4882a593Smuzhiyun 	num_vectors_enabled = pci_alloc_irq_vectors(ctrl_info->pci_dev,
3516*4882a593Smuzhiyun 			PQI_MIN_MSIX_VECTORS, ctrl_info->num_queue_groups,
3517*4882a593Smuzhiyun 			PCI_IRQ_MSIX | PCI_IRQ_AFFINITY);
3518*4882a593Smuzhiyun 	if (num_vectors_enabled < 0) {
3519*4882a593Smuzhiyun 		dev_err(&ctrl_info->pci_dev->dev,
3520*4882a593Smuzhiyun 			"MSI-X init failed with error %d\n",
3521*4882a593Smuzhiyun 			num_vectors_enabled);
3522*4882a593Smuzhiyun 		return num_vectors_enabled;
3523*4882a593Smuzhiyun 	}
3524*4882a593Smuzhiyun 
3525*4882a593Smuzhiyun 	ctrl_info->num_msix_vectors_enabled = num_vectors_enabled;
3526*4882a593Smuzhiyun 	ctrl_info->irq_mode = IRQ_MODE_MSIX;
3527*4882a593Smuzhiyun 	return 0;
3528*4882a593Smuzhiyun }
3529*4882a593Smuzhiyun 
pqi_disable_msix_interrupts(struct pqi_ctrl_info * ctrl_info)3530*4882a593Smuzhiyun static void pqi_disable_msix_interrupts(struct pqi_ctrl_info *ctrl_info)
3531*4882a593Smuzhiyun {
3532*4882a593Smuzhiyun 	if (ctrl_info->num_msix_vectors_enabled) {
3533*4882a593Smuzhiyun 		pci_free_irq_vectors(ctrl_info->pci_dev);
3534*4882a593Smuzhiyun 		ctrl_info->num_msix_vectors_enabled = 0;
3535*4882a593Smuzhiyun 	}
3536*4882a593Smuzhiyun }
3537*4882a593Smuzhiyun 
pqi_alloc_operational_queues(struct pqi_ctrl_info * ctrl_info)3538*4882a593Smuzhiyun static int pqi_alloc_operational_queues(struct pqi_ctrl_info *ctrl_info)
3539*4882a593Smuzhiyun {
3540*4882a593Smuzhiyun 	unsigned int i;
3541*4882a593Smuzhiyun 	size_t alloc_length;
3542*4882a593Smuzhiyun 	size_t element_array_length_per_iq;
3543*4882a593Smuzhiyun 	size_t element_array_length_per_oq;
3544*4882a593Smuzhiyun 	void *element_array;
3545*4882a593Smuzhiyun 	void __iomem *next_queue_index;
3546*4882a593Smuzhiyun 	void *aligned_pointer;
3547*4882a593Smuzhiyun 	unsigned int num_inbound_queues;
3548*4882a593Smuzhiyun 	unsigned int num_outbound_queues;
3549*4882a593Smuzhiyun 	unsigned int num_queue_indexes;
3550*4882a593Smuzhiyun 	struct pqi_queue_group *queue_group;
3551*4882a593Smuzhiyun 
3552*4882a593Smuzhiyun 	element_array_length_per_iq =
3553*4882a593Smuzhiyun 		PQI_OPERATIONAL_IQ_ELEMENT_LENGTH *
3554*4882a593Smuzhiyun 		ctrl_info->num_elements_per_iq;
3555*4882a593Smuzhiyun 	element_array_length_per_oq =
3556*4882a593Smuzhiyun 		PQI_OPERATIONAL_OQ_ELEMENT_LENGTH *
3557*4882a593Smuzhiyun 		ctrl_info->num_elements_per_oq;
3558*4882a593Smuzhiyun 	num_inbound_queues = ctrl_info->num_queue_groups * 2;
3559*4882a593Smuzhiyun 	num_outbound_queues = ctrl_info->num_queue_groups;
3560*4882a593Smuzhiyun 	num_queue_indexes = (ctrl_info->num_queue_groups * 3) + 1;
3561*4882a593Smuzhiyun 
3562*4882a593Smuzhiyun 	aligned_pointer = NULL;
3563*4882a593Smuzhiyun 
3564*4882a593Smuzhiyun 	for (i = 0; i < num_inbound_queues; i++) {
3565*4882a593Smuzhiyun 		aligned_pointer = PTR_ALIGN(aligned_pointer,
3566*4882a593Smuzhiyun 			PQI_QUEUE_ELEMENT_ARRAY_ALIGNMENT);
3567*4882a593Smuzhiyun 		aligned_pointer += element_array_length_per_iq;
3568*4882a593Smuzhiyun 	}
3569*4882a593Smuzhiyun 
3570*4882a593Smuzhiyun 	for (i = 0; i < num_outbound_queues; i++) {
3571*4882a593Smuzhiyun 		aligned_pointer = PTR_ALIGN(aligned_pointer,
3572*4882a593Smuzhiyun 			PQI_QUEUE_ELEMENT_ARRAY_ALIGNMENT);
3573*4882a593Smuzhiyun 		aligned_pointer += element_array_length_per_oq;
3574*4882a593Smuzhiyun 	}
3575*4882a593Smuzhiyun 
3576*4882a593Smuzhiyun 	aligned_pointer = PTR_ALIGN(aligned_pointer,
3577*4882a593Smuzhiyun 		PQI_QUEUE_ELEMENT_ARRAY_ALIGNMENT);
3578*4882a593Smuzhiyun 	aligned_pointer += PQI_NUM_EVENT_QUEUE_ELEMENTS *
3579*4882a593Smuzhiyun 		PQI_EVENT_OQ_ELEMENT_LENGTH;
3580*4882a593Smuzhiyun 
3581*4882a593Smuzhiyun 	for (i = 0; i < num_queue_indexes; i++) {
3582*4882a593Smuzhiyun 		aligned_pointer = PTR_ALIGN(aligned_pointer,
3583*4882a593Smuzhiyun 			PQI_OPERATIONAL_INDEX_ALIGNMENT);
3584*4882a593Smuzhiyun 		aligned_pointer += sizeof(pqi_index_t);
3585*4882a593Smuzhiyun 	}
3586*4882a593Smuzhiyun 
3587*4882a593Smuzhiyun 	alloc_length = (size_t)aligned_pointer +
3588*4882a593Smuzhiyun 		PQI_QUEUE_ELEMENT_ARRAY_ALIGNMENT;
3589*4882a593Smuzhiyun 
3590*4882a593Smuzhiyun 	alloc_length += PQI_EXTRA_SGL_MEMORY;
3591*4882a593Smuzhiyun 
3592*4882a593Smuzhiyun 	ctrl_info->queue_memory_base =
3593*4882a593Smuzhiyun 		dma_alloc_coherent(&ctrl_info->pci_dev->dev, alloc_length,
3594*4882a593Smuzhiyun 				   &ctrl_info->queue_memory_base_dma_handle,
3595*4882a593Smuzhiyun 				   GFP_KERNEL);
3596*4882a593Smuzhiyun 
3597*4882a593Smuzhiyun 	if (!ctrl_info->queue_memory_base)
3598*4882a593Smuzhiyun 		return -ENOMEM;
3599*4882a593Smuzhiyun 
3600*4882a593Smuzhiyun 	ctrl_info->queue_memory_length = alloc_length;
3601*4882a593Smuzhiyun 
3602*4882a593Smuzhiyun 	element_array = PTR_ALIGN(ctrl_info->queue_memory_base,
3603*4882a593Smuzhiyun 		PQI_QUEUE_ELEMENT_ARRAY_ALIGNMENT);
3604*4882a593Smuzhiyun 
3605*4882a593Smuzhiyun 	for (i = 0; i < ctrl_info->num_queue_groups; i++) {
3606*4882a593Smuzhiyun 		queue_group = &ctrl_info->queue_groups[i];
3607*4882a593Smuzhiyun 		queue_group->iq_element_array[RAID_PATH] = element_array;
3608*4882a593Smuzhiyun 		queue_group->iq_element_array_bus_addr[RAID_PATH] =
3609*4882a593Smuzhiyun 			ctrl_info->queue_memory_base_dma_handle +
3610*4882a593Smuzhiyun 				(element_array - ctrl_info->queue_memory_base);
3611*4882a593Smuzhiyun 		element_array += element_array_length_per_iq;
3612*4882a593Smuzhiyun 		element_array = PTR_ALIGN(element_array,
3613*4882a593Smuzhiyun 			PQI_QUEUE_ELEMENT_ARRAY_ALIGNMENT);
3614*4882a593Smuzhiyun 		queue_group->iq_element_array[AIO_PATH] = element_array;
3615*4882a593Smuzhiyun 		queue_group->iq_element_array_bus_addr[AIO_PATH] =
3616*4882a593Smuzhiyun 			ctrl_info->queue_memory_base_dma_handle +
3617*4882a593Smuzhiyun 			(element_array - ctrl_info->queue_memory_base);
3618*4882a593Smuzhiyun 		element_array += element_array_length_per_iq;
3619*4882a593Smuzhiyun 		element_array = PTR_ALIGN(element_array,
3620*4882a593Smuzhiyun 			PQI_QUEUE_ELEMENT_ARRAY_ALIGNMENT);
3621*4882a593Smuzhiyun 	}
3622*4882a593Smuzhiyun 
3623*4882a593Smuzhiyun 	for (i = 0; i < ctrl_info->num_queue_groups; i++) {
3624*4882a593Smuzhiyun 		queue_group = &ctrl_info->queue_groups[i];
3625*4882a593Smuzhiyun 		queue_group->oq_element_array = element_array;
3626*4882a593Smuzhiyun 		queue_group->oq_element_array_bus_addr =
3627*4882a593Smuzhiyun 			ctrl_info->queue_memory_base_dma_handle +
3628*4882a593Smuzhiyun 			(element_array - ctrl_info->queue_memory_base);
3629*4882a593Smuzhiyun 		element_array += element_array_length_per_oq;
3630*4882a593Smuzhiyun 		element_array = PTR_ALIGN(element_array,
3631*4882a593Smuzhiyun 			PQI_QUEUE_ELEMENT_ARRAY_ALIGNMENT);
3632*4882a593Smuzhiyun 	}
3633*4882a593Smuzhiyun 
3634*4882a593Smuzhiyun 	ctrl_info->event_queue.oq_element_array = element_array;
3635*4882a593Smuzhiyun 	ctrl_info->event_queue.oq_element_array_bus_addr =
3636*4882a593Smuzhiyun 		ctrl_info->queue_memory_base_dma_handle +
3637*4882a593Smuzhiyun 		(element_array - ctrl_info->queue_memory_base);
3638*4882a593Smuzhiyun 	element_array += PQI_NUM_EVENT_QUEUE_ELEMENTS *
3639*4882a593Smuzhiyun 		PQI_EVENT_OQ_ELEMENT_LENGTH;
3640*4882a593Smuzhiyun 
3641*4882a593Smuzhiyun 	next_queue_index = (void __iomem *)PTR_ALIGN(element_array,
3642*4882a593Smuzhiyun 		PQI_OPERATIONAL_INDEX_ALIGNMENT);
3643*4882a593Smuzhiyun 
3644*4882a593Smuzhiyun 	for (i = 0; i < ctrl_info->num_queue_groups; i++) {
3645*4882a593Smuzhiyun 		queue_group = &ctrl_info->queue_groups[i];
3646*4882a593Smuzhiyun 		queue_group->iq_ci[RAID_PATH] = next_queue_index;
3647*4882a593Smuzhiyun 		queue_group->iq_ci_bus_addr[RAID_PATH] =
3648*4882a593Smuzhiyun 			ctrl_info->queue_memory_base_dma_handle +
3649*4882a593Smuzhiyun 			(next_queue_index -
3650*4882a593Smuzhiyun 			(void __iomem *)ctrl_info->queue_memory_base);
3651*4882a593Smuzhiyun 		next_queue_index += sizeof(pqi_index_t);
3652*4882a593Smuzhiyun 		next_queue_index = PTR_ALIGN(next_queue_index,
3653*4882a593Smuzhiyun 			PQI_OPERATIONAL_INDEX_ALIGNMENT);
3654*4882a593Smuzhiyun 		queue_group->iq_ci[AIO_PATH] = next_queue_index;
3655*4882a593Smuzhiyun 		queue_group->iq_ci_bus_addr[AIO_PATH] =
3656*4882a593Smuzhiyun 			ctrl_info->queue_memory_base_dma_handle +
3657*4882a593Smuzhiyun 			(next_queue_index -
3658*4882a593Smuzhiyun 			(void __iomem *)ctrl_info->queue_memory_base);
3659*4882a593Smuzhiyun 		next_queue_index += sizeof(pqi_index_t);
3660*4882a593Smuzhiyun 		next_queue_index = PTR_ALIGN(next_queue_index,
3661*4882a593Smuzhiyun 			PQI_OPERATIONAL_INDEX_ALIGNMENT);
3662*4882a593Smuzhiyun 		queue_group->oq_pi = next_queue_index;
3663*4882a593Smuzhiyun 		queue_group->oq_pi_bus_addr =
3664*4882a593Smuzhiyun 			ctrl_info->queue_memory_base_dma_handle +
3665*4882a593Smuzhiyun 			(next_queue_index -
3666*4882a593Smuzhiyun 			(void __iomem *)ctrl_info->queue_memory_base);
3667*4882a593Smuzhiyun 		next_queue_index += sizeof(pqi_index_t);
3668*4882a593Smuzhiyun 		next_queue_index = PTR_ALIGN(next_queue_index,
3669*4882a593Smuzhiyun 			PQI_OPERATIONAL_INDEX_ALIGNMENT);
3670*4882a593Smuzhiyun 	}
3671*4882a593Smuzhiyun 
3672*4882a593Smuzhiyun 	ctrl_info->event_queue.oq_pi = next_queue_index;
3673*4882a593Smuzhiyun 	ctrl_info->event_queue.oq_pi_bus_addr =
3674*4882a593Smuzhiyun 		ctrl_info->queue_memory_base_dma_handle +
3675*4882a593Smuzhiyun 		(next_queue_index -
3676*4882a593Smuzhiyun 		(void __iomem *)ctrl_info->queue_memory_base);
3677*4882a593Smuzhiyun 
3678*4882a593Smuzhiyun 	return 0;
3679*4882a593Smuzhiyun }
3680*4882a593Smuzhiyun 
pqi_init_operational_queues(struct pqi_ctrl_info * ctrl_info)3681*4882a593Smuzhiyun static void pqi_init_operational_queues(struct pqi_ctrl_info *ctrl_info)
3682*4882a593Smuzhiyun {
3683*4882a593Smuzhiyun 	unsigned int i;
3684*4882a593Smuzhiyun 	u16 next_iq_id = PQI_MIN_OPERATIONAL_QUEUE_ID;
3685*4882a593Smuzhiyun 	u16 next_oq_id = PQI_MIN_OPERATIONAL_QUEUE_ID;
3686*4882a593Smuzhiyun 
3687*4882a593Smuzhiyun 	/*
3688*4882a593Smuzhiyun 	 * Initialize the backpointers to the controller structure in
3689*4882a593Smuzhiyun 	 * each operational queue group structure.
3690*4882a593Smuzhiyun 	 */
3691*4882a593Smuzhiyun 	for (i = 0; i < ctrl_info->num_queue_groups; i++)
3692*4882a593Smuzhiyun 		ctrl_info->queue_groups[i].ctrl_info = ctrl_info;
3693*4882a593Smuzhiyun 
3694*4882a593Smuzhiyun 	/*
3695*4882a593Smuzhiyun 	 * Assign IDs to all operational queues.  Note that the IDs
3696*4882a593Smuzhiyun 	 * assigned to operational IQs are independent of the IDs
3697*4882a593Smuzhiyun 	 * assigned to operational OQs.
3698*4882a593Smuzhiyun 	 */
3699*4882a593Smuzhiyun 	ctrl_info->event_queue.oq_id = next_oq_id++;
3700*4882a593Smuzhiyun 	for (i = 0; i < ctrl_info->num_queue_groups; i++) {
3701*4882a593Smuzhiyun 		ctrl_info->queue_groups[i].iq_id[RAID_PATH] = next_iq_id++;
3702*4882a593Smuzhiyun 		ctrl_info->queue_groups[i].iq_id[AIO_PATH] = next_iq_id++;
3703*4882a593Smuzhiyun 		ctrl_info->queue_groups[i].oq_id = next_oq_id++;
3704*4882a593Smuzhiyun 	}
3705*4882a593Smuzhiyun 
3706*4882a593Smuzhiyun 	/*
3707*4882a593Smuzhiyun 	 * Assign MSI-X table entry indexes to all queues.  Note that the
3708*4882a593Smuzhiyun 	 * interrupt for the event queue is shared with the first queue group.
3709*4882a593Smuzhiyun 	 */
3710*4882a593Smuzhiyun 	ctrl_info->event_queue.int_msg_num = 0;
3711*4882a593Smuzhiyun 	for (i = 0; i < ctrl_info->num_queue_groups; i++)
3712*4882a593Smuzhiyun 		ctrl_info->queue_groups[i].int_msg_num = i;
3713*4882a593Smuzhiyun 
3714*4882a593Smuzhiyun 	for (i = 0; i < ctrl_info->num_queue_groups; i++) {
3715*4882a593Smuzhiyun 		spin_lock_init(&ctrl_info->queue_groups[i].submit_lock[0]);
3716*4882a593Smuzhiyun 		spin_lock_init(&ctrl_info->queue_groups[i].submit_lock[1]);
3717*4882a593Smuzhiyun 		INIT_LIST_HEAD(&ctrl_info->queue_groups[i].request_list[0]);
3718*4882a593Smuzhiyun 		INIT_LIST_HEAD(&ctrl_info->queue_groups[i].request_list[1]);
3719*4882a593Smuzhiyun 	}
3720*4882a593Smuzhiyun }
3721*4882a593Smuzhiyun 
pqi_alloc_admin_queues(struct pqi_ctrl_info * ctrl_info)3722*4882a593Smuzhiyun static int pqi_alloc_admin_queues(struct pqi_ctrl_info *ctrl_info)
3723*4882a593Smuzhiyun {
3724*4882a593Smuzhiyun 	size_t alloc_length;
3725*4882a593Smuzhiyun 	struct pqi_admin_queues_aligned *admin_queues_aligned;
3726*4882a593Smuzhiyun 	struct pqi_admin_queues *admin_queues;
3727*4882a593Smuzhiyun 
3728*4882a593Smuzhiyun 	alloc_length = sizeof(struct pqi_admin_queues_aligned) +
3729*4882a593Smuzhiyun 		PQI_QUEUE_ELEMENT_ARRAY_ALIGNMENT;
3730*4882a593Smuzhiyun 
3731*4882a593Smuzhiyun 	ctrl_info->admin_queue_memory_base =
3732*4882a593Smuzhiyun 		dma_alloc_coherent(&ctrl_info->pci_dev->dev, alloc_length,
3733*4882a593Smuzhiyun 				   &ctrl_info->admin_queue_memory_base_dma_handle,
3734*4882a593Smuzhiyun 				   GFP_KERNEL);
3735*4882a593Smuzhiyun 
3736*4882a593Smuzhiyun 	if (!ctrl_info->admin_queue_memory_base)
3737*4882a593Smuzhiyun 		return -ENOMEM;
3738*4882a593Smuzhiyun 
3739*4882a593Smuzhiyun 	ctrl_info->admin_queue_memory_length = alloc_length;
3740*4882a593Smuzhiyun 
3741*4882a593Smuzhiyun 	admin_queues = &ctrl_info->admin_queues;
3742*4882a593Smuzhiyun 	admin_queues_aligned = PTR_ALIGN(ctrl_info->admin_queue_memory_base,
3743*4882a593Smuzhiyun 		PQI_QUEUE_ELEMENT_ARRAY_ALIGNMENT);
3744*4882a593Smuzhiyun 	admin_queues->iq_element_array =
3745*4882a593Smuzhiyun 		&admin_queues_aligned->iq_element_array;
3746*4882a593Smuzhiyun 	admin_queues->oq_element_array =
3747*4882a593Smuzhiyun 		&admin_queues_aligned->oq_element_array;
3748*4882a593Smuzhiyun 	admin_queues->iq_ci = &admin_queues_aligned->iq_ci;
3749*4882a593Smuzhiyun 	admin_queues->oq_pi =
3750*4882a593Smuzhiyun 		(pqi_index_t __iomem *)&admin_queues_aligned->oq_pi;
3751*4882a593Smuzhiyun 
3752*4882a593Smuzhiyun 	admin_queues->iq_element_array_bus_addr =
3753*4882a593Smuzhiyun 		ctrl_info->admin_queue_memory_base_dma_handle +
3754*4882a593Smuzhiyun 		(admin_queues->iq_element_array -
3755*4882a593Smuzhiyun 		ctrl_info->admin_queue_memory_base);
3756*4882a593Smuzhiyun 	admin_queues->oq_element_array_bus_addr =
3757*4882a593Smuzhiyun 		ctrl_info->admin_queue_memory_base_dma_handle +
3758*4882a593Smuzhiyun 		(admin_queues->oq_element_array -
3759*4882a593Smuzhiyun 		ctrl_info->admin_queue_memory_base);
3760*4882a593Smuzhiyun 	admin_queues->iq_ci_bus_addr =
3761*4882a593Smuzhiyun 		ctrl_info->admin_queue_memory_base_dma_handle +
3762*4882a593Smuzhiyun 		((void *)admin_queues->iq_ci -
3763*4882a593Smuzhiyun 		ctrl_info->admin_queue_memory_base);
3764*4882a593Smuzhiyun 	admin_queues->oq_pi_bus_addr =
3765*4882a593Smuzhiyun 		ctrl_info->admin_queue_memory_base_dma_handle +
3766*4882a593Smuzhiyun 		((void __iomem *)admin_queues->oq_pi -
3767*4882a593Smuzhiyun 		(void __iomem *)ctrl_info->admin_queue_memory_base);
3768*4882a593Smuzhiyun 
3769*4882a593Smuzhiyun 	return 0;
3770*4882a593Smuzhiyun }
3771*4882a593Smuzhiyun 
3772*4882a593Smuzhiyun #define PQI_ADMIN_QUEUE_CREATE_TIMEOUT_JIFFIES		PQI_HZ
3773*4882a593Smuzhiyun #define PQI_ADMIN_QUEUE_CREATE_POLL_INTERVAL_MSECS	1
3774*4882a593Smuzhiyun 
pqi_create_admin_queues(struct pqi_ctrl_info * ctrl_info)3775*4882a593Smuzhiyun static int pqi_create_admin_queues(struct pqi_ctrl_info *ctrl_info)
3776*4882a593Smuzhiyun {
3777*4882a593Smuzhiyun 	struct pqi_device_registers __iomem *pqi_registers;
3778*4882a593Smuzhiyun 	struct pqi_admin_queues *admin_queues;
3779*4882a593Smuzhiyun 	unsigned long timeout;
3780*4882a593Smuzhiyun 	u8 status;
3781*4882a593Smuzhiyun 	u32 reg;
3782*4882a593Smuzhiyun 
3783*4882a593Smuzhiyun 	pqi_registers = ctrl_info->pqi_registers;
3784*4882a593Smuzhiyun 	admin_queues = &ctrl_info->admin_queues;
3785*4882a593Smuzhiyun 
3786*4882a593Smuzhiyun 	writeq((u64)admin_queues->iq_element_array_bus_addr,
3787*4882a593Smuzhiyun 		&pqi_registers->admin_iq_element_array_addr);
3788*4882a593Smuzhiyun 	writeq((u64)admin_queues->oq_element_array_bus_addr,
3789*4882a593Smuzhiyun 		&pqi_registers->admin_oq_element_array_addr);
3790*4882a593Smuzhiyun 	writeq((u64)admin_queues->iq_ci_bus_addr,
3791*4882a593Smuzhiyun 		&pqi_registers->admin_iq_ci_addr);
3792*4882a593Smuzhiyun 	writeq((u64)admin_queues->oq_pi_bus_addr,
3793*4882a593Smuzhiyun 		&pqi_registers->admin_oq_pi_addr);
3794*4882a593Smuzhiyun 
3795*4882a593Smuzhiyun 	reg = PQI_ADMIN_IQ_NUM_ELEMENTS |
3796*4882a593Smuzhiyun 		(PQI_ADMIN_OQ_NUM_ELEMENTS << 8) |
3797*4882a593Smuzhiyun 		(admin_queues->int_msg_num << 16);
3798*4882a593Smuzhiyun 	writel(reg, &pqi_registers->admin_iq_num_elements);
3799*4882a593Smuzhiyun 	writel(PQI_CREATE_ADMIN_QUEUE_PAIR,
3800*4882a593Smuzhiyun 		&pqi_registers->function_and_status_code);
3801*4882a593Smuzhiyun 
3802*4882a593Smuzhiyun 	timeout = PQI_ADMIN_QUEUE_CREATE_TIMEOUT_JIFFIES + jiffies;
3803*4882a593Smuzhiyun 	while (1) {
3804*4882a593Smuzhiyun 		status = readb(&pqi_registers->function_and_status_code);
3805*4882a593Smuzhiyun 		if (status == PQI_STATUS_IDLE)
3806*4882a593Smuzhiyun 			break;
3807*4882a593Smuzhiyun 		if (time_after(jiffies, timeout))
3808*4882a593Smuzhiyun 			return -ETIMEDOUT;
3809*4882a593Smuzhiyun 		msleep(PQI_ADMIN_QUEUE_CREATE_POLL_INTERVAL_MSECS);
3810*4882a593Smuzhiyun 	}
3811*4882a593Smuzhiyun 
3812*4882a593Smuzhiyun 	/*
3813*4882a593Smuzhiyun 	 * The offset registers are not initialized to the correct
3814*4882a593Smuzhiyun 	 * offsets until *after* the create admin queue pair command
3815*4882a593Smuzhiyun 	 * completes successfully.
3816*4882a593Smuzhiyun 	 */
3817*4882a593Smuzhiyun 	admin_queues->iq_pi = ctrl_info->iomem_base +
3818*4882a593Smuzhiyun 		PQI_DEVICE_REGISTERS_OFFSET +
3819*4882a593Smuzhiyun 		readq(&pqi_registers->admin_iq_pi_offset);
3820*4882a593Smuzhiyun 	admin_queues->oq_ci = ctrl_info->iomem_base +
3821*4882a593Smuzhiyun 		PQI_DEVICE_REGISTERS_OFFSET +
3822*4882a593Smuzhiyun 		readq(&pqi_registers->admin_oq_ci_offset);
3823*4882a593Smuzhiyun 
3824*4882a593Smuzhiyun 	return 0;
3825*4882a593Smuzhiyun }
3826*4882a593Smuzhiyun 
pqi_submit_admin_request(struct pqi_ctrl_info * ctrl_info,struct pqi_general_admin_request * request)3827*4882a593Smuzhiyun static void pqi_submit_admin_request(struct pqi_ctrl_info *ctrl_info,
3828*4882a593Smuzhiyun 	struct pqi_general_admin_request *request)
3829*4882a593Smuzhiyun {
3830*4882a593Smuzhiyun 	struct pqi_admin_queues *admin_queues;
3831*4882a593Smuzhiyun 	void *next_element;
3832*4882a593Smuzhiyun 	pqi_index_t iq_pi;
3833*4882a593Smuzhiyun 
3834*4882a593Smuzhiyun 	admin_queues = &ctrl_info->admin_queues;
3835*4882a593Smuzhiyun 	iq_pi = admin_queues->iq_pi_copy;
3836*4882a593Smuzhiyun 
3837*4882a593Smuzhiyun 	next_element = admin_queues->iq_element_array +
3838*4882a593Smuzhiyun 		(iq_pi * PQI_ADMIN_IQ_ELEMENT_LENGTH);
3839*4882a593Smuzhiyun 
3840*4882a593Smuzhiyun 	memcpy(next_element, request, sizeof(*request));
3841*4882a593Smuzhiyun 
3842*4882a593Smuzhiyun 	iq_pi = (iq_pi + 1) % PQI_ADMIN_IQ_NUM_ELEMENTS;
3843*4882a593Smuzhiyun 	admin_queues->iq_pi_copy = iq_pi;
3844*4882a593Smuzhiyun 
3845*4882a593Smuzhiyun 	/*
3846*4882a593Smuzhiyun 	 * This write notifies the controller that an IU is available to be
3847*4882a593Smuzhiyun 	 * processed.
3848*4882a593Smuzhiyun 	 */
3849*4882a593Smuzhiyun 	writel(iq_pi, admin_queues->iq_pi);
3850*4882a593Smuzhiyun }
3851*4882a593Smuzhiyun 
3852*4882a593Smuzhiyun #define PQI_ADMIN_REQUEST_TIMEOUT_SECS	60
3853*4882a593Smuzhiyun 
pqi_poll_for_admin_response(struct pqi_ctrl_info * ctrl_info,struct pqi_general_admin_response * response)3854*4882a593Smuzhiyun static int pqi_poll_for_admin_response(struct pqi_ctrl_info *ctrl_info,
3855*4882a593Smuzhiyun 	struct pqi_general_admin_response *response)
3856*4882a593Smuzhiyun {
3857*4882a593Smuzhiyun 	struct pqi_admin_queues *admin_queues;
3858*4882a593Smuzhiyun 	pqi_index_t oq_pi;
3859*4882a593Smuzhiyun 	pqi_index_t oq_ci;
3860*4882a593Smuzhiyun 	unsigned long timeout;
3861*4882a593Smuzhiyun 
3862*4882a593Smuzhiyun 	admin_queues = &ctrl_info->admin_queues;
3863*4882a593Smuzhiyun 	oq_ci = admin_queues->oq_ci_copy;
3864*4882a593Smuzhiyun 
3865*4882a593Smuzhiyun 	timeout = (PQI_ADMIN_REQUEST_TIMEOUT_SECS * PQI_HZ) + jiffies;
3866*4882a593Smuzhiyun 
3867*4882a593Smuzhiyun 	while (1) {
3868*4882a593Smuzhiyun 		oq_pi = readl(admin_queues->oq_pi);
3869*4882a593Smuzhiyun 		if (oq_pi != oq_ci)
3870*4882a593Smuzhiyun 			break;
3871*4882a593Smuzhiyun 		if (time_after(jiffies, timeout)) {
3872*4882a593Smuzhiyun 			dev_err(&ctrl_info->pci_dev->dev,
3873*4882a593Smuzhiyun 				"timed out waiting for admin response\n");
3874*4882a593Smuzhiyun 			return -ETIMEDOUT;
3875*4882a593Smuzhiyun 		}
3876*4882a593Smuzhiyun 		if (!sis_is_firmware_running(ctrl_info))
3877*4882a593Smuzhiyun 			return -ENXIO;
3878*4882a593Smuzhiyun 		usleep_range(1000, 2000);
3879*4882a593Smuzhiyun 	}
3880*4882a593Smuzhiyun 
3881*4882a593Smuzhiyun 	memcpy(response, admin_queues->oq_element_array +
3882*4882a593Smuzhiyun 		(oq_ci * PQI_ADMIN_OQ_ELEMENT_LENGTH), sizeof(*response));
3883*4882a593Smuzhiyun 
3884*4882a593Smuzhiyun 	oq_ci = (oq_ci + 1) % PQI_ADMIN_OQ_NUM_ELEMENTS;
3885*4882a593Smuzhiyun 	admin_queues->oq_ci_copy = oq_ci;
3886*4882a593Smuzhiyun 	writel(oq_ci, admin_queues->oq_ci);
3887*4882a593Smuzhiyun 
3888*4882a593Smuzhiyun 	return 0;
3889*4882a593Smuzhiyun }
3890*4882a593Smuzhiyun 
pqi_start_io(struct pqi_ctrl_info * ctrl_info,struct pqi_queue_group * queue_group,enum pqi_io_path path,struct pqi_io_request * io_request)3891*4882a593Smuzhiyun static void pqi_start_io(struct pqi_ctrl_info *ctrl_info,
3892*4882a593Smuzhiyun 	struct pqi_queue_group *queue_group, enum pqi_io_path path,
3893*4882a593Smuzhiyun 	struct pqi_io_request *io_request)
3894*4882a593Smuzhiyun {
3895*4882a593Smuzhiyun 	struct pqi_io_request *next;
3896*4882a593Smuzhiyun 	void *next_element;
3897*4882a593Smuzhiyun 	pqi_index_t iq_pi;
3898*4882a593Smuzhiyun 	pqi_index_t iq_ci;
3899*4882a593Smuzhiyun 	size_t iu_length;
3900*4882a593Smuzhiyun 	unsigned long flags;
3901*4882a593Smuzhiyun 	unsigned int num_elements_needed;
3902*4882a593Smuzhiyun 	unsigned int num_elements_to_end_of_queue;
3903*4882a593Smuzhiyun 	size_t copy_count;
3904*4882a593Smuzhiyun 	struct pqi_iu_header *request;
3905*4882a593Smuzhiyun 
3906*4882a593Smuzhiyun 	spin_lock_irqsave(&queue_group->submit_lock[path], flags);
3907*4882a593Smuzhiyun 
3908*4882a593Smuzhiyun 	if (io_request) {
3909*4882a593Smuzhiyun 		io_request->queue_group = queue_group;
3910*4882a593Smuzhiyun 		list_add_tail(&io_request->request_list_entry,
3911*4882a593Smuzhiyun 			&queue_group->request_list[path]);
3912*4882a593Smuzhiyun 	}
3913*4882a593Smuzhiyun 
3914*4882a593Smuzhiyun 	iq_pi = queue_group->iq_pi_copy[path];
3915*4882a593Smuzhiyun 
3916*4882a593Smuzhiyun 	list_for_each_entry_safe(io_request, next,
3917*4882a593Smuzhiyun 		&queue_group->request_list[path], request_list_entry) {
3918*4882a593Smuzhiyun 
3919*4882a593Smuzhiyun 		request = io_request->iu;
3920*4882a593Smuzhiyun 
3921*4882a593Smuzhiyun 		iu_length = get_unaligned_le16(&request->iu_length) +
3922*4882a593Smuzhiyun 			PQI_REQUEST_HEADER_LENGTH;
3923*4882a593Smuzhiyun 		num_elements_needed =
3924*4882a593Smuzhiyun 			DIV_ROUND_UP(iu_length,
3925*4882a593Smuzhiyun 				PQI_OPERATIONAL_IQ_ELEMENT_LENGTH);
3926*4882a593Smuzhiyun 
3927*4882a593Smuzhiyun 		iq_ci = readl(queue_group->iq_ci[path]);
3928*4882a593Smuzhiyun 
3929*4882a593Smuzhiyun 		if (num_elements_needed > pqi_num_elements_free(iq_pi, iq_ci,
3930*4882a593Smuzhiyun 			ctrl_info->num_elements_per_iq))
3931*4882a593Smuzhiyun 			break;
3932*4882a593Smuzhiyun 
3933*4882a593Smuzhiyun 		put_unaligned_le16(queue_group->oq_id,
3934*4882a593Smuzhiyun 			&request->response_queue_id);
3935*4882a593Smuzhiyun 
3936*4882a593Smuzhiyun 		next_element = queue_group->iq_element_array[path] +
3937*4882a593Smuzhiyun 			(iq_pi * PQI_OPERATIONAL_IQ_ELEMENT_LENGTH);
3938*4882a593Smuzhiyun 
3939*4882a593Smuzhiyun 		num_elements_to_end_of_queue =
3940*4882a593Smuzhiyun 			ctrl_info->num_elements_per_iq - iq_pi;
3941*4882a593Smuzhiyun 
3942*4882a593Smuzhiyun 		if (num_elements_needed <= num_elements_to_end_of_queue) {
3943*4882a593Smuzhiyun 			memcpy(next_element, request, iu_length);
3944*4882a593Smuzhiyun 		} else {
3945*4882a593Smuzhiyun 			copy_count = num_elements_to_end_of_queue *
3946*4882a593Smuzhiyun 				PQI_OPERATIONAL_IQ_ELEMENT_LENGTH;
3947*4882a593Smuzhiyun 			memcpy(next_element, request, copy_count);
3948*4882a593Smuzhiyun 			memcpy(queue_group->iq_element_array[path],
3949*4882a593Smuzhiyun 				(u8 *)request + copy_count,
3950*4882a593Smuzhiyun 				iu_length - copy_count);
3951*4882a593Smuzhiyun 		}
3952*4882a593Smuzhiyun 
3953*4882a593Smuzhiyun 		iq_pi = (iq_pi + num_elements_needed) %
3954*4882a593Smuzhiyun 			ctrl_info->num_elements_per_iq;
3955*4882a593Smuzhiyun 
3956*4882a593Smuzhiyun 		list_del(&io_request->request_list_entry);
3957*4882a593Smuzhiyun 	}
3958*4882a593Smuzhiyun 
3959*4882a593Smuzhiyun 	if (iq_pi != queue_group->iq_pi_copy[path]) {
3960*4882a593Smuzhiyun 		queue_group->iq_pi_copy[path] = iq_pi;
3961*4882a593Smuzhiyun 		/*
3962*4882a593Smuzhiyun 		 * This write notifies the controller that one or more IUs are
3963*4882a593Smuzhiyun 		 * available to be processed.
3964*4882a593Smuzhiyun 		 */
3965*4882a593Smuzhiyun 		writel(iq_pi, queue_group->iq_pi[path]);
3966*4882a593Smuzhiyun 	}
3967*4882a593Smuzhiyun 
3968*4882a593Smuzhiyun 	spin_unlock_irqrestore(&queue_group->submit_lock[path], flags);
3969*4882a593Smuzhiyun }
3970*4882a593Smuzhiyun 
3971*4882a593Smuzhiyun #define PQI_WAIT_FOR_COMPLETION_IO_TIMEOUT_SECS		10
3972*4882a593Smuzhiyun 
pqi_wait_for_completion_io(struct pqi_ctrl_info * ctrl_info,struct completion * wait)3973*4882a593Smuzhiyun static int pqi_wait_for_completion_io(struct pqi_ctrl_info *ctrl_info,
3974*4882a593Smuzhiyun 	struct completion *wait)
3975*4882a593Smuzhiyun {
3976*4882a593Smuzhiyun 	int rc;
3977*4882a593Smuzhiyun 
3978*4882a593Smuzhiyun 	while (1) {
3979*4882a593Smuzhiyun 		if (wait_for_completion_io_timeout(wait,
3980*4882a593Smuzhiyun 			PQI_WAIT_FOR_COMPLETION_IO_TIMEOUT_SECS * PQI_HZ)) {
3981*4882a593Smuzhiyun 			rc = 0;
3982*4882a593Smuzhiyun 			break;
3983*4882a593Smuzhiyun 		}
3984*4882a593Smuzhiyun 
3985*4882a593Smuzhiyun 		pqi_check_ctrl_health(ctrl_info);
3986*4882a593Smuzhiyun 		if (pqi_ctrl_offline(ctrl_info)) {
3987*4882a593Smuzhiyun 			rc = -ENXIO;
3988*4882a593Smuzhiyun 			break;
3989*4882a593Smuzhiyun 		}
3990*4882a593Smuzhiyun 	}
3991*4882a593Smuzhiyun 
3992*4882a593Smuzhiyun 	return rc;
3993*4882a593Smuzhiyun }
3994*4882a593Smuzhiyun 
pqi_raid_synchronous_complete(struct pqi_io_request * io_request,void * context)3995*4882a593Smuzhiyun static void pqi_raid_synchronous_complete(struct pqi_io_request *io_request,
3996*4882a593Smuzhiyun 	void *context)
3997*4882a593Smuzhiyun {
3998*4882a593Smuzhiyun 	struct completion *waiting = context;
3999*4882a593Smuzhiyun 
4000*4882a593Smuzhiyun 	complete(waiting);
4001*4882a593Smuzhiyun }
4002*4882a593Smuzhiyun 
pqi_process_raid_io_error_synchronous(struct pqi_raid_error_info * error_info)4003*4882a593Smuzhiyun static int pqi_process_raid_io_error_synchronous(
4004*4882a593Smuzhiyun 	struct pqi_raid_error_info *error_info)
4005*4882a593Smuzhiyun {
4006*4882a593Smuzhiyun 	int rc = -EIO;
4007*4882a593Smuzhiyun 
4008*4882a593Smuzhiyun 	switch (error_info->data_out_result) {
4009*4882a593Smuzhiyun 	case PQI_DATA_IN_OUT_GOOD:
4010*4882a593Smuzhiyun 		if (error_info->status == SAM_STAT_GOOD)
4011*4882a593Smuzhiyun 			rc = 0;
4012*4882a593Smuzhiyun 		break;
4013*4882a593Smuzhiyun 	case PQI_DATA_IN_OUT_UNDERFLOW:
4014*4882a593Smuzhiyun 		if (error_info->status == SAM_STAT_GOOD ||
4015*4882a593Smuzhiyun 			error_info->status == SAM_STAT_CHECK_CONDITION)
4016*4882a593Smuzhiyun 			rc = 0;
4017*4882a593Smuzhiyun 		break;
4018*4882a593Smuzhiyun 	case PQI_DATA_IN_OUT_ABORTED:
4019*4882a593Smuzhiyun 		rc = PQI_CMD_STATUS_ABORTED;
4020*4882a593Smuzhiyun 		break;
4021*4882a593Smuzhiyun 	}
4022*4882a593Smuzhiyun 
4023*4882a593Smuzhiyun 	return rc;
4024*4882a593Smuzhiyun }
4025*4882a593Smuzhiyun 
pqi_submit_raid_request_synchronous(struct pqi_ctrl_info * ctrl_info,struct pqi_iu_header * request,unsigned int flags,struct pqi_raid_error_info * error_info,unsigned long timeout_msecs)4026*4882a593Smuzhiyun static int pqi_submit_raid_request_synchronous(struct pqi_ctrl_info *ctrl_info,
4027*4882a593Smuzhiyun 	struct pqi_iu_header *request, unsigned int flags,
4028*4882a593Smuzhiyun 	struct pqi_raid_error_info *error_info, unsigned long timeout_msecs)
4029*4882a593Smuzhiyun {
4030*4882a593Smuzhiyun 	int rc = 0;
4031*4882a593Smuzhiyun 	struct pqi_io_request *io_request;
4032*4882a593Smuzhiyun 	unsigned long start_jiffies;
4033*4882a593Smuzhiyun 	unsigned long msecs_blocked;
4034*4882a593Smuzhiyun 	size_t iu_length;
4035*4882a593Smuzhiyun 	DECLARE_COMPLETION_ONSTACK(wait);
4036*4882a593Smuzhiyun 
4037*4882a593Smuzhiyun 	/*
4038*4882a593Smuzhiyun 	 * Note that specifying PQI_SYNC_FLAGS_INTERRUPTABLE and a timeout value
4039*4882a593Smuzhiyun 	 * are mutually exclusive.
4040*4882a593Smuzhiyun 	 */
4041*4882a593Smuzhiyun 
4042*4882a593Smuzhiyun 	if (flags & PQI_SYNC_FLAGS_INTERRUPTABLE) {
4043*4882a593Smuzhiyun 		if (down_interruptible(&ctrl_info->sync_request_sem))
4044*4882a593Smuzhiyun 			return -ERESTARTSYS;
4045*4882a593Smuzhiyun 	} else {
4046*4882a593Smuzhiyun 		if (timeout_msecs == NO_TIMEOUT) {
4047*4882a593Smuzhiyun 			down(&ctrl_info->sync_request_sem);
4048*4882a593Smuzhiyun 		} else {
4049*4882a593Smuzhiyun 			start_jiffies = jiffies;
4050*4882a593Smuzhiyun 			if (down_timeout(&ctrl_info->sync_request_sem,
4051*4882a593Smuzhiyun 				msecs_to_jiffies(timeout_msecs)))
4052*4882a593Smuzhiyun 				return -ETIMEDOUT;
4053*4882a593Smuzhiyun 			msecs_blocked =
4054*4882a593Smuzhiyun 				jiffies_to_msecs(jiffies - start_jiffies);
4055*4882a593Smuzhiyun 			if (msecs_blocked >= timeout_msecs) {
4056*4882a593Smuzhiyun 				rc = -ETIMEDOUT;
4057*4882a593Smuzhiyun 				goto out;
4058*4882a593Smuzhiyun 			}
4059*4882a593Smuzhiyun 			timeout_msecs -= msecs_blocked;
4060*4882a593Smuzhiyun 		}
4061*4882a593Smuzhiyun 	}
4062*4882a593Smuzhiyun 
4063*4882a593Smuzhiyun 	pqi_ctrl_busy(ctrl_info);
4064*4882a593Smuzhiyun 	timeout_msecs = pqi_wait_if_ctrl_blocked(ctrl_info, timeout_msecs);
4065*4882a593Smuzhiyun 	if (timeout_msecs == 0) {
4066*4882a593Smuzhiyun 		pqi_ctrl_unbusy(ctrl_info);
4067*4882a593Smuzhiyun 		rc = -ETIMEDOUT;
4068*4882a593Smuzhiyun 		goto out;
4069*4882a593Smuzhiyun 	}
4070*4882a593Smuzhiyun 
4071*4882a593Smuzhiyun 	if (pqi_ctrl_offline(ctrl_info)) {
4072*4882a593Smuzhiyun 		pqi_ctrl_unbusy(ctrl_info);
4073*4882a593Smuzhiyun 		rc = -ENXIO;
4074*4882a593Smuzhiyun 		goto out;
4075*4882a593Smuzhiyun 	}
4076*4882a593Smuzhiyun 
4077*4882a593Smuzhiyun 	atomic_inc(&ctrl_info->sync_cmds_outstanding);
4078*4882a593Smuzhiyun 
4079*4882a593Smuzhiyun 	io_request = pqi_alloc_io_request(ctrl_info);
4080*4882a593Smuzhiyun 
4081*4882a593Smuzhiyun 	put_unaligned_le16(io_request->index,
4082*4882a593Smuzhiyun 		&(((struct pqi_raid_path_request *)request)->request_id));
4083*4882a593Smuzhiyun 
4084*4882a593Smuzhiyun 	if (request->iu_type == PQI_REQUEST_IU_RAID_PATH_IO)
4085*4882a593Smuzhiyun 		((struct pqi_raid_path_request *)request)->error_index =
4086*4882a593Smuzhiyun 			((struct pqi_raid_path_request *)request)->request_id;
4087*4882a593Smuzhiyun 
4088*4882a593Smuzhiyun 	iu_length = get_unaligned_le16(&request->iu_length) +
4089*4882a593Smuzhiyun 		PQI_REQUEST_HEADER_LENGTH;
4090*4882a593Smuzhiyun 	memcpy(io_request->iu, request, iu_length);
4091*4882a593Smuzhiyun 
4092*4882a593Smuzhiyun 	io_request->io_complete_callback = pqi_raid_synchronous_complete;
4093*4882a593Smuzhiyun 	io_request->context = &wait;
4094*4882a593Smuzhiyun 
4095*4882a593Smuzhiyun 	pqi_start_io(ctrl_info,
4096*4882a593Smuzhiyun 		&ctrl_info->queue_groups[PQI_DEFAULT_QUEUE_GROUP], RAID_PATH,
4097*4882a593Smuzhiyun 		io_request);
4098*4882a593Smuzhiyun 
4099*4882a593Smuzhiyun 	pqi_ctrl_unbusy(ctrl_info);
4100*4882a593Smuzhiyun 
4101*4882a593Smuzhiyun 	if (timeout_msecs == NO_TIMEOUT) {
4102*4882a593Smuzhiyun 		pqi_wait_for_completion_io(ctrl_info, &wait);
4103*4882a593Smuzhiyun 	} else {
4104*4882a593Smuzhiyun 		if (!wait_for_completion_io_timeout(&wait,
4105*4882a593Smuzhiyun 			msecs_to_jiffies(timeout_msecs))) {
4106*4882a593Smuzhiyun 			dev_warn(&ctrl_info->pci_dev->dev,
4107*4882a593Smuzhiyun 				"command timed out\n");
4108*4882a593Smuzhiyun 			rc = -ETIMEDOUT;
4109*4882a593Smuzhiyun 		}
4110*4882a593Smuzhiyun 	}
4111*4882a593Smuzhiyun 
4112*4882a593Smuzhiyun 	if (error_info) {
4113*4882a593Smuzhiyun 		if (io_request->error_info)
4114*4882a593Smuzhiyun 			memcpy(error_info, io_request->error_info,
4115*4882a593Smuzhiyun 				sizeof(*error_info));
4116*4882a593Smuzhiyun 		else
4117*4882a593Smuzhiyun 			memset(error_info, 0, sizeof(*error_info));
4118*4882a593Smuzhiyun 	} else if (rc == 0 && io_request->error_info) {
4119*4882a593Smuzhiyun 		rc = pqi_process_raid_io_error_synchronous(
4120*4882a593Smuzhiyun 			io_request->error_info);
4121*4882a593Smuzhiyun 	}
4122*4882a593Smuzhiyun 
4123*4882a593Smuzhiyun 	pqi_free_io_request(io_request);
4124*4882a593Smuzhiyun 
4125*4882a593Smuzhiyun 	atomic_dec(&ctrl_info->sync_cmds_outstanding);
4126*4882a593Smuzhiyun out:
4127*4882a593Smuzhiyun 	up(&ctrl_info->sync_request_sem);
4128*4882a593Smuzhiyun 
4129*4882a593Smuzhiyun 	return rc;
4130*4882a593Smuzhiyun }
4131*4882a593Smuzhiyun 
pqi_validate_admin_response(struct pqi_general_admin_response * response,u8 expected_function_code)4132*4882a593Smuzhiyun static int pqi_validate_admin_response(
4133*4882a593Smuzhiyun 	struct pqi_general_admin_response *response, u8 expected_function_code)
4134*4882a593Smuzhiyun {
4135*4882a593Smuzhiyun 	if (response->header.iu_type != PQI_RESPONSE_IU_GENERAL_ADMIN)
4136*4882a593Smuzhiyun 		return -EINVAL;
4137*4882a593Smuzhiyun 
4138*4882a593Smuzhiyun 	if (get_unaligned_le16(&response->header.iu_length) !=
4139*4882a593Smuzhiyun 		PQI_GENERAL_ADMIN_IU_LENGTH)
4140*4882a593Smuzhiyun 		return -EINVAL;
4141*4882a593Smuzhiyun 
4142*4882a593Smuzhiyun 	if (response->function_code != expected_function_code)
4143*4882a593Smuzhiyun 		return -EINVAL;
4144*4882a593Smuzhiyun 
4145*4882a593Smuzhiyun 	if (response->status != PQI_GENERAL_ADMIN_STATUS_SUCCESS)
4146*4882a593Smuzhiyun 		return -EINVAL;
4147*4882a593Smuzhiyun 
4148*4882a593Smuzhiyun 	return 0;
4149*4882a593Smuzhiyun }
4150*4882a593Smuzhiyun 
pqi_submit_admin_request_synchronous(struct pqi_ctrl_info * ctrl_info,struct pqi_general_admin_request * request,struct pqi_general_admin_response * response)4151*4882a593Smuzhiyun static int pqi_submit_admin_request_synchronous(
4152*4882a593Smuzhiyun 	struct pqi_ctrl_info *ctrl_info,
4153*4882a593Smuzhiyun 	struct pqi_general_admin_request *request,
4154*4882a593Smuzhiyun 	struct pqi_general_admin_response *response)
4155*4882a593Smuzhiyun {
4156*4882a593Smuzhiyun 	int rc;
4157*4882a593Smuzhiyun 
4158*4882a593Smuzhiyun 	pqi_submit_admin_request(ctrl_info, request);
4159*4882a593Smuzhiyun 
4160*4882a593Smuzhiyun 	rc = pqi_poll_for_admin_response(ctrl_info, response);
4161*4882a593Smuzhiyun 
4162*4882a593Smuzhiyun 	if (rc == 0)
4163*4882a593Smuzhiyun 		rc = pqi_validate_admin_response(response,
4164*4882a593Smuzhiyun 			request->function_code);
4165*4882a593Smuzhiyun 
4166*4882a593Smuzhiyun 	return rc;
4167*4882a593Smuzhiyun }
4168*4882a593Smuzhiyun 
pqi_report_device_capability(struct pqi_ctrl_info * ctrl_info)4169*4882a593Smuzhiyun static int pqi_report_device_capability(struct pqi_ctrl_info *ctrl_info)
4170*4882a593Smuzhiyun {
4171*4882a593Smuzhiyun 	int rc;
4172*4882a593Smuzhiyun 	struct pqi_general_admin_request request;
4173*4882a593Smuzhiyun 	struct pqi_general_admin_response response;
4174*4882a593Smuzhiyun 	struct pqi_device_capability *capability;
4175*4882a593Smuzhiyun 	struct pqi_iu_layer_descriptor *sop_iu_layer_descriptor;
4176*4882a593Smuzhiyun 
4177*4882a593Smuzhiyun 	capability = kmalloc(sizeof(*capability), GFP_KERNEL);
4178*4882a593Smuzhiyun 	if (!capability)
4179*4882a593Smuzhiyun 		return -ENOMEM;
4180*4882a593Smuzhiyun 
4181*4882a593Smuzhiyun 	memset(&request, 0, sizeof(request));
4182*4882a593Smuzhiyun 
4183*4882a593Smuzhiyun 	request.header.iu_type = PQI_REQUEST_IU_GENERAL_ADMIN;
4184*4882a593Smuzhiyun 	put_unaligned_le16(PQI_GENERAL_ADMIN_IU_LENGTH,
4185*4882a593Smuzhiyun 		&request.header.iu_length);
4186*4882a593Smuzhiyun 	request.function_code =
4187*4882a593Smuzhiyun 		PQI_GENERAL_ADMIN_FUNCTION_REPORT_DEVICE_CAPABILITY;
4188*4882a593Smuzhiyun 	put_unaligned_le32(sizeof(*capability),
4189*4882a593Smuzhiyun 		&request.data.report_device_capability.buffer_length);
4190*4882a593Smuzhiyun 
4191*4882a593Smuzhiyun 	rc = pqi_map_single(ctrl_info->pci_dev,
4192*4882a593Smuzhiyun 		&request.data.report_device_capability.sg_descriptor,
4193*4882a593Smuzhiyun 		capability, sizeof(*capability),
4194*4882a593Smuzhiyun 		DMA_FROM_DEVICE);
4195*4882a593Smuzhiyun 	if (rc)
4196*4882a593Smuzhiyun 		goto out;
4197*4882a593Smuzhiyun 
4198*4882a593Smuzhiyun 	rc = pqi_submit_admin_request_synchronous(ctrl_info, &request,
4199*4882a593Smuzhiyun 		&response);
4200*4882a593Smuzhiyun 
4201*4882a593Smuzhiyun 	pqi_pci_unmap(ctrl_info->pci_dev,
4202*4882a593Smuzhiyun 		&request.data.report_device_capability.sg_descriptor, 1,
4203*4882a593Smuzhiyun 		DMA_FROM_DEVICE);
4204*4882a593Smuzhiyun 
4205*4882a593Smuzhiyun 	if (rc)
4206*4882a593Smuzhiyun 		goto out;
4207*4882a593Smuzhiyun 
4208*4882a593Smuzhiyun 	if (response.status != PQI_GENERAL_ADMIN_STATUS_SUCCESS) {
4209*4882a593Smuzhiyun 		rc = -EIO;
4210*4882a593Smuzhiyun 		goto out;
4211*4882a593Smuzhiyun 	}
4212*4882a593Smuzhiyun 
4213*4882a593Smuzhiyun 	ctrl_info->max_inbound_queues =
4214*4882a593Smuzhiyun 		get_unaligned_le16(&capability->max_inbound_queues);
4215*4882a593Smuzhiyun 	ctrl_info->max_elements_per_iq =
4216*4882a593Smuzhiyun 		get_unaligned_le16(&capability->max_elements_per_iq);
4217*4882a593Smuzhiyun 	ctrl_info->max_iq_element_length =
4218*4882a593Smuzhiyun 		get_unaligned_le16(&capability->max_iq_element_length)
4219*4882a593Smuzhiyun 		* 16;
4220*4882a593Smuzhiyun 	ctrl_info->max_outbound_queues =
4221*4882a593Smuzhiyun 		get_unaligned_le16(&capability->max_outbound_queues);
4222*4882a593Smuzhiyun 	ctrl_info->max_elements_per_oq =
4223*4882a593Smuzhiyun 		get_unaligned_le16(&capability->max_elements_per_oq);
4224*4882a593Smuzhiyun 	ctrl_info->max_oq_element_length =
4225*4882a593Smuzhiyun 		get_unaligned_le16(&capability->max_oq_element_length)
4226*4882a593Smuzhiyun 		* 16;
4227*4882a593Smuzhiyun 
4228*4882a593Smuzhiyun 	sop_iu_layer_descriptor =
4229*4882a593Smuzhiyun 		&capability->iu_layer_descriptors[PQI_PROTOCOL_SOP];
4230*4882a593Smuzhiyun 
4231*4882a593Smuzhiyun 	ctrl_info->max_inbound_iu_length_per_firmware =
4232*4882a593Smuzhiyun 		get_unaligned_le16(
4233*4882a593Smuzhiyun 			&sop_iu_layer_descriptor->max_inbound_iu_length);
4234*4882a593Smuzhiyun 	ctrl_info->inbound_spanning_supported =
4235*4882a593Smuzhiyun 		sop_iu_layer_descriptor->inbound_spanning_supported;
4236*4882a593Smuzhiyun 	ctrl_info->outbound_spanning_supported =
4237*4882a593Smuzhiyun 		sop_iu_layer_descriptor->outbound_spanning_supported;
4238*4882a593Smuzhiyun 
4239*4882a593Smuzhiyun out:
4240*4882a593Smuzhiyun 	kfree(capability);
4241*4882a593Smuzhiyun 
4242*4882a593Smuzhiyun 	return rc;
4243*4882a593Smuzhiyun }
4244*4882a593Smuzhiyun 
pqi_validate_device_capability(struct pqi_ctrl_info * ctrl_info)4245*4882a593Smuzhiyun static int pqi_validate_device_capability(struct pqi_ctrl_info *ctrl_info)
4246*4882a593Smuzhiyun {
4247*4882a593Smuzhiyun 	if (ctrl_info->max_iq_element_length <
4248*4882a593Smuzhiyun 		PQI_OPERATIONAL_IQ_ELEMENT_LENGTH) {
4249*4882a593Smuzhiyun 		dev_err(&ctrl_info->pci_dev->dev,
4250*4882a593Smuzhiyun 			"max. inbound queue element length of %d is less than the required length of %d\n",
4251*4882a593Smuzhiyun 			ctrl_info->max_iq_element_length,
4252*4882a593Smuzhiyun 			PQI_OPERATIONAL_IQ_ELEMENT_LENGTH);
4253*4882a593Smuzhiyun 		return -EINVAL;
4254*4882a593Smuzhiyun 	}
4255*4882a593Smuzhiyun 
4256*4882a593Smuzhiyun 	if (ctrl_info->max_oq_element_length <
4257*4882a593Smuzhiyun 		PQI_OPERATIONAL_OQ_ELEMENT_LENGTH) {
4258*4882a593Smuzhiyun 		dev_err(&ctrl_info->pci_dev->dev,
4259*4882a593Smuzhiyun 			"max. outbound queue element length of %d is less than the required length of %d\n",
4260*4882a593Smuzhiyun 			ctrl_info->max_oq_element_length,
4261*4882a593Smuzhiyun 			PQI_OPERATIONAL_OQ_ELEMENT_LENGTH);
4262*4882a593Smuzhiyun 		return -EINVAL;
4263*4882a593Smuzhiyun 	}
4264*4882a593Smuzhiyun 
4265*4882a593Smuzhiyun 	if (ctrl_info->max_inbound_iu_length_per_firmware <
4266*4882a593Smuzhiyun 		PQI_OPERATIONAL_IQ_ELEMENT_LENGTH) {
4267*4882a593Smuzhiyun 		dev_err(&ctrl_info->pci_dev->dev,
4268*4882a593Smuzhiyun 			"max. inbound IU length of %u is less than the min. required length of %d\n",
4269*4882a593Smuzhiyun 			ctrl_info->max_inbound_iu_length_per_firmware,
4270*4882a593Smuzhiyun 			PQI_OPERATIONAL_IQ_ELEMENT_LENGTH);
4271*4882a593Smuzhiyun 		return -EINVAL;
4272*4882a593Smuzhiyun 	}
4273*4882a593Smuzhiyun 
4274*4882a593Smuzhiyun 	if (!ctrl_info->inbound_spanning_supported) {
4275*4882a593Smuzhiyun 		dev_err(&ctrl_info->pci_dev->dev,
4276*4882a593Smuzhiyun 			"the controller does not support inbound spanning\n");
4277*4882a593Smuzhiyun 		return -EINVAL;
4278*4882a593Smuzhiyun 	}
4279*4882a593Smuzhiyun 
4280*4882a593Smuzhiyun 	if (ctrl_info->outbound_spanning_supported) {
4281*4882a593Smuzhiyun 		dev_err(&ctrl_info->pci_dev->dev,
4282*4882a593Smuzhiyun 			"the controller supports outbound spanning but this driver does not\n");
4283*4882a593Smuzhiyun 		return -EINVAL;
4284*4882a593Smuzhiyun 	}
4285*4882a593Smuzhiyun 
4286*4882a593Smuzhiyun 	return 0;
4287*4882a593Smuzhiyun }
4288*4882a593Smuzhiyun 
pqi_create_event_queue(struct pqi_ctrl_info * ctrl_info)4289*4882a593Smuzhiyun static int pqi_create_event_queue(struct pqi_ctrl_info *ctrl_info)
4290*4882a593Smuzhiyun {
4291*4882a593Smuzhiyun 	int rc;
4292*4882a593Smuzhiyun 	struct pqi_event_queue *event_queue;
4293*4882a593Smuzhiyun 	struct pqi_general_admin_request request;
4294*4882a593Smuzhiyun 	struct pqi_general_admin_response response;
4295*4882a593Smuzhiyun 
4296*4882a593Smuzhiyun 	event_queue = &ctrl_info->event_queue;
4297*4882a593Smuzhiyun 
4298*4882a593Smuzhiyun 	/*
4299*4882a593Smuzhiyun 	 * Create OQ (Outbound Queue - device to host queue) to dedicate
4300*4882a593Smuzhiyun 	 * to events.
4301*4882a593Smuzhiyun 	 */
4302*4882a593Smuzhiyun 	memset(&request, 0, sizeof(request));
4303*4882a593Smuzhiyun 	request.header.iu_type = PQI_REQUEST_IU_GENERAL_ADMIN;
4304*4882a593Smuzhiyun 	put_unaligned_le16(PQI_GENERAL_ADMIN_IU_LENGTH,
4305*4882a593Smuzhiyun 		&request.header.iu_length);
4306*4882a593Smuzhiyun 	request.function_code = PQI_GENERAL_ADMIN_FUNCTION_CREATE_OQ;
4307*4882a593Smuzhiyun 	put_unaligned_le16(event_queue->oq_id,
4308*4882a593Smuzhiyun 		&request.data.create_operational_oq.queue_id);
4309*4882a593Smuzhiyun 	put_unaligned_le64((u64)event_queue->oq_element_array_bus_addr,
4310*4882a593Smuzhiyun 		&request.data.create_operational_oq.element_array_addr);
4311*4882a593Smuzhiyun 	put_unaligned_le64((u64)event_queue->oq_pi_bus_addr,
4312*4882a593Smuzhiyun 		&request.data.create_operational_oq.pi_addr);
4313*4882a593Smuzhiyun 	put_unaligned_le16(PQI_NUM_EVENT_QUEUE_ELEMENTS,
4314*4882a593Smuzhiyun 		&request.data.create_operational_oq.num_elements);
4315*4882a593Smuzhiyun 	put_unaligned_le16(PQI_EVENT_OQ_ELEMENT_LENGTH / 16,
4316*4882a593Smuzhiyun 		&request.data.create_operational_oq.element_length);
4317*4882a593Smuzhiyun 	request.data.create_operational_oq.queue_protocol = PQI_PROTOCOL_SOP;
4318*4882a593Smuzhiyun 	put_unaligned_le16(event_queue->int_msg_num,
4319*4882a593Smuzhiyun 		&request.data.create_operational_oq.int_msg_num);
4320*4882a593Smuzhiyun 
4321*4882a593Smuzhiyun 	rc = pqi_submit_admin_request_synchronous(ctrl_info, &request,
4322*4882a593Smuzhiyun 		&response);
4323*4882a593Smuzhiyun 	if (rc)
4324*4882a593Smuzhiyun 		return rc;
4325*4882a593Smuzhiyun 
4326*4882a593Smuzhiyun 	event_queue->oq_ci = ctrl_info->iomem_base +
4327*4882a593Smuzhiyun 		PQI_DEVICE_REGISTERS_OFFSET +
4328*4882a593Smuzhiyun 		get_unaligned_le64(
4329*4882a593Smuzhiyun 			&response.data.create_operational_oq.oq_ci_offset);
4330*4882a593Smuzhiyun 
4331*4882a593Smuzhiyun 	return 0;
4332*4882a593Smuzhiyun }
4333*4882a593Smuzhiyun 
pqi_create_queue_group(struct pqi_ctrl_info * ctrl_info,unsigned int group_number)4334*4882a593Smuzhiyun static int pqi_create_queue_group(struct pqi_ctrl_info *ctrl_info,
4335*4882a593Smuzhiyun 	unsigned int group_number)
4336*4882a593Smuzhiyun {
4337*4882a593Smuzhiyun 	int rc;
4338*4882a593Smuzhiyun 	struct pqi_queue_group *queue_group;
4339*4882a593Smuzhiyun 	struct pqi_general_admin_request request;
4340*4882a593Smuzhiyun 	struct pqi_general_admin_response response;
4341*4882a593Smuzhiyun 
4342*4882a593Smuzhiyun 	queue_group = &ctrl_info->queue_groups[group_number];
4343*4882a593Smuzhiyun 
4344*4882a593Smuzhiyun 	/*
4345*4882a593Smuzhiyun 	 * Create IQ (Inbound Queue - host to device queue) for
4346*4882a593Smuzhiyun 	 * RAID path.
4347*4882a593Smuzhiyun 	 */
4348*4882a593Smuzhiyun 	memset(&request, 0, sizeof(request));
4349*4882a593Smuzhiyun 	request.header.iu_type = PQI_REQUEST_IU_GENERAL_ADMIN;
4350*4882a593Smuzhiyun 	put_unaligned_le16(PQI_GENERAL_ADMIN_IU_LENGTH,
4351*4882a593Smuzhiyun 		&request.header.iu_length);
4352*4882a593Smuzhiyun 	request.function_code = PQI_GENERAL_ADMIN_FUNCTION_CREATE_IQ;
4353*4882a593Smuzhiyun 	put_unaligned_le16(queue_group->iq_id[RAID_PATH],
4354*4882a593Smuzhiyun 		&request.data.create_operational_iq.queue_id);
4355*4882a593Smuzhiyun 	put_unaligned_le64(
4356*4882a593Smuzhiyun 		(u64)queue_group->iq_element_array_bus_addr[RAID_PATH],
4357*4882a593Smuzhiyun 		&request.data.create_operational_iq.element_array_addr);
4358*4882a593Smuzhiyun 	put_unaligned_le64((u64)queue_group->iq_ci_bus_addr[RAID_PATH],
4359*4882a593Smuzhiyun 		&request.data.create_operational_iq.ci_addr);
4360*4882a593Smuzhiyun 	put_unaligned_le16(ctrl_info->num_elements_per_iq,
4361*4882a593Smuzhiyun 		&request.data.create_operational_iq.num_elements);
4362*4882a593Smuzhiyun 	put_unaligned_le16(PQI_OPERATIONAL_IQ_ELEMENT_LENGTH / 16,
4363*4882a593Smuzhiyun 		&request.data.create_operational_iq.element_length);
4364*4882a593Smuzhiyun 	request.data.create_operational_iq.queue_protocol = PQI_PROTOCOL_SOP;
4365*4882a593Smuzhiyun 
4366*4882a593Smuzhiyun 	rc = pqi_submit_admin_request_synchronous(ctrl_info, &request,
4367*4882a593Smuzhiyun 		&response);
4368*4882a593Smuzhiyun 	if (rc) {
4369*4882a593Smuzhiyun 		dev_err(&ctrl_info->pci_dev->dev,
4370*4882a593Smuzhiyun 			"error creating inbound RAID queue\n");
4371*4882a593Smuzhiyun 		return rc;
4372*4882a593Smuzhiyun 	}
4373*4882a593Smuzhiyun 
4374*4882a593Smuzhiyun 	queue_group->iq_pi[RAID_PATH] = ctrl_info->iomem_base +
4375*4882a593Smuzhiyun 		PQI_DEVICE_REGISTERS_OFFSET +
4376*4882a593Smuzhiyun 		get_unaligned_le64(
4377*4882a593Smuzhiyun 			&response.data.create_operational_iq.iq_pi_offset);
4378*4882a593Smuzhiyun 
4379*4882a593Smuzhiyun 	/*
4380*4882a593Smuzhiyun 	 * Create IQ (Inbound Queue - host to device queue) for
4381*4882a593Smuzhiyun 	 * Advanced I/O (AIO) path.
4382*4882a593Smuzhiyun 	 */
4383*4882a593Smuzhiyun 	memset(&request, 0, sizeof(request));
4384*4882a593Smuzhiyun 	request.header.iu_type = PQI_REQUEST_IU_GENERAL_ADMIN;
4385*4882a593Smuzhiyun 	put_unaligned_le16(PQI_GENERAL_ADMIN_IU_LENGTH,
4386*4882a593Smuzhiyun 		&request.header.iu_length);
4387*4882a593Smuzhiyun 	request.function_code = PQI_GENERAL_ADMIN_FUNCTION_CREATE_IQ;
4388*4882a593Smuzhiyun 	put_unaligned_le16(queue_group->iq_id[AIO_PATH],
4389*4882a593Smuzhiyun 		&request.data.create_operational_iq.queue_id);
4390*4882a593Smuzhiyun 	put_unaligned_le64((u64)queue_group->
4391*4882a593Smuzhiyun 		iq_element_array_bus_addr[AIO_PATH],
4392*4882a593Smuzhiyun 		&request.data.create_operational_iq.element_array_addr);
4393*4882a593Smuzhiyun 	put_unaligned_le64((u64)queue_group->iq_ci_bus_addr[AIO_PATH],
4394*4882a593Smuzhiyun 		&request.data.create_operational_iq.ci_addr);
4395*4882a593Smuzhiyun 	put_unaligned_le16(ctrl_info->num_elements_per_iq,
4396*4882a593Smuzhiyun 		&request.data.create_operational_iq.num_elements);
4397*4882a593Smuzhiyun 	put_unaligned_le16(PQI_OPERATIONAL_IQ_ELEMENT_LENGTH / 16,
4398*4882a593Smuzhiyun 		&request.data.create_operational_iq.element_length);
4399*4882a593Smuzhiyun 	request.data.create_operational_iq.queue_protocol = PQI_PROTOCOL_SOP;
4400*4882a593Smuzhiyun 
4401*4882a593Smuzhiyun 	rc = pqi_submit_admin_request_synchronous(ctrl_info, &request,
4402*4882a593Smuzhiyun 		&response);
4403*4882a593Smuzhiyun 	if (rc) {
4404*4882a593Smuzhiyun 		dev_err(&ctrl_info->pci_dev->dev,
4405*4882a593Smuzhiyun 			"error creating inbound AIO queue\n");
4406*4882a593Smuzhiyun 		return rc;
4407*4882a593Smuzhiyun 	}
4408*4882a593Smuzhiyun 
4409*4882a593Smuzhiyun 	queue_group->iq_pi[AIO_PATH] = ctrl_info->iomem_base +
4410*4882a593Smuzhiyun 		PQI_DEVICE_REGISTERS_OFFSET +
4411*4882a593Smuzhiyun 		get_unaligned_le64(
4412*4882a593Smuzhiyun 			&response.data.create_operational_iq.iq_pi_offset);
4413*4882a593Smuzhiyun 
4414*4882a593Smuzhiyun 	/*
4415*4882a593Smuzhiyun 	 * Designate the 2nd IQ as the AIO path.  By default, all IQs are
4416*4882a593Smuzhiyun 	 * assumed to be for RAID path I/O unless we change the queue's
4417*4882a593Smuzhiyun 	 * property.
4418*4882a593Smuzhiyun 	 */
4419*4882a593Smuzhiyun 	memset(&request, 0, sizeof(request));
4420*4882a593Smuzhiyun 	request.header.iu_type = PQI_REQUEST_IU_GENERAL_ADMIN;
4421*4882a593Smuzhiyun 	put_unaligned_le16(PQI_GENERAL_ADMIN_IU_LENGTH,
4422*4882a593Smuzhiyun 		&request.header.iu_length);
4423*4882a593Smuzhiyun 	request.function_code = PQI_GENERAL_ADMIN_FUNCTION_CHANGE_IQ_PROPERTY;
4424*4882a593Smuzhiyun 	put_unaligned_le16(queue_group->iq_id[AIO_PATH],
4425*4882a593Smuzhiyun 		&request.data.change_operational_iq_properties.queue_id);
4426*4882a593Smuzhiyun 	put_unaligned_le32(PQI_IQ_PROPERTY_IS_AIO_QUEUE,
4427*4882a593Smuzhiyun 		&request.data.change_operational_iq_properties.vendor_specific);
4428*4882a593Smuzhiyun 
4429*4882a593Smuzhiyun 	rc = pqi_submit_admin_request_synchronous(ctrl_info, &request,
4430*4882a593Smuzhiyun 		&response);
4431*4882a593Smuzhiyun 	if (rc) {
4432*4882a593Smuzhiyun 		dev_err(&ctrl_info->pci_dev->dev,
4433*4882a593Smuzhiyun 			"error changing queue property\n");
4434*4882a593Smuzhiyun 		return rc;
4435*4882a593Smuzhiyun 	}
4436*4882a593Smuzhiyun 
4437*4882a593Smuzhiyun 	/*
4438*4882a593Smuzhiyun 	 * Create OQ (Outbound Queue - device to host queue).
4439*4882a593Smuzhiyun 	 */
4440*4882a593Smuzhiyun 	memset(&request, 0, sizeof(request));
4441*4882a593Smuzhiyun 	request.header.iu_type = PQI_REQUEST_IU_GENERAL_ADMIN;
4442*4882a593Smuzhiyun 	put_unaligned_le16(PQI_GENERAL_ADMIN_IU_LENGTH,
4443*4882a593Smuzhiyun 		&request.header.iu_length);
4444*4882a593Smuzhiyun 	request.function_code = PQI_GENERAL_ADMIN_FUNCTION_CREATE_OQ;
4445*4882a593Smuzhiyun 	put_unaligned_le16(queue_group->oq_id,
4446*4882a593Smuzhiyun 		&request.data.create_operational_oq.queue_id);
4447*4882a593Smuzhiyun 	put_unaligned_le64((u64)queue_group->oq_element_array_bus_addr,
4448*4882a593Smuzhiyun 		&request.data.create_operational_oq.element_array_addr);
4449*4882a593Smuzhiyun 	put_unaligned_le64((u64)queue_group->oq_pi_bus_addr,
4450*4882a593Smuzhiyun 		&request.data.create_operational_oq.pi_addr);
4451*4882a593Smuzhiyun 	put_unaligned_le16(ctrl_info->num_elements_per_oq,
4452*4882a593Smuzhiyun 		&request.data.create_operational_oq.num_elements);
4453*4882a593Smuzhiyun 	put_unaligned_le16(PQI_OPERATIONAL_OQ_ELEMENT_LENGTH / 16,
4454*4882a593Smuzhiyun 		&request.data.create_operational_oq.element_length);
4455*4882a593Smuzhiyun 	request.data.create_operational_oq.queue_protocol = PQI_PROTOCOL_SOP;
4456*4882a593Smuzhiyun 	put_unaligned_le16(queue_group->int_msg_num,
4457*4882a593Smuzhiyun 		&request.data.create_operational_oq.int_msg_num);
4458*4882a593Smuzhiyun 
4459*4882a593Smuzhiyun 	rc = pqi_submit_admin_request_synchronous(ctrl_info, &request,
4460*4882a593Smuzhiyun 		&response);
4461*4882a593Smuzhiyun 	if (rc) {
4462*4882a593Smuzhiyun 		dev_err(&ctrl_info->pci_dev->dev,
4463*4882a593Smuzhiyun 			"error creating outbound queue\n");
4464*4882a593Smuzhiyun 		return rc;
4465*4882a593Smuzhiyun 	}
4466*4882a593Smuzhiyun 
4467*4882a593Smuzhiyun 	queue_group->oq_ci = ctrl_info->iomem_base +
4468*4882a593Smuzhiyun 		PQI_DEVICE_REGISTERS_OFFSET +
4469*4882a593Smuzhiyun 		get_unaligned_le64(
4470*4882a593Smuzhiyun 			&response.data.create_operational_oq.oq_ci_offset);
4471*4882a593Smuzhiyun 
4472*4882a593Smuzhiyun 	return 0;
4473*4882a593Smuzhiyun }
4474*4882a593Smuzhiyun 
pqi_create_queues(struct pqi_ctrl_info * ctrl_info)4475*4882a593Smuzhiyun static int pqi_create_queues(struct pqi_ctrl_info *ctrl_info)
4476*4882a593Smuzhiyun {
4477*4882a593Smuzhiyun 	int rc;
4478*4882a593Smuzhiyun 	unsigned int i;
4479*4882a593Smuzhiyun 
4480*4882a593Smuzhiyun 	rc = pqi_create_event_queue(ctrl_info);
4481*4882a593Smuzhiyun 	if (rc) {
4482*4882a593Smuzhiyun 		dev_err(&ctrl_info->pci_dev->dev,
4483*4882a593Smuzhiyun 			"error creating event queue\n");
4484*4882a593Smuzhiyun 		return rc;
4485*4882a593Smuzhiyun 	}
4486*4882a593Smuzhiyun 
4487*4882a593Smuzhiyun 	for (i = 0; i < ctrl_info->num_queue_groups; i++) {
4488*4882a593Smuzhiyun 		rc = pqi_create_queue_group(ctrl_info, i);
4489*4882a593Smuzhiyun 		if (rc) {
4490*4882a593Smuzhiyun 			dev_err(&ctrl_info->pci_dev->dev,
4491*4882a593Smuzhiyun 				"error creating queue group number %u/%u\n",
4492*4882a593Smuzhiyun 				i, ctrl_info->num_queue_groups);
4493*4882a593Smuzhiyun 			return rc;
4494*4882a593Smuzhiyun 		}
4495*4882a593Smuzhiyun 	}
4496*4882a593Smuzhiyun 
4497*4882a593Smuzhiyun 	return 0;
4498*4882a593Smuzhiyun }
4499*4882a593Smuzhiyun 
4500*4882a593Smuzhiyun #define PQI_REPORT_EVENT_CONFIG_BUFFER_LENGTH	\
4501*4882a593Smuzhiyun 	(offsetof(struct pqi_event_config, descriptors) + \
4502*4882a593Smuzhiyun 	(PQI_MAX_EVENT_DESCRIPTORS * sizeof(struct pqi_event_descriptor)))
4503*4882a593Smuzhiyun 
pqi_configure_events(struct pqi_ctrl_info * ctrl_info,bool enable_events)4504*4882a593Smuzhiyun static int pqi_configure_events(struct pqi_ctrl_info *ctrl_info,
4505*4882a593Smuzhiyun 	bool enable_events)
4506*4882a593Smuzhiyun {
4507*4882a593Smuzhiyun 	int rc;
4508*4882a593Smuzhiyun 	unsigned int i;
4509*4882a593Smuzhiyun 	struct pqi_event_config *event_config;
4510*4882a593Smuzhiyun 	struct pqi_event_descriptor *event_descriptor;
4511*4882a593Smuzhiyun 	struct pqi_general_management_request request;
4512*4882a593Smuzhiyun 
4513*4882a593Smuzhiyun 	event_config = kmalloc(PQI_REPORT_EVENT_CONFIG_BUFFER_LENGTH,
4514*4882a593Smuzhiyun 		GFP_KERNEL);
4515*4882a593Smuzhiyun 	if (!event_config)
4516*4882a593Smuzhiyun 		return -ENOMEM;
4517*4882a593Smuzhiyun 
4518*4882a593Smuzhiyun 	memset(&request, 0, sizeof(request));
4519*4882a593Smuzhiyun 
4520*4882a593Smuzhiyun 	request.header.iu_type = PQI_REQUEST_IU_REPORT_VENDOR_EVENT_CONFIG;
4521*4882a593Smuzhiyun 	put_unaligned_le16(offsetof(struct pqi_general_management_request,
4522*4882a593Smuzhiyun 		data.report_event_configuration.sg_descriptors[1]) -
4523*4882a593Smuzhiyun 		PQI_REQUEST_HEADER_LENGTH, &request.header.iu_length);
4524*4882a593Smuzhiyun 	put_unaligned_le32(PQI_REPORT_EVENT_CONFIG_BUFFER_LENGTH,
4525*4882a593Smuzhiyun 		&request.data.report_event_configuration.buffer_length);
4526*4882a593Smuzhiyun 
4527*4882a593Smuzhiyun 	rc = pqi_map_single(ctrl_info->pci_dev,
4528*4882a593Smuzhiyun 		request.data.report_event_configuration.sg_descriptors,
4529*4882a593Smuzhiyun 		event_config, PQI_REPORT_EVENT_CONFIG_BUFFER_LENGTH,
4530*4882a593Smuzhiyun 		DMA_FROM_DEVICE);
4531*4882a593Smuzhiyun 	if (rc)
4532*4882a593Smuzhiyun 		goto out;
4533*4882a593Smuzhiyun 
4534*4882a593Smuzhiyun 	rc = pqi_submit_raid_request_synchronous(ctrl_info, &request.header,
4535*4882a593Smuzhiyun 		0, NULL, NO_TIMEOUT);
4536*4882a593Smuzhiyun 
4537*4882a593Smuzhiyun 	pqi_pci_unmap(ctrl_info->pci_dev,
4538*4882a593Smuzhiyun 		request.data.report_event_configuration.sg_descriptors, 1,
4539*4882a593Smuzhiyun 		DMA_FROM_DEVICE);
4540*4882a593Smuzhiyun 
4541*4882a593Smuzhiyun 	if (rc)
4542*4882a593Smuzhiyun 		goto out;
4543*4882a593Smuzhiyun 
4544*4882a593Smuzhiyun 	for (i = 0; i < event_config->num_event_descriptors; i++) {
4545*4882a593Smuzhiyun 		event_descriptor = &event_config->descriptors[i];
4546*4882a593Smuzhiyun 		if (enable_events &&
4547*4882a593Smuzhiyun 			pqi_is_supported_event(event_descriptor->event_type))
4548*4882a593Smuzhiyun 			put_unaligned_le16(ctrl_info->event_queue.oq_id,
4549*4882a593Smuzhiyun 					&event_descriptor->oq_id);
4550*4882a593Smuzhiyun 		else
4551*4882a593Smuzhiyun 			put_unaligned_le16(0, &event_descriptor->oq_id);
4552*4882a593Smuzhiyun 	}
4553*4882a593Smuzhiyun 
4554*4882a593Smuzhiyun 	memset(&request, 0, sizeof(request));
4555*4882a593Smuzhiyun 
4556*4882a593Smuzhiyun 	request.header.iu_type = PQI_REQUEST_IU_SET_VENDOR_EVENT_CONFIG;
4557*4882a593Smuzhiyun 	put_unaligned_le16(offsetof(struct pqi_general_management_request,
4558*4882a593Smuzhiyun 		data.report_event_configuration.sg_descriptors[1]) -
4559*4882a593Smuzhiyun 		PQI_REQUEST_HEADER_LENGTH, &request.header.iu_length);
4560*4882a593Smuzhiyun 	put_unaligned_le32(PQI_REPORT_EVENT_CONFIG_BUFFER_LENGTH,
4561*4882a593Smuzhiyun 		&request.data.report_event_configuration.buffer_length);
4562*4882a593Smuzhiyun 
4563*4882a593Smuzhiyun 	rc = pqi_map_single(ctrl_info->pci_dev,
4564*4882a593Smuzhiyun 		request.data.report_event_configuration.sg_descriptors,
4565*4882a593Smuzhiyun 		event_config, PQI_REPORT_EVENT_CONFIG_BUFFER_LENGTH,
4566*4882a593Smuzhiyun 		DMA_TO_DEVICE);
4567*4882a593Smuzhiyun 	if (rc)
4568*4882a593Smuzhiyun 		goto out;
4569*4882a593Smuzhiyun 
4570*4882a593Smuzhiyun 	rc = pqi_submit_raid_request_synchronous(ctrl_info, &request.header, 0,
4571*4882a593Smuzhiyun 		NULL, NO_TIMEOUT);
4572*4882a593Smuzhiyun 
4573*4882a593Smuzhiyun 	pqi_pci_unmap(ctrl_info->pci_dev,
4574*4882a593Smuzhiyun 		request.data.report_event_configuration.sg_descriptors, 1,
4575*4882a593Smuzhiyun 		DMA_TO_DEVICE);
4576*4882a593Smuzhiyun 
4577*4882a593Smuzhiyun out:
4578*4882a593Smuzhiyun 	kfree(event_config);
4579*4882a593Smuzhiyun 
4580*4882a593Smuzhiyun 	return rc;
4581*4882a593Smuzhiyun }
4582*4882a593Smuzhiyun 
pqi_enable_events(struct pqi_ctrl_info * ctrl_info)4583*4882a593Smuzhiyun static inline int pqi_enable_events(struct pqi_ctrl_info *ctrl_info)
4584*4882a593Smuzhiyun {
4585*4882a593Smuzhiyun 	return pqi_configure_events(ctrl_info, true);
4586*4882a593Smuzhiyun }
4587*4882a593Smuzhiyun 
pqi_disable_events(struct pqi_ctrl_info * ctrl_info)4588*4882a593Smuzhiyun static inline int pqi_disable_events(struct pqi_ctrl_info *ctrl_info)
4589*4882a593Smuzhiyun {
4590*4882a593Smuzhiyun 	return pqi_configure_events(ctrl_info, false);
4591*4882a593Smuzhiyun }
4592*4882a593Smuzhiyun 
pqi_free_all_io_requests(struct pqi_ctrl_info * ctrl_info)4593*4882a593Smuzhiyun static void pqi_free_all_io_requests(struct pqi_ctrl_info *ctrl_info)
4594*4882a593Smuzhiyun {
4595*4882a593Smuzhiyun 	unsigned int i;
4596*4882a593Smuzhiyun 	struct device *dev;
4597*4882a593Smuzhiyun 	size_t sg_chain_buffer_length;
4598*4882a593Smuzhiyun 	struct pqi_io_request *io_request;
4599*4882a593Smuzhiyun 
4600*4882a593Smuzhiyun 	if (!ctrl_info->io_request_pool)
4601*4882a593Smuzhiyun 		return;
4602*4882a593Smuzhiyun 
4603*4882a593Smuzhiyun 	dev = &ctrl_info->pci_dev->dev;
4604*4882a593Smuzhiyun 	sg_chain_buffer_length = ctrl_info->sg_chain_buffer_length;
4605*4882a593Smuzhiyun 	io_request = ctrl_info->io_request_pool;
4606*4882a593Smuzhiyun 
4607*4882a593Smuzhiyun 	for (i = 0; i < ctrl_info->max_io_slots; i++) {
4608*4882a593Smuzhiyun 		kfree(io_request->iu);
4609*4882a593Smuzhiyun 		if (!io_request->sg_chain_buffer)
4610*4882a593Smuzhiyun 			break;
4611*4882a593Smuzhiyun 		dma_free_coherent(dev, sg_chain_buffer_length,
4612*4882a593Smuzhiyun 			io_request->sg_chain_buffer,
4613*4882a593Smuzhiyun 			io_request->sg_chain_buffer_dma_handle);
4614*4882a593Smuzhiyun 		io_request++;
4615*4882a593Smuzhiyun 	}
4616*4882a593Smuzhiyun 
4617*4882a593Smuzhiyun 	kfree(ctrl_info->io_request_pool);
4618*4882a593Smuzhiyun 	ctrl_info->io_request_pool = NULL;
4619*4882a593Smuzhiyun }
4620*4882a593Smuzhiyun 
pqi_alloc_error_buffer(struct pqi_ctrl_info * ctrl_info)4621*4882a593Smuzhiyun static inline int pqi_alloc_error_buffer(struct pqi_ctrl_info *ctrl_info)
4622*4882a593Smuzhiyun {
4623*4882a593Smuzhiyun 
4624*4882a593Smuzhiyun 	ctrl_info->error_buffer = dma_alloc_coherent(&ctrl_info->pci_dev->dev,
4625*4882a593Smuzhiyun 				     ctrl_info->error_buffer_length,
4626*4882a593Smuzhiyun 				     &ctrl_info->error_buffer_dma_handle,
4627*4882a593Smuzhiyun 				     GFP_KERNEL);
4628*4882a593Smuzhiyun 	if (!ctrl_info->error_buffer)
4629*4882a593Smuzhiyun 		return -ENOMEM;
4630*4882a593Smuzhiyun 
4631*4882a593Smuzhiyun 	return 0;
4632*4882a593Smuzhiyun }
4633*4882a593Smuzhiyun 
pqi_alloc_io_resources(struct pqi_ctrl_info * ctrl_info)4634*4882a593Smuzhiyun static int pqi_alloc_io_resources(struct pqi_ctrl_info *ctrl_info)
4635*4882a593Smuzhiyun {
4636*4882a593Smuzhiyun 	unsigned int i;
4637*4882a593Smuzhiyun 	void *sg_chain_buffer;
4638*4882a593Smuzhiyun 	size_t sg_chain_buffer_length;
4639*4882a593Smuzhiyun 	dma_addr_t sg_chain_buffer_dma_handle;
4640*4882a593Smuzhiyun 	struct device *dev;
4641*4882a593Smuzhiyun 	struct pqi_io_request *io_request;
4642*4882a593Smuzhiyun 
4643*4882a593Smuzhiyun 	ctrl_info->io_request_pool =
4644*4882a593Smuzhiyun 		kcalloc(ctrl_info->max_io_slots,
4645*4882a593Smuzhiyun 			sizeof(ctrl_info->io_request_pool[0]), GFP_KERNEL);
4646*4882a593Smuzhiyun 
4647*4882a593Smuzhiyun 	if (!ctrl_info->io_request_pool) {
4648*4882a593Smuzhiyun 		dev_err(&ctrl_info->pci_dev->dev,
4649*4882a593Smuzhiyun 			"failed to allocate I/O request pool\n");
4650*4882a593Smuzhiyun 		goto error;
4651*4882a593Smuzhiyun 	}
4652*4882a593Smuzhiyun 
4653*4882a593Smuzhiyun 	dev = &ctrl_info->pci_dev->dev;
4654*4882a593Smuzhiyun 	sg_chain_buffer_length = ctrl_info->sg_chain_buffer_length;
4655*4882a593Smuzhiyun 	io_request = ctrl_info->io_request_pool;
4656*4882a593Smuzhiyun 
4657*4882a593Smuzhiyun 	for (i = 0; i < ctrl_info->max_io_slots; i++) {
4658*4882a593Smuzhiyun 		io_request->iu =
4659*4882a593Smuzhiyun 			kmalloc(ctrl_info->max_inbound_iu_length, GFP_KERNEL);
4660*4882a593Smuzhiyun 
4661*4882a593Smuzhiyun 		if (!io_request->iu) {
4662*4882a593Smuzhiyun 			dev_err(&ctrl_info->pci_dev->dev,
4663*4882a593Smuzhiyun 				"failed to allocate IU buffers\n");
4664*4882a593Smuzhiyun 			goto error;
4665*4882a593Smuzhiyun 		}
4666*4882a593Smuzhiyun 
4667*4882a593Smuzhiyun 		sg_chain_buffer = dma_alloc_coherent(dev,
4668*4882a593Smuzhiyun 			sg_chain_buffer_length, &sg_chain_buffer_dma_handle,
4669*4882a593Smuzhiyun 			GFP_KERNEL);
4670*4882a593Smuzhiyun 
4671*4882a593Smuzhiyun 		if (!sg_chain_buffer) {
4672*4882a593Smuzhiyun 			dev_err(&ctrl_info->pci_dev->dev,
4673*4882a593Smuzhiyun 				"failed to allocate PQI scatter-gather chain buffers\n");
4674*4882a593Smuzhiyun 			goto error;
4675*4882a593Smuzhiyun 		}
4676*4882a593Smuzhiyun 
4677*4882a593Smuzhiyun 		io_request->index = i;
4678*4882a593Smuzhiyun 		io_request->sg_chain_buffer = sg_chain_buffer;
4679*4882a593Smuzhiyun 		io_request->sg_chain_buffer_dma_handle =
4680*4882a593Smuzhiyun 			sg_chain_buffer_dma_handle;
4681*4882a593Smuzhiyun 		io_request++;
4682*4882a593Smuzhiyun 	}
4683*4882a593Smuzhiyun 
4684*4882a593Smuzhiyun 	return 0;
4685*4882a593Smuzhiyun 
4686*4882a593Smuzhiyun error:
4687*4882a593Smuzhiyun 	pqi_free_all_io_requests(ctrl_info);
4688*4882a593Smuzhiyun 
4689*4882a593Smuzhiyun 	return -ENOMEM;
4690*4882a593Smuzhiyun }
4691*4882a593Smuzhiyun 
4692*4882a593Smuzhiyun /*
4693*4882a593Smuzhiyun  * Calculate required resources that are sized based on max. outstanding
4694*4882a593Smuzhiyun  * requests and max. transfer size.
4695*4882a593Smuzhiyun  */
4696*4882a593Smuzhiyun 
pqi_calculate_io_resources(struct pqi_ctrl_info * ctrl_info)4697*4882a593Smuzhiyun static void pqi_calculate_io_resources(struct pqi_ctrl_info *ctrl_info)
4698*4882a593Smuzhiyun {
4699*4882a593Smuzhiyun 	u32 max_transfer_size;
4700*4882a593Smuzhiyun 	u32 max_sg_entries;
4701*4882a593Smuzhiyun 
4702*4882a593Smuzhiyun 	ctrl_info->scsi_ml_can_queue =
4703*4882a593Smuzhiyun 		ctrl_info->max_outstanding_requests - PQI_RESERVED_IO_SLOTS;
4704*4882a593Smuzhiyun 	ctrl_info->max_io_slots = ctrl_info->max_outstanding_requests;
4705*4882a593Smuzhiyun 
4706*4882a593Smuzhiyun 	ctrl_info->error_buffer_length =
4707*4882a593Smuzhiyun 		ctrl_info->max_io_slots * PQI_ERROR_BUFFER_ELEMENT_LENGTH;
4708*4882a593Smuzhiyun 
4709*4882a593Smuzhiyun 	if (reset_devices)
4710*4882a593Smuzhiyun 		max_transfer_size = min(ctrl_info->max_transfer_size,
4711*4882a593Smuzhiyun 			PQI_MAX_TRANSFER_SIZE_KDUMP);
4712*4882a593Smuzhiyun 	else
4713*4882a593Smuzhiyun 		max_transfer_size = min(ctrl_info->max_transfer_size,
4714*4882a593Smuzhiyun 			PQI_MAX_TRANSFER_SIZE);
4715*4882a593Smuzhiyun 
4716*4882a593Smuzhiyun 	max_sg_entries = max_transfer_size / PAGE_SIZE;
4717*4882a593Smuzhiyun 
4718*4882a593Smuzhiyun 	/* +1 to cover when the buffer is not page-aligned. */
4719*4882a593Smuzhiyun 	max_sg_entries++;
4720*4882a593Smuzhiyun 
4721*4882a593Smuzhiyun 	max_sg_entries = min(ctrl_info->max_sg_entries, max_sg_entries);
4722*4882a593Smuzhiyun 
4723*4882a593Smuzhiyun 	max_transfer_size = (max_sg_entries - 1) * PAGE_SIZE;
4724*4882a593Smuzhiyun 
4725*4882a593Smuzhiyun 	ctrl_info->sg_chain_buffer_length =
4726*4882a593Smuzhiyun 		(max_sg_entries * sizeof(struct pqi_sg_descriptor)) +
4727*4882a593Smuzhiyun 		PQI_EXTRA_SGL_MEMORY;
4728*4882a593Smuzhiyun 	ctrl_info->sg_tablesize = max_sg_entries;
4729*4882a593Smuzhiyun 	ctrl_info->max_sectors = max_transfer_size / 512;
4730*4882a593Smuzhiyun }
4731*4882a593Smuzhiyun 
pqi_calculate_queue_resources(struct pqi_ctrl_info * ctrl_info)4732*4882a593Smuzhiyun static void pqi_calculate_queue_resources(struct pqi_ctrl_info *ctrl_info)
4733*4882a593Smuzhiyun {
4734*4882a593Smuzhiyun 	int num_queue_groups;
4735*4882a593Smuzhiyun 	u16 num_elements_per_iq;
4736*4882a593Smuzhiyun 	u16 num_elements_per_oq;
4737*4882a593Smuzhiyun 
4738*4882a593Smuzhiyun 	if (reset_devices) {
4739*4882a593Smuzhiyun 		num_queue_groups = 1;
4740*4882a593Smuzhiyun 	} else {
4741*4882a593Smuzhiyun 		int num_cpus;
4742*4882a593Smuzhiyun 		int max_queue_groups;
4743*4882a593Smuzhiyun 
4744*4882a593Smuzhiyun 		max_queue_groups = min(ctrl_info->max_inbound_queues / 2,
4745*4882a593Smuzhiyun 			ctrl_info->max_outbound_queues - 1);
4746*4882a593Smuzhiyun 		max_queue_groups = min(max_queue_groups, PQI_MAX_QUEUE_GROUPS);
4747*4882a593Smuzhiyun 
4748*4882a593Smuzhiyun 		num_cpus = num_online_cpus();
4749*4882a593Smuzhiyun 		num_queue_groups = min(num_cpus, ctrl_info->max_msix_vectors);
4750*4882a593Smuzhiyun 		num_queue_groups = min(num_queue_groups, max_queue_groups);
4751*4882a593Smuzhiyun 	}
4752*4882a593Smuzhiyun 
4753*4882a593Smuzhiyun 	ctrl_info->num_queue_groups = num_queue_groups;
4754*4882a593Smuzhiyun 	ctrl_info->max_hw_queue_index = num_queue_groups - 1;
4755*4882a593Smuzhiyun 
4756*4882a593Smuzhiyun 	/*
4757*4882a593Smuzhiyun 	 * Make sure that the max. inbound IU length is an even multiple
4758*4882a593Smuzhiyun 	 * of our inbound element length.
4759*4882a593Smuzhiyun 	 */
4760*4882a593Smuzhiyun 	ctrl_info->max_inbound_iu_length =
4761*4882a593Smuzhiyun 		(ctrl_info->max_inbound_iu_length_per_firmware /
4762*4882a593Smuzhiyun 		PQI_OPERATIONAL_IQ_ELEMENT_LENGTH) *
4763*4882a593Smuzhiyun 		PQI_OPERATIONAL_IQ_ELEMENT_LENGTH;
4764*4882a593Smuzhiyun 
4765*4882a593Smuzhiyun 	num_elements_per_iq =
4766*4882a593Smuzhiyun 		(ctrl_info->max_inbound_iu_length /
4767*4882a593Smuzhiyun 		PQI_OPERATIONAL_IQ_ELEMENT_LENGTH);
4768*4882a593Smuzhiyun 
4769*4882a593Smuzhiyun 	/* Add one because one element in each queue is unusable. */
4770*4882a593Smuzhiyun 	num_elements_per_iq++;
4771*4882a593Smuzhiyun 
4772*4882a593Smuzhiyun 	num_elements_per_iq = min(num_elements_per_iq,
4773*4882a593Smuzhiyun 		ctrl_info->max_elements_per_iq);
4774*4882a593Smuzhiyun 
4775*4882a593Smuzhiyun 	num_elements_per_oq = ((num_elements_per_iq - 1) * 2) + 1;
4776*4882a593Smuzhiyun 	num_elements_per_oq = min(num_elements_per_oq,
4777*4882a593Smuzhiyun 		ctrl_info->max_elements_per_oq);
4778*4882a593Smuzhiyun 
4779*4882a593Smuzhiyun 	ctrl_info->num_elements_per_iq = num_elements_per_iq;
4780*4882a593Smuzhiyun 	ctrl_info->num_elements_per_oq = num_elements_per_oq;
4781*4882a593Smuzhiyun 
4782*4882a593Smuzhiyun 	ctrl_info->max_sg_per_iu =
4783*4882a593Smuzhiyun 		((ctrl_info->max_inbound_iu_length -
4784*4882a593Smuzhiyun 		PQI_OPERATIONAL_IQ_ELEMENT_LENGTH) /
4785*4882a593Smuzhiyun 		sizeof(struct pqi_sg_descriptor)) +
4786*4882a593Smuzhiyun 		PQI_MAX_EMBEDDED_SG_DESCRIPTORS;
4787*4882a593Smuzhiyun }
4788*4882a593Smuzhiyun 
pqi_set_sg_descriptor(struct pqi_sg_descriptor * sg_descriptor,struct scatterlist * sg)4789*4882a593Smuzhiyun static inline void pqi_set_sg_descriptor(
4790*4882a593Smuzhiyun 	struct pqi_sg_descriptor *sg_descriptor, struct scatterlist *sg)
4791*4882a593Smuzhiyun {
4792*4882a593Smuzhiyun 	u64 address = (u64)sg_dma_address(sg);
4793*4882a593Smuzhiyun 	unsigned int length = sg_dma_len(sg);
4794*4882a593Smuzhiyun 
4795*4882a593Smuzhiyun 	put_unaligned_le64(address, &sg_descriptor->address);
4796*4882a593Smuzhiyun 	put_unaligned_le32(length, &sg_descriptor->length);
4797*4882a593Smuzhiyun 	put_unaligned_le32(0, &sg_descriptor->flags);
4798*4882a593Smuzhiyun }
4799*4882a593Smuzhiyun 
pqi_build_raid_sg_list(struct pqi_ctrl_info * ctrl_info,struct pqi_raid_path_request * request,struct scsi_cmnd * scmd,struct pqi_io_request * io_request)4800*4882a593Smuzhiyun static int pqi_build_raid_sg_list(struct pqi_ctrl_info *ctrl_info,
4801*4882a593Smuzhiyun 	struct pqi_raid_path_request *request, struct scsi_cmnd *scmd,
4802*4882a593Smuzhiyun 	struct pqi_io_request *io_request)
4803*4882a593Smuzhiyun {
4804*4882a593Smuzhiyun 	int i;
4805*4882a593Smuzhiyun 	u16 iu_length;
4806*4882a593Smuzhiyun 	int sg_count;
4807*4882a593Smuzhiyun 	bool chained;
4808*4882a593Smuzhiyun 	unsigned int num_sg_in_iu;
4809*4882a593Smuzhiyun 	unsigned int max_sg_per_iu;
4810*4882a593Smuzhiyun 	struct scatterlist *sg;
4811*4882a593Smuzhiyun 	struct pqi_sg_descriptor *sg_descriptor;
4812*4882a593Smuzhiyun 
4813*4882a593Smuzhiyun 	sg_count = scsi_dma_map(scmd);
4814*4882a593Smuzhiyun 	if (sg_count < 0)
4815*4882a593Smuzhiyun 		return sg_count;
4816*4882a593Smuzhiyun 
4817*4882a593Smuzhiyun 	iu_length = offsetof(struct pqi_raid_path_request, sg_descriptors) -
4818*4882a593Smuzhiyun 		PQI_REQUEST_HEADER_LENGTH;
4819*4882a593Smuzhiyun 
4820*4882a593Smuzhiyun 	if (sg_count == 0)
4821*4882a593Smuzhiyun 		goto out;
4822*4882a593Smuzhiyun 
4823*4882a593Smuzhiyun 	sg = scsi_sglist(scmd);
4824*4882a593Smuzhiyun 	sg_descriptor = request->sg_descriptors;
4825*4882a593Smuzhiyun 	max_sg_per_iu = ctrl_info->max_sg_per_iu - 1;
4826*4882a593Smuzhiyun 	chained = false;
4827*4882a593Smuzhiyun 	num_sg_in_iu = 0;
4828*4882a593Smuzhiyun 	i = 0;
4829*4882a593Smuzhiyun 
4830*4882a593Smuzhiyun 	while (1) {
4831*4882a593Smuzhiyun 		pqi_set_sg_descriptor(sg_descriptor, sg);
4832*4882a593Smuzhiyun 		if (!chained)
4833*4882a593Smuzhiyun 			num_sg_in_iu++;
4834*4882a593Smuzhiyun 		i++;
4835*4882a593Smuzhiyun 		if (i == sg_count)
4836*4882a593Smuzhiyun 			break;
4837*4882a593Smuzhiyun 		sg_descriptor++;
4838*4882a593Smuzhiyun 		if (i == max_sg_per_iu) {
4839*4882a593Smuzhiyun 			put_unaligned_le64(
4840*4882a593Smuzhiyun 				(u64)io_request->sg_chain_buffer_dma_handle,
4841*4882a593Smuzhiyun 				&sg_descriptor->address);
4842*4882a593Smuzhiyun 			put_unaligned_le32((sg_count - num_sg_in_iu)
4843*4882a593Smuzhiyun 				* sizeof(*sg_descriptor),
4844*4882a593Smuzhiyun 				&sg_descriptor->length);
4845*4882a593Smuzhiyun 			put_unaligned_le32(CISS_SG_CHAIN,
4846*4882a593Smuzhiyun 				&sg_descriptor->flags);
4847*4882a593Smuzhiyun 			chained = true;
4848*4882a593Smuzhiyun 			num_sg_in_iu++;
4849*4882a593Smuzhiyun 			sg_descriptor = io_request->sg_chain_buffer;
4850*4882a593Smuzhiyun 		}
4851*4882a593Smuzhiyun 		sg = sg_next(sg);
4852*4882a593Smuzhiyun 	}
4853*4882a593Smuzhiyun 
4854*4882a593Smuzhiyun 	put_unaligned_le32(CISS_SG_LAST, &sg_descriptor->flags);
4855*4882a593Smuzhiyun 	request->partial = chained;
4856*4882a593Smuzhiyun 	iu_length += num_sg_in_iu * sizeof(*sg_descriptor);
4857*4882a593Smuzhiyun 
4858*4882a593Smuzhiyun out:
4859*4882a593Smuzhiyun 	put_unaligned_le16(iu_length, &request->header.iu_length);
4860*4882a593Smuzhiyun 
4861*4882a593Smuzhiyun 	return 0;
4862*4882a593Smuzhiyun }
4863*4882a593Smuzhiyun 
pqi_build_aio_sg_list(struct pqi_ctrl_info * ctrl_info,struct pqi_aio_path_request * request,struct scsi_cmnd * scmd,struct pqi_io_request * io_request)4864*4882a593Smuzhiyun static int pqi_build_aio_sg_list(struct pqi_ctrl_info *ctrl_info,
4865*4882a593Smuzhiyun 	struct pqi_aio_path_request *request, struct scsi_cmnd *scmd,
4866*4882a593Smuzhiyun 	struct pqi_io_request *io_request)
4867*4882a593Smuzhiyun {
4868*4882a593Smuzhiyun 	int i;
4869*4882a593Smuzhiyun 	u16 iu_length;
4870*4882a593Smuzhiyun 	int sg_count;
4871*4882a593Smuzhiyun 	bool chained;
4872*4882a593Smuzhiyun 	unsigned int num_sg_in_iu;
4873*4882a593Smuzhiyun 	unsigned int max_sg_per_iu;
4874*4882a593Smuzhiyun 	struct scatterlist *sg;
4875*4882a593Smuzhiyun 	struct pqi_sg_descriptor *sg_descriptor;
4876*4882a593Smuzhiyun 
4877*4882a593Smuzhiyun 	sg_count = scsi_dma_map(scmd);
4878*4882a593Smuzhiyun 	if (sg_count < 0)
4879*4882a593Smuzhiyun 		return sg_count;
4880*4882a593Smuzhiyun 
4881*4882a593Smuzhiyun 	iu_length = offsetof(struct pqi_aio_path_request, sg_descriptors) -
4882*4882a593Smuzhiyun 		PQI_REQUEST_HEADER_LENGTH;
4883*4882a593Smuzhiyun 	num_sg_in_iu = 0;
4884*4882a593Smuzhiyun 
4885*4882a593Smuzhiyun 	if (sg_count == 0)
4886*4882a593Smuzhiyun 		goto out;
4887*4882a593Smuzhiyun 
4888*4882a593Smuzhiyun 	sg = scsi_sglist(scmd);
4889*4882a593Smuzhiyun 	sg_descriptor = request->sg_descriptors;
4890*4882a593Smuzhiyun 	max_sg_per_iu = ctrl_info->max_sg_per_iu - 1;
4891*4882a593Smuzhiyun 	chained = false;
4892*4882a593Smuzhiyun 	i = 0;
4893*4882a593Smuzhiyun 
4894*4882a593Smuzhiyun 	while (1) {
4895*4882a593Smuzhiyun 		pqi_set_sg_descriptor(sg_descriptor, sg);
4896*4882a593Smuzhiyun 		if (!chained)
4897*4882a593Smuzhiyun 			num_sg_in_iu++;
4898*4882a593Smuzhiyun 		i++;
4899*4882a593Smuzhiyun 		if (i == sg_count)
4900*4882a593Smuzhiyun 			break;
4901*4882a593Smuzhiyun 		sg_descriptor++;
4902*4882a593Smuzhiyun 		if (i == max_sg_per_iu) {
4903*4882a593Smuzhiyun 			put_unaligned_le64(
4904*4882a593Smuzhiyun 				(u64)io_request->sg_chain_buffer_dma_handle,
4905*4882a593Smuzhiyun 				&sg_descriptor->address);
4906*4882a593Smuzhiyun 			put_unaligned_le32((sg_count - num_sg_in_iu)
4907*4882a593Smuzhiyun 				* sizeof(*sg_descriptor),
4908*4882a593Smuzhiyun 				&sg_descriptor->length);
4909*4882a593Smuzhiyun 			put_unaligned_le32(CISS_SG_CHAIN,
4910*4882a593Smuzhiyun 				&sg_descriptor->flags);
4911*4882a593Smuzhiyun 			chained = true;
4912*4882a593Smuzhiyun 			num_sg_in_iu++;
4913*4882a593Smuzhiyun 			sg_descriptor = io_request->sg_chain_buffer;
4914*4882a593Smuzhiyun 		}
4915*4882a593Smuzhiyun 		sg = sg_next(sg);
4916*4882a593Smuzhiyun 	}
4917*4882a593Smuzhiyun 
4918*4882a593Smuzhiyun 	put_unaligned_le32(CISS_SG_LAST, &sg_descriptor->flags);
4919*4882a593Smuzhiyun 	request->partial = chained;
4920*4882a593Smuzhiyun 	iu_length += num_sg_in_iu * sizeof(*sg_descriptor);
4921*4882a593Smuzhiyun 
4922*4882a593Smuzhiyun out:
4923*4882a593Smuzhiyun 	put_unaligned_le16(iu_length, &request->header.iu_length);
4924*4882a593Smuzhiyun 	request->num_sg_descriptors = num_sg_in_iu;
4925*4882a593Smuzhiyun 
4926*4882a593Smuzhiyun 	return 0;
4927*4882a593Smuzhiyun }
4928*4882a593Smuzhiyun 
pqi_raid_io_complete(struct pqi_io_request * io_request,void * context)4929*4882a593Smuzhiyun static void pqi_raid_io_complete(struct pqi_io_request *io_request,
4930*4882a593Smuzhiyun 	void *context)
4931*4882a593Smuzhiyun {
4932*4882a593Smuzhiyun 	struct scsi_cmnd *scmd;
4933*4882a593Smuzhiyun 
4934*4882a593Smuzhiyun 	scmd = io_request->scmd;
4935*4882a593Smuzhiyun 	pqi_free_io_request(io_request);
4936*4882a593Smuzhiyun 	scsi_dma_unmap(scmd);
4937*4882a593Smuzhiyun 	pqi_scsi_done(scmd);
4938*4882a593Smuzhiyun }
4939*4882a593Smuzhiyun 
pqi_raid_submit_scsi_cmd_with_io_request(struct pqi_ctrl_info * ctrl_info,struct pqi_io_request * io_request,struct pqi_scsi_dev * device,struct scsi_cmnd * scmd,struct pqi_queue_group * queue_group)4940*4882a593Smuzhiyun static int pqi_raid_submit_scsi_cmd_with_io_request(
4941*4882a593Smuzhiyun 	struct pqi_ctrl_info *ctrl_info, struct pqi_io_request *io_request,
4942*4882a593Smuzhiyun 	struct pqi_scsi_dev *device, struct scsi_cmnd *scmd,
4943*4882a593Smuzhiyun 	struct pqi_queue_group *queue_group)
4944*4882a593Smuzhiyun {
4945*4882a593Smuzhiyun 	int rc;
4946*4882a593Smuzhiyun 	size_t cdb_length;
4947*4882a593Smuzhiyun 	struct pqi_raid_path_request *request;
4948*4882a593Smuzhiyun 
4949*4882a593Smuzhiyun 	io_request->io_complete_callback = pqi_raid_io_complete;
4950*4882a593Smuzhiyun 	io_request->scmd = scmd;
4951*4882a593Smuzhiyun 
4952*4882a593Smuzhiyun 	request = io_request->iu;
4953*4882a593Smuzhiyun 	memset(request, 0,
4954*4882a593Smuzhiyun 		offsetof(struct pqi_raid_path_request, sg_descriptors));
4955*4882a593Smuzhiyun 
4956*4882a593Smuzhiyun 	request->header.iu_type = PQI_REQUEST_IU_RAID_PATH_IO;
4957*4882a593Smuzhiyun 	put_unaligned_le32(scsi_bufflen(scmd), &request->buffer_length);
4958*4882a593Smuzhiyun 	request->task_attribute = SOP_TASK_ATTRIBUTE_SIMPLE;
4959*4882a593Smuzhiyun 	put_unaligned_le16(io_request->index, &request->request_id);
4960*4882a593Smuzhiyun 	request->error_index = request->request_id;
4961*4882a593Smuzhiyun 	memcpy(request->lun_number, device->scsi3addr,
4962*4882a593Smuzhiyun 		sizeof(request->lun_number));
4963*4882a593Smuzhiyun 
4964*4882a593Smuzhiyun 	cdb_length = min_t(size_t, scmd->cmd_len, sizeof(request->cdb));
4965*4882a593Smuzhiyun 	memcpy(request->cdb, scmd->cmnd, cdb_length);
4966*4882a593Smuzhiyun 
4967*4882a593Smuzhiyun 	switch (cdb_length) {
4968*4882a593Smuzhiyun 	case 6:
4969*4882a593Smuzhiyun 	case 10:
4970*4882a593Smuzhiyun 	case 12:
4971*4882a593Smuzhiyun 	case 16:
4972*4882a593Smuzhiyun 		/* No bytes in the Additional CDB bytes field */
4973*4882a593Smuzhiyun 		request->additional_cdb_bytes_usage =
4974*4882a593Smuzhiyun 			SOP_ADDITIONAL_CDB_BYTES_0;
4975*4882a593Smuzhiyun 		break;
4976*4882a593Smuzhiyun 	case 20:
4977*4882a593Smuzhiyun 		/* 4 bytes in the Additional cdb field */
4978*4882a593Smuzhiyun 		request->additional_cdb_bytes_usage =
4979*4882a593Smuzhiyun 			SOP_ADDITIONAL_CDB_BYTES_4;
4980*4882a593Smuzhiyun 		break;
4981*4882a593Smuzhiyun 	case 24:
4982*4882a593Smuzhiyun 		/* 8 bytes in the Additional cdb field */
4983*4882a593Smuzhiyun 		request->additional_cdb_bytes_usage =
4984*4882a593Smuzhiyun 			SOP_ADDITIONAL_CDB_BYTES_8;
4985*4882a593Smuzhiyun 		break;
4986*4882a593Smuzhiyun 	case 28:
4987*4882a593Smuzhiyun 		/* 12 bytes in the Additional cdb field */
4988*4882a593Smuzhiyun 		request->additional_cdb_bytes_usage =
4989*4882a593Smuzhiyun 			SOP_ADDITIONAL_CDB_BYTES_12;
4990*4882a593Smuzhiyun 		break;
4991*4882a593Smuzhiyun 	case 32:
4992*4882a593Smuzhiyun 	default:
4993*4882a593Smuzhiyun 		/* 16 bytes in the Additional cdb field */
4994*4882a593Smuzhiyun 		request->additional_cdb_bytes_usage =
4995*4882a593Smuzhiyun 			SOP_ADDITIONAL_CDB_BYTES_16;
4996*4882a593Smuzhiyun 		break;
4997*4882a593Smuzhiyun 	}
4998*4882a593Smuzhiyun 
4999*4882a593Smuzhiyun 	switch (scmd->sc_data_direction) {
5000*4882a593Smuzhiyun 	case DMA_FROM_DEVICE:
5001*4882a593Smuzhiyun 		request->data_direction = SOP_READ_FLAG;
5002*4882a593Smuzhiyun 		break;
5003*4882a593Smuzhiyun 	case DMA_TO_DEVICE:
5004*4882a593Smuzhiyun 		request->data_direction = SOP_WRITE_FLAG;
5005*4882a593Smuzhiyun 		break;
5006*4882a593Smuzhiyun 	case DMA_NONE:
5007*4882a593Smuzhiyun 		request->data_direction = SOP_NO_DIRECTION_FLAG;
5008*4882a593Smuzhiyun 		break;
5009*4882a593Smuzhiyun 	case DMA_BIDIRECTIONAL:
5010*4882a593Smuzhiyun 		request->data_direction = SOP_BIDIRECTIONAL;
5011*4882a593Smuzhiyun 		break;
5012*4882a593Smuzhiyun 	default:
5013*4882a593Smuzhiyun 		dev_err(&ctrl_info->pci_dev->dev,
5014*4882a593Smuzhiyun 			"unknown data direction: %d\n",
5015*4882a593Smuzhiyun 			scmd->sc_data_direction);
5016*4882a593Smuzhiyun 		break;
5017*4882a593Smuzhiyun 	}
5018*4882a593Smuzhiyun 
5019*4882a593Smuzhiyun 	rc = pqi_build_raid_sg_list(ctrl_info, request, scmd, io_request);
5020*4882a593Smuzhiyun 	if (rc) {
5021*4882a593Smuzhiyun 		pqi_free_io_request(io_request);
5022*4882a593Smuzhiyun 		return SCSI_MLQUEUE_HOST_BUSY;
5023*4882a593Smuzhiyun 	}
5024*4882a593Smuzhiyun 
5025*4882a593Smuzhiyun 	pqi_start_io(ctrl_info, queue_group, RAID_PATH, io_request);
5026*4882a593Smuzhiyun 
5027*4882a593Smuzhiyun 	return 0;
5028*4882a593Smuzhiyun }
5029*4882a593Smuzhiyun 
pqi_raid_submit_scsi_cmd(struct pqi_ctrl_info * ctrl_info,struct pqi_scsi_dev * device,struct scsi_cmnd * scmd,struct pqi_queue_group * queue_group)5030*4882a593Smuzhiyun static inline int pqi_raid_submit_scsi_cmd(struct pqi_ctrl_info *ctrl_info,
5031*4882a593Smuzhiyun 	struct pqi_scsi_dev *device, struct scsi_cmnd *scmd,
5032*4882a593Smuzhiyun 	struct pqi_queue_group *queue_group)
5033*4882a593Smuzhiyun {
5034*4882a593Smuzhiyun 	struct pqi_io_request *io_request;
5035*4882a593Smuzhiyun 
5036*4882a593Smuzhiyun 	io_request = pqi_alloc_io_request(ctrl_info);
5037*4882a593Smuzhiyun 
5038*4882a593Smuzhiyun 	return pqi_raid_submit_scsi_cmd_with_io_request(ctrl_info, io_request,
5039*4882a593Smuzhiyun 		device, scmd, queue_group);
5040*4882a593Smuzhiyun }
5041*4882a593Smuzhiyun 
pqi_schedule_bypass_retry(struct pqi_ctrl_info * ctrl_info)5042*4882a593Smuzhiyun static inline void pqi_schedule_bypass_retry(struct pqi_ctrl_info *ctrl_info)
5043*4882a593Smuzhiyun {
5044*4882a593Smuzhiyun 	if (!pqi_ctrl_blocked(ctrl_info))
5045*4882a593Smuzhiyun 		schedule_work(&ctrl_info->raid_bypass_retry_work);
5046*4882a593Smuzhiyun }
5047*4882a593Smuzhiyun 
pqi_raid_bypass_retry_needed(struct pqi_io_request * io_request)5048*4882a593Smuzhiyun static bool pqi_raid_bypass_retry_needed(struct pqi_io_request *io_request)
5049*4882a593Smuzhiyun {
5050*4882a593Smuzhiyun 	struct scsi_cmnd *scmd;
5051*4882a593Smuzhiyun 	struct pqi_scsi_dev *device;
5052*4882a593Smuzhiyun 	struct pqi_ctrl_info *ctrl_info;
5053*4882a593Smuzhiyun 
5054*4882a593Smuzhiyun 	if (!io_request->raid_bypass)
5055*4882a593Smuzhiyun 		return false;
5056*4882a593Smuzhiyun 
5057*4882a593Smuzhiyun 	scmd = io_request->scmd;
5058*4882a593Smuzhiyun 	if ((scmd->result & 0xff) == SAM_STAT_GOOD)
5059*4882a593Smuzhiyun 		return false;
5060*4882a593Smuzhiyun 	if (host_byte(scmd->result) == DID_NO_CONNECT)
5061*4882a593Smuzhiyun 		return false;
5062*4882a593Smuzhiyun 
5063*4882a593Smuzhiyun 	device = scmd->device->hostdata;
5064*4882a593Smuzhiyun 	if (pqi_device_offline(device))
5065*4882a593Smuzhiyun 		return false;
5066*4882a593Smuzhiyun 
5067*4882a593Smuzhiyun 	ctrl_info = shost_to_hba(scmd->device->host);
5068*4882a593Smuzhiyun 	if (pqi_ctrl_offline(ctrl_info))
5069*4882a593Smuzhiyun 		return false;
5070*4882a593Smuzhiyun 
5071*4882a593Smuzhiyun 	return true;
5072*4882a593Smuzhiyun }
5073*4882a593Smuzhiyun 
pqi_add_to_raid_bypass_retry_list(struct pqi_ctrl_info * ctrl_info,struct pqi_io_request * io_request,bool at_head)5074*4882a593Smuzhiyun static inline void pqi_add_to_raid_bypass_retry_list(
5075*4882a593Smuzhiyun 	struct pqi_ctrl_info *ctrl_info,
5076*4882a593Smuzhiyun 	struct pqi_io_request *io_request, bool at_head)
5077*4882a593Smuzhiyun {
5078*4882a593Smuzhiyun 	unsigned long flags;
5079*4882a593Smuzhiyun 
5080*4882a593Smuzhiyun 	spin_lock_irqsave(&ctrl_info->raid_bypass_retry_list_lock, flags);
5081*4882a593Smuzhiyun 	if (at_head)
5082*4882a593Smuzhiyun 		list_add(&io_request->request_list_entry,
5083*4882a593Smuzhiyun 			&ctrl_info->raid_bypass_retry_list);
5084*4882a593Smuzhiyun 	else
5085*4882a593Smuzhiyun 		list_add_tail(&io_request->request_list_entry,
5086*4882a593Smuzhiyun 			&ctrl_info->raid_bypass_retry_list);
5087*4882a593Smuzhiyun 	spin_unlock_irqrestore(&ctrl_info->raid_bypass_retry_list_lock, flags);
5088*4882a593Smuzhiyun }
5089*4882a593Smuzhiyun 
pqi_queued_raid_bypass_complete(struct pqi_io_request * io_request,void * context)5090*4882a593Smuzhiyun static void pqi_queued_raid_bypass_complete(struct pqi_io_request *io_request,
5091*4882a593Smuzhiyun 	void *context)
5092*4882a593Smuzhiyun {
5093*4882a593Smuzhiyun 	struct scsi_cmnd *scmd;
5094*4882a593Smuzhiyun 
5095*4882a593Smuzhiyun 	scmd = io_request->scmd;
5096*4882a593Smuzhiyun 	pqi_free_io_request(io_request);
5097*4882a593Smuzhiyun 	pqi_scsi_done(scmd);
5098*4882a593Smuzhiyun }
5099*4882a593Smuzhiyun 
pqi_queue_raid_bypass_retry(struct pqi_io_request * io_request)5100*4882a593Smuzhiyun static void pqi_queue_raid_bypass_retry(struct pqi_io_request *io_request)
5101*4882a593Smuzhiyun {
5102*4882a593Smuzhiyun 	struct scsi_cmnd *scmd;
5103*4882a593Smuzhiyun 	struct pqi_ctrl_info *ctrl_info;
5104*4882a593Smuzhiyun 
5105*4882a593Smuzhiyun 	io_request->io_complete_callback = pqi_queued_raid_bypass_complete;
5106*4882a593Smuzhiyun 	scmd = io_request->scmd;
5107*4882a593Smuzhiyun 	scmd->result = 0;
5108*4882a593Smuzhiyun 	ctrl_info = shost_to_hba(scmd->device->host);
5109*4882a593Smuzhiyun 
5110*4882a593Smuzhiyun 	pqi_add_to_raid_bypass_retry_list(ctrl_info, io_request, false);
5111*4882a593Smuzhiyun 	pqi_schedule_bypass_retry(ctrl_info);
5112*4882a593Smuzhiyun }
5113*4882a593Smuzhiyun 
pqi_retry_raid_bypass(struct pqi_io_request * io_request)5114*4882a593Smuzhiyun static int pqi_retry_raid_bypass(struct pqi_io_request *io_request)
5115*4882a593Smuzhiyun {
5116*4882a593Smuzhiyun 	struct scsi_cmnd *scmd;
5117*4882a593Smuzhiyun 	struct pqi_scsi_dev *device;
5118*4882a593Smuzhiyun 	struct pqi_ctrl_info *ctrl_info;
5119*4882a593Smuzhiyun 	struct pqi_queue_group *queue_group;
5120*4882a593Smuzhiyun 
5121*4882a593Smuzhiyun 	scmd = io_request->scmd;
5122*4882a593Smuzhiyun 	device = scmd->device->hostdata;
5123*4882a593Smuzhiyun 	if (pqi_device_in_reset(device)) {
5124*4882a593Smuzhiyun 		pqi_free_io_request(io_request);
5125*4882a593Smuzhiyun 		set_host_byte(scmd, DID_RESET);
5126*4882a593Smuzhiyun 		pqi_scsi_done(scmd);
5127*4882a593Smuzhiyun 		return 0;
5128*4882a593Smuzhiyun 	}
5129*4882a593Smuzhiyun 
5130*4882a593Smuzhiyun 	ctrl_info = shost_to_hba(scmd->device->host);
5131*4882a593Smuzhiyun 	queue_group = io_request->queue_group;
5132*4882a593Smuzhiyun 
5133*4882a593Smuzhiyun 	pqi_reinit_io_request(io_request);
5134*4882a593Smuzhiyun 
5135*4882a593Smuzhiyun 	return pqi_raid_submit_scsi_cmd_with_io_request(ctrl_info, io_request,
5136*4882a593Smuzhiyun 		device, scmd, queue_group);
5137*4882a593Smuzhiyun }
5138*4882a593Smuzhiyun 
pqi_next_queued_raid_bypass_request(struct pqi_ctrl_info * ctrl_info)5139*4882a593Smuzhiyun static inline struct pqi_io_request *pqi_next_queued_raid_bypass_request(
5140*4882a593Smuzhiyun 	struct pqi_ctrl_info *ctrl_info)
5141*4882a593Smuzhiyun {
5142*4882a593Smuzhiyun 	unsigned long flags;
5143*4882a593Smuzhiyun 	struct pqi_io_request *io_request;
5144*4882a593Smuzhiyun 
5145*4882a593Smuzhiyun 	spin_lock_irqsave(&ctrl_info->raid_bypass_retry_list_lock, flags);
5146*4882a593Smuzhiyun 	io_request = list_first_entry_or_null(
5147*4882a593Smuzhiyun 		&ctrl_info->raid_bypass_retry_list,
5148*4882a593Smuzhiyun 		struct pqi_io_request, request_list_entry);
5149*4882a593Smuzhiyun 	if (io_request)
5150*4882a593Smuzhiyun 		list_del(&io_request->request_list_entry);
5151*4882a593Smuzhiyun 	spin_unlock_irqrestore(&ctrl_info->raid_bypass_retry_list_lock, flags);
5152*4882a593Smuzhiyun 
5153*4882a593Smuzhiyun 	return io_request;
5154*4882a593Smuzhiyun }
5155*4882a593Smuzhiyun 
pqi_retry_raid_bypass_requests(struct pqi_ctrl_info * ctrl_info)5156*4882a593Smuzhiyun static void pqi_retry_raid_bypass_requests(struct pqi_ctrl_info *ctrl_info)
5157*4882a593Smuzhiyun {
5158*4882a593Smuzhiyun 	int rc;
5159*4882a593Smuzhiyun 	struct pqi_io_request *io_request;
5160*4882a593Smuzhiyun 
5161*4882a593Smuzhiyun 	pqi_ctrl_busy(ctrl_info);
5162*4882a593Smuzhiyun 
5163*4882a593Smuzhiyun 	while (1) {
5164*4882a593Smuzhiyun 		if (pqi_ctrl_blocked(ctrl_info))
5165*4882a593Smuzhiyun 			break;
5166*4882a593Smuzhiyun 		io_request = pqi_next_queued_raid_bypass_request(ctrl_info);
5167*4882a593Smuzhiyun 		if (!io_request)
5168*4882a593Smuzhiyun 			break;
5169*4882a593Smuzhiyun 		rc = pqi_retry_raid_bypass(io_request);
5170*4882a593Smuzhiyun 		if (rc) {
5171*4882a593Smuzhiyun 			pqi_add_to_raid_bypass_retry_list(ctrl_info, io_request,
5172*4882a593Smuzhiyun 				true);
5173*4882a593Smuzhiyun 			pqi_schedule_bypass_retry(ctrl_info);
5174*4882a593Smuzhiyun 			break;
5175*4882a593Smuzhiyun 		}
5176*4882a593Smuzhiyun 	}
5177*4882a593Smuzhiyun 
5178*4882a593Smuzhiyun 	pqi_ctrl_unbusy(ctrl_info);
5179*4882a593Smuzhiyun }
5180*4882a593Smuzhiyun 
pqi_raid_bypass_retry_worker(struct work_struct * work)5181*4882a593Smuzhiyun static void pqi_raid_bypass_retry_worker(struct work_struct *work)
5182*4882a593Smuzhiyun {
5183*4882a593Smuzhiyun 	struct pqi_ctrl_info *ctrl_info;
5184*4882a593Smuzhiyun 
5185*4882a593Smuzhiyun 	ctrl_info = container_of(work, struct pqi_ctrl_info,
5186*4882a593Smuzhiyun 		raid_bypass_retry_work);
5187*4882a593Smuzhiyun 	pqi_retry_raid_bypass_requests(ctrl_info);
5188*4882a593Smuzhiyun }
5189*4882a593Smuzhiyun 
pqi_clear_all_queued_raid_bypass_retries(struct pqi_ctrl_info * ctrl_info)5190*4882a593Smuzhiyun static void pqi_clear_all_queued_raid_bypass_retries(
5191*4882a593Smuzhiyun 	struct pqi_ctrl_info *ctrl_info)
5192*4882a593Smuzhiyun {
5193*4882a593Smuzhiyun 	unsigned long flags;
5194*4882a593Smuzhiyun 
5195*4882a593Smuzhiyun 	spin_lock_irqsave(&ctrl_info->raid_bypass_retry_list_lock, flags);
5196*4882a593Smuzhiyun 	INIT_LIST_HEAD(&ctrl_info->raid_bypass_retry_list);
5197*4882a593Smuzhiyun 	spin_unlock_irqrestore(&ctrl_info->raid_bypass_retry_list_lock, flags);
5198*4882a593Smuzhiyun }
5199*4882a593Smuzhiyun 
pqi_aio_io_complete(struct pqi_io_request * io_request,void * context)5200*4882a593Smuzhiyun static void pqi_aio_io_complete(struct pqi_io_request *io_request,
5201*4882a593Smuzhiyun 	void *context)
5202*4882a593Smuzhiyun {
5203*4882a593Smuzhiyun 	struct scsi_cmnd *scmd;
5204*4882a593Smuzhiyun 
5205*4882a593Smuzhiyun 	scmd = io_request->scmd;
5206*4882a593Smuzhiyun 	scsi_dma_unmap(scmd);
5207*4882a593Smuzhiyun 	if (io_request->status == -EAGAIN)
5208*4882a593Smuzhiyun 		set_host_byte(scmd, DID_IMM_RETRY);
5209*4882a593Smuzhiyun 	else if (pqi_raid_bypass_retry_needed(io_request)) {
5210*4882a593Smuzhiyun 		pqi_queue_raid_bypass_retry(io_request);
5211*4882a593Smuzhiyun 		return;
5212*4882a593Smuzhiyun 	}
5213*4882a593Smuzhiyun 	pqi_free_io_request(io_request);
5214*4882a593Smuzhiyun 	pqi_scsi_done(scmd);
5215*4882a593Smuzhiyun }
5216*4882a593Smuzhiyun 
pqi_aio_submit_scsi_cmd(struct pqi_ctrl_info * ctrl_info,struct pqi_scsi_dev * device,struct scsi_cmnd * scmd,struct pqi_queue_group * queue_group)5217*4882a593Smuzhiyun static inline int pqi_aio_submit_scsi_cmd(struct pqi_ctrl_info *ctrl_info,
5218*4882a593Smuzhiyun 	struct pqi_scsi_dev *device, struct scsi_cmnd *scmd,
5219*4882a593Smuzhiyun 	struct pqi_queue_group *queue_group)
5220*4882a593Smuzhiyun {
5221*4882a593Smuzhiyun 	return pqi_aio_submit_io(ctrl_info, scmd, device->aio_handle,
5222*4882a593Smuzhiyun 		scmd->cmnd, scmd->cmd_len, queue_group, NULL, false);
5223*4882a593Smuzhiyun }
5224*4882a593Smuzhiyun 
pqi_aio_submit_io(struct pqi_ctrl_info * ctrl_info,struct scsi_cmnd * scmd,u32 aio_handle,u8 * cdb,unsigned int cdb_length,struct pqi_queue_group * queue_group,struct pqi_encryption_info * encryption_info,bool raid_bypass)5225*4882a593Smuzhiyun static int pqi_aio_submit_io(struct pqi_ctrl_info *ctrl_info,
5226*4882a593Smuzhiyun 	struct scsi_cmnd *scmd, u32 aio_handle, u8 *cdb,
5227*4882a593Smuzhiyun 	unsigned int cdb_length, struct pqi_queue_group *queue_group,
5228*4882a593Smuzhiyun 	struct pqi_encryption_info *encryption_info, bool raid_bypass)
5229*4882a593Smuzhiyun {
5230*4882a593Smuzhiyun 	int rc;
5231*4882a593Smuzhiyun 	struct pqi_io_request *io_request;
5232*4882a593Smuzhiyun 	struct pqi_aio_path_request *request;
5233*4882a593Smuzhiyun 
5234*4882a593Smuzhiyun 	io_request = pqi_alloc_io_request(ctrl_info);
5235*4882a593Smuzhiyun 	io_request->io_complete_callback = pqi_aio_io_complete;
5236*4882a593Smuzhiyun 	io_request->scmd = scmd;
5237*4882a593Smuzhiyun 	io_request->raid_bypass = raid_bypass;
5238*4882a593Smuzhiyun 
5239*4882a593Smuzhiyun 	request = io_request->iu;
5240*4882a593Smuzhiyun 	memset(request, 0,
5241*4882a593Smuzhiyun 		offsetof(struct pqi_raid_path_request, sg_descriptors));
5242*4882a593Smuzhiyun 
5243*4882a593Smuzhiyun 	request->header.iu_type = PQI_REQUEST_IU_AIO_PATH_IO;
5244*4882a593Smuzhiyun 	put_unaligned_le32(aio_handle, &request->nexus_id);
5245*4882a593Smuzhiyun 	put_unaligned_le32(scsi_bufflen(scmd), &request->buffer_length);
5246*4882a593Smuzhiyun 	request->task_attribute = SOP_TASK_ATTRIBUTE_SIMPLE;
5247*4882a593Smuzhiyun 	put_unaligned_le16(io_request->index, &request->request_id);
5248*4882a593Smuzhiyun 	request->error_index = request->request_id;
5249*4882a593Smuzhiyun 	if (cdb_length > sizeof(request->cdb))
5250*4882a593Smuzhiyun 		cdb_length = sizeof(request->cdb);
5251*4882a593Smuzhiyun 	request->cdb_length = cdb_length;
5252*4882a593Smuzhiyun 	memcpy(request->cdb, cdb, cdb_length);
5253*4882a593Smuzhiyun 
5254*4882a593Smuzhiyun 	switch (scmd->sc_data_direction) {
5255*4882a593Smuzhiyun 	case DMA_TO_DEVICE:
5256*4882a593Smuzhiyun 		request->data_direction = SOP_READ_FLAG;
5257*4882a593Smuzhiyun 		break;
5258*4882a593Smuzhiyun 	case DMA_FROM_DEVICE:
5259*4882a593Smuzhiyun 		request->data_direction = SOP_WRITE_FLAG;
5260*4882a593Smuzhiyun 		break;
5261*4882a593Smuzhiyun 	case DMA_NONE:
5262*4882a593Smuzhiyun 		request->data_direction = SOP_NO_DIRECTION_FLAG;
5263*4882a593Smuzhiyun 		break;
5264*4882a593Smuzhiyun 	case DMA_BIDIRECTIONAL:
5265*4882a593Smuzhiyun 		request->data_direction = SOP_BIDIRECTIONAL;
5266*4882a593Smuzhiyun 		break;
5267*4882a593Smuzhiyun 	default:
5268*4882a593Smuzhiyun 		dev_err(&ctrl_info->pci_dev->dev,
5269*4882a593Smuzhiyun 			"unknown data direction: %d\n",
5270*4882a593Smuzhiyun 			scmd->sc_data_direction);
5271*4882a593Smuzhiyun 		break;
5272*4882a593Smuzhiyun 	}
5273*4882a593Smuzhiyun 
5274*4882a593Smuzhiyun 	if (encryption_info) {
5275*4882a593Smuzhiyun 		request->encryption_enable = true;
5276*4882a593Smuzhiyun 		put_unaligned_le16(encryption_info->data_encryption_key_index,
5277*4882a593Smuzhiyun 			&request->data_encryption_key_index);
5278*4882a593Smuzhiyun 		put_unaligned_le32(encryption_info->encrypt_tweak_lower,
5279*4882a593Smuzhiyun 			&request->encrypt_tweak_lower);
5280*4882a593Smuzhiyun 		put_unaligned_le32(encryption_info->encrypt_tweak_upper,
5281*4882a593Smuzhiyun 			&request->encrypt_tweak_upper);
5282*4882a593Smuzhiyun 	}
5283*4882a593Smuzhiyun 
5284*4882a593Smuzhiyun 	rc = pqi_build_aio_sg_list(ctrl_info, request, scmd, io_request);
5285*4882a593Smuzhiyun 	if (rc) {
5286*4882a593Smuzhiyun 		pqi_free_io_request(io_request);
5287*4882a593Smuzhiyun 		return SCSI_MLQUEUE_HOST_BUSY;
5288*4882a593Smuzhiyun 	}
5289*4882a593Smuzhiyun 
5290*4882a593Smuzhiyun 	pqi_start_io(ctrl_info, queue_group, AIO_PATH, io_request);
5291*4882a593Smuzhiyun 
5292*4882a593Smuzhiyun 	return 0;
5293*4882a593Smuzhiyun }
5294*4882a593Smuzhiyun 
pqi_get_hw_queue(struct pqi_ctrl_info * ctrl_info,struct scsi_cmnd * scmd)5295*4882a593Smuzhiyun static inline u16 pqi_get_hw_queue(struct pqi_ctrl_info *ctrl_info,
5296*4882a593Smuzhiyun 	struct scsi_cmnd *scmd)
5297*4882a593Smuzhiyun {
5298*4882a593Smuzhiyun 	u16 hw_queue;
5299*4882a593Smuzhiyun 
5300*4882a593Smuzhiyun 	hw_queue = blk_mq_unique_tag_to_hwq(blk_mq_unique_tag(scmd->request));
5301*4882a593Smuzhiyun 	if (hw_queue > ctrl_info->max_hw_queue_index)
5302*4882a593Smuzhiyun 		hw_queue = 0;
5303*4882a593Smuzhiyun 
5304*4882a593Smuzhiyun 	return hw_queue;
5305*4882a593Smuzhiyun }
5306*4882a593Smuzhiyun 
5307*4882a593Smuzhiyun /*
5308*4882a593Smuzhiyun  * This function gets called just before we hand the completed SCSI request
5309*4882a593Smuzhiyun  * back to the SML.
5310*4882a593Smuzhiyun  */
5311*4882a593Smuzhiyun 
pqi_prep_for_scsi_done(struct scsi_cmnd * scmd)5312*4882a593Smuzhiyun void pqi_prep_for_scsi_done(struct scsi_cmnd *scmd)
5313*4882a593Smuzhiyun {
5314*4882a593Smuzhiyun 	struct pqi_scsi_dev *device;
5315*4882a593Smuzhiyun 
5316*4882a593Smuzhiyun 	if (!scmd->device) {
5317*4882a593Smuzhiyun 		set_host_byte(scmd, DID_NO_CONNECT);
5318*4882a593Smuzhiyun 		return;
5319*4882a593Smuzhiyun 	}
5320*4882a593Smuzhiyun 
5321*4882a593Smuzhiyun 	device = scmd->device->hostdata;
5322*4882a593Smuzhiyun 	if (!device) {
5323*4882a593Smuzhiyun 		set_host_byte(scmd, DID_NO_CONNECT);
5324*4882a593Smuzhiyun 		return;
5325*4882a593Smuzhiyun 	}
5326*4882a593Smuzhiyun 
5327*4882a593Smuzhiyun 	atomic_dec(&device->scsi_cmds_outstanding);
5328*4882a593Smuzhiyun }
5329*4882a593Smuzhiyun 
pqi_scsi_queue_command(struct Scsi_Host * shost,struct scsi_cmnd * scmd)5330*4882a593Smuzhiyun static int pqi_scsi_queue_command(struct Scsi_Host *shost,
5331*4882a593Smuzhiyun 	struct scsi_cmnd *scmd)
5332*4882a593Smuzhiyun {
5333*4882a593Smuzhiyun 	int rc;
5334*4882a593Smuzhiyun 	struct pqi_ctrl_info *ctrl_info;
5335*4882a593Smuzhiyun 	struct pqi_scsi_dev *device;
5336*4882a593Smuzhiyun 	u16 hw_queue;
5337*4882a593Smuzhiyun 	struct pqi_queue_group *queue_group;
5338*4882a593Smuzhiyun 	bool raid_bypassed;
5339*4882a593Smuzhiyun 
5340*4882a593Smuzhiyun 	device = scmd->device->hostdata;
5341*4882a593Smuzhiyun 	ctrl_info = shost_to_hba(shost);
5342*4882a593Smuzhiyun 
5343*4882a593Smuzhiyun 	if (!device) {
5344*4882a593Smuzhiyun 		set_host_byte(scmd, DID_NO_CONNECT);
5345*4882a593Smuzhiyun 		pqi_scsi_done(scmd);
5346*4882a593Smuzhiyun 		return 0;
5347*4882a593Smuzhiyun 	}
5348*4882a593Smuzhiyun 
5349*4882a593Smuzhiyun 	atomic_inc(&device->scsi_cmds_outstanding);
5350*4882a593Smuzhiyun 
5351*4882a593Smuzhiyun 	if (pqi_ctrl_offline(ctrl_info) || pqi_device_in_remove(ctrl_info,
5352*4882a593Smuzhiyun 								device)) {
5353*4882a593Smuzhiyun 		set_host_byte(scmd, DID_NO_CONNECT);
5354*4882a593Smuzhiyun 		pqi_scsi_done(scmd);
5355*4882a593Smuzhiyun 		return 0;
5356*4882a593Smuzhiyun 	}
5357*4882a593Smuzhiyun 
5358*4882a593Smuzhiyun 	pqi_ctrl_busy(ctrl_info);
5359*4882a593Smuzhiyun 	if (pqi_ctrl_blocked(ctrl_info) || pqi_device_in_reset(device) ||
5360*4882a593Smuzhiyun 	    pqi_ctrl_in_ofa(ctrl_info) || pqi_ctrl_in_shutdown(ctrl_info)) {
5361*4882a593Smuzhiyun 		rc = SCSI_MLQUEUE_HOST_BUSY;
5362*4882a593Smuzhiyun 		goto out;
5363*4882a593Smuzhiyun 	}
5364*4882a593Smuzhiyun 
5365*4882a593Smuzhiyun 	/*
5366*4882a593Smuzhiyun 	 * This is necessary because the SML doesn't zero out this field during
5367*4882a593Smuzhiyun 	 * error recovery.
5368*4882a593Smuzhiyun 	 */
5369*4882a593Smuzhiyun 	scmd->result = 0;
5370*4882a593Smuzhiyun 
5371*4882a593Smuzhiyun 	hw_queue = pqi_get_hw_queue(ctrl_info, scmd);
5372*4882a593Smuzhiyun 	queue_group = &ctrl_info->queue_groups[hw_queue];
5373*4882a593Smuzhiyun 
5374*4882a593Smuzhiyun 	if (pqi_is_logical_device(device)) {
5375*4882a593Smuzhiyun 		raid_bypassed = false;
5376*4882a593Smuzhiyun 		if (device->raid_bypass_enabled &&
5377*4882a593Smuzhiyun 			!blk_rq_is_passthrough(scmd->request)) {
5378*4882a593Smuzhiyun 			rc = pqi_raid_bypass_submit_scsi_cmd(ctrl_info, device,
5379*4882a593Smuzhiyun 				scmd, queue_group);
5380*4882a593Smuzhiyun 			if (rc == 0 || rc == SCSI_MLQUEUE_HOST_BUSY) {
5381*4882a593Smuzhiyun 				raid_bypassed = true;
5382*4882a593Smuzhiyun 				atomic_inc(&device->raid_bypass_cnt);
5383*4882a593Smuzhiyun 			}
5384*4882a593Smuzhiyun 		}
5385*4882a593Smuzhiyun 		if (!raid_bypassed)
5386*4882a593Smuzhiyun 			rc = pqi_raid_submit_scsi_cmd(ctrl_info, device, scmd, queue_group);
5387*4882a593Smuzhiyun 	} else {
5388*4882a593Smuzhiyun 		if (device->aio_enabled)
5389*4882a593Smuzhiyun 			rc = pqi_aio_submit_scsi_cmd(ctrl_info, device, scmd, queue_group);
5390*4882a593Smuzhiyun 		else
5391*4882a593Smuzhiyun 			rc = pqi_raid_submit_scsi_cmd(ctrl_info, device, scmd, queue_group);
5392*4882a593Smuzhiyun 	}
5393*4882a593Smuzhiyun 
5394*4882a593Smuzhiyun out:
5395*4882a593Smuzhiyun 	pqi_ctrl_unbusy(ctrl_info);
5396*4882a593Smuzhiyun 	if (rc)
5397*4882a593Smuzhiyun 		atomic_dec(&device->scsi_cmds_outstanding);
5398*4882a593Smuzhiyun 
5399*4882a593Smuzhiyun 	return rc;
5400*4882a593Smuzhiyun }
5401*4882a593Smuzhiyun 
pqi_wait_until_queued_io_drained(struct pqi_ctrl_info * ctrl_info,struct pqi_queue_group * queue_group)5402*4882a593Smuzhiyun static int pqi_wait_until_queued_io_drained(struct pqi_ctrl_info *ctrl_info,
5403*4882a593Smuzhiyun 	struct pqi_queue_group *queue_group)
5404*4882a593Smuzhiyun {
5405*4882a593Smuzhiyun 	unsigned int path;
5406*4882a593Smuzhiyun 	unsigned long flags;
5407*4882a593Smuzhiyun 	bool list_is_empty;
5408*4882a593Smuzhiyun 
5409*4882a593Smuzhiyun 	for (path = 0; path < 2; path++) {
5410*4882a593Smuzhiyun 		while (1) {
5411*4882a593Smuzhiyun 			spin_lock_irqsave(
5412*4882a593Smuzhiyun 				&queue_group->submit_lock[path], flags);
5413*4882a593Smuzhiyun 			list_is_empty =
5414*4882a593Smuzhiyun 				list_empty(&queue_group->request_list[path]);
5415*4882a593Smuzhiyun 			spin_unlock_irqrestore(
5416*4882a593Smuzhiyun 				&queue_group->submit_lock[path], flags);
5417*4882a593Smuzhiyun 			if (list_is_empty)
5418*4882a593Smuzhiyun 				break;
5419*4882a593Smuzhiyun 			pqi_check_ctrl_health(ctrl_info);
5420*4882a593Smuzhiyun 			if (pqi_ctrl_offline(ctrl_info))
5421*4882a593Smuzhiyun 				return -ENXIO;
5422*4882a593Smuzhiyun 			usleep_range(1000, 2000);
5423*4882a593Smuzhiyun 		}
5424*4882a593Smuzhiyun 	}
5425*4882a593Smuzhiyun 
5426*4882a593Smuzhiyun 	return 0;
5427*4882a593Smuzhiyun }
5428*4882a593Smuzhiyun 
pqi_wait_until_inbound_queues_empty(struct pqi_ctrl_info * ctrl_info)5429*4882a593Smuzhiyun static int pqi_wait_until_inbound_queues_empty(struct pqi_ctrl_info *ctrl_info)
5430*4882a593Smuzhiyun {
5431*4882a593Smuzhiyun 	int rc;
5432*4882a593Smuzhiyun 	unsigned int i;
5433*4882a593Smuzhiyun 	unsigned int path;
5434*4882a593Smuzhiyun 	struct pqi_queue_group *queue_group;
5435*4882a593Smuzhiyun 	pqi_index_t iq_pi;
5436*4882a593Smuzhiyun 	pqi_index_t iq_ci;
5437*4882a593Smuzhiyun 
5438*4882a593Smuzhiyun 	for (i = 0; i < ctrl_info->num_queue_groups; i++) {
5439*4882a593Smuzhiyun 		queue_group = &ctrl_info->queue_groups[i];
5440*4882a593Smuzhiyun 
5441*4882a593Smuzhiyun 		rc = pqi_wait_until_queued_io_drained(ctrl_info, queue_group);
5442*4882a593Smuzhiyun 		if (rc)
5443*4882a593Smuzhiyun 			return rc;
5444*4882a593Smuzhiyun 
5445*4882a593Smuzhiyun 		for (path = 0; path < 2; path++) {
5446*4882a593Smuzhiyun 			iq_pi = queue_group->iq_pi_copy[path];
5447*4882a593Smuzhiyun 
5448*4882a593Smuzhiyun 			while (1) {
5449*4882a593Smuzhiyun 				iq_ci = readl(queue_group->iq_ci[path]);
5450*4882a593Smuzhiyun 				if (iq_ci == iq_pi)
5451*4882a593Smuzhiyun 					break;
5452*4882a593Smuzhiyun 				pqi_check_ctrl_health(ctrl_info);
5453*4882a593Smuzhiyun 				if (pqi_ctrl_offline(ctrl_info))
5454*4882a593Smuzhiyun 					return -ENXIO;
5455*4882a593Smuzhiyun 				usleep_range(1000, 2000);
5456*4882a593Smuzhiyun 			}
5457*4882a593Smuzhiyun 		}
5458*4882a593Smuzhiyun 	}
5459*4882a593Smuzhiyun 
5460*4882a593Smuzhiyun 	return 0;
5461*4882a593Smuzhiyun }
5462*4882a593Smuzhiyun 
pqi_fail_io_queued_for_device(struct pqi_ctrl_info * ctrl_info,struct pqi_scsi_dev * device)5463*4882a593Smuzhiyun static void pqi_fail_io_queued_for_device(struct pqi_ctrl_info *ctrl_info,
5464*4882a593Smuzhiyun 	struct pqi_scsi_dev *device)
5465*4882a593Smuzhiyun {
5466*4882a593Smuzhiyun 	unsigned int i;
5467*4882a593Smuzhiyun 	unsigned int path;
5468*4882a593Smuzhiyun 	struct pqi_queue_group *queue_group;
5469*4882a593Smuzhiyun 	unsigned long flags;
5470*4882a593Smuzhiyun 	struct pqi_io_request *io_request;
5471*4882a593Smuzhiyun 	struct pqi_io_request *next;
5472*4882a593Smuzhiyun 	struct scsi_cmnd *scmd;
5473*4882a593Smuzhiyun 	struct pqi_scsi_dev *scsi_device;
5474*4882a593Smuzhiyun 
5475*4882a593Smuzhiyun 	for (i = 0; i < ctrl_info->num_queue_groups; i++) {
5476*4882a593Smuzhiyun 		queue_group = &ctrl_info->queue_groups[i];
5477*4882a593Smuzhiyun 
5478*4882a593Smuzhiyun 		for (path = 0; path < 2; path++) {
5479*4882a593Smuzhiyun 			spin_lock_irqsave(
5480*4882a593Smuzhiyun 				&queue_group->submit_lock[path], flags);
5481*4882a593Smuzhiyun 
5482*4882a593Smuzhiyun 			list_for_each_entry_safe(io_request, next,
5483*4882a593Smuzhiyun 				&queue_group->request_list[path],
5484*4882a593Smuzhiyun 				request_list_entry) {
5485*4882a593Smuzhiyun 				scmd = io_request->scmd;
5486*4882a593Smuzhiyun 				if (!scmd)
5487*4882a593Smuzhiyun 					continue;
5488*4882a593Smuzhiyun 
5489*4882a593Smuzhiyun 				scsi_device = scmd->device->hostdata;
5490*4882a593Smuzhiyun 				if (scsi_device != device)
5491*4882a593Smuzhiyun 					continue;
5492*4882a593Smuzhiyun 
5493*4882a593Smuzhiyun 				list_del(&io_request->request_list_entry);
5494*4882a593Smuzhiyun 				set_host_byte(scmd, DID_RESET);
5495*4882a593Smuzhiyun 				pqi_free_io_request(io_request);
5496*4882a593Smuzhiyun 				scsi_dma_unmap(scmd);
5497*4882a593Smuzhiyun 				pqi_scsi_done(scmd);
5498*4882a593Smuzhiyun 			}
5499*4882a593Smuzhiyun 
5500*4882a593Smuzhiyun 			spin_unlock_irqrestore(
5501*4882a593Smuzhiyun 				&queue_group->submit_lock[path], flags);
5502*4882a593Smuzhiyun 		}
5503*4882a593Smuzhiyun 	}
5504*4882a593Smuzhiyun }
5505*4882a593Smuzhiyun 
pqi_fail_io_queued_for_all_devices(struct pqi_ctrl_info * ctrl_info)5506*4882a593Smuzhiyun static void pqi_fail_io_queued_for_all_devices(struct pqi_ctrl_info *ctrl_info)
5507*4882a593Smuzhiyun {
5508*4882a593Smuzhiyun 	unsigned int i;
5509*4882a593Smuzhiyun 	unsigned int path;
5510*4882a593Smuzhiyun 	struct pqi_queue_group *queue_group;
5511*4882a593Smuzhiyun 	unsigned long flags;
5512*4882a593Smuzhiyun 	struct pqi_io_request *io_request;
5513*4882a593Smuzhiyun 	struct pqi_io_request *next;
5514*4882a593Smuzhiyun 	struct scsi_cmnd *scmd;
5515*4882a593Smuzhiyun 
5516*4882a593Smuzhiyun 	for (i = 0; i < ctrl_info->num_queue_groups; i++) {
5517*4882a593Smuzhiyun 		queue_group = &ctrl_info->queue_groups[i];
5518*4882a593Smuzhiyun 
5519*4882a593Smuzhiyun 		for (path = 0; path < 2; path++) {
5520*4882a593Smuzhiyun 			spin_lock_irqsave(&queue_group->submit_lock[path],
5521*4882a593Smuzhiyun 						flags);
5522*4882a593Smuzhiyun 
5523*4882a593Smuzhiyun 			list_for_each_entry_safe(io_request, next,
5524*4882a593Smuzhiyun 				&queue_group->request_list[path],
5525*4882a593Smuzhiyun 				request_list_entry) {
5526*4882a593Smuzhiyun 
5527*4882a593Smuzhiyun 				scmd = io_request->scmd;
5528*4882a593Smuzhiyun 				if (!scmd)
5529*4882a593Smuzhiyun 					continue;
5530*4882a593Smuzhiyun 
5531*4882a593Smuzhiyun 				list_del(&io_request->request_list_entry);
5532*4882a593Smuzhiyun 				set_host_byte(scmd, DID_RESET);
5533*4882a593Smuzhiyun 				pqi_free_io_request(io_request);
5534*4882a593Smuzhiyun 				scsi_dma_unmap(scmd);
5535*4882a593Smuzhiyun 				pqi_scsi_done(scmd);
5536*4882a593Smuzhiyun 			}
5537*4882a593Smuzhiyun 
5538*4882a593Smuzhiyun 			spin_unlock_irqrestore(
5539*4882a593Smuzhiyun 				&queue_group->submit_lock[path], flags);
5540*4882a593Smuzhiyun 		}
5541*4882a593Smuzhiyun 	}
5542*4882a593Smuzhiyun }
5543*4882a593Smuzhiyun 
pqi_device_wait_for_pending_io(struct pqi_ctrl_info * ctrl_info,struct pqi_scsi_dev * device,unsigned long timeout_secs)5544*4882a593Smuzhiyun static int pqi_device_wait_for_pending_io(struct pqi_ctrl_info *ctrl_info,
5545*4882a593Smuzhiyun 	struct pqi_scsi_dev *device, unsigned long timeout_secs)
5546*4882a593Smuzhiyun {
5547*4882a593Smuzhiyun 	unsigned long timeout;
5548*4882a593Smuzhiyun 
5549*4882a593Smuzhiyun 	timeout = (timeout_secs * PQI_HZ) + jiffies;
5550*4882a593Smuzhiyun 
5551*4882a593Smuzhiyun 	while (atomic_read(&device->scsi_cmds_outstanding)) {
5552*4882a593Smuzhiyun 		pqi_check_ctrl_health(ctrl_info);
5553*4882a593Smuzhiyun 		if (pqi_ctrl_offline(ctrl_info))
5554*4882a593Smuzhiyun 			return -ENXIO;
5555*4882a593Smuzhiyun 		if (timeout_secs != NO_TIMEOUT) {
5556*4882a593Smuzhiyun 			if (time_after(jiffies, timeout)) {
5557*4882a593Smuzhiyun 				dev_err(&ctrl_info->pci_dev->dev,
5558*4882a593Smuzhiyun 					"timed out waiting for pending IO\n");
5559*4882a593Smuzhiyun 				return -ETIMEDOUT;
5560*4882a593Smuzhiyun 			}
5561*4882a593Smuzhiyun 		}
5562*4882a593Smuzhiyun 		usleep_range(1000, 2000);
5563*4882a593Smuzhiyun 	}
5564*4882a593Smuzhiyun 
5565*4882a593Smuzhiyun 	return 0;
5566*4882a593Smuzhiyun }
5567*4882a593Smuzhiyun 
pqi_ctrl_wait_for_pending_io(struct pqi_ctrl_info * ctrl_info,unsigned long timeout_secs)5568*4882a593Smuzhiyun static int pqi_ctrl_wait_for_pending_io(struct pqi_ctrl_info *ctrl_info,
5569*4882a593Smuzhiyun 	unsigned long timeout_secs)
5570*4882a593Smuzhiyun {
5571*4882a593Smuzhiyun 	bool io_pending;
5572*4882a593Smuzhiyun 	unsigned long flags;
5573*4882a593Smuzhiyun 	unsigned long timeout;
5574*4882a593Smuzhiyun 	struct pqi_scsi_dev *device;
5575*4882a593Smuzhiyun 
5576*4882a593Smuzhiyun 	timeout = (timeout_secs * PQI_HZ) + jiffies;
5577*4882a593Smuzhiyun 	while (1) {
5578*4882a593Smuzhiyun 		io_pending = false;
5579*4882a593Smuzhiyun 
5580*4882a593Smuzhiyun 		spin_lock_irqsave(&ctrl_info->scsi_device_list_lock, flags);
5581*4882a593Smuzhiyun 		list_for_each_entry(device, &ctrl_info->scsi_device_list,
5582*4882a593Smuzhiyun 			scsi_device_list_entry) {
5583*4882a593Smuzhiyun 			if (atomic_read(&device->scsi_cmds_outstanding)) {
5584*4882a593Smuzhiyun 				io_pending = true;
5585*4882a593Smuzhiyun 				break;
5586*4882a593Smuzhiyun 			}
5587*4882a593Smuzhiyun 		}
5588*4882a593Smuzhiyun 		spin_unlock_irqrestore(&ctrl_info->scsi_device_list_lock,
5589*4882a593Smuzhiyun 					flags);
5590*4882a593Smuzhiyun 
5591*4882a593Smuzhiyun 		if (!io_pending)
5592*4882a593Smuzhiyun 			break;
5593*4882a593Smuzhiyun 
5594*4882a593Smuzhiyun 		pqi_check_ctrl_health(ctrl_info);
5595*4882a593Smuzhiyun 		if (pqi_ctrl_offline(ctrl_info))
5596*4882a593Smuzhiyun 			return -ENXIO;
5597*4882a593Smuzhiyun 
5598*4882a593Smuzhiyun 		if (timeout_secs != NO_TIMEOUT) {
5599*4882a593Smuzhiyun 			if (time_after(jiffies, timeout)) {
5600*4882a593Smuzhiyun 				dev_err(&ctrl_info->pci_dev->dev,
5601*4882a593Smuzhiyun 					"timed out waiting for pending IO\n");
5602*4882a593Smuzhiyun 				return -ETIMEDOUT;
5603*4882a593Smuzhiyun 			}
5604*4882a593Smuzhiyun 		}
5605*4882a593Smuzhiyun 		usleep_range(1000, 2000);
5606*4882a593Smuzhiyun 	}
5607*4882a593Smuzhiyun 
5608*4882a593Smuzhiyun 	return 0;
5609*4882a593Smuzhiyun }
5610*4882a593Smuzhiyun 
pqi_ctrl_wait_for_pending_sync_cmds(struct pqi_ctrl_info * ctrl_info)5611*4882a593Smuzhiyun static int pqi_ctrl_wait_for_pending_sync_cmds(struct pqi_ctrl_info *ctrl_info)
5612*4882a593Smuzhiyun {
5613*4882a593Smuzhiyun 	while (atomic_read(&ctrl_info->sync_cmds_outstanding)) {
5614*4882a593Smuzhiyun 		pqi_check_ctrl_health(ctrl_info);
5615*4882a593Smuzhiyun 		if (pqi_ctrl_offline(ctrl_info))
5616*4882a593Smuzhiyun 			return -ENXIO;
5617*4882a593Smuzhiyun 		usleep_range(1000, 2000);
5618*4882a593Smuzhiyun 	}
5619*4882a593Smuzhiyun 
5620*4882a593Smuzhiyun 	return 0;
5621*4882a593Smuzhiyun }
5622*4882a593Smuzhiyun 
pqi_lun_reset_complete(struct pqi_io_request * io_request,void * context)5623*4882a593Smuzhiyun static void pqi_lun_reset_complete(struct pqi_io_request *io_request,
5624*4882a593Smuzhiyun 	void *context)
5625*4882a593Smuzhiyun {
5626*4882a593Smuzhiyun 	struct completion *waiting = context;
5627*4882a593Smuzhiyun 
5628*4882a593Smuzhiyun 	complete(waiting);
5629*4882a593Smuzhiyun }
5630*4882a593Smuzhiyun 
5631*4882a593Smuzhiyun #define PQI_LUN_RESET_TIMEOUT_SECS		30
5632*4882a593Smuzhiyun #define PQI_LUN_RESET_POLL_COMPLETION_SECS	10
5633*4882a593Smuzhiyun 
pqi_wait_for_lun_reset_completion(struct pqi_ctrl_info * ctrl_info,struct pqi_scsi_dev * device,struct completion * wait)5634*4882a593Smuzhiyun static int pqi_wait_for_lun_reset_completion(struct pqi_ctrl_info *ctrl_info,
5635*4882a593Smuzhiyun 	struct pqi_scsi_dev *device, struct completion *wait)
5636*4882a593Smuzhiyun {
5637*4882a593Smuzhiyun 	int rc;
5638*4882a593Smuzhiyun 
5639*4882a593Smuzhiyun 	while (1) {
5640*4882a593Smuzhiyun 		if (wait_for_completion_io_timeout(wait,
5641*4882a593Smuzhiyun 			PQI_LUN_RESET_POLL_COMPLETION_SECS * PQI_HZ)) {
5642*4882a593Smuzhiyun 			rc = 0;
5643*4882a593Smuzhiyun 			break;
5644*4882a593Smuzhiyun 		}
5645*4882a593Smuzhiyun 
5646*4882a593Smuzhiyun 		pqi_check_ctrl_health(ctrl_info);
5647*4882a593Smuzhiyun 		if (pqi_ctrl_offline(ctrl_info)) {
5648*4882a593Smuzhiyun 			rc = -ENXIO;
5649*4882a593Smuzhiyun 			break;
5650*4882a593Smuzhiyun 		}
5651*4882a593Smuzhiyun 	}
5652*4882a593Smuzhiyun 
5653*4882a593Smuzhiyun 	return rc;
5654*4882a593Smuzhiyun }
5655*4882a593Smuzhiyun 
pqi_lun_reset(struct pqi_ctrl_info * ctrl_info,struct pqi_scsi_dev * device)5656*4882a593Smuzhiyun static int pqi_lun_reset(struct pqi_ctrl_info *ctrl_info,
5657*4882a593Smuzhiyun 	struct pqi_scsi_dev *device)
5658*4882a593Smuzhiyun {
5659*4882a593Smuzhiyun 	int rc;
5660*4882a593Smuzhiyun 	struct pqi_io_request *io_request;
5661*4882a593Smuzhiyun 	DECLARE_COMPLETION_ONSTACK(wait);
5662*4882a593Smuzhiyun 	struct pqi_task_management_request *request;
5663*4882a593Smuzhiyun 
5664*4882a593Smuzhiyun 	io_request = pqi_alloc_io_request(ctrl_info);
5665*4882a593Smuzhiyun 	io_request->io_complete_callback = pqi_lun_reset_complete;
5666*4882a593Smuzhiyun 	io_request->context = &wait;
5667*4882a593Smuzhiyun 
5668*4882a593Smuzhiyun 	request = io_request->iu;
5669*4882a593Smuzhiyun 	memset(request, 0, sizeof(*request));
5670*4882a593Smuzhiyun 
5671*4882a593Smuzhiyun 	request->header.iu_type = PQI_REQUEST_IU_TASK_MANAGEMENT;
5672*4882a593Smuzhiyun 	put_unaligned_le16(sizeof(*request) - PQI_REQUEST_HEADER_LENGTH,
5673*4882a593Smuzhiyun 		&request->header.iu_length);
5674*4882a593Smuzhiyun 	put_unaligned_le16(io_request->index, &request->request_id);
5675*4882a593Smuzhiyun 	memcpy(request->lun_number, device->scsi3addr,
5676*4882a593Smuzhiyun 		sizeof(request->lun_number));
5677*4882a593Smuzhiyun 	request->task_management_function = SOP_TASK_MANAGEMENT_LUN_RESET;
5678*4882a593Smuzhiyun 	if (ctrl_info->tmf_iu_timeout_supported)
5679*4882a593Smuzhiyun 		put_unaligned_le16(PQI_LUN_RESET_TIMEOUT_SECS,
5680*4882a593Smuzhiyun 					&request->timeout);
5681*4882a593Smuzhiyun 
5682*4882a593Smuzhiyun 	pqi_start_io(ctrl_info,
5683*4882a593Smuzhiyun 		&ctrl_info->queue_groups[PQI_DEFAULT_QUEUE_GROUP], RAID_PATH,
5684*4882a593Smuzhiyun 		io_request);
5685*4882a593Smuzhiyun 
5686*4882a593Smuzhiyun 	rc = pqi_wait_for_lun_reset_completion(ctrl_info, device, &wait);
5687*4882a593Smuzhiyun 	if (rc == 0)
5688*4882a593Smuzhiyun 		rc = io_request->status;
5689*4882a593Smuzhiyun 
5690*4882a593Smuzhiyun 	pqi_free_io_request(io_request);
5691*4882a593Smuzhiyun 
5692*4882a593Smuzhiyun 	return rc;
5693*4882a593Smuzhiyun }
5694*4882a593Smuzhiyun 
5695*4882a593Smuzhiyun /* Performs a reset at the LUN level. */
5696*4882a593Smuzhiyun 
5697*4882a593Smuzhiyun #define PQI_LUN_RESET_RETRIES			3
5698*4882a593Smuzhiyun #define PQI_LUN_RESET_RETRY_INTERVAL_MSECS	10000
5699*4882a593Smuzhiyun #define PQI_LUN_RESET_PENDING_IO_TIMEOUT_SECS	120
5700*4882a593Smuzhiyun 
_pqi_device_reset(struct pqi_ctrl_info * ctrl_info,struct pqi_scsi_dev * device)5701*4882a593Smuzhiyun static int _pqi_device_reset(struct pqi_ctrl_info *ctrl_info,
5702*4882a593Smuzhiyun 	struct pqi_scsi_dev *device)
5703*4882a593Smuzhiyun {
5704*4882a593Smuzhiyun 	int rc;
5705*4882a593Smuzhiyun 	unsigned int retries;
5706*4882a593Smuzhiyun 	unsigned long timeout_secs;
5707*4882a593Smuzhiyun 
5708*4882a593Smuzhiyun 	for (retries = 0;;) {
5709*4882a593Smuzhiyun 		rc = pqi_lun_reset(ctrl_info, device);
5710*4882a593Smuzhiyun 		if (rc == 0 || ++retries > PQI_LUN_RESET_RETRIES)
5711*4882a593Smuzhiyun 			break;
5712*4882a593Smuzhiyun 		msleep(PQI_LUN_RESET_RETRY_INTERVAL_MSECS);
5713*4882a593Smuzhiyun 	}
5714*4882a593Smuzhiyun 
5715*4882a593Smuzhiyun 	timeout_secs = rc ? PQI_LUN_RESET_PENDING_IO_TIMEOUT_SECS : NO_TIMEOUT;
5716*4882a593Smuzhiyun 
5717*4882a593Smuzhiyun 	rc |= pqi_device_wait_for_pending_io(ctrl_info, device, timeout_secs);
5718*4882a593Smuzhiyun 
5719*4882a593Smuzhiyun 	return rc == 0 ? SUCCESS : FAILED;
5720*4882a593Smuzhiyun }
5721*4882a593Smuzhiyun 
pqi_device_reset(struct pqi_ctrl_info * ctrl_info,struct pqi_scsi_dev * device)5722*4882a593Smuzhiyun static int pqi_device_reset(struct pqi_ctrl_info *ctrl_info,
5723*4882a593Smuzhiyun 	struct pqi_scsi_dev *device)
5724*4882a593Smuzhiyun {
5725*4882a593Smuzhiyun 	int rc;
5726*4882a593Smuzhiyun 
5727*4882a593Smuzhiyun 	mutex_lock(&ctrl_info->lun_reset_mutex);
5728*4882a593Smuzhiyun 
5729*4882a593Smuzhiyun 	pqi_ctrl_block_requests(ctrl_info);
5730*4882a593Smuzhiyun 	pqi_ctrl_wait_until_quiesced(ctrl_info);
5731*4882a593Smuzhiyun 	pqi_fail_io_queued_for_device(ctrl_info, device);
5732*4882a593Smuzhiyun 	rc = pqi_wait_until_inbound_queues_empty(ctrl_info);
5733*4882a593Smuzhiyun 	pqi_device_reset_start(device);
5734*4882a593Smuzhiyun 	pqi_ctrl_unblock_requests(ctrl_info);
5735*4882a593Smuzhiyun 
5736*4882a593Smuzhiyun 	if (rc)
5737*4882a593Smuzhiyun 		rc = FAILED;
5738*4882a593Smuzhiyun 	else
5739*4882a593Smuzhiyun 		rc = _pqi_device_reset(ctrl_info, device);
5740*4882a593Smuzhiyun 
5741*4882a593Smuzhiyun 	pqi_device_reset_done(device);
5742*4882a593Smuzhiyun 
5743*4882a593Smuzhiyun 	mutex_unlock(&ctrl_info->lun_reset_mutex);
5744*4882a593Smuzhiyun 
5745*4882a593Smuzhiyun 	return rc;
5746*4882a593Smuzhiyun }
5747*4882a593Smuzhiyun 
pqi_eh_device_reset_handler(struct scsi_cmnd * scmd)5748*4882a593Smuzhiyun static int pqi_eh_device_reset_handler(struct scsi_cmnd *scmd)
5749*4882a593Smuzhiyun {
5750*4882a593Smuzhiyun 	int rc;
5751*4882a593Smuzhiyun 	struct Scsi_Host *shost;
5752*4882a593Smuzhiyun 	struct pqi_ctrl_info *ctrl_info;
5753*4882a593Smuzhiyun 	struct pqi_scsi_dev *device;
5754*4882a593Smuzhiyun 
5755*4882a593Smuzhiyun 	shost = scmd->device->host;
5756*4882a593Smuzhiyun 	ctrl_info = shost_to_hba(shost);
5757*4882a593Smuzhiyun 	device = scmd->device->hostdata;
5758*4882a593Smuzhiyun 
5759*4882a593Smuzhiyun 	dev_err(&ctrl_info->pci_dev->dev,
5760*4882a593Smuzhiyun 		"resetting scsi %d:%d:%d:%d\n",
5761*4882a593Smuzhiyun 		shost->host_no, device->bus, device->target, device->lun);
5762*4882a593Smuzhiyun 
5763*4882a593Smuzhiyun 	pqi_check_ctrl_health(ctrl_info);
5764*4882a593Smuzhiyun 	if (pqi_ctrl_offline(ctrl_info) ||
5765*4882a593Smuzhiyun 		pqi_device_reset_blocked(ctrl_info)) {
5766*4882a593Smuzhiyun 		rc = FAILED;
5767*4882a593Smuzhiyun 		goto out;
5768*4882a593Smuzhiyun 	}
5769*4882a593Smuzhiyun 
5770*4882a593Smuzhiyun 	pqi_wait_until_ofa_finished(ctrl_info);
5771*4882a593Smuzhiyun 
5772*4882a593Smuzhiyun 	atomic_inc(&ctrl_info->sync_cmds_outstanding);
5773*4882a593Smuzhiyun 	rc = pqi_device_reset(ctrl_info, device);
5774*4882a593Smuzhiyun 	atomic_dec(&ctrl_info->sync_cmds_outstanding);
5775*4882a593Smuzhiyun 
5776*4882a593Smuzhiyun out:
5777*4882a593Smuzhiyun 	dev_err(&ctrl_info->pci_dev->dev,
5778*4882a593Smuzhiyun 		"reset of scsi %d:%d:%d:%d: %s\n",
5779*4882a593Smuzhiyun 		shost->host_no, device->bus, device->target, device->lun,
5780*4882a593Smuzhiyun 		rc == SUCCESS ? "SUCCESS" : "FAILED");
5781*4882a593Smuzhiyun 
5782*4882a593Smuzhiyun 	return rc;
5783*4882a593Smuzhiyun }
5784*4882a593Smuzhiyun 
pqi_slave_alloc(struct scsi_device * sdev)5785*4882a593Smuzhiyun static int pqi_slave_alloc(struct scsi_device *sdev)
5786*4882a593Smuzhiyun {
5787*4882a593Smuzhiyun 	struct pqi_scsi_dev *device;
5788*4882a593Smuzhiyun 	unsigned long flags;
5789*4882a593Smuzhiyun 	struct pqi_ctrl_info *ctrl_info;
5790*4882a593Smuzhiyun 	struct scsi_target *starget;
5791*4882a593Smuzhiyun 	struct sas_rphy *rphy;
5792*4882a593Smuzhiyun 
5793*4882a593Smuzhiyun 	ctrl_info = shost_to_hba(sdev->host);
5794*4882a593Smuzhiyun 
5795*4882a593Smuzhiyun 	spin_lock_irqsave(&ctrl_info->scsi_device_list_lock, flags);
5796*4882a593Smuzhiyun 
5797*4882a593Smuzhiyun 	if (sdev_channel(sdev) == PQI_PHYSICAL_DEVICE_BUS) {
5798*4882a593Smuzhiyun 		starget = scsi_target(sdev);
5799*4882a593Smuzhiyun 		rphy = target_to_rphy(starget);
5800*4882a593Smuzhiyun 		device = pqi_find_device_by_sas_rphy(ctrl_info, rphy);
5801*4882a593Smuzhiyun 		if (device) {
5802*4882a593Smuzhiyun 			device->target = sdev_id(sdev);
5803*4882a593Smuzhiyun 			device->lun = sdev->lun;
5804*4882a593Smuzhiyun 			device->target_lun_valid = true;
5805*4882a593Smuzhiyun 		}
5806*4882a593Smuzhiyun 	} else {
5807*4882a593Smuzhiyun 		device = pqi_find_scsi_dev(ctrl_info, sdev_channel(sdev),
5808*4882a593Smuzhiyun 			sdev_id(sdev), sdev->lun);
5809*4882a593Smuzhiyun 	}
5810*4882a593Smuzhiyun 
5811*4882a593Smuzhiyun 	if (device) {
5812*4882a593Smuzhiyun 		sdev->hostdata = device;
5813*4882a593Smuzhiyun 		device->sdev = sdev;
5814*4882a593Smuzhiyun 		if (device->queue_depth) {
5815*4882a593Smuzhiyun 			device->advertised_queue_depth = device->queue_depth;
5816*4882a593Smuzhiyun 			scsi_change_queue_depth(sdev,
5817*4882a593Smuzhiyun 				device->advertised_queue_depth);
5818*4882a593Smuzhiyun 		}
5819*4882a593Smuzhiyun 		if (pqi_is_logical_device(device))
5820*4882a593Smuzhiyun 			pqi_disable_write_same(sdev);
5821*4882a593Smuzhiyun 		else
5822*4882a593Smuzhiyun 			sdev->allow_restart = 1;
5823*4882a593Smuzhiyun 	}
5824*4882a593Smuzhiyun 
5825*4882a593Smuzhiyun 	spin_unlock_irqrestore(&ctrl_info->scsi_device_list_lock, flags);
5826*4882a593Smuzhiyun 
5827*4882a593Smuzhiyun 	return 0;
5828*4882a593Smuzhiyun }
5829*4882a593Smuzhiyun 
pqi_map_queues(struct Scsi_Host * shost)5830*4882a593Smuzhiyun static int pqi_map_queues(struct Scsi_Host *shost)
5831*4882a593Smuzhiyun {
5832*4882a593Smuzhiyun 	struct pqi_ctrl_info *ctrl_info = shost_to_hba(shost);
5833*4882a593Smuzhiyun 
5834*4882a593Smuzhiyun 	return blk_mq_pci_map_queues(&shost->tag_set.map[HCTX_TYPE_DEFAULT],
5835*4882a593Smuzhiyun 					ctrl_info->pci_dev, 0);
5836*4882a593Smuzhiyun }
5837*4882a593Smuzhiyun 
pqi_slave_configure(struct scsi_device * sdev)5838*4882a593Smuzhiyun static int pqi_slave_configure(struct scsi_device *sdev)
5839*4882a593Smuzhiyun {
5840*4882a593Smuzhiyun 	struct pqi_scsi_dev *device;
5841*4882a593Smuzhiyun 
5842*4882a593Smuzhiyun 	device = sdev->hostdata;
5843*4882a593Smuzhiyun 	device->devtype = sdev->type;
5844*4882a593Smuzhiyun 
5845*4882a593Smuzhiyun 	return 0;
5846*4882a593Smuzhiyun }
5847*4882a593Smuzhiyun 
pqi_slave_destroy(struct scsi_device * sdev)5848*4882a593Smuzhiyun static void pqi_slave_destroy(struct scsi_device *sdev)
5849*4882a593Smuzhiyun {
5850*4882a593Smuzhiyun 	unsigned long flags;
5851*4882a593Smuzhiyun 	struct pqi_scsi_dev *device;
5852*4882a593Smuzhiyun 	struct pqi_ctrl_info *ctrl_info;
5853*4882a593Smuzhiyun 
5854*4882a593Smuzhiyun 	ctrl_info = shost_to_hba(sdev->host);
5855*4882a593Smuzhiyun 
5856*4882a593Smuzhiyun 	spin_lock_irqsave(&ctrl_info->scsi_device_list_lock, flags);
5857*4882a593Smuzhiyun 
5858*4882a593Smuzhiyun 	device = sdev->hostdata;
5859*4882a593Smuzhiyun 	if (device) {
5860*4882a593Smuzhiyun 		sdev->hostdata = NULL;
5861*4882a593Smuzhiyun 		if (!list_empty(&device->scsi_device_list_entry))
5862*4882a593Smuzhiyun 			list_del(&device->scsi_device_list_entry);
5863*4882a593Smuzhiyun 	}
5864*4882a593Smuzhiyun 
5865*4882a593Smuzhiyun 	spin_unlock_irqrestore(&ctrl_info->scsi_device_list_lock, flags);
5866*4882a593Smuzhiyun 
5867*4882a593Smuzhiyun 	if (device) {
5868*4882a593Smuzhiyun 		pqi_dev_info(ctrl_info, "removed", device);
5869*4882a593Smuzhiyun 		pqi_free_device(device);
5870*4882a593Smuzhiyun 	}
5871*4882a593Smuzhiyun }
5872*4882a593Smuzhiyun 
pqi_getpciinfo_ioctl(struct pqi_ctrl_info * ctrl_info,void __user * arg)5873*4882a593Smuzhiyun static int pqi_getpciinfo_ioctl(struct pqi_ctrl_info *ctrl_info, void __user *arg)
5874*4882a593Smuzhiyun {
5875*4882a593Smuzhiyun 	struct pci_dev *pci_dev;
5876*4882a593Smuzhiyun 	u32 subsystem_vendor;
5877*4882a593Smuzhiyun 	u32 subsystem_device;
5878*4882a593Smuzhiyun 	cciss_pci_info_struct pciinfo;
5879*4882a593Smuzhiyun 
5880*4882a593Smuzhiyun 	if (!arg)
5881*4882a593Smuzhiyun 		return -EINVAL;
5882*4882a593Smuzhiyun 
5883*4882a593Smuzhiyun 	pci_dev = ctrl_info->pci_dev;
5884*4882a593Smuzhiyun 
5885*4882a593Smuzhiyun 	pciinfo.domain = pci_domain_nr(pci_dev->bus);
5886*4882a593Smuzhiyun 	pciinfo.bus = pci_dev->bus->number;
5887*4882a593Smuzhiyun 	pciinfo.dev_fn = pci_dev->devfn;
5888*4882a593Smuzhiyun 	subsystem_vendor = pci_dev->subsystem_vendor;
5889*4882a593Smuzhiyun 	subsystem_device = pci_dev->subsystem_device;
5890*4882a593Smuzhiyun 	pciinfo.board_id = ((subsystem_device << 16) & 0xffff0000) | subsystem_vendor;
5891*4882a593Smuzhiyun 
5892*4882a593Smuzhiyun 	if (copy_to_user(arg, &pciinfo, sizeof(pciinfo)))
5893*4882a593Smuzhiyun 		return -EFAULT;
5894*4882a593Smuzhiyun 
5895*4882a593Smuzhiyun 	return 0;
5896*4882a593Smuzhiyun }
5897*4882a593Smuzhiyun 
pqi_getdrivver_ioctl(void __user * arg)5898*4882a593Smuzhiyun static int pqi_getdrivver_ioctl(void __user *arg)
5899*4882a593Smuzhiyun {
5900*4882a593Smuzhiyun 	u32 version;
5901*4882a593Smuzhiyun 
5902*4882a593Smuzhiyun 	if (!arg)
5903*4882a593Smuzhiyun 		return -EINVAL;
5904*4882a593Smuzhiyun 
5905*4882a593Smuzhiyun 	version = (DRIVER_MAJOR << 28) | (DRIVER_MINOR << 24) |
5906*4882a593Smuzhiyun 		(DRIVER_RELEASE << 16) | DRIVER_REVISION;
5907*4882a593Smuzhiyun 
5908*4882a593Smuzhiyun 	if (copy_to_user(arg, &version, sizeof(version)))
5909*4882a593Smuzhiyun 		return -EFAULT;
5910*4882a593Smuzhiyun 
5911*4882a593Smuzhiyun 	return 0;
5912*4882a593Smuzhiyun }
5913*4882a593Smuzhiyun 
5914*4882a593Smuzhiyun struct ciss_error_info {
5915*4882a593Smuzhiyun 	u8	scsi_status;
5916*4882a593Smuzhiyun 	int	command_status;
5917*4882a593Smuzhiyun 	size_t	sense_data_length;
5918*4882a593Smuzhiyun };
5919*4882a593Smuzhiyun 
pqi_error_info_to_ciss(struct pqi_raid_error_info * pqi_error_info,struct ciss_error_info * ciss_error_info)5920*4882a593Smuzhiyun static void pqi_error_info_to_ciss(struct pqi_raid_error_info *pqi_error_info,
5921*4882a593Smuzhiyun 	struct ciss_error_info *ciss_error_info)
5922*4882a593Smuzhiyun {
5923*4882a593Smuzhiyun 	int ciss_cmd_status;
5924*4882a593Smuzhiyun 	size_t sense_data_length;
5925*4882a593Smuzhiyun 
5926*4882a593Smuzhiyun 	switch (pqi_error_info->data_out_result) {
5927*4882a593Smuzhiyun 	case PQI_DATA_IN_OUT_GOOD:
5928*4882a593Smuzhiyun 		ciss_cmd_status = CISS_CMD_STATUS_SUCCESS;
5929*4882a593Smuzhiyun 		break;
5930*4882a593Smuzhiyun 	case PQI_DATA_IN_OUT_UNDERFLOW:
5931*4882a593Smuzhiyun 		ciss_cmd_status = CISS_CMD_STATUS_DATA_UNDERRUN;
5932*4882a593Smuzhiyun 		break;
5933*4882a593Smuzhiyun 	case PQI_DATA_IN_OUT_BUFFER_OVERFLOW:
5934*4882a593Smuzhiyun 		ciss_cmd_status = CISS_CMD_STATUS_DATA_OVERRUN;
5935*4882a593Smuzhiyun 		break;
5936*4882a593Smuzhiyun 	case PQI_DATA_IN_OUT_PROTOCOL_ERROR:
5937*4882a593Smuzhiyun 	case PQI_DATA_IN_OUT_BUFFER_ERROR:
5938*4882a593Smuzhiyun 	case PQI_DATA_IN_OUT_BUFFER_OVERFLOW_DESCRIPTOR_AREA:
5939*4882a593Smuzhiyun 	case PQI_DATA_IN_OUT_BUFFER_OVERFLOW_BRIDGE:
5940*4882a593Smuzhiyun 	case PQI_DATA_IN_OUT_ERROR:
5941*4882a593Smuzhiyun 		ciss_cmd_status = CISS_CMD_STATUS_PROTOCOL_ERROR;
5942*4882a593Smuzhiyun 		break;
5943*4882a593Smuzhiyun 	case PQI_DATA_IN_OUT_HARDWARE_ERROR:
5944*4882a593Smuzhiyun 	case PQI_DATA_IN_OUT_PCIE_FABRIC_ERROR:
5945*4882a593Smuzhiyun 	case PQI_DATA_IN_OUT_PCIE_COMPLETION_TIMEOUT:
5946*4882a593Smuzhiyun 	case PQI_DATA_IN_OUT_PCIE_COMPLETER_ABORT_RECEIVED:
5947*4882a593Smuzhiyun 	case PQI_DATA_IN_OUT_PCIE_UNSUPPORTED_REQUEST_RECEIVED:
5948*4882a593Smuzhiyun 	case PQI_DATA_IN_OUT_PCIE_ECRC_CHECK_FAILED:
5949*4882a593Smuzhiyun 	case PQI_DATA_IN_OUT_PCIE_UNSUPPORTED_REQUEST:
5950*4882a593Smuzhiyun 	case PQI_DATA_IN_OUT_PCIE_ACS_VIOLATION:
5951*4882a593Smuzhiyun 	case PQI_DATA_IN_OUT_PCIE_TLP_PREFIX_BLOCKED:
5952*4882a593Smuzhiyun 	case PQI_DATA_IN_OUT_PCIE_POISONED_MEMORY_READ:
5953*4882a593Smuzhiyun 		ciss_cmd_status = CISS_CMD_STATUS_HARDWARE_ERROR;
5954*4882a593Smuzhiyun 		break;
5955*4882a593Smuzhiyun 	case PQI_DATA_IN_OUT_UNSOLICITED_ABORT:
5956*4882a593Smuzhiyun 		ciss_cmd_status = CISS_CMD_STATUS_UNSOLICITED_ABORT;
5957*4882a593Smuzhiyun 		break;
5958*4882a593Smuzhiyun 	case PQI_DATA_IN_OUT_ABORTED:
5959*4882a593Smuzhiyun 		ciss_cmd_status = CISS_CMD_STATUS_ABORTED;
5960*4882a593Smuzhiyun 		break;
5961*4882a593Smuzhiyun 	case PQI_DATA_IN_OUT_TIMEOUT:
5962*4882a593Smuzhiyun 		ciss_cmd_status = CISS_CMD_STATUS_TIMEOUT;
5963*4882a593Smuzhiyun 		break;
5964*4882a593Smuzhiyun 	default:
5965*4882a593Smuzhiyun 		ciss_cmd_status = CISS_CMD_STATUS_TARGET_STATUS;
5966*4882a593Smuzhiyun 		break;
5967*4882a593Smuzhiyun 	}
5968*4882a593Smuzhiyun 
5969*4882a593Smuzhiyun 	sense_data_length =
5970*4882a593Smuzhiyun 		get_unaligned_le16(&pqi_error_info->sense_data_length);
5971*4882a593Smuzhiyun 	if (sense_data_length == 0)
5972*4882a593Smuzhiyun 		sense_data_length =
5973*4882a593Smuzhiyun 		get_unaligned_le16(&pqi_error_info->response_data_length);
5974*4882a593Smuzhiyun 	if (sense_data_length)
5975*4882a593Smuzhiyun 		if (sense_data_length > sizeof(pqi_error_info->data))
5976*4882a593Smuzhiyun 			sense_data_length = sizeof(pqi_error_info->data);
5977*4882a593Smuzhiyun 
5978*4882a593Smuzhiyun 	ciss_error_info->scsi_status = pqi_error_info->status;
5979*4882a593Smuzhiyun 	ciss_error_info->command_status = ciss_cmd_status;
5980*4882a593Smuzhiyun 	ciss_error_info->sense_data_length = sense_data_length;
5981*4882a593Smuzhiyun }
5982*4882a593Smuzhiyun 
pqi_passthru_ioctl(struct pqi_ctrl_info * ctrl_info,void __user * arg)5983*4882a593Smuzhiyun static int pqi_passthru_ioctl(struct pqi_ctrl_info *ctrl_info, void __user *arg)
5984*4882a593Smuzhiyun {
5985*4882a593Smuzhiyun 	int rc;
5986*4882a593Smuzhiyun 	char *kernel_buffer = NULL;
5987*4882a593Smuzhiyun 	u16 iu_length;
5988*4882a593Smuzhiyun 	size_t sense_data_length;
5989*4882a593Smuzhiyun 	IOCTL_Command_struct iocommand;
5990*4882a593Smuzhiyun 	struct pqi_raid_path_request request;
5991*4882a593Smuzhiyun 	struct pqi_raid_error_info pqi_error_info;
5992*4882a593Smuzhiyun 	struct ciss_error_info ciss_error_info;
5993*4882a593Smuzhiyun 
5994*4882a593Smuzhiyun 	if (pqi_ctrl_offline(ctrl_info))
5995*4882a593Smuzhiyun 		return -ENXIO;
5996*4882a593Smuzhiyun 	if (!arg)
5997*4882a593Smuzhiyun 		return -EINVAL;
5998*4882a593Smuzhiyun 	if (!capable(CAP_SYS_RAWIO))
5999*4882a593Smuzhiyun 		return -EPERM;
6000*4882a593Smuzhiyun 	if (copy_from_user(&iocommand, arg, sizeof(iocommand)))
6001*4882a593Smuzhiyun 		return -EFAULT;
6002*4882a593Smuzhiyun 	if (iocommand.buf_size < 1 &&
6003*4882a593Smuzhiyun 		iocommand.Request.Type.Direction != XFER_NONE)
6004*4882a593Smuzhiyun 		return -EINVAL;
6005*4882a593Smuzhiyun 	if (iocommand.Request.CDBLen > sizeof(request.cdb))
6006*4882a593Smuzhiyun 		return -EINVAL;
6007*4882a593Smuzhiyun 	if (iocommand.Request.Type.Type != TYPE_CMD)
6008*4882a593Smuzhiyun 		return -EINVAL;
6009*4882a593Smuzhiyun 
6010*4882a593Smuzhiyun 	switch (iocommand.Request.Type.Direction) {
6011*4882a593Smuzhiyun 	case XFER_NONE:
6012*4882a593Smuzhiyun 	case XFER_WRITE:
6013*4882a593Smuzhiyun 	case XFER_READ:
6014*4882a593Smuzhiyun 	case XFER_READ | XFER_WRITE:
6015*4882a593Smuzhiyun 		break;
6016*4882a593Smuzhiyun 	default:
6017*4882a593Smuzhiyun 		return -EINVAL;
6018*4882a593Smuzhiyun 	}
6019*4882a593Smuzhiyun 
6020*4882a593Smuzhiyun 	if (iocommand.buf_size > 0) {
6021*4882a593Smuzhiyun 		kernel_buffer = kmalloc(iocommand.buf_size, GFP_KERNEL);
6022*4882a593Smuzhiyun 		if (!kernel_buffer)
6023*4882a593Smuzhiyun 			return -ENOMEM;
6024*4882a593Smuzhiyun 		if (iocommand.Request.Type.Direction & XFER_WRITE) {
6025*4882a593Smuzhiyun 			if (copy_from_user(kernel_buffer, iocommand.buf,
6026*4882a593Smuzhiyun 				iocommand.buf_size)) {
6027*4882a593Smuzhiyun 				rc = -EFAULT;
6028*4882a593Smuzhiyun 				goto out;
6029*4882a593Smuzhiyun 			}
6030*4882a593Smuzhiyun 		} else {
6031*4882a593Smuzhiyun 			memset(kernel_buffer, 0, iocommand.buf_size);
6032*4882a593Smuzhiyun 		}
6033*4882a593Smuzhiyun 	}
6034*4882a593Smuzhiyun 
6035*4882a593Smuzhiyun 	memset(&request, 0, sizeof(request));
6036*4882a593Smuzhiyun 
6037*4882a593Smuzhiyun 	request.header.iu_type = PQI_REQUEST_IU_RAID_PATH_IO;
6038*4882a593Smuzhiyun 	iu_length = offsetof(struct pqi_raid_path_request, sg_descriptors) -
6039*4882a593Smuzhiyun 		PQI_REQUEST_HEADER_LENGTH;
6040*4882a593Smuzhiyun 	memcpy(request.lun_number, iocommand.LUN_info.LunAddrBytes,
6041*4882a593Smuzhiyun 		sizeof(request.lun_number));
6042*4882a593Smuzhiyun 	memcpy(request.cdb, iocommand.Request.CDB, iocommand.Request.CDBLen);
6043*4882a593Smuzhiyun 	request.additional_cdb_bytes_usage = SOP_ADDITIONAL_CDB_BYTES_0;
6044*4882a593Smuzhiyun 
6045*4882a593Smuzhiyun 	switch (iocommand.Request.Type.Direction) {
6046*4882a593Smuzhiyun 	case XFER_NONE:
6047*4882a593Smuzhiyun 		request.data_direction = SOP_NO_DIRECTION_FLAG;
6048*4882a593Smuzhiyun 		break;
6049*4882a593Smuzhiyun 	case XFER_WRITE:
6050*4882a593Smuzhiyun 		request.data_direction = SOP_WRITE_FLAG;
6051*4882a593Smuzhiyun 		break;
6052*4882a593Smuzhiyun 	case XFER_READ:
6053*4882a593Smuzhiyun 		request.data_direction = SOP_READ_FLAG;
6054*4882a593Smuzhiyun 		break;
6055*4882a593Smuzhiyun 	case XFER_READ | XFER_WRITE:
6056*4882a593Smuzhiyun 		request.data_direction = SOP_BIDIRECTIONAL;
6057*4882a593Smuzhiyun 		break;
6058*4882a593Smuzhiyun 	}
6059*4882a593Smuzhiyun 
6060*4882a593Smuzhiyun 	request.task_attribute = SOP_TASK_ATTRIBUTE_SIMPLE;
6061*4882a593Smuzhiyun 
6062*4882a593Smuzhiyun 	if (iocommand.buf_size > 0) {
6063*4882a593Smuzhiyun 		put_unaligned_le32(iocommand.buf_size, &request.buffer_length);
6064*4882a593Smuzhiyun 
6065*4882a593Smuzhiyun 		rc = pqi_map_single(ctrl_info->pci_dev,
6066*4882a593Smuzhiyun 			&request.sg_descriptors[0], kernel_buffer,
6067*4882a593Smuzhiyun 			iocommand.buf_size, DMA_BIDIRECTIONAL);
6068*4882a593Smuzhiyun 		if (rc)
6069*4882a593Smuzhiyun 			goto out;
6070*4882a593Smuzhiyun 
6071*4882a593Smuzhiyun 		iu_length += sizeof(request.sg_descriptors[0]);
6072*4882a593Smuzhiyun 	}
6073*4882a593Smuzhiyun 
6074*4882a593Smuzhiyun 	put_unaligned_le16(iu_length, &request.header.iu_length);
6075*4882a593Smuzhiyun 
6076*4882a593Smuzhiyun 	if (ctrl_info->raid_iu_timeout_supported)
6077*4882a593Smuzhiyun 		put_unaligned_le32(iocommand.Request.Timeout, &request.timeout);
6078*4882a593Smuzhiyun 
6079*4882a593Smuzhiyun 	rc = pqi_submit_raid_request_synchronous(ctrl_info, &request.header,
6080*4882a593Smuzhiyun 		PQI_SYNC_FLAGS_INTERRUPTABLE, &pqi_error_info, NO_TIMEOUT);
6081*4882a593Smuzhiyun 
6082*4882a593Smuzhiyun 	if (iocommand.buf_size > 0)
6083*4882a593Smuzhiyun 		pqi_pci_unmap(ctrl_info->pci_dev, request.sg_descriptors, 1,
6084*4882a593Smuzhiyun 			DMA_BIDIRECTIONAL);
6085*4882a593Smuzhiyun 
6086*4882a593Smuzhiyun 	memset(&iocommand.error_info, 0, sizeof(iocommand.error_info));
6087*4882a593Smuzhiyun 
6088*4882a593Smuzhiyun 	if (rc == 0) {
6089*4882a593Smuzhiyun 		pqi_error_info_to_ciss(&pqi_error_info, &ciss_error_info);
6090*4882a593Smuzhiyun 		iocommand.error_info.ScsiStatus = ciss_error_info.scsi_status;
6091*4882a593Smuzhiyun 		iocommand.error_info.CommandStatus =
6092*4882a593Smuzhiyun 			ciss_error_info.command_status;
6093*4882a593Smuzhiyun 		sense_data_length = ciss_error_info.sense_data_length;
6094*4882a593Smuzhiyun 		if (sense_data_length) {
6095*4882a593Smuzhiyun 			if (sense_data_length >
6096*4882a593Smuzhiyun 				sizeof(iocommand.error_info.SenseInfo))
6097*4882a593Smuzhiyun 				sense_data_length =
6098*4882a593Smuzhiyun 					sizeof(iocommand.error_info.SenseInfo);
6099*4882a593Smuzhiyun 			memcpy(iocommand.error_info.SenseInfo,
6100*4882a593Smuzhiyun 				pqi_error_info.data, sense_data_length);
6101*4882a593Smuzhiyun 			iocommand.error_info.SenseLen = sense_data_length;
6102*4882a593Smuzhiyun 		}
6103*4882a593Smuzhiyun 	}
6104*4882a593Smuzhiyun 
6105*4882a593Smuzhiyun 	if (copy_to_user(arg, &iocommand, sizeof(iocommand))) {
6106*4882a593Smuzhiyun 		rc = -EFAULT;
6107*4882a593Smuzhiyun 		goto out;
6108*4882a593Smuzhiyun 	}
6109*4882a593Smuzhiyun 
6110*4882a593Smuzhiyun 	if (rc == 0 && iocommand.buf_size > 0 &&
6111*4882a593Smuzhiyun 		(iocommand.Request.Type.Direction & XFER_READ)) {
6112*4882a593Smuzhiyun 		if (copy_to_user(iocommand.buf, kernel_buffer,
6113*4882a593Smuzhiyun 			iocommand.buf_size)) {
6114*4882a593Smuzhiyun 			rc = -EFAULT;
6115*4882a593Smuzhiyun 		}
6116*4882a593Smuzhiyun 	}
6117*4882a593Smuzhiyun 
6118*4882a593Smuzhiyun out:
6119*4882a593Smuzhiyun 	kfree(kernel_buffer);
6120*4882a593Smuzhiyun 
6121*4882a593Smuzhiyun 	return rc;
6122*4882a593Smuzhiyun }
6123*4882a593Smuzhiyun 
pqi_ioctl(struct scsi_device * sdev,unsigned int cmd,void __user * arg)6124*4882a593Smuzhiyun static int pqi_ioctl(struct scsi_device *sdev, unsigned int cmd,
6125*4882a593Smuzhiyun 		     void __user *arg)
6126*4882a593Smuzhiyun {
6127*4882a593Smuzhiyun 	int rc;
6128*4882a593Smuzhiyun 	struct pqi_ctrl_info *ctrl_info;
6129*4882a593Smuzhiyun 
6130*4882a593Smuzhiyun 	ctrl_info = shost_to_hba(sdev->host);
6131*4882a593Smuzhiyun 
6132*4882a593Smuzhiyun 	if (pqi_ctrl_in_ofa(ctrl_info) || pqi_ctrl_in_shutdown(ctrl_info))
6133*4882a593Smuzhiyun 		return -EBUSY;
6134*4882a593Smuzhiyun 
6135*4882a593Smuzhiyun 	switch (cmd) {
6136*4882a593Smuzhiyun 	case CCISS_DEREGDISK:
6137*4882a593Smuzhiyun 	case CCISS_REGNEWDISK:
6138*4882a593Smuzhiyun 	case CCISS_REGNEWD:
6139*4882a593Smuzhiyun 		rc = pqi_scan_scsi_devices(ctrl_info);
6140*4882a593Smuzhiyun 		break;
6141*4882a593Smuzhiyun 	case CCISS_GETPCIINFO:
6142*4882a593Smuzhiyun 		rc = pqi_getpciinfo_ioctl(ctrl_info, arg);
6143*4882a593Smuzhiyun 		break;
6144*4882a593Smuzhiyun 	case CCISS_GETDRIVVER:
6145*4882a593Smuzhiyun 		rc = pqi_getdrivver_ioctl(arg);
6146*4882a593Smuzhiyun 		break;
6147*4882a593Smuzhiyun 	case CCISS_PASSTHRU:
6148*4882a593Smuzhiyun 		rc = pqi_passthru_ioctl(ctrl_info, arg);
6149*4882a593Smuzhiyun 		break;
6150*4882a593Smuzhiyun 	default:
6151*4882a593Smuzhiyun 		rc = -EINVAL;
6152*4882a593Smuzhiyun 		break;
6153*4882a593Smuzhiyun 	}
6154*4882a593Smuzhiyun 
6155*4882a593Smuzhiyun 	return rc;
6156*4882a593Smuzhiyun }
6157*4882a593Smuzhiyun 
pqi_firmware_version_show(struct device * dev,struct device_attribute * attr,char * buffer)6158*4882a593Smuzhiyun static ssize_t pqi_firmware_version_show(struct device *dev,
6159*4882a593Smuzhiyun 	struct device_attribute *attr, char *buffer)
6160*4882a593Smuzhiyun {
6161*4882a593Smuzhiyun 	struct Scsi_Host *shost;
6162*4882a593Smuzhiyun 	struct pqi_ctrl_info *ctrl_info;
6163*4882a593Smuzhiyun 
6164*4882a593Smuzhiyun 	shost = class_to_shost(dev);
6165*4882a593Smuzhiyun 	ctrl_info = shost_to_hba(shost);
6166*4882a593Smuzhiyun 
6167*4882a593Smuzhiyun 	return snprintf(buffer, PAGE_SIZE, "%s\n", ctrl_info->firmware_version);
6168*4882a593Smuzhiyun }
6169*4882a593Smuzhiyun 
pqi_driver_version_show(struct device * dev,struct device_attribute * attr,char * buffer)6170*4882a593Smuzhiyun static ssize_t pqi_driver_version_show(struct device *dev,
6171*4882a593Smuzhiyun 	struct device_attribute *attr, char *buffer)
6172*4882a593Smuzhiyun {
6173*4882a593Smuzhiyun 	return snprintf(buffer, PAGE_SIZE, "%s\n",
6174*4882a593Smuzhiyun 			DRIVER_VERSION BUILD_TIMESTAMP);
6175*4882a593Smuzhiyun }
6176*4882a593Smuzhiyun 
pqi_serial_number_show(struct device * dev,struct device_attribute * attr,char * buffer)6177*4882a593Smuzhiyun static ssize_t pqi_serial_number_show(struct device *dev,
6178*4882a593Smuzhiyun 	struct device_attribute *attr, char *buffer)
6179*4882a593Smuzhiyun {
6180*4882a593Smuzhiyun 	struct Scsi_Host *shost;
6181*4882a593Smuzhiyun 	struct pqi_ctrl_info *ctrl_info;
6182*4882a593Smuzhiyun 
6183*4882a593Smuzhiyun 	shost = class_to_shost(dev);
6184*4882a593Smuzhiyun 	ctrl_info = shost_to_hba(shost);
6185*4882a593Smuzhiyun 
6186*4882a593Smuzhiyun 	return snprintf(buffer, PAGE_SIZE, "%s\n", ctrl_info->serial_number);
6187*4882a593Smuzhiyun }
6188*4882a593Smuzhiyun 
pqi_model_show(struct device * dev,struct device_attribute * attr,char * buffer)6189*4882a593Smuzhiyun static ssize_t pqi_model_show(struct device *dev,
6190*4882a593Smuzhiyun 	struct device_attribute *attr, char *buffer)
6191*4882a593Smuzhiyun {
6192*4882a593Smuzhiyun 	struct Scsi_Host *shost;
6193*4882a593Smuzhiyun 	struct pqi_ctrl_info *ctrl_info;
6194*4882a593Smuzhiyun 
6195*4882a593Smuzhiyun 	shost = class_to_shost(dev);
6196*4882a593Smuzhiyun 	ctrl_info = shost_to_hba(shost);
6197*4882a593Smuzhiyun 
6198*4882a593Smuzhiyun 	return snprintf(buffer, PAGE_SIZE, "%s\n", ctrl_info->model);
6199*4882a593Smuzhiyun }
6200*4882a593Smuzhiyun 
pqi_vendor_show(struct device * dev,struct device_attribute * attr,char * buffer)6201*4882a593Smuzhiyun static ssize_t pqi_vendor_show(struct device *dev,
6202*4882a593Smuzhiyun 	struct device_attribute *attr, char *buffer)
6203*4882a593Smuzhiyun {
6204*4882a593Smuzhiyun 	struct Scsi_Host *shost;
6205*4882a593Smuzhiyun 	struct pqi_ctrl_info *ctrl_info;
6206*4882a593Smuzhiyun 
6207*4882a593Smuzhiyun 	shost = class_to_shost(dev);
6208*4882a593Smuzhiyun 	ctrl_info = shost_to_hba(shost);
6209*4882a593Smuzhiyun 
6210*4882a593Smuzhiyun 	return snprintf(buffer, PAGE_SIZE, "%s\n", ctrl_info->vendor);
6211*4882a593Smuzhiyun }
6212*4882a593Smuzhiyun 
pqi_host_rescan_store(struct device * dev,struct device_attribute * attr,const char * buffer,size_t count)6213*4882a593Smuzhiyun static ssize_t pqi_host_rescan_store(struct device *dev,
6214*4882a593Smuzhiyun 	struct device_attribute *attr, const char *buffer, size_t count)
6215*4882a593Smuzhiyun {
6216*4882a593Smuzhiyun 	struct Scsi_Host *shost = class_to_shost(dev);
6217*4882a593Smuzhiyun 
6218*4882a593Smuzhiyun 	pqi_scan_start(shost);
6219*4882a593Smuzhiyun 
6220*4882a593Smuzhiyun 	return count;
6221*4882a593Smuzhiyun }
6222*4882a593Smuzhiyun 
pqi_lockup_action_show(struct device * dev,struct device_attribute * attr,char * buffer)6223*4882a593Smuzhiyun static ssize_t pqi_lockup_action_show(struct device *dev,
6224*4882a593Smuzhiyun 	struct device_attribute *attr, char *buffer)
6225*4882a593Smuzhiyun {
6226*4882a593Smuzhiyun 	int count = 0;
6227*4882a593Smuzhiyun 	unsigned int i;
6228*4882a593Smuzhiyun 
6229*4882a593Smuzhiyun 	for (i = 0; i < ARRAY_SIZE(pqi_lockup_actions); i++) {
6230*4882a593Smuzhiyun 		if (pqi_lockup_actions[i].action == pqi_lockup_action)
6231*4882a593Smuzhiyun 			count += scnprintf(buffer + count, PAGE_SIZE - count,
6232*4882a593Smuzhiyun 				"[%s] ", pqi_lockup_actions[i].name);
6233*4882a593Smuzhiyun 		else
6234*4882a593Smuzhiyun 			count += scnprintf(buffer + count, PAGE_SIZE - count,
6235*4882a593Smuzhiyun 				"%s ", pqi_lockup_actions[i].name);
6236*4882a593Smuzhiyun 	}
6237*4882a593Smuzhiyun 
6238*4882a593Smuzhiyun 	count += scnprintf(buffer + count, PAGE_SIZE - count, "\n");
6239*4882a593Smuzhiyun 
6240*4882a593Smuzhiyun 	return count;
6241*4882a593Smuzhiyun }
6242*4882a593Smuzhiyun 
pqi_lockup_action_store(struct device * dev,struct device_attribute * attr,const char * buffer,size_t count)6243*4882a593Smuzhiyun static ssize_t pqi_lockup_action_store(struct device *dev,
6244*4882a593Smuzhiyun 	struct device_attribute *attr, const char *buffer, size_t count)
6245*4882a593Smuzhiyun {
6246*4882a593Smuzhiyun 	unsigned int i;
6247*4882a593Smuzhiyun 	char *action_name;
6248*4882a593Smuzhiyun 	char action_name_buffer[32];
6249*4882a593Smuzhiyun 
6250*4882a593Smuzhiyun 	strlcpy(action_name_buffer, buffer, sizeof(action_name_buffer));
6251*4882a593Smuzhiyun 	action_name = strstrip(action_name_buffer);
6252*4882a593Smuzhiyun 
6253*4882a593Smuzhiyun 	for (i = 0; i < ARRAY_SIZE(pqi_lockup_actions); i++) {
6254*4882a593Smuzhiyun 		if (strcmp(action_name, pqi_lockup_actions[i].name) == 0) {
6255*4882a593Smuzhiyun 			pqi_lockup_action = pqi_lockup_actions[i].action;
6256*4882a593Smuzhiyun 			return count;
6257*4882a593Smuzhiyun 		}
6258*4882a593Smuzhiyun 	}
6259*4882a593Smuzhiyun 
6260*4882a593Smuzhiyun 	return -EINVAL;
6261*4882a593Smuzhiyun }
6262*4882a593Smuzhiyun 
6263*4882a593Smuzhiyun static DEVICE_ATTR(driver_version, 0444, pqi_driver_version_show, NULL);
6264*4882a593Smuzhiyun static DEVICE_ATTR(firmware_version, 0444, pqi_firmware_version_show, NULL);
6265*4882a593Smuzhiyun static DEVICE_ATTR(model, 0444, pqi_model_show, NULL);
6266*4882a593Smuzhiyun static DEVICE_ATTR(serial_number, 0444, pqi_serial_number_show, NULL);
6267*4882a593Smuzhiyun static DEVICE_ATTR(vendor, 0444, pqi_vendor_show, NULL);
6268*4882a593Smuzhiyun static DEVICE_ATTR(rescan, 0200, NULL, pqi_host_rescan_store);
6269*4882a593Smuzhiyun static DEVICE_ATTR(lockup_action, 0644,
6270*4882a593Smuzhiyun 	pqi_lockup_action_show, pqi_lockup_action_store);
6271*4882a593Smuzhiyun 
6272*4882a593Smuzhiyun static struct device_attribute *pqi_shost_attrs[] = {
6273*4882a593Smuzhiyun 	&dev_attr_driver_version,
6274*4882a593Smuzhiyun 	&dev_attr_firmware_version,
6275*4882a593Smuzhiyun 	&dev_attr_model,
6276*4882a593Smuzhiyun 	&dev_attr_serial_number,
6277*4882a593Smuzhiyun 	&dev_attr_vendor,
6278*4882a593Smuzhiyun 	&dev_attr_rescan,
6279*4882a593Smuzhiyun 	&dev_attr_lockup_action,
6280*4882a593Smuzhiyun 	NULL
6281*4882a593Smuzhiyun };
6282*4882a593Smuzhiyun 
pqi_unique_id_show(struct device * dev,struct device_attribute * attr,char * buffer)6283*4882a593Smuzhiyun static ssize_t pqi_unique_id_show(struct device *dev,
6284*4882a593Smuzhiyun 	struct device_attribute *attr, char *buffer)
6285*4882a593Smuzhiyun {
6286*4882a593Smuzhiyun 	struct pqi_ctrl_info *ctrl_info;
6287*4882a593Smuzhiyun 	struct scsi_device *sdev;
6288*4882a593Smuzhiyun 	struct pqi_scsi_dev *device;
6289*4882a593Smuzhiyun 	unsigned long flags;
6290*4882a593Smuzhiyun 	u8 unique_id[16];
6291*4882a593Smuzhiyun 
6292*4882a593Smuzhiyun 	sdev = to_scsi_device(dev);
6293*4882a593Smuzhiyun 	ctrl_info = shost_to_hba(sdev->host);
6294*4882a593Smuzhiyun 
6295*4882a593Smuzhiyun 	spin_lock_irqsave(&ctrl_info->scsi_device_list_lock, flags);
6296*4882a593Smuzhiyun 
6297*4882a593Smuzhiyun 	device = sdev->hostdata;
6298*4882a593Smuzhiyun 	if (!device) {
6299*4882a593Smuzhiyun 		spin_unlock_irqrestore(&ctrl_info->scsi_device_list_lock, flags);
6300*4882a593Smuzhiyun 		return -ENODEV;
6301*4882a593Smuzhiyun 	}
6302*4882a593Smuzhiyun 
6303*4882a593Smuzhiyun 	if (device->is_physical_device) {
6304*4882a593Smuzhiyun 		memset(unique_id, 0, 8);
6305*4882a593Smuzhiyun 		memcpy(unique_id + 8, &device->wwid, sizeof(device->wwid));
6306*4882a593Smuzhiyun 	} else {
6307*4882a593Smuzhiyun 		memcpy(unique_id, device->volume_id, sizeof(device->volume_id));
6308*4882a593Smuzhiyun 	}
6309*4882a593Smuzhiyun 
6310*4882a593Smuzhiyun 	spin_unlock_irqrestore(&ctrl_info->scsi_device_list_lock, flags);
6311*4882a593Smuzhiyun 
6312*4882a593Smuzhiyun 	return snprintf(buffer, PAGE_SIZE,
6313*4882a593Smuzhiyun 		"%02X%02X%02X%02X%02X%02X%02X%02X%02X%02X%02X%02X%02X%02X%02X%02X\n",
6314*4882a593Smuzhiyun 		unique_id[0], unique_id[1], unique_id[2], unique_id[3],
6315*4882a593Smuzhiyun 		unique_id[4], unique_id[5], unique_id[6], unique_id[7],
6316*4882a593Smuzhiyun 		unique_id[8], unique_id[9], unique_id[10], unique_id[11],
6317*4882a593Smuzhiyun 		unique_id[12], unique_id[13], unique_id[14], unique_id[15]);
6318*4882a593Smuzhiyun }
6319*4882a593Smuzhiyun 
pqi_lunid_show(struct device * dev,struct device_attribute * attr,char * buffer)6320*4882a593Smuzhiyun static ssize_t pqi_lunid_show(struct device *dev,
6321*4882a593Smuzhiyun 	struct device_attribute *attr, char *buffer)
6322*4882a593Smuzhiyun {
6323*4882a593Smuzhiyun 	struct pqi_ctrl_info *ctrl_info;
6324*4882a593Smuzhiyun 	struct scsi_device *sdev;
6325*4882a593Smuzhiyun 	struct pqi_scsi_dev *device;
6326*4882a593Smuzhiyun 	unsigned long flags;
6327*4882a593Smuzhiyun 	u8 lunid[8];
6328*4882a593Smuzhiyun 
6329*4882a593Smuzhiyun 	sdev = to_scsi_device(dev);
6330*4882a593Smuzhiyun 	ctrl_info = shost_to_hba(sdev->host);
6331*4882a593Smuzhiyun 
6332*4882a593Smuzhiyun 	spin_lock_irqsave(&ctrl_info->scsi_device_list_lock, flags);
6333*4882a593Smuzhiyun 
6334*4882a593Smuzhiyun 	device = sdev->hostdata;
6335*4882a593Smuzhiyun 	if (!device) {
6336*4882a593Smuzhiyun 		spin_unlock_irqrestore(&ctrl_info->scsi_device_list_lock, flags);
6337*4882a593Smuzhiyun 		return -ENODEV;
6338*4882a593Smuzhiyun 	}
6339*4882a593Smuzhiyun 
6340*4882a593Smuzhiyun 	memcpy(lunid, device->scsi3addr, sizeof(lunid));
6341*4882a593Smuzhiyun 
6342*4882a593Smuzhiyun 	spin_unlock_irqrestore(&ctrl_info->scsi_device_list_lock, flags);
6343*4882a593Smuzhiyun 
6344*4882a593Smuzhiyun 	return snprintf(buffer, PAGE_SIZE, "0x%8phN\n", lunid);
6345*4882a593Smuzhiyun }
6346*4882a593Smuzhiyun 
6347*4882a593Smuzhiyun #define MAX_PATHS	8
6348*4882a593Smuzhiyun 
pqi_path_info_show(struct device * dev,struct device_attribute * attr,char * buf)6349*4882a593Smuzhiyun static ssize_t pqi_path_info_show(struct device *dev,
6350*4882a593Smuzhiyun 	struct device_attribute *attr, char *buf)
6351*4882a593Smuzhiyun {
6352*4882a593Smuzhiyun 	struct pqi_ctrl_info *ctrl_info;
6353*4882a593Smuzhiyun 	struct scsi_device *sdev;
6354*4882a593Smuzhiyun 	struct pqi_scsi_dev *device;
6355*4882a593Smuzhiyun 	unsigned long flags;
6356*4882a593Smuzhiyun 	int i;
6357*4882a593Smuzhiyun 	int output_len = 0;
6358*4882a593Smuzhiyun 	u8 box;
6359*4882a593Smuzhiyun 	u8 bay;
6360*4882a593Smuzhiyun 	u8 path_map_index;
6361*4882a593Smuzhiyun 	char *active;
6362*4882a593Smuzhiyun 	u8 phys_connector[2];
6363*4882a593Smuzhiyun 
6364*4882a593Smuzhiyun 	sdev = to_scsi_device(dev);
6365*4882a593Smuzhiyun 	ctrl_info = shost_to_hba(sdev->host);
6366*4882a593Smuzhiyun 
6367*4882a593Smuzhiyun 	spin_lock_irqsave(&ctrl_info->scsi_device_list_lock, flags);
6368*4882a593Smuzhiyun 
6369*4882a593Smuzhiyun 	device = sdev->hostdata;
6370*4882a593Smuzhiyun 	if (!device) {
6371*4882a593Smuzhiyun 		spin_unlock_irqrestore(&ctrl_info->scsi_device_list_lock, flags);
6372*4882a593Smuzhiyun 		return -ENODEV;
6373*4882a593Smuzhiyun 	}
6374*4882a593Smuzhiyun 
6375*4882a593Smuzhiyun 	bay = device->bay;
6376*4882a593Smuzhiyun 	for (i = 0; i < MAX_PATHS; i++) {
6377*4882a593Smuzhiyun 		path_map_index = 1 << i;
6378*4882a593Smuzhiyun 		if (i == device->active_path_index)
6379*4882a593Smuzhiyun 			active = "Active";
6380*4882a593Smuzhiyun 		else if (device->path_map & path_map_index)
6381*4882a593Smuzhiyun 			active = "Inactive";
6382*4882a593Smuzhiyun 		else
6383*4882a593Smuzhiyun 			continue;
6384*4882a593Smuzhiyun 
6385*4882a593Smuzhiyun 		output_len += scnprintf(buf + output_len,
6386*4882a593Smuzhiyun 					PAGE_SIZE - output_len,
6387*4882a593Smuzhiyun 					"[%d:%d:%d:%d] %20.20s ",
6388*4882a593Smuzhiyun 					ctrl_info->scsi_host->host_no,
6389*4882a593Smuzhiyun 					device->bus, device->target,
6390*4882a593Smuzhiyun 					device->lun,
6391*4882a593Smuzhiyun 					scsi_device_type(device->devtype));
6392*4882a593Smuzhiyun 
6393*4882a593Smuzhiyun 		if (device->devtype == TYPE_RAID ||
6394*4882a593Smuzhiyun 			pqi_is_logical_device(device))
6395*4882a593Smuzhiyun 			goto end_buffer;
6396*4882a593Smuzhiyun 
6397*4882a593Smuzhiyun 		memcpy(&phys_connector, &device->phys_connector[i],
6398*4882a593Smuzhiyun 			sizeof(phys_connector));
6399*4882a593Smuzhiyun 		if (phys_connector[0] < '0')
6400*4882a593Smuzhiyun 			phys_connector[0] = '0';
6401*4882a593Smuzhiyun 		if (phys_connector[1] < '0')
6402*4882a593Smuzhiyun 			phys_connector[1] = '0';
6403*4882a593Smuzhiyun 
6404*4882a593Smuzhiyun 		output_len += scnprintf(buf + output_len,
6405*4882a593Smuzhiyun 					PAGE_SIZE - output_len,
6406*4882a593Smuzhiyun 					"PORT: %.2s ", phys_connector);
6407*4882a593Smuzhiyun 
6408*4882a593Smuzhiyun 		box = device->box[i];
6409*4882a593Smuzhiyun 		if (box != 0 && box != 0xFF)
6410*4882a593Smuzhiyun 			output_len += scnprintf(buf + output_len,
6411*4882a593Smuzhiyun 						PAGE_SIZE - output_len,
6412*4882a593Smuzhiyun 						"BOX: %hhu ", box);
6413*4882a593Smuzhiyun 
6414*4882a593Smuzhiyun 		if ((device->devtype == TYPE_DISK ||
6415*4882a593Smuzhiyun 			device->devtype == TYPE_ZBC) &&
6416*4882a593Smuzhiyun 			pqi_expose_device(device))
6417*4882a593Smuzhiyun 			output_len += scnprintf(buf + output_len,
6418*4882a593Smuzhiyun 						PAGE_SIZE - output_len,
6419*4882a593Smuzhiyun 						"BAY: %hhu ", bay);
6420*4882a593Smuzhiyun 
6421*4882a593Smuzhiyun end_buffer:
6422*4882a593Smuzhiyun 		output_len += scnprintf(buf + output_len,
6423*4882a593Smuzhiyun 					PAGE_SIZE - output_len,
6424*4882a593Smuzhiyun 					"%s\n", active);
6425*4882a593Smuzhiyun 	}
6426*4882a593Smuzhiyun 
6427*4882a593Smuzhiyun 	spin_unlock_irqrestore(&ctrl_info->scsi_device_list_lock, flags);
6428*4882a593Smuzhiyun 
6429*4882a593Smuzhiyun 	return output_len;
6430*4882a593Smuzhiyun }
6431*4882a593Smuzhiyun 
pqi_sas_address_show(struct device * dev,struct device_attribute * attr,char * buffer)6432*4882a593Smuzhiyun static ssize_t pqi_sas_address_show(struct device *dev,
6433*4882a593Smuzhiyun 	struct device_attribute *attr, char *buffer)
6434*4882a593Smuzhiyun {
6435*4882a593Smuzhiyun 	struct pqi_ctrl_info *ctrl_info;
6436*4882a593Smuzhiyun 	struct scsi_device *sdev;
6437*4882a593Smuzhiyun 	struct pqi_scsi_dev *device;
6438*4882a593Smuzhiyun 	unsigned long flags;
6439*4882a593Smuzhiyun 	u64 sas_address;
6440*4882a593Smuzhiyun 
6441*4882a593Smuzhiyun 	sdev = to_scsi_device(dev);
6442*4882a593Smuzhiyun 	ctrl_info = shost_to_hba(sdev->host);
6443*4882a593Smuzhiyun 
6444*4882a593Smuzhiyun 	spin_lock_irqsave(&ctrl_info->scsi_device_list_lock, flags);
6445*4882a593Smuzhiyun 
6446*4882a593Smuzhiyun 	device = sdev->hostdata;
6447*4882a593Smuzhiyun 	if (!device || !pqi_is_device_with_sas_address(device)) {
6448*4882a593Smuzhiyun 		spin_unlock_irqrestore(&ctrl_info->scsi_device_list_lock, flags);
6449*4882a593Smuzhiyun 		return -ENODEV;
6450*4882a593Smuzhiyun 	}
6451*4882a593Smuzhiyun 
6452*4882a593Smuzhiyun 	sas_address = device->sas_address;
6453*4882a593Smuzhiyun 
6454*4882a593Smuzhiyun 	spin_unlock_irqrestore(&ctrl_info->scsi_device_list_lock, flags);
6455*4882a593Smuzhiyun 
6456*4882a593Smuzhiyun 	return snprintf(buffer, PAGE_SIZE, "0x%016llx\n", sas_address);
6457*4882a593Smuzhiyun }
6458*4882a593Smuzhiyun 
pqi_ssd_smart_path_enabled_show(struct device * dev,struct device_attribute * attr,char * buffer)6459*4882a593Smuzhiyun static ssize_t pqi_ssd_smart_path_enabled_show(struct device *dev,
6460*4882a593Smuzhiyun 	struct device_attribute *attr, char *buffer)
6461*4882a593Smuzhiyun {
6462*4882a593Smuzhiyun 	struct pqi_ctrl_info *ctrl_info;
6463*4882a593Smuzhiyun 	struct scsi_device *sdev;
6464*4882a593Smuzhiyun 	struct pqi_scsi_dev *device;
6465*4882a593Smuzhiyun 	unsigned long flags;
6466*4882a593Smuzhiyun 
6467*4882a593Smuzhiyun 	sdev = to_scsi_device(dev);
6468*4882a593Smuzhiyun 	ctrl_info = shost_to_hba(sdev->host);
6469*4882a593Smuzhiyun 
6470*4882a593Smuzhiyun 	spin_lock_irqsave(&ctrl_info->scsi_device_list_lock, flags);
6471*4882a593Smuzhiyun 
6472*4882a593Smuzhiyun 	device = sdev->hostdata;
6473*4882a593Smuzhiyun 	if (!device) {
6474*4882a593Smuzhiyun 		spin_unlock_irqrestore(&ctrl_info->scsi_device_list_lock, flags);
6475*4882a593Smuzhiyun 		return -ENODEV;
6476*4882a593Smuzhiyun 	}
6477*4882a593Smuzhiyun 
6478*4882a593Smuzhiyun 	buffer[0] = device->raid_bypass_enabled ? '1' : '0';
6479*4882a593Smuzhiyun 	buffer[1] = '\n';
6480*4882a593Smuzhiyun 	buffer[2] = '\0';
6481*4882a593Smuzhiyun 
6482*4882a593Smuzhiyun 	spin_unlock_irqrestore(&ctrl_info->scsi_device_list_lock, flags);
6483*4882a593Smuzhiyun 
6484*4882a593Smuzhiyun 	return 2;
6485*4882a593Smuzhiyun }
6486*4882a593Smuzhiyun 
pqi_raid_level_show(struct device * dev,struct device_attribute * attr,char * buffer)6487*4882a593Smuzhiyun static ssize_t pqi_raid_level_show(struct device *dev,
6488*4882a593Smuzhiyun 	struct device_attribute *attr, char *buffer)
6489*4882a593Smuzhiyun {
6490*4882a593Smuzhiyun 	struct pqi_ctrl_info *ctrl_info;
6491*4882a593Smuzhiyun 	struct scsi_device *sdev;
6492*4882a593Smuzhiyun 	struct pqi_scsi_dev *device;
6493*4882a593Smuzhiyun 	unsigned long flags;
6494*4882a593Smuzhiyun 	char *raid_level;
6495*4882a593Smuzhiyun 
6496*4882a593Smuzhiyun 	sdev = to_scsi_device(dev);
6497*4882a593Smuzhiyun 	ctrl_info = shost_to_hba(sdev->host);
6498*4882a593Smuzhiyun 
6499*4882a593Smuzhiyun 	spin_lock_irqsave(&ctrl_info->scsi_device_list_lock, flags);
6500*4882a593Smuzhiyun 
6501*4882a593Smuzhiyun 	device = sdev->hostdata;
6502*4882a593Smuzhiyun 	if (!device) {
6503*4882a593Smuzhiyun 		spin_unlock_irqrestore(&ctrl_info->scsi_device_list_lock, flags);
6504*4882a593Smuzhiyun 		return -ENODEV;
6505*4882a593Smuzhiyun 	}
6506*4882a593Smuzhiyun 
6507*4882a593Smuzhiyun 	if (pqi_is_logical_device(device))
6508*4882a593Smuzhiyun 		raid_level = pqi_raid_level_to_string(device->raid_level);
6509*4882a593Smuzhiyun 	else
6510*4882a593Smuzhiyun 		raid_level = "N/A";
6511*4882a593Smuzhiyun 
6512*4882a593Smuzhiyun 	spin_unlock_irqrestore(&ctrl_info->scsi_device_list_lock, flags);
6513*4882a593Smuzhiyun 
6514*4882a593Smuzhiyun 	return snprintf(buffer, PAGE_SIZE, "%s\n", raid_level);
6515*4882a593Smuzhiyun }
6516*4882a593Smuzhiyun 
pqi_raid_bypass_cnt_show(struct device * dev,struct device_attribute * attr,char * buffer)6517*4882a593Smuzhiyun static ssize_t pqi_raid_bypass_cnt_show(struct device *dev,
6518*4882a593Smuzhiyun 	struct device_attribute *attr, char *buffer)
6519*4882a593Smuzhiyun {
6520*4882a593Smuzhiyun 	struct pqi_ctrl_info *ctrl_info;
6521*4882a593Smuzhiyun 	struct scsi_device *sdev;
6522*4882a593Smuzhiyun 	struct pqi_scsi_dev *device;
6523*4882a593Smuzhiyun 	unsigned long flags;
6524*4882a593Smuzhiyun 	int raid_bypass_cnt;
6525*4882a593Smuzhiyun 
6526*4882a593Smuzhiyun 	sdev = to_scsi_device(dev);
6527*4882a593Smuzhiyun 	ctrl_info = shost_to_hba(sdev->host);
6528*4882a593Smuzhiyun 
6529*4882a593Smuzhiyun 	spin_lock_irqsave(&ctrl_info->scsi_device_list_lock, flags);
6530*4882a593Smuzhiyun 
6531*4882a593Smuzhiyun 	device = sdev->hostdata;
6532*4882a593Smuzhiyun 	if (!device) {
6533*4882a593Smuzhiyun 		spin_unlock_irqrestore(&ctrl_info->scsi_device_list_lock, flags);
6534*4882a593Smuzhiyun 		return -ENODEV;
6535*4882a593Smuzhiyun 	}
6536*4882a593Smuzhiyun 
6537*4882a593Smuzhiyun 	raid_bypass_cnt = atomic_read(&device->raid_bypass_cnt);
6538*4882a593Smuzhiyun 
6539*4882a593Smuzhiyun 	spin_unlock_irqrestore(&ctrl_info->scsi_device_list_lock, flags);
6540*4882a593Smuzhiyun 
6541*4882a593Smuzhiyun 	return snprintf(buffer, PAGE_SIZE, "0x%x\n", raid_bypass_cnt);
6542*4882a593Smuzhiyun }
6543*4882a593Smuzhiyun 
6544*4882a593Smuzhiyun static DEVICE_ATTR(lunid, 0444, pqi_lunid_show, NULL);
6545*4882a593Smuzhiyun static DEVICE_ATTR(unique_id, 0444, pqi_unique_id_show, NULL);
6546*4882a593Smuzhiyun static DEVICE_ATTR(path_info, 0444, pqi_path_info_show, NULL);
6547*4882a593Smuzhiyun static DEVICE_ATTR(sas_address, 0444, pqi_sas_address_show, NULL);
6548*4882a593Smuzhiyun static DEVICE_ATTR(ssd_smart_path_enabled, 0444, pqi_ssd_smart_path_enabled_show, NULL);
6549*4882a593Smuzhiyun static DEVICE_ATTR(raid_level, 0444, pqi_raid_level_show, NULL);
6550*4882a593Smuzhiyun static DEVICE_ATTR(raid_bypass_cnt, 0444, pqi_raid_bypass_cnt_show, NULL);
6551*4882a593Smuzhiyun 
6552*4882a593Smuzhiyun static struct device_attribute *pqi_sdev_attrs[] = {
6553*4882a593Smuzhiyun 	&dev_attr_lunid,
6554*4882a593Smuzhiyun 	&dev_attr_unique_id,
6555*4882a593Smuzhiyun 	&dev_attr_path_info,
6556*4882a593Smuzhiyun 	&dev_attr_sas_address,
6557*4882a593Smuzhiyun 	&dev_attr_ssd_smart_path_enabled,
6558*4882a593Smuzhiyun 	&dev_attr_raid_level,
6559*4882a593Smuzhiyun 	&dev_attr_raid_bypass_cnt,
6560*4882a593Smuzhiyun 	NULL
6561*4882a593Smuzhiyun };
6562*4882a593Smuzhiyun 
6563*4882a593Smuzhiyun static struct scsi_host_template pqi_driver_template = {
6564*4882a593Smuzhiyun 	.module = THIS_MODULE,
6565*4882a593Smuzhiyun 	.name = DRIVER_NAME_SHORT,
6566*4882a593Smuzhiyun 	.proc_name = DRIVER_NAME_SHORT,
6567*4882a593Smuzhiyun 	.queuecommand = pqi_scsi_queue_command,
6568*4882a593Smuzhiyun 	.scan_start = pqi_scan_start,
6569*4882a593Smuzhiyun 	.scan_finished = pqi_scan_finished,
6570*4882a593Smuzhiyun 	.this_id = -1,
6571*4882a593Smuzhiyun 	.eh_device_reset_handler = pqi_eh_device_reset_handler,
6572*4882a593Smuzhiyun 	.ioctl = pqi_ioctl,
6573*4882a593Smuzhiyun 	.slave_alloc = pqi_slave_alloc,
6574*4882a593Smuzhiyun 	.slave_configure = pqi_slave_configure,
6575*4882a593Smuzhiyun 	.slave_destroy = pqi_slave_destroy,
6576*4882a593Smuzhiyun 	.map_queues = pqi_map_queues,
6577*4882a593Smuzhiyun 	.sdev_attrs = pqi_sdev_attrs,
6578*4882a593Smuzhiyun 	.shost_attrs = pqi_shost_attrs,
6579*4882a593Smuzhiyun };
6580*4882a593Smuzhiyun 
pqi_register_scsi(struct pqi_ctrl_info * ctrl_info)6581*4882a593Smuzhiyun static int pqi_register_scsi(struct pqi_ctrl_info *ctrl_info)
6582*4882a593Smuzhiyun {
6583*4882a593Smuzhiyun 	int rc;
6584*4882a593Smuzhiyun 	struct Scsi_Host *shost;
6585*4882a593Smuzhiyun 
6586*4882a593Smuzhiyun 	shost = scsi_host_alloc(&pqi_driver_template, sizeof(ctrl_info));
6587*4882a593Smuzhiyun 	if (!shost) {
6588*4882a593Smuzhiyun 		dev_err(&ctrl_info->pci_dev->dev,
6589*4882a593Smuzhiyun 			"scsi_host_alloc failed for controller %u\n",
6590*4882a593Smuzhiyun 			ctrl_info->ctrl_id);
6591*4882a593Smuzhiyun 		return -ENOMEM;
6592*4882a593Smuzhiyun 	}
6593*4882a593Smuzhiyun 
6594*4882a593Smuzhiyun 	shost->io_port = 0;
6595*4882a593Smuzhiyun 	shost->n_io_port = 0;
6596*4882a593Smuzhiyun 	shost->this_id = -1;
6597*4882a593Smuzhiyun 	shost->max_channel = PQI_MAX_BUS;
6598*4882a593Smuzhiyun 	shost->max_cmd_len = MAX_COMMAND_SIZE;
6599*4882a593Smuzhiyun 	shost->max_lun = ~0;
6600*4882a593Smuzhiyun 	shost->max_id = ~0;
6601*4882a593Smuzhiyun 	shost->max_sectors = ctrl_info->max_sectors;
6602*4882a593Smuzhiyun 	shost->can_queue = ctrl_info->scsi_ml_can_queue;
6603*4882a593Smuzhiyun 	shost->cmd_per_lun = shost->can_queue;
6604*4882a593Smuzhiyun 	shost->sg_tablesize = ctrl_info->sg_tablesize;
6605*4882a593Smuzhiyun 	shost->transportt = pqi_sas_transport_template;
6606*4882a593Smuzhiyun 	shost->irq = pci_irq_vector(ctrl_info->pci_dev, 0);
6607*4882a593Smuzhiyun 	shost->unique_id = shost->irq;
6608*4882a593Smuzhiyun 	shost->nr_hw_queues = ctrl_info->num_queue_groups;
6609*4882a593Smuzhiyun 	shost->host_tagset = 1;
6610*4882a593Smuzhiyun 	shost->hostdata[0] = (unsigned long)ctrl_info;
6611*4882a593Smuzhiyun 
6612*4882a593Smuzhiyun 	rc = scsi_add_host(shost, &ctrl_info->pci_dev->dev);
6613*4882a593Smuzhiyun 	if (rc) {
6614*4882a593Smuzhiyun 		dev_err(&ctrl_info->pci_dev->dev,
6615*4882a593Smuzhiyun 			"scsi_add_host failed for controller %u\n",
6616*4882a593Smuzhiyun 			ctrl_info->ctrl_id);
6617*4882a593Smuzhiyun 		goto free_host;
6618*4882a593Smuzhiyun 	}
6619*4882a593Smuzhiyun 
6620*4882a593Smuzhiyun 	rc = pqi_add_sas_host(shost, ctrl_info);
6621*4882a593Smuzhiyun 	if (rc) {
6622*4882a593Smuzhiyun 		dev_err(&ctrl_info->pci_dev->dev,
6623*4882a593Smuzhiyun 			"add SAS host failed for controller %u\n",
6624*4882a593Smuzhiyun 			ctrl_info->ctrl_id);
6625*4882a593Smuzhiyun 		goto remove_host;
6626*4882a593Smuzhiyun 	}
6627*4882a593Smuzhiyun 
6628*4882a593Smuzhiyun 	ctrl_info->scsi_host = shost;
6629*4882a593Smuzhiyun 
6630*4882a593Smuzhiyun 	return 0;
6631*4882a593Smuzhiyun 
6632*4882a593Smuzhiyun remove_host:
6633*4882a593Smuzhiyun 	scsi_remove_host(shost);
6634*4882a593Smuzhiyun free_host:
6635*4882a593Smuzhiyun 	scsi_host_put(shost);
6636*4882a593Smuzhiyun 
6637*4882a593Smuzhiyun 	return rc;
6638*4882a593Smuzhiyun }
6639*4882a593Smuzhiyun 
pqi_unregister_scsi(struct pqi_ctrl_info * ctrl_info)6640*4882a593Smuzhiyun static void pqi_unregister_scsi(struct pqi_ctrl_info *ctrl_info)
6641*4882a593Smuzhiyun {
6642*4882a593Smuzhiyun 	struct Scsi_Host *shost;
6643*4882a593Smuzhiyun 
6644*4882a593Smuzhiyun 	pqi_delete_sas_host(ctrl_info);
6645*4882a593Smuzhiyun 
6646*4882a593Smuzhiyun 	shost = ctrl_info->scsi_host;
6647*4882a593Smuzhiyun 	if (!shost)
6648*4882a593Smuzhiyun 		return;
6649*4882a593Smuzhiyun 
6650*4882a593Smuzhiyun 	scsi_remove_host(shost);
6651*4882a593Smuzhiyun 	scsi_host_put(shost);
6652*4882a593Smuzhiyun }
6653*4882a593Smuzhiyun 
pqi_wait_for_pqi_reset_completion(struct pqi_ctrl_info * ctrl_info)6654*4882a593Smuzhiyun static int pqi_wait_for_pqi_reset_completion(struct pqi_ctrl_info *ctrl_info)
6655*4882a593Smuzhiyun {
6656*4882a593Smuzhiyun 	int rc = 0;
6657*4882a593Smuzhiyun 	struct pqi_device_registers __iomem *pqi_registers;
6658*4882a593Smuzhiyun 	unsigned long timeout;
6659*4882a593Smuzhiyun 	unsigned int timeout_msecs;
6660*4882a593Smuzhiyun 	union pqi_reset_register reset_reg;
6661*4882a593Smuzhiyun 
6662*4882a593Smuzhiyun 	pqi_registers = ctrl_info->pqi_registers;
6663*4882a593Smuzhiyun 	timeout_msecs = readw(&pqi_registers->max_reset_timeout) * 100;
6664*4882a593Smuzhiyun 	timeout = msecs_to_jiffies(timeout_msecs) + jiffies;
6665*4882a593Smuzhiyun 
6666*4882a593Smuzhiyun 	while (1) {
6667*4882a593Smuzhiyun 		msleep(PQI_RESET_POLL_INTERVAL_MSECS);
6668*4882a593Smuzhiyun 		reset_reg.all_bits = readl(&pqi_registers->device_reset);
6669*4882a593Smuzhiyun 		if (reset_reg.bits.reset_action == PQI_RESET_ACTION_COMPLETED)
6670*4882a593Smuzhiyun 			break;
6671*4882a593Smuzhiyun 		pqi_check_ctrl_health(ctrl_info);
6672*4882a593Smuzhiyun 		if (pqi_ctrl_offline(ctrl_info)) {
6673*4882a593Smuzhiyun 			rc = -ENXIO;
6674*4882a593Smuzhiyun 			break;
6675*4882a593Smuzhiyun 		}
6676*4882a593Smuzhiyun 		if (time_after(jiffies, timeout)) {
6677*4882a593Smuzhiyun 			rc = -ETIMEDOUT;
6678*4882a593Smuzhiyun 			break;
6679*4882a593Smuzhiyun 		}
6680*4882a593Smuzhiyun 	}
6681*4882a593Smuzhiyun 
6682*4882a593Smuzhiyun 	return rc;
6683*4882a593Smuzhiyun }
6684*4882a593Smuzhiyun 
pqi_reset(struct pqi_ctrl_info * ctrl_info)6685*4882a593Smuzhiyun static int pqi_reset(struct pqi_ctrl_info *ctrl_info)
6686*4882a593Smuzhiyun {
6687*4882a593Smuzhiyun 	int rc;
6688*4882a593Smuzhiyun 	union pqi_reset_register reset_reg;
6689*4882a593Smuzhiyun 
6690*4882a593Smuzhiyun 	if (ctrl_info->pqi_reset_quiesce_supported) {
6691*4882a593Smuzhiyun 		rc = sis_pqi_reset_quiesce(ctrl_info);
6692*4882a593Smuzhiyun 		if (rc) {
6693*4882a593Smuzhiyun 			dev_err(&ctrl_info->pci_dev->dev,
6694*4882a593Smuzhiyun 				"PQI reset failed during quiesce with error %d\n",
6695*4882a593Smuzhiyun 				rc);
6696*4882a593Smuzhiyun 			return rc;
6697*4882a593Smuzhiyun 		}
6698*4882a593Smuzhiyun 	}
6699*4882a593Smuzhiyun 
6700*4882a593Smuzhiyun 	reset_reg.all_bits = 0;
6701*4882a593Smuzhiyun 	reset_reg.bits.reset_type = PQI_RESET_TYPE_HARD_RESET;
6702*4882a593Smuzhiyun 	reset_reg.bits.reset_action = PQI_RESET_ACTION_RESET;
6703*4882a593Smuzhiyun 
6704*4882a593Smuzhiyun 	writel(reset_reg.all_bits, &ctrl_info->pqi_registers->device_reset);
6705*4882a593Smuzhiyun 
6706*4882a593Smuzhiyun 	rc = pqi_wait_for_pqi_reset_completion(ctrl_info);
6707*4882a593Smuzhiyun 	if (rc)
6708*4882a593Smuzhiyun 		dev_err(&ctrl_info->pci_dev->dev,
6709*4882a593Smuzhiyun 			"PQI reset failed with error %d\n", rc);
6710*4882a593Smuzhiyun 
6711*4882a593Smuzhiyun 	return rc;
6712*4882a593Smuzhiyun }
6713*4882a593Smuzhiyun 
pqi_get_ctrl_serial_number(struct pqi_ctrl_info * ctrl_info)6714*4882a593Smuzhiyun static int pqi_get_ctrl_serial_number(struct pqi_ctrl_info *ctrl_info)
6715*4882a593Smuzhiyun {
6716*4882a593Smuzhiyun 	int rc;
6717*4882a593Smuzhiyun 	struct bmic_sense_subsystem_info *sense_info;
6718*4882a593Smuzhiyun 
6719*4882a593Smuzhiyun 	sense_info = kzalloc(sizeof(*sense_info), GFP_KERNEL);
6720*4882a593Smuzhiyun 	if (!sense_info)
6721*4882a593Smuzhiyun 		return -ENOMEM;
6722*4882a593Smuzhiyun 
6723*4882a593Smuzhiyun 	rc = pqi_sense_subsystem_info(ctrl_info, sense_info);
6724*4882a593Smuzhiyun 	if (rc)
6725*4882a593Smuzhiyun 		goto out;
6726*4882a593Smuzhiyun 
6727*4882a593Smuzhiyun 	memcpy(ctrl_info->serial_number, sense_info->ctrl_serial_number,
6728*4882a593Smuzhiyun 		sizeof(sense_info->ctrl_serial_number));
6729*4882a593Smuzhiyun 	ctrl_info->serial_number[sizeof(sense_info->ctrl_serial_number)] = '\0';
6730*4882a593Smuzhiyun 
6731*4882a593Smuzhiyun out:
6732*4882a593Smuzhiyun 	kfree(sense_info);
6733*4882a593Smuzhiyun 
6734*4882a593Smuzhiyun 	return rc;
6735*4882a593Smuzhiyun }
6736*4882a593Smuzhiyun 
pqi_get_ctrl_product_details(struct pqi_ctrl_info * ctrl_info)6737*4882a593Smuzhiyun static int pqi_get_ctrl_product_details(struct pqi_ctrl_info *ctrl_info)
6738*4882a593Smuzhiyun {
6739*4882a593Smuzhiyun 	int rc;
6740*4882a593Smuzhiyun 	struct bmic_identify_controller *identify;
6741*4882a593Smuzhiyun 
6742*4882a593Smuzhiyun 	identify = kmalloc(sizeof(*identify), GFP_KERNEL);
6743*4882a593Smuzhiyun 	if (!identify)
6744*4882a593Smuzhiyun 		return -ENOMEM;
6745*4882a593Smuzhiyun 
6746*4882a593Smuzhiyun 	rc = pqi_identify_controller(ctrl_info, identify);
6747*4882a593Smuzhiyun 	if (rc)
6748*4882a593Smuzhiyun 		goto out;
6749*4882a593Smuzhiyun 
6750*4882a593Smuzhiyun 	memcpy(ctrl_info->firmware_version, identify->firmware_version,
6751*4882a593Smuzhiyun 		sizeof(identify->firmware_version));
6752*4882a593Smuzhiyun 	ctrl_info->firmware_version[sizeof(identify->firmware_version)] = '\0';
6753*4882a593Smuzhiyun 	snprintf(ctrl_info->firmware_version +
6754*4882a593Smuzhiyun 		strlen(ctrl_info->firmware_version),
6755*4882a593Smuzhiyun 		sizeof(ctrl_info->firmware_version),
6756*4882a593Smuzhiyun 		"-%u", get_unaligned_le16(&identify->firmware_build_number));
6757*4882a593Smuzhiyun 
6758*4882a593Smuzhiyun 	memcpy(ctrl_info->model, identify->product_id,
6759*4882a593Smuzhiyun 		sizeof(identify->product_id));
6760*4882a593Smuzhiyun 	ctrl_info->model[sizeof(identify->product_id)] = '\0';
6761*4882a593Smuzhiyun 
6762*4882a593Smuzhiyun 	memcpy(ctrl_info->vendor, identify->vendor_id,
6763*4882a593Smuzhiyun 		sizeof(identify->vendor_id));
6764*4882a593Smuzhiyun 	ctrl_info->vendor[sizeof(identify->vendor_id)] = '\0';
6765*4882a593Smuzhiyun 
6766*4882a593Smuzhiyun out:
6767*4882a593Smuzhiyun 	kfree(identify);
6768*4882a593Smuzhiyun 
6769*4882a593Smuzhiyun 	return rc;
6770*4882a593Smuzhiyun }
6771*4882a593Smuzhiyun 
6772*4882a593Smuzhiyun struct pqi_config_table_section_info {
6773*4882a593Smuzhiyun 	struct pqi_ctrl_info *ctrl_info;
6774*4882a593Smuzhiyun 	void		*section;
6775*4882a593Smuzhiyun 	u32		section_offset;
6776*4882a593Smuzhiyun 	void __iomem	*section_iomem_addr;
6777*4882a593Smuzhiyun };
6778*4882a593Smuzhiyun 
pqi_is_firmware_feature_supported(struct pqi_config_table_firmware_features * firmware_features,unsigned int bit_position)6779*4882a593Smuzhiyun static inline bool pqi_is_firmware_feature_supported(
6780*4882a593Smuzhiyun 	struct pqi_config_table_firmware_features *firmware_features,
6781*4882a593Smuzhiyun 	unsigned int bit_position)
6782*4882a593Smuzhiyun {
6783*4882a593Smuzhiyun 	unsigned int byte_index;
6784*4882a593Smuzhiyun 
6785*4882a593Smuzhiyun 	byte_index = bit_position / BITS_PER_BYTE;
6786*4882a593Smuzhiyun 
6787*4882a593Smuzhiyun 	if (byte_index >= le16_to_cpu(firmware_features->num_elements))
6788*4882a593Smuzhiyun 		return false;
6789*4882a593Smuzhiyun 
6790*4882a593Smuzhiyun 	return firmware_features->features_supported[byte_index] &
6791*4882a593Smuzhiyun 		(1 << (bit_position % BITS_PER_BYTE)) ? true : false;
6792*4882a593Smuzhiyun }
6793*4882a593Smuzhiyun 
pqi_is_firmware_feature_enabled(struct pqi_config_table_firmware_features * firmware_features,void __iomem * firmware_features_iomem_addr,unsigned int bit_position)6794*4882a593Smuzhiyun static inline bool pqi_is_firmware_feature_enabled(
6795*4882a593Smuzhiyun 	struct pqi_config_table_firmware_features *firmware_features,
6796*4882a593Smuzhiyun 	void __iomem *firmware_features_iomem_addr,
6797*4882a593Smuzhiyun 	unsigned int bit_position)
6798*4882a593Smuzhiyun {
6799*4882a593Smuzhiyun 	unsigned int byte_index;
6800*4882a593Smuzhiyun 	u8 __iomem *features_enabled_iomem_addr;
6801*4882a593Smuzhiyun 
6802*4882a593Smuzhiyun 	byte_index = (bit_position / BITS_PER_BYTE) +
6803*4882a593Smuzhiyun 		(le16_to_cpu(firmware_features->num_elements) * 2);
6804*4882a593Smuzhiyun 
6805*4882a593Smuzhiyun 	features_enabled_iomem_addr = firmware_features_iomem_addr +
6806*4882a593Smuzhiyun 		offsetof(struct pqi_config_table_firmware_features,
6807*4882a593Smuzhiyun 			features_supported) + byte_index;
6808*4882a593Smuzhiyun 
6809*4882a593Smuzhiyun 	return *((__force u8 *)features_enabled_iomem_addr) &
6810*4882a593Smuzhiyun 		(1 << (bit_position % BITS_PER_BYTE)) ? true : false;
6811*4882a593Smuzhiyun }
6812*4882a593Smuzhiyun 
pqi_request_firmware_feature(struct pqi_config_table_firmware_features * firmware_features,unsigned int bit_position)6813*4882a593Smuzhiyun static inline void pqi_request_firmware_feature(
6814*4882a593Smuzhiyun 	struct pqi_config_table_firmware_features *firmware_features,
6815*4882a593Smuzhiyun 	unsigned int bit_position)
6816*4882a593Smuzhiyun {
6817*4882a593Smuzhiyun 	unsigned int byte_index;
6818*4882a593Smuzhiyun 
6819*4882a593Smuzhiyun 	byte_index = (bit_position / BITS_PER_BYTE) +
6820*4882a593Smuzhiyun 		le16_to_cpu(firmware_features->num_elements);
6821*4882a593Smuzhiyun 
6822*4882a593Smuzhiyun 	firmware_features->features_supported[byte_index] |=
6823*4882a593Smuzhiyun 		(1 << (bit_position % BITS_PER_BYTE));
6824*4882a593Smuzhiyun }
6825*4882a593Smuzhiyun 
pqi_config_table_update(struct pqi_ctrl_info * ctrl_info,u16 first_section,u16 last_section)6826*4882a593Smuzhiyun static int pqi_config_table_update(struct pqi_ctrl_info *ctrl_info,
6827*4882a593Smuzhiyun 	u16 first_section, u16 last_section)
6828*4882a593Smuzhiyun {
6829*4882a593Smuzhiyun 	struct pqi_vendor_general_request request;
6830*4882a593Smuzhiyun 
6831*4882a593Smuzhiyun 	memset(&request, 0, sizeof(request));
6832*4882a593Smuzhiyun 
6833*4882a593Smuzhiyun 	request.header.iu_type = PQI_REQUEST_IU_VENDOR_GENERAL;
6834*4882a593Smuzhiyun 	put_unaligned_le16(sizeof(request) - PQI_REQUEST_HEADER_LENGTH,
6835*4882a593Smuzhiyun 		&request.header.iu_length);
6836*4882a593Smuzhiyun 	put_unaligned_le16(PQI_VENDOR_GENERAL_CONFIG_TABLE_UPDATE,
6837*4882a593Smuzhiyun 		&request.function_code);
6838*4882a593Smuzhiyun 	put_unaligned_le16(first_section,
6839*4882a593Smuzhiyun 		&request.data.config_table_update.first_section);
6840*4882a593Smuzhiyun 	put_unaligned_le16(last_section,
6841*4882a593Smuzhiyun 		&request.data.config_table_update.last_section);
6842*4882a593Smuzhiyun 
6843*4882a593Smuzhiyun 	return pqi_submit_raid_request_synchronous(ctrl_info, &request.header,
6844*4882a593Smuzhiyun 		0, NULL, NO_TIMEOUT);
6845*4882a593Smuzhiyun }
6846*4882a593Smuzhiyun 
pqi_enable_firmware_features(struct pqi_ctrl_info * ctrl_info,struct pqi_config_table_firmware_features * firmware_features,void __iomem * firmware_features_iomem_addr)6847*4882a593Smuzhiyun static int pqi_enable_firmware_features(struct pqi_ctrl_info *ctrl_info,
6848*4882a593Smuzhiyun 	struct pqi_config_table_firmware_features *firmware_features,
6849*4882a593Smuzhiyun 	void __iomem *firmware_features_iomem_addr)
6850*4882a593Smuzhiyun {
6851*4882a593Smuzhiyun 	void *features_requested;
6852*4882a593Smuzhiyun 	void __iomem *features_requested_iomem_addr;
6853*4882a593Smuzhiyun 
6854*4882a593Smuzhiyun 	features_requested = firmware_features->features_supported +
6855*4882a593Smuzhiyun 		le16_to_cpu(firmware_features->num_elements);
6856*4882a593Smuzhiyun 
6857*4882a593Smuzhiyun 	features_requested_iomem_addr = firmware_features_iomem_addr +
6858*4882a593Smuzhiyun 		(features_requested - (void *)firmware_features);
6859*4882a593Smuzhiyun 
6860*4882a593Smuzhiyun 	memcpy_toio(features_requested_iomem_addr, features_requested,
6861*4882a593Smuzhiyun 		le16_to_cpu(firmware_features->num_elements));
6862*4882a593Smuzhiyun 
6863*4882a593Smuzhiyun 	return pqi_config_table_update(ctrl_info,
6864*4882a593Smuzhiyun 		PQI_CONFIG_TABLE_SECTION_FIRMWARE_FEATURES,
6865*4882a593Smuzhiyun 		PQI_CONFIG_TABLE_SECTION_FIRMWARE_FEATURES);
6866*4882a593Smuzhiyun }
6867*4882a593Smuzhiyun 
6868*4882a593Smuzhiyun struct pqi_firmware_feature {
6869*4882a593Smuzhiyun 	char		*feature_name;
6870*4882a593Smuzhiyun 	unsigned int	feature_bit;
6871*4882a593Smuzhiyun 	bool		supported;
6872*4882a593Smuzhiyun 	bool		enabled;
6873*4882a593Smuzhiyun 	void (*feature_status)(struct pqi_ctrl_info *ctrl_info,
6874*4882a593Smuzhiyun 		struct pqi_firmware_feature *firmware_feature);
6875*4882a593Smuzhiyun };
6876*4882a593Smuzhiyun 
pqi_firmware_feature_status(struct pqi_ctrl_info * ctrl_info,struct pqi_firmware_feature * firmware_feature)6877*4882a593Smuzhiyun static void pqi_firmware_feature_status(struct pqi_ctrl_info *ctrl_info,
6878*4882a593Smuzhiyun 	struct pqi_firmware_feature *firmware_feature)
6879*4882a593Smuzhiyun {
6880*4882a593Smuzhiyun 	if (!firmware_feature->supported) {
6881*4882a593Smuzhiyun 		dev_info(&ctrl_info->pci_dev->dev, "%s not supported by controller\n",
6882*4882a593Smuzhiyun 			firmware_feature->feature_name);
6883*4882a593Smuzhiyun 		return;
6884*4882a593Smuzhiyun 	}
6885*4882a593Smuzhiyun 
6886*4882a593Smuzhiyun 	if (firmware_feature->enabled) {
6887*4882a593Smuzhiyun 		dev_info(&ctrl_info->pci_dev->dev,
6888*4882a593Smuzhiyun 			"%s enabled\n", firmware_feature->feature_name);
6889*4882a593Smuzhiyun 		return;
6890*4882a593Smuzhiyun 	}
6891*4882a593Smuzhiyun 
6892*4882a593Smuzhiyun 	dev_err(&ctrl_info->pci_dev->dev, "failed to enable %s\n",
6893*4882a593Smuzhiyun 		firmware_feature->feature_name);
6894*4882a593Smuzhiyun }
6895*4882a593Smuzhiyun 
pqi_ctrl_update_feature_flags(struct pqi_ctrl_info * ctrl_info,struct pqi_firmware_feature * firmware_feature)6896*4882a593Smuzhiyun static void pqi_ctrl_update_feature_flags(struct pqi_ctrl_info *ctrl_info,
6897*4882a593Smuzhiyun 	struct pqi_firmware_feature *firmware_feature)
6898*4882a593Smuzhiyun {
6899*4882a593Smuzhiyun 	switch (firmware_feature->feature_bit) {
6900*4882a593Smuzhiyun 	case PQI_FIRMWARE_FEATURE_SOFT_RESET_HANDSHAKE:
6901*4882a593Smuzhiyun 		ctrl_info->soft_reset_handshake_supported =
6902*4882a593Smuzhiyun 			firmware_feature->enabled;
6903*4882a593Smuzhiyun 		break;
6904*4882a593Smuzhiyun 	case PQI_FIRMWARE_FEATURE_RAID_IU_TIMEOUT:
6905*4882a593Smuzhiyun 		ctrl_info->raid_iu_timeout_supported =
6906*4882a593Smuzhiyun 			firmware_feature->enabled;
6907*4882a593Smuzhiyun 		break;
6908*4882a593Smuzhiyun 	case PQI_FIRMWARE_FEATURE_TMF_IU_TIMEOUT:
6909*4882a593Smuzhiyun 		ctrl_info->tmf_iu_timeout_supported =
6910*4882a593Smuzhiyun 			firmware_feature->enabled;
6911*4882a593Smuzhiyun 		break;
6912*4882a593Smuzhiyun 	}
6913*4882a593Smuzhiyun 
6914*4882a593Smuzhiyun 	pqi_firmware_feature_status(ctrl_info, firmware_feature);
6915*4882a593Smuzhiyun }
6916*4882a593Smuzhiyun 
pqi_firmware_feature_update(struct pqi_ctrl_info * ctrl_info,struct pqi_firmware_feature * firmware_feature)6917*4882a593Smuzhiyun static inline void pqi_firmware_feature_update(struct pqi_ctrl_info *ctrl_info,
6918*4882a593Smuzhiyun 	struct pqi_firmware_feature *firmware_feature)
6919*4882a593Smuzhiyun {
6920*4882a593Smuzhiyun 	if (firmware_feature->feature_status)
6921*4882a593Smuzhiyun 		firmware_feature->feature_status(ctrl_info, firmware_feature);
6922*4882a593Smuzhiyun }
6923*4882a593Smuzhiyun 
6924*4882a593Smuzhiyun static DEFINE_MUTEX(pqi_firmware_features_mutex);
6925*4882a593Smuzhiyun 
6926*4882a593Smuzhiyun static struct pqi_firmware_feature pqi_firmware_features[] = {
6927*4882a593Smuzhiyun 	{
6928*4882a593Smuzhiyun 		.feature_name = "Online Firmware Activation",
6929*4882a593Smuzhiyun 		.feature_bit = PQI_FIRMWARE_FEATURE_OFA,
6930*4882a593Smuzhiyun 		.feature_status = pqi_firmware_feature_status,
6931*4882a593Smuzhiyun 	},
6932*4882a593Smuzhiyun 	{
6933*4882a593Smuzhiyun 		.feature_name = "Serial Management Protocol",
6934*4882a593Smuzhiyun 		.feature_bit = PQI_FIRMWARE_FEATURE_SMP,
6935*4882a593Smuzhiyun 		.feature_status = pqi_firmware_feature_status,
6936*4882a593Smuzhiyun 	},
6937*4882a593Smuzhiyun 	{
6938*4882a593Smuzhiyun 		.feature_name = "New Soft Reset Handshake",
6939*4882a593Smuzhiyun 		.feature_bit = PQI_FIRMWARE_FEATURE_SOFT_RESET_HANDSHAKE,
6940*4882a593Smuzhiyun 		.feature_status = pqi_ctrl_update_feature_flags,
6941*4882a593Smuzhiyun 	},
6942*4882a593Smuzhiyun 	{
6943*4882a593Smuzhiyun 		.feature_name = "RAID IU Timeout",
6944*4882a593Smuzhiyun 		.feature_bit = PQI_FIRMWARE_FEATURE_RAID_IU_TIMEOUT,
6945*4882a593Smuzhiyun 		.feature_status = pqi_ctrl_update_feature_flags,
6946*4882a593Smuzhiyun 	},
6947*4882a593Smuzhiyun 	{
6948*4882a593Smuzhiyun 		.feature_name = "TMF IU Timeout",
6949*4882a593Smuzhiyun 		.feature_bit = PQI_FIRMWARE_FEATURE_TMF_IU_TIMEOUT,
6950*4882a593Smuzhiyun 		.feature_status = pqi_ctrl_update_feature_flags,
6951*4882a593Smuzhiyun 	},
6952*4882a593Smuzhiyun };
6953*4882a593Smuzhiyun 
pqi_process_firmware_features(struct pqi_config_table_section_info * section_info)6954*4882a593Smuzhiyun static void pqi_process_firmware_features(
6955*4882a593Smuzhiyun 	struct pqi_config_table_section_info *section_info)
6956*4882a593Smuzhiyun {
6957*4882a593Smuzhiyun 	int rc;
6958*4882a593Smuzhiyun 	struct pqi_ctrl_info *ctrl_info;
6959*4882a593Smuzhiyun 	struct pqi_config_table_firmware_features *firmware_features;
6960*4882a593Smuzhiyun 	void __iomem *firmware_features_iomem_addr;
6961*4882a593Smuzhiyun 	unsigned int i;
6962*4882a593Smuzhiyun 	unsigned int num_features_supported;
6963*4882a593Smuzhiyun 
6964*4882a593Smuzhiyun 	ctrl_info = section_info->ctrl_info;
6965*4882a593Smuzhiyun 	firmware_features = section_info->section;
6966*4882a593Smuzhiyun 	firmware_features_iomem_addr = section_info->section_iomem_addr;
6967*4882a593Smuzhiyun 
6968*4882a593Smuzhiyun 	for (i = 0, num_features_supported = 0;
6969*4882a593Smuzhiyun 		i < ARRAY_SIZE(pqi_firmware_features); i++) {
6970*4882a593Smuzhiyun 		if (pqi_is_firmware_feature_supported(firmware_features,
6971*4882a593Smuzhiyun 			pqi_firmware_features[i].feature_bit)) {
6972*4882a593Smuzhiyun 			pqi_firmware_features[i].supported = true;
6973*4882a593Smuzhiyun 			num_features_supported++;
6974*4882a593Smuzhiyun 		} else {
6975*4882a593Smuzhiyun 			pqi_firmware_feature_update(ctrl_info,
6976*4882a593Smuzhiyun 				&pqi_firmware_features[i]);
6977*4882a593Smuzhiyun 		}
6978*4882a593Smuzhiyun 	}
6979*4882a593Smuzhiyun 
6980*4882a593Smuzhiyun 	if (num_features_supported == 0)
6981*4882a593Smuzhiyun 		return;
6982*4882a593Smuzhiyun 
6983*4882a593Smuzhiyun 	for (i = 0; i < ARRAY_SIZE(pqi_firmware_features); i++) {
6984*4882a593Smuzhiyun 		if (!pqi_firmware_features[i].supported)
6985*4882a593Smuzhiyun 			continue;
6986*4882a593Smuzhiyun 		pqi_request_firmware_feature(firmware_features,
6987*4882a593Smuzhiyun 			pqi_firmware_features[i].feature_bit);
6988*4882a593Smuzhiyun 	}
6989*4882a593Smuzhiyun 
6990*4882a593Smuzhiyun 	rc = pqi_enable_firmware_features(ctrl_info, firmware_features,
6991*4882a593Smuzhiyun 		firmware_features_iomem_addr);
6992*4882a593Smuzhiyun 	if (rc) {
6993*4882a593Smuzhiyun 		dev_err(&ctrl_info->pci_dev->dev,
6994*4882a593Smuzhiyun 			"failed to enable firmware features in PQI configuration table\n");
6995*4882a593Smuzhiyun 		for (i = 0; i < ARRAY_SIZE(pqi_firmware_features); i++) {
6996*4882a593Smuzhiyun 			if (!pqi_firmware_features[i].supported)
6997*4882a593Smuzhiyun 				continue;
6998*4882a593Smuzhiyun 			pqi_firmware_feature_update(ctrl_info,
6999*4882a593Smuzhiyun 				&pqi_firmware_features[i]);
7000*4882a593Smuzhiyun 		}
7001*4882a593Smuzhiyun 		return;
7002*4882a593Smuzhiyun 	}
7003*4882a593Smuzhiyun 
7004*4882a593Smuzhiyun 	for (i = 0; i < ARRAY_SIZE(pqi_firmware_features); i++) {
7005*4882a593Smuzhiyun 		if (!pqi_firmware_features[i].supported)
7006*4882a593Smuzhiyun 			continue;
7007*4882a593Smuzhiyun 		if (pqi_is_firmware_feature_enabled(firmware_features,
7008*4882a593Smuzhiyun 			firmware_features_iomem_addr,
7009*4882a593Smuzhiyun 			pqi_firmware_features[i].feature_bit)) {
7010*4882a593Smuzhiyun 			pqi_firmware_features[i].enabled = true;
7011*4882a593Smuzhiyun 		}
7012*4882a593Smuzhiyun 		pqi_firmware_feature_update(ctrl_info,
7013*4882a593Smuzhiyun 			&pqi_firmware_features[i]);
7014*4882a593Smuzhiyun 	}
7015*4882a593Smuzhiyun }
7016*4882a593Smuzhiyun 
pqi_init_firmware_features(void)7017*4882a593Smuzhiyun static void pqi_init_firmware_features(void)
7018*4882a593Smuzhiyun {
7019*4882a593Smuzhiyun 	unsigned int i;
7020*4882a593Smuzhiyun 
7021*4882a593Smuzhiyun 	for (i = 0; i < ARRAY_SIZE(pqi_firmware_features); i++) {
7022*4882a593Smuzhiyun 		pqi_firmware_features[i].supported = false;
7023*4882a593Smuzhiyun 		pqi_firmware_features[i].enabled = false;
7024*4882a593Smuzhiyun 	}
7025*4882a593Smuzhiyun }
7026*4882a593Smuzhiyun 
pqi_process_firmware_features_section(struct pqi_config_table_section_info * section_info)7027*4882a593Smuzhiyun static void pqi_process_firmware_features_section(
7028*4882a593Smuzhiyun 	struct pqi_config_table_section_info *section_info)
7029*4882a593Smuzhiyun {
7030*4882a593Smuzhiyun 	mutex_lock(&pqi_firmware_features_mutex);
7031*4882a593Smuzhiyun 	pqi_init_firmware_features();
7032*4882a593Smuzhiyun 	pqi_process_firmware_features(section_info);
7033*4882a593Smuzhiyun 	mutex_unlock(&pqi_firmware_features_mutex);
7034*4882a593Smuzhiyun }
7035*4882a593Smuzhiyun 
pqi_process_config_table(struct pqi_ctrl_info * ctrl_info)7036*4882a593Smuzhiyun static int pqi_process_config_table(struct pqi_ctrl_info *ctrl_info)
7037*4882a593Smuzhiyun {
7038*4882a593Smuzhiyun 	u32 table_length;
7039*4882a593Smuzhiyun 	u32 section_offset;
7040*4882a593Smuzhiyun 	void __iomem *table_iomem_addr;
7041*4882a593Smuzhiyun 	struct pqi_config_table *config_table;
7042*4882a593Smuzhiyun 	struct pqi_config_table_section_header *section;
7043*4882a593Smuzhiyun 	struct pqi_config_table_section_info section_info;
7044*4882a593Smuzhiyun 
7045*4882a593Smuzhiyun 	table_length = ctrl_info->config_table_length;
7046*4882a593Smuzhiyun 	if (table_length == 0)
7047*4882a593Smuzhiyun 		return 0;
7048*4882a593Smuzhiyun 
7049*4882a593Smuzhiyun 	config_table = kmalloc(table_length, GFP_KERNEL);
7050*4882a593Smuzhiyun 	if (!config_table) {
7051*4882a593Smuzhiyun 		dev_err(&ctrl_info->pci_dev->dev,
7052*4882a593Smuzhiyun 			"failed to allocate memory for PQI configuration table\n");
7053*4882a593Smuzhiyun 		return -ENOMEM;
7054*4882a593Smuzhiyun 	}
7055*4882a593Smuzhiyun 
7056*4882a593Smuzhiyun 	/*
7057*4882a593Smuzhiyun 	 * Copy the config table contents from I/O memory space into the
7058*4882a593Smuzhiyun 	 * temporary buffer.
7059*4882a593Smuzhiyun 	 */
7060*4882a593Smuzhiyun 	table_iomem_addr = ctrl_info->iomem_base +
7061*4882a593Smuzhiyun 		ctrl_info->config_table_offset;
7062*4882a593Smuzhiyun 	memcpy_fromio(config_table, table_iomem_addr, table_length);
7063*4882a593Smuzhiyun 
7064*4882a593Smuzhiyun 	section_info.ctrl_info = ctrl_info;
7065*4882a593Smuzhiyun 	section_offset =
7066*4882a593Smuzhiyun 		get_unaligned_le32(&config_table->first_section_offset);
7067*4882a593Smuzhiyun 
7068*4882a593Smuzhiyun 	while (section_offset) {
7069*4882a593Smuzhiyun 		section = (void *)config_table + section_offset;
7070*4882a593Smuzhiyun 
7071*4882a593Smuzhiyun 		section_info.section = section;
7072*4882a593Smuzhiyun 		section_info.section_offset = section_offset;
7073*4882a593Smuzhiyun 		section_info.section_iomem_addr =
7074*4882a593Smuzhiyun 			table_iomem_addr + section_offset;
7075*4882a593Smuzhiyun 
7076*4882a593Smuzhiyun 		switch (get_unaligned_le16(&section->section_id)) {
7077*4882a593Smuzhiyun 		case PQI_CONFIG_TABLE_SECTION_FIRMWARE_FEATURES:
7078*4882a593Smuzhiyun 			pqi_process_firmware_features_section(&section_info);
7079*4882a593Smuzhiyun 			break;
7080*4882a593Smuzhiyun 		case PQI_CONFIG_TABLE_SECTION_HEARTBEAT:
7081*4882a593Smuzhiyun 			if (pqi_disable_heartbeat)
7082*4882a593Smuzhiyun 				dev_warn(&ctrl_info->pci_dev->dev,
7083*4882a593Smuzhiyun 				"heartbeat disabled by module parameter\n");
7084*4882a593Smuzhiyun 			else
7085*4882a593Smuzhiyun 				ctrl_info->heartbeat_counter =
7086*4882a593Smuzhiyun 					table_iomem_addr +
7087*4882a593Smuzhiyun 					section_offset +
7088*4882a593Smuzhiyun 					offsetof(
7089*4882a593Smuzhiyun 					struct pqi_config_table_heartbeat,
7090*4882a593Smuzhiyun 						heartbeat_counter);
7091*4882a593Smuzhiyun 			break;
7092*4882a593Smuzhiyun 		case PQI_CONFIG_TABLE_SECTION_SOFT_RESET:
7093*4882a593Smuzhiyun 			ctrl_info->soft_reset_status =
7094*4882a593Smuzhiyun 				table_iomem_addr +
7095*4882a593Smuzhiyun 				section_offset +
7096*4882a593Smuzhiyun 				offsetof(struct pqi_config_table_soft_reset,
7097*4882a593Smuzhiyun 						soft_reset_status);
7098*4882a593Smuzhiyun 			break;
7099*4882a593Smuzhiyun 		}
7100*4882a593Smuzhiyun 
7101*4882a593Smuzhiyun 		section_offset =
7102*4882a593Smuzhiyun 			get_unaligned_le16(&section->next_section_offset);
7103*4882a593Smuzhiyun 	}
7104*4882a593Smuzhiyun 
7105*4882a593Smuzhiyun 	kfree(config_table);
7106*4882a593Smuzhiyun 
7107*4882a593Smuzhiyun 	return 0;
7108*4882a593Smuzhiyun }
7109*4882a593Smuzhiyun 
7110*4882a593Smuzhiyun /* Switches the controller from PQI mode back into SIS mode. */
7111*4882a593Smuzhiyun 
pqi_revert_to_sis_mode(struct pqi_ctrl_info * ctrl_info)7112*4882a593Smuzhiyun static int pqi_revert_to_sis_mode(struct pqi_ctrl_info *ctrl_info)
7113*4882a593Smuzhiyun {
7114*4882a593Smuzhiyun 	int rc;
7115*4882a593Smuzhiyun 
7116*4882a593Smuzhiyun 	pqi_change_irq_mode(ctrl_info, IRQ_MODE_NONE);
7117*4882a593Smuzhiyun 	rc = pqi_reset(ctrl_info);
7118*4882a593Smuzhiyun 	if (rc)
7119*4882a593Smuzhiyun 		return rc;
7120*4882a593Smuzhiyun 	rc = sis_reenable_sis_mode(ctrl_info);
7121*4882a593Smuzhiyun 	if (rc) {
7122*4882a593Smuzhiyun 		dev_err(&ctrl_info->pci_dev->dev,
7123*4882a593Smuzhiyun 			"re-enabling SIS mode failed with error %d\n", rc);
7124*4882a593Smuzhiyun 		return rc;
7125*4882a593Smuzhiyun 	}
7126*4882a593Smuzhiyun 	pqi_save_ctrl_mode(ctrl_info, SIS_MODE);
7127*4882a593Smuzhiyun 
7128*4882a593Smuzhiyun 	return 0;
7129*4882a593Smuzhiyun }
7130*4882a593Smuzhiyun 
7131*4882a593Smuzhiyun /*
7132*4882a593Smuzhiyun  * If the controller isn't already in SIS mode, this function forces it into
7133*4882a593Smuzhiyun  * SIS mode.
7134*4882a593Smuzhiyun  */
7135*4882a593Smuzhiyun 
pqi_force_sis_mode(struct pqi_ctrl_info * ctrl_info)7136*4882a593Smuzhiyun static int pqi_force_sis_mode(struct pqi_ctrl_info *ctrl_info)
7137*4882a593Smuzhiyun {
7138*4882a593Smuzhiyun 	if (!sis_is_firmware_running(ctrl_info))
7139*4882a593Smuzhiyun 		return -ENXIO;
7140*4882a593Smuzhiyun 
7141*4882a593Smuzhiyun 	if (pqi_get_ctrl_mode(ctrl_info) == SIS_MODE)
7142*4882a593Smuzhiyun 		return 0;
7143*4882a593Smuzhiyun 
7144*4882a593Smuzhiyun 	if (sis_is_kernel_up(ctrl_info)) {
7145*4882a593Smuzhiyun 		pqi_save_ctrl_mode(ctrl_info, SIS_MODE);
7146*4882a593Smuzhiyun 		return 0;
7147*4882a593Smuzhiyun 	}
7148*4882a593Smuzhiyun 
7149*4882a593Smuzhiyun 	return pqi_revert_to_sis_mode(ctrl_info);
7150*4882a593Smuzhiyun }
7151*4882a593Smuzhiyun 
7152*4882a593Smuzhiyun #define PQI_POST_RESET_DELAY_B4_MSGU_READY	5000
7153*4882a593Smuzhiyun 
pqi_ctrl_init(struct pqi_ctrl_info * ctrl_info)7154*4882a593Smuzhiyun static int pqi_ctrl_init(struct pqi_ctrl_info *ctrl_info)
7155*4882a593Smuzhiyun {
7156*4882a593Smuzhiyun 	int rc;
7157*4882a593Smuzhiyun 
7158*4882a593Smuzhiyun 	if (reset_devices) {
7159*4882a593Smuzhiyun 		sis_soft_reset(ctrl_info);
7160*4882a593Smuzhiyun 		msleep(PQI_POST_RESET_DELAY_B4_MSGU_READY);
7161*4882a593Smuzhiyun 	} else {
7162*4882a593Smuzhiyun 		rc = pqi_force_sis_mode(ctrl_info);
7163*4882a593Smuzhiyun 		if (rc)
7164*4882a593Smuzhiyun 			return rc;
7165*4882a593Smuzhiyun 	}
7166*4882a593Smuzhiyun 
7167*4882a593Smuzhiyun 	/*
7168*4882a593Smuzhiyun 	 * Wait until the controller is ready to start accepting SIS
7169*4882a593Smuzhiyun 	 * commands.
7170*4882a593Smuzhiyun 	 */
7171*4882a593Smuzhiyun 	rc = sis_wait_for_ctrl_ready(ctrl_info);
7172*4882a593Smuzhiyun 	if (rc)
7173*4882a593Smuzhiyun 		return rc;
7174*4882a593Smuzhiyun 
7175*4882a593Smuzhiyun 	/*
7176*4882a593Smuzhiyun 	 * Get the controller properties.  This allows us to determine
7177*4882a593Smuzhiyun 	 * whether or not it supports PQI mode.
7178*4882a593Smuzhiyun 	 */
7179*4882a593Smuzhiyun 	rc = sis_get_ctrl_properties(ctrl_info);
7180*4882a593Smuzhiyun 	if (rc) {
7181*4882a593Smuzhiyun 		dev_err(&ctrl_info->pci_dev->dev,
7182*4882a593Smuzhiyun 			"error obtaining controller properties\n");
7183*4882a593Smuzhiyun 		return rc;
7184*4882a593Smuzhiyun 	}
7185*4882a593Smuzhiyun 
7186*4882a593Smuzhiyun 	rc = sis_get_pqi_capabilities(ctrl_info);
7187*4882a593Smuzhiyun 	if (rc) {
7188*4882a593Smuzhiyun 		dev_err(&ctrl_info->pci_dev->dev,
7189*4882a593Smuzhiyun 			"error obtaining controller capabilities\n");
7190*4882a593Smuzhiyun 		return rc;
7191*4882a593Smuzhiyun 	}
7192*4882a593Smuzhiyun 
7193*4882a593Smuzhiyun 	if (reset_devices) {
7194*4882a593Smuzhiyun 		if (ctrl_info->max_outstanding_requests >
7195*4882a593Smuzhiyun 			PQI_MAX_OUTSTANDING_REQUESTS_KDUMP)
7196*4882a593Smuzhiyun 			ctrl_info->max_outstanding_requests =
7197*4882a593Smuzhiyun 					PQI_MAX_OUTSTANDING_REQUESTS_KDUMP;
7198*4882a593Smuzhiyun 	} else {
7199*4882a593Smuzhiyun 		if (ctrl_info->max_outstanding_requests >
7200*4882a593Smuzhiyun 			PQI_MAX_OUTSTANDING_REQUESTS)
7201*4882a593Smuzhiyun 			ctrl_info->max_outstanding_requests =
7202*4882a593Smuzhiyun 					PQI_MAX_OUTSTANDING_REQUESTS;
7203*4882a593Smuzhiyun 	}
7204*4882a593Smuzhiyun 
7205*4882a593Smuzhiyun 	pqi_calculate_io_resources(ctrl_info);
7206*4882a593Smuzhiyun 
7207*4882a593Smuzhiyun 	rc = pqi_alloc_error_buffer(ctrl_info);
7208*4882a593Smuzhiyun 	if (rc) {
7209*4882a593Smuzhiyun 		dev_err(&ctrl_info->pci_dev->dev,
7210*4882a593Smuzhiyun 			"failed to allocate PQI error buffer\n");
7211*4882a593Smuzhiyun 		return rc;
7212*4882a593Smuzhiyun 	}
7213*4882a593Smuzhiyun 
7214*4882a593Smuzhiyun 	/*
7215*4882a593Smuzhiyun 	 * If the function we are about to call succeeds, the
7216*4882a593Smuzhiyun 	 * controller will transition from legacy SIS mode
7217*4882a593Smuzhiyun 	 * into PQI mode.
7218*4882a593Smuzhiyun 	 */
7219*4882a593Smuzhiyun 	rc = sis_init_base_struct_addr(ctrl_info);
7220*4882a593Smuzhiyun 	if (rc) {
7221*4882a593Smuzhiyun 		dev_err(&ctrl_info->pci_dev->dev,
7222*4882a593Smuzhiyun 			"error initializing PQI mode\n");
7223*4882a593Smuzhiyun 		return rc;
7224*4882a593Smuzhiyun 	}
7225*4882a593Smuzhiyun 
7226*4882a593Smuzhiyun 	/* Wait for the controller to complete the SIS -> PQI transition. */
7227*4882a593Smuzhiyun 	rc = pqi_wait_for_pqi_mode_ready(ctrl_info);
7228*4882a593Smuzhiyun 	if (rc) {
7229*4882a593Smuzhiyun 		dev_err(&ctrl_info->pci_dev->dev,
7230*4882a593Smuzhiyun 			"transition to PQI mode failed\n");
7231*4882a593Smuzhiyun 		return rc;
7232*4882a593Smuzhiyun 	}
7233*4882a593Smuzhiyun 
7234*4882a593Smuzhiyun 	/* From here on, we are running in PQI mode. */
7235*4882a593Smuzhiyun 	ctrl_info->pqi_mode_enabled = true;
7236*4882a593Smuzhiyun 	pqi_save_ctrl_mode(ctrl_info, PQI_MODE);
7237*4882a593Smuzhiyun 
7238*4882a593Smuzhiyun 	rc = pqi_alloc_admin_queues(ctrl_info);
7239*4882a593Smuzhiyun 	if (rc) {
7240*4882a593Smuzhiyun 		dev_err(&ctrl_info->pci_dev->dev,
7241*4882a593Smuzhiyun 			"failed to allocate admin queues\n");
7242*4882a593Smuzhiyun 		return rc;
7243*4882a593Smuzhiyun 	}
7244*4882a593Smuzhiyun 
7245*4882a593Smuzhiyun 	rc = pqi_create_admin_queues(ctrl_info);
7246*4882a593Smuzhiyun 	if (rc) {
7247*4882a593Smuzhiyun 		dev_err(&ctrl_info->pci_dev->dev,
7248*4882a593Smuzhiyun 			"error creating admin queues\n");
7249*4882a593Smuzhiyun 		return rc;
7250*4882a593Smuzhiyun 	}
7251*4882a593Smuzhiyun 
7252*4882a593Smuzhiyun 	rc = pqi_report_device_capability(ctrl_info);
7253*4882a593Smuzhiyun 	if (rc) {
7254*4882a593Smuzhiyun 		dev_err(&ctrl_info->pci_dev->dev,
7255*4882a593Smuzhiyun 			"obtaining device capability failed\n");
7256*4882a593Smuzhiyun 		return rc;
7257*4882a593Smuzhiyun 	}
7258*4882a593Smuzhiyun 
7259*4882a593Smuzhiyun 	rc = pqi_validate_device_capability(ctrl_info);
7260*4882a593Smuzhiyun 	if (rc)
7261*4882a593Smuzhiyun 		return rc;
7262*4882a593Smuzhiyun 
7263*4882a593Smuzhiyun 	pqi_calculate_queue_resources(ctrl_info);
7264*4882a593Smuzhiyun 
7265*4882a593Smuzhiyun 	rc = pqi_enable_msix_interrupts(ctrl_info);
7266*4882a593Smuzhiyun 	if (rc)
7267*4882a593Smuzhiyun 		return rc;
7268*4882a593Smuzhiyun 
7269*4882a593Smuzhiyun 	if (ctrl_info->num_msix_vectors_enabled < ctrl_info->num_queue_groups) {
7270*4882a593Smuzhiyun 		ctrl_info->max_msix_vectors =
7271*4882a593Smuzhiyun 			ctrl_info->num_msix_vectors_enabled;
7272*4882a593Smuzhiyun 		pqi_calculate_queue_resources(ctrl_info);
7273*4882a593Smuzhiyun 	}
7274*4882a593Smuzhiyun 
7275*4882a593Smuzhiyun 	rc = pqi_alloc_io_resources(ctrl_info);
7276*4882a593Smuzhiyun 	if (rc)
7277*4882a593Smuzhiyun 		return rc;
7278*4882a593Smuzhiyun 
7279*4882a593Smuzhiyun 	rc = pqi_alloc_operational_queues(ctrl_info);
7280*4882a593Smuzhiyun 	if (rc) {
7281*4882a593Smuzhiyun 		dev_err(&ctrl_info->pci_dev->dev,
7282*4882a593Smuzhiyun 			"failed to allocate operational queues\n");
7283*4882a593Smuzhiyun 		return rc;
7284*4882a593Smuzhiyun 	}
7285*4882a593Smuzhiyun 
7286*4882a593Smuzhiyun 	pqi_init_operational_queues(ctrl_info);
7287*4882a593Smuzhiyun 
7288*4882a593Smuzhiyun 	rc = pqi_request_irqs(ctrl_info);
7289*4882a593Smuzhiyun 	if (rc)
7290*4882a593Smuzhiyun 		return rc;
7291*4882a593Smuzhiyun 
7292*4882a593Smuzhiyun 	rc = pqi_create_queues(ctrl_info);
7293*4882a593Smuzhiyun 	if (rc)
7294*4882a593Smuzhiyun 		return rc;
7295*4882a593Smuzhiyun 
7296*4882a593Smuzhiyun 	pqi_change_irq_mode(ctrl_info, IRQ_MODE_MSIX);
7297*4882a593Smuzhiyun 
7298*4882a593Smuzhiyun 	ctrl_info->controller_online = true;
7299*4882a593Smuzhiyun 
7300*4882a593Smuzhiyun 	rc = pqi_process_config_table(ctrl_info);
7301*4882a593Smuzhiyun 	if (rc)
7302*4882a593Smuzhiyun 		return rc;
7303*4882a593Smuzhiyun 
7304*4882a593Smuzhiyun 	pqi_start_heartbeat_timer(ctrl_info);
7305*4882a593Smuzhiyun 
7306*4882a593Smuzhiyun 	rc = pqi_enable_events(ctrl_info);
7307*4882a593Smuzhiyun 	if (rc) {
7308*4882a593Smuzhiyun 		dev_err(&ctrl_info->pci_dev->dev,
7309*4882a593Smuzhiyun 			"error enabling events\n");
7310*4882a593Smuzhiyun 		return rc;
7311*4882a593Smuzhiyun 	}
7312*4882a593Smuzhiyun 
7313*4882a593Smuzhiyun 	/* Register with the SCSI subsystem. */
7314*4882a593Smuzhiyun 	rc = pqi_register_scsi(ctrl_info);
7315*4882a593Smuzhiyun 	if (rc)
7316*4882a593Smuzhiyun 		return rc;
7317*4882a593Smuzhiyun 
7318*4882a593Smuzhiyun 	rc = pqi_get_ctrl_product_details(ctrl_info);
7319*4882a593Smuzhiyun 	if (rc) {
7320*4882a593Smuzhiyun 		dev_err(&ctrl_info->pci_dev->dev,
7321*4882a593Smuzhiyun 			"error obtaining product details\n");
7322*4882a593Smuzhiyun 		return rc;
7323*4882a593Smuzhiyun 	}
7324*4882a593Smuzhiyun 
7325*4882a593Smuzhiyun 	rc = pqi_get_ctrl_serial_number(ctrl_info);
7326*4882a593Smuzhiyun 	if (rc) {
7327*4882a593Smuzhiyun 		dev_err(&ctrl_info->pci_dev->dev,
7328*4882a593Smuzhiyun 			"error obtaining ctrl serial number\n");
7329*4882a593Smuzhiyun 		return rc;
7330*4882a593Smuzhiyun 	}
7331*4882a593Smuzhiyun 
7332*4882a593Smuzhiyun 	rc = pqi_set_diag_rescan(ctrl_info);
7333*4882a593Smuzhiyun 	if (rc) {
7334*4882a593Smuzhiyun 		dev_err(&ctrl_info->pci_dev->dev,
7335*4882a593Smuzhiyun 			"error enabling multi-lun rescan\n");
7336*4882a593Smuzhiyun 		return rc;
7337*4882a593Smuzhiyun 	}
7338*4882a593Smuzhiyun 
7339*4882a593Smuzhiyun 	rc = pqi_write_driver_version_to_host_wellness(ctrl_info);
7340*4882a593Smuzhiyun 	if (rc) {
7341*4882a593Smuzhiyun 		dev_err(&ctrl_info->pci_dev->dev,
7342*4882a593Smuzhiyun 			"error updating host wellness\n");
7343*4882a593Smuzhiyun 		return rc;
7344*4882a593Smuzhiyun 	}
7345*4882a593Smuzhiyun 
7346*4882a593Smuzhiyun 	pqi_schedule_update_time_worker(ctrl_info);
7347*4882a593Smuzhiyun 
7348*4882a593Smuzhiyun 	pqi_scan_scsi_devices(ctrl_info);
7349*4882a593Smuzhiyun 
7350*4882a593Smuzhiyun 	return 0;
7351*4882a593Smuzhiyun }
7352*4882a593Smuzhiyun 
pqi_reinit_queues(struct pqi_ctrl_info * ctrl_info)7353*4882a593Smuzhiyun static void pqi_reinit_queues(struct pqi_ctrl_info *ctrl_info)
7354*4882a593Smuzhiyun {
7355*4882a593Smuzhiyun 	unsigned int i;
7356*4882a593Smuzhiyun 	struct pqi_admin_queues *admin_queues;
7357*4882a593Smuzhiyun 	struct pqi_event_queue *event_queue;
7358*4882a593Smuzhiyun 
7359*4882a593Smuzhiyun 	admin_queues = &ctrl_info->admin_queues;
7360*4882a593Smuzhiyun 	admin_queues->iq_pi_copy = 0;
7361*4882a593Smuzhiyun 	admin_queues->oq_ci_copy = 0;
7362*4882a593Smuzhiyun 	writel(0, admin_queues->oq_pi);
7363*4882a593Smuzhiyun 
7364*4882a593Smuzhiyun 	for (i = 0; i < ctrl_info->num_queue_groups; i++) {
7365*4882a593Smuzhiyun 		ctrl_info->queue_groups[i].iq_pi_copy[RAID_PATH] = 0;
7366*4882a593Smuzhiyun 		ctrl_info->queue_groups[i].iq_pi_copy[AIO_PATH] = 0;
7367*4882a593Smuzhiyun 		ctrl_info->queue_groups[i].oq_ci_copy = 0;
7368*4882a593Smuzhiyun 
7369*4882a593Smuzhiyun 		writel(0, ctrl_info->queue_groups[i].iq_ci[RAID_PATH]);
7370*4882a593Smuzhiyun 		writel(0, ctrl_info->queue_groups[i].iq_ci[AIO_PATH]);
7371*4882a593Smuzhiyun 		writel(0, ctrl_info->queue_groups[i].oq_pi);
7372*4882a593Smuzhiyun 	}
7373*4882a593Smuzhiyun 
7374*4882a593Smuzhiyun 	event_queue = &ctrl_info->event_queue;
7375*4882a593Smuzhiyun 	writel(0, event_queue->oq_pi);
7376*4882a593Smuzhiyun 	event_queue->oq_ci_copy = 0;
7377*4882a593Smuzhiyun }
7378*4882a593Smuzhiyun 
pqi_ctrl_init_resume(struct pqi_ctrl_info * ctrl_info)7379*4882a593Smuzhiyun static int pqi_ctrl_init_resume(struct pqi_ctrl_info *ctrl_info)
7380*4882a593Smuzhiyun {
7381*4882a593Smuzhiyun 	int rc;
7382*4882a593Smuzhiyun 
7383*4882a593Smuzhiyun 	rc = pqi_force_sis_mode(ctrl_info);
7384*4882a593Smuzhiyun 	if (rc)
7385*4882a593Smuzhiyun 		return rc;
7386*4882a593Smuzhiyun 
7387*4882a593Smuzhiyun 	/*
7388*4882a593Smuzhiyun 	 * Wait until the controller is ready to start accepting SIS
7389*4882a593Smuzhiyun 	 * commands.
7390*4882a593Smuzhiyun 	 */
7391*4882a593Smuzhiyun 	rc = sis_wait_for_ctrl_ready_resume(ctrl_info);
7392*4882a593Smuzhiyun 	if (rc)
7393*4882a593Smuzhiyun 		return rc;
7394*4882a593Smuzhiyun 
7395*4882a593Smuzhiyun 	/*
7396*4882a593Smuzhiyun 	 * Get the controller properties.  This allows us to determine
7397*4882a593Smuzhiyun 	 * whether or not it supports PQI mode.
7398*4882a593Smuzhiyun 	 */
7399*4882a593Smuzhiyun 	rc = sis_get_ctrl_properties(ctrl_info);
7400*4882a593Smuzhiyun 	if (rc) {
7401*4882a593Smuzhiyun 		dev_err(&ctrl_info->pci_dev->dev,
7402*4882a593Smuzhiyun 			"error obtaining controller properties\n");
7403*4882a593Smuzhiyun 		return rc;
7404*4882a593Smuzhiyun 	}
7405*4882a593Smuzhiyun 
7406*4882a593Smuzhiyun 	rc = sis_get_pqi_capabilities(ctrl_info);
7407*4882a593Smuzhiyun 	if (rc) {
7408*4882a593Smuzhiyun 		dev_err(&ctrl_info->pci_dev->dev,
7409*4882a593Smuzhiyun 			"error obtaining controller capabilities\n");
7410*4882a593Smuzhiyun 		return rc;
7411*4882a593Smuzhiyun 	}
7412*4882a593Smuzhiyun 
7413*4882a593Smuzhiyun 	/*
7414*4882a593Smuzhiyun 	 * If the function we are about to call succeeds, the
7415*4882a593Smuzhiyun 	 * controller will transition from legacy SIS mode
7416*4882a593Smuzhiyun 	 * into PQI mode.
7417*4882a593Smuzhiyun 	 */
7418*4882a593Smuzhiyun 	rc = sis_init_base_struct_addr(ctrl_info);
7419*4882a593Smuzhiyun 	if (rc) {
7420*4882a593Smuzhiyun 		dev_err(&ctrl_info->pci_dev->dev,
7421*4882a593Smuzhiyun 			"error initializing PQI mode\n");
7422*4882a593Smuzhiyun 		return rc;
7423*4882a593Smuzhiyun 	}
7424*4882a593Smuzhiyun 
7425*4882a593Smuzhiyun 	/* Wait for the controller to complete the SIS -> PQI transition. */
7426*4882a593Smuzhiyun 	rc = pqi_wait_for_pqi_mode_ready(ctrl_info);
7427*4882a593Smuzhiyun 	if (rc) {
7428*4882a593Smuzhiyun 		dev_err(&ctrl_info->pci_dev->dev,
7429*4882a593Smuzhiyun 			"transition to PQI mode failed\n");
7430*4882a593Smuzhiyun 		return rc;
7431*4882a593Smuzhiyun 	}
7432*4882a593Smuzhiyun 
7433*4882a593Smuzhiyun 	/* From here on, we are running in PQI mode. */
7434*4882a593Smuzhiyun 	ctrl_info->pqi_mode_enabled = true;
7435*4882a593Smuzhiyun 	pqi_save_ctrl_mode(ctrl_info, PQI_MODE);
7436*4882a593Smuzhiyun 
7437*4882a593Smuzhiyun 	pqi_reinit_queues(ctrl_info);
7438*4882a593Smuzhiyun 
7439*4882a593Smuzhiyun 	rc = pqi_create_admin_queues(ctrl_info);
7440*4882a593Smuzhiyun 	if (rc) {
7441*4882a593Smuzhiyun 		dev_err(&ctrl_info->pci_dev->dev,
7442*4882a593Smuzhiyun 			"error creating admin queues\n");
7443*4882a593Smuzhiyun 		return rc;
7444*4882a593Smuzhiyun 	}
7445*4882a593Smuzhiyun 
7446*4882a593Smuzhiyun 	rc = pqi_create_queues(ctrl_info);
7447*4882a593Smuzhiyun 	if (rc)
7448*4882a593Smuzhiyun 		return rc;
7449*4882a593Smuzhiyun 
7450*4882a593Smuzhiyun 	pqi_change_irq_mode(ctrl_info, IRQ_MODE_MSIX);
7451*4882a593Smuzhiyun 
7452*4882a593Smuzhiyun 	ctrl_info->controller_online = true;
7453*4882a593Smuzhiyun 	pqi_ctrl_unblock_requests(ctrl_info);
7454*4882a593Smuzhiyun 
7455*4882a593Smuzhiyun 	rc = pqi_process_config_table(ctrl_info);
7456*4882a593Smuzhiyun 	if (rc)
7457*4882a593Smuzhiyun 		return rc;
7458*4882a593Smuzhiyun 
7459*4882a593Smuzhiyun 	pqi_start_heartbeat_timer(ctrl_info);
7460*4882a593Smuzhiyun 
7461*4882a593Smuzhiyun 	rc = pqi_enable_events(ctrl_info);
7462*4882a593Smuzhiyun 	if (rc) {
7463*4882a593Smuzhiyun 		dev_err(&ctrl_info->pci_dev->dev,
7464*4882a593Smuzhiyun 			"error enabling events\n");
7465*4882a593Smuzhiyun 		return rc;
7466*4882a593Smuzhiyun 	}
7467*4882a593Smuzhiyun 
7468*4882a593Smuzhiyun 	rc = pqi_get_ctrl_product_details(ctrl_info);
7469*4882a593Smuzhiyun 	if (rc) {
7470*4882a593Smuzhiyun 		dev_err(&ctrl_info->pci_dev->dev,
7471*4882a593Smuzhiyun 			"error obtaining product details\n");
7472*4882a593Smuzhiyun 		return rc;
7473*4882a593Smuzhiyun 	}
7474*4882a593Smuzhiyun 
7475*4882a593Smuzhiyun 	rc = pqi_set_diag_rescan(ctrl_info);
7476*4882a593Smuzhiyun 	if (rc) {
7477*4882a593Smuzhiyun 		dev_err(&ctrl_info->pci_dev->dev,
7478*4882a593Smuzhiyun 			"error enabling multi-lun rescan\n");
7479*4882a593Smuzhiyun 		return rc;
7480*4882a593Smuzhiyun 	}
7481*4882a593Smuzhiyun 
7482*4882a593Smuzhiyun 	rc = pqi_write_driver_version_to_host_wellness(ctrl_info);
7483*4882a593Smuzhiyun 	if (rc) {
7484*4882a593Smuzhiyun 		dev_err(&ctrl_info->pci_dev->dev,
7485*4882a593Smuzhiyun 			"error updating host wellness\n");
7486*4882a593Smuzhiyun 		return rc;
7487*4882a593Smuzhiyun 	}
7488*4882a593Smuzhiyun 
7489*4882a593Smuzhiyun 	pqi_schedule_update_time_worker(ctrl_info);
7490*4882a593Smuzhiyun 
7491*4882a593Smuzhiyun 	pqi_scan_scsi_devices(ctrl_info);
7492*4882a593Smuzhiyun 
7493*4882a593Smuzhiyun 	return 0;
7494*4882a593Smuzhiyun }
7495*4882a593Smuzhiyun 
pqi_set_pcie_completion_timeout(struct pci_dev * pci_dev,u16 timeout)7496*4882a593Smuzhiyun static inline int pqi_set_pcie_completion_timeout(struct pci_dev *pci_dev,
7497*4882a593Smuzhiyun 	u16 timeout)
7498*4882a593Smuzhiyun {
7499*4882a593Smuzhiyun 	int rc;
7500*4882a593Smuzhiyun 
7501*4882a593Smuzhiyun 	rc = pcie_capability_clear_and_set_word(pci_dev, PCI_EXP_DEVCTL2,
7502*4882a593Smuzhiyun 		PCI_EXP_DEVCTL2_COMP_TIMEOUT, timeout);
7503*4882a593Smuzhiyun 
7504*4882a593Smuzhiyun 	return pcibios_err_to_errno(rc);
7505*4882a593Smuzhiyun }
7506*4882a593Smuzhiyun 
pqi_pci_init(struct pqi_ctrl_info * ctrl_info)7507*4882a593Smuzhiyun static int pqi_pci_init(struct pqi_ctrl_info *ctrl_info)
7508*4882a593Smuzhiyun {
7509*4882a593Smuzhiyun 	int rc;
7510*4882a593Smuzhiyun 	u64 mask;
7511*4882a593Smuzhiyun 
7512*4882a593Smuzhiyun 	rc = pci_enable_device(ctrl_info->pci_dev);
7513*4882a593Smuzhiyun 	if (rc) {
7514*4882a593Smuzhiyun 		dev_err(&ctrl_info->pci_dev->dev,
7515*4882a593Smuzhiyun 			"failed to enable PCI device\n");
7516*4882a593Smuzhiyun 		return rc;
7517*4882a593Smuzhiyun 	}
7518*4882a593Smuzhiyun 
7519*4882a593Smuzhiyun 	if (sizeof(dma_addr_t) > 4)
7520*4882a593Smuzhiyun 		mask = DMA_BIT_MASK(64);
7521*4882a593Smuzhiyun 	else
7522*4882a593Smuzhiyun 		mask = DMA_BIT_MASK(32);
7523*4882a593Smuzhiyun 
7524*4882a593Smuzhiyun 	rc = dma_set_mask_and_coherent(&ctrl_info->pci_dev->dev, mask);
7525*4882a593Smuzhiyun 	if (rc) {
7526*4882a593Smuzhiyun 		dev_err(&ctrl_info->pci_dev->dev, "failed to set DMA mask\n");
7527*4882a593Smuzhiyun 		goto disable_device;
7528*4882a593Smuzhiyun 	}
7529*4882a593Smuzhiyun 
7530*4882a593Smuzhiyun 	rc = pci_request_regions(ctrl_info->pci_dev, DRIVER_NAME_SHORT);
7531*4882a593Smuzhiyun 	if (rc) {
7532*4882a593Smuzhiyun 		dev_err(&ctrl_info->pci_dev->dev,
7533*4882a593Smuzhiyun 			"failed to obtain PCI resources\n");
7534*4882a593Smuzhiyun 		goto disable_device;
7535*4882a593Smuzhiyun 	}
7536*4882a593Smuzhiyun 
7537*4882a593Smuzhiyun 	ctrl_info->iomem_base = ioremap(pci_resource_start(
7538*4882a593Smuzhiyun 		ctrl_info->pci_dev, 0),
7539*4882a593Smuzhiyun 		sizeof(struct pqi_ctrl_registers));
7540*4882a593Smuzhiyun 	if (!ctrl_info->iomem_base) {
7541*4882a593Smuzhiyun 		dev_err(&ctrl_info->pci_dev->dev,
7542*4882a593Smuzhiyun 			"failed to map memory for controller registers\n");
7543*4882a593Smuzhiyun 		rc = -ENOMEM;
7544*4882a593Smuzhiyun 		goto release_regions;
7545*4882a593Smuzhiyun 	}
7546*4882a593Smuzhiyun 
7547*4882a593Smuzhiyun #define PCI_EXP_COMP_TIMEOUT_65_TO_210_MS		0x6
7548*4882a593Smuzhiyun 
7549*4882a593Smuzhiyun 	/* Increase the PCIe completion timeout. */
7550*4882a593Smuzhiyun 	rc = pqi_set_pcie_completion_timeout(ctrl_info->pci_dev,
7551*4882a593Smuzhiyun 		PCI_EXP_COMP_TIMEOUT_65_TO_210_MS);
7552*4882a593Smuzhiyun 	if (rc) {
7553*4882a593Smuzhiyun 		dev_err(&ctrl_info->pci_dev->dev,
7554*4882a593Smuzhiyun 			"failed to set PCIe completion timeout\n");
7555*4882a593Smuzhiyun 		goto release_regions;
7556*4882a593Smuzhiyun 	}
7557*4882a593Smuzhiyun 
7558*4882a593Smuzhiyun 	/* Enable bus mastering. */
7559*4882a593Smuzhiyun 	pci_set_master(ctrl_info->pci_dev);
7560*4882a593Smuzhiyun 
7561*4882a593Smuzhiyun 	ctrl_info->registers = ctrl_info->iomem_base;
7562*4882a593Smuzhiyun 	ctrl_info->pqi_registers = &ctrl_info->registers->pqi_registers;
7563*4882a593Smuzhiyun 
7564*4882a593Smuzhiyun 	pci_set_drvdata(ctrl_info->pci_dev, ctrl_info);
7565*4882a593Smuzhiyun 
7566*4882a593Smuzhiyun 	return 0;
7567*4882a593Smuzhiyun 
7568*4882a593Smuzhiyun release_regions:
7569*4882a593Smuzhiyun 	pci_release_regions(ctrl_info->pci_dev);
7570*4882a593Smuzhiyun disable_device:
7571*4882a593Smuzhiyun 	pci_disable_device(ctrl_info->pci_dev);
7572*4882a593Smuzhiyun 
7573*4882a593Smuzhiyun 	return rc;
7574*4882a593Smuzhiyun }
7575*4882a593Smuzhiyun 
pqi_cleanup_pci_init(struct pqi_ctrl_info * ctrl_info)7576*4882a593Smuzhiyun static void pqi_cleanup_pci_init(struct pqi_ctrl_info *ctrl_info)
7577*4882a593Smuzhiyun {
7578*4882a593Smuzhiyun 	iounmap(ctrl_info->iomem_base);
7579*4882a593Smuzhiyun 	pci_release_regions(ctrl_info->pci_dev);
7580*4882a593Smuzhiyun 	if (pci_is_enabled(ctrl_info->pci_dev))
7581*4882a593Smuzhiyun 		pci_disable_device(ctrl_info->pci_dev);
7582*4882a593Smuzhiyun 	pci_set_drvdata(ctrl_info->pci_dev, NULL);
7583*4882a593Smuzhiyun }
7584*4882a593Smuzhiyun 
pqi_alloc_ctrl_info(int numa_node)7585*4882a593Smuzhiyun static struct pqi_ctrl_info *pqi_alloc_ctrl_info(int numa_node)
7586*4882a593Smuzhiyun {
7587*4882a593Smuzhiyun 	struct pqi_ctrl_info *ctrl_info;
7588*4882a593Smuzhiyun 
7589*4882a593Smuzhiyun 	ctrl_info = kzalloc_node(sizeof(struct pqi_ctrl_info),
7590*4882a593Smuzhiyun 			GFP_KERNEL, numa_node);
7591*4882a593Smuzhiyun 	if (!ctrl_info)
7592*4882a593Smuzhiyun 		return NULL;
7593*4882a593Smuzhiyun 
7594*4882a593Smuzhiyun 	mutex_init(&ctrl_info->scan_mutex);
7595*4882a593Smuzhiyun 	mutex_init(&ctrl_info->lun_reset_mutex);
7596*4882a593Smuzhiyun 	mutex_init(&ctrl_info->ofa_mutex);
7597*4882a593Smuzhiyun 
7598*4882a593Smuzhiyun 	INIT_LIST_HEAD(&ctrl_info->scsi_device_list);
7599*4882a593Smuzhiyun 	spin_lock_init(&ctrl_info->scsi_device_list_lock);
7600*4882a593Smuzhiyun 
7601*4882a593Smuzhiyun 	INIT_WORK(&ctrl_info->event_work, pqi_event_worker);
7602*4882a593Smuzhiyun 	atomic_set(&ctrl_info->num_interrupts, 0);
7603*4882a593Smuzhiyun 	atomic_set(&ctrl_info->sync_cmds_outstanding, 0);
7604*4882a593Smuzhiyun 
7605*4882a593Smuzhiyun 	INIT_DELAYED_WORK(&ctrl_info->rescan_work, pqi_rescan_worker);
7606*4882a593Smuzhiyun 	INIT_DELAYED_WORK(&ctrl_info->update_time_work, pqi_update_time_worker);
7607*4882a593Smuzhiyun 
7608*4882a593Smuzhiyun 	timer_setup(&ctrl_info->heartbeat_timer, pqi_heartbeat_timer_handler, 0);
7609*4882a593Smuzhiyun 	INIT_WORK(&ctrl_info->ctrl_offline_work, pqi_ctrl_offline_worker);
7610*4882a593Smuzhiyun 
7611*4882a593Smuzhiyun 	sema_init(&ctrl_info->sync_request_sem,
7612*4882a593Smuzhiyun 		PQI_RESERVED_IO_SLOTS_SYNCHRONOUS_REQUESTS);
7613*4882a593Smuzhiyun 	init_waitqueue_head(&ctrl_info->block_requests_wait);
7614*4882a593Smuzhiyun 
7615*4882a593Smuzhiyun 	INIT_LIST_HEAD(&ctrl_info->raid_bypass_retry_list);
7616*4882a593Smuzhiyun 	spin_lock_init(&ctrl_info->raid_bypass_retry_list_lock);
7617*4882a593Smuzhiyun 	INIT_WORK(&ctrl_info->raid_bypass_retry_work,
7618*4882a593Smuzhiyun 		pqi_raid_bypass_retry_worker);
7619*4882a593Smuzhiyun 
7620*4882a593Smuzhiyun 	ctrl_info->ctrl_id = atomic_inc_return(&pqi_controller_count) - 1;
7621*4882a593Smuzhiyun 	ctrl_info->irq_mode = IRQ_MODE_NONE;
7622*4882a593Smuzhiyun 	ctrl_info->max_msix_vectors = PQI_MAX_MSIX_VECTORS;
7623*4882a593Smuzhiyun 
7624*4882a593Smuzhiyun 	return ctrl_info;
7625*4882a593Smuzhiyun }
7626*4882a593Smuzhiyun 
pqi_free_ctrl_info(struct pqi_ctrl_info * ctrl_info)7627*4882a593Smuzhiyun static inline void pqi_free_ctrl_info(struct pqi_ctrl_info *ctrl_info)
7628*4882a593Smuzhiyun {
7629*4882a593Smuzhiyun 	kfree(ctrl_info);
7630*4882a593Smuzhiyun }
7631*4882a593Smuzhiyun 
pqi_free_interrupts(struct pqi_ctrl_info * ctrl_info)7632*4882a593Smuzhiyun static void pqi_free_interrupts(struct pqi_ctrl_info *ctrl_info)
7633*4882a593Smuzhiyun {
7634*4882a593Smuzhiyun 	pqi_free_irqs(ctrl_info);
7635*4882a593Smuzhiyun 	pqi_disable_msix_interrupts(ctrl_info);
7636*4882a593Smuzhiyun }
7637*4882a593Smuzhiyun 
pqi_free_ctrl_resources(struct pqi_ctrl_info * ctrl_info)7638*4882a593Smuzhiyun static void pqi_free_ctrl_resources(struct pqi_ctrl_info *ctrl_info)
7639*4882a593Smuzhiyun {
7640*4882a593Smuzhiyun 	pqi_stop_heartbeat_timer(ctrl_info);
7641*4882a593Smuzhiyun 	pqi_free_interrupts(ctrl_info);
7642*4882a593Smuzhiyun 	if (ctrl_info->queue_memory_base)
7643*4882a593Smuzhiyun 		dma_free_coherent(&ctrl_info->pci_dev->dev,
7644*4882a593Smuzhiyun 			ctrl_info->queue_memory_length,
7645*4882a593Smuzhiyun 			ctrl_info->queue_memory_base,
7646*4882a593Smuzhiyun 			ctrl_info->queue_memory_base_dma_handle);
7647*4882a593Smuzhiyun 	if (ctrl_info->admin_queue_memory_base)
7648*4882a593Smuzhiyun 		dma_free_coherent(&ctrl_info->pci_dev->dev,
7649*4882a593Smuzhiyun 			ctrl_info->admin_queue_memory_length,
7650*4882a593Smuzhiyun 			ctrl_info->admin_queue_memory_base,
7651*4882a593Smuzhiyun 			ctrl_info->admin_queue_memory_base_dma_handle);
7652*4882a593Smuzhiyun 	pqi_free_all_io_requests(ctrl_info);
7653*4882a593Smuzhiyun 	if (ctrl_info->error_buffer)
7654*4882a593Smuzhiyun 		dma_free_coherent(&ctrl_info->pci_dev->dev,
7655*4882a593Smuzhiyun 			ctrl_info->error_buffer_length,
7656*4882a593Smuzhiyun 			ctrl_info->error_buffer,
7657*4882a593Smuzhiyun 			ctrl_info->error_buffer_dma_handle);
7658*4882a593Smuzhiyun 	if (ctrl_info->iomem_base)
7659*4882a593Smuzhiyun 		pqi_cleanup_pci_init(ctrl_info);
7660*4882a593Smuzhiyun 	pqi_free_ctrl_info(ctrl_info);
7661*4882a593Smuzhiyun }
7662*4882a593Smuzhiyun 
pqi_remove_ctrl(struct pqi_ctrl_info * ctrl_info)7663*4882a593Smuzhiyun static void pqi_remove_ctrl(struct pqi_ctrl_info *ctrl_info)
7664*4882a593Smuzhiyun {
7665*4882a593Smuzhiyun 	pqi_cancel_rescan_worker(ctrl_info);
7666*4882a593Smuzhiyun 	pqi_cancel_update_time_worker(ctrl_info);
7667*4882a593Smuzhiyun 	pqi_unregister_scsi(ctrl_info);
7668*4882a593Smuzhiyun 	if (ctrl_info->pqi_mode_enabled)
7669*4882a593Smuzhiyun 		pqi_revert_to_sis_mode(ctrl_info);
7670*4882a593Smuzhiyun 	pqi_free_ctrl_resources(ctrl_info);
7671*4882a593Smuzhiyun }
7672*4882a593Smuzhiyun 
pqi_ofa_ctrl_quiesce(struct pqi_ctrl_info * ctrl_info)7673*4882a593Smuzhiyun static void pqi_ofa_ctrl_quiesce(struct pqi_ctrl_info *ctrl_info)
7674*4882a593Smuzhiyun {
7675*4882a593Smuzhiyun 	pqi_cancel_update_time_worker(ctrl_info);
7676*4882a593Smuzhiyun 	pqi_cancel_rescan_worker(ctrl_info);
7677*4882a593Smuzhiyun 	pqi_wait_until_lun_reset_finished(ctrl_info);
7678*4882a593Smuzhiyun 	pqi_wait_until_scan_finished(ctrl_info);
7679*4882a593Smuzhiyun 	pqi_ctrl_ofa_start(ctrl_info);
7680*4882a593Smuzhiyun 	pqi_ctrl_block_requests(ctrl_info);
7681*4882a593Smuzhiyun 	pqi_ctrl_wait_until_quiesced(ctrl_info);
7682*4882a593Smuzhiyun 	pqi_ctrl_wait_for_pending_io(ctrl_info, PQI_PENDING_IO_TIMEOUT_SECS);
7683*4882a593Smuzhiyun 	pqi_fail_io_queued_for_all_devices(ctrl_info);
7684*4882a593Smuzhiyun 	pqi_wait_until_inbound_queues_empty(ctrl_info);
7685*4882a593Smuzhiyun 	pqi_stop_heartbeat_timer(ctrl_info);
7686*4882a593Smuzhiyun 	ctrl_info->pqi_mode_enabled = false;
7687*4882a593Smuzhiyun 	pqi_save_ctrl_mode(ctrl_info, SIS_MODE);
7688*4882a593Smuzhiyun }
7689*4882a593Smuzhiyun 
pqi_ofa_ctrl_unquiesce(struct pqi_ctrl_info * ctrl_info)7690*4882a593Smuzhiyun static void pqi_ofa_ctrl_unquiesce(struct pqi_ctrl_info *ctrl_info)
7691*4882a593Smuzhiyun {
7692*4882a593Smuzhiyun 	pqi_ofa_free_host_buffer(ctrl_info);
7693*4882a593Smuzhiyun 	ctrl_info->pqi_mode_enabled = true;
7694*4882a593Smuzhiyun 	pqi_save_ctrl_mode(ctrl_info, PQI_MODE);
7695*4882a593Smuzhiyun 	ctrl_info->controller_online = true;
7696*4882a593Smuzhiyun 	pqi_ctrl_unblock_requests(ctrl_info);
7697*4882a593Smuzhiyun 	pqi_start_heartbeat_timer(ctrl_info);
7698*4882a593Smuzhiyun 	pqi_schedule_update_time_worker(ctrl_info);
7699*4882a593Smuzhiyun 	pqi_clear_soft_reset_status(ctrl_info,
7700*4882a593Smuzhiyun 		PQI_SOFT_RESET_ABORT);
7701*4882a593Smuzhiyun 	pqi_scan_scsi_devices(ctrl_info);
7702*4882a593Smuzhiyun }
7703*4882a593Smuzhiyun 
pqi_ofa_alloc_mem(struct pqi_ctrl_info * ctrl_info,u32 total_size,u32 chunk_size)7704*4882a593Smuzhiyun static int pqi_ofa_alloc_mem(struct pqi_ctrl_info *ctrl_info,
7705*4882a593Smuzhiyun 	u32 total_size, u32 chunk_size)
7706*4882a593Smuzhiyun {
7707*4882a593Smuzhiyun 	u32 sg_count;
7708*4882a593Smuzhiyun 	u32 size;
7709*4882a593Smuzhiyun 	int i;
7710*4882a593Smuzhiyun 	struct pqi_sg_descriptor *mem_descriptor = NULL;
7711*4882a593Smuzhiyun 	struct device *dev;
7712*4882a593Smuzhiyun 	struct pqi_ofa_memory *ofap;
7713*4882a593Smuzhiyun 
7714*4882a593Smuzhiyun 	dev = &ctrl_info->pci_dev->dev;
7715*4882a593Smuzhiyun 
7716*4882a593Smuzhiyun 	sg_count = (total_size + chunk_size - 1);
7717*4882a593Smuzhiyun 	sg_count /= chunk_size;
7718*4882a593Smuzhiyun 
7719*4882a593Smuzhiyun 	ofap = ctrl_info->pqi_ofa_mem_virt_addr;
7720*4882a593Smuzhiyun 
7721*4882a593Smuzhiyun 	if (sg_count*chunk_size < total_size)
7722*4882a593Smuzhiyun 		goto out;
7723*4882a593Smuzhiyun 
7724*4882a593Smuzhiyun 	ctrl_info->pqi_ofa_chunk_virt_addr =
7725*4882a593Smuzhiyun 				kcalloc(sg_count, sizeof(void *), GFP_KERNEL);
7726*4882a593Smuzhiyun 	if (!ctrl_info->pqi_ofa_chunk_virt_addr)
7727*4882a593Smuzhiyun 		goto out;
7728*4882a593Smuzhiyun 
7729*4882a593Smuzhiyun 	for (size = 0, i = 0; size < total_size; size += chunk_size, i++) {
7730*4882a593Smuzhiyun 		dma_addr_t dma_handle;
7731*4882a593Smuzhiyun 
7732*4882a593Smuzhiyun 		ctrl_info->pqi_ofa_chunk_virt_addr[i] =
7733*4882a593Smuzhiyun 			dma_alloc_coherent(dev, chunk_size, &dma_handle,
7734*4882a593Smuzhiyun 					   GFP_KERNEL);
7735*4882a593Smuzhiyun 
7736*4882a593Smuzhiyun 		if (!ctrl_info->pqi_ofa_chunk_virt_addr[i])
7737*4882a593Smuzhiyun 			break;
7738*4882a593Smuzhiyun 
7739*4882a593Smuzhiyun 		mem_descriptor = &ofap->sg_descriptor[i];
7740*4882a593Smuzhiyun 		put_unaligned_le64 ((u64) dma_handle, &mem_descriptor->address);
7741*4882a593Smuzhiyun 		put_unaligned_le32 (chunk_size, &mem_descriptor->length);
7742*4882a593Smuzhiyun 	}
7743*4882a593Smuzhiyun 
7744*4882a593Smuzhiyun 	if (!size || size < total_size)
7745*4882a593Smuzhiyun 		goto out_free_chunks;
7746*4882a593Smuzhiyun 
7747*4882a593Smuzhiyun 	put_unaligned_le32(CISS_SG_LAST, &mem_descriptor->flags);
7748*4882a593Smuzhiyun 	put_unaligned_le16(sg_count, &ofap->num_memory_descriptors);
7749*4882a593Smuzhiyun 	put_unaligned_le32(size, &ofap->bytes_allocated);
7750*4882a593Smuzhiyun 
7751*4882a593Smuzhiyun 	return 0;
7752*4882a593Smuzhiyun 
7753*4882a593Smuzhiyun out_free_chunks:
7754*4882a593Smuzhiyun 	while (--i >= 0) {
7755*4882a593Smuzhiyun 		mem_descriptor = &ofap->sg_descriptor[i];
7756*4882a593Smuzhiyun 		dma_free_coherent(dev, chunk_size,
7757*4882a593Smuzhiyun 				ctrl_info->pqi_ofa_chunk_virt_addr[i],
7758*4882a593Smuzhiyun 				get_unaligned_le64(&mem_descriptor->address));
7759*4882a593Smuzhiyun 	}
7760*4882a593Smuzhiyun 	kfree(ctrl_info->pqi_ofa_chunk_virt_addr);
7761*4882a593Smuzhiyun 
7762*4882a593Smuzhiyun out:
7763*4882a593Smuzhiyun 	put_unaligned_le32 (0, &ofap->bytes_allocated);
7764*4882a593Smuzhiyun 	return -ENOMEM;
7765*4882a593Smuzhiyun }
7766*4882a593Smuzhiyun 
pqi_ofa_alloc_host_buffer(struct pqi_ctrl_info * ctrl_info)7767*4882a593Smuzhiyun static int pqi_ofa_alloc_host_buffer(struct pqi_ctrl_info *ctrl_info)
7768*4882a593Smuzhiyun {
7769*4882a593Smuzhiyun 	u32 total_size;
7770*4882a593Smuzhiyun 	u32 min_chunk_size;
7771*4882a593Smuzhiyun 	u32 chunk_sz;
7772*4882a593Smuzhiyun 
7773*4882a593Smuzhiyun 	total_size = le32_to_cpu(
7774*4882a593Smuzhiyun 			ctrl_info->pqi_ofa_mem_virt_addr->bytes_allocated);
7775*4882a593Smuzhiyun 	min_chunk_size = total_size / PQI_OFA_MAX_SG_DESCRIPTORS;
7776*4882a593Smuzhiyun 
7777*4882a593Smuzhiyun 	for (chunk_sz = total_size; chunk_sz >= min_chunk_size; chunk_sz /= 2)
7778*4882a593Smuzhiyun 		if (!pqi_ofa_alloc_mem(ctrl_info, total_size, chunk_sz))
7779*4882a593Smuzhiyun 			return 0;
7780*4882a593Smuzhiyun 
7781*4882a593Smuzhiyun 	return -ENOMEM;
7782*4882a593Smuzhiyun }
7783*4882a593Smuzhiyun 
pqi_ofa_setup_host_buffer(struct pqi_ctrl_info * ctrl_info,u32 bytes_requested)7784*4882a593Smuzhiyun static void pqi_ofa_setup_host_buffer(struct pqi_ctrl_info *ctrl_info,
7785*4882a593Smuzhiyun 	u32 bytes_requested)
7786*4882a593Smuzhiyun {
7787*4882a593Smuzhiyun 	struct pqi_ofa_memory *pqi_ofa_memory;
7788*4882a593Smuzhiyun 	struct device *dev;
7789*4882a593Smuzhiyun 
7790*4882a593Smuzhiyun 	dev = &ctrl_info->pci_dev->dev;
7791*4882a593Smuzhiyun 	pqi_ofa_memory = dma_alloc_coherent(dev,
7792*4882a593Smuzhiyun 					    PQI_OFA_MEMORY_DESCRIPTOR_LENGTH,
7793*4882a593Smuzhiyun 					    &ctrl_info->pqi_ofa_mem_dma_handle,
7794*4882a593Smuzhiyun 					    GFP_KERNEL);
7795*4882a593Smuzhiyun 
7796*4882a593Smuzhiyun 	if (!pqi_ofa_memory)
7797*4882a593Smuzhiyun 		return;
7798*4882a593Smuzhiyun 
7799*4882a593Smuzhiyun 	put_unaligned_le16(PQI_OFA_VERSION, &pqi_ofa_memory->version);
7800*4882a593Smuzhiyun 	memcpy(&pqi_ofa_memory->signature, PQI_OFA_SIGNATURE,
7801*4882a593Smuzhiyun 					sizeof(pqi_ofa_memory->signature));
7802*4882a593Smuzhiyun 	pqi_ofa_memory->bytes_allocated = cpu_to_le32(bytes_requested);
7803*4882a593Smuzhiyun 
7804*4882a593Smuzhiyun 	ctrl_info->pqi_ofa_mem_virt_addr = pqi_ofa_memory;
7805*4882a593Smuzhiyun 
7806*4882a593Smuzhiyun 	if (pqi_ofa_alloc_host_buffer(ctrl_info) < 0) {
7807*4882a593Smuzhiyun 		dev_err(dev, "Failed to allocate host buffer of size = %u",
7808*4882a593Smuzhiyun 			bytes_requested);
7809*4882a593Smuzhiyun 	}
7810*4882a593Smuzhiyun 
7811*4882a593Smuzhiyun 	return;
7812*4882a593Smuzhiyun }
7813*4882a593Smuzhiyun 
pqi_ofa_free_host_buffer(struct pqi_ctrl_info * ctrl_info)7814*4882a593Smuzhiyun static void pqi_ofa_free_host_buffer(struct pqi_ctrl_info *ctrl_info)
7815*4882a593Smuzhiyun {
7816*4882a593Smuzhiyun 	int i;
7817*4882a593Smuzhiyun 	struct pqi_sg_descriptor *mem_descriptor;
7818*4882a593Smuzhiyun 	struct pqi_ofa_memory *ofap;
7819*4882a593Smuzhiyun 
7820*4882a593Smuzhiyun 	ofap = ctrl_info->pqi_ofa_mem_virt_addr;
7821*4882a593Smuzhiyun 
7822*4882a593Smuzhiyun 	if (!ofap)
7823*4882a593Smuzhiyun 		return;
7824*4882a593Smuzhiyun 
7825*4882a593Smuzhiyun 	if (!ofap->bytes_allocated)
7826*4882a593Smuzhiyun 		goto out;
7827*4882a593Smuzhiyun 
7828*4882a593Smuzhiyun 	mem_descriptor = ofap->sg_descriptor;
7829*4882a593Smuzhiyun 
7830*4882a593Smuzhiyun 	for (i = 0; i < get_unaligned_le16(&ofap->num_memory_descriptors);
7831*4882a593Smuzhiyun 		i++) {
7832*4882a593Smuzhiyun 		dma_free_coherent(&ctrl_info->pci_dev->dev,
7833*4882a593Smuzhiyun 			get_unaligned_le32(&mem_descriptor[i].length),
7834*4882a593Smuzhiyun 			ctrl_info->pqi_ofa_chunk_virt_addr[i],
7835*4882a593Smuzhiyun 			get_unaligned_le64(&mem_descriptor[i].address));
7836*4882a593Smuzhiyun 	}
7837*4882a593Smuzhiyun 	kfree(ctrl_info->pqi_ofa_chunk_virt_addr);
7838*4882a593Smuzhiyun 
7839*4882a593Smuzhiyun out:
7840*4882a593Smuzhiyun 	dma_free_coherent(&ctrl_info->pci_dev->dev,
7841*4882a593Smuzhiyun 			PQI_OFA_MEMORY_DESCRIPTOR_LENGTH, ofap,
7842*4882a593Smuzhiyun 			ctrl_info->pqi_ofa_mem_dma_handle);
7843*4882a593Smuzhiyun 	ctrl_info->pqi_ofa_mem_virt_addr = NULL;
7844*4882a593Smuzhiyun }
7845*4882a593Smuzhiyun 
pqi_ofa_host_memory_update(struct pqi_ctrl_info * ctrl_info)7846*4882a593Smuzhiyun static int pqi_ofa_host_memory_update(struct pqi_ctrl_info *ctrl_info)
7847*4882a593Smuzhiyun {
7848*4882a593Smuzhiyun 	struct pqi_vendor_general_request request;
7849*4882a593Smuzhiyun 	size_t size;
7850*4882a593Smuzhiyun 	struct pqi_ofa_memory *ofap;
7851*4882a593Smuzhiyun 
7852*4882a593Smuzhiyun 	memset(&request, 0, sizeof(request));
7853*4882a593Smuzhiyun 
7854*4882a593Smuzhiyun 	ofap = ctrl_info->pqi_ofa_mem_virt_addr;
7855*4882a593Smuzhiyun 
7856*4882a593Smuzhiyun 	request.header.iu_type = PQI_REQUEST_IU_VENDOR_GENERAL;
7857*4882a593Smuzhiyun 	put_unaligned_le16(sizeof(request) - PQI_REQUEST_HEADER_LENGTH,
7858*4882a593Smuzhiyun 		&request.header.iu_length);
7859*4882a593Smuzhiyun 	put_unaligned_le16(PQI_VENDOR_GENERAL_HOST_MEMORY_UPDATE,
7860*4882a593Smuzhiyun 		&request.function_code);
7861*4882a593Smuzhiyun 
7862*4882a593Smuzhiyun 	if (ofap) {
7863*4882a593Smuzhiyun 		size = offsetof(struct pqi_ofa_memory, sg_descriptor) +
7864*4882a593Smuzhiyun 			get_unaligned_le16(&ofap->num_memory_descriptors) *
7865*4882a593Smuzhiyun 			sizeof(struct pqi_sg_descriptor);
7866*4882a593Smuzhiyun 
7867*4882a593Smuzhiyun 		put_unaligned_le64((u64)ctrl_info->pqi_ofa_mem_dma_handle,
7868*4882a593Smuzhiyun 			&request.data.ofa_memory_allocation.buffer_address);
7869*4882a593Smuzhiyun 		put_unaligned_le32(size,
7870*4882a593Smuzhiyun 			&request.data.ofa_memory_allocation.buffer_length);
7871*4882a593Smuzhiyun 
7872*4882a593Smuzhiyun 	}
7873*4882a593Smuzhiyun 
7874*4882a593Smuzhiyun 	return pqi_submit_raid_request_synchronous(ctrl_info, &request.header,
7875*4882a593Smuzhiyun 		0, NULL, NO_TIMEOUT);
7876*4882a593Smuzhiyun }
7877*4882a593Smuzhiyun 
pqi_ofa_ctrl_restart(struct pqi_ctrl_info * ctrl_info)7878*4882a593Smuzhiyun static int pqi_ofa_ctrl_restart(struct pqi_ctrl_info *ctrl_info)
7879*4882a593Smuzhiyun {
7880*4882a593Smuzhiyun 	msleep(PQI_POST_RESET_DELAY_B4_MSGU_READY);
7881*4882a593Smuzhiyun 	return pqi_ctrl_init_resume(ctrl_info);
7882*4882a593Smuzhiyun }
7883*4882a593Smuzhiyun 
pqi_perform_lockup_action(void)7884*4882a593Smuzhiyun static void pqi_perform_lockup_action(void)
7885*4882a593Smuzhiyun {
7886*4882a593Smuzhiyun 	switch (pqi_lockup_action) {
7887*4882a593Smuzhiyun 	case PANIC:
7888*4882a593Smuzhiyun 		panic("FATAL: Smart Family Controller lockup detected");
7889*4882a593Smuzhiyun 		break;
7890*4882a593Smuzhiyun 	case REBOOT:
7891*4882a593Smuzhiyun 		emergency_restart();
7892*4882a593Smuzhiyun 		break;
7893*4882a593Smuzhiyun 	case NONE:
7894*4882a593Smuzhiyun 	default:
7895*4882a593Smuzhiyun 		break;
7896*4882a593Smuzhiyun 	}
7897*4882a593Smuzhiyun }
7898*4882a593Smuzhiyun 
7899*4882a593Smuzhiyun static struct pqi_raid_error_info pqi_ctrl_offline_raid_error_info = {
7900*4882a593Smuzhiyun 	.data_out_result = PQI_DATA_IN_OUT_HARDWARE_ERROR,
7901*4882a593Smuzhiyun 	.status = SAM_STAT_CHECK_CONDITION,
7902*4882a593Smuzhiyun };
7903*4882a593Smuzhiyun 
pqi_fail_all_outstanding_requests(struct pqi_ctrl_info * ctrl_info)7904*4882a593Smuzhiyun static void pqi_fail_all_outstanding_requests(struct pqi_ctrl_info *ctrl_info)
7905*4882a593Smuzhiyun {
7906*4882a593Smuzhiyun 	unsigned int i;
7907*4882a593Smuzhiyun 	struct pqi_io_request *io_request;
7908*4882a593Smuzhiyun 	struct scsi_cmnd *scmd;
7909*4882a593Smuzhiyun 
7910*4882a593Smuzhiyun 	for (i = 0; i < ctrl_info->max_io_slots; i++) {
7911*4882a593Smuzhiyun 		io_request = &ctrl_info->io_request_pool[i];
7912*4882a593Smuzhiyun 		if (atomic_read(&io_request->refcount) == 0)
7913*4882a593Smuzhiyun 			continue;
7914*4882a593Smuzhiyun 
7915*4882a593Smuzhiyun 		scmd = io_request->scmd;
7916*4882a593Smuzhiyun 		if (scmd) {
7917*4882a593Smuzhiyun 			set_host_byte(scmd, DID_NO_CONNECT);
7918*4882a593Smuzhiyun 		} else {
7919*4882a593Smuzhiyun 			io_request->status = -ENXIO;
7920*4882a593Smuzhiyun 			io_request->error_info =
7921*4882a593Smuzhiyun 				&pqi_ctrl_offline_raid_error_info;
7922*4882a593Smuzhiyun 		}
7923*4882a593Smuzhiyun 
7924*4882a593Smuzhiyun 		io_request->io_complete_callback(io_request,
7925*4882a593Smuzhiyun 			io_request->context);
7926*4882a593Smuzhiyun 	}
7927*4882a593Smuzhiyun }
7928*4882a593Smuzhiyun 
pqi_take_ctrl_offline_deferred(struct pqi_ctrl_info * ctrl_info)7929*4882a593Smuzhiyun static void pqi_take_ctrl_offline_deferred(struct pqi_ctrl_info *ctrl_info)
7930*4882a593Smuzhiyun {
7931*4882a593Smuzhiyun 	pqi_perform_lockup_action();
7932*4882a593Smuzhiyun 	pqi_stop_heartbeat_timer(ctrl_info);
7933*4882a593Smuzhiyun 	pqi_free_interrupts(ctrl_info);
7934*4882a593Smuzhiyun 	pqi_cancel_rescan_worker(ctrl_info);
7935*4882a593Smuzhiyun 	pqi_cancel_update_time_worker(ctrl_info);
7936*4882a593Smuzhiyun 	pqi_ctrl_wait_until_quiesced(ctrl_info);
7937*4882a593Smuzhiyun 	pqi_fail_all_outstanding_requests(ctrl_info);
7938*4882a593Smuzhiyun 	pqi_clear_all_queued_raid_bypass_retries(ctrl_info);
7939*4882a593Smuzhiyun 	pqi_ctrl_unblock_requests(ctrl_info);
7940*4882a593Smuzhiyun }
7941*4882a593Smuzhiyun 
pqi_ctrl_offline_worker(struct work_struct * work)7942*4882a593Smuzhiyun static void pqi_ctrl_offline_worker(struct work_struct *work)
7943*4882a593Smuzhiyun {
7944*4882a593Smuzhiyun 	struct pqi_ctrl_info *ctrl_info;
7945*4882a593Smuzhiyun 
7946*4882a593Smuzhiyun 	ctrl_info = container_of(work, struct pqi_ctrl_info, ctrl_offline_work);
7947*4882a593Smuzhiyun 	pqi_take_ctrl_offline_deferred(ctrl_info);
7948*4882a593Smuzhiyun }
7949*4882a593Smuzhiyun 
pqi_take_ctrl_offline(struct pqi_ctrl_info * ctrl_info)7950*4882a593Smuzhiyun static void pqi_take_ctrl_offline(struct pqi_ctrl_info *ctrl_info)
7951*4882a593Smuzhiyun {
7952*4882a593Smuzhiyun 	if (!ctrl_info->controller_online)
7953*4882a593Smuzhiyun 		return;
7954*4882a593Smuzhiyun 
7955*4882a593Smuzhiyun 	ctrl_info->controller_online = false;
7956*4882a593Smuzhiyun 	ctrl_info->pqi_mode_enabled = false;
7957*4882a593Smuzhiyun 	pqi_ctrl_block_requests(ctrl_info);
7958*4882a593Smuzhiyun 	if (!pqi_disable_ctrl_shutdown)
7959*4882a593Smuzhiyun 		sis_shutdown_ctrl(ctrl_info);
7960*4882a593Smuzhiyun 	pci_disable_device(ctrl_info->pci_dev);
7961*4882a593Smuzhiyun 	dev_err(&ctrl_info->pci_dev->dev, "controller offline\n");
7962*4882a593Smuzhiyun 	schedule_work(&ctrl_info->ctrl_offline_work);
7963*4882a593Smuzhiyun }
7964*4882a593Smuzhiyun 
pqi_print_ctrl_info(struct pci_dev * pci_dev,const struct pci_device_id * id)7965*4882a593Smuzhiyun static void pqi_print_ctrl_info(struct pci_dev *pci_dev,
7966*4882a593Smuzhiyun 	const struct pci_device_id *id)
7967*4882a593Smuzhiyun {
7968*4882a593Smuzhiyun 	char *ctrl_description;
7969*4882a593Smuzhiyun 
7970*4882a593Smuzhiyun 	if (id->driver_data)
7971*4882a593Smuzhiyun 		ctrl_description = (char *)id->driver_data;
7972*4882a593Smuzhiyun 	else
7973*4882a593Smuzhiyun 		ctrl_description = "Microsemi Smart Family Controller";
7974*4882a593Smuzhiyun 
7975*4882a593Smuzhiyun 	dev_info(&pci_dev->dev, "%s found\n", ctrl_description);
7976*4882a593Smuzhiyun }
7977*4882a593Smuzhiyun 
pqi_pci_probe(struct pci_dev * pci_dev,const struct pci_device_id * id)7978*4882a593Smuzhiyun static int pqi_pci_probe(struct pci_dev *pci_dev,
7979*4882a593Smuzhiyun 	const struct pci_device_id *id)
7980*4882a593Smuzhiyun {
7981*4882a593Smuzhiyun 	int rc;
7982*4882a593Smuzhiyun 	int node, cp_node;
7983*4882a593Smuzhiyun 	struct pqi_ctrl_info *ctrl_info;
7984*4882a593Smuzhiyun 
7985*4882a593Smuzhiyun 	pqi_print_ctrl_info(pci_dev, id);
7986*4882a593Smuzhiyun 
7987*4882a593Smuzhiyun 	if (pqi_disable_device_id_wildcards &&
7988*4882a593Smuzhiyun 		id->subvendor == PCI_ANY_ID &&
7989*4882a593Smuzhiyun 		id->subdevice == PCI_ANY_ID) {
7990*4882a593Smuzhiyun 		dev_warn(&pci_dev->dev,
7991*4882a593Smuzhiyun 			"controller not probed because device ID wildcards are disabled\n");
7992*4882a593Smuzhiyun 		return -ENODEV;
7993*4882a593Smuzhiyun 	}
7994*4882a593Smuzhiyun 
7995*4882a593Smuzhiyun 	if (id->subvendor == PCI_ANY_ID || id->subdevice == PCI_ANY_ID)
7996*4882a593Smuzhiyun 		dev_warn(&pci_dev->dev,
7997*4882a593Smuzhiyun 			"controller device ID matched using wildcards\n");
7998*4882a593Smuzhiyun 
7999*4882a593Smuzhiyun 	node = dev_to_node(&pci_dev->dev);
8000*4882a593Smuzhiyun 	if (node == NUMA_NO_NODE) {
8001*4882a593Smuzhiyun 		cp_node = cpu_to_node(0);
8002*4882a593Smuzhiyun 		if (cp_node == NUMA_NO_NODE)
8003*4882a593Smuzhiyun 			cp_node = 0;
8004*4882a593Smuzhiyun 		set_dev_node(&pci_dev->dev, cp_node);
8005*4882a593Smuzhiyun 	}
8006*4882a593Smuzhiyun 
8007*4882a593Smuzhiyun 	ctrl_info = pqi_alloc_ctrl_info(node);
8008*4882a593Smuzhiyun 	if (!ctrl_info) {
8009*4882a593Smuzhiyun 		dev_err(&pci_dev->dev,
8010*4882a593Smuzhiyun 			"failed to allocate controller info block\n");
8011*4882a593Smuzhiyun 		return -ENOMEM;
8012*4882a593Smuzhiyun 	}
8013*4882a593Smuzhiyun 
8014*4882a593Smuzhiyun 	ctrl_info->pci_dev = pci_dev;
8015*4882a593Smuzhiyun 
8016*4882a593Smuzhiyun 	rc = pqi_pci_init(ctrl_info);
8017*4882a593Smuzhiyun 	if (rc)
8018*4882a593Smuzhiyun 		goto error;
8019*4882a593Smuzhiyun 
8020*4882a593Smuzhiyun 	rc = pqi_ctrl_init(ctrl_info);
8021*4882a593Smuzhiyun 	if (rc)
8022*4882a593Smuzhiyun 		goto error;
8023*4882a593Smuzhiyun 
8024*4882a593Smuzhiyun 	return 0;
8025*4882a593Smuzhiyun 
8026*4882a593Smuzhiyun error:
8027*4882a593Smuzhiyun 	pqi_remove_ctrl(ctrl_info);
8028*4882a593Smuzhiyun 
8029*4882a593Smuzhiyun 	return rc;
8030*4882a593Smuzhiyun }
8031*4882a593Smuzhiyun 
pqi_pci_remove(struct pci_dev * pci_dev)8032*4882a593Smuzhiyun static void pqi_pci_remove(struct pci_dev *pci_dev)
8033*4882a593Smuzhiyun {
8034*4882a593Smuzhiyun 	struct pqi_ctrl_info *ctrl_info;
8035*4882a593Smuzhiyun 
8036*4882a593Smuzhiyun 	ctrl_info = pci_get_drvdata(pci_dev);
8037*4882a593Smuzhiyun 	if (!ctrl_info)
8038*4882a593Smuzhiyun 		return;
8039*4882a593Smuzhiyun 
8040*4882a593Smuzhiyun 	ctrl_info->in_shutdown = true;
8041*4882a593Smuzhiyun 
8042*4882a593Smuzhiyun 	pqi_remove_ctrl(ctrl_info);
8043*4882a593Smuzhiyun }
8044*4882a593Smuzhiyun 
pqi_crash_if_pending_command(struct pqi_ctrl_info * ctrl_info)8045*4882a593Smuzhiyun static void pqi_crash_if_pending_command(struct pqi_ctrl_info *ctrl_info)
8046*4882a593Smuzhiyun {
8047*4882a593Smuzhiyun 	unsigned int i;
8048*4882a593Smuzhiyun 	struct pqi_io_request *io_request;
8049*4882a593Smuzhiyun 	struct scsi_cmnd *scmd;
8050*4882a593Smuzhiyun 
8051*4882a593Smuzhiyun 	for (i = 0; i < ctrl_info->max_io_slots; i++) {
8052*4882a593Smuzhiyun 		io_request = &ctrl_info->io_request_pool[i];
8053*4882a593Smuzhiyun 		if (atomic_read(&io_request->refcount) == 0)
8054*4882a593Smuzhiyun 			continue;
8055*4882a593Smuzhiyun 		scmd = io_request->scmd;
8056*4882a593Smuzhiyun 		WARN_ON(scmd != NULL); /* IO command from SML */
8057*4882a593Smuzhiyun 		WARN_ON(scmd == NULL); /* Non-IO cmd or driver initiated*/
8058*4882a593Smuzhiyun 	}
8059*4882a593Smuzhiyun }
8060*4882a593Smuzhiyun 
pqi_shutdown(struct pci_dev * pci_dev)8061*4882a593Smuzhiyun static void pqi_shutdown(struct pci_dev *pci_dev)
8062*4882a593Smuzhiyun {
8063*4882a593Smuzhiyun 	int rc;
8064*4882a593Smuzhiyun 	struct pqi_ctrl_info *ctrl_info;
8065*4882a593Smuzhiyun 
8066*4882a593Smuzhiyun 	ctrl_info = pci_get_drvdata(pci_dev);
8067*4882a593Smuzhiyun 	if (!ctrl_info) {
8068*4882a593Smuzhiyun 		dev_err(&pci_dev->dev,
8069*4882a593Smuzhiyun 			"cache could not be flushed\n");
8070*4882a593Smuzhiyun 		return;
8071*4882a593Smuzhiyun 	}
8072*4882a593Smuzhiyun 
8073*4882a593Smuzhiyun 	pqi_disable_events(ctrl_info);
8074*4882a593Smuzhiyun 	pqi_wait_until_ofa_finished(ctrl_info);
8075*4882a593Smuzhiyun 	pqi_cancel_update_time_worker(ctrl_info);
8076*4882a593Smuzhiyun 	pqi_cancel_rescan_worker(ctrl_info);
8077*4882a593Smuzhiyun 	pqi_cancel_event_worker(ctrl_info);
8078*4882a593Smuzhiyun 
8079*4882a593Smuzhiyun 	pqi_ctrl_shutdown_start(ctrl_info);
8080*4882a593Smuzhiyun 	pqi_ctrl_wait_until_quiesced(ctrl_info);
8081*4882a593Smuzhiyun 
8082*4882a593Smuzhiyun 	rc = pqi_ctrl_wait_for_pending_io(ctrl_info, NO_TIMEOUT);
8083*4882a593Smuzhiyun 	if (rc) {
8084*4882a593Smuzhiyun 		dev_err(&pci_dev->dev,
8085*4882a593Smuzhiyun 			"wait for pending I/O failed\n");
8086*4882a593Smuzhiyun 		return;
8087*4882a593Smuzhiyun 	}
8088*4882a593Smuzhiyun 
8089*4882a593Smuzhiyun 	pqi_ctrl_block_device_reset(ctrl_info);
8090*4882a593Smuzhiyun 	pqi_wait_until_lun_reset_finished(ctrl_info);
8091*4882a593Smuzhiyun 
8092*4882a593Smuzhiyun 	/*
8093*4882a593Smuzhiyun 	 * Write all data in the controller's battery-backed cache to
8094*4882a593Smuzhiyun 	 * storage.
8095*4882a593Smuzhiyun 	 */
8096*4882a593Smuzhiyun 	rc = pqi_flush_cache(ctrl_info, SHUTDOWN);
8097*4882a593Smuzhiyun 	if (rc)
8098*4882a593Smuzhiyun 		dev_err(&pci_dev->dev,
8099*4882a593Smuzhiyun 			"unable to flush controller cache\n");
8100*4882a593Smuzhiyun 
8101*4882a593Smuzhiyun 	pqi_ctrl_block_requests(ctrl_info);
8102*4882a593Smuzhiyun 
8103*4882a593Smuzhiyun 	rc = pqi_ctrl_wait_for_pending_sync_cmds(ctrl_info);
8104*4882a593Smuzhiyun 	if (rc) {
8105*4882a593Smuzhiyun 		dev_err(&pci_dev->dev,
8106*4882a593Smuzhiyun 			"wait for pending sync cmds failed\n");
8107*4882a593Smuzhiyun 		return;
8108*4882a593Smuzhiyun 	}
8109*4882a593Smuzhiyun 
8110*4882a593Smuzhiyun 	pqi_crash_if_pending_command(ctrl_info);
8111*4882a593Smuzhiyun 	pqi_reset(ctrl_info);
8112*4882a593Smuzhiyun }
8113*4882a593Smuzhiyun 
pqi_process_lockup_action_param(void)8114*4882a593Smuzhiyun static void pqi_process_lockup_action_param(void)
8115*4882a593Smuzhiyun {
8116*4882a593Smuzhiyun 	unsigned int i;
8117*4882a593Smuzhiyun 
8118*4882a593Smuzhiyun 	if (!pqi_lockup_action_param)
8119*4882a593Smuzhiyun 		return;
8120*4882a593Smuzhiyun 
8121*4882a593Smuzhiyun 	for (i = 0; i < ARRAY_SIZE(pqi_lockup_actions); i++) {
8122*4882a593Smuzhiyun 		if (strcmp(pqi_lockup_action_param,
8123*4882a593Smuzhiyun 			pqi_lockup_actions[i].name) == 0) {
8124*4882a593Smuzhiyun 			pqi_lockup_action = pqi_lockup_actions[i].action;
8125*4882a593Smuzhiyun 			return;
8126*4882a593Smuzhiyun 		}
8127*4882a593Smuzhiyun 	}
8128*4882a593Smuzhiyun 
8129*4882a593Smuzhiyun 	pr_warn("%s: invalid lockup action setting \"%s\" - supported settings: none, reboot, panic\n",
8130*4882a593Smuzhiyun 		DRIVER_NAME_SHORT, pqi_lockup_action_param);
8131*4882a593Smuzhiyun }
8132*4882a593Smuzhiyun 
pqi_process_module_params(void)8133*4882a593Smuzhiyun static void pqi_process_module_params(void)
8134*4882a593Smuzhiyun {
8135*4882a593Smuzhiyun 	pqi_process_lockup_action_param();
8136*4882a593Smuzhiyun }
8137*4882a593Smuzhiyun 
pqi_suspend(struct pci_dev * pci_dev,pm_message_t state)8138*4882a593Smuzhiyun static __maybe_unused int pqi_suspend(struct pci_dev *pci_dev, pm_message_t state)
8139*4882a593Smuzhiyun {
8140*4882a593Smuzhiyun 	struct pqi_ctrl_info *ctrl_info;
8141*4882a593Smuzhiyun 
8142*4882a593Smuzhiyun 	ctrl_info = pci_get_drvdata(pci_dev);
8143*4882a593Smuzhiyun 
8144*4882a593Smuzhiyun 	pqi_disable_events(ctrl_info);
8145*4882a593Smuzhiyun 	pqi_cancel_update_time_worker(ctrl_info);
8146*4882a593Smuzhiyun 	pqi_cancel_rescan_worker(ctrl_info);
8147*4882a593Smuzhiyun 	pqi_wait_until_scan_finished(ctrl_info);
8148*4882a593Smuzhiyun 	pqi_wait_until_lun_reset_finished(ctrl_info);
8149*4882a593Smuzhiyun 	pqi_wait_until_ofa_finished(ctrl_info);
8150*4882a593Smuzhiyun 	pqi_flush_cache(ctrl_info, SUSPEND);
8151*4882a593Smuzhiyun 	pqi_ctrl_block_requests(ctrl_info);
8152*4882a593Smuzhiyun 	pqi_ctrl_wait_until_quiesced(ctrl_info);
8153*4882a593Smuzhiyun 	pqi_wait_until_inbound_queues_empty(ctrl_info);
8154*4882a593Smuzhiyun 	pqi_ctrl_wait_for_pending_io(ctrl_info, NO_TIMEOUT);
8155*4882a593Smuzhiyun 	pqi_stop_heartbeat_timer(ctrl_info);
8156*4882a593Smuzhiyun 
8157*4882a593Smuzhiyun 	if (state.event == PM_EVENT_FREEZE)
8158*4882a593Smuzhiyun 		return 0;
8159*4882a593Smuzhiyun 
8160*4882a593Smuzhiyun 	pci_save_state(pci_dev);
8161*4882a593Smuzhiyun 	pci_set_power_state(pci_dev, pci_choose_state(pci_dev, state));
8162*4882a593Smuzhiyun 
8163*4882a593Smuzhiyun 	ctrl_info->controller_online = false;
8164*4882a593Smuzhiyun 	ctrl_info->pqi_mode_enabled = false;
8165*4882a593Smuzhiyun 
8166*4882a593Smuzhiyun 	return 0;
8167*4882a593Smuzhiyun }
8168*4882a593Smuzhiyun 
pqi_resume(struct pci_dev * pci_dev)8169*4882a593Smuzhiyun static __maybe_unused int pqi_resume(struct pci_dev *pci_dev)
8170*4882a593Smuzhiyun {
8171*4882a593Smuzhiyun 	int rc;
8172*4882a593Smuzhiyun 	struct pqi_ctrl_info *ctrl_info;
8173*4882a593Smuzhiyun 
8174*4882a593Smuzhiyun 	ctrl_info = pci_get_drvdata(pci_dev);
8175*4882a593Smuzhiyun 
8176*4882a593Smuzhiyun 	if (pci_dev->current_state != PCI_D0) {
8177*4882a593Smuzhiyun 		ctrl_info->max_hw_queue_index = 0;
8178*4882a593Smuzhiyun 		pqi_free_interrupts(ctrl_info);
8179*4882a593Smuzhiyun 		pqi_change_irq_mode(ctrl_info, IRQ_MODE_INTX);
8180*4882a593Smuzhiyun 		rc = request_irq(pci_irq_vector(pci_dev, 0), pqi_irq_handler,
8181*4882a593Smuzhiyun 			IRQF_SHARED, DRIVER_NAME_SHORT,
8182*4882a593Smuzhiyun 			&ctrl_info->queue_groups[0]);
8183*4882a593Smuzhiyun 		if (rc) {
8184*4882a593Smuzhiyun 			dev_err(&ctrl_info->pci_dev->dev,
8185*4882a593Smuzhiyun 				"irq %u init failed with error %d\n",
8186*4882a593Smuzhiyun 				pci_dev->irq, rc);
8187*4882a593Smuzhiyun 			return rc;
8188*4882a593Smuzhiyun 		}
8189*4882a593Smuzhiyun 		pqi_start_heartbeat_timer(ctrl_info);
8190*4882a593Smuzhiyun 		pqi_ctrl_unblock_requests(ctrl_info);
8191*4882a593Smuzhiyun 		return 0;
8192*4882a593Smuzhiyun 	}
8193*4882a593Smuzhiyun 
8194*4882a593Smuzhiyun 	pci_set_power_state(pci_dev, PCI_D0);
8195*4882a593Smuzhiyun 	pci_restore_state(pci_dev);
8196*4882a593Smuzhiyun 
8197*4882a593Smuzhiyun 	return pqi_ctrl_init_resume(ctrl_info);
8198*4882a593Smuzhiyun }
8199*4882a593Smuzhiyun 
8200*4882a593Smuzhiyun /* Define the PCI IDs for the controllers that we support. */
8201*4882a593Smuzhiyun static const struct pci_device_id pqi_pci_id_table[] = {
8202*4882a593Smuzhiyun 	{
8203*4882a593Smuzhiyun 		PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
8204*4882a593Smuzhiyun 			       0x105b, 0x1211)
8205*4882a593Smuzhiyun 	},
8206*4882a593Smuzhiyun 	{
8207*4882a593Smuzhiyun 		PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
8208*4882a593Smuzhiyun 			       0x105b, 0x1321)
8209*4882a593Smuzhiyun 	},
8210*4882a593Smuzhiyun 	{
8211*4882a593Smuzhiyun 		PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
8212*4882a593Smuzhiyun 			       0x152d, 0x8a22)
8213*4882a593Smuzhiyun 	},
8214*4882a593Smuzhiyun 	{
8215*4882a593Smuzhiyun 		PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
8216*4882a593Smuzhiyun 			       0x152d, 0x8a23)
8217*4882a593Smuzhiyun 	},
8218*4882a593Smuzhiyun 	{
8219*4882a593Smuzhiyun 		PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
8220*4882a593Smuzhiyun 			       0x152d, 0x8a24)
8221*4882a593Smuzhiyun 	},
8222*4882a593Smuzhiyun 	{
8223*4882a593Smuzhiyun 		PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
8224*4882a593Smuzhiyun 			       0x152d, 0x8a36)
8225*4882a593Smuzhiyun 	},
8226*4882a593Smuzhiyun 	{
8227*4882a593Smuzhiyun 		PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
8228*4882a593Smuzhiyun 			       0x152d, 0x8a37)
8229*4882a593Smuzhiyun 	},
8230*4882a593Smuzhiyun 	{
8231*4882a593Smuzhiyun 		PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
8232*4882a593Smuzhiyun 			       0x193d, 0x8460)
8233*4882a593Smuzhiyun 	},
8234*4882a593Smuzhiyun 	{
8235*4882a593Smuzhiyun 		PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
8236*4882a593Smuzhiyun 			       0x193d, 0x1104)
8237*4882a593Smuzhiyun 	},
8238*4882a593Smuzhiyun 	{
8239*4882a593Smuzhiyun 		PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
8240*4882a593Smuzhiyun 			       0x193d, 0x1105)
8241*4882a593Smuzhiyun 	},
8242*4882a593Smuzhiyun 	{
8243*4882a593Smuzhiyun 		PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
8244*4882a593Smuzhiyun 			       0x193d, 0x1106)
8245*4882a593Smuzhiyun 	},
8246*4882a593Smuzhiyun 	{
8247*4882a593Smuzhiyun 		PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
8248*4882a593Smuzhiyun 			       0x193d, 0x1107)
8249*4882a593Smuzhiyun 	},
8250*4882a593Smuzhiyun 	{
8251*4882a593Smuzhiyun 		PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
8252*4882a593Smuzhiyun 			       0x193d, 0x8460)
8253*4882a593Smuzhiyun 	},
8254*4882a593Smuzhiyun 	{
8255*4882a593Smuzhiyun 		PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
8256*4882a593Smuzhiyun 			       0x193d, 0x8461)
8257*4882a593Smuzhiyun 	},
8258*4882a593Smuzhiyun 	{
8259*4882a593Smuzhiyun 		PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
8260*4882a593Smuzhiyun 			       0x193d, 0xc460)
8261*4882a593Smuzhiyun 	},
8262*4882a593Smuzhiyun 	{
8263*4882a593Smuzhiyun 		PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
8264*4882a593Smuzhiyun 			       0x193d, 0xc461)
8265*4882a593Smuzhiyun 	},
8266*4882a593Smuzhiyun 	{
8267*4882a593Smuzhiyun 		PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
8268*4882a593Smuzhiyun 			       0x193d, 0xf460)
8269*4882a593Smuzhiyun 	},
8270*4882a593Smuzhiyun 	{
8271*4882a593Smuzhiyun 		PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
8272*4882a593Smuzhiyun 			       0x193d, 0xf461)
8273*4882a593Smuzhiyun 	},
8274*4882a593Smuzhiyun 	{
8275*4882a593Smuzhiyun 		PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
8276*4882a593Smuzhiyun 			       0x1bd4, 0x0045)
8277*4882a593Smuzhiyun 	},
8278*4882a593Smuzhiyun 	{
8279*4882a593Smuzhiyun 		PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
8280*4882a593Smuzhiyun 			       0x1bd4, 0x0046)
8281*4882a593Smuzhiyun 	},
8282*4882a593Smuzhiyun 	{
8283*4882a593Smuzhiyun 		PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
8284*4882a593Smuzhiyun 			       0x1bd4, 0x0047)
8285*4882a593Smuzhiyun 	},
8286*4882a593Smuzhiyun 	{
8287*4882a593Smuzhiyun 		PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
8288*4882a593Smuzhiyun 			       0x1bd4, 0x0048)
8289*4882a593Smuzhiyun 	},
8290*4882a593Smuzhiyun 	{
8291*4882a593Smuzhiyun 		PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
8292*4882a593Smuzhiyun 			       0x1bd4, 0x004a)
8293*4882a593Smuzhiyun 	},
8294*4882a593Smuzhiyun 	{
8295*4882a593Smuzhiyun 		PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
8296*4882a593Smuzhiyun 			       0x1bd4, 0x004b)
8297*4882a593Smuzhiyun 	},
8298*4882a593Smuzhiyun 	{
8299*4882a593Smuzhiyun 		PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
8300*4882a593Smuzhiyun 			       0x1bd4, 0x004c)
8301*4882a593Smuzhiyun 	},
8302*4882a593Smuzhiyun 	{
8303*4882a593Smuzhiyun 		PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
8304*4882a593Smuzhiyun 			       0x1bd4, 0x004f)
8305*4882a593Smuzhiyun 	},
8306*4882a593Smuzhiyun 	{
8307*4882a593Smuzhiyun 		PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
8308*4882a593Smuzhiyun 			       0x1bd4, 0x0051)
8309*4882a593Smuzhiyun 	},
8310*4882a593Smuzhiyun 	{
8311*4882a593Smuzhiyun 		PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
8312*4882a593Smuzhiyun 			       0x1bd4, 0x0052)
8313*4882a593Smuzhiyun 	},
8314*4882a593Smuzhiyun 	{
8315*4882a593Smuzhiyun 		PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
8316*4882a593Smuzhiyun 			       0x1bd4, 0x0053)
8317*4882a593Smuzhiyun 	},
8318*4882a593Smuzhiyun 	{
8319*4882a593Smuzhiyun 		PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
8320*4882a593Smuzhiyun 			       0x1bd4, 0x0054)
8321*4882a593Smuzhiyun 	},
8322*4882a593Smuzhiyun 	{
8323*4882a593Smuzhiyun 		PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
8324*4882a593Smuzhiyun 			       0x19e5, 0xd227)
8325*4882a593Smuzhiyun 	},
8326*4882a593Smuzhiyun 	{
8327*4882a593Smuzhiyun 		PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
8328*4882a593Smuzhiyun 			       0x19e5, 0xd228)
8329*4882a593Smuzhiyun 	},
8330*4882a593Smuzhiyun 	{
8331*4882a593Smuzhiyun 		PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
8332*4882a593Smuzhiyun 			       0x19e5, 0xd229)
8333*4882a593Smuzhiyun 	},
8334*4882a593Smuzhiyun 	{
8335*4882a593Smuzhiyun 		PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
8336*4882a593Smuzhiyun 			       0x19e5, 0xd22a)
8337*4882a593Smuzhiyun 	},
8338*4882a593Smuzhiyun 	{
8339*4882a593Smuzhiyun 		PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
8340*4882a593Smuzhiyun 			       0x19e5, 0xd22b)
8341*4882a593Smuzhiyun 	},
8342*4882a593Smuzhiyun 	{
8343*4882a593Smuzhiyun 		PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
8344*4882a593Smuzhiyun 			       0x19e5, 0xd22c)
8345*4882a593Smuzhiyun 	},
8346*4882a593Smuzhiyun 	{
8347*4882a593Smuzhiyun 		PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
8348*4882a593Smuzhiyun 			       PCI_VENDOR_ID_ADAPTEC2, 0x0110)
8349*4882a593Smuzhiyun 	},
8350*4882a593Smuzhiyun 	{
8351*4882a593Smuzhiyun 		PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
8352*4882a593Smuzhiyun 			       PCI_VENDOR_ID_ADAPTEC2, 0x0608)
8353*4882a593Smuzhiyun 	},
8354*4882a593Smuzhiyun 	{
8355*4882a593Smuzhiyun 		PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
8356*4882a593Smuzhiyun 			       PCI_VENDOR_ID_ADAPTEC2, 0x0800)
8357*4882a593Smuzhiyun 	},
8358*4882a593Smuzhiyun 	{
8359*4882a593Smuzhiyun 		PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
8360*4882a593Smuzhiyun 			       PCI_VENDOR_ID_ADAPTEC2, 0x0801)
8361*4882a593Smuzhiyun 	},
8362*4882a593Smuzhiyun 	{
8363*4882a593Smuzhiyun 		PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
8364*4882a593Smuzhiyun 			       PCI_VENDOR_ID_ADAPTEC2, 0x0802)
8365*4882a593Smuzhiyun 	},
8366*4882a593Smuzhiyun 	{
8367*4882a593Smuzhiyun 		PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
8368*4882a593Smuzhiyun 			       PCI_VENDOR_ID_ADAPTEC2, 0x0803)
8369*4882a593Smuzhiyun 	},
8370*4882a593Smuzhiyun 	{
8371*4882a593Smuzhiyun 		PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
8372*4882a593Smuzhiyun 			       PCI_VENDOR_ID_ADAPTEC2, 0x0804)
8373*4882a593Smuzhiyun 	},
8374*4882a593Smuzhiyun 	{
8375*4882a593Smuzhiyun 		PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
8376*4882a593Smuzhiyun 			       PCI_VENDOR_ID_ADAPTEC2, 0x0805)
8377*4882a593Smuzhiyun 	},
8378*4882a593Smuzhiyun 	{
8379*4882a593Smuzhiyun 		PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
8380*4882a593Smuzhiyun 			       PCI_VENDOR_ID_ADAPTEC2, 0x0806)
8381*4882a593Smuzhiyun 	},
8382*4882a593Smuzhiyun 	{
8383*4882a593Smuzhiyun 		PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
8384*4882a593Smuzhiyun 			       PCI_VENDOR_ID_ADAPTEC2, 0x0807)
8385*4882a593Smuzhiyun 	},
8386*4882a593Smuzhiyun 	{
8387*4882a593Smuzhiyun 		PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
8388*4882a593Smuzhiyun 			       PCI_VENDOR_ID_ADAPTEC2, 0x0808)
8389*4882a593Smuzhiyun 	},
8390*4882a593Smuzhiyun 	{
8391*4882a593Smuzhiyun 		PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
8392*4882a593Smuzhiyun 			       PCI_VENDOR_ID_ADAPTEC2, 0x0809)
8393*4882a593Smuzhiyun 	},
8394*4882a593Smuzhiyun 	{
8395*4882a593Smuzhiyun 		PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
8396*4882a593Smuzhiyun 			       PCI_VENDOR_ID_ADAPTEC2, 0x080a)
8397*4882a593Smuzhiyun 	},
8398*4882a593Smuzhiyun 	{
8399*4882a593Smuzhiyun 		PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
8400*4882a593Smuzhiyun 			       PCI_VENDOR_ID_ADAPTEC2, 0x0900)
8401*4882a593Smuzhiyun 	},
8402*4882a593Smuzhiyun 	{
8403*4882a593Smuzhiyun 		PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
8404*4882a593Smuzhiyun 			       PCI_VENDOR_ID_ADAPTEC2, 0x0901)
8405*4882a593Smuzhiyun 	},
8406*4882a593Smuzhiyun 	{
8407*4882a593Smuzhiyun 		PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
8408*4882a593Smuzhiyun 			       PCI_VENDOR_ID_ADAPTEC2, 0x0902)
8409*4882a593Smuzhiyun 	},
8410*4882a593Smuzhiyun 	{
8411*4882a593Smuzhiyun 		PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
8412*4882a593Smuzhiyun 			       PCI_VENDOR_ID_ADAPTEC2, 0x0903)
8413*4882a593Smuzhiyun 	},
8414*4882a593Smuzhiyun 	{
8415*4882a593Smuzhiyun 		PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
8416*4882a593Smuzhiyun 			       PCI_VENDOR_ID_ADAPTEC2, 0x0904)
8417*4882a593Smuzhiyun 	},
8418*4882a593Smuzhiyun 	{
8419*4882a593Smuzhiyun 		PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
8420*4882a593Smuzhiyun 			       PCI_VENDOR_ID_ADAPTEC2, 0x0905)
8421*4882a593Smuzhiyun 	},
8422*4882a593Smuzhiyun 	{
8423*4882a593Smuzhiyun 		PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
8424*4882a593Smuzhiyun 			       PCI_VENDOR_ID_ADAPTEC2, 0x0906)
8425*4882a593Smuzhiyun 	},
8426*4882a593Smuzhiyun 	{
8427*4882a593Smuzhiyun 		PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
8428*4882a593Smuzhiyun 			       PCI_VENDOR_ID_ADAPTEC2, 0x0907)
8429*4882a593Smuzhiyun 	},
8430*4882a593Smuzhiyun 	{
8431*4882a593Smuzhiyun 		PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
8432*4882a593Smuzhiyun 			       PCI_VENDOR_ID_ADAPTEC2, 0x0908)
8433*4882a593Smuzhiyun 	},
8434*4882a593Smuzhiyun 	{
8435*4882a593Smuzhiyun 		PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
8436*4882a593Smuzhiyun 			       PCI_VENDOR_ID_ADAPTEC2, 0x090a)
8437*4882a593Smuzhiyun 	},
8438*4882a593Smuzhiyun 	{
8439*4882a593Smuzhiyun 		PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
8440*4882a593Smuzhiyun 			       PCI_VENDOR_ID_ADAPTEC2, 0x1200)
8441*4882a593Smuzhiyun 	},
8442*4882a593Smuzhiyun 	{
8443*4882a593Smuzhiyun 		PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
8444*4882a593Smuzhiyun 			       PCI_VENDOR_ID_ADAPTEC2, 0x1201)
8445*4882a593Smuzhiyun 	},
8446*4882a593Smuzhiyun 	{
8447*4882a593Smuzhiyun 		PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
8448*4882a593Smuzhiyun 			       PCI_VENDOR_ID_ADAPTEC2, 0x1202)
8449*4882a593Smuzhiyun 	},
8450*4882a593Smuzhiyun 	{
8451*4882a593Smuzhiyun 		PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
8452*4882a593Smuzhiyun 			       PCI_VENDOR_ID_ADAPTEC2, 0x1280)
8453*4882a593Smuzhiyun 	},
8454*4882a593Smuzhiyun 	{
8455*4882a593Smuzhiyun 		PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
8456*4882a593Smuzhiyun 			       PCI_VENDOR_ID_ADAPTEC2, 0x1281)
8457*4882a593Smuzhiyun 	},
8458*4882a593Smuzhiyun 	{
8459*4882a593Smuzhiyun 		PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
8460*4882a593Smuzhiyun 			       PCI_VENDOR_ID_ADAPTEC2, 0x1282)
8461*4882a593Smuzhiyun 	},
8462*4882a593Smuzhiyun 	{
8463*4882a593Smuzhiyun 		PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
8464*4882a593Smuzhiyun 			       PCI_VENDOR_ID_ADAPTEC2, 0x1300)
8465*4882a593Smuzhiyun 	},
8466*4882a593Smuzhiyun 	{
8467*4882a593Smuzhiyun 		PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
8468*4882a593Smuzhiyun 			       PCI_VENDOR_ID_ADAPTEC2, 0x1301)
8469*4882a593Smuzhiyun 	},
8470*4882a593Smuzhiyun 	{
8471*4882a593Smuzhiyun 		PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
8472*4882a593Smuzhiyun 			       PCI_VENDOR_ID_ADAPTEC2, 0x1302)
8473*4882a593Smuzhiyun 	},
8474*4882a593Smuzhiyun 	{
8475*4882a593Smuzhiyun 		PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
8476*4882a593Smuzhiyun 			       PCI_VENDOR_ID_ADAPTEC2, 0x1303)
8477*4882a593Smuzhiyun 	},
8478*4882a593Smuzhiyun 	{
8479*4882a593Smuzhiyun 		PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
8480*4882a593Smuzhiyun 			       PCI_VENDOR_ID_ADAPTEC2, 0x1380)
8481*4882a593Smuzhiyun 	},
8482*4882a593Smuzhiyun 	{
8483*4882a593Smuzhiyun 		PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
8484*4882a593Smuzhiyun 			       PCI_VENDOR_ID_ADAPTEC2, 0x1400)
8485*4882a593Smuzhiyun 	},
8486*4882a593Smuzhiyun 	{
8487*4882a593Smuzhiyun 		PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
8488*4882a593Smuzhiyun 			       PCI_VENDOR_ID_ADAPTEC2, 0x1402)
8489*4882a593Smuzhiyun 	},
8490*4882a593Smuzhiyun 	{
8491*4882a593Smuzhiyun 		PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
8492*4882a593Smuzhiyun 			       PCI_VENDOR_ID_ADAPTEC2, 0x1410)
8493*4882a593Smuzhiyun 	},
8494*4882a593Smuzhiyun 	{
8495*4882a593Smuzhiyun 		PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
8496*4882a593Smuzhiyun 			       PCI_VENDOR_ID_ADAPTEC2, 0x1411)
8497*4882a593Smuzhiyun 	},
8498*4882a593Smuzhiyun 	{
8499*4882a593Smuzhiyun 		PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
8500*4882a593Smuzhiyun 			       PCI_VENDOR_ID_ADAPTEC2, 0x1412)
8501*4882a593Smuzhiyun 	},
8502*4882a593Smuzhiyun 	{
8503*4882a593Smuzhiyun 		PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
8504*4882a593Smuzhiyun 			       PCI_VENDOR_ID_ADAPTEC2, 0x1420)
8505*4882a593Smuzhiyun 	},
8506*4882a593Smuzhiyun 	{
8507*4882a593Smuzhiyun 		PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
8508*4882a593Smuzhiyun 			       PCI_VENDOR_ID_ADAPTEC2, 0x1430)
8509*4882a593Smuzhiyun 	},
8510*4882a593Smuzhiyun 	{
8511*4882a593Smuzhiyun 		PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
8512*4882a593Smuzhiyun 			       PCI_VENDOR_ID_ADAPTEC2, 0x1440)
8513*4882a593Smuzhiyun 	},
8514*4882a593Smuzhiyun 	{
8515*4882a593Smuzhiyun 		PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
8516*4882a593Smuzhiyun 			       PCI_VENDOR_ID_ADAPTEC2, 0x1441)
8517*4882a593Smuzhiyun 	},
8518*4882a593Smuzhiyun 	{
8519*4882a593Smuzhiyun 		PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
8520*4882a593Smuzhiyun 			       PCI_VENDOR_ID_ADAPTEC2, 0x1450)
8521*4882a593Smuzhiyun 	},
8522*4882a593Smuzhiyun 	{
8523*4882a593Smuzhiyun 		PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
8524*4882a593Smuzhiyun 			       PCI_VENDOR_ID_ADAPTEC2, 0x1452)
8525*4882a593Smuzhiyun 	},
8526*4882a593Smuzhiyun 	{
8527*4882a593Smuzhiyun 		PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
8528*4882a593Smuzhiyun 			       PCI_VENDOR_ID_ADAPTEC2, 0x1460)
8529*4882a593Smuzhiyun 	},
8530*4882a593Smuzhiyun 	{
8531*4882a593Smuzhiyun 		PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
8532*4882a593Smuzhiyun 			       PCI_VENDOR_ID_ADAPTEC2, 0x1461)
8533*4882a593Smuzhiyun 	},
8534*4882a593Smuzhiyun 	{
8535*4882a593Smuzhiyun 		PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
8536*4882a593Smuzhiyun 			       PCI_VENDOR_ID_ADAPTEC2, 0x1462)
8537*4882a593Smuzhiyun 	},
8538*4882a593Smuzhiyun 	{
8539*4882a593Smuzhiyun 		PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
8540*4882a593Smuzhiyun 			       PCI_VENDOR_ID_ADAPTEC2, 0x1470)
8541*4882a593Smuzhiyun 	},
8542*4882a593Smuzhiyun 	{
8543*4882a593Smuzhiyun 		PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
8544*4882a593Smuzhiyun 			       PCI_VENDOR_ID_ADAPTEC2, 0x1471)
8545*4882a593Smuzhiyun 	},
8546*4882a593Smuzhiyun 	{
8547*4882a593Smuzhiyun 		PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
8548*4882a593Smuzhiyun 			       PCI_VENDOR_ID_ADAPTEC2, 0x1472)
8549*4882a593Smuzhiyun 	},
8550*4882a593Smuzhiyun 	{
8551*4882a593Smuzhiyun 		PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
8552*4882a593Smuzhiyun 			       PCI_VENDOR_ID_ADAPTEC2, 0x1480)
8553*4882a593Smuzhiyun 	},
8554*4882a593Smuzhiyun 	{
8555*4882a593Smuzhiyun 		PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
8556*4882a593Smuzhiyun 			       PCI_VENDOR_ID_ADAPTEC2, 0x1490)
8557*4882a593Smuzhiyun 	},
8558*4882a593Smuzhiyun 	{
8559*4882a593Smuzhiyun 		PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
8560*4882a593Smuzhiyun 			       PCI_VENDOR_ID_ADAPTEC2, 0x1491)
8561*4882a593Smuzhiyun 	},
8562*4882a593Smuzhiyun 	{
8563*4882a593Smuzhiyun 		PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
8564*4882a593Smuzhiyun 			       PCI_VENDOR_ID_ADAPTEC2, 0x14a0)
8565*4882a593Smuzhiyun 	},
8566*4882a593Smuzhiyun 	{
8567*4882a593Smuzhiyun 		PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
8568*4882a593Smuzhiyun 			       PCI_VENDOR_ID_ADAPTEC2, 0x14a1)
8569*4882a593Smuzhiyun 	},
8570*4882a593Smuzhiyun 	{
8571*4882a593Smuzhiyun 		PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
8572*4882a593Smuzhiyun 			       PCI_VENDOR_ID_ADAPTEC2, 0x14b0)
8573*4882a593Smuzhiyun 	},
8574*4882a593Smuzhiyun 	{
8575*4882a593Smuzhiyun 		PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
8576*4882a593Smuzhiyun 			       PCI_VENDOR_ID_ADAPTEC2, 0x14b1)
8577*4882a593Smuzhiyun 	},
8578*4882a593Smuzhiyun 	{
8579*4882a593Smuzhiyun 		PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
8580*4882a593Smuzhiyun 			       PCI_VENDOR_ID_ADAPTEC2, 0x14c0)
8581*4882a593Smuzhiyun 	},
8582*4882a593Smuzhiyun 	{
8583*4882a593Smuzhiyun 		PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
8584*4882a593Smuzhiyun 			       PCI_VENDOR_ID_ADAPTEC2, 0x14c1)
8585*4882a593Smuzhiyun 	},
8586*4882a593Smuzhiyun 	{
8587*4882a593Smuzhiyun 		PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
8588*4882a593Smuzhiyun 			       PCI_VENDOR_ID_ADAPTEC2, 0x14d0)
8589*4882a593Smuzhiyun 	},
8590*4882a593Smuzhiyun 	{
8591*4882a593Smuzhiyun 		PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
8592*4882a593Smuzhiyun 			       PCI_VENDOR_ID_ADAPTEC2, 0x14e0)
8593*4882a593Smuzhiyun 	},
8594*4882a593Smuzhiyun 	{
8595*4882a593Smuzhiyun 		PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
8596*4882a593Smuzhiyun 			       PCI_VENDOR_ID_ADAPTEC2, 0x14f0)
8597*4882a593Smuzhiyun 	},
8598*4882a593Smuzhiyun 	{
8599*4882a593Smuzhiyun 		PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
8600*4882a593Smuzhiyun 			       PCI_VENDOR_ID_ADVANTECH, 0x8312)
8601*4882a593Smuzhiyun 	},
8602*4882a593Smuzhiyun 	{
8603*4882a593Smuzhiyun 		PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
8604*4882a593Smuzhiyun 			       PCI_VENDOR_ID_DELL, 0x1fe0)
8605*4882a593Smuzhiyun 	},
8606*4882a593Smuzhiyun 	{
8607*4882a593Smuzhiyun 		PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
8608*4882a593Smuzhiyun 			       PCI_VENDOR_ID_HP, 0x0600)
8609*4882a593Smuzhiyun 	},
8610*4882a593Smuzhiyun 	{
8611*4882a593Smuzhiyun 		PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
8612*4882a593Smuzhiyun 			       PCI_VENDOR_ID_HP, 0x0601)
8613*4882a593Smuzhiyun 	},
8614*4882a593Smuzhiyun 	{
8615*4882a593Smuzhiyun 		PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
8616*4882a593Smuzhiyun 			       PCI_VENDOR_ID_HP, 0x0602)
8617*4882a593Smuzhiyun 	},
8618*4882a593Smuzhiyun 	{
8619*4882a593Smuzhiyun 		PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
8620*4882a593Smuzhiyun 			       PCI_VENDOR_ID_HP, 0x0603)
8621*4882a593Smuzhiyun 	},
8622*4882a593Smuzhiyun 	{
8623*4882a593Smuzhiyun 		PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
8624*4882a593Smuzhiyun 			       PCI_VENDOR_ID_HP, 0x0609)
8625*4882a593Smuzhiyun 	},
8626*4882a593Smuzhiyun 	{
8627*4882a593Smuzhiyun 		PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
8628*4882a593Smuzhiyun 			       PCI_VENDOR_ID_HP, 0x0650)
8629*4882a593Smuzhiyun 	},
8630*4882a593Smuzhiyun 	{
8631*4882a593Smuzhiyun 		PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
8632*4882a593Smuzhiyun 			       PCI_VENDOR_ID_HP, 0x0651)
8633*4882a593Smuzhiyun 	},
8634*4882a593Smuzhiyun 	{
8635*4882a593Smuzhiyun 		PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
8636*4882a593Smuzhiyun 			       PCI_VENDOR_ID_HP, 0x0652)
8637*4882a593Smuzhiyun 	},
8638*4882a593Smuzhiyun 	{
8639*4882a593Smuzhiyun 		PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
8640*4882a593Smuzhiyun 			       PCI_VENDOR_ID_HP, 0x0653)
8641*4882a593Smuzhiyun 	},
8642*4882a593Smuzhiyun 	{
8643*4882a593Smuzhiyun 		PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
8644*4882a593Smuzhiyun 			       PCI_VENDOR_ID_HP, 0x0654)
8645*4882a593Smuzhiyun 	},
8646*4882a593Smuzhiyun 	{
8647*4882a593Smuzhiyun 		PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
8648*4882a593Smuzhiyun 			       PCI_VENDOR_ID_HP, 0x0655)
8649*4882a593Smuzhiyun 	},
8650*4882a593Smuzhiyun 	{
8651*4882a593Smuzhiyun 		PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
8652*4882a593Smuzhiyun 			       PCI_VENDOR_ID_HP, 0x0700)
8653*4882a593Smuzhiyun 	},
8654*4882a593Smuzhiyun 	{
8655*4882a593Smuzhiyun 		PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
8656*4882a593Smuzhiyun 			       PCI_VENDOR_ID_HP, 0x0701)
8657*4882a593Smuzhiyun 	},
8658*4882a593Smuzhiyun 	{
8659*4882a593Smuzhiyun 		PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
8660*4882a593Smuzhiyun 			       PCI_VENDOR_ID_HP, 0x1001)
8661*4882a593Smuzhiyun 	},
8662*4882a593Smuzhiyun 	{
8663*4882a593Smuzhiyun 		PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
8664*4882a593Smuzhiyun 			       PCI_VENDOR_ID_HP, 0x1002)
8665*4882a593Smuzhiyun 	},
8666*4882a593Smuzhiyun 	{
8667*4882a593Smuzhiyun 		PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
8668*4882a593Smuzhiyun 			       PCI_VENDOR_ID_HP, 0x1100)
8669*4882a593Smuzhiyun 	},
8670*4882a593Smuzhiyun 	{
8671*4882a593Smuzhiyun 		PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
8672*4882a593Smuzhiyun 			       PCI_VENDOR_ID_HP, 0x1101)
8673*4882a593Smuzhiyun 	},
8674*4882a593Smuzhiyun 	{
8675*4882a593Smuzhiyun 		PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
8676*4882a593Smuzhiyun 			       0x1590, 0x0294)
8677*4882a593Smuzhiyun 	},
8678*4882a593Smuzhiyun 	{
8679*4882a593Smuzhiyun 		PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
8680*4882a593Smuzhiyun 			       0x1590, 0x02db)
8681*4882a593Smuzhiyun 	},
8682*4882a593Smuzhiyun 	{
8683*4882a593Smuzhiyun 		PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
8684*4882a593Smuzhiyun 			       0x1590, 0x02dc)
8685*4882a593Smuzhiyun 	},
8686*4882a593Smuzhiyun 	{
8687*4882a593Smuzhiyun 		PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
8688*4882a593Smuzhiyun 			       0x1590, 0x032e)
8689*4882a593Smuzhiyun 	},
8690*4882a593Smuzhiyun 	{
8691*4882a593Smuzhiyun 		PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
8692*4882a593Smuzhiyun 			       0x1d8d, 0x0800)
8693*4882a593Smuzhiyun 	},
8694*4882a593Smuzhiyun 	{
8695*4882a593Smuzhiyun 		PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
8696*4882a593Smuzhiyun 			       0x1d8d, 0x0908)
8697*4882a593Smuzhiyun 	},
8698*4882a593Smuzhiyun 	{
8699*4882a593Smuzhiyun 		PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
8700*4882a593Smuzhiyun 			       0x1d8d, 0x0806)
8701*4882a593Smuzhiyun 	},
8702*4882a593Smuzhiyun 	{
8703*4882a593Smuzhiyun 		PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
8704*4882a593Smuzhiyun 			       0x1d8d, 0x0916)
8705*4882a593Smuzhiyun 	},
8706*4882a593Smuzhiyun 	{
8707*4882a593Smuzhiyun 		PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
8708*4882a593Smuzhiyun 			       PCI_VENDOR_ID_GIGABYTE, 0x1000)
8709*4882a593Smuzhiyun 	},
8710*4882a593Smuzhiyun 	{
8711*4882a593Smuzhiyun 		PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
8712*4882a593Smuzhiyun 			       PCI_ANY_ID, PCI_ANY_ID)
8713*4882a593Smuzhiyun 	},
8714*4882a593Smuzhiyun 	{ 0 }
8715*4882a593Smuzhiyun };
8716*4882a593Smuzhiyun 
8717*4882a593Smuzhiyun MODULE_DEVICE_TABLE(pci, pqi_pci_id_table);
8718*4882a593Smuzhiyun 
8719*4882a593Smuzhiyun static struct pci_driver pqi_pci_driver = {
8720*4882a593Smuzhiyun 	.name = DRIVER_NAME_SHORT,
8721*4882a593Smuzhiyun 	.id_table = pqi_pci_id_table,
8722*4882a593Smuzhiyun 	.probe = pqi_pci_probe,
8723*4882a593Smuzhiyun 	.remove = pqi_pci_remove,
8724*4882a593Smuzhiyun 	.shutdown = pqi_shutdown,
8725*4882a593Smuzhiyun #if defined(CONFIG_PM)
8726*4882a593Smuzhiyun 	.suspend = pqi_suspend,
8727*4882a593Smuzhiyun 	.resume = pqi_resume,
8728*4882a593Smuzhiyun #endif
8729*4882a593Smuzhiyun };
8730*4882a593Smuzhiyun 
pqi_init(void)8731*4882a593Smuzhiyun static int __init pqi_init(void)
8732*4882a593Smuzhiyun {
8733*4882a593Smuzhiyun 	int rc;
8734*4882a593Smuzhiyun 
8735*4882a593Smuzhiyun 	pr_info(DRIVER_NAME "\n");
8736*4882a593Smuzhiyun 
8737*4882a593Smuzhiyun 	pqi_sas_transport_template = sas_attach_transport(&pqi_sas_transport_functions);
8738*4882a593Smuzhiyun 	if (!pqi_sas_transport_template)
8739*4882a593Smuzhiyun 		return -ENODEV;
8740*4882a593Smuzhiyun 
8741*4882a593Smuzhiyun 	pqi_process_module_params();
8742*4882a593Smuzhiyun 
8743*4882a593Smuzhiyun 	rc = pci_register_driver(&pqi_pci_driver);
8744*4882a593Smuzhiyun 	if (rc)
8745*4882a593Smuzhiyun 		sas_release_transport(pqi_sas_transport_template);
8746*4882a593Smuzhiyun 
8747*4882a593Smuzhiyun 	return rc;
8748*4882a593Smuzhiyun }
8749*4882a593Smuzhiyun 
pqi_cleanup(void)8750*4882a593Smuzhiyun static void __exit pqi_cleanup(void)
8751*4882a593Smuzhiyun {
8752*4882a593Smuzhiyun 	pci_unregister_driver(&pqi_pci_driver);
8753*4882a593Smuzhiyun 	sas_release_transport(pqi_sas_transport_template);
8754*4882a593Smuzhiyun }
8755*4882a593Smuzhiyun 
8756*4882a593Smuzhiyun module_init(pqi_init);
8757*4882a593Smuzhiyun module_exit(pqi_cleanup);
8758*4882a593Smuzhiyun 
verify_structures(void)8759*4882a593Smuzhiyun static void __attribute__((unused)) verify_structures(void)
8760*4882a593Smuzhiyun {
8761*4882a593Smuzhiyun 	BUILD_BUG_ON(offsetof(struct pqi_ctrl_registers,
8762*4882a593Smuzhiyun 		sis_host_to_ctrl_doorbell) != 0x20);
8763*4882a593Smuzhiyun 	BUILD_BUG_ON(offsetof(struct pqi_ctrl_registers,
8764*4882a593Smuzhiyun 		sis_interrupt_mask) != 0x34);
8765*4882a593Smuzhiyun 	BUILD_BUG_ON(offsetof(struct pqi_ctrl_registers,
8766*4882a593Smuzhiyun 		sis_ctrl_to_host_doorbell) != 0x9c);
8767*4882a593Smuzhiyun 	BUILD_BUG_ON(offsetof(struct pqi_ctrl_registers,
8768*4882a593Smuzhiyun 		sis_ctrl_to_host_doorbell_clear) != 0xa0);
8769*4882a593Smuzhiyun 	BUILD_BUG_ON(offsetof(struct pqi_ctrl_registers,
8770*4882a593Smuzhiyun 		sis_driver_scratch) != 0xb0);
8771*4882a593Smuzhiyun 	BUILD_BUG_ON(offsetof(struct pqi_ctrl_registers,
8772*4882a593Smuzhiyun 		sis_firmware_status) != 0xbc);
8773*4882a593Smuzhiyun 	BUILD_BUG_ON(offsetof(struct pqi_ctrl_registers,
8774*4882a593Smuzhiyun 		sis_mailbox) != 0x1000);
8775*4882a593Smuzhiyun 	BUILD_BUG_ON(offsetof(struct pqi_ctrl_registers,
8776*4882a593Smuzhiyun 		pqi_registers) != 0x4000);
8777*4882a593Smuzhiyun 
8778*4882a593Smuzhiyun 	BUILD_BUG_ON(offsetof(struct pqi_iu_header,
8779*4882a593Smuzhiyun 		iu_type) != 0x0);
8780*4882a593Smuzhiyun 	BUILD_BUG_ON(offsetof(struct pqi_iu_header,
8781*4882a593Smuzhiyun 		iu_length) != 0x2);
8782*4882a593Smuzhiyun 	BUILD_BUG_ON(offsetof(struct pqi_iu_header,
8783*4882a593Smuzhiyun 		response_queue_id) != 0x4);
8784*4882a593Smuzhiyun 	BUILD_BUG_ON(offsetof(struct pqi_iu_header,
8785*4882a593Smuzhiyun 		work_area) != 0x6);
8786*4882a593Smuzhiyun 	BUILD_BUG_ON(sizeof(struct pqi_iu_header) != 0x8);
8787*4882a593Smuzhiyun 
8788*4882a593Smuzhiyun 	BUILD_BUG_ON(offsetof(struct pqi_aio_error_info,
8789*4882a593Smuzhiyun 		status) != 0x0);
8790*4882a593Smuzhiyun 	BUILD_BUG_ON(offsetof(struct pqi_aio_error_info,
8791*4882a593Smuzhiyun 		service_response) != 0x1);
8792*4882a593Smuzhiyun 	BUILD_BUG_ON(offsetof(struct pqi_aio_error_info,
8793*4882a593Smuzhiyun 		data_present) != 0x2);
8794*4882a593Smuzhiyun 	BUILD_BUG_ON(offsetof(struct pqi_aio_error_info,
8795*4882a593Smuzhiyun 		reserved) != 0x3);
8796*4882a593Smuzhiyun 	BUILD_BUG_ON(offsetof(struct pqi_aio_error_info,
8797*4882a593Smuzhiyun 		residual_count) != 0x4);
8798*4882a593Smuzhiyun 	BUILD_BUG_ON(offsetof(struct pqi_aio_error_info,
8799*4882a593Smuzhiyun 		data_length) != 0x8);
8800*4882a593Smuzhiyun 	BUILD_BUG_ON(offsetof(struct pqi_aio_error_info,
8801*4882a593Smuzhiyun 		reserved1) != 0xa);
8802*4882a593Smuzhiyun 	BUILD_BUG_ON(offsetof(struct pqi_aio_error_info,
8803*4882a593Smuzhiyun 		data) != 0xc);
8804*4882a593Smuzhiyun 	BUILD_BUG_ON(sizeof(struct pqi_aio_error_info) != 0x10c);
8805*4882a593Smuzhiyun 
8806*4882a593Smuzhiyun 	BUILD_BUG_ON(offsetof(struct pqi_raid_error_info,
8807*4882a593Smuzhiyun 		data_in_result) != 0x0);
8808*4882a593Smuzhiyun 	BUILD_BUG_ON(offsetof(struct pqi_raid_error_info,
8809*4882a593Smuzhiyun 		data_out_result) != 0x1);
8810*4882a593Smuzhiyun 	BUILD_BUG_ON(offsetof(struct pqi_raid_error_info,
8811*4882a593Smuzhiyun 		reserved) != 0x2);
8812*4882a593Smuzhiyun 	BUILD_BUG_ON(offsetof(struct pqi_raid_error_info,
8813*4882a593Smuzhiyun 		status) != 0x5);
8814*4882a593Smuzhiyun 	BUILD_BUG_ON(offsetof(struct pqi_raid_error_info,
8815*4882a593Smuzhiyun 		status_qualifier) != 0x6);
8816*4882a593Smuzhiyun 	BUILD_BUG_ON(offsetof(struct pqi_raid_error_info,
8817*4882a593Smuzhiyun 		sense_data_length) != 0x8);
8818*4882a593Smuzhiyun 	BUILD_BUG_ON(offsetof(struct pqi_raid_error_info,
8819*4882a593Smuzhiyun 		response_data_length) != 0xa);
8820*4882a593Smuzhiyun 	BUILD_BUG_ON(offsetof(struct pqi_raid_error_info,
8821*4882a593Smuzhiyun 		data_in_transferred) != 0xc);
8822*4882a593Smuzhiyun 	BUILD_BUG_ON(offsetof(struct pqi_raid_error_info,
8823*4882a593Smuzhiyun 		data_out_transferred) != 0x10);
8824*4882a593Smuzhiyun 	BUILD_BUG_ON(offsetof(struct pqi_raid_error_info,
8825*4882a593Smuzhiyun 		data) != 0x14);
8826*4882a593Smuzhiyun 	BUILD_BUG_ON(sizeof(struct pqi_raid_error_info) != 0x114);
8827*4882a593Smuzhiyun 
8828*4882a593Smuzhiyun 	BUILD_BUG_ON(offsetof(struct pqi_device_registers,
8829*4882a593Smuzhiyun 		signature) != 0x0);
8830*4882a593Smuzhiyun 	BUILD_BUG_ON(offsetof(struct pqi_device_registers,
8831*4882a593Smuzhiyun 		function_and_status_code) != 0x8);
8832*4882a593Smuzhiyun 	BUILD_BUG_ON(offsetof(struct pqi_device_registers,
8833*4882a593Smuzhiyun 		max_admin_iq_elements) != 0x10);
8834*4882a593Smuzhiyun 	BUILD_BUG_ON(offsetof(struct pqi_device_registers,
8835*4882a593Smuzhiyun 		max_admin_oq_elements) != 0x11);
8836*4882a593Smuzhiyun 	BUILD_BUG_ON(offsetof(struct pqi_device_registers,
8837*4882a593Smuzhiyun 		admin_iq_element_length) != 0x12);
8838*4882a593Smuzhiyun 	BUILD_BUG_ON(offsetof(struct pqi_device_registers,
8839*4882a593Smuzhiyun 		admin_oq_element_length) != 0x13);
8840*4882a593Smuzhiyun 	BUILD_BUG_ON(offsetof(struct pqi_device_registers,
8841*4882a593Smuzhiyun 		max_reset_timeout) != 0x14);
8842*4882a593Smuzhiyun 	BUILD_BUG_ON(offsetof(struct pqi_device_registers,
8843*4882a593Smuzhiyun 		legacy_intx_status) != 0x18);
8844*4882a593Smuzhiyun 	BUILD_BUG_ON(offsetof(struct pqi_device_registers,
8845*4882a593Smuzhiyun 		legacy_intx_mask_set) != 0x1c);
8846*4882a593Smuzhiyun 	BUILD_BUG_ON(offsetof(struct pqi_device_registers,
8847*4882a593Smuzhiyun 		legacy_intx_mask_clear) != 0x20);
8848*4882a593Smuzhiyun 	BUILD_BUG_ON(offsetof(struct pqi_device_registers,
8849*4882a593Smuzhiyun 		device_status) != 0x40);
8850*4882a593Smuzhiyun 	BUILD_BUG_ON(offsetof(struct pqi_device_registers,
8851*4882a593Smuzhiyun 		admin_iq_pi_offset) != 0x48);
8852*4882a593Smuzhiyun 	BUILD_BUG_ON(offsetof(struct pqi_device_registers,
8853*4882a593Smuzhiyun 		admin_oq_ci_offset) != 0x50);
8854*4882a593Smuzhiyun 	BUILD_BUG_ON(offsetof(struct pqi_device_registers,
8855*4882a593Smuzhiyun 		admin_iq_element_array_addr) != 0x58);
8856*4882a593Smuzhiyun 	BUILD_BUG_ON(offsetof(struct pqi_device_registers,
8857*4882a593Smuzhiyun 		admin_oq_element_array_addr) != 0x60);
8858*4882a593Smuzhiyun 	BUILD_BUG_ON(offsetof(struct pqi_device_registers,
8859*4882a593Smuzhiyun 		admin_iq_ci_addr) != 0x68);
8860*4882a593Smuzhiyun 	BUILD_BUG_ON(offsetof(struct pqi_device_registers,
8861*4882a593Smuzhiyun 		admin_oq_pi_addr) != 0x70);
8862*4882a593Smuzhiyun 	BUILD_BUG_ON(offsetof(struct pqi_device_registers,
8863*4882a593Smuzhiyun 		admin_iq_num_elements) != 0x78);
8864*4882a593Smuzhiyun 	BUILD_BUG_ON(offsetof(struct pqi_device_registers,
8865*4882a593Smuzhiyun 		admin_oq_num_elements) != 0x79);
8866*4882a593Smuzhiyun 	BUILD_BUG_ON(offsetof(struct pqi_device_registers,
8867*4882a593Smuzhiyun 		admin_queue_int_msg_num) != 0x7a);
8868*4882a593Smuzhiyun 	BUILD_BUG_ON(offsetof(struct pqi_device_registers,
8869*4882a593Smuzhiyun 		device_error) != 0x80);
8870*4882a593Smuzhiyun 	BUILD_BUG_ON(offsetof(struct pqi_device_registers,
8871*4882a593Smuzhiyun 		error_details) != 0x88);
8872*4882a593Smuzhiyun 	BUILD_BUG_ON(offsetof(struct pqi_device_registers,
8873*4882a593Smuzhiyun 		device_reset) != 0x90);
8874*4882a593Smuzhiyun 	BUILD_BUG_ON(offsetof(struct pqi_device_registers,
8875*4882a593Smuzhiyun 		power_action) != 0x94);
8876*4882a593Smuzhiyun 	BUILD_BUG_ON(sizeof(struct pqi_device_registers) != 0x100);
8877*4882a593Smuzhiyun 
8878*4882a593Smuzhiyun 	BUILD_BUG_ON(offsetof(struct pqi_general_admin_request,
8879*4882a593Smuzhiyun 		header.iu_type) != 0);
8880*4882a593Smuzhiyun 	BUILD_BUG_ON(offsetof(struct pqi_general_admin_request,
8881*4882a593Smuzhiyun 		header.iu_length) != 2);
8882*4882a593Smuzhiyun 	BUILD_BUG_ON(offsetof(struct pqi_general_admin_request,
8883*4882a593Smuzhiyun 		header.work_area) != 6);
8884*4882a593Smuzhiyun 	BUILD_BUG_ON(offsetof(struct pqi_general_admin_request,
8885*4882a593Smuzhiyun 		request_id) != 8);
8886*4882a593Smuzhiyun 	BUILD_BUG_ON(offsetof(struct pqi_general_admin_request,
8887*4882a593Smuzhiyun 		function_code) != 10);
8888*4882a593Smuzhiyun 	BUILD_BUG_ON(offsetof(struct pqi_general_admin_request,
8889*4882a593Smuzhiyun 		data.report_device_capability.buffer_length) != 44);
8890*4882a593Smuzhiyun 	BUILD_BUG_ON(offsetof(struct pqi_general_admin_request,
8891*4882a593Smuzhiyun 		data.report_device_capability.sg_descriptor) != 48);
8892*4882a593Smuzhiyun 	BUILD_BUG_ON(offsetof(struct pqi_general_admin_request,
8893*4882a593Smuzhiyun 		data.create_operational_iq.queue_id) != 12);
8894*4882a593Smuzhiyun 	BUILD_BUG_ON(offsetof(struct pqi_general_admin_request,
8895*4882a593Smuzhiyun 		data.create_operational_iq.element_array_addr) != 16);
8896*4882a593Smuzhiyun 	BUILD_BUG_ON(offsetof(struct pqi_general_admin_request,
8897*4882a593Smuzhiyun 		data.create_operational_iq.ci_addr) != 24);
8898*4882a593Smuzhiyun 	BUILD_BUG_ON(offsetof(struct pqi_general_admin_request,
8899*4882a593Smuzhiyun 		data.create_operational_iq.num_elements) != 32);
8900*4882a593Smuzhiyun 	BUILD_BUG_ON(offsetof(struct pqi_general_admin_request,
8901*4882a593Smuzhiyun 		data.create_operational_iq.element_length) != 34);
8902*4882a593Smuzhiyun 	BUILD_BUG_ON(offsetof(struct pqi_general_admin_request,
8903*4882a593Smuzhiyun 		data.create_operational_iq.queue_protocol) != 36);
8904*4882a593Smuzhiyun 	BUILD_BUG_ON(offsetof(struct pqi_general_admin_request,
8905*4882a593Smuzhiyun 		data.create_operational_oq.queue_id) != 12);
8906*4882a593Smuzhiyun 	BUILD_BUG_ON(offsetof(struct pqi_general_admin_request,
8907*4882a593Smuzhiyun 		data.create_operational_oq.element_array_addr) != 16);
8908*4882a593Smuzhiyun 	BUILD_BUG_ON(offsetof(struct pqi_general_admin_request,
8909*4882a593Smuzhiyun 		data.create_operational_oq.pi_addr) != 24);
8910*4882a593Smuzhiyun 	BUILD_BUG_ON(offsetof(struct pqi_general_admin_request,
8911*4882a593Smuzhiyun 		data.create_operational_oq.num_elements) != 32);
8912*4882a593Smuzhiyun 	BUILD_BUG_ON(offsetof(struct pqi_general_admin_request,
8913*4882a593Smuzhiyun 		data.create_operational_oq.element_length) != 34);
8914*4882a593Smuzhiyun 	BUILD_BUG_ON(offsetof(struct pqi_general_admin_request,
8915*4882a593Smuzhiyun 		data.create_operational_oq.queue_protocol) != 36);
8916*4882a593Smuzhiyun 	BUILD_BUG_ON(offsetof(struct pqi_general_admin_request,
8917*4882a593Smuzhiyun 		data.create_operational_oq.int_msg_num) != 40);
8918*4882a593Smuzhiyun 	BUILD_BUG_ON(offsetof(struct pqi_general_admin_request,
8919*4882a593Smuzhiyun 		data.create_operational_oq.coalescing_count) != 42);
8920*4882a593Smuzhiyun 	BUILD_BUG_ON(offsetof(struct pqi_general_admin_request,
8921*4882a593Smuzhiyun 		data.create_operational_oq.min_coalescing_time) != 44);
8922*4882a593Smuzhiyun 	BUILD_BUG_ON(offsetof(struct pqi_general_admin_request,
8923*4882a593Smuzhiyun 		data.create_operational_oq.max_coalescing_time) != 48);
8924*4882a593Smuzhiyun 	BUILD_BUG_ON(offsetof(struct pqi_general_admin_request,
8925*4882a593Smuzhiyun 		data.delete_operational_queue.queue_id) != 12);
8926*4882a593Smuzhiyun 	BUILD_BUG_ON(sizeof(struct pqi_general_admin_request) != 64);
8927*4882a593Smuzhiyun 	BUILD_BUG_ON(sizeof_field(struct pqi_general_admin_request,
8928*4882a593Smuzhiyun 		data.create_operational_iq) != 64 - 11);
8929*4882a593Smuzhiyun 	BUILD_BUG_ON(sizeof_field(struct pqi_general_admin_request,
8930*4882a593Smuzhiyun 		data.create_operational_oq) != 64 - 11);
8931*4882a593Smuzhiyun 	BUILD_BUG_ON(sizeof_field(struct pqi_general_admin_request,
8932*4882a593Smuzhiyun 		data.delete_operational_queue) != 64 - 11);
8933*4882a593Smuzhiyun 
8934*4882a593Smuzhiyun 	BUILD_BUG_ON(offsetof(struct pqi_general_admin_response,
8935*4882a593Smuzhiyun 		header.iu_type) != 0);
8936*4882a593Smuzhiyun 	BUILD_BUG_ON(offsetof(struct pqi_general_admin_response,
8937*4882a593Smuzhiyun 		header.iu_length) != 2);
8938*4882a593Smuzhiyun 	BUILD_BUG_ON(offsetof(struct pqi_general_admin_response,
8939*4882a593Smuzhiyun 		header.work_area) != 6);
8940*4882a593Smuzhiyun 	BUILD_BUG_ON(offsetof(struct pqi_general_admin_response,
8941*4882a593Smuzhiyun 		request_id) != 8);
8942*4882a593Smuzhiyun 	BUILD_BUG_ON(offsetof(struct pqi_general_admin_response,
8943*4882a593Smuzhiyun 		function_code) != 10);
8944*4882a593Smuzhiyun 	BUILD_BUG_ON(offsetof(struct pqi_general_admin_response,
8945*4882a593Smuzhiyun 		status) != 11);
8946*4882a593Smuzhiyun 	BUILD_BUG_ON(offsetof(struct pqi_general_admin_response,
8947*4882a593Smuzhiyun 		data.create_operational_iq.status_descriptor) != 12);
8948*4882a593Smuzhiyun 	BUILD_BUG_ON(offsetof(struct pqi_general_admin_response,
8949*4882a593Smuzhiyun 		data.create_operational_iq.iq_pi_offset) != 16);
8950*4882a593Smuzhiyun 	BUILD_BUG_ON(offsetof(struct pqi_general_admin_response,
8951*4882a593Smuzhiyun 		data.create_operational_oq.status_descriptor) != 12);
8952*4882a593Smuzhiyun 	BUILD_BUG_ON(offsetof(struct pqi_general_admin_response,
8953*4882a593Smuzhiyun 		data.create_operational_oq.oq_ci_offset) != 16);
8954*4882a593Smuzhiyun 	BUILD_BUG_ON(sizeof(struct pqi_general_admin_response) != 64);
8955*4882a593Smuzhiyun 
8956*4882a593Smuzhiyun 	BUILD_BUG_ON(offsetof(struct pqi_raid_path_request,
8957*4882a593Smuzhiyun 		header.iu_type) != 0);
8958*4882a593Smuzhiyun 	BUILD_BUG_ON(offsetof(struct pqi_raid_path_request,
8959*4882a593Smuzhiyun 		header.iu_length) != 2);
8960*4882a593Smuzhiyun 	BUILD_BUG_ON(offsetof(struct pqi_raid_path_request,
8961*4882a593Smuzhiyun 		header.response_queue_id) != 4);
8962*4882a593Smuzhiyun 	BUILD_BUG_ON(offsetof(struct pqi_raid_path_request,
8963*4882a593Smuzhiyun 		header.work_area) != 6);
8964*4882a593Smuzhiyun 	BUILD_BUG_ON(offsetof(struct pqi_raid_path_request,
8965*4882a593Smuzhiyun 		request_id) != 8);
8966*4882a593Smuzhiyun 	BUILD_BUG_ON(offsetof(struct pqi_raid_path_request,
8967*4882a593Smuzhiyun 		nexus_id) != 10);
8968*4882a593Smuzhiyun 	BUILD_BUG_ON(offsetof(struct pqi_raid_path_request,
8969*4882a593Smuzhiyun 		buffer_length) != 12);
8970*4882a593Smuzhiyun 	BUILD_BUG_ON(offsetof(struct pqi_raid_path_request,
8971*4882a593Smuzhiyun 		lun_number) != 16);
8972*4882a593Smuzhiyun 	BUILD_BUG_ON(offsetof(struct pqi_raid_path_request,
8973*4882a593Smuzhiyun 		protocol_specific) != 24);
8974*4882a593Smuzhiyun 	BUILD_BUG_ON(offsetof(struct pqi_raid_path_request,
8975*4882a593Smuzhiyun 		error_index) != 27);
8976*4882a593Smuzhiyun 	BUILD_BUG_ON(offsetof(struct pqi_raid_path_request,
8977*4882a593Smuzhiyun 		cdb) != 32);
8978*4882a593Smuzhiyun 	BUILD_BUG_ON(offsetof(struct pqi_raid_path_request,
8979*4882a593Smuzhiyun 		timeout) != 60);
8980*4882a593Smuzhiyun 	BUILD_BUG_ON(offsetof(struct pqi_raid_path_request,
8981*4882a593Smuzhiyun 		sg_descriptors) != 64);
8982*4882a593Smuzhiyun 	BUILD_BUG_ON(sizeof(struct pqi_raid_path_request) !=
8983*4882a593Smuzhiyun 		PQI_OPERATIONAL_IQ_ELEMENT_LENGTH);
8984*4882a593Smuzhiyun 
8985*4882a593Smuzhiyun 	BUILD_BUG_ON(offsetof(struct pqi_aio_path_request,
8986*4882a593Smuzhiyun 		header.iu_type) != 0);
8987*4882a593Smuzhiyun 	BUILD_BUG_ON(offsetof(struct pqi_aio_path_request,
8988*4882a593Smuzhiyun 		header.iu_length) != 2);
8989*4882a593Smuzhiyun 	BUILD_BUG_ON(offsetof(struct pqi_aio_path_request,
8990*4882a593Smuzhiyun 		header.response_queue_id) != 4);
8991*4882a593Smuzhiyun 	BUILD_BUG_ON(offsetof(struct pqi_aio_path_request,
8992*4882a593Smuzhiyun 		header.work_area) != 6);
8993*4882a593Smuzhiyun 	BUILD_BUG_ON(offsetof(struct pqi_aio_path_request,
8994*4882a593Smuzhiyun 		request_id) != 8);
8995*4882a593Smuzhiyun 	BUILD_BUG_ON(offsetof(struct pqi_aio_path_request,
8996*4882a593Smuzhiyun 		nexus_id) != 12);
8997*4882a593Smuzhiyun 	BUILD_BUG_ON(offsetof(struct pqi_aio_path_request,
8998*4882a593Smuzhiyun 		buffer_length) != 16);
8999*4882a593Smuzhiyun 	BUILD_BUG_ON(offsetof(struct pqi_aio_path_request,
9000*4882a593Smuzhiyun 		data_encryption_key_index) != 22);
9001*4882a593Smuzhiyun 	BUILD_BUG_ON(offsetof(struct pqi_aio_path_request,
9002*4882a593Smuzhiyun 		encrypt_tweak_lower) != 24);
9003*4882a593Smuzhiyun 	BUILD_BUG_ON(offsetof(struct pqi_aio_path_request,
9004*4882a593Smuzhiyun 		encrypt_tweak_upper) != 28);
9005*4882a593Smuzhiyun 	BUILD_BUG_ON(offsetof(struct pqi_aio_path_request,
9006*4882a593Smuzhiyun 		cdb) != 32);
9007*4882a593Smuzhiyun 	BUILD_BUG_ON(offsetof(struct pqi_aio_path_request,
9008*4882a593Smuzhiyun 		error_index) != 48);
9009*4882a593Smuzhiyun 	BUILD_BUG_ON(offsetof(struct pqi_aio_path_request,
9010*4882a593Smuzhiyun 		num_sg_descriptors) != 50);
9011*4882a593Smuzhiyun 	BUILD_BUG_ON(offsetof(struct pqi_aio_path_request,
9012*4882a593Smuzhiyun 		cdb_length) != 51);
9013*4882a593Smuzhiyun 	BUILD_BUG_ON(offsetof(struct pqi_aio_path_request,
9014*4882a593Smuzhiyun 		lun_number) != 52);
9015*4882a593Smuzhiyun 	BUILD_BUG_ON(offsetof(struct pqi_aio_path_request,
9016*4882a593Smuzhiyun 		sg_descriptors) != 64);
9017*4882a593Smuzhiyun 	BUILD_BUG_ON(sizeof(struct pqi_aio_path_request) !=
9018*4882a593Smuzhiyun 		PQI_OPERATIONAL_IQ_ELEMENT_LENGTH);
9019*4882a593Smuzhiyun 
9020*4882a593Smuzhiyun 	BUILD_BUG_ON(offsetof(struct pqi_io_response,
9021*4882a593Smuzhiyun 		header.iu_type) != 0);
9022*4882a593Smuzhiyun 	BUILD_BUG_ON(offsetof(struct pqi_io_response,
9023*4882a593Smuzhiyun 		header.iu_length) != 2);
9024*4882a593Smuzhiyun 	BUILD_BUG_ON(offsetof(struct pqi_io_response,
9025*4882a593Smuzhiyun 		request_id) != 8);
9026*4882a593Smuzhiyun 	BUILD_BUG_ON(offsetof(struct pqi_io_response,
9027*4882a593Smuzhiyun 		error_index) != 10);
9028*4882a593Smuzhiyun 
9029*4882a593Smuzhiyun 	BUILD_BUG_ON(offsetof(struct pqi_general_management_request,
9030*4882a593Smuzhiyun 		header.iu_type) != 0);
9031*4882a593Smuzhiyun 	BUILD_BUG_ON(offsetof(struct pqi_general_management_request,
9032*4882a593Smuzhiyun 		header.iu_length) != 2);
9033*4882a593Smuzhiyun 	BUILD_BUG_ON(offsetof(struct pqi_general_management_request,
9034*4882a593Smuzhiyun 		header.response_queue_id) != 4);
9035*4882a593Smuzhiyun 	BUILD_BUG_ON(offsetof(struct pqi_general_management_request,
9036*4882a593Smuzhiyun 		request_id) != 8);
9037*4882a593Smuzhiyun 	BUILD_BUG_ON(offsetof(struct pqi_general_management_request,
9038*4882a593Smuzhiyun 		data.report_event_configuration.buffer_length) != 12);
9039*4882a593Smuzhiyun 	BUILD_BUG_ON(offsetof(struct pqi_general_management_request,
9040*4882a593Smuzhiyun 		data.report_event_configuration.sg_descriptors) != 16);
9041*4882a593Smuzhiyun 	BUILD_BUG_ON(offsetof(struct pqi_general_management_request,
9042*4882a593Smuzhiyun 		data.set_event_configuration.global_event_oq_id) != 10);
9043*4882a593Smuzhiyun 	BUILD_BUG_ON(offsetof(struct pqi_general_management_request,
9044*4882a593Smuzhiyun 		data.set_event_configuration.buffer_length) != 12);
9045*4882a593Smuzhiyun 	BUILD_BUG_ON(offsetof(struct pqi_general_management_request,
9046*4882a593Smuzhiyun 		data.set_event_configuration.sg_descriptors) != 16);
9047*4882a593Smuzhiyun 
9048*4882a593Smuzhiyun 	BUILD_BUG_ON(offsetof(struct pqi_iu_layer_descriptor,
9049*4882a593Smuzhiyun 		max_inbound_iu_length) != 6);
9050*4882a593Smuzhiyun 	BUILD_BUG_ON(offsetof(struct pqi_iu_layer_descriptor,
9051*4882a593Smuzhiyun 		max_outbound_iu_length) != 14);
9052*4882a593Smuzhiyun 	BUILD_BUG_ON(sizeof(struct pqi_iu_layer_descriptor) != 16);
9053*4882a593Smuzhiyun 
9054*4882a593Smuzhiyun 	BUILD_BUG_ON(offsetof(struct pqi_device_capability,
9055*4882a593Smuzhiyun 		data_length) != 0);
9056*4882a593Smuzhiyun 	BUILD_BUG_ON(offsetof(struct pqi_device_capability,
9057*4882a593Smuzhiyun 		iq_arbitration_priority_support_bitmask) != 8);
9058*4882a593Smuzhiyun 	BUILD_BUG_ON(offsetof(struct pqi_device_capability,
9059*4882a593Smuzhiyun 		maximum_aw_a) != 9);
9060*4882a593Smuzhiyun 	BUILD_BUG_ON(offsetof(struct pqi_device_capability,
9061*4882a593Smuzhiyun 		maximum_aw_b) != 10);
9062*4882a593Smuzhiyun 	BUILD_BUG_ON(offsetof(struct pqi_device_capability,
9063*4882a593Smuzhiyun 		maximum_aw_c) != 11);
9064*4882a593Smuzhiyun 	BUILD_BUG_ON(offsetof(struct pqi_device_capability,
9065*4882a593Smuzhiyun 		max_inbound_queues) != 16);
9066*4882a593Smuzhiyun 	BUILD_BUG_ON(offsetof(struct pqi_device_capability,
9067*4882a593Smuzhiyun 		max_elements_per_iq) != 18);
9068*4882a593Smuzhiyun 	BUILD_BUG_ON(offsetof(struct pqi_device_capability,
9069*4882a593Smuzhiyun 		max_iq_element_length) != 24);
9070*4882a593Smuzhiyun 	BUILD_BUG_ON(offsetof(struct pqi_device_capability,
9071*4882a593Smuzhiyun 		min_iq_element_length) != 26);
9072*4882a593Smuzhiyun 	BUILD_BUG_ON(offsetof(struct pqi_device_capability,
9073*4882a593Smuzhiyun 		max_outbound_queues) != 30);
9074*4882a593Smuzhiyun 	BUILD_BUG_ON(offsetof(struct pqi_device_capability,
9075*4882a593Smuzhiyun 		max_elements_per_oq) != 32);
9076*4882a593Smuzhiyun 	BUILD_BUG_ON(offsetof(struct pqi_device_capability,
9077*4882a593Smuzhiyun 		intr_coalescing_time_granularity) != 34);
9078*4882a593Smuzhiyun 	BUILD_BUG_ON(offsetof(struct pqi_device_capability,
9079*4882a593Smuzhiyun 		max_oq_element_length) != 36);
9080*4882a593Smuzhiyun 	BUILD_BUG_ON(offsetof(struct pqi_device_capability,
9081*4882a593Smuzhiyun 		min_oq_element_length) != 38);
9082*4882a593Smuzhiyun 	BUILD_BUG_ON(offsetof(struct pqi_device_capability,
9083*4882a593Smuzhiyun 		iu_layer_descriptors) != 64);
9084*4882a593Smuzhiyun 	BUILD_BUG_ON(sizeof(struct pqi_device_capability) != 576);
9085*4882a593Smuzhiyun 
9086*4882a593Smuzhiyun 	BUILD_BUG_ON(offsetof(struct pqi_event_descriptor,
9087*4882a593Smuzhiyun 		event_type) != 0);
9088*4882a593Smuzhiyun 	BUILD_BUG_ON(offsetof(struct pqi_event_descriptor,
9089*4882a593Smuzhiyun 		oq_id) != 2);
9090*4882a593Smuzhiyun 	BUILD_BUG_ON(sizeof(struct pqi_event_descriptor) != 4);
9091*4882a593Smuzhiyun 
9092*4882a593Smuzhiyun 	BUILD_BUG_ON(offsetof(struct pqi_event_config,
9093*4882a593Smuzhiyun 		num_event_descriptors) != 2);
9094*4882a593Smuzhiyun 	BUILD_BUG_ON(offsetof(struct pqi_event_config,
9095*4882a593Smuzhiyun 		descriptors) != 4);
9096*4882a593Smuzhiyun 
9097*4882a593Smuzhiyun 	BUILD_BUG_ON(PQI_NUM_SUPPORTED_EVENTS !=
9098*4882a593Smuzhiyun 		ARRAY_SIZE(pqi_supported_event_types));
9099*4882a593Smuzhiyun 
9100*4882a593Smuzhiyun 	BUILD_BUG_ON(offsetof(struct pqi_event_response,
9101*4882a593Smuzhiyun 		header.iu_type) != 0);
9102*4882a593Smuzhiyun 	BUILD_BUG_ON(offsetof(struct pqi_event_response,
9103*4882a593Smuzhiyun 		header.iu_length) != 2);
9104*4882a593Smuzhiyun 	BUILD_BUG_ON(offsetof(struct pqi_event_response,
9105*4882a593Smuzhiyun 		event_type) != 8);
9106*4882a593Smuzhiyun 	BUILD_BUG_ON(offsetof(struct pqi_event_response,
9107*4882a593Smuzhiyun 		event_id) != 10);
9108*4882a593Smuzhiyun 	BUILD_BUG_ON(offsetof(struct pqi_event_response,
9109*4882a593Smuzhiyun 		additional_event_id) != 12);
9110*4882a593Smuzhiyun 	BUILD_BUG_ON(offsetof(struct pqi_event_response,
9111*4882a593Smuzhiyun 		data) != 16);
9112*4882a593Smuzhiyun 	BUILD_BUG_ON(sizeof(struct pqi_event_response) != 32);
9113*4882a593Smuzhiyun 
9114*4882a593Smuzhiyun 	BUILD_BUG_ON(offsetof(struct pqi_event_acknowledge_request,
9115*4882a593Smuzhiyun 		header.iu_type) != 0);
9116*4882a593Smuzhiyun 	BUILD_BUG_ON(offsetof(struct pqi_event_acknowledge_request,
9117*4882a593Smuzhiyun 		header.iu_length) != 2);
9118*4882a593Smuzhiyun 	BUILD_BUG_ON(offsetof(struct pqi_event_acknowledge_request,
9119*4882a593Smuzhiyun 		event_type) != 8);
9120*4882a593Smuzhiyun 	BUILD_BUG_ON(offsetof(struct pqi_event_acknowledge_request,
9121*4882a593Smuzhiyun 		event_id) != 10);
9122*4882a593Smuzhiyun 	BUILD_BUG_ON(offsetof(struct pqi_event_acknowledge_request,
9123*4882a593Smuzhiyun 		additional_event_id) != 12);
9124*4882a593Smuzhiyun 	BUILD_BUG_ON(sizeof(struct pqi_event_acknowledge_request) != 16);
9125*4882a593Smuzhiyun 
9126*4882a593Smuzhiyun 	BUILD_BUG_ON(offsetof(struct pqi_task_management_request,
9127*4882a593Smuzhiyun 		header.iu_type) != 0);
9128*4882a593Smuzhiyun 	BUILD_BUG_ON(offsetof(struct pqi_task_management_request,
9129*4882a593Smuzhiyun 		header.iu_length) != 2);
9130*4882a593Smuzhiyun 	BUILD_BUG_ON(offsetof(struct pqi_task_management_request,
9131*4882a593Smuzhiyun 		request_id) != 8);
9132*4882a593Smuzhiyun 	BUILD_BUG_ON(offsetof(struct pqi_task_management_request,
9133*4882a593Smuzhiyun 		nexus_id) != 10);
9134*4882a593Smuzhiyun 	BUILD_BUG_ON(offsetof(struct pqi_task_management_request,
9135*4882a593Smuzhiyun 		timeout) != 14);
9136*4882a593Smuzhiyun 	BUILD_BUG_ON(offsetof(struct pqi_task_management_request,
9137*4882a593Smuzhiyun 		lun_number) != 16);
9138*4882a593Smuzhiyun 	BUILD_BUG_ON(offsetof(struct pqi_task_management_request,
9139*4882a593Smuzhiyun 		protocol_specific) != 24);
9140*4882a593Smuzhiyun 	BUILD_BUG_ON(offsetof(struct pqi_task_management_request,
9141*4882a593Smuzhiyun 		outbound_queue_id_to_manage) != 26);
9142*4882a593Smuzhiyun 	BUILD_BUG_ON(offsetof(struct pqi_task_management_request,
9143*4882a593Smuzhiyun 		request_id_to_manage) != 28);
9144*4882a593Smuzhiyun 	BUILD_BUG_ON(offsetof(struct pqi_task_management_request,
9145*4882a593Smuzhiyun 		task_management_function) != 30);
9146*4882a593Smuzhiyun 	BUILD_BUG_ON(sizeof(struct pqi_task_management_request) != 32);
9147*4882a593Smuzhiyun 
9148*4882a593Smuzhiyun 	BUILD_BUG_ON(offsetof(struct pqi_task_management_response,
9149*4882a593Smuzhiyun 		header.iu_type) != 0);
9150*4882a593Smuzhiyun 	BUILD_BUG_ON(offsetof(struct pqi_task_management_response,
9151*4882a593Smuzhiyun 		header.iu_length) != 2);
9152*4882a593Smuzhiyun 	BUILD_BUG_ON(offsetof(struct pqi_task_management_response,
9153*4882a593Smuzhiyun 		request_id) != 8);
9154*4882a593Smuzhiyun 	BUILD_BUG_ON(offsetof(struct pqi_task_management_response,
9155*4882a593Smuzhiyun 		nexus_id) != 10);
9156*4882a593Smuzhiyun 	BUILD_BUG_ON(offsetof(struct pqi_task_management_response,
9157*4882a593Smuzhiyun 		additional_response_info) != 12);
9158*4882a593Smuzhiyun 	BUILD_BUG_ON(offsetof(struct pqi_task_management_response,
9159*4882a593Smuzhiyun 		response_code) != 15);
9160*4882a593Smuzhiyun 	BUILD_BUG_ON(sizeof(struct pqi_task_management_response) != 16);
9161*4882a593Smuzhiyun 
9162*4882a593Smuzhiyun 	BUILD_BUG_ON(offsetof(struct bmic_identify_controller,
9163*4882a593Smuzhiyun 		configured_logical_drive_count) != 0);
9164*4882a593Smuzhiyun 	BUILD_BUG_ON(offsetof(struct bmic_identify_controller,
9165*4882a593Smuzhiyun 		configuration_signature) != 1);
9166*4882a593Smuzhiyun 	BUILD_BUG_ON(offsetof(struct bmic_identify_controller,
9167*4882a593Smuzhiyun 		firmware_version) != 5);
9168*4882a593Smuzhiyun 	BUILD_BUG_ON(offsetof(struct bmic_identify_controller,
9169*4882a593Smuzhiyun 		extended_logical_unit_count) != 154);
9170*4882a593Smuzhiyun 	BUILD_BUG_ON(offsetof(struct bmic_identify_controller,
9171*4882a593Smuzhiyun 		firmware_build_number) != 190);
9172*4882a593Smuzhiyun 	BUILD_BUG_ON(offsetof(struct bmic_identify_controller,
9173*4882a593Smuzhiyun 		controller_mode) != 292);
9174*4882a593Smuzhiyun 
9175*4882a593Smuzhiyun 	BUILD_BUG_ON(offsetof(struct bmic_identify_physical_device,
9176*4882a593Smuzhiyun 		phys_bay_in_box) != 115);
9177*4882a593Smuzhiyun 	BUILD_BUG_ON(offsetof(struct bmic_identify_physical_device,
9178*4882a593Smuzhiyun 		device_type) != 120);
9179*4882a593Smuzhiyun 	BUILD_BUG_ON(offsetof(struct bmic_identify_physical_device,
9180*4882a593Smuzhiyun 		redundant_path_present_map) != 1736);
9181*4882a593Smuzhiyun 	BUILD_BUG_ON(offsetof(struct bmic_identify_physical_device,
9182*4882a593Smuzhiyun 		active_path_number) != 1738);
9183*4882a593Smuzhiyun 	BUILD_BUG_ON(offsetof(struct bmic_identify_physical_device,
9184*4882a593Smuzhiyun 		alternate_paths_phys_connector) != 1739);
9185*4882a593Smuzhiyun 	BUILD_BUG_ON(offsetof(struct bmic_identify_physical_device,
9186*4882a593Smuzhiyun 		alternate_paths_phys_box_on_port) != 1755);
9187*4882a593Smuzhiyun 	BUILD_BUG_ON(offsetof(struct bmic_identify_physical_device,
9188*4882a593Smuzhiyun 		current_queue_depth_limit) != 1796);
9189*4882a593Smuzhiyun 	BUILD_BUG_ON(sizeof(struct bmic_identify_physical_device) != 2560);
9190*4882a593Smuzhiyun 
9191*4882a593Smuzhiyun 	BUILD_BUG_ON(PQI_ADMIN_IQ_NUM_ELEMENTS > 255);
9192*4882a593Smuzhiyun 	BUILD_BUG_ON(PQI_ADMIN_OQ_NUM_ELEMENTS > 255);
9193*4882a593Smuzhiyun 	BUILD_BUG_ON(PQI_ADMIN_IQ_ELEMENT_LENGTH %
9194*4882a593Smuzhiyun 		PQI_QUEUE_ELEMENT_LENGTH_ALIGNMENT != 0);
9195*4882a593Smuzhiyun 	BUILD_BUG_ON(PQI_ADMIN_OQ_ELEMENT_LENGTH %
9196*4882a593Smuzhiyun 		PQI_QUEUE_ELEMENT_LENGTH_ALIGNMENT != 0);
9197*4882a593Smuzhiyun 	BUILD_BUG_ON(PQI_OPERATIONAL_IQ_ELEMENT_LENGTH > 1048560);
9198*4882a593Smuzhiyun 	BUILD_BUG_ON(PQI_OPERATIONAL_IQ_ELEMENT_LENGTH %
9199*4882a593Smuzhiyun 		PQI_QUEUE_ELEMENT_LENGTH_ALIGNMENT != 0);
9200*4882a593Smuzhiyun 	BUILD_BUG_ON(PQI_OPERATIONAL_OQ_ELEMENT_LENGTH > 1048560);
9201*4882a593Smuzhiyun 	BUILD_BUG_ON(PQI_OPERATIONAL_OQ_ELEMENT_LENGTH %
9202*4882a593Smuzhiyun 		PQI_QUEUE_ELEMENT_LENGTH_ALIGNMENT != 0);
9203*4882a593Smuzhiyun 
9204*4882a593Smuzhiyun 	BUILD_BUG_ON(PQI_RESERVED_IO_SLOTS >= PQI_MAX_OUTSTANDING_REQUESTS);
9205*4882a593Smuzhiyun 	BUILD_BUG_ON(PQI_RESERVED_IO_SLOTS >=
9206*4882a593Smuzhiyun 		PQI_MAX_OUTSTANDING_REQUESTS_KDUMP);
9207*4882a593Smuzhiyun }
9208