1*4882a593Smuzhiyun /* SPDX-License-Identifier: GPL-2.0-only */ 2*4882a593Smuzhiyun /* 3*4882a593Smuzhiyun * QLogic iSCSI HBA Driver 4*4882a593Smuzhiyun * Copyright (c) 2003-2013 QLogic Corporation 5*4882a593Smuzhiyun */ 6*4882a593Smuzhiyun 7*4882a593Smuzhiyun #ifndef _QL4XNVRM_H_ 8*4882a593Smuzhiyun #define _QL4XNVRM_H_ 9*4882a593Smuzhiyun 10*4882a593Smuzhiyun /** 11*4882a593Smuzhiyun * AM29LV Flash definitions 12*4882a593Smuzhiyun **/ 13*4882a593Smuzhiyun #define FM93C56A_SIZE_8 0x100 14*4882a593Smuzhiyun #define FM93C56A_SIZE_16 0x80 15*4882a593Smuzhiyun #define FM93C66A_SIZE_8 0x200 16*4882a593Smuzhiyun #define FM93C66A_SIZE_16 0x100/* 4010 */ 17*4882a593Smuzhiyun #define FM93C86A_SIZE_16 0x400/* 4022 */ 18*4882a593Smuzhiyun 19*4882a593Smuzhiyun #define FM93C56A_START 0x1 20*4882a593Smuzhiyun 21*4882a593Smuzhiyun /* Commands */ 22*4882a593Smuzhiyun #define FM93C56A_READ 0x2 23*4882a593Smuzhiyun #define FM93C56A_WEN 0x0 24*4882a593Smuzhiyun #define FM93C56A_WRITE 0x1 25*4882a593Smuzhiyun #define FM93C56A_WRITE_ALL 0x0 26*4882a593Smuzhiyun #define FM93C56A_WDS 0x0 27*4882a593Smuzhiyun #define FM93C56A_ERASE 0x3 28*4882a593Smuzhiyun #define FM93C56A_ERASE_ALL 0x0 29*4882a593Smuzhiyun 30*4882a593Smuzhiyun /* Command Extensions */ 31*4882a593Smuzhiyun #define FM93C56A_WEN_EXT 0x3 32*4882a593Smuzhiyun #define FM93C56A_WRITE_ALL_EXT 0x1 33*4882a593Smuzhiyun #define FM93C56A_WDS_EXT 0x0 34*4882a593Smuzhiyun #define FM93C56A_ERASE_ALL_EXT 0x2 35*4882a593Smuzhiyun 36*4882a593Smuzhiyun /* Address Bits */ 37*4882a593Smuzhiyun #define FM93C56A_NO_ADDR_BITS_16 8 /* 4010 */ 38*4882a593Smuzhiyun #define FM93C56A_NO_ADDR_BITS_8 9 /* 4010 */ 39*4882a593Smuzhiyun #define FM93C86A_NO_ADDR_BITS_16 10 /* 4022 */ 40*4882a593Smuzhiyun 41*4882a593Smuzhiyun /* Data Bits */ 42*4882a593Smuzhiyun #define FM93C56A_DATA_BITS_16 16 43*4882a593Smuzhiyun #define FM93C56A_DATA_BITS_8 8 44*4882a593Smuzhiyun 45*4882a593Smuzhiyun /* Special Bits */ 46*4882a593Smuzhiyun #define FM93C56A_READ_DUMMY_BITS 1 47*4882a593Smuzhiyun #define FM93C56A_READY 0 48*4882a593Smuzhiyun #define FM93C56A_BUSY 1 49*4882a593Smuzhiyun #define FM93C56A_CMD_BITS 2 50*4882a593Smuzhiyun 51*4882a593Smuzhiyun /* Auburn Bits */ 52*4882a593Smuzhiyun #define AUBURN_EEPROM_DI 0x8 53*4882a593Smuzhiyun #define AUBURN_EEPROM_DI_0 0x0 54*4882a593Smuzhiyun #define AUBURN_EEPROM_DI_1 0x8 55*4882a593Smuzhiyun #define AUBURN_EEPROM_DO 0x4 56*4882a593Smuzhiyun #define AUBURN_EEPROM_DO_0 0x0 57*4882a593Smuzhiyun #define AUBURN_EEPROM_DO_1 0x4 58*4882a593Smuzhiyun #define AUBURN_EEPROM_CS 0x2 59*4882a593Smuzhiyun #define AUBURN_EEPROM_CS_0 0x0 60*4882a593Smuzhiyun #define AUBURN_EEPROM_CS_1 0x2 61*4882a593Smuzhiyun #define AUBURN_EEPROM_CLK_RISE 0x1 62*4882a593Smuzhiyun #define AUBURN_EEPROM_CLK_FALL 0x0 63*4882a593Smuzhiyun 64*4882a593Smuzhiyun /**/ 65*4882a593Smuzhiyun /* EEPROM format */ 66*4882a593Smuzhiyun /**/ 67*4882a593Smuzhiyun struct bios_params { 68*4882a593Smuzhiyun uint16_t SpinUpDelay:1; 69*4882a593Smuzhiyun uint16_t BIOSDisable:1; 70*4882a593Smuzhiyun uint16_t MMAPEnable:1; 71*4882a593Smuzhiyun uint16_t BootEnable:1; 72*4882a593Smuzhiyun uint16_t Reserved0:12; 73*4882a593Smuzhiyun uint8_t bootID0:7; 74*4882a593Smuzhiyun uint8_t bootID0Valid:1; 75*4882a593Smuzhiyun uint8_t bootLUN0[8]; 76*4882a593Smuzhiyun uint8_t bootID1:7; 77*4882a593Smuzhiyun uint8_t bootID1Valid:1; 78*4882a593Smuzhiyun uint8_t bootLUN1[8]; 79*4882a593Smuzhiyun uint16_t MaxLunsPerTarget; 80*4882a593Smuzhiyun uint8_t Reserved1[10]; 81*4882a593Smuzhiyun }; 82*4882a593Smuzhiyun 83*4882a593Smuzhiyun struct eeprom_port_cfg { 84*4882a593Smuzhiyun 85*4882a593Smuzhiyun /* MTU MAC 0 */ 86*4882a593Smuzhiyun u16 etherMtu_mac; 87*4882a593Smuzhiyun 88*4882a593Smuzhiyun /* Flow Control MAC 0 */ 89*4882a593Smuzhiyun u16 pauseThreshold_mac; 90*4882a593Smuzhiyun u16 resumeThreshold_mac; 91*4882a593Smuzhiyun u16 reserved[13]; 92*4882a593Smuzhiyun }; 93*4882a593Smuzhiyun 94*4882a593Smuzhiyun struct eeprom_function_cfg { 95*4882a593Smuzhiyun u8 reserved[30]; 96*4882a593Smuzhiyun 97*4882a593Smuzhiyun /* MAC ADDR */ 98*4882a593Smuzhiyun u8 macAddress[6]; 99*4882a593Smuzhiyun u8 macAddressSecondary[6]; 100*4882a593Smuzhiyun u16 subsysVendorId; 101*4882a593Smuzhiyun u16 subsysDeviceId; 102*4882a593Smuzhiyun }; 103*4882a593Smuzhiyun 104*4882a593Smuzhiyun struct eeprom_data { 105*4882a593Smuzhiyun union { 106*4882a593Smuzhiyun struct { /* isp4010 */ 107*4882a593Smuzhiyun u8 asic_id[4]; /* x00 */ 108*4882a593Smuzhiyun u8 version; /* x04 */ 109*4882a593Smuzhiyun u8 reserved; /* x05 */ 110*4882a593Smuzhiyun u16 board_id; /* x06 */ 111*4882a593Smuzhiyun #define EEPROM_BOARDID_ELDORADO 1 112*4882a593Smuzhiyun #define EEPROM_BOARDID_PLACER 2 113*4882a593Smuzhiyun 114*4882a593Smuzhiyun #define EEPROM_SERIAL_NUM_SIZE 16 115*4882a593Smuzhiyun u8 serial_number[EEPROM_SERIAL_NUM_SIZE]; /* x08 */ 116*4882a593Smuzhiyun 117*4882a593Smuzhiyun /* ExtHwConfig: */ 118*4882a593Smuzhiyun /* Offset = 24bytes 119*4882a593Smuzhiyun * 120*4882a593Smuzhiyun * | SSRAM Size| |ST|PD|SDRAM SZ| W| B| SP | | 121*4882a593Smuzhiyun * |15|14|13|12|11|10| 9| 8| 7| 6| 5| 4| 3| 2| 1| 0| 122*4882a593Smuzhiyun * +--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+ 123*4882a593Smuzhiyun */ 124*4882a593Smuzhiyun u16 ext_hw_conf; /* x18 */ 125*4882a593Smuzhiyun u8 mac0[6]; /* x1A */ 126*4882a593Smuzhiyun u8 mac1[6]; /* x20 */ 127*4882a593Smuzhiyun u8 mac2[6]; /* x26 */ 128*4882a593Smuzhiyun u8 mac3[6]; /* x2C */ 129*4882a593Smuzhiyun u16 etherMtu; /* x32 */ 130*4882a593Smuzhiyun u16 macConfig; /* x34 */ 131*4882a593Smuzhiyun #define MAC_CONFIG_ENABLE_ANEG 0x0001 132*4882a593Smuzhiyun #define MAC_CONFIG_ENABLE_PAUSE 0x0002 133*4882a593Smuzhiyun u16 phyConfig; /* x36 */ 134*4882a593Smuzhiyun #define PHY_CONFIG_PHY_ADDR_MASK 0x1f 135*4882a593Smuzhiyun #define PHY_CONFIG_ENABLE_FW_MANAGEMENT_MASK 0x20 136*4882a593Smuzhiyun u16 reserved_56; /* x38 */ 137*4882a593Smuzhiyun 138*4882a593Smuzhiyun #define EEPROM_UNUSED_1_SIZE 2 139*4882a593Smuzhiyun u8 unused_1[EEPROM_UNUSED_1_SIZE]; /* x3A */ 140*4882a593Smuzhiyun u16 bufletSize; /* x3C */ 141*4882a593Smuzhiyun u16 bufletCount; /* x3E */ 142*4882a593Smuzhiyun u16 bufletPauseThreshold; /* x40 */ 143*4882a593Smuzhiyun u16 tcpWindowThreshold50; /* x42 */ 144*4882a593Smuzhiyun u16 tcpWindowThreshold25; /* x44 */ 145*4882a593Smuzhiyun u16 tcpWindowThreshold0; /* x46 */ 146*4882a593Smuzhiyun u16 ipHashTableBaseHi; /* x48 */ 147*4882a593Smuzhiyun u16 ipHashTableBaseLo; /* x4A */ 148*4882a593Smuzhiyun u16 ipHashTableSize; /* x4C */ 149*4882a593Smuzhiyun u16 tcpHashTableBaseHi; /* x4E */ 150*4882a593Smuzhiyun u16 tcpHashTableBaseLo; /* x50 */ 151*4882a593Smuzhiyun u16 tcpHashTableSize; /* x52 */ 152*4882a593Smuzhiyun u16 ncbTableBaseHi; /* x54 */ 153*4882a593Smuzhiyun u16 ncbTableBaseLo; /* x56 */ 154*4882a593Smuzhiyun u16 ncbTableSize; /* x58 */ 155*4882a593Smuzhiyun u16 drbTableBaseHi; /* x5A */ 156*4882a593Smuzhiyun u16 drbTableBaseLo; /* x5C */ 157*4882a593Smuzhiyun u16 drbTableSize; /* x5E */ 158*4882a593Smuzhiyun 159*4882a593Smuzhiyun #define EEPROM_UNUSED_2_SIZE 4 160*4882a593Smuzhiyun u8 unused_2[EEPROM_UNUSED_2_SIZE]; /* x60 */ 161*4882a593Smuzhiyun u16 ipReassemblyTimeout; /* x64 */ 162*4882a593Smuzhiyun u16 tcpMaxWindowSizeHi; /* x66 */ 163*4882a593Smuzhiyun u16 tcpMaxWindowSizeLo; /* x68 */ 164*4882a593Smuzhiyun u32 net_ip_addr0; /* x6A Added for TOE 165*4882a593Smuzhiyun * functionality. */ 166*4882a593Smuzhiyun u32 net_ip_addr1; /* x6E */ 167*4882a593Smuzhiyun u32 scsi_ip_addr0; /* x72 */ 168*4882a593Smuzhiyun u32 scsi_ip_addr1; /* x76 */ 169*4882a593Smuzhiyun #define EEPROM_UNUSED_3_SIZE 128 /* changed from 144 to account 170*4882a593Smuzhiyun * for ip addresses */ 171*4882a593Smuzhiyun u8 unused_3[EEPROM_UNUSED_3_SIZE]; /* x7A */ 172*4882a593Smuzhiyun u16 subsysVendorId_f0; /* xFA */ 173*4882a593Smuzhiyun u16 subsysDeviceId_f0; /* xFC */ 174*4882a593Smuzhiyun 175*4882a593Smuzhiyun /* Address = 0x7F */ 176*4882a593Smuzhiyun #define FM93C56A_SIGNATURE 0x9356 177*4882a593Smuzhiyun #define FM93C66A_SIGNATURE 0x9366 178*4882a593Smuzhiyun u16 signature; /* xFE */ 179*4882a593Smuzhiyun 180*4882a593Smuzhiyun #define EEPROM_UNUSED_4_SIZE 250 181*4882a593Smuzhiyun u8 unused_4[EEPROM_UNUSED_4_SIZE]; /* x100 */ 182*4882a593Smuzhiyun u16 subsysVendorId_f1; /* x1FA */ 183*4882a593Smuzhiyun u16 subsysDeviceId_f1; /* x1FC */ 184*4882a593Smuzhiyun u16 checksum; /* x1FE */ 185*4882a593Smuzhiyun } __attribute__ ((packed)) isp4010; 186*4882a593Smuzhiyun struct { /* isp4022 */ 187*4882a593Smuzhiyun u8 asicId[4]; /* x00 */ 188*4882a593Smuzhiyun u8 version; /* x04 */ 189*4882a593Smuzhiyun u8 reserved_5; /* x05 */ 190*4882a593Smuzhiyun u16 boardId; /* x06 */ 191*4882a593Smuzhiyun u8 boardIdStr[16]; /* x08 */ 192*4882a593Smuzhiyun u8 serialNumber[16]; /* x18 */ 193*4882a593Smuzhiyun 194*4882a593Smuzhiyun /* External Hardware Configuration */ 195*4882a593Smuzhiyun u16 ext_hw_conf; /* x28 */ 196*4882a593Smuzhiyun 197*4882a593Smuzhiyun /* MAC 0 CONFIGURATION */ 198*4882a593Smuzhiyun struct eeprom_port_cfg macCfg_port0; /* x2A */ 199*4882a593Smuzhiyun 200*4882a593Smuzhiyun /* MAC 1 CONFIGURATION */ 201*4882a593Smuzhiyun struct eeprom_port_cfg macCfg_port1; /* x4A */ 202*4882a593Smuzhiyun 203*4882a593Smuzhiyun /* DDR SDRAM Configuration */ 204*4882a593Smuzhiyun u16 bufletSize; /* x6A */ 205*4882a593Smuzhiyun u16 bufletCount; /* x6C */ 206*4882a593Smuzhiyun u16 tcpWindowThreshold50; /* x6E */ 207*4882a593Smuzhiyun u16 tcpWindowThreshold25; /* x70 */ 208*4882a593Smuzhiyun u16 tcpWindowThreshold0; /* x72 */ 209*4882a593Smuzhiyun u16 ipHashTableBaseHi; /* x74 */ 210*4882a593Smuzhiyun u16 ipHashTableBaseLo; /* x76 */ 211*4882a593Smuzhiyun u16 ipHashTableSize; /* x78 */ 212*4882a593Smuzhiyun u16 tcpHashTableBaseHi; /* x7A */ 213*4882a593Smuzhiyun u16 tcpHashTableBaseLo; /* x7C */ 214*4882a593Smuzhiyun u16 tcpHashTableSize; /* x7E */ 215*4882a593Smuzhiyun u16 ncbTableBaseHi; /* x80 */ 216*4882a593Smuzhiyun u16 ncbTableBaseLo; /* x82 */ 217*4882a593Smuzhiyun u16 ncbTableSize; /* x84 */ 218*4882a593Smuzhiyun u16 drbTableBaseHi; /* x86 */ 219*4882a593Smuzhiyun u16 drbTableBaseLo; /* x88 */ 220*4882a593Smuzhiyun u16 drbTableSize; /* x8A */ 221*4882a593Smuzhiyun u16 reserved_142[4]; /* x8C */ 222*4882a593Smuzhiyun 223*4882a593Smuzhiyun /* TCP/IP Parameters */ 224*4882a593Smuzhiyun u16 ipReassemblyTimeout; /* x94 */ 225*4882a593Smuzhiyun u16 tcpMaxWindowSize; /* x96 */ 226*4882a593Smuzhiyun u16 ipSecurity; /* x98 */ 227*4882a593Smuzhiyun u8 reserved_156[294]; /* x9A */ 228*4882a593Smuzhiyun u16 qDebug[8]; /* QLOGIC USE ONLY x1C0 */ 229*4882a593Smuzhiyun struct eeprom_function_cfg funcCfg_fn0; /* x1D0 */ 230*4882a593Smuzhiyun u16 reserved_510; /* x1FE */ 231*4882a593Smuzhiyun 232*4882a593Smuzhiyun /* Address = 512 */ 233*4882a593Smuzhiyun u8 oemSpace[432]; /* x200 */ 234*4882a593Smuzhiyun struct bios_params sBIOSParams_fn1; /* x3B0 */ 235*4882a593Smuzhiyun struct eeprom_function_cfg funcCfg_fn1; /* x3D0 */ 236*4882a593Smuzhiyun u16 reserved_1022; /* x3FE */ 237*4882a593Smuzhiyun 238*4882a593Smuzhiyun /* Address = 1024 */ 239*4882a593Smuzhiyun u8 reserved_1024[464]; /* x400 */ 240*4882a593Smuzhiyun struct eeprom_function_cfg funcCfg_fn2; /* x5D0 */ 241*4882a593Smuzhiyun u16 reserved_1534; /* x5FE */ 242*4882a593Smuzhiyun 243*4882a593Smuzhiyun /* Address = 1536 */ 244*4882a593Smuzhiyun u8 reserved_1536[432]; /* x600 */ 245*4882a593Smuzhiyun struct bios_params sBIOSParams_fn3; /* x7B0 */ 246*4882a593Smuzhiyun struct eeprom_function_cfg funcCfg_fn3; /* x7D0 */ 247*4882a593Smuzhiyun u16 checksum; /* x7FE */ 248*4882a593Smuzhiyun } __attribute__ ((packed)) isp4022; 249*4882a593Smuzhiyun }; 250*4882a593Smuzhiyun }; 251*4882a593Smuzhiyun 252*4882a593Smuzhiyun 253*4882a593Smuzhiyun #endif /* _QL4XNVRM_H_ */ 254