1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0-only
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun * QLogic iSCSI HBA Driver
4*4882a593Smuzhiyun * Copyright (c) 2003-2013 QLogic Corporation
5*4882a593Smuzhiyun */
6*4882a593Smuzhiyun
7*4882a593Smuzhiyun #include "ql4_def.h"
8*4882a593Smuzhiyun #include "ql4_glbl.h"
9*4882a593Smuzhiyun #include "ql4_dbg.h"
10*4882a593Smuzhiyun #include "ql4_inline.h"
11*4882a593Smuzhiyun
eeprom_cmd(uint32_t cmd,struct scsi_qla_host * ha)12*4882a593Smuzhiyun static inline void eeprom_cmd(uint32_t cmd, struct scsi_qla_host *ha)
13*4882a593Smuzhiyun {
14*4882a593Smuzhiyun writel(cmd, isp_nvram(ha));
15*4882a593Smuzhiyun readl(isp_nvram(ha));
16*4882a593Smuzhiyun udelay(1);
17*4882a593Smuzhiyun }
18*4882a593Smuzhiyun
eeprom_size(struct scsi_qla_host * ha)19*4882a593Smuzhiyun static inline int eeprom_size(struct scsi_qla_host *ha)
20*4882a593Smuzhiyun {
21*4882a593Smuzhiyun return is_qla4010(ha) ? FM93C66A_SIZE_16 : FM93C86A_SIZE_16;
22*4882a593Smuzhiyun }
23*4882a593Smuzhiyun
eeprom_no_addr_bits(struct scsi_qla_host * ha)24*4882a593Smuzhiyun static inline int eeprom_no_addr_bits(struct scsi_qla_host *ha)
25*4882a593Smuzhiyun {
26*4882a593Smuzhiyun return is_qla4010(ha) ? FM93C56A_NO_ADDR_BITS_16 :
27*4882a593Smuzhiyun FM93C86A_NO_ADDR_BITS_16 ;
28*4882a593Smuzhiyun }
29*4882a593Smuzhiyun
eeprom_no_data_bits(struct scsi_qla_host * ha)30*4882a593Smuzhiyun static inline int eeprom_no_data_bits(struct scsi_qla_host *ha)
31*4882a593Smuzhiyun {
32*4882a593Smuzhiyun return FM93C56A_DATA_BITS_16;
33*4882a593Smuzhiyun }
34*4882a593Smuzhiyun
fm93c56a_select(struct scsi_qla_host * ha)35*4882a593Smuzhiyun static int fm93c56a_select(struct scsi_qla_host * ha)
36*4882a593Smuzhiyun {
37*4882a593Smuzhiyun DEBUG5(printk(KERN_ERR "fm93c56a_select:\n"));
38*4882a593Smuzhiyun
39*4882a593Smuzhiyun ha->eeprom_cmd_data = AUBURN_EEPROM_CS_1 | 0x000f0000;
40*4882a593Smuzhiyun eeprom_cmd(ha->eeprom_cmd_data, ha);
41*4882a593Smuzhiyun return 1;
42*4882a593Smuzhiyun }
43*4882a593Smuzhiyun
fm93c56a_cmd(struct scsi_qla_host * ha,int cmd,int addr)44*4882a593Smuzhiyun static int fm93c56a_cmd(struct scsi_qla_host * ha, int cmd, int addr)
45*4882a593Smuzhiyun {
46*4882a593Smuzhiyun int i;
47*4882a593Smuzhiyun int mask;
48*4882a593Smuzhiyun int dataBit;
49*4882a593Smuzhiyun int previousBit;
50*4882a593Smuzhiyun
51*4882a593Smuzhiyun /* Clock in a zero, then do the start bit. */
52*4882a593Smuzhiyun eeprom_cmd(ha->eeprom_cmd_data | AUBURN_EEPROM_DO_1, ha);
53*4882a593Smuzhiyun
54*4882a593Smuzhiyun eeprom_cmd(ha->eeprom_cmd_data | AUBURN_EEPROM_DO_1 |
55*4882a593Smuzhiyun AUBURN_EEPROM_CLK_RISE, ha);
56*4882a593Smuzhiyun eeprom_cmd(ha->eeprom_cmd_data | AUBURN_EEPROM_DO_1 |
57*4882a593Smuzhiyun AUBURN_EEPROM_CLK_FALL, ha);
58*4882a593Smuzhiyun
59*4882a593Smuzhiyun mask = 1 << (FM93C56A_CMD_BITS - 1);
60*4882a593Smuzhiyun
61*4882a593Smuzhiyun /* Force the previous data bit to be different. */
62*4882a593Smuzhiyun previousBit = 0xffff;
63*4882a593Smuzhiyun for (i = 0; i < FM93C56A_CMD_BITS; i++) {
64*4882a593Smuzhiyun dataBit =
65*4882a593Smuzhiyun (cmd & mask) ? AUBURN_EEPROM_DO_1 : AUBURN_EEPROM_DO_0;
66*4882a593Smuzhiyun if (previousBit != dataBit) {
67*4882a593Smuzhiyun
68*4882a593Smuzhiyun /*
69*4882a593Smuzhiyun * If the bit changed, then change the DO state to
70*4882a593Smuzhiyun * match.
71*4882a593Smuzhiyun */
72*4882a593Smuzhiyun eeprom_cmd(ha->eeprom_cmd_data | dataBit, ha);
73*4882a593Smuzhiyun previousBit = dataBit;
74*4882a593Smuzhiyun }
75*4882a593Smuzhiyun eeprom_cmd(ha->eeprom_cmd_data | dataBit |
76*4882a593Smuzhiyun AUBURN_EEPROM_CLK_RISE, ha);
77*4882a593Smuzhiyun eeprom_cmd(ha->eeprom_cmd_data | dataBit |
78*4882a593Smuzhiyun AUBURN_EEPROM_CLK_FALL, ha);
79*4882a593Smuzhiyun
80*4882a593Smuzhiyun cmd = cmd << 1;
81*4882a593Smuzhiyun }
82*4882a593Smuzhiyun mask = 1 << (eeprom_no_addr_bits(ha) - 1);
83*4882a593Smuzhiyun
84*4882a593Smuzhiyun /* Force the previous data bit to be different. */
85*4882a593Smuzhiyun previousBit = 0xffff;
86*4882a593Smuzhiyun for (i = 0; i < eeprom_no_addr_bits(ha); i++) {
87*4882a593Smuzhiyun dataBit = addr & mask ? AUBURN_EEPROM_DO_1 :
88*4882a593Smuzhiyun AUBURN_EEPROM_DO_0;
89*4882a593Smuzhiyun if (previousBit != dataBit) {
90*4882a593Smuzhiyun /*
91*4882a593Smuzhiyun * If the bit changed, then change the DO state to
92*4882a593Smuzhiyun * match.
93*4882a593Smuzhiyun */
94*4882a593Smuzhiyun eeprom_cmd(ha->eeprom_cmd_data | dataBit, ha);
95*4882a593Smuzhiyun
96*4882a593Smuzhiyun previousBit = dataBit;
97*4882a593Smuzhiyun }
98*4882a593Smuzhiyun eeprom_cmd(ha->eeprom_cmd_data | dataBit |
99*4882a593Smuzhiyun AUBURN_EEPROM_CLK_RISE, ha);
100*4882a593Smuzhiyun eeprom_cmd(ha->eeprom_cmd_data | dataBit |
101*4882a593Smuzhiyun AUBURN_EEPROM_CLK_FALL, ha);
102*4882a593Smuzhiyun
103*4882a593Smuzhiyun addr = addr << 1;
104*4882a593Smuzhiyun }
105*4882a593Smuzhiyun return 1;
106*4882a593Smuzhiyun }
107*4882a593Smuzhiyun
fm93c56a_deselect(struct scsi_qla_host * ha)108*4882a593Smuzhiyun static int fm93c56a_deselect(struct scsi_qla_host * ha)
109*4882a593Smuzhiyun {
110*4882a593Smuzhiyun ha->eeprom_cmd_data = AUBURN_EEPROM_CS_0 | 0x000f0000;
111*4882a593Smuzhiyun eeprom_cmd(ha->eeprom_cmd_data, ha);
112*4882a593Smuzhiyun return 1;
113*4882a593Smuzhiyun }
114*4882a593Smuzhiyun
fm93c56a_datain(struct scsi_qla_host * ha,unsigned short * value)115*4882a593Smuzhiyun static int fm93c56a_datain(struct scsi_qla_host * ha, unsigned short *value)
116*4882a593Smuzhiyun {
117*4882a593Smuzhiyun int i;
118*4882a593Smuzhiyun int data = 0;
119*4882a593Smuzhiyun int dataBit;
120*4882a593Smuzhiyun
121*4882a593Smuzhiyun /* Read the data bits
122*4882a593Smuzhiyun * The first bit is a dummy. Clock right over it. */
123*4882a593Smuzhiyun for (i = 0; i < eeprom_no_data_bits(ha); i++) {
124*4882a593Smuzhiyun eeprom_cmd(ha->eeprom_cmd_data |
125*4882a593Smuzhiyun AUBURN_EEPROM_CLK_RISE, ha);
126*4882a593Smuzhiyun eeprom_cmd(ha->eeprom_cmd_data |
127*4882a593Smuzhiyun AUBURN_EEPROM_CLK_FALL, ha);
128*4882a593Smuzhiyun
129*4882a593Smuzhiyun dataBit = (readw(isp_nvram(ha)) & AUBURN_EEPROM_DI_1) ? 1 : 0;
130*4882a593Smuzhiyun
131*4882a593Smuzhiyun data = (data << 1) | dataBit;
132*4882a593Smuzhiyun }
133*4882a593Smuzhiyun
134*4882a593Smuzhiyun *value = data;
135*4882a593Smuzhiyun return 1;
136*4882a593Smuzhiyun }
137*4882a593Smuzhiyun
eeprom_readword(int eepromAddr,u16 * value,struct scsi_qla_host * ha)138*4882a593Smuzhiyun static int eeprom_readword(int eepromAddr, u16 * value,
139*4882a593Smuzhiyun struct scsi_qla_host * ha)
140*4882a593Smuzhiyun {
141*4882a593Smuzhiyun fm93c56a_select(ha);
142*4882a593Smuzhiyun fm93c56a_cmd(ha, FM93C56A_READ, eepromAddr);
143*4882a593Smuzhiyun fm93c56a_datain(ha, value);
144*4882a593Smuzhiyun fm93c56a_deselect(ha);
145*4882a593Smuzhiyun return 1;
146*4882a593Smuzhiyun }
147*4882a593Smuzhiyun
148*4882a593Smuzhiyun /* Hardware_lock must be set before calling */
rd_nvram_word(struct scsi_qla_host * ha,int offset)149*4882a593Smuzhiyun u16 rd_nvram_word(struct scsi_qla_host * ha, int offset)
150*4882a593Smuzhiyun {
151*4882a593Smuzhiyun u16 val = 0;
152*4882a593Smuzhiyun
153*4882a593Smuzhiyun /* NOTE: NVRAM uses half-word addresses */
154*4882a593Smuzhiyun eeprom_readword(offset, &val, ha);
155*4882a593Smuzhiyun return val;
156*4882a593Smuzhiyun }
157*4882a593Smuzhiyun
rd_nvram_byte(struct scsi_qla_host * ha,int offset)158*4882a593Smuzhiyun u8 rd_nvram_byte(struct scsi_qla_host *ha, int offset)
159*4882a593Smuzhiyun {
160*4882a593Smuzhiyun u16 val = 0;
161*4882a593Smuzhiyun u8 rval = 0;
162*4882a593Smuzhiyun int index = 0;
163*4882a593Smuzhiyun
164*4882a593Smuzhiyun if (offset & 0x1)
165*4882a593Smuzhiyun index = (offset - 1) / 2;
166*4882a593Smuzhiyun else
167*4882a593Smuzhiyun index = offset / 2;
168*4882a593Smuzhiyun
169*4882a593Smuzhiyun val = le16_to_cpu(rd_nvram_word(ha, index));
170*4882a593Smuzhiyun
171*4882a593Smuzhiyun if (offset & 0x1)
172*4882a593Smuzhiyun rval = (u8)((val & 0xff00) >> 8);
173*4882a593Smuzhiyun else
174*4882a593Smuzhiyun rval = (u8)((val & 0x00ff));
175*4882a593Smuzhiyun
176*4882a593Smuzhiyun return rval;
177*4882a593Smuzhiyun }
178*4882a593Smuzhiyun
qla4xxx_is_nvram_configuration_valid(struct scsi_qla_host * ha)179*4882a593Smuzhiyun int qla4xxx_is_nvram_configuration_valid(struct scsi_qla_host * ha)
180*4882a593Smuzhiyun {
181*4882a593Smuzhiyun int status = QLA_ERROR;
182*4882a593Smuzhiyun uint16_t checksum = 0;
183*4882a593Smuzhiyun uint32_t index;
184*4882a593Smuzhiyun unsigned long flags;
185*4882a593Smuzhiyun
186*4882a593Smuzhiyun spin_lock_irqsave(&ha->hardware_lock, flags);
187*4882a593Smuzhiyun for (index = 0; index < eeprom_size(ha); index++)
188*4882a593Smuzhiyun checksum += rd_nvram_word(ha, index);
189*4882a593Smuzhiyun spin_unlock_irqrestore(&ha->hardware_lock, flags);
190*4882a593Smuzhiyun
191*4882a593Smuzhiyun if (checksum == 0)
192*4882a593Smuzhiyun status = QLA_SUCCESS;
193*4882a593Smuzhiyun
194*4882a593Smuzhiyun return status;
195*4882a593Smuzhiyun }
196*4882a593Smuzhiyun
197*4882a593Smuzhiyun /*************************************************************************
198*4882a593Smuzhiyun *
199*4882a593Smuzhiyun * Hardware Semaphore routines
200*4882a593Smuzhiyun *
201*4882a593Smuzhiyun *************************************************************************/
ql4xxx_sem_spinlock(struct scsi_qla_host * ha,u32 sem_mask,u32 sem_bits)202*4882a593Smuzhiyun int ql4xxx_sem_spinlock(struct scsi_qla_host * ha, u32 sem_mask, u32 sem_bits)
203*4882a593Smuzhiyun {
204*4882a593Smuzhiyun uint32_t value;
205*4882a593Smuzhiyun unsigned long flags;
206*4882a593Smuzhiyun unsigned int seconds = 30;
207*4882a593Smuzhiyun
208*4882a593Smuzhiyun DEBUG2(printk("scsi%ld : Trying to get SEM lock - mask= 0x%x, code = "
209*4882a593Smuzhiyun "0x%x\n", ha->host_no, sem_mask, sem_bits));
210*4882a593Smuzhiyun do {
211*4882a593Smuzhiyun spin_lock_irqsave(&ha->hardware_lock, flags);
212*4882a593Smuzhiyun writel((sem_mask | sem_bits), isp_semaphore(ha));
213*4882a593Smuzhiyun value = readw(isp_semaphore(ha));
214*4882a593Smuzhiyun spin_unlock_irqrestore(&ha->hardware_lock, flags);
215*4882a593Smuzhiyun if ((value & (sem_mask >> 16)) == sem_bits) {
216*4882a593Smuzhiyun DEBUG2(printk("scsi%ld : Got SEM LOCK - mask= 0x%x, "
217*4882a593Smuzhiyun "code = 0x%x\n", ha->host_no,
218*4882a593Smuzhiyun sem_mask, sem_bits));
219*4882a593Smuzhiyun return QLA_SUCCESS;
220*4882a593Smuzhiyun }
221*4882a593Smuzhiyun ssleep(1);
222*4882a593Smuzhiyun } while (--seconds);
223*4882a593Smuzhiyun return QLA_ERROR;
224*4882a593Smuzhiyun }
225*4882a593Smuzhiyun
ql4xxx_sem_unlock(struct scsi_qla_host * ha,u32 sem_mask)226*4882a593Smuzhiyun void ql4xxx_sem_unlock(struct scsi_qla_host * ha, u32 sem_mask)
227*4882a593Smuzhiyun {
228*4882a593Smuzhiyun unsigned long flags;
229*4882a593Smuzhiyun
230*4882a593Smuzhiyun spin_lock_irqsave(&ha->hardware_lock, flags);
231*4882a593Smuzhiyun writel(sem_mask, isp_semaphore(ha));
232*4882a593Smuzhiyun readl(isp_semaphore(ha));
233*4882a593Smuzhiyun spin_unlock_irqrestore(&ha->hardware_lock, flags);
234*4882a593Smuzhiyun
235*4882a593Smuzhiyun DEBUG2(printk("scsi%ld : UNLOCK SEM - mask= 0x%x\n", ha->host_no,
236*4882a593Smuzhiyun sem_mask));
237*4882a593Smuzhiyun }
238*4882a593Smuzhiyun
ql4xxx_sem_lock(struct scsi_qla_host * ha,u32 sem_mask,u32 sem_bits)239*4882a593Smuzhiyun int ql4xxx_sem_lock(struct scsi_qla_host * ha, u32 sem_mask, u32 sem_bits)
240*4882a593Smuzhiyun {
241*4882a593Smuzhiyun uint32_t value;
242*4882a593Smuzhiyun unsigned long flags;
243*4882a593Smuzhiyun
244*4882a593Smuzhiyun spin_lock_irqsave(&ha->hardware_lock, flags);
245*4882a593Smuzhiyun writel((sem_mask | sem_bits), isp_semaphore(ha));
246*4882a593Smuzhiyun value = readw(isp_semaphore(ha));
247*4882a593Smuzhiyun spin_unlock_irqrestore(&ha->hardware_lock, flags);
248*4882a593Smuzhiyun if ((value & (sem_mask >> 16)) == sem_bits) {
249*4882a593Smuzhiyun DEBUG2(printk("scsi%ld : Got SEM LOCK - mask= 0x%x, code = "
250*4882a593Smuzhiyun "0x%x, sema code=0x%x\n", ha->host_no,
251*4882a593Smuzhiyun sem_mask, sem_bits, value));
252*4882a593Smuzhiyun return 1;
253*4882a593Smuzhiyun }
254*4882a593Smuzhiyun return 0;
255*4882a593Smuzhiyun }
256