1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0-or-later
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun * NinjaSCSI-32Bi Cardbus, NinjaSCSI-32UDE PCI/CardBus SCSI driver
4*4882a593Smuzhiyun * Copyright (C) 2001, 2002, 2003
5*4882a593Smuzhiyun * YOKOTA Hiroshi <yokota@netlab.is.tsukuba.ac.jp>
6*4882a593Smuzhiyun * GOTO Masanori <gotom@debian.or.jp>, <gotom@debian.org>
7*4882a593Smuzhiyun *
8*4882a593Smuzhiyun * Revision History:
9*4882a593Smuzhiyun * 1.0: Initial Release.
10*4882a593Smuzhiyun * 1.1: Add /proc SDTR status.
11*4882a593Smuzhiyun * Remove obsolete error handler nsp32_reset.
12*4882a593Smuzhiyun * Some clean up.
13*4882a593Smuzhiyun * 1.2: PowerPC (big endian) support.
14*4882a593Smuzhiyun */
15*4882a593Smuzhiyun
16*4882a593Smuzhiyun #include <linux/module.h>
17*4882a593Smuzhiyun #include <linux/init.h>
18*4882a593Smuzhiyun #include <linux/kernel.h>
19*4882a593Smuzhiyun #include <linux/string.h>
20*4882a593Smuzhiyun #include <linux/timer.h>
21*4882a593Smuzhiyun #include <linux/ioport.h>
22*4882a593Smuzhiyun #include <linux/major.h>
23*4882a593Smuzhiyun #include <linux/blkdev.h>
24*4882a593Smuzhiyun #include <linux/interrupt.h>
25*4882a593Smuzhiyun #include <linux/pci.h>
26*4882a593Smuzhiyun #include <linux/delay.h>
27*4882a593Smuzhiyun #include <linux/ctype.h>
28*4882a593Smuzhiyun #include <linux/dma-mapping.h>
29*4882a593Smuzhiyun
30*4882a593Smuzhiyun #include <asm/dma.h>
31*4882a593Smuzhiyun #include <asm/io.h>
32*4882a593Smuzhiyun
33*4882a593Smuzhiyun #include <scsi/scsi.h>
34*4882a593Smuzhiyun #include <scsi/scsi_cmnd.h>
35*4882a593Smuzhiyun #include <scsi/scsi_device.h>
36*4882a593Smuzhiyun #include <scsi/scsi_host.h>
37*4882a593Smuzhiyun #include <scsi/scsi_ioctl.h>
38*4882a593Smuzhiyun
39*4882a593Smuzhiyun #include "nsp32.h"
40*4882a593Smuzhiyun
41*4882a593Smuzhiyun
42*4882a593Smuzhiyun /***********************************************************************
43*4882a593Smuzhiyun * Module parameters
44*4882a593Smuzhiyun */
45*4882a593Smuzhiyun static int trans_mode = 0; /* default: BIOS */
46*4882a593Smuzhiyun module_param (trans_mode, int, 0);
47*4882a593Smuzhiyun MODULE_PARM_DESC(trans_mode, "transfer mode (0: BIOS(default) 1: Async 2: Ultra20M");
48*4882a593Smuzhiyun #define ASYNC_MODE 1
49*4882a593Smuzhiyun #define ULTRA20M_MODE 2
50*4882a593Smuzhiyun
51*4882a593Smuzhiyun static bool auto_param = 0; /* default: ON */
52*4882a593Smuzhiyun module_param (auto_param, bool, 0);
53*4882a593Smuzhiyun MODULE_PARM_DESC(auto_param, "AutoParameter mode (0: ON(default) 1: OFF)");
54*4882a593Smuzhiyun
55*4882a593Smuzhiyun static bool disc_priv = 1; /* default: OFF */
56*4882a593Smuzhiyun module_param (disc_priv, bool, 0);
57*4882a593Smuzhiyun MODULE_PARM_DESC(disc_priv, "disconnection privilege mode (0: ON 1: OFF(default))");
58*4882a593Smuzhiyun
59*4882a593Smuzhiyun MODULE_AUTHOR("YOKOTA Hiroshi <yokota@netlab.is.tsukuba.ac.jp>, GOTO Masanori <gotom@debian.or.jp>");
60*4882a593Smuzhiyun MODULE_DESCRIPTION("Workbit NinjaSCSI-32Bi/UDE CardBus/PCI SCSI host bus adapter module");
61*4882a593Smuzhiyun MODULE_LICENSE("GPL");
62*4882a593Smuzhiyun
63*4882a593Smuzhiyun static const char *nsp32_release_version = "1.2";
64*4882a593Smuzhiyun
65*4882a593Smuzhiyun
66*4882a593Smuzhiyun /****************************************************************************
67*4882a593Smuzhiyun * Supported hardware
68*4882a593Smuzhiyun */
69*4882a593Smuzhiyun static struct pci_device_id nsp32_pci_table[] = {
70*4882a593Smuzhiyun {
71*4882a593Smuzhiyun .vendor = PCI_VENDOR_ID_IODATA,
72*4882a593Smuzhiyun .device = PCI_DEVICE_ID_NINJASCSI_32BI_CBSC_II,
73*4882a593Smuzhiyun .subvendor = PCI_ANY_ID,
74*4882a593Smuzhiyun .subdevice = PCI_ANY_ID,
75*4882a593Smuzhiyun .driver_data = MODEL_IODATA,
76*4882a593Smuzhiyun },
77*4882a593Smuzhiyun {
78*4882a593Smuzhiyun .vendor = PCI_VENDOR_ID_WORKBIT,
79*4882a593Smuzhiyun .device = PCI_DEVICE_ID_NINJASCSI_32BI_KME,
80*4882a593Smuzhiyun .subvendor = PCI_ANY_ID,
81*4882a593Smuzhiyun .subdevice = PCI_ANY_ID,
82*4882a593Smuzhiyun .driver_data = MODEL_KME,
83*4882a593Smuzhiyun },
84*4882a593Smuzhiyun {
85*4882a593Smuzhiyun .vendor = PCI_VENDOR_ID_WORKBIT,
86*4882a593Smuzhiyun .device = PCI_DEVICE_ID_NINJASCSI_32BI_WBT,
87*4882a593Smuzhiyun .subvendor = PCI_ANY_ID,
88*4882a593Smuzhiyun .subdevice = PCI_ANY_ID,
89*4882a593Smuzhiyun .driver_data = MODEL_WORKBIT,
90*4882a593Smuzhiyun },
91*4882a593Smuzhiyun {
92*4882a593Smuzhiyun .vendor = PCI_VENDOR_ID_WORKBIT,
93*4882a593Smuzhiyun .device = PCI_DEVICE_ID_WORKBIT_STANDARD,
94*4882a593Smuzhiyun .subvendor = PCI_ANY_ID,
95*4882a593Smuzhiyun .subdevice = PCI_ANY_ID,
96*4882a593Smuzhiyun .driver_data = MODEL_PCI_WORKBIT,
97*4882a593Smuzhiyun },
98*4882a593Smuzhiyun {
99*4882a593Smuzhiyun .vendor = PCI_VENDOR_ID_WORKBIT,
100*4882a593Smuzhiyun .device = PCI_DEVICE_ID_NINJASCSI_32BI_LOGITEC,
101*4882a593Smuzhiyun .subvendor = PCI_ANY_ID,
102*4882a593Smuzhiyun .subdevice = PCI_ANY_ID,
103*4882a593Smuzhiyun .driver_data = MODEL_LOGITEC,
104*4882a593Smuzhiyun },
105*4882a593Smuzhiyun {
106*4882a593Smuzhiyun .vendor = PCI_VENDOR_ID_WORKBIT,
107*4882a593Smuzhiyun .device = PCI_DEVICE_ID_NINJASCSI_32BIB_LOGITEC,
108*4882a593Smuzhiyun .subvendor = PCI_ANY_ID,
109*4882a593Smuzhiyun .subdevice = PCI_ANY_ID,
110*4882a593Smuzhiyun .driver_data = MODEL_PCI_LOGITEC,
111*4882a593Smuzhiyun },
112*4882a593Smuzhiyun {
113*4882a593Smuzhiyun .vendor = PCI_VENDOR_ID_WORKBIT,
114*4882a593Smuzhiyun .device = PCI_DEVICE_ID_NINJASCSI_32UDE_MELCO,
115*4882a593Smuzhiyun .subvendor = PCI_ANY_ID,
116*4882a593Smuzhiyun .subdevice = PCI_ANY_ID,
117*4882a593Smuzhiyun .driver_data = MODEL_PCI_MELCO,
118*4882a593Smuzhiyun },
119*4882a593Smuzhiyun {
120*4882a593Smuzhiyun .vendor = PCI_VENDOR_ID_WORKBIT,
121*4882a593Smuzhiyun .device = PCI_DEVICE_ID_NINJASCSI_32UDE_MELCO_II,
122*4882a593Smuzhiyun .subvendor = PCI_ANY_ID,
123*4882a593Smuzhiyun .subdevice = PCI_ANY_ID,
124*4882a593Smuzhiyun .driver_data = MODEL_PCI_MELCO,
125*4882a593Smuzhiyun },
126*4882a593Smuzhiyun {0,0,},
127*4882a593Smuzhiyun };
128*4882a593Smuzhiyun MODULE_DEVICE_TABLE(pci, nsp32_pci_table);
129*4882a593Smuzhiyun
130*4882a593Smuzhiyun static nsp32_hw_data nsp32_data_base; /* probe <-> detect glue */
131*4882a593Smuzhiyun
132*4882a593Smuzhiyun
133*4882a593Smuzhiyun /*
134*4882a593Smuzhiyun * Period/AckWidth speed conversion table
135*4882a593Smuzhiyun *
136*4882a593Smuzhiyun * Note: This period/ackwidth speed table must be in descending order.
137*4882a593Smuzhiyun */
138*4882a593Smuzhiyun static nsp32_sync_table nsp32_sync_table_40M[] = {
139*4882a593Smuzhiyun /* {PNo, AW, SP, EP, SREQ smpl} Speed(MB/s) Period AckWidth */
140*4882a593Smuzhiyun {0x1, 0, 0x0c, 0x0c, SMPL_40M}, /* 20.0 : 50ns, 25ns */
141*4882a593Smuzhiyun {0x2, 0, 0x0d, 0x18, SMPL_40M}, /* 13.3 : 75ns, 25ns */
142*4882a593Smuzhiyun {0x3, 1, 0x19, 0x19, SMPL_40M}, /* 10.0 : 100ns, 50ns */
143*4882a593Smuzhiyun {0x4, 1, 0x1a, 0x1f, SMPL_20M}, /* 8.0 : 125ns, 50ns */
144*4882a593Smuzhiyun {0x5, 2, 0x20, 0x25, SMPL_20M}, /* 6.7 : 150ns, 75ns */
145*4882a593Smuzhiyun {0x6, 2, 0x26, 0x31, SMPL_20M}, /* 5.7 : 175ns, 75ns */
146*4882a593Smuzhiyun {0x7, 3, 0x32, 0x32, SMPL_20M}, /* 5.0 : 200ns, 100ns */
147*4882a593Smuzhiyun {0x8, 3, 0x33, 0x38, SMPL_10M}, /* 4.4 : 225ns, 100ns */
148*4882a593Smuzhiyun {0x9, 3, 0x39, 0x3e, SMPL_10M}, /* 4.0 : 250ns, 100ns */
149*4882a593Smuzhiyun };
150*4882a593Smuzhiyun
151*4882a593Smuzhiyun static nsp32_sync_table nsp32_sync_table_20M[] = {
152*4882a593Smuzhiyun {0x1, 0, 0x19, 0x19, SMPL_40M}, /* 10.0 : 100ns, 50ns */
153*4882a593Smuzhiyun {0x2, 0, 0x1a, 0x25, SMPL_20M}, /* 6.7 : 150ns, 50ns */
154*4882a593Smuzhiyun {0x3, 1, 0x26, 0x32, SMPL_20M}, /* 5.0 : 200ns, 100ns */
155*4882a593Smuzhiyun {0x4, 1, 0x33, 0x3e, SMPL_10M}, /* 4.0 : 250ns, 100ns */
156*4882a593Smuzhiyun {0x5, 2, 0x3f, 0x4b, SMPL_10M}, /* 3.3 : 300ns, 150ns */
157*4882a593Smuzhiyun {0x6, 2, 0x4c, 0x57, SMPL_10M}, /* 2.8 : 350ns, 150ns */
158*4882a593Smuzhiyun {0x7, 3, 0x58, 0x64, SMPL_10M}, /* 2.5 : 400ns, 200ns */
159*4882a593Smuzhiyun {0x8, 3, 0x65, 0x70, SMPL_10M}, /* 2.2 : 450ns, 200ns */
160*4882a593Smuzhiyun {0x9, 3, 0x71, 0x7d, SMPL_10M}, /* 2.0 : 500ns, 200ns */
161*4882a593Smuzhiyun };
162*4882a593Smuzhiyun
163*4882a593Smuzhiyun static nsp32_sync_table nsp32_sync_table_pci[] = {
164*4882a593Smuzhiyun {0x1, 0, 0x0c, 0x0f, SMPL_40M}, /* 16.6 : 60ns, 30ns */
165*4882a593Smuzhiyun {0x2, 0, 0x10, 0x16, SMPL_40M}, /* 11.1 : 90ns, 30ns */
166*4882a593Smuzhiyun {0x3, 1, 0x17, 0x1e, SMPL_20M}, /* 8.3 : 120ns, 60ns */
167*4882a593Smuzhiyun {0x4, 1, 0x1f, 0x25, SMPL_20M}, /* 6.7 : 150ns, 60ns */
168*4882a593Smuzhiyun {0x5, 2, 0x26, 0x2d, SMPL_20M}, /* 5.6 : 180ns, 90ns */
169*4882a593Smuzhiyun {0x6, 2, 0x2e, 0x34, SMPL_10M}, /* 4.8 : 210ns, 90ns */
170*4882a593Smuzhiyun {0x7, 3, 0x35, 0x3c, SMPL_10M}, /* 4.2 : 240ns, 120ns */
171*4882a593Smuzhiyun {0x8, 3, 0x3d, 0x43, SMPL_10M}, /* 3.7 : 270ns, 120ns */
172*4882a593Smuzhiyun {0x9, 3, 0x44, 0x4b, SMPL_10M}, /* 3.3 : 300ns, 120ns */
173*4882a593Smuzhiyun };
174*4882a593Smuzhiyun
175*4882a593Smuzhiyun /*
176*4882a593Smuzhiyun * function declaration
177*4882a593Smuzhiyun */
178*4882a593Smuzhiyun /* module entry point */
179*4882a593Smuzhiyun static int nsp32_probe (struct pci_dev *, const struct pci_device_id *);
180*4882a593Smuzhiyun static void nsp32_remove(struct pci_dev *);
181*4882a593Smuzhiyun static int __init init_nsp32 (void);
182*4882a593Smuzhiyun static void __exit exit_nsp32 (void);
183*4882a593Smuzhiyun
184*4882a593Smuzhiyun /* struct struct scsi_host_template */
185*4882a593Smuzhiyun static int nsp32_show_info (struct seq_file *, struct Scsi_Host *);
186*4882a593Smuzhiyun
187*4882a593Smuzhiyun static int nsp32_detect (struct pci_dev *pdev);
188*4882a593Smuzhiyun static int nsp32_queuecommand(struct Scsi_Host *, struct scsi_cmnd *);
189*4882a593Smuzhiyun static const char *nsp32_info (struct Scsi_Host *);
190*4882a593Smuzhiyun static int nsp32_release (struct Scsi_Host *);
191*4882a593Smuzhiyun
192*4882a593Smuzhiyun /* SCSI error handler */
193*4882a593Smuzhiyun static int nsp32_eh_abort (struct scsi_cmnd *);
194*4882a593Smuzhiyun static int nsp32_eh_host_reset(struct scsi_cmnd *);
195*4882a593Smuzhiyun
196*4882a593Smuzhiyun /* generate SCSI message */
197*4882a593Smuzhiyun static void nsp32_build_identify(struct scsi_cmnd *);
198*4882a593Smuzhiyun static void nsp32_build_nop (struct scsi_cmnd *);
199*4882a593Smuzhiyun static void nsp32_build_reject (struct scsi_cmnd *);
200*4882a593Smuzhiyun static void nsp32_build_sdtr (struct scsi_cmnd *, unsigned char, unsigned char);
201*4882a593Smuzhiyun
202*4882a593Smuzhiyun /* SCSI message handler */
203*4882a593Smuzhiyun static int nsp32_busfree_occur(struct scsi_cmnd *, unsigned short);
204*4882a593Smuzhiyun static void nsp32_msgout_occur (struct scsi_cmnd *);
205*4882a593Smuzhiyun static void nsp32_msgin_occur (struct scsi_cmnd *, unsigned long, unsigned short);
206*4882a593Smuzhiyun
207*4882a593Smuzhiyun static int nsp32_setup_sg_table (struct scsi_cmnd *);
208*4882a593Smuzhiyun static int nsp32_selection_autopara(struct scsi_cmnd *);
209*4882a593Smuzhiyun static int nsp32_selection_autoscsi(struct scsi_cmnd *);
210*4882a593Smuzhiyun static void nsp32_scsi_done (struct scsi_cmnd *);
211*4882a593Smuzhiyun static int nsp32_arbitration (struct scsi_cmnd *, unsigned int);
212*4882a593Smuzhiyun static int nsp32_reselection (struct scsi_cmnd *, unsigned char);
213*4882a593Smuzhiyun static void nsp32_adjust_busfree (struct scsi_cmnd *, unsigned int);
214*4882a593Smuzhiyun static void nsp32_restart_autoscsi (struct scsi_cmnd *, unsigned short);
215*4882a593Smuzhiyun
216*4882a593Smuzhiyun /* SCSI SDTR */
217*4882a593Smuzhiyun static void nsp32_analyze_sdtr (struct scsi_cmnd *);
218*4882a593Smuzhiyun static int nsp32_search_period_entry(nsp32_hw_data *, nsp32_target *, unsigned char);
219*4882a593Smuzhiyun static void nsp32_set_async (nsp32_hw_data *, nsp32_target *);
220*4882a593Smuzhiyun static void nsp32_set_max_sync (nsp32_hw_data *, nsp32_target *, unsigned char *, unsigned char *);
221*4882a593Smuzhiyun static void nsp32_set_sync_entry (nsp32_hw_data *, nsp32_target *, int, unsigned char);
222*4882a593Smuzhiyun
223*4882a593Smuzhiyun /* SCSI bus status handler */
224*4882a593Smuzhiyun static void nsp32_wait_req (nsp32_hw_data *, int);
225*4882a593Smuzhiyun static void nsp32_wait_sack (nsp32_hw_data *, int);
226*4882a593Smuzhiyun static void nsp32_sack_assert (nsp32_hw_data *);
227*4882a593Smuzhiyun static void nsp32_sack_negate (nsp32_hw_data *);
228*4882a593Smuzhiyun static void nsp32_do_bus_reset(nsp32_hw_data *);
229*4882a593Smuzhiyun
230*4882a593Smuzhiyun /* hardware interrupt handler */
231*4882a593Smuzhiyun static irqreturn_t do_nsp32_isr(int, void *);
232*4882a593Smuzhiyun
233*4882a593Smuzhiyun /* initialize hardware */
234*4882a593Smuzhiyun static int nsp32hw_init(nsp32_hw_data *);
235*4882a593Smuzhiyun
236*4882a593Smuzhiyun /* EEPROM handler */
237*4882a593Smuzhiyun static int nsp32_getprom_param (nsp32_hw_data *);
238*4882a593Smuzhiyun static int nsp32_getprom_at24 (nsp32_hw_data *);
239*4882a593Smuzhiyun static int nsp32_getprom_c16 (nsp32_hw_data *);
240*4882a593Smuzhiyun static void nsp32_prom_start (nsp32_hw_data *);
241*4882a593Smuzhiyun static void nsp32_prom_stop (nsp32_hw_data *);
242*4882a593Smuzhiyun static int nsp32_prom_read (nsp32_hw_data *, int);
243*4882a593Smuzhiyun static int nsp32_prom_read_bit (nsp32_hw_data *);
244*4882a593Smuzhiyun static void nsp32_prom_write_bit(nsp32_hw_data *, int);
245*4882a593Smuzhiyun static void nsp32_prom_set (nsp32_hw_data *, int, int);
246*4882a593Smuzhiyun static int nsp32_prom_get (nsp32_hw_data *, int);
247*4882a593Smuzhiyun
248*4882a593Smuzhiyun /* debug/warning/info message */
249*4882a593Smuzhiyun static void nsp32_message (const char *, int, char *, char *, ...);
250*4882a593Smuzhiyun #ifdef NSP32_DEBUG
251*4882a593Smuzhiyun static void nsp32_dmessage(const char *, int, int, char *, ...);
252*4882a593Smuzhiyun #endif
253*4882a593Smuzhiyun
254*4882a593Smuzhiyun /*
255*4882a593Smuzhiyun * max_sectors is currently limited up to 128.
256*4882a593Smuzhiyun */
257*4882a593Smuzhiyun static struct scsi_host_template nsp32_template = {
258*4882a593Smuzhiyun .proc_name = "nsp32",
259*4882a593Smuzhiyun .name = "Workbit NinjaSCSI-32Bi/UDE",
260*4882a593Smuzhiyun .show_info = nsp32_show_info,
261*4882a593Smuzhiyun .info = nsp32_info,
262*4882a593Smuzhiyun .queuecommand = nsp32_queuecommand,
263*4882a593Smuzhiyun .can_queue = 1,
264*4882a593Smuzhiyun .sg_tablesize = NSP32_SG_SIZE,
265*4882a593Smuzhiyun .max_sectors = 128,
266*4882a593Smuzhiyun .this_id = NSP32_HOST_SCSIID,
267*4882a593Smuzhiyun .dma_boundary = PAGE_SIZE - 1,
268*4882a593Smuzhiyun .eh_abort_handler = nsp32_eh_abort,
269*4882a593Smuzhiyun .eh_host_reset_handler = nsp32_eh_host_reset,
270*4882a593Smuzhiyun /* .highmem_io = 1, */
271*4882a593Smuzhiyun };
272*4882a593Smuzhiyun
273*4882a593Smuzhiyun #include "nsp32_io.h"
274*4882a593Smuzhiyun
275*4882a593Smuzhiyun /***********************************************************************
276*4882a593Smuzhiyun * debug, error print
277*4882a593Smuzhiyun */
278*4882a593Smuzhiyun #ifndef NSP32_DEBUG
279*4882a593Smuzhiyun # define NSP32_DEBUG_MASK 0x000000
280*4882a593Smuzhiyun # define nsp32_msg(type, args...) nsp32_message ("", 0, (type), args)
281*4882a593Smuzhiyun # define nsp32_dbg(mask, args...) /* */
282*4882a593Smuzhiyun #else
283*4882a593Smuzhiyun # define NSP32_DEBUG_MASK 0xffffff
284*4882a593Smuzhiyun # define nsp32_msg(type, args...) \
285*4882a593Smuzhiyun nsp32_message (__func__, __LINE__, (type), args)
286*4882a593Smuzhiyun # define nsp32_dbg(mask, args...) \
287*4882a593Smuzhiyun nsp32_dmessage(__func__, __LINE__, (mask), args)
288*4882a593Smuzhiyun #endif
289*4882a593Smuzhiyun
290*4882a593Smuzhiyun #define NSP32_DEBUG_QUEUECOMMAND BIT(0)
291*4882a593Smuzhiyun #define NSP32_DEBUG_REGISTER BIT(1)
292*4882a593Smuzhiyun #define NSP32_DEBUG_AUTOSCSI BIT(2)
293*4882a593Smuzhiyun #define NSP32_DEBUG_INTR BIT(3)
294*4882a593Smuzhiyun #define NSP32_DEBUG_SGLIST BIT(4)
295*4882a593Smuzhiyun #define NSP32_DEBUG_BUSFREE BIT(5)
296*4882a593Smuzhiyun #define NSP32_DEBUG_CDB_CONTENTS BIT(6)
297*4882a593Smuzhiyun #define NSP32_DEBUG_RESELECTION BIT(7)
298*4882a593Smuzhiyun #define NSP32_DEBUG_MSGINOCCUR BIT(8)
299*4882a593Smuzhiyun #define NSP32_DEBUG_EEPROM BIT(9)
300*4882a593Smuzhiyun #define NSP32_DEBUG_MSGOUTOCCUR BIT(10)
301*4882a593Smuzhiyun #define NSP32_DEBUG_BUSRESET BIT(11)
302*4882a593Smuzhiyun #define NSP32_DEBUG_RESTART BIT(12)
303*4882a593Smuzhiyun #define NSP32_DEBUG_SYNC BIT(13)
304*4882a593Smuzhiyun #define NSP32_DEBUG_WAIT BIT(14)
305*4882a593Smuzhiyun #define NSP32_DEBUG_TARGETFLAG BIT(15)
306*4882a593Smuzhiyun #define NSP32_DEBUG_PROC BIT(16)
307*4882a593Smuzhiyun #define NSP32_DEBUG_INIT BIT(17)
308*4882a593Smuzhiyun #define NSP32_SPECIAL_PRINT_REGISTER BIT(20)
309*4882a593Smuzhiyun
310*4882a593Smuzhiyun #define NSP32_DEBUG_BUF_LEN 100
311*4882a593Smuzhiyun
nsp32_message(const char * func,int line,char * type,char * fmt,...)312*4882a593Smuzhiyun static void nsp32_message(const char *func, int line, char *type, char *fmt, ...)
313*4882a593Smuzhiyun {
314*4882a593Smuzhiyun va_list args;
315*4882a593Smuzhiyun char buf[NSP32_DEBUG_BUF_LEN];
316*4882a593Smuzhiyun
317*4882a593Smuzhiyun va_start(args, fmt);
318*4882a593Smuzhiyun vsnprintf(buf, sizeof(buf), fmt, args);
319*4882a593Smuzhiyun va_end(args);
320*4882a593Smuzhiyun
321*4882a593Smuzhiyun #ifndef NSP32_DEBUG
322*4882a593Smuzhiyun printk("%snsp32: %s\n", type, buf);
323*4882a593Smuzhiyun #else
324*4882a593Smuzhiyun printk("%snsp32: %s (%d): %s\n", type, func, line, buf);
325*4882a593Smuzhiyun #endif
326*4882a593Smuzhiyun }
327*4882a593Smuzhiyun
328*4882a593Smuzhiyun #ifdef NSP32_DEBUG
nsp32_dmessage(const char * func,int line,int mask,char * fmt,...)329*4882a593Smuzhiyun static void nsp32_dmessage(const char *func, int line, int mask, char *fmt, ...)
330*4882a593Smuzhiyun {
331*4882a593Smuzhiyun va_list args;
332*4882a593Smuzhiyun char buf[NSP32_DEBUG_BUF_LEN];
333*4882a593Smuzhiyun
334*4882a593Smuzhiyun va_start(args, fmt);
335*4882a593Smuzhiyun vsnprintf(buf, sizeof(buf), fmt, args);
336*4882a593Smuzhiyun va_end(args);
337*4882a593Smuzhiyun
338*4882a593Smuzhiyun if (mask & NSP32_DEBUG_MASK) {
339*4882a593Smuzhiyun printk("nsp32-debug: 0x%x %s (%d): %s\n", mask, func, line, buf);
340*4882a593Smuzhiyun }
341*4882a593Smuzhiyun }
342*4882a593Smuzhiyun #endif
343*4882a593Smuzhiyun
344*4882a593Smuzhiyun #ifdef NSP32_DEBUG
345*4882a593Smuzhiyun # include "nsp32_debug.c"
346*4882a593Smuzhiyun #else
347*4882a593Smuzhiyun # define show_command(arg) /* */
348*4882a593Smuzhiyun # define show_busphase(arg) /* */
349*4882a593Smuzhiyun # define show_autophase(arg) /* */
350*4882a593Smuzhiyun #endif
351*4882a593Smuzhiyun
352*4882a593Smuzhiyun /*
353*4882a593Smuzhiyun * IDENTIFY Message
354*4882a593Smuzhiyun */
nsp32_build_identify(struct scsi_cmnd * SCpnt)355*4882a593Smuzhiyun static void nsp32_build_identify(struct scsi_cmnd *SCpnt)
356*4882a593Smuzhiyun {
357*4882a593Smuzhiyun nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata;
358*4882a593Smuzhiyun int pos = data->msgout_len;
359*4882a593Smuzhiyun int mode = FALSE;
360*4882a593Smuzhiyun
361*4882a593Smuzhiyun /* XXX: Auto DiscPriv detection is progressing... */
362*4882a593Smuzhiyun if (disc_priv == 0) {
363*4882a593Smuzhiyun /* mode = TRUE; */
364*4882a593Smuzhiyun }
365*4882a593Smuzhiyun
366*4882a593Smuzhiyun data->msgoutbuf[pos] = IDENTIFY(mode, SCpnt->device->lun); pos++;
367*4882a593Smuzhiyun
368*4882a593Smuzhiyun data->msgout_len = pos;
369*4882a593Smuzhiyun }
370*4882a593Smuzhiyun
371*4882a593Smuzhiyun /*
372*4882a593Smuzhiyun * SDTR Message Routine
373*4882a593Smuzhiyun */
nsp32_build_sdtr(struct scsi_cmnd * SCpnt,unsigned char period,unsigned char offset)374*4882a593Smuzhiyun static void nsp32_build_sdtr(struct scsi_cmnd *SCpnt,
375*4882a593Smuzhiyun unsigned char period,
376*4882a593Smuzhiyun unsigned char offset)
377*4882a593Smuzhiyun {
378*4882a593Smuzhiyun nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata;
379*4882a593Smuzhiyun int pos = data->msgout_len;
380*4882a593Smuzhiyun
381*4882a593Smuzhiyun data->msgoutbuf[pos] = EXTENDED_MESSAGE; pos++;
382*4882a593Smuzhiyun data->msgoutbuf[pos] = EXTENDED_SDTR_LEN; pos++;
383*4882a593Smuzhiyun data->msgoutbuf[pos] = EXTENDED_SDTR; pos++;
384*4882a593Smuzhiyun data->msgoutbuf[pos] = period; pos++;
385*4882a593Smuzhiyun data->msgoutbuf[pos] = offset; pos++;
386*4882a593Smuzhiyun
387*4882a593Smuzhiyun data->msgout_len = pos;
388*4882a593Smuzhiyun }
389*4882a593Smuzhiyun
390*4882a593Smuzhiyun /*
391*4882a593Smuzhiyun * No Operation Message
392*4882a593Smuzhiyun */
nsp32_build_nop(struct scsi_cmnd * SCpnt)393*4882a593Smuzhiyun static void nsp32_build_nop(struct scsi_cmnd *SCpnt)
394*4882a593Smuzhiyun {
395*4882a593Smuzhiyun nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata;
396*4882a593Smuzhiyun int pos = data->msgout_len;
397*4882a593Smuzhiyun
398*4882a593Smuzhiyun if (pos != 0) {
399*4882a593Smuzhiyun nsp32_msg(KERN_WARNING,
400*4882a593Smuzhiyun "Some messages are already contained!");
401*4882a593Smuzhiyun return;
402*4882a593Smuzhiyun }
403*4882a593Smuzhiyun
404*4882a593Smuzhiyun data->msgoutbuf[pos] = NOP; pos++;
405*4882a593Smuzhiyun data->msgout_len = pos;
406*4882a593Smuzhiyun }
407*4882a593Smuzhiyun
408*4882a593Smuzhiyun /*
409*4882a593Smuzhiyun * Reject Message
410*4882a593Smuzhiyun */
nsp32_build_reject(struct scsi_cmnd * SCpnt)411*4882a593Smuzhiyun static void nsp32_build_reject(struct scsi_cmnd *SCpnt)
412*4882a593Smuzhiyun {
413*4882a593Smuzhiyun nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata;
414*4882a593Smuzhiyun int pos = data->msgout_len;
415*4882a593Smuzhiyun
416*4882a593Smuzhiyun data->msgoutbuf[pos] = MESSAGE_REJECT; pos++;
417*4882a593Smuzhiyun data->msgout_len = pos;
418*4882a593Smuzhiyun }
419*4882a593Smuzhiyun
420*4882a593Smuzhiyun /*
421*4882a593Smuzhiyun * timer
422*4882a593Smuzhiyun */
423*4882a593Smuzhiyun #if 0
424*4882a593Smuzhiyun static void nsp32_start_timer(struct scsi_cmnd *SCpnt, int time)
425*4882a593Smuzhiyun {
426*4882a593Smuzhiyun unsigned int base = SCpnt->host->io_port;
427*4882a593Smuzhiyun
428*4882a593Smuzhiyun nsp32_dbg(NSP32_DEBUG_INTR, "timer=%d", time);
429*4882a593Smuzhiyun
430*4882a593Smuzhiyun if (time & (~TIMER_CNT_MASK)) {
431*4882a593Smuzhiyun nsp32_dbg(NSP32_DEBUG_INTR, "timer set overflow");
432*4882a593Smuzhiyun }
433*4882a593Smuzhiyun
434*4882a593Smuzhiyun nsp32_write2(base, TIMER_SET, time & TIMER_CNT_MASK);
435*4882a593Smuzhiyun }
436*4882a593Smuzhiyun #endif
437*4882a593Smuzhiyun
438*4882a593Smuzhiyun
439*4882a593Smuzhiyun /*
440*4882a593Smuzhiyun * set SCSI command and other parameter to asic, and start selection phase
441*4882a593Smuzhiyun */
nsp32_selection_autopara(struct scsi_cmnd * SCpnt)442*4882a593Smuzhiyun static int nsp32_selection_autopara(struct scsi_cmnd *SCpnt)
443*4882a593Smuzhiyun {
444*4882a593Smuzhiyun nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata;
445*4882a593Smuzhiyun unsigned int base = SCpnt->device->host->io_port;
446*4882a593Smuzhiyun unsigned int host_id = SCpnt->device->host->this_id;
447*4882a593Smuzhiyun unsigned char target = scmd_id(SCpnt);
448*4882a593Smuzhiyun nsp32_autoparam *param = data->autoparam;
449*4882a593Smuzhiyun unsigned char phase;
450*4882a593Smuzhiyun int i, ret;
451*4882a593Smuzhiyun unsigned int msgout;
452*4882a593Smuzhiyun u16_le s;
453*4882a593Smuzhiyun
454*4882a593Smuzhiyun nsp32_dbg(NSP32_DEBUG_AUTOSCSI, "in");
455*4882a593Smuzhiyun
456*4882a593Smuzhiyun /*
457*4882a593Smuzhiyun * check bus free
458*4882a593Smuzhiyun */
459*4882a593Smuzhiyun phase = nsp32_read1(base, SCSI_BUS_MONITOR);
460*4882a593Smuzhiyun if (phase != BUSMON_BUS_FREE) {
461*4882a593Smuzhiyun nsp32_msg(KERN_WARNING, "bus busy");
462*4882a593Smuzhiyun show_busphase(phase & BUSMON_PHASE_MASK);
463*4882a593Smuzhiyun SCpnt->result = DID_BUS_BUSY << 16;
464*4882a593Smuzhiyun return FALSE;
465*4882a593Smuzhiyun }
466*4882a593Smuzhiyun
467*4882a593Smuzhiyun /*
468*4882a593Smuzhiyun * message out
469*4882a593Smuzhiyun *
470*4882a593Smuzhiyun * Note: If the range of msgout_len is 1 - 3, fill scsi_msgout.
471*4882a593Smuzhiyun * over 3 messages needs another routine.
472*4882a593Smuzhiyun */
473*4882a593Smuzhiyun if (data->msgout_len == 0) {
474*4882a593Smuzhiyun nsp32_msg(KERN_ERR, "SCSI MsgOut without any message!");
475*4882a593Smuzhiyun SCpnt->result = DID_ERROR << 16;
476*4882a593Smuzhiyun return FALSE;
477*4882a593Smuzhiyun } else if (data->msgout_len > 0 && data->msgout_len <= 3) {
478*4882a593Smuzhiyun msgout = 0;
479*4882a593Smuzhiyun for (i = 0; i < data->msgout_len; i++) {
480*4882a593Smuzhiyun /*
481*4882a593Smuzhiyun * the sending order of the message is:
482*4882a593Smuzhiyun * MCNT 3: MSG#0 -> MSG#1 -> MSG#2
483*4882a593Smuzhiyun * MCNT 2: MSG#1 -> MSG#2
484*4882a593Smuzhiyun * MCNT 1: MSG#2
485*4882a593Smuzhiyun */
486*4882a593Smuzhiyun msgout >>= 8;
487*4882a593Smuzhiyun msgout |= ((unsigned int)(data->msgoutbuf[i]) << 24);
488*4882a593Smuzhiyun }
489*4882a593Smuzhiyun msgout |= MV_VALID; /* MV valid */
490*4882a593Smuzhiyun msgout |= (unsigned int)data->msgout_len; /* len */
491*4882a593Smuzhiyun } else {
492*4882a593Smuzhiyun /* data->msgout_len > 3 */
493*4882a593Smuzhiyun msgout = 0;
494*4882a593Smuzhiyun }
495*4882a593Smuzhiyun
496*4882a593Smuzhiyun // nsp_dbg(NSP32_DEBUG_AUTOSCSI, "sel time out=0x%x\n", nsp32_read2(base, SEL_TIME_OUT));
497*4882a593Smuzhiyun // nsp32_write2(base, SEL_TIME_OUT, SEL_TIMEOUT_TIME);
498*4882a593Smuzhiyun
499*4882a593Smuzhiyun /*
500*4882a593Smuzhiyun * setup asic parameter
501*4882a593Smuzhiyun */
502*4882a593Smuzhiyun memset(param, 0, sizeof(nsp32_autoparam));
503*4882a593Smuzhiyun
504*4882a593Smuzhiyun /* cdb */
505*4882a593Smuzhiyun for (i = 0; i < SCpnt->cmd_len; i++) {
506*4882a593Smuzhiyun param->cdb[4 * i] = SCpnt->cmnd[i];
507*4882a593Smuzhiyun }
508*4882a593Smuzhiyun
509*4882a593Smuzhiyun /* outgoing messages */
510*4882a593Smuzhiyun param->msgout = cpu_to_le32(msgout);
511*4882a593Smuzhiyun
512*4882a593Smuzhiyun /* syncreg, ackwidth, target id, SREQ sampling rate */
513*4882a593Smuzhiyun param->syncreg = data->cur_target->syncreg;
514*4882a593Smuzhiyun param->ackwidth = data->cur_target->ackwidth;
515*4882a593Smuzhiyun param->target_id = BIT(host_id) | BIT(target);
516*4882a593Smuzhiyun param->sample_reg = data->cur_target->sample_reg;
517*4882a593Smuzhiyun
518*4882a593Smuzhiyun // nsp32_dbg(NSP32_DEBUG_AUTOSCSI, "sample rate=0x%x\n", data->cur_target->sample_reg);
519*4882a593Smuzhiyun
520*4882a593Smuzhiyun /* command control */
521*4882a593Smuzhiyun param->command_control = cpu_to_le16(CLEAR_CDB_FIFO_POINTER |
522*4882a593Smuzhiyun AUTOSCSI_START |
523*4882a593Smuzhiyun AUTO_MSGIN_00_OR_04 |
524*4882a593Smuzhiyun AUTO_MSGIN_02 |
525*4882a593Smuzhiyun AUTO_ATN );
526*4882a593Smuzhiyun
527*4882a593Smuzhiyun
528*4882a593Smuzhiyun /* transfer control */
529*4882a593Smuzhiyun s = 0;
530*4882a593Smuzhiyun switch (data->trans_method) {
531*4882a593Smuzhiyun case NSP32_TRANSFER_BUSMASTER:
532*4882a593Smuzhiyun s |= BM_START;
533*4882a593Smuzhiyun break;
534*4882a593Smuzhiyun case NSP32_TRANSFER_MMIO:
535*4882a593Smuzhiyun s |= CB_MMIO_MODE;
536*4882a593Smuzhiyun break;
537*4882a593Smuzhiyun case NSP32_TRANSFER_PIO:
538*4882a593Smuzhiyun s |= CB_IO_MODE;
539*4882a593Smuzhiyun break;
540*4882a593Smuzhiyun default:
541*4882a593Smuzhiyun nsp32_msg(KERN_ERR, "unknown trans_method");
542*4882a593Smuzhiyun break;
543*4882a593Smuzhiyun }
544*4882a593Smuzhiyun /*
545*4882a593Smuzhiyun * OR-ed BLIEND_MODE, FIFO intr is decreased, instead of PCI bus waits.
546*4882a593Smuzhiyun * For bus master transfer, it's taken off.
547*4882a593Smuzhiyun */
548*4882a593Smuzhiyun s |= (TRANSFER_GO | ALL_COUNTER_CLR);
549*4882a593Smuzhiyun param->transfer_control = cpu_to_le16(s);
550*4882a593Smuzhiyun
551*4882a593Smuzhiyun /* sg table addr */
552*4882a593Smuzhiyun param->sgt_pointer = cpu_to_le32(data->cur_lunt->sglun_paddr);
553*4882a593Smuzhiyun
554*4882a593Smuzhiyun /*
555*4882a593Smuzhiyun * transfer parameter to ASIC
556*4882a593Smuzhiyun */
557*4882a593Smuzhiyun nsp32_write4(base, SGT_ADR, data->auto_paddr);
558*4882a593Smuzhiyun nsp32_write2(base, COMMAND_CONTROL, CLEAR_CDB_FIFO_POINTER |
559*4882a593Smuzhiyun AUTO_PARAMETER );
560*4882a593Smuzhiyun
561*4882a593Smuzhiyun /*
562*4882a593Smuzhiyun * Check arbitration
563*4882a593Smuzhiyun */
564*4882a593Smuzhiyun ret = nsp32_arbitration(SCpnt, base);
565*4882a593Smuzhiyun
566*4882a593Smuzhiyun return ret;
567*4882a593Smuzhiyun }
568*4882a593Smuzhiyun
569*4882a593Smuzhiyun
570*4882a593Smuzhiyun /*
571*4882a593Smuzhiyun * Selection with AUTO SCSI (without AUTO PARAMETER)
572*4882a593Smuzhiyun */
nsp32_selection_autoscsi(struct scsi_cmnd * SCpnt)573*4882a593Smuzhiyun static int nsp32_selection_autoscsi(struct scsi_cmnd *SCpnt)
574*4882a593Smuzhiyun {
575*4882a593Smuzhiyun nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata;
576*4882a593Smuzhiyun unsigned int base = SCpnt->device->host->io_port;
577*4882a593Smuzhiyun unsigned int host_id = SCpnt->device->host->this_id;
578*4882a593Smuzhiyun unsigned char target = scmd_id(SCpnt);
579*4882a593Smuzhiyun unsigned char phase;
580*4882a593Smuzhiyun int status;
581*4882a593Smuzhiyun unsigned short command = 0;
582*4882a593Smuzhiyun unsigned int msgout = 0;
583*4882a593Smuzhiyun unsigned short execph;
584*4882a593Smuzhiyun int i;
585*4882a593Smuzhiyun
586*4882a593Smuzhiyun nsp32_dbg(NSP32_DEBUG_AUTOSCSI, "in");
587*4882a593Smuzhiyun
588*4882a593Smuzhiyun /*
589*4882a593Smuzhiyun * IRQ disable
590*4882a593Smuzhiyun */
591*4882a593Smuzhiyun nsp32_write2(base, IRQ_CONTROL, IRQ_CONTROL_ALL_IRQ_MASK);
592*4882a593Smuzhiyun
593*4882a593Smuzhiyun /*
594*4882a593Smuzhiyun * check bus line
595*4882a593Smuzhiyun */
596*4882a593Smuzhiyun phase = nsp32_read1(base, SCSI_BUS_MONITOR);
597*4882a593Smuzhiyun if ((phase & BUSMON_BSY) || (phase & BUSMON_SEL)) {
598*4882a593Smuzhiyun nsp32_msg(KERN_WARNING, "bus busy");
599*4882a593Smuzhiyun SCpnt->result = DID_BUS_BUSY << 16;
600*4882a593Smuzhiyun status = 1;
601*4882a593Smuzhiyun goto out;
602*4882a593Smuzhiyun }
603*4882a593Smuzhiyun
604*4882a593Smuzhiyun /*
605*4882a593Smuzhiyun * clear execph
606*4882a593Smuzhiyun */
607*4882a593Smuzhiyun execph = nsp32_read2(base, SCSI_EXECUTE_PHASE);
608*4882a593Smuzhiyun
609*4882a593Smuzhiyun /*
610*4882a593Smuzhiyun * clear FIFO counter to set CDBs
611*4882a593Smuzhiyun */
612*4882a593Smuzhiyun nsp32_write2(base, COMMAND_CONTROL, CLEAR_CDB_FIFO_POINTER);
613*4882a593Smuzhiyun
614*4882a593Smuzhiyun /*
615*4882a593Smuzhiyun * set CDB0 - CDB15
616*4882a593Smuzhiyun */
617*4882a593Smuzhiyun for (i = 0; i < SCpnt->cmd_len; i++) {
618*4882a593Smuzhiyun nsp32_write1(base, COMMAND_DATA, SCpnt->cmnd[i]);
619*4882a593Smuzhiyun }
620*4882a593Smuzhiyun nsp32_dbg(NSP32_DEBUG_CDB_CONTENTS, "CDB[0]=[0x%x]", SCpnt->cmnd[0]);
621*4882a593Smuzhiyun
622*4882a593Smuzhiyun /*
623*4882a593Smuzhiyun * set SCSIOUT LATCH(initiator)/TARGET(target) (OR-ed) ID
624*4882a593Smuzhiyun */
625*4882a593Smuzhiyun nsp32_write1(base, SCSI_OUT_LATCH_TARGET_ID, BIT(host_id) | BIT(target));
626*4882a593Smuzhiyun
627*4882a593Smuzhiyun /*
628*4882a593Smuzhiyun * set SCSI MSGOUT REG
629*4882a593Smuzhiyun *
630*4882a593Smuzhiyun * Note: If the range of msgout_len is 1 - 3, fill scsi_msgout.
631*4882a593Smuzhiyun * over 3 messages needs another routine.
632*4882a593Smuzhiyun */
633*4882a593Smuzhiyun if (data->msgout_len == 0) {
634*4882a593Smuzhiyun nsp32_msg(KERN_ERR, "SCSI MsgOut without any message!");
635*4882a593Smuzhiyun SCpnt->result = DID_ERROR << 16;
636*4882a593Smuzhiyun status = 1;
637*4882a593Smuzhiyun goto out;
638*4882a593Smuzhiyun } else if (data->msgout_len > 0 && data->msgout_len <= 3) {
639*4882a593Smuzhiyun msgout = 0;
640*4882a593Smuzhiyun for (i = 0; i < data->msgout_len; i++) {
641*4882a593Smuzhiyun /*
642*4882a593Smuzhiyun * the sending order of the message is:
643*4882a593Smuzhiyun * MCNT 3: MSG#0 -> MSG#1 -> MSG#2
644*4882a593Smuzhiyun * MCNT 2: MSG#1 -> MSG#2
645*4882a593Smuzhiyun * MCNT 1: MSG#2
646*4882a593Smuzhiyun */
647*4882a593Smuzhiyun msgout >>= 8;
648*4882a593Smuzhiyun msgout |= ((unsigned int)(data->msgoutbuf[i]) << 24);
649*4882a593Smuzhiyun }
650*4882a593Smuzhiyun msgout |= MV_VALID; /* MV valid */
651*4882a593Smuzhiyun msgout |= (unsigned int)data->msgout_len; /* len */
652*4882a593Smuzhiyun nsp32_write4(base, SCSI_MSG_OUT, msgout);
653*4882a593Smuzhiyun } else {
654*4882a593Smuzhiyun /* data->msgout_len > 3 */
655*4882a593Smuzhiyun nsp32_write4(base, SCSI_MSG_OUT, 0);
656*4882a593Smuzhiyun }
657*4882a593Smuzhiyun
658*4882a593Smuzhiyun /*
659*4882a593Smuzhiyun * set selection timeout(= 250ms)
660*4882a593Smuzhiyun */
661*4882a593Smuzhiyun nsp32_write2(base, SEL_TIME_OUT, SEL_TIMEOUT_TIME);
662*4882a593Smuzhiyun
663*4882a593Smuzhiyun /*
664*4882a593Smuzhiyun * set SREQ hazard killer sampling rate
665*4882a593Smuzhiyun *
666*4882a593Smuzhiyun * TODO: sample_rate (BASE+0F) is 0 when internal clock = 40MHz.
667*4882a593Smuzhiyun * check other internal clock!
668*4882a593Smuzhiyun */
669*4882a593Smuzhiyun nsp32_write1(base, SREQ_SMPL_RATE, data->cur_target->sample_reg);
670*4882a593Smuzhiyun
671*4882a593Smuzhiyun /*
672*4882a593Smuzhiyun * clear Arbit
673*4882a593Smuzhiyun */
674*4882a593Smuzhiyun nsp32_write1(base, SET_ARBIT, ARBIT_CLEAR);
675*4882a593Smuzhiyun
676*4882a593Smuzhiyun /*
677*4882a593Smuzhiyun * set SYNCREG
678*4882a593Smuzhiyun * Don't set BM_START_ADR before setting this register.
679*4882a593Smuzhiyun */
680*4882a593Smuzhiyun nsp32_write1(base, SYNC_REG, data->cur_target->syncreg);
681*4882a593Smuzhiyun
682*4882a593Smuzhiyun /*
683*4882a593Smuzhiyun * set ACKWIDTH
684*4882a593Smuzhiyun */
685*4882a593Smuzhiyun nsp32_write1(base, ACK_WIDTH, data->cur_target->ackwidth);
686*4882a593Smuzhiyun
687*4882a593Smuzhiyun nsp32_dbg(NSP32_DEBUG_AUTOSCSI,
688*4882a593Smuzhiyun "syncreg=0x%x, ackwidth=0x%x, sgtpaddr=0x%x, id=0x%x",
689*4882a593Smuzhiyun nsp32_read1(base, SYNC_REG), nsp32_read1(base, ACK_WIDTH),
690*4882a593Smuzhiyun nsp32_read4(base, SGT_ADR), nsp32_read1(base, SCSI_OUT_LATCH_TARGET_ID));
691*4882a593Smuzhiyun nsp32_dbg(NSP32_DEBUG_AUTOSCSI, "msgout_len=%d, msgout=0x%x",
692*4882a593Smuzhiyun data->msgout_len, msgout);
693*4882a593Smuzhiyun
694*4882a593Smuzhiyun /*
695*4882a593Smuzhiyun * set SGT ADDR (physical address)
696*4882a593Smuzhiyun */
697*4882a593Smuzhiyun nsp32_write4(base, SGT_ADR, data->cur_lunt->sglun_paddr);
698*4882a593Smuzhiyun
699*4882a593Smuzhiyun /*
700*4882a593Smuzhiyun * set TRANSFER CONTROL REG
701*4882a593Smuzhiyun */
702*4882a593Smuzhiyun command = 0;
703*4882a593Smuzhiyun command |= (TRANSFER_GO | ALL_COUNTER_CLR);
704*4882a593Smuzhiyun if (data->trans_method & NSP32_TRANSFER_BUSMASTER) {
705*4882a593Smuzhiyun if (scsi_bufflen(SCpnt) > 0) {
706*4882a593Smuzhiyun command |= BM_START;
707*4882a593Smuzhiyun }
708*4882a593Smuzhiyun } else if (data->trans_method & NSP32_TRANSFER_MMIO) {
709*4882a593Smuzhiyun command |= CB_MMIO_MODE;
710*4882a593Smuzhiyun } else if (data->trans_method & NSP32_TRANSFER_PIO) {
711*4882a593Smuzhiyun command |= CB_IO_MODE;
712*4882a593Smuzhiyun }
713*4882a593Smuzhiyun nsp32_write2(base, TRANSFER_CONTROL, command);
714*4882a593Smuzhiyun
715*4882a593Smuzhiyun /*
716*4882a593Smuzhiyun * start AUTO SCSI, kick off arbitration
717*4882a593Smuzhiyun */
718*4882a593Smuzhiyun command = (CLEAR_CDB_FIFO_POINTER |
719*4882a593Smuzhiyun AUTOSCSI_START |
720*4882a593Smuzhiyun AUTO_MSGIN_00_OR_04 |
721*4882a593Smuzhiyun AUTO_MSGIN_02 |
722*4882a593Smuzhiyun AUTO_ATN );
723*4882a593Smuzhiyun nsp32_write2(base, COMMAND_CONTROL, command);
724*4882a593Smuzhiyun
725*4882a593Smuzhiyun /*
726*4882a593Smuzhiyun * Check arbitration
727*4882a593Smuzhiyun */
728*4882a593Smuzhiyun status = nsp32_arbitration(SCpnt, base);
729*4882a593Smuzhiyun
730*4882a593Smuzhiyun out:
731*4882a593Smuzhiyun /*
732*4882a593Smuzhiyun * IRQ enable
733*4882a593Smuzhiyun */
734*4882a593Smuzhiyun nsp32_write2(base, IRQ_CONTROL, 0);
735*4882a593Smuzhiyun
736*4882a593Smuzhiyun return status;
737*4882a593Smuzhiyun }
738*4882a593Smuzhiyun
739*4882a593Smuzhiyun
740*4882a593Smuzhiyun /*
741*4882a593Smuzhiyun * Arbitration Status Check
742*4882a593Smuzhiyun *
743*4882a593Smuzhiyun * Note: Arbitration counter is waited during ARBIT_GO is not lifting.
744*4882a593Smuzhiyun * Using udelay(1) consumes CPU time and system time, but
745*4882a593Smuzhiyun * arbitration delay time is defined minimal 2.4us in SCSI
746*4882a593Smuzhiyun * specification, thus udelay works as coarse grained wait timer.
747*4882a593Smuzhiyun */
nsp32_arbitration(struct scsi_cmnd * SCpnt,unsigned int base)748*4882a593Smuzhiyun static int nsp32_arbitration(struct scsi_cmnd *SCpnt, unsigned int base)
749*4882a593Smuzhiyun {
750*4882a593Smuzhiyun unsigned char arbit;
751*4882a593Smuzhiyun int status = TRUE;
752*4882a593Smuzhiyun int time = 0;
753*4882a593Smuzhiyun
754*4882a593Smuzhiyun do {
755*4882a593Smuzhiyun arbit = nsp32_read1(base, ARBIT_STATUS);
756*4882a593Smuzhiyun time++;
757*4882a593Smuzhiyun } while ((arbit & (ARBIT_WIN | ARBIT_FAIL)) == 0 &&
758*4882a593Smuzhiyun (time <= ARBIT_TIMEOUT_TIME));
759*4882a593Smuzhiyun
760*4882a593Smuzhiyun nsp32_dbg(NSP32_DEBUG_AUTOSCSI,
761*4882a593Smuzhiyun "arbit: 0x%x, delay time: %d", arbit, time);
762*4882a593Smuzhiyun
763*4882a593Smuzhiyun if (arbit & ARBIT_WIN) {
764*4882a593Smuzhiyun /* Arbitration succeeded */
765*4882a593Smuzhiyun SCpnt->result = DID_OK << 16;
766*4882a593Smuzhiyun nsp32_index_write1(base, EXT_PORT, LED_ON); /* PCI LED on */
767*4882a593Smuzhiyun } else if (arbit & ARBIT_FAIL) {
768*4882a593Smuzhiyun /* Arbitration failed */
769*4882a593Smuzhiyun SCpnt->result = DID_BUS_BUSY << 16;
770*4882a593Smuzhiyun status = FALSE;
771*4882a593Smuzhiyun } else {
772*4882a593Smuzhiyun /*
773*4882a593Smuzhiyun * unknown error or ARBIT_GO timeout,
774*4882a593Smuzhiyun * something lock up! guess no connection.
775*4882a593Smuzhiyun */
776*4882a593Smuzhiyun nsp32_dbg(NSP32_DEBUG_AUTOSCSI, "arbit timeout");
777*4882a593Smuzhiyun SCpnt->result = DID_NO_CONNECT << 16;
778*4882a593Smuzhiyun status = FALSE;
779*4882a593Smuzhiyun }
780*4882a593Smuzhiyun
781*4882a593Smuzhiyun /*
782*4882a593Smuzhiyun * clear Arbit
783*4882a593Smuzhiyun */
784*4882a593Smuzhiyun nsp32_write1(base, SET_ARBIT, ARBIT_CLEAR);
785*4882a593Smuzhiyun
786*4882a593Smuzhiyun return status;
787*4882a593Smuzhiyun }
788*4882a593Smuzhiyun
789*4882a593Smuzhiyun
790*4882a593Smuzhiyun /*
791*4882a593Smuzhiyun * reselection
792*4882a593Smuzhiyun *
793*4882a593Smuzhiyun * Note: This reselection routine is called from msgin_occur,
794*4882a593Smuzhiyun * reselection target id&lun must be already set.
795*4882a593Smuzhiyun * SCSI-2 says IDENTIFY implies RESTORE_POINTER operation.
796*4882a593Smuzhiyun */
nsp32_reselection(struct scsi_cmnd * SCpnt,unsigned char newlun)797*4882a593Smuzhiyun static int nsp32_reselection(struct scsi_cmnd *SCpnt, unsigned char newlun)
798*4882a593Smuzhiyun {
799*4882a593Smuzhiyun nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata;
800*4882a593Smuzhiyun unsigned int host_id = SCpnt->device->host->this_id;
801*4882a593Smuzhiyun unsigned int base = SCpnt->device->host->io_port;
802*4882a593Smuzhiyun unsigned char tmpid, newid;
803*4882a593Smuzhiyun
804*4882a593Smuzhiyun nsp32_dbg(NSP32_DEBUG_RESELECTION, "enter");
805*4882a593Smuzhiyun
806*4882a593Smuzhiyun /*
807*4882a593Smuzhiyun * calculate reselected SCSI ID
808*4882a593Smuzhiyun */
809*4882a593Smuzhiyun tmpid = nsp32_read1(base, RESELECT_ID);
810*4882a593Smuzhiyun tmpid &= (~BIT(host_id));
811*4882a593Smuzhiyun newid = 0;
812*4882a593Smuzhiyun while (tmpid) {
813*4882a593Smuzhiyun if (tmpid & 1) {
814*4882a593Smuzhiyun break;
815*4882a593Smuzhiyun }
816*4882a593Smuzhiyun tmpid >>= 1;
817*4882a593Smuzhiyun newid++;
818*4882a593Smuzhiyun }
819*4882a593Smuzhiyun
820*4882a593Smuzhiyun /*
821*4882a593Smuzhiyun * If reselected New ID:LUN is not existed
822*4882a593Smuzhiyun * or current nexus is not existed, unexpected
823*4882a593Smuzhiyun * reselection is occurred. Send reject message.
824*4882a593Smuzhiyun */
825*4882a593Smuzhiyun if (newid >= ARRAY_SIZE(data->lunt) || newlun >= ARRAY_SIZE(data->lunt[0])) {
826*4882a593Smuzhiyun nsp32_msg(KERN_WARNING, "unknown id/lun");
827*4882a593Smuzhiyun return FALSE;
828*4882a593Smuzhiyun } else if(data->lunt[newid][newlun].SCpnt == NULL) {
829*4882a593Smuzhiyun nsp32_msg(KERN_WARNING, "no SCSI command is processing");
830*4882a593Smuzhiyun return FALSE;
831*4882a593Smuzhiyun }
832*4882a593Smuzhiyun
833*4882a593Smuzhiyun data->cur_id = newid;
834*4882a593Smuzhiyun data->cur_lun = newlun;
835*4882a593Smuzhiyun data->cur_target = &(data->target[newid]);
836*4882a593Smuzhiyun data->cur_lunt = &(data->lunt[newid][newlun]);
837*4882a593Smuzhiyun
838*4882a593Smuzhiyun /* reset SACK/SavedACK counter (or ALL clear?) */
839*4882a593Smuzhiyun nsp32_write4(base, CLR_COUNTER, CLRCOUNTER_ALLMASK);
840*4882a593Smuzhiyun
841*4882a593Smuzhiyun return TRUE;
842*4882a593Smuzhiyun }
843*4882a593Smuzhiyun
844*4882a593Smuzhiyun
845*4882a593Smuzhiyun /*
846*4882a593Smuzhiyun * nsp32_setup_sg_table - build scatter gather list for transfer data
847*4882a593Smuzhiyun * with bus master.
848*4882a593Smuzhiyun *
849*4882a593Smuzhiyun * Note: NinjaSCSI-32Bi/UDE bus master can not transfer over 64KB at a time.
850*4882a593Smuzhiyun */
nsp32_setup_sg_table(struct scsi_cmnd * SCpnt)851*4882a593Smuzhiyun static int nsp32_setup_sg_table(struct scsi_cmnd *SCpnt)
852*4882a593Smuzhiyun {
853*4882a593Smuzhiyun nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata;
854*4882a593Smuzhiyun struct scatterlist *sg;
855*4882a593Smuzhiyun nsp32_sgtable *sgt = data->cur_lunt->sglun->sgt;
856*4882a593Smuzhiyun int num, i;
857*4882a593Smuzhiyun u32_le l;
858*4882a593Smuzhiyun
859*4882a593Smuzhiyun if (sgt == NULL) {
860*4882a593Smuzhiyun nsp32_dbg(NSP32_DEBUG_SGLIST, "SGT == null");
861*4882a593Smuzhiyun return FALSE;
862*4882a593Smuzhiyun }
863*4882a593Smuzhiyun
864*4882a593Smuzhiyun num = scsi_dma_map(SCpnt);
865*4882a593Smuzhiyun if (!num)
866*4882a593Smuzhiyun return TRUE;
867*4882a593Smuzhiyun else if (num < 0)
868*4882a593Smuzhiyun return FALSE;
869*4882a593Smuzhiyun else {
870*4882a593Smuzhiyun scsi_for_each_sg(SCpnt, sg, num, i) {
871*4882a593Smuzhiyun /*
872*4882a593Smuzhiyun * Build nsp32_sglist, substitute sg dma addresses.
873*4882a593Smuzhiyun */
874*4882a593Smuzhiyun sgt[i].addr = cpu_to_le32(sg_dma_address(sg));
875*4882a593Smuzhiyun sgt[i].len = cpu_to_le32(sg_dma_len(sg));
876*4882a593Smuzhiyun
877*4882a593Smuzhiyun if (le32_to_cpu(sgt[i].len) > 0x10000) {
878*4882a593Smuzhiyun nsp32_msg(KERN_ERR,
879*4882a593Smuzhiyun "can't transfer over 64KB at a time, size=0x%lx", le32_to_cpu(sgt[i].len));
880*4882a593Smuzhiyun return FALSE;
881*4882a593Smuzhiyun }
882*4882a593Smuzhiyun nsp32_dbg(NSP32_DEBUG_SGLIST,
883*4882a593Smuzhiyun "num 0x%x : addr 0x%lx len 0x%lx",
884*4882a593Smuzhiyun i,
885*4882a593Smuzhiyun le32_to_cpu(sgt[i].addr),
886*4882a593Smuzhiyun le32_to_cpu(sgt[i].len ));
887*4882a593Smuzhiyun }
888*4882a593Smuzhiyun
889*4882a593Smuzhiyun /* set end mark */
890*4882a593Smuzhiyun l = le32_to_cpu(sgt[num-1].len);
891*4882a593Smuzhiyun sgt[num-1].len = cpu_to_le32(l | SGTEND);
892*4882a593Smuzhiyun }
893*4882a593Smuzhiyun
894*4882a593Smuzhiyun return TRUE;
895*4882a593Smuzhiyun }
896*4882a593Smuzhiyun
nsp32_queuecommand_lck(struct scsi_cmnd * SCpnt,void (* done)(struct scsi_cmnd *))897*4882a593Smuzhiyun static int nsp32_queuecommand_lck(struct scsi_cmnd *SCpnt, void (*done)(struct scsi_cmnd *))
898*4882a593Smuzhiyun {
899*4882a593Smuzhiyun nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata;
900*4882a593Smuzhiyun nsp32_target *target;
901*4882a593Smuzhiyun nsp32_lunt *cur_lunt;
902*4882a593Smuzhiyun int ret;
903*4882a593Smuzhiyun
904*4882a593Smuzhiyun nsp32_dbg(NSP32_DEBUG_QUEUECOMMAND,
905*4882a593Smuzhiyun "enter. target: 0x%x LUN: 0x%llx cmnd: 0x%x cmndlen: 0x%x "
906*4882a593Smuzhiyun "use_sg: 0x%x reqbuf: 0x%lx reqlen: 0x%x",
907*4882a593Smuzhiyun SCpnt->device->id, SCpnt->device->lun, SCpnt->cmnd[0], SCpnt->cmd_len,
908*4882a593Smuzhiyun scsi_sg_count(SCpnt), scsi_sglist(SCpnt), scsi_bufflen(SCpnt));
909*4882a593Smuzhiyun
910*4882a593Smuzhiyun if (data->CurrentSC != NULL) {
911*4882a593Smuzhiyun nsp32_msg(KERN_ERR, "Currentsc != NULL. Cancel this command request");
912*4882a593Smuzhiyun data->CurrentSC = NULL;
913*4882a593Smuzhiyun SCpnt->result = DID_NO_CONNECT << 16;
914*4882a593Smuzhiyun done(SCpnt);
915*4882a593Smuzhiyun return 0;
916*4882a593Smuzhiyun }
917*4882a593Smuzhiyun
918*4882a593Smuzhiyun /* check target ID is not same as this initiator ID */
919*4882a593Smuzhiyun if (scmd_id(SCpnt) == SCpnt->device->host->this_id) {
920*4882a593Smuzhiyun nsp32_dbg(NSP32_DEBUG_QUEUECOMMAND, "target==host???");
921*4882a593Smuzhiyun SCpnt->result = DID_BAD_TARGET << 16;
922*4882a593Smuzhiyun done(SCpnt);
923*4882a593Smuzhiyun return 0;
924*4882a593Smuzhiyun }
925*4882a593Smuzhiyun
926*4882a593Smuzhiyun /* check target LUN is allowable value */
927*4882a593Smuzhiyun if (SCpnt->device->lun >= MAX_LUN) {
928*4882a593Smuzhiyun nsp32_dbg(NSP32_DEBUG_QUEUECOMMAND, "no more lun");
929*4882a593Smuzhiyun SCpnt->result = DID_BAD_TARGET << 16;
930*4882a593Smuzhiyun done(SCpnt);
931*4882a593Smuzhiyun return 0;
932*4882a593Smuzhiyun }
933*4882a593Smuzhiyun
934*4882a593Smuzhiyun show_command(SCpnt);
935*4882a593Smuzhiyun
936*4882a593Smuzhiyun SCpnt->scsi_done = done;
937*4882a593Smuzhiyun data->CurrentSC = SCpnt;
938*4882a593Smuzhiyun SCpnt->SCp.Status = CHECK_CONDITION;
939*4882a593Smuzhiyun SCpnt->SCp.Message = 0;
940*4882a593Smuzhiyun scsi_set_resid(SCpnt, scsi_bufflen(SCpnt));
941*4882a593Smuzhiyun
942*4882a593Smuzhiyun SCpnt->SCp.ptr = (char *)scsi_sglist(SCpnt);
943*4882a593Smuzhiyun SCpnt->SCp.this_residual = scsi_bufflen(SCpnt);
944*4882a593Smuzhiyun SCpnt->SCp.buffer = NULL;
945*4882a593Smuzhiyun SCpnt->SCp.buffers_residual = 0;
946*4882a593Smuzhiyun
947*4882a593Smuzhiyun /* initialize data */
948*4882a593Smuzhiyun data->msgout_len = 0;
949*4882a593Smuzhiyun data->msgin_len = 0;
950*4882a593Smuzhiyun cur_lunt = &(data->lunt[SCpnt->device->id][SCpnt->device->lun]);
951*4882a593Smuzhiyun cur_lunt->SCpnt = SCpnt;
952*4882a593Smuzhiyun cur_lunt->save_datp = 0;
953*4882a593Smuzhiyun cur_lunt->msgin03 = FALSE;
954*4882a593Smuzhiyun data->cur_lunt = cur_lunt;
955*4882a593Smuzhiyun data->cur_id = SCpnt->device->id;
956*4882a593Smuzhiyun data->cur_lun = SCpnt->device->lun;
957*4882a593Smuzhiyun
958*4882a593Smuzhiyun ret = nsp32_setup_sg_table(SCpnt);
959*4882a593Smuzhiyun if (ret == FALSE) {
960*4882a593Smuzhiyun nsp32_msg(KERN_ERR, "SGT fail");
961*4882a593Smuzhiyun SCpnt->result = DID_ERROR << 16;
962*4882a593Smuzhiyun nsp32_scsi_done(SCpnt);
963*4882a593Smuzhiyun return 0;
964*4882a593Smuzhiyun }
965*4882a593Smuzhiyun
966*4882a593Smuzhiyun /* Build IDENTIFY */
967*4882a593Smuzhiyun nsp32_build_identify(SCpnt);
968*4882a593Smuzhiyun
969*4882a593Smuzhiyun /*
970*4882a593Smuzhiyun * If target is the first time to transfer after the reset
971*4882a593Smuzhiyun * (target don't have SDTR_DONE and SDTR_INITIATOR), sync
972*4882a593Smuzhiyun * message SDTR is needed to do synchronous transfer.
973*4882a593Smuzhiyun */
974*4882a593Smuzhiyun target = &data->target[scmd_id(SCpnt)];
975*4882a593Smuzhiyun data->cur_target = target;
976*4882a593Smuzhiyun
977*4882a593Smuzhiyun if (!(target->sync_flag & (SDTR_DONE | SDTR_INITIATOR | SDTR_TARGET))) {
978*4882a593Smuzhiyun unsigned char period, offset;
979*4882a593Smuzhiyun
980*4882a593Smuzhiyun if (trans_mode != ASYNC_MODE) {
981*4882a593Smuzhiyun nsp32_set_max_sync(data, target, &period, &offset);
982*4882a593Smuzhiyun nsp32_build_sdtr(SCpnt, period, offset);
983*4882a593Smuzhiyun target->sync_flag |= SDTR_INITIATOR;
984*4882a593Smuzhiyun } else {
985*4882a593Smuzhiyun nsp32_set_async(data, target);
986*4882a593Smuzhiyun target->sync_flag |= SDTR_DONE;
987*4882a593Smuzhiyun }
988*4882a593Smuzhiyun
989*4882a593Smuzhiyun nsp32_dbg(NSP32_DEBUG_QUEUECOMMAND,
990*4882a593Smuzhiyun "SDTR: entry: %d start_period: 0x%x offset: 0x%x\n",
991*4882a593Smuzhiyun target->limit_entry, period, offset);
992*4882a593Smuzhiyun } else if (target->sync_flag & SDTR_INITIATOR) {
993*4882a593Smuzhiyun /*
994*4882a593Smuzhiyun * It was negotiating SDTR with target, sending from the
995*4882a593Smuzhiyun * initiator, but there are no chance to remove this flag.
996*4882a593Smuzhiyun * Set async because we don't get proper negotiation.
997*4882a593Smuzhiyun */
998*4882a593Smuzhiyun nsp32_set_async(data, target);
999*4882a593Smuzhiyun target->sync_flag &= ~SDTR_INITIATOR;
1000*4882a593Smuzhiyun target->sync_flag |= SDTR_DONE;
1001*4882a593Smuzhiyun
1002*4882a593Smuzhiyun nsp32_dbg(NSP32_DEBUG_QUEUECOMMAND,
1003*4882a593Smuzhiyun "SDTR_INITIATOR: fall back to async");
1004*4882a593Smuzhiyun } else if (target->sync_flag & SDTR_TARGET) {
1005*4882a593Smuzhiyun /*
1006*4882a593Smuzhiyun * It was negotiating SDTR with target, sending from target,
1007*4882a593Smuzhiyun * but there are no chance to remove this flag. Set async
1008*4882a593Smuzhiyun * because we don't get proper negotiation.
1009*4882a593Smuzhiyun */
1010*4882a593Smuzhiyun nsp32_set_async(data, target);
1011*4882a593Smuzhiyun target->sync_flag &= ~SDTR_TARGET;
1012*4882a593Smuzhiyun target->sync_flag |= SDTR_DONE;
1013*4882a593Smuzhiyun
1014*4882a593Smuzhiyun nsp32_dbg(NSP32_DEBUG_QUEUECOMMAND,
1015*4882a593Smuzhiyun "Unknown SDTR from target is reached, fall back to async.");
1016*4882a593Smuzhiyun }
1017*4882a593Smuzhiyun
1018*4882a593Smuzhiyun nsp32_dbg(NSP32_DEBUG_TARGETFLAG,
1019*4882a593Smuzhiyun "target: %d sync_flag: 0x%x syncreg: 0x%x ackwidth: 0x%x",
1020*4882a593Smuzhiyun SCpnt->device->id, target->sync_flag, target->syncreg,
1021*4882a593Smuzhiyun target->ackwidth);
1022*4882a593Smuzhiyun
1023*4882a593Smuzhiyun /* Selection */
1024*4882a593Smuzhiyun if (auto_param == 0) {
1025*4882a593Smuzhiyun ret = nsp32_selection_autopara(SCpnt);
1026*4882a593Smuzhiyun } else {
1027*4882a593Smuzhiyun ret = nsp32_selection_autoscsi(SCpnt);
1028*4882a593Smuzhiyun }
1029*4882a593Smuzhiyun
1030*4882a593Smuzhiyun if (ret != TRUE) {
1031*4882a593Smuzhiyun nsp32_dbg(NSP32_DEBUG_QUEUECOMMAND, "selection fail");
1032*4882a593Smuzhiyun nsp32_scsi_done(SCpnt);
1033*4882a593Smuzhiyun }
1034*4882a593Smuzhiyun
1035*4882a593Smuzhiyun return 0;
1036*4882a593Smuzhiyun }
1037*4882a593Smuzhiyun
DEF_SCSI_QCMD(nsp32_queuecommand)1038*4882a593Smuzhiyun static DEF_SCSI_QCMD(nsp32_queuecommand)
1039*4882a593Smuzhiyun
1040*4882a593Smuzhiyun /* initialize asic */
1041*4882a593Smuzhiyun static int nsp32hw_init(nsp32_hw_data *data)
1042*4882a593Smuzhiyun {
1043*4882a593Smuzhiyun unsigned int base = data->BaseAddress;
1044*4882a593Smuzhiyun unsigned short irq_stat;
1045*4882a593Smuzhiyun unsigned long lc_reg;
1046*4882a593Smuzhiyun unsigned char power;
1047*4882a593Smuzhiyun
1048*4882a593Smuzhiyun lc_reg = nsp32_index_read4(base, CFG_LATE_CACHE);
1049*4882a593Smuzhiyun if ((lc_reg & 0xff00) == 0) {
1050*4882a593Smuzhiyun lc_reg |= (0x20 << 8);
1051*4882a593Smuzhiyun nsp32_index_write2(base, CFG_LATE_CACHE, lc_reg & 0xffff);
1052*4882a593Smuzhiyun }
1053*4882a593Smuzhiyun
1054*4882a593Smuzhiyun nsp32_write2(base, IRQ_CONTROL, IRQ_CONTROL_ALL_IRQ_MASK);
1055*4882a593Smuzhiyun nsp32_write2(base, TRANSFER_CONTROL, 0);
1056*4882a593Smuzhiyun nsp32_write4(base, BM_CNT, 0);
1057*4882a593Smuzhiyun nsp32_write2(base, SCSI_EXECUTE_PHASE, 0);
1058*4882a593Smuzhiyun
1059*4882a593Smuzhiyun do {
1060*4882a593Smuzhiyun irq_stat = nsp32_read2(base, IRQ_STATUS);
1061*4882a593Smuzhiyun nsp32_dbg(NSP32_DEBUG_INIT, "irq_stat 0x%x", irq_stat);
1062*4882a593Smuzhiyun } while (irq_stat & IRQSTATUS_ANY_IRQ);
1063*4882a593Smuzhiyun
1064*4882a593Smuzhiyun /*
1065*4882a593Smuzhiyun * Fill FIFO_FULL_SHLD, FIFO_EMPTY_SHLD. Below parameter is
1066*4882a593Smuzhiyun * designated by specification.
1067*4882a593Smuzhiyun */
1068*4882a593Smuzhiyun if ((data->trans_method & NSP32_TRANSFER_PIO) ||
1069*4882a593Smuzhiyun (data->trans_method & NSP32_TRANSFER_MMIO)) {
1070*4882a593Smuzhiyun nsp32_index_write1(base, FIFO_FULL_SHLD_COUNT, 0x40);
1071*4882a593Smuzhiyun nsp32_index_write1(base, FIFO_EMPTY_SHLD_COUNT, 0x40);
1072*4882a593Smuzhiyun } else if (data->trans_method & NSP32_TRANSFER_BUSMASTER) {
1073*4882a593Smuzhiyun nsp32_index_write1(base, FIFO_FULL_SHLD_COUNT, 0x10);
1074*4882a593Smuzhiyun nsp32_index_write1(base, FIFO_EMPTY_SHLD_COUNT, 0x60);
1075*4882a593Smuzhiyun } else {
1076*4882a593Smuzhiyun nsp32_dbg(NSP32_DEBUG_INIT, "unknown transfer mode");
1077*4882a593Smuzhiyun }
1078*4882a593Smuzhiyun
1079*4882a593Smuzhiyun nsp32_dbg(NSP32_DEBUG_INIT, "full 0x%x emp 0x%x",
1080*4882a593Smuzhiyun nsp32_index_read1(base, FIFO_FULL_SHLD_COUNT),
1081*4882a593Smuzhiyun nsp32_index_read1(base, FIFO_EMPTY_SHLD_COUNT));
1082*4882a593Smuzhiyun
1083*4882a593Smuzhiyun nsp32_index_write1(base, CLOCK_DIV, data->clock);
1084*4882a593Smuzhiyun nsp32_index_write1(base, BM_CYCLE, MEMRD_CMD1 | SGT_AUTO_PARA_MEMED_CMD);
1085*4882a593Smuzhiyun nsp32_write1(base, PARITY_CONTROL, 0); /* parity check is disable */
1086*4882a593Smuzhiyun
1087*4882a593Smuzhiyun /*
1088*4882a593Smuzhiyun * initialize MISC_WRRD register
1089*4882a593Smuzhiyun *
1090*4882a593Smuzhiyun * Note: Designated parameters is obeyed as following:
1091*4882a593Smuzhiyun * MISC_SCSI_DIRECTION_DETECTOR_SELECT: It must be set.
1092*4882a593Smuzhiyun * MISC_MASTER_TERMINATION_SELECT: It must be set.
1093*4882a593Smuzhiyun * MISC_BMREQ_NEGATE_TIMING_SEL: It should be set.
1094*4882a593Smuzhiyun * MISC_AUTOSEL_TIMING_SEL: It should be set.
1095*4882a593Smuzhiyun * MISC_BMSTOP_CHANGE2_NONDATA_PHASE: It should be set.
1096*4882a593Smuzhiyun * MISC_DELAYED_BMSTART: It's selected for safety.
1097*4882a593Smuzhiyun *
1098*4882a593Smuzhiyun * Note: If MISC_BMSTOP_CHANGE2_NONDATA_PHASE is set, then
1099*4882a593Smuzhiyun * we have to set TRANSFERCONTROL_BM_START as 0 and set
1100*4882a593Smuzhiyun * appropriate value before restarting bus master transfer.
1101*4882a593Smuzhiyun */
1102*4882a593Smuzhiyun nsp32_index_write2(base, MISC_WR,
1103*4882a593Smuzhiyun (SCSI_DIRECTION_DETECTOR_SELECT |
1104*4882a593Smuzhiyun DELAYED_BMSTART |
1105*4882a593Smuzhiyun MASTER_TERMINATION_SELECT |
1106*4882a593Smuzhiyun BMREQ_NEGATE_TIMING_SEL |
1107*4882a593Smuzhiyun AUTOSEL_TIMING_SEL |
1108*4882a593Smuzhiyun BMSTOP_CHANGE2_NONDATA_PHASE));
1109*4882a593Smuzhiyun
1110*4882a593Smuzhiyun nsp32_index_write1(base, TERM_PWR_CONTROL, 0);
1111*4882a593Smuzhiyun power = nsp32_index_read1(base, TERM_PWR_CONTROL);
1112*4882a593Smuzhiyun if (!(power & SENSE)) {
1113*4882a593Smuzhiyun nsp32_msg(KERN_INFO, "term power on");
1114*4882a593Smuzhiyun nsp32_index_write1(base, TERM_PWR_CONTROL, BPWR);
1115*4882a593Smuzhiyun }
1116*4882a593Smuzhiyun
1117*4882a593Smuzhiyun nsp32_write2(base, TIMER_SET, TIMER_STOP);
1118*4882a593Smuzhiyun nsp32_write2(base, TIMER_SET, TIMER_STOP); /* Required 2 times */
1119*4882a593Smuzhiyun
1120*4882a593Smuzhiyun nsp32_write1(base, SYNC_REG, 0);
1121*4882a593Smuzhiyun nsp32_write1(base, ACK_WIDTH, 0);
1122*4882a593Smuzhiyun nsp32_write2(base, SEL_TIME_OUT, SEL_TIMEOUT_TIME);
1123*4882a593Smuzhiyun
1124*4882a593Smuzhiyun /*
1125*4882a593Smuzhiyun * enable to select designated IRQ (except for
1126*4882a593Smuzhiyun * IRQSELECT_SERR, IRQSELECT_PERR, IRQSELECT_BMCNTERR)
1127*4882a593Smuzhiyun */
1128*4882a593Smuzhiyun nsp32_index_write2(base, IRQ_SELECT, IRQSELECT_TIMER_IRQ |
1129*4882a593Smuzhiyun IRQSELECT_SCSIRESET_IRQ |
1130*4882a593Smuzhiyun IRQSELECT_FIFO_SHLD_IRQ |
1131*4882a593Smuzhiyun IRQSELECT_RESELECT_IRQ |
1132*4882a593Smuzhiyun IRQSELECT_PHASE_CHANGE_IRQ |
1133*4882a593Smuzhiyun IRQSELECT_AUTO_SCSI_SEQ_IRQ |
1134*4882a593Smuzhiyun // IRQSELECT_BMCNTERR_IRQ |
1135*4882a593Smuzhiyun IRQSELECT_TARGET_ABORT_IRQ |
1136*4882a593Smuzhiyun IRQSELECT_MASTER_ABORT_IRQ );
1137*4882a593Smuzhiyun nsp32_write2(base, IRQ_CONTROL, 0);
1138*4882a593Smuzhiyun
1139*4882a593Smuzhiyun /* PCI LED off */
1140*4882a593Smuzhiyun nsp32_index_write1(base, EXT_PORT_DDR, LED_OFF);
1141*4882a593Smuzhiyun nsp32_index_write1(base, EXT_PORT, LED_OFF);
1142*4882a593Smuzhiyun
1143*4882a593Smuzhiyun return TRUE;
1144*4882a593Smuzhiyun }
1145*4882a593Smuzhiyun
1146*4882a593Smuzhiyun
1147*4882a593Smuzhiyun /* interrupt routine */
do_nsp32_isr(int irq,void * dev_id)1148*4882a593Smuzhiyun static irqreturn_t do_nsp32_isr(int irq, void *dev_id)
1149*4882a593Smuzhiyun {
1150*4882a593Smuzhiyun nsp32_hw_data *data = dev_id;
1151*4882a593Smuzhiyun unsigned int base = data->BaseAddress;
1152*4882a593Smuzhiyun struct scsi_cmnd *SCpnt = data->CurrentSC;
1153*4882a593Smuzhiyun unsigned short auto_stat, irq_stat, trans_stat;
1154*4882a593Smuzhiyun unsigned char busmon, busphase;
1155*4882a593Smuzhiyun unsigned long flags;
1156*4882a593Smuzhiyun int ret;
1157*4882a593Smuzhiyun int handled = 0;
1158*4882a593Smuzhiyun struct Scsi_Host *host = data->Host;
1159*4882a593Smuzhiyun
1160*4882a593Smuzhiyun spin_lock_irqsave(host->host_lock, flags);
1161*4882a593Smuzhiyun
1162*4882a593Smuzhiyun /*
1163*4882a593Smuzhiyun * IRQ check, then enable IRQ mask
1164*4882a593Smuzhiyun */
1165*4882a593Smuzhiyun irq_stat = nsp32_read2(base, IRQ_STATUS);
1166*4882a593Smuzhiyun nsp32_dbg(NSP32_DEBUG_INTR,
1167*4882a593Smuzhiyun "enter IRQ: %d, IRQstatus: 0x%x", irq, irq_stat);
1168*4882a593Smuzhiyun /* is this interrupt comes from Ninja asic? */
1169*4882a593Smuzhiyun if ((irq_stat & IRQSTATUS_ANY_IRQ) == 0) {
1170*4882a593Smuzhiyun nsp32_dbg(NSP32_DEBUG_INTR, "shared interrupt: irq other 0x%x", irq_stat);
1171*4882a593Smuzhiyun goto out2;
1172*4882a593Smuzhiyun }
1173*4882a593Smuzhiyun handled = 1;
1174*4882a593Smuzhiyun nsp32_write2(base, IRQ_CONTROL, IRQ_CONTROL_ALL_IRQ_MASK);
1175*4882a593Smuzhiyun
1176*4882a593Smuzhiyun busmon = nsp32_read1(base, SCSI_BUS_MONITOR);
1177*4882a593Smuzhiyun busphase = busmon & BUSMON_PHASE_MASK;
1178*4882a593Smuzhiyun
1179*4882a593Smuzhiyun trans_stat = nsp32_read2(base, TRANSFER_STATUS);
1180*4882a593Smuzhiyun if ((irq_stat == 0xffff) && (trans_stat == 0xffff)) {
1181*4882a593Smuzhiyun nsp32_msg(KERN_INFO, "card disconnect");
1182*4882a593Smuzhiyun if (data->CurrentSC != NULL) {
1183*4882a593Smuzhiyun nsp32_msg(KERN_INFO, "clean up current SCSI command");
1184*4882a593Smuzhiyun SCpnt->result = DID_BAD_TARGET << 16;
1185*4882a593Smuzhiyun nsp32_scsi_done(SCpnt);
1186*4882a593Smuzhiyun }
1187*4882a593Smuzhiyun goto out;
1188*4882a593Smuzhiyun }
1189*4882a593Smuzhiyun
1190*4882a593Smuzhiyun /* Timer IRQ */
1191*4882a593Smuzhiyun if (irq_stat & IRQSTATUS_TIMER_IRQ) {
1192*4882a593Smuzhiyun nsp32_dbg(NSP32_DEBUG_INTR, "timer stop");
1193*4882a593Smuzhiyun nsp32_write2(base, TIMER_SET, TIMER_STOP);
1194*4882a593Smuzhiyun goto out;
1195*4882a593Smuzhiyun }
1196*4882a593Smuzhiyun
1197*4882a593Smuzhiyun /* SCSI reset */
1198*4882a593Smuzhiyun if (irq_stat & IRQSTATUS_SCSIRESET_IRQ) {
1199*4882a593Smuzhiyun nsp32_msg(KERN_INFO, "detected someone do bus reset");
1200*4882a593Smuzhiyun nsp32_do_bus_reset(data);
1201*4882a593Smuzhiyun if (SCpnt != NULL) {
1202*4882a593Smuzhiyun SCpnt->result = DID_RESET << 16;
1203*4882a593Smuzhiyun nsp32_scsi_done(SCpnt);
1204*4882a593Smuzhiyun }
1205*4882a593Smuzhiyun goto out;
1206*4882a593Smuzhiyun }
1207*4882a593Smuzhiyun
1208*4882a593Smuzhiyun if (SCpnt == NULL) {
1209*4882a593Smuzhiyun nsp32_msg(KERN_WARNING, "SCpnt==NULL this can't be happened");
1210*4882a593Smuzhiyun nsp32_msg(KERN_WARNING, "irq_stat=0x%x trans_stat=0x%x", irq_stat, trans_stat);
1211*4882a593Smuzhiyun goto out;
1212*4882a593Smuzhiyun }
1213*4882a593Smuzhiyun
1214*4882a593Smuzhiyun /*
1215*4882a593Smuzhiyun * AutoSCSI Interrupt.
1216*4882a593Smuzhiyun * Note: This interrupt is occurred when AutoSCSI is finished. Then
1217*4882a593Smuzhiyun * check SCSIEXECUTEPHASE, and do appropriate action. Each phases are
1218*4882a593Smuzhiyun * recorded when AutoSCSI sequencer has been processed.
1219*4882a593Smuzhiyun */
1220*4882a593Smuzhiyun if(irq_stat & IRQSTATUS_AUTOSCSI_IRQ) {
1221*4882a593Smuzhiyun /* getting SCSI executed phase */
1222*4882a593Smuzhiyun auto_stat = nsp32_read2(base, SCSI_EXECUTE_PHASE);
1223*4882a593Smuzhiyun nsp32_write2(base, SCSI_EXECUTE_PHASE, 0);
1224*4882a593Smuzhiyun
1225*4882a593Smuzhiyun /* Selection Timeout, go busfree phase. */
1226*4882a593Smuzhiyun if (auto_stat & SELECTION_TIMEOUT) {
1227*4882a593Smuzhiyun nsp32_dbg(NSP32_DEBUG_INTR,
1228*4882a593Smuzhiyun "selection timeout occurred");
1229*4882a593Smuzhiyun
1230*4882a593Smuzhiyun SCpnt->result = DID_TIME_OUT << 16;
1231*4882a593Smuzhiyun nsp32_scsi_done(SCpnt);
1232*4882a593Smuzhiyun goto out;
1233*4882a593Smuzhiyun }
1234*4882a593Smuzhiyun
1235*4882a593Smuzhiyun if (auto_stat & MSGOUT_PHASE) {
1236*4882a593Smuzhiyun /*
1237*4882a593Smuzhiyun * MsgOut phase was processed.
1238*4882a593Smuzhiyun * If MSG_IN_OCCUER is not set, then MsgOut phase is
1239*4882a593Smuzhiyun * completed. Thus, msgout_len must reset. Otherwise,
1240*4882a593Smuzhiyun * nothing to do here. If MSG_OUT_OCCUER is occurred,
1241*4882a593Smuzhiyun * then we will encounter the condition and check.
1242*4882a593Smuzhiyun */
1243*4882a593Smuzhiyun if (!(auto_stat & MSG_IN_OCCUER) &&
1244*4882a593Smuzhiyun (data->msgout_len <= 3)) {
1245*4882a593Smuzhiyun /*
1246*4882a593Smuzhiyun * !MSG_IN_OCCUER && msgout_len <=3
1247*4882a593Smuzhiyun * ---> AutoSCSI with MSGOUTreg is processed.
1248*4882a593Smuzhiyun */
1249*4882a593Smuzhiyun data->msgout_len = 0;
1250*4882a593Smuzhiyun }
1251*4882a593Smuzhiyun
1252*4882a593Smuzhiyun nsp32_dbg(NSP32_DEBUG_INTR, "MsgOut phase processed");
1253*4882a593Smuzhiyun }
1254*4882a593Smuzhiyun
1255*4882a593Smuzhiyun if ((auto_stat & DATA_IN_PHASE) &&
1256*4882a593Smuzhiyun (scsi_get_resid(SCpnt) > 0) &&
1257*4882a593Smuzhiyun ((nsp32_read2(base, FIFO_REST_CNT) & FIFO_REST_MASK) != 0)) {
1258*4882a593Smuzhiyun printk( "auto+fifo\n");
1259*4882a593Smuzhiyun //nsp32_pio_read(SCpnt);
1260*4882a593Smuzhiyun }
1261*4882a593Smuzhiyun
1262*4882a593Smuzhiyun if (auto_stat & (DATA_IN_PHASE | DATA_OUT_PHASE)) {
1263*4882a593Smuzhiyun /* DATA_IN_PHASE/DATA_OUT_PHASE was processed. */
1264*4882a593Smuzhiyun nsp32_dbg(NSP32_DEBUG_INTR,
1265*4882a593Smuzhiyun "Data in/out phase processed");
1266*4882a593Smuzhiyun
1267*4882a593Smuzhiyun /* read BMCNT, SGT pointer addr */
1268*4882a593Smuzhiyun nsp32_dbg(NSP32_DEBUG_INTR, "BMCNT=0x%lx",
1269*4882a593Smuzhiyun nsp32_read4(base, BM_CNT));
1270*4882a593Smuzhiyun nsp32_dbg(NSP32_DEBUG_INTR, "addr=0x%lx",
1271*4882a593Smuzhiyun nsp32_read4(base, SGT_ADR));
1272*4882a593Smuzhiyun nsp32_dbg(NSP32_DEBUG_INTR, "SACK=0x%lx",
1273*4882a593Smuzhiyun nsp32_read4(base, SACK_CNT));
1274*4882a593Smuzhiyun nsp32_dbg(NSP32_DEBUG_INTR, "SSACK=0x%lx",
1275*4882a593Smuzhiyun nsp32_read4(base, SAVED_SACK_CNT));
1276*4882a593Smuzhiyun
1277*4882a593Smuzhiyun scsi_set_resid(SCpnt, 0); /* all data transferred! */
1278*4882a593Smuzhiyun }
1279*4882a593Smuzhiyun
1280*4882a593Smuzhiyun /*
1281*4882a593Smuzhiyun * MsgIn Occur
1282*4882a593Smuzhiyun */
1283*4882a593Smuzhiyun if (auto_stat & MSG_IN_OCCUER) {
1284*4882a593Smuzhiyun nsp32_msgin_occur(SCpnt, irq_stat, auto_stat);
1285*4882a593Smuzhiyun }
1286*4882a593Smuzhiyun
1287*4882a593Smuzhiyun /*
1288*4882a593Smuzhiyun * MsgOut Occur
1289*4882a593Smuzhiyun */
1290*4882a593Smuzhiyun if (auto_stat & MSG_OUT_OCCUER) {
1291*4882a593Smuzhiyun nsp32_msgout_occur(SCpnt);
1292*4882a593Smuzhiyun }
1293*4882a593Smuzhiyun
1294*4882a593Smuzhiyun /*
1295*4882a593Smuzhiyun * Bus Free Occur
1296*4882a593Smuzhiyun */
1297*4882a593Smuzhiyun if (auto_stat & BUS_FREE_OCCUER) {
1298*4882a593Smuzhiyun ret = nsp32_busfree_occur(SCpnt, auto_stat);
1299*4882a593Smuzhiyun if (ret == TRUE) {
1300*4882a593Smuzhiyun goto out;
1301*4882a593Smuzhiyun }
1302*4882a593Smuzhiyun }
1303*4882a593Smuzhiyun
1304*4882a593Smuzhiyun if (auto_stat & STATUS_PHASE) {
1305*4882a593Smuzhiyun /*
1306*4882a593Smuzhiyun * Read CSB and substitute CSB for SCpnt->result
1307*4882a593Smuzhiyun * to save status phase stutas byte.
1308*4882a593Smuzhiyun * scsi error handler checks host_byte (DID_*:
1309*4882a593Smuzhiyun * low level driver to indicate status), then checks
1310*4882a593Smuzhiyun * status_byte (SCSI status byte).
1311*4882a593Smuzhiyun */
1312*4882a593Smuzhiyun SCpnt->result = (int)nsp32_read1(base, SCSI_CSB_IN);
1313*4882a593Smuzhiyun }
1314*4882a593Smuzhiyun
1315*4882a593Smuzhiyun if (auto_stat & ILLEGAL_PHASE) {
1316*4882a593Smuzhiyun /* Illegal phase is detected. SACK is not back. */
1317*4882a593Smuzhiyun nsp32_msg(KERN_WARNING,
1318*4882a593Smuzhiyun "AUTO SCSI ILLEGAL PHASE OCCUR!!!!");
1319*4882a593Smuzhiyun
1320*4882a593Smuzhiyun /* TODO: currently we don't have any action... bus reset? */
1321*4882a593Smuzhiyun
1322*4882a593Smuzhiyun /*
1323*4882a593Smuzhiyun * To send back SACK, assert, wait, and negate.
1324*4882a593Smuzhiyun */
1325*4882a593Smuzhiyun nsp32_sack_assert(data);
1326*4882a593Smuzhiyun nsp32_wait_req(data, NEGATE);
1327*4882a593Smuzhiyun nsp32_sack_negate(data);
1328*4882a593Smuzhiyun
1329*4882a593Smuzhiyun }
1330*4882a593Smuzhiyun
1331*4882a593Smuzhiyun if (auto_stat & COMMAND_PHASE) {
1332*4882a593Smuzhiyun /* nothing to do */
1333*4882a593Smuzhiyun nsp32_dbg(NSP32_DEBUG_INTR, "Command phase processed");
1334*4882a593Smuzhiyun }
1335*4882a593Smuzhiyun
1336*4882a593Smuzhiyun if (auto_stat & AUTOSCSI_BUSY) {
1337*4882a593Smuzhiyun /* AutoSCSI is running */
1338*4882a593Smuzhiyun }
1339*4882a593Smuzhiyun
1340*4882a593Smuzhiyun show_autophase(auto_stat);
1341*4882a593Smuzhiyun }
1342*4882a593Smuzhiyun
1343*4882a593Smuzhiyun /* FIFO_SHLD_IRQ */
1344*4882a593Smuzhiyun if (irq_stat & IRQSTATUS_FIFO_SHLD_IRQ) {
1345*4882a593Smuzhiyun nsp32_dbg(NSP32_DEBUG_INTR, "FIFO IRQ");
1346*4882a593Smuzhiyun
1347*4882a593Smuzhiyun switch(busphase) {
1348*4882a593Smuzhiyun case BUSPHASE_DATA_OUT:
1349*4882a593Smuzhiyun nsp32_dbg(NSP32_DEBUG_INTR, "fifo/write");
1350*4882a593Smuzhiyun
1351*4882a593Smuzhiyun //nsp32_pio_write(SCpnt);
1352*4882a593Smuzhiyun
1353*4882a593Smuzhiyun break;
1354*4882a593Smuzhiyun
1355*4882a593Smuzhiyun case BUSPHASE_DATA_IN:
1356*4882a593Smuzhiyun nsp32_dbg(NSP32_DEBUG_INTR, "fifo/read");
1357*4882a593Smuzhiyun
1358*4882a593Smuzhiyun //nsp32_pio_read(SCpnt);
1359*4882a593Smuzhiyun
1360*4882a593Smuzhiyun break;
1361*4882a593Smuzhiyun
1362*4882a593Smuzhiyun case BUSPHASE_STATUS:
1363*4882a593Smuzhiyun nsp32_dbg(NSP32_DEBUG_INTR, "fifo/status");
1364*4882a593Smuzhiyun
1365*4882a593Smuzhiyun SCpnt->SCp.Status = nsp32_read1(base, SCSI_CSB_IN);
1366*4882a593Smuzhiyun
1367*4882a593Smuzhiyun break;
1368*4882a593Smuzhiyun default:
1369*4882a593Smuzhiyun nsp32_dbg(NSP32_DEBUG_INTR, "fifo/other phase");
1370*4882a593Smuzhiyun nsp32_dbg(NSP32_DEBUG_INTR, "irq_stat=0x%x trans_stat=0x%x", irq_stat, trans_stat);
1371*4882a593Smuzhiyun show_busphase(busphase);
1372*4882a593Smuzhiyun break;
1373*4882a593Smuzhiyun }
1374*4882a593Smuzhiyun
1375*4882a593Smuzhiyun goto out;
1376*4882a593Smuzhiyun }
1377*4882a593Smuzhiyun
1378*4882a593Smuzhiyun /* Phase Change IRQ */
1379*4882a593Smuzhiyun if (irq_stat & IRQSTATUS_PHASE_CHANGE_IRQ) {
1380*4882a593Smuzhiyun nsp32_dbg(NSP32_DEBUG_INTR, "phase change IRQ");
1381*4882a593Smuzhiyun
1382*4882a593Smuzhiyun switch(busphase) {
1383*4882a593Smuzhiyun case BUSPHASE_MESSAGE_IN:
1384*4882a593Smuzhiyun nsp32_dbg(NSP32_DEBUG_INTR, "phase chg/msg in");
1385*4882a593Smuzhiyun nsp32_msgin_occur(SCpnt, irq_stat, 0);
1386*4882a593Smuzhiyun break;
1387*4882a593Smuzhiyun default:
1388*4882a593Smuzhiyun nsp32_msg(KERN_WARNING, "phase chg/other phase?");
1389*4882a593Smuzhiyun nsp32_msg(KERN_WARNING, "irq_stat=0x%x trans_stat=0x%x\n",
1390*4882a593Smuzhiyun irq_stat, trans_stat);
1391*4882a593Smuzhiyun show_busphase(busphase);
1392*4882a593Smuzhiyun break;
1393*4882a593Smuzhiyun }
1394*4882a593Smuzhiyun goto out;
1395*4882a593Smuzhiyun }
1396*4882a593Smuzhiyun
1397*4882a593Smuzhiyun /* PCI_IRQ */
1398*4882a593Smuzhiyun if (irq_stat & IRQSTATUS_PCI_IRQ) {
1399*4882a593Smuzhiyun nsp32_dbg(NSP32_DEBUG_INTR, "PCI IRQ occurred");
1400*4882a593Smuzhiyun /* Do nothing */
1401*4882a593Smuzhiyun }
1402*4882a593Smuzhiyun
1403*4882a593Smuzhiyun /* BMCNTERR_IRQ */
1404*4882a593Smuzhiyun if (irq_stat & IRQSTATUS_BMCNTERR_IRQ) {
1405*4882a593Smuzhiyun nsp32_msg(KERN_ERR, "Received unexpected BMCNTERR IRQ! ");
1406*4882a593Smuzhiyun /*
1407*4882a593Smuzhiyun * TODO: To be implemented improving bus master
1408*4882a593Smuzhiyun * transfer reliability when BMCNTERR is occurred in
1409*4882a593Smuzhiyun * AutoSCSI phase described in specification.
1410*4882a593Smuzhiyun */
1411*4882a593Smuzhiyun }
1412*4882a593Smuzhiyun
1413*4882a593Smuzhiyun #if 0
1414*4882a593Smuzhiyun nsp32_dbg(NSP32_DEBUG_INTR,
1415*4882a593Smuzhiyun "irq_stat=0x%x trans_stat=0x%x", irq_stat, trans_stat);
1416*4882a593Smuzhiyun show_busphase(busphase);
1417*4882a593Smuzhiyun #endif
1418*4882a593Smuzhiyun
1419*4882a593Smuzhiyun out:
1420*4882a593Smuzhiyun /* disable IRQ mask */
1421*4882a593Smuzhiyun nsp32_write2(base, IRQ_CONTROL, 0);
1422*4882a593Smuzhiyun
1423*4882a593Smuzhiyun out2:
1424*4882a593Smuzhiyun spin_unlock_irqrestore(host->host_lock, flags);
1425*4882a593Smuzhiyun
1426*4882a593Smuzhiyun nsp32_dbg(NSP32_DEBUG_INTR, "exit");
1427*4882a593Smuzhiyun
1428*4882a593Smuzhiyun return IRQ_RETVAL(handled);
1429*4882a593Smuzhiyun }
1430*4882a593Smuzhiyun
1431*4882a593Smuzhiyun
nsp32_show_info(struct seq_file * m,struct Scsi_Host * host)1432*4882a593Smuzhiyun static int nsp32_show_info(struct seq_file *m, struct Scsi_Host *host)
1433*4882a593Smuzhiyun {
1434*4882a593Smuzhiyun unsigned long flags;
1435*4882a593Smuzhiyun nsp32_hw_data *data;
1436*4882a593Smuzhiyun int hostno;
1437*4882a593Smuzhiyun unsigned int base;
1438*4882a593Smuzhiyun unsigned char mode_reg;
1439*4882a593Smuzhiyun int id, speed;
1440*4882a593Smuzhiyun long model;
1441*4882a593Smuzhiyun
1442*4882a593Smuzhiyun hostno = host->host_no;
1443*4882a593Smuzhiyun data = (nsp32_hw_data *)host->hostdata;
1444*4882a593Smuzhiyun base = host->io_port;
1445*4882a593Smuzhiyun
1446*4882a593Smuzhiyun seq_puts(m, "NinjaSCSI-32 status\n\n");
1447*4882a593Smuzhiyun seq_printf(m, "Driver version: %s, $Revision: 1.33 $\n", nsp32_release_version);
1448*4882a593Smuzhiyun seq_printf(m, "SCSI host No.: %d\n", hostno);
1449*4882a593Smuzhiyun seq_printf(m, "IRQ: %d\n", host->irq);
1450*4882a593Smuzhiyun seq_printf(m, "IO: 0x%lx-0x%lx\n", host->io_port, host->io_port + host->n_io_port - 1);
1451*4882a593Smuzhiyun seq_printf(m, "MMIO(virtual address): 0x%lx-0x%lx\n", host->base, host->base + data->MmioLength - 1);
1452*4882a593Smuzhiyun seq_printf(m, "sg_tablesize: %d\n", host->sg_tablesize);
1453*4882a593Smuzhiyun seq_printf(m, "Chip revision: 0x%x\n", (nsp32_read2(base, INDEX_REG) >> 8) & 0xff);
1454*4882a593Smuzhiyun
1455*4882a593Smuzhiyun mode_reg = nsp32_index_read1(base, CHIP_MODE);
1456*4882a593Smuzhiyun model = data->pci_devid->driver_data;
1457*4882a593Smuzhiyun
1458*4882a593Smuzhiyun #ifdef CONFIG_PM
1459*4882a593Smuzhiyun seq_printf(m, "Power Management: %s\n", (mode_reg & OPTF) ? "yes" : "no");
1460*4882a593Smuzhiyun #endif
1461*4882a593Smuzhiyun seq_printf(m, "OEM: %ld, %s\n", (mode_reg & (OEM0|OEM1)), nsp32_model[model]);
1462*4882a593Smuzhiyun
1463*4882a593Smuzhiyun spin_lock_irqsave(&(data->Lock), flags);
1464*4882a593Smuzhiyun seq_printf(m, "CurrentSC: 0x%p\n\n", data->CurrentSC);
1465*4882a593Smuzhiyun spin_unlock_irqrestore(&(data->Lock), flags);
1466*4882a593Smuzhiyun
1467*4882a593Smuzhiyun
1468*4882a593Smuzhiyun seq_puts(m, "SDTR status\n");
1469*4882a593Smuzhiyun for (id = 0; id < ARRAY_SIZE(data->target); id++) {
1470*4882a593Smuzhiyun
1471*4882a593Smuzhiyun seq_printf(m, "id %d: ", id);
1472*4882a593Smuzhiyun
1473*4882a593Smuzhiyun if (id == host->this_id) {
1474*4882a593Smuzhiyun seq_puts(m, "----- NinjaSCSI-32 host adapter\n");
1475*4882a593Smuzhiyun continue;
1476*4882a593Smuzhiyun }
1477*4882a593Smuzhiyun
1478*4882a593Smuzhiyun if (data->target[id].sync_flag == SDTR_DONE) {
1479*4882a593Smuzhiyun if (data->target[id].period == 0 &&
1480*4882a593Smuzhiyun data->target[id].offset == ASYNC_OFFSET ) {
1481*4882a593Smuzhiyun seq_puts(m, "async");
1482*4882a593Smuzhiyun } else {
1483*4882a593Smuzhiyun seq_puts(m, " sync");
1484*4882a593Smuzhiyun }
1485*4882a593Smuzhiyun } else {
1486*4882a593Smuzhiyun seq_puts(m, " none");
1487*4882a593Smuzhiyun }
1488*4882a593Smuzhiyun
1489*4882a593Smuzhiyun if (data->target[id].period != 0) {
1490*4882a593Smuzhiyun
1491*4882a593Smuzhiyun speed = 1000000 / (data->target[id].period * 4);
1492*4882a593Smuzhiyun
1493*4882a593Smuzhiyun seq_printf(m, " transfer %d.%dMB/s, offset %d",
1494*4882a593Smuzhiyun speed / 1000,
1495*4882a593Smuzhiyun speed % 1000,
1496*4882a593Smuzhiyun data->target[id].offset
1497*4882a593Smuzhiyun );
1498*4882a593Smuzhiyun }
1499*4882a593Smuzhiyun seq_putc(m, '\n');
1500*4882a593Smuzhiyun }
1501*4882a593Smuzhiyun return 0;
1502*4882a593Smuzhiyun }
1503*4882a593Smuzhiyun
1504*4882a593Smuzhiyun
1505*4882a593Smuzhiyun
1506*4882a593Smuzhiyun /*
1507*4882a593Smuzhiyun * Reset parameters and call scsi_done for data->cur_lunt.
1508*4882a593Smuzhiyun * Be careful setting SCpnt->result = DID_* before calling this function.
1509*4882a593Smuzhiyun */
nsp32_scsi_done(struct scsi_cmnd * SCpnt)1510*4882a593Smuzhiyun static void nsp32_scsi_done(struct scsi_cmnd *SCpnt)
1511*4882a593Smuzhiyun {
1512*4882a593Smuzhiyun nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata;
1513*4882a593Smuzhiyun unsigned int base = SCpnt->device->host->io_port;
1514*4882a593Smuzhiyun
1515*4882a593Smuzhiyun scsi_dma_unmap(SCpnt);
1516*4882a593Smuzhiyun
1517*4882a593Smuzhiyun /*
1518*4882a593Smuzhiyun * clear TRANSFERCONTROL_BM_START
1519*4882a593Smuzhiyun */
1520*4882a593Smuzhiyun nsp32_write2(base, TRANSFER_CONTROL, 0);
1521*4882a593Smuzhiyun nsp32_write4(base, BM_CNT, 0);
1522*4882a593Smuzhiyun
1523*4882a593Smuzhiyun /*
1524*4882a593Smuzhiyun * call scsi_done
1525*4882a593Smuzhiyun */
1526*4882a593Smuzhiyun (*SCpnt->scsi_done)(SCpnt);
1527*4882a593Smuzhiyun
1528*4882a593Smuzhiyun /*
1529*4882a593Smuzhiyun * reset parameters
1530*4882a593Smuzhiyun */
1531*4882a593Smuzhiyun data->cur_lunt->SCpnt = NULL;
1532*4882a593Smuzhiyun data->cur_lunt = NULL;
1533*4882a593Smuzhiyun data->cur_target = NULL;
1534*4882a593Smuzhiyun data->CurrentSC = NULL;
1535*4882a593Smuzhiyun }
1536*4882a593Smuzhiyun
1537*4882a593Smuzhiyun
1538*4882a593Smuzhiyun /*
1539*4882a593Smuzhiyun * Bus Free Occur
1540*4882a593Smuzhiyun *
1541*4882a593Smuzhiyun * Current Phase is BUSFREE. AutoSCSI is automatically execute BUSFREE phase
1542*4882a593Smuzhiyun * with ACK reply when below condition is matched:
1543*4882a593Smuzhiyun * MsgIn 00: Command Complete.
1544*4882a593Smuzhiyun * MsgIn 02: Save Data Pointer.
1545*4882a593Smuzhiyun * MsgIn 04: Disconnect.
1546*4882a593Smuzhiyun * In other case, unexpected BUSFREE is detected.
1547*4882a593Smuzhiyun */
nsp32_busfree_occur(struct scsi_cmnd * SCpnt,unsigned short execph)1548*4882a593Smuzhiyun static int nsp32_busfree_occur(struct scsi_cmnd *SCpnt, unsigned short execph)
1549*4882a593Smuzhiyun {
1550*4882a593Smuzhiyun nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata;
1551*4882a593Smuzhiyun unsigned int base = SCpnt->device->host->io_port;
1552*4882a593Smuzhiyun
1553*4882a593Smuzhiyun nsp32_dbg(NSP32_DEBUG_BUSFREE, "enter execph=0x%x", execph);
1554*4882a593Smuzhiyun show_autophase(execph);
1555*4882a593Smuzhiyun
1556*4882a593Smuzhiyun nsp32_write4(base, BM_CNT, 0);
1557*4882a593Smuzhiyun nsp32_write2(base, TRANSFER_CONTROL, 0);
1558*4882a593Smuzhiyun
1559*4882a593Smuzhiyun /*
1560*4882a593Smuzhiyun * MsgIn 02: Save Data Pointer
1561*4882a593Smuzhiyun *
1562*4882a593Smuzhiyun * VALID:
1563*4882a593Smuzhiyun * Save Data Pointer is received. Adjust pointer.
1564*4882a593Smuzhiyun *
1565*4882a593Smuzhiyun * NO-VALID:
1566*4882a593Smuzhiyun * SCSI-3 says if Save Data Pointer is not received, then we restart
1567*4882a593Smuzhiyun * processing and we can't adjust any SCSI data pointer in next data
1568*4882a593Smuzhiyun * phase.
1569*4882a593Smuzhiyun */
1570*4882a593Smuzhiyun if (execph & MSGIN_02_VALID) {
1571*4882a593Smuzhiyun nsp32_dbg(NSP32_DEBUG_BUSFREE, "MsgIn02_Valid");
1572*4882a593Smuzhiyun
1573*4882a593Smuzhiyun /*
1574*4882a593Smuzhiyun * Check sack_cnt/saved_sack_cnt, then adjust sg table if
1575*4882a593Smuzhiyun * needed.
1576*4882a593Smuzhiyun */
1577*4882a593Smuzhiyun if (!(execph & MSGIN_00_VALID) &&
1578*4882a593Smuzhiyun ((execph & DATA_IN_PHASE) || (execph & DATA_OUT_PHASE))) {
1579*4882a593Smuzhiyun unsigned int sacklen, s_sacklen;
1580*4882a593Smuzhiyun
1581*4882a593Smuzhiyun /*
1582*4882a593Smuzhiyun * Read SACK count and SAVEDSACK count, then compare.
1583*4882a593Smuzhiyun */
1584*4882a593Smuzhiyun sacklen = nsp32_read4(base, SACK_CNT );
1585*4882a593Smuzhiyun s_sacklen = nsp32_read4(base, SAVED_SACK_CNT);
1586*4882a593Smuzhiyun
1587*4882a593Smuzhiyun /*
1588*4882a593Smuzhiyun * If SAVEDSACKCNT == 0, it means SavedDataPointer is
1589*4882a593Smuzhiyun * come after data transferring.
1590*4882a593Smuzhiyun */
1591*4882a593Smuzhiyun if (s_sacklen > 0) {
1592*4882a593Smuzhiyun /*
1593*4882a593Smuzhiyun * Comparing between sack and savedsack to
1594*4882a593Smuzhiyun * check the condition of AutoMsgIn03.
1595*4882a593Smuzhiyun *
1596*4882a593Smuzhiyun * If they are same, set msgin03 == TRUE,
1597*4882a593Smuzhiyun * COMMANDCONTROL_AUTO_MSGIN_03 is enabled at
1598*4882a593Smuzhiyun * reselection. On the other hand, if they
1599*4882a593Smuzhiyun * aren't same, set msgin03 == FALSE, and
1600*4882a593Smuzhiyun * COMMANDCONTROL_AUTO_MSGIN_03 is disabled at
1601*4882a593Smuzhiyun * reselection.
1602*4882a593Smuzhiyun */
1603*4882a593Smuzhiyun if (sacklen != s_sacklen) {
1604*4882a593Smuzhiyun data->cur_lunt->msgin03 = FALSE;
1605*4882a593Smuzhiyun } else {
1606*4882a593Smuzhiyun data->cur_lunt->msgin03 = TRUE;
1607*4882a593Smuzhiyun }
1608*4882a593Smuzhiyun
1609*4882a593Smuzhiyun nsp32_adjust_busfree(SCpnt, s_sacklen);
1610*4882a593Smuzhiyun }
1611*4882a593Smuzhiyun }
1612*4882a593Smuzhiyun
1613*4882a593Smuzhiyun /* This value has not substitude with valid value yet... */
1614*4882a593Smuzhiyun //data->cur_lunt->save_datp = data->cur_datp;
1615*4882a593Smuzhiyun } else {
1616*4882a593Smuzhiyun /*
1617*4882a593Smuzhiyun * no processing.
1618*4882a593Smuzhiyun */
1619*4882a593Smuzhiyun }
1620*4882a593Smuzhiyun
1621*4882a593Smuzhiyun if (execph & MSGIN_03_VALID) {
1622*4882a593Smuzhiyun /* MsgIn03 was valid to be processed. No need processing. */
1623*4882a593Smuzhiyun }
1624*4882a593Smuzhiyun
1625*4882a593Smuzhiyun /*
1626*4882a593Smuzhiyun * target SDTR check
1627*4882a593Smuzhiyun */
1628*4882a593Smuzhiyun if (data->cur_target->sync_flag & SDTR_INITIATOR) {
1629*4882a593Smuzhiyun /*
1630*4882a593Smuzhiyun * SDTR negotiation pulled by the initiator has not
1631*4882a593Smuzhiyun * finished yet. Fall back to ASYNC mode.
1632*4882a593Smuzhiyun */
1633*4882a593Smuzhiyun nsp32_set_async(data, data->cur_target);
1634*4882a593Smuzhiyun data->cur_target->sync_flag &= ~SDTR_INITIATOR;
1635*4882a593Smuzhiyun data->cur_target->sync_flag |= SDTR_DONE;
1636*4882a593Smuzhiyun } else if (data->cur_target->sync_flag & SDTR_TARGET) {
1637*4882a593Smuzhiyun /*
1638*4882a593Smuzhiyun * SDTR negotiation pulled by the target has been
1639*4882a593Smuzhiyun * negotiating.
1640*4882a593Smuzhiyun */
1641*4882a593Smuzhiyun if (execph & (MSGIN_00_VALID | MSGIN_04_VALID)) {
1642*4882a593Smuzhiyun /*
1643*4882a593Smuzhiyun * If valid message is received, then
1644*4882a593Smuzhiyun * negotiation is succeeded.
1645*4882a593Smuzhiyun */
1646*4882a593Smuzhiyun } else {
1647*4882a593Smuzhiyun /*
1648*4882a593Smuzhiyun * On the contrary, if unexpected bus free is
1649*4882a593Smuzhiyun * occurred, then negotiation is failed. Fall
1650*4882a593Smuzhiyun * back to ASYNC mode.
1651*4882a593Smuzhiyun */
1652*4882a593Smuzhiyun nsp32_set_async(data, data->cur_target);
1653*4882a593Smuzhiyun }
1654*4882a593Smuzhiyun data->cur_target->sync_flag &= ~SDTR_TARGET;
1655*4882a593Smuzhiyun data->cur_target->sync_flag |= SDTR_DONE;
1656*4882a593Smuzhiyun }
1657*4882a593Smuzhiyun
1658*4882a593Smuzhiyun /*
1659*4882a593Smuzhiyun * It is always ensured by SCSI standard that initiator
1660*4882a593Smuzhiyun * switches into Bus Free Phase after
1661*4882a593Smuzhiyun * receiving message 00 (Command Complete), 04 (Disconnect).
1662*4882a593Smuzhiyun * It's the reason that processing here is valid.
1663*4882a593Smuzhiyun */
1664*4882a593Smuzhiyun if (execph & MSGIN_00_VALID) {
1665*4882a593Smuzhiyun /* MsgIn 00: Command Complete */
1666*4882a593Smuzhiyun nsp32_dbg(NSP32_DEBUG_BUSFREE, "command complete");
1667*4882a593Smuzhiyun
1668*4882a593Smuzhiyun SCpnt->SCp.Status = nsp32_read1(base, SCSI_CSB_IN);
1669*4882a593Smuzhiyun SCpnt->SCp.Message = 0;
1670*4882a593Smuzhiyun nsp32_dbg(NSP32_DEBUG_BUSFREE,
1671*4882a593Smuzhiyun "normal end stat=0x%x resid=0x%x\n",
1672*4882a593Smuzhiyun SCpnt->SCp.Status, scsi_get_resid(SCpnt));
1673*4882a593Smuzhiyun SCpnt->result = (DID_OK << 16) |
1674*4882a593Smuzhiyun (SCpnt->SCp.Message << 8) |
1675*4882a593Smuzhiyun (SCpnt->SCp.Status << 0);
1676*4882a593Smuzhiyun nsp32_scsi_done(SCpnt);
1677*4882a593Smuzhiyun /* All operation is done */
1678*4882a593Smuzhiyun return TRUE;
1679*4882a593Smuzhiyun } else if (execph & MSGIN_04_VALID) {
1680*4882a593Smuzhiyun /* MsgIn 04: Disconnect */
1681*4882a593Smuzhiyun SCpnt->SCp.Status = nsp32_read1(base, SCSI_CSB_IN);
1682*4882a593Smuzhiyun SCpnt->SCp.Message = 4;
1683*4882a593Smuzhiyun
1684*4882a593Smuzhiyun nsp32_dbg(NSP32_DEBUG_BUSFREE, "disconnect");
1685*4882a593Smuzhiyun return TRUE;
1686*4882a593Smuzhiyun } else {
1687*4882a593Smuzhiyun /* Unexpected bus free */
1688*4882a593Smuzhiyun nsp32_msg(KERN_WARNING, "unexpected bus free occurred");
1689*4882a593Smuzhiyun
1690*4882a593Smuzhiyun /* DID_ERROR? */
1691*4882a593Smuzhiyun //SCpnt->result = (DID_OK << 16) | (SCpnt->SCp.Message << 8) | (SCpnt->SCp.Status << 0);
1692*4882a593Smuzhiyun SCpnt->result = DID_ERROR << 16;
1693*4882a593Smuzhiyun nsp32_scsi_done(SCpnt);
1694*4882a593Smuzhiyun return TRUE;
1695*4882a593Smuzhiyun }
1696*4882a593Smuzhiyun return FALSE;
1697*4882a593Smuzhiyun }
1698*4882a593Smuzhiyun
1699*4882a593Smuzhiyun
1700*4882a593Smuzhiyun /*
1701*4882a593Smuzhiyun * nsp32_adjust_busfree - adjusting SG table
1702*4882a593Smuzhiyun *
1703*4882a593Smuzhiyun * Note: This driver adjust the SG table using SCSI ACK
1704*4882a593Smuzhiyun * counter instead of BMCNT counter!
1705*4882a593Smuzhiyun */
nsp32_adjust_busfree(struct scsi_cmnd * SCpnt,unsigned int s_sacklen)1706*4882a593Smuzhiyun static void nsp32_adjust_busfree(struct scsi_cmnd *SCpnt, unsigned int s_sacklen)
1707*4882a593Smuzhiyun {
1708*4882a593Smuzhiyun nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata;
1709*4882a593Smuzhiyun int old_entry = data->cur_entry;
1710*4882a593Smuzhiyun int new_entry;
1711*4882a593Smuzhiyun int sg_num = data->cur_lunt->sg_num;
1712*4882a593Smuzhiyun nsp32_sgtable *sgt = data->cur_lunt->sglun->sgt;
1713*4882a593Smuzhiyun unsigned int restlen, sentlen;
1714*4882a593Smuzhiyun u32_le len, addr;
1715*4882a593Smuzhiyun
1716*4882a593Smuzhiyun nsp32_dbg(NSP32_DEBUG_SGLIST, "old resid=0x%x", scsi_get_resid(SCpnt));
1717*4882a593Smuzhiyun
1718*4882a593Smuzhiyun /* adjust saved SACK count with 4 byte start address boundary */
1719*4882a593Smuzhiyun s_sacklen -= le32_to_cpu(sgt[old_entry].addr) & 3;
1720*4882a593Smuzhiyun
1721*4882a593Smuzhiyun /*
1722*4882a593Smuzhiyun * calculate new_entry from sack count and each sgt[].len
1723*4882a593Smuzhiyun * calculate the byte which is intent to send
1724*4882a593Smuzhiyun */
1725*4882a593Smuzhiyun sentlen = 0;
1726*4882a593Smuzhiyun for (new_entry = old_entry; new_entry < sg_num; new_entry++) {
1727*4882a593Smuzhiyun sentlen += (le32_to_cpu(sgt[new_entry].len) & ~SGTEND);
1728*4882a593Smuzhiyun if (sentlen > s_sacklen) {
1729*4882a593Smuzhiyun break;
1730*4882a593Smuzhiyun }
1731*4882a593Smuzhiyun }
1732*4882a593Smuzhiyun
1733*4882a593Smuzhiyun /* all sgt is processed */
1734*4882a593Smuzhiyun if (new_entry == sg_num) {
1735*4882a593Smuzhiyun goto last;
1736*4882a593Smuzhiyun }
1737*4882a593Smuzhiyun
1738*4882a593Smuzhiyun if (sentlen == s_sacklen) {
1739*4882a593Smuzhiyun /* XXX: confirm it's ok or not */
1740*4882a593Smuzhiyun /* In this case, it's ok because we are at
1741*4882a593Smuzhiyun the head element of the sg. restlen is correctly calculated. */
1742*4882a593Smuzhiyun }
1743*4882a593Smuzhiyun
1744*4882a593Smuzhiyun /* calculate the rest length for transferring */
1745*4882a593Smuzhiyun restlen = sentlen - s_sacklen;
1746*4882a593Smuzhiyun
1747*4882a593Smuzhiyun /* update adjusting current SG table entry */
1748*4882a593Smuzhiyun len = le32_to_cpu(sgt[new_entry].len);
1749*4882a593Smuzhiyun addr = le32_to_cpu(sgt[new_entry].addr);
1750*4882a593Smuzhiyun addr += (len - restlen);
1751*4882a593Smuzhiyun sgt[new_entry].addr = cpu_to_le32(addr);
1752*4882a593Smuzhiyun sgt[new_entry].len = cpu_to_le32(restlen);
1753*4882a593Smuzhiyun
1754*4882a593Smuzhiyun /* set cur_entry with new_entry */
1755*4882a593Smuzhiyun data->cur_entry = new_entry;
1756*4882a593Smuzhiyun
1757*4882a593Smuzhiyun return;
1758*4882a593Smuzhiyun
1759*4882a593Smuzhiyun last:
1760*4882a593Smuzhiyun if (scsi_get_resid(SCpnt) < sentlen) {
1761*4882a593Smuzhiyun nsp32_msg(KERN_ERR, "resid underflow");
1762*4882a593Smuzhiyun }
1763*4882a593Smuzhiyun
1764*4882a593Smuzhiyun scsi_set_resid(SCpnt, scsi_get_resid(SCpnt) - sentlen);
1765*4882a593Smuzhiyun nsp32_dbg(NSP32_DEBUG_SGLIST, "new resid=0x%x", scsi_get_resid(SCpnt));
1766*4882a593Smuzhiyun
1767*4882a593Smuzhiyun /* update hostdata and lun */
1768*4882a593Smuzhiyun
1769*4882a593Smuzhiyun return;
1770*4882a593Smuzhiyun }
1771*4882a593Smuzhiyun
1772*4882a593Smuzhiyun
1773*4882a593Smuzhiyun /*
1774*4882a593Smuzhiyun * It's called MsgOut phase occur.
1775*4882a593Smuzhiyun * NinjaSCSI-32Bi/UDE automatically processes up to 3 messages in
1776*4882a593Smuzhiyun * message out phase. It, however, has more than 3 messages,
1777*4882a593Smuzhiyun * HBA creates the interrupt and we have to process by hand.
1778*4882a593Smuzhiyun */
nsp32_msgout_occur(struct scsi_cmnd * SCpnt)1779*4882a593Smuzhiyun static void nsp32_msgout_occur(struct scsi_cmnd *SCpnt)
1780*4882a593Smuzhiyun {
1781*4882a593Smuzhiyun nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata;
1782*4882a593Smuzhiyun unsigned int base = SCpnt->device->host->io_port;
1783*4882a593Smuzhiyun //unsigned short command;
1784*4882a593Smuzhiyun long new_sgtp;
1785*4882a593Smuzhiyun int i;
1786*4882a593Smuzhiyun
1787*4882a593Smuzhiyun nsp32_dbg(NSP32_DEBUG_MSGOUTOCCUR,
1788*4882a593Smuzhiyun "enter: msgout_len: 0x%x", data->msgout_len);
1789*4882a593Smuzhiyun
1790*4882a593Smuzhiyun /*
1791*4882a593Smuzhiyun * If MsgOut phase is occurred without having any
1792*4882a593Smuzhiyun * message, then No_Operation is sent (SCSI-2).
1793*4882a593Smuzhiyun */
1794*4882a593Smuzhiyun if (data->msgout_len == 0) {
1795*4882a593Smuzhiyun nsp32_build_nop(SCpnt);
1796*4882a593Smuzhiyun }
1797*4882a593Smuzhiyun
1798*4882a593Smuzhiyun /*
1799*4882a593Smuzhiyun * Set SGTP ADDR current entry for restarting AUTOSCSI,
1800*4882a593Smuzhiyun * because SGTP is incremented next point.
1801*4882a593Smuzhiyun * There is few statement in the specification...
1802*4882a593Smuzhiyun */
1803*4882a593Smuzhiyun new_sgtp = data->cur_lunt->sglun_paddr +
1804*4882a593Smuzhiyun (data->cur_lunt->cur_entry * sizeof(nsp32_sgtable));
1805*4882a593Smuzhiyun
1806*4882a593Smuzhiyun /*
1807*4882a593Smuzhiyun * send messages
1808*4882a593Smuzhiyun */
1809*4882a593Smuzhiyun for (i = 0; i < data->msgout_len; i++) {
1810*4882a593Smuzhiyun nsp32_dbg(NSP32_DEBUG_MSGOUTOCCUR,
1811*4882a593Smuzhiyun "%d : 0x%x", i, data->msgoutbuf[i]);
1812*4882a593Smuzhiyun
1813*4882a593Smuzhiyun /*
1814*4882a593Smuzhiyun * Check REQ is asserted.
1815*4882a593Smuzhiyun */
1816*4882a593Smuzhiyun nsp32_wait_req(data, ASSERT);
1817*4882a593Smuzhiyun
1818*4882a593Smuzhiyun if (i == (data->msgout_len - 1)) {
1819*4882a593Smuzhiyun /*
1820*4882a593Smuzhiyun * If the last message, set the AutoSCSI restart
1821*4882a593Smuzhiyun * before send back the ack message. AutoSCSI
1822*4882a593Smuzhiyun * restart automatically negate ATN signal.
1823*4882a593Smuzhiyun */
1824*4882a593Smuzhiyun //command = (AUTO_MSGIN_00_OR_04 | AUTO_MSGIN_02);
1825*4882a593Smuzhiyun //nsp32_restart_autoscsi(SCpnt, command);
1826*4882a593Smuzhiyun nsp32_write2(base, COMMAND_CONTROL,
1827*4882a593Smuzhiyun (CLEAR_CDB_FIFO_POINTER |
1828*4882a593Smuzhiyun AUTO_COMMAND_PHASE |
1829*4882a593Smuzhiyun AUTOSCSI_RESTART |
1830*4882a593Smuzhiyun AUTO_MSGIN_00_OR_04 |
1831*4882a593Smuzhiyun AUTO_MSGIN_02 ));
1832*4882a593Smuzhiyun }
1833*4882a593Smuzhiyun /*
1834*4882a593Smuzhiyun * Write data with SACK, then wait sack is
1835*4882a593Smuzhiyun * automatically negated.
1836*4882a593Smuzhiyun */
1837*4882a593Smuzhiyun nsp32_write1(base, SCSI_DATA_WITH_ACK, data->msgoutbuf[i]);
1838*4882a593Smuzhiyun nsp32_wait_sack(data, NEGATE);
1839*4882a593Smuzhiyun
1840*4882a593Smuzhiyun nsp32_dbg(NSP32_DEBUG_MSGOUTOCCUR, "bus: 0x%x\n",
1841*4882a593Smuzhiyun nsp32_read1(base, SCSI_BUS_MONITOR));
1842*4882a593Smuzhiyun }
1843*4882a593Smuzhiyun
1844*4882a593Smuzhiyun data->msgout_len = 0;
1845*4882a593Smuzhiyun
1846*4882a593Smuzhiyun nsp32_dbg(NSP32_DEBUG_MSGOUTOCCUR, "exit");
1847*4882a593Smuzhiyun }
1848*4882a593Smuzhiyun
1849*4882a593Smuzhiyun /*
1850*4882a593Smuzhiyun * Restart AutoSCSI
1851*4882a593Smuzhiyun *
1852*4882a593Smuzhiyun * Note: Restarting AutoSCSI needs set:
1853*4882a593Smuzhiyun * SYNC_REG, ACK_WIDTH, SGT_ADR, TRANSFER_CONTROL
1854*4882a593Smuzhiyun */
nsp32_restart_autoscsi(struct scsi_cmnd * SCpnt,unsigned short command)1855*4882a593Smuzhiyun static void nsp32_restart_autoscsi(struct scsi_cmnd *SCpnt, unsigned short command)
1856*4882a593Smuzhiyun {
1857*4882a593Smuzhiyun nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata;
1858*4882a593Smuzhiyun unsigned int base = data->BaseAddress;
1859*4882a593Smuzhiyun unsigned short transfer = 0;
1860*4882a593Smuzhiyun
1861*4882a593Smuzhiyun nsp32_dbg(NSP32_DEBUG_RESTART, "enter");
1862*4882a593Smuzhiyun
1863*4882a593Smuzhiyun if (data->cur_target == NULL || data->cur_lunt == NULL) {
1864*4882a593Smuzhiyun nsp32_msg(KERN_ERR, "Target or Lun is invalid");
1865*4882a593Smuzhiyun }
1866*4882a593Smuzhiyun
1867*4882a593Smuzhiyun /*
1868*4882a593Smuzhiyun * set SYNC_REG
1869*4882a593Smuzhiyun * Don't set BM_START_ADR before setting this register.
1870*4882a593Smuzhiyun */
1871*4882a593Smuzhiyun nsp32_write1(base, SYNC_REG, data->cur_target->syncreg);
1872*4882a593Smuzhiyun
1873*4882a593Smuzhiyun /*
1874*4882a593Smuzhiyun * set ACKWIDTH
1875*4882a593Smuzhiyun */
1876*4882a593Smuzhiyun nsp32_write1(base, ACK_WIDTH, data->cur_target->ackwidth);
1877*4882a593Smuzhiyun
1878*4882a593Smuzhiyun /*
1879*4882a593Smuzhiyun * set SREQ hazard killer sampling rate
1880*4882a593Smuzhiyun */
1881*4882a593Smuzhiyun nsp32_write1(base, SREQ_SMPL_RATE, data->cur_target->sample_reg);
1882*4882a593Smuzhiyun
1883*4882a593Smuzhiyun /*
1884*4882a593Smuzhiyun * set SGT ADDR (physical address)
1885*4882a593Smuzhiyun */
1886*4882a593Smuzhiyun nsp32_write4(base, SGT_ADR, data->cur_lunt->sglun_paddr);
1887*4882a593Smuzhiyun
1888*4882a593Smuzhiyun /*
1889*4882a593Smuzhiyun * set TRANSFER CONTROL REG
1890*4882a593Smuzhiyun */
1891*4882a593Smuzhiyun transfer = 0;
1892*4882a593Smuzhiyun transfer |= (TRANSFER_GO | ALL_COUNTER_CLR);
1893*4882a593Smuzhiyun if (data->trans_method & NSP32_TRANSFER_BUSMASTER) {
1894*4882a593Smuzhiyun if (scsi_bufflen(SCpnt) > 0) {
1895*4882a593Smuzhiyun transfer |= BM_START;
1896*4882a593Smuzhiyun }
1897*4882a593Smuzhiyun } else if (data->trans_method & NSP32_TRANSFER_MMIO) {
1898*4882a593Smuzhiyun transfer |= CB_MMIO_MODE;
1899*4882a593Smuzhiyun } else if (data->trans_method & NSP32_TRANSFER_PIO) {
1900*4882a593Smuzhiyun transfer |= CB_IO_MODE;
1901*4882a593Smuzhiyun }
1902*4882a593Smuzhiyun nsp32_write2(base, TRANSFER_CONTROL, transfer);
1903*4882a593Smuzhiyun
1904*4882a593Smuzhiyun /*
1905*4882a593Smuzhiyun * restart AutoSCSI
1906*4882a593Smuzhiyun *
1907*4882a593Smuzhiyun * TODO: COMMANDCONTROL_AUTO_COMMAND_PHASE is needed ?
1908*4882a593Smuzhiyun */
1909*4882a593Smuzhiyun command |= (CLEAR_CDB_FIFO_POINTER |
1910*4882a593Smuzhiyun AUTO_COMMAND_PHASE |
1911*4882a593Smuzhiyun AUTOSCSI_RESTART );
1912*4882a593Smuzhiyun nsp32_write2(base, COMMAND_CONTROL, command);
1913*4882a593Smuzhiyun
1914*4882a593Smuzhiyun nsp32_dbg(NSP32_DEBUG_RESTART, "exit");
1915*4882a593Smuzhiyun }
1916*4882a593Smuzhiyun
1917*4882a593Smuzhiyun
1918*4882a593Smuzhiyun /*
1919*4882a593Smuzhiyun * cannot run automatically message in occur
1920*4882a593Smuzhiyun */
nsp32_msgin_occur(struct scsi_cmnd * SCpnt,unsigned long irq_status,unsigned short execph)1921*4882a593Smuzhiyun static void nsp32_msgin_occur(struct scsi_cmnd *SCpnt,
1922*4882a593Smuzhiyun unsigned long irq_status,
1923*4882a593Smuzhiyun unsigned short execph)
1924*4882a593Smuzhiyun {
1925*4882a593Smuzhiyun nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata;
1926*4882a593Smuzhiyun unsigned int base = SCpnt->device->host->io_port;
1927*4882a593Smuzhiyun unsigned char msg;
1928*4882a593Smuzhiyun unsigned char msgtype;
1929*4882a593Smuzhiyun unsigned char newlun;
1930*4882a593Smuzhiyun unsigned short command = 0;
1931*4882a593Smuzhiyun int msgclear = TRUE;
1932*4882a593Smuzhiyun long new_sgtp;
1933*4882a593Smuzhiyun int ret;
1934*4882a593Smuzhiyun
1935*4882a593Smuzhiyun /*
1936*4882a593Smuzhiyun * read first message
1937*4882a593Smuzhiyun * Use SCSIDATA_W_ACK instead of SCSIDATAIN, because the procedure
1938*4882a593Smuzhiyun * of Message-In have to be processed before sending back SCSI ACK.
1939*4882a593Smuzhiyun */
1940*4882a593Smuzhiyun msg = nsp32_read1(base, SCSI_DATA_IN);
1941*4882a593Smuzhiyun data->msginbuf[(unsigned char)data->msgin_len] = msg;
1942*4882a593Smuzhiyun msgtype = data->msginbuf[0];
1943*4882a593Smuzhiyun nsp32_dbg(NSP32_DEBUG_MSGINOCCUR,
1944*4882a593Smuzhiyun "enter: msglen: 0x%x msgin: 0x%x msgtype: 0x%x",
1945*4882a593Smuzhiyun data->msgin_len, msg, msgtype);
1946*4882a593Smuzhiyun
1947*4882a593Smuzhiyun /*
1948*4882a593Smuzhiyun * TODO: We need checking whether bus phase is message in?
1949*4882a593Smuzhiyun */
1950*4882a593Smuzhiyun
1951*4882a593Smuzhiyun /*
1952*4882a593Smuzhiyun * assert SCSI ACK
1953*4882a593Smuzhiyun */
1954*4882a593Smuzhiyun nsp32_sack_assert(data);
1955*4882a593Smuzhiyun
1956*4882a593Smuzhiyun /*
1957*4882a593Smuzhiyun * processing IDENTIFY
1958*4882a593Smuzhiyun */
1959*4882a593Smuzhiyun if (msgtype & 0x80) {
1960*4882a593Smuzhiyun if (!(irq_status & IRQSTATUS_RESELECT_OCCUER)) {
1961*4882a593Smuzhiyun /* Invalid (non reselect) phase */
1962*4882a593Smuzhiyun goto reject;
1963*4882a593Smuzhiyun }
1964*4882a593Smuzhiyun
1965*4882a593Smuzhiyun newlun = msgtype & 0x1f; /* TODO: SPI-3 compliant? */
1966*4882a593Smuzhiyun ret = nsp32_reselection(SCpnt, newlun);
1967*4882a593Smuzhiyun if (ret == TRUE) {
1968*4882a593Smuzhiyun goto restart;
1969*4882a593Smuzhiyun } else {
1970*4882a593Smuzhiyun goto reject;
1971*4882a593Smuzhiyun }
1972*4882a593Smuzhiyun }
1973*4882a593Smuzhiyun
1974*4882a593Smuzhiyun /*
1975*4882a593Smuzhiyun * processing messages except for IDENTIFY
1976*4882a593Smuzhiyun *
1977*4882a593Smuzhiyun * TODO: Messages are all SCSI-2 terminology. SCSI-3 compliance is TODO.
1978*4882a593Smuzhiyun */
1979*4882a593Smuzhiyun switch (msgtype) {
1980*4882a593Smuzhiyun /*
1981*4882a593Smuzhiyun * 1-byte message
1982*4882a593Smuzhiyun */
1983*4882a593Smuzhiyun case COMMAND_COMPLETE:
1984*4882a593Smuzhiyun case DISCONNECT:
1985*4882a593Smuzhiyun /*
1986*4882a593Smuzhiyun * These messages should not be occurred.
1987*4882a593Smuzhiyun * They should be processed on AutoSCSI sequencer.
1988*4882a593Smuzhiyun */
1989*4882a593Smuzhiyun nsp32_msg(KERN_WARNING,
1990*4882a593Smuzhiyun "unexpected message of AutoSCSI MsgIn: 0x%x", msg);
1991*4882a593Smuzhiyun break;
1992*4882a593Smuzhiyun
1993*4882a593Smuzhiyun case RESTORE_POINTERS:
1994*4882a593Smuzhiyun /*
1995*4882a593Smuzhiyun * AutoMsgIn03 is disabled, and HBA gets this message.
1996*4882a593Smuzhiyun */
1997*4882a593Smuzhiyun
1998*4882a593Smuzhiyun if ((execph & DATA_IN_PHASE) || (execph & DATA_OUT_PHASE)) {
1999*4882a593Smuzhiyun unsigned int s_sacklen;
2000*4882a593Smuzhiyun
2001*4882a593Smuzhiyun s_sacklen = nsp32_read4(base, SAVED_SACK_CNT);
2002*4882a593Smuzhiyun if ((execph & MSGIN_02_VALID) && (s_sacklen > 0)) {
2003*4882a593Smuzhiyun nsp32_adjust_busfree(SCpnt, s_sacklen);
2004*4882a593Smuzhiyun } else {
2005*4882a593Smuzhiyun /* No need to rewrite SGT */
2006*4882a593Smuzhiyun }
2007*4882a593Smuzhiyun }
2008*4882a593Smuzhiyun data->cur_lunt->msgin03 = FALSE;
2009*4882a593Smuzhiyun
2010*4882a593Smuzhiyun /* Update with the new value */
2011*4882a593Smuzhiyun
2012*4882a593Smuzhiyun /* reset SACK/SavedACK counter (or ALL clear?) */
2013*4882a593Smuzhiyun nsp32_write4(base, CLR_COUNTER, CLRCOUNTER_ALLMASK);
2014*4882a593Smuzhiyun
2015*4882a593Smuzhiyun /*
2016*4882a593Smuzhiyun * set new sg pointer
2017*4882a593Smuzhiyun */
2018*4882a593Smuzhiyun new_sgtp = data->cur_lunt->sglun_paddr +
2019*4882a593Smuzhiyun (data->cur_lunt->cur_entry * sizeof(nsp32_sgtable));
2020*4882a593Smuzhiyun nsp32_write4(base, SGT_ADR, new_sgtp);
2021*4882a593Smuzhiyun
2022*4882a593Smuzhiyun break;
2023*4882a593Smuzhiyun
2024*4882a593Smuzhiyun case SAVE_POINTERS:
2025*4882a593Smuzhiyun /*
2026*4882a593Smuzhiyun * These messages should not be occurred.
2027*4882a593Smuzhiyun * They should be processed on AutoSCSI sequencer.
2028*4882a593Smuzhiyun */
2029*4882a593Smuzhiyun nsp32_msg (KERN_WARNING,
2030*4882a593Smuzhiyun "unexpected message of AutoSCSI MsgIn: SAVE_POINTERS");
2031*4882a593Smuzhiyun
2032*4882a593Smuzhiyun break;
2033*4882a593Smuzhiyun
2034*4882a593Smuzhiyun case MESSAGE_REJECT:
2035*4882a593Smuzhiyun /* If previous message_out is sending SDTR, and get
2036*4882a593Smuzhiyun message_reject from target, SDTR negotiation is failed */
2037*4882a593Smuzhiyun if (data->cur_target->sync_flag &
2038*4882a593Smuzhiyun (SDTR_INITIATOR | SDTR_TARGET)) {
2039*4882a593Smuzhiyun /*
2040*4882a593Smuzhiyun * Current target is negotiating SDTR, but it's
2041*4882a593Smuzhiyun * failed. Fall back to async transfer mode, and set
2042*4882a593Smuzhiyun * SDTR_DONE.
2043*4882a593Smuzhiyun */
2044*4882a593Smuzhiyun nsp32_set_async(data, data->cur_target);
2045*4882a593Smuzhiyun data->cur_target->sync_flag &= ~SDTR_INITIATOR;
2046*4882a593Smuzhiyun data->cur_target->sync_flag |= SDTR_DONE;
2047*4882a593Smuzhiyun
2048*4882a593Smuzhiyun }
2049*4882a593Smuzhiyun break;
2050*4882a593Smuzhiyun
2051*4882a593Smuzhiyun case LINKED_CMD_COMPLETE:
2052*4882a593Smuzhiyun case LINKED_FLG_CMD_COMPLETE:
2053*4882a593Smuzhiyun /* queue tag is not supported currently */
2054*4882a593Smuzhiyun nsp32_msg (KERN_WARNING,
2055*4882a593Smuzhiyun "unsupported message: 0x%x", msgtype);
2056*4882a593Smuzhiyun break;
2057*4882a593Smuzhiyun
2058*4882a593Smuzhiyun case INITIATE_RECOVERY:
2059*4882a593Smuzhiyun /* staring ECA (Extended Contingent Allegiance) state. */
2060*4882a593Smuzhiyun /* This message is declined in SPI2 or later. */
2061*4882a593Smuzhiyun
2062*4882a593Smuzhiyun goto reject;
2063*4882a593Smuzhiyun
2064*4882a593Smuzhiyun /*
2065*4882a593Smuzhiyun * 2-byte message
2066*4882a593Smuzhiyun */
2067*4882a593Smuzhiyun case SIMPLE_QUEUE_TAG:
2068*4882a593Smuzhiyun case 0x23:
2069*4882a593Smuzhiyun /*
2070*4882a593Smuzhiyun * 0x23: Ignore_Wide_Residue is not declared in scsi.h.
2071*4882a593Smuzhiyun * No support is needed.
2072*4882a593Smuzhiyun */
2073*4882a593Smuzhiyun if (data->msgin_len >= 1) {
2074*4882a593Smuzhiyun goto reject;
2075*4882a593Smuzhiyun }
2076*4882a593Smuzhiyun
2077*4882a593Smuzhiyun /* current position is 1-byte of 2 byte */
2078*4882a593Smuzhiyun msgclear = FALSE;
2079*4882a593Smuzhiyun
2080*4882a593Smuzhiyun break;
2081*4882a593Smuzhiyun
2082*4882a593Smuzhiyun /*
2083*4882a593Smuzhiyun * extended message
2084*4882a593Smuzhiyun */
2085*4882a593Smuzhiyun case EXTENDED_MESSAGE:
2086*4882a593Smuzhiyun if (data->msgin_len < 1) {
2087*4882a593Smuzhiyun /*
2088*4882a593Smuzhiyun * Current position does not reach 2-byte
2089*4882a593Smuzhiyun * (2-byte is extended message length).
2090*4882a593Smuzhiyun */
2091*4882a593Smuzhiyun msgclear = FALSE;
2092*4882a593Smuzhiyun break;
2093*4882a593Smuzhiyun }
2094*4882a593Smuzhiyun
2095*4882a593Smuzhiyun if ((data->msginbuf[1] + 1) > data->msgin_len) {
2096*4882a593Smuzhiyun /*
2097*4882a593Smuzhiyun * Current extended message has msginbuf[1] + 2
2098*4882a593Smuzhiyun * (msgin_len starts counting from 0, so buf[1] + 1).
2099*4882a593Smuzhiyun * If current message position is not finished,
2100*4882a593Smuzhiyun * continue receiving message.
2101*4882a593Smuzhiyun */
2102*4882a593Smuzhiyun msgclear = FALSE;
2103*4882a593Smuzhiyun break;
2104*4882a593Smuzhiyun }
2105*4882a593Smuzhiyun
2106*4882a593Smuzhiyun /*
2107*4882a593Smuzhiyun * Reach here means regular length of each type of
2108*4882a593Smuzhiyun * extended messages.
2109*4882a593Smuzhiyun */
2110*4882a593Smuzhiyun switch (data->msginbuf[2]) {
2111*4882a593Smuzhiyun case EXTENDED_MODIFY_DATA_POINTER:
2112*4882a593Smuzhiyun /* TODO */
2113*4882a593Smuzhiyun goto reject; /* not implemented yet */
2114*4882a593Smuzhiyun break;
2115*4882a593Smuzhiyun
2116*4882a593Smuzhiyun case EXTENDED_SDTR:
2117*4882a593Smuzhiyun /*
2118*4882a593Smuzhiyun * Exchange this message between initiator and target.
2119*4882a593Smuzhiyun */
2120*4882a593Smuzhiyun if (data->msgin_len != EXTENDED_SDTR_LEN + 1) {
2121*4882a593Smuzhiyun /*
2122*4882a593Smuzhiyun * received inappropriate message.
2123*4882a593Smuzhiyun */
2124*4882a593Smuzhiyun goto reject;
2125*4882a593Smuzhiyun break;
2126*4882a593Smuzhiyun }
2127*4882a593Smuzhiyun
2128*4882a593Smuzhiyun nsp32_analyze_sdtr(SCpnt);
2129*4882a593Smuzhiyun
2130*4882a593Smuzhiyun break;
2131*4882a593Smuzhiyun
2132*4882a593Smuzhiyun case EXTENDED_EXTENDED_IDENTIFY:
2133*4882a593Smuzhiyun /* SCSI-I only, not supported. */
2134*4882a593Smuzhiyun goto reject; /* not implemented yet */
2135*4882a593Smuzhiyun
2136*4882a593Smuzhiyun break;
2137*4882a593Smuzhiyun
2138*4882a593Smuzhiyun case EXTENDED_WDTR:
2139*4882a593Smuzhiyun goto reject; /* not implemented yet */
2140*4882a593Smuzhiyun
2141*4882a593Smuzhiyun break;
2142*4882a593Smuzhiyun
2143*4882a593Smuzhiyun default:
2144*4882a593Smuzhiyun goto reject;
2145*4882a593Smuzhiyun }
2146*4882a593Smuzhiyun break;
2147*4882a593Smuzhiyun
2148*4882a593Smuzhiyun default:
2149*4882a593Smuzhiyun goto reject;
2150*4882a593Smuzhiyun }
2151*4882a593Smuzhiyun
2152*4882a593Smuzhiyun restart:
2153*4882a593Smuzhiyun if (msgclear == TRUE) {
2154*4882a593Smuzhiyun data->msgin_len = 0;
2155*4882a593Smuzhiyun
2156*4882a593Smuzhiyun /*
2157*4882a593Smuzhiyun * If restarting AutoSCSI, but there are some message to out
2158*4882a593Smuzhiyun * (msgout_len > 0), set AutoATN, and set SCSIMSGOUT as 0
2159*4882a593Smuzhiyun * (MV_VALID = 0). When commandcontrol is written with
2160*4882a593Smuzhiyun * AutoSCSI restart, at the same time MsgOutOccur should be
2161*4882a593Smuzhiyun * happened (however, such situation is really possible...?).
2162*4882a593Smuzhiyun */
2163*4882a593Smuzhiyun if (data->msgout_len > 0) {
2164*4882a593Smuzhiyun nsp32_write4(base, SCSI_MSG_OUT, 0);
2165*4882a593Smuzhiyun command |= AUTO_ATN;
2166*4882a593Smuzhiyun }
2167*4882a593Smuzhiyun
2168*4882a593Smuzhiyun /*
2169*4882a593Smuzhiyun * restart AutoSCSI
2170*4882a593Smuzhiyun * If it's failed, COMMANDCONTROL_AUTO_COMMAND_PHASE is needed.
2171*4882a593Smuzhiyun */
2172*4882a593Smuzhiyun command |= (AUTO_MSGIN_00_OR_04 | AUTO_MSGIN_02);
2173*4882a593Smuzhiyun
2174*4882a593Smuzhiyun /*
2175*4882a593Smuzhiyun * If current msgin03 is TRUE, then flag on.
2176*4882a593Smuzhiyun */
2177*4882a593Smuzhiyun if (data->cur_lunt->msgin03 == TRUE) {
2178*4882a593Smuzhiyun command |= AUTO_MSGIN_03;
2179*4882a593Smuzhiyun }
2180*4882a593Smuzhiyun data->cur_lunt->msgin03 = FALSE;
2181*4882a593Smuzhiyun } else {
2182*4882a593Smuzhiyun data->msgin_len++;
2183*4882a593Smuzhiyun }
2184*4882a593Smuzhiyun
2185*4882a593Smuzhiyun /*
2186*4882a593Smuzhiyun * restart AutoSCSI
2187*4882a593Smuzhiyun */
2188*4882a593Smuzhiyun nsp32_restart_autoscsi(SCpnt, command);
2189*4882a593Smuzhiyun
2190*4882a593Smuzhiyun /*
2191*4882a593Smuzhiyun * wait SCSI REQ negate for REQ-ACK handshake
2192*4882a593Smuzhiyun */
2193*4882a593Smuzhiyun nsp32_wait_req(data, NEGATE);
2194*4882a593Smuzhiyun
2195*4882a593Smuzhiyun /*
2196*4882a593Smuzhiyun * negate SCSI ACK
2197*4882a593Smuzhiyun */
2198*4882a593Smuzhiyun nsp32_sack_negate(data);
2199*4882a593Smuzhiyun
2200*4882a593Smuzhiyun nsp32_dbg(NSP32_DEBUG_MSGINOCCUR, "exit");
2201*4882a593Smuzhiyun
2202*4882a593Smuzhiyun return;
2203*4882a593Smuzhiyun
2204*4882a593Smuzhiyun reject:
2205*4882a593Smuzhiyun nsp32_msg(KERN_WARNING,
2206*4882a593Smuzhiyun "invalid or unsupported MessageIn, rejected. "
2207*4882a593Smuzhiyun "current msg: 0x%x (len: 0x%x), processing msg: 0x%x",
2208*4882a593Smuzhiyun msg, data->msgin_len, msgtype);
2209*4882a593Smuzhiyun nsp32_build_reject(SCpnt);
2210*4882a593Smuzhiyun data->msgin_len = 0;
2211*4882a593Smuzhiyun
2212*4882a593Smuzhiyun goto restart;
2213*4882a593Smuzhiyun }
2214*4882a593Smuzhiyun
2215*4882a593Smuzhiyun /*
2216*4882a593Smuzhiyun *
2217*4882a593Smuzhiyun */
nsp32_analyze_sdtr(struct scsi_cmnd * SCpnt)2218*4882a593Smuzhiyun static void nsp32_analyze_sdtr(struct scsi_cmnd *SCpnt)
2219*4882a593Smuzhiyun {
2220*4882a593Smuzhiyun nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata;
2221*4882a593Smuzhiyun nsp32_target *target = data->cur_target;
2222*4882a593Smuzhiyun nsp32_sync_table *synct;
2223*4882a593Smuzhiyun unsigned char get_period = data->msginbuf[3];
2224*4882a593Smuzhiyun unsigned char get_offset = data->msginbuf[4];
2225*4882a593Smuzhiyun int entry;
2226*4882a593Smuzhiyun int syncnum;
2227*4882a593Smuzhiyun
2228*4882a593Smuzhiyun nsp32_dbg(NSP32_DEBUG_MSGINOCCUR, "enter");
2229*4882a593Smuzhiyun
2230*4882a593Smuzhiyun synct = data->synct;
2231*4882a593Smuzhiyun syncnum = data->syncnum;
2232*4882a593Smuzhiyun
2233*4882a593Smuzhiyun /*
2234*4882a593Smuzhiyun * If this inititor sent the SDTR message, then target responds SDTR,
2235*4882a593Smuzhiyun * initiator SYNCREG, ACKWIDTH from SDTR parameter.
2236*4882a593Smuzhiyun * Messages are not appropriate, then send back reject message.
2237*4882a593Smuzhiyun * If initiator did not send the SDTR, but target sends SDTR,
2238*4882a593Smuzhiyun * initiator calculator the appropriate parameter and send back SDTR.
2239*4882a593Smuzhiyun */
2240*4882a593Smuzhiyun if (target->sync_flag & SDTR_INITIATOR) {
2241*4882a593Smuzhiyun /*
2242*4882a593Smuzhiyun * Initiator sent SDTR, the target responds and
2243*4882a593Smuzhiyun * send back negotiation SDTR.
2244*4882a593Smuzhiyun */
2245*4882a593Smuzhiyun nsp32_dbg(NSP32_DEBUG_MSGINOCCUR, "target responds SDTR");
2246*4882a593Smuzhiyun
2247*4882a593Smuzhiyun target->sync_flag &= ~SDTR_INITIATOR;
2248*4882a593Smuzhiyun target->sync_flag |= SDTR_DONE;
2249*4882a593Smuzhiyun
2250*4882a593Smuzhiyun /*
2251*4882a593Smuzhiyun * offset:
2252*4882a593Smuzhiyun */
2253*4882a593Smuzhiyun if (get_offset > SYNC_OFFSET) {
2254*4882a593Smuzhiyun /*
2255*4882a593Smuzhiyun * Negotiation is failed, the target send back
2256*4882a593Smuzhiyun * unexpected offset value.
2257*4882a593Smuzhiyun */
2258*4882a593Smuzhiyun goto reject;
2259*4882a593Smuzhiyun }
2260*4882a593Smuzhiyun
2261*4882a593Smuzhiyun if (get_offset == ASYNC_OFFSET) {
2262*4882a593Smuzhiyun /*
2263*4882a593Smuzhiyun * Negotiation is succeeded, the target want
2264*4882a593Smuzhiyun * to fall back into asynchronous transfer mode.
2265*4882a593Smuzhiyun */
2266*4882a593Smuzhiyun goto async;
2267*4882a593Smuzhiyun }
2268*4882a593Smuzhiyun
2269*4882a593Smuzhiyun /*
2270*4882a593Smuzhiyun * period:
2271*4882a593Smuzhiyun * Check whether sync period is too short. If too short,
2272*4882a593Smuzhiyun * fall back to async mode. If it's ok, then investigate
2273*4882a593Smuzhiyun * the received sync period. If sync period is acceptable
2274*4882a593Smuzhiyun * between sync table start_period and end_period, then
2275*4882a593Smuzhiyun * set this I_T nexus as sent offset and period.
2276*4882a593Smuzhiyun * If it's not acceptable, send back reject and fall back
2277*4882a593Smuzhiyun * to async mode.
2278*4882a593Smuzhiyun */
2279*4882a593Smuzhiyun if (get_period < data->synct[0].period_num) {
2280*4882a593Smuzhiyun /*
2281*4882a593Smuzhiyun * Negotiation is failed, the target send back
2282*4882a593Smuzhiyun * unexpected period value.
2283*4882a593Smuzhiyun */
2284*4882a593Smuzhiyun goto reject;
2285*4882a593Smuzhiyun }
2286*4882a593Smuzhiyun
2287*4882a593Smuzhiyun entry = nsp32_search_period_entry(data, target, get_period);
2288*4882a593Smuzhiyun
2289*4882a593Smuzhiyun if (entry < 0) {
2290*4882a593Smuzhiyun /*
2291*4882a593Smuzhiyun * Target want to use long period which is not
2292*4882a593Smuzhiyun * acceptable NinjaSCSI-32Bi/UDE.
2293*4882a593Smuzhiyun */
2294*4882a593Smuzhiyun goto reject;
2295*4882a593Smuzhiyun }
2296*4882a593Smuzhiyun
2297*4882a593Smuzhiyun /*
2298*4882a593Smuzhiyun * Set new sync table and offset in this I_T nexus.
2299*4882a593Smuzhiyun */
2300*4882a593Smuzhiyun nsp32_set_sync_entry(data, target, entry, get_offset);
2301*4882a593Smuzhiyun } else {
2302*4882a593Smuzhiyun /* Target send SDTR to initiator. */
2303*4882a593Smuzhiyun nsp32_dbg(NSP32_DEBUG_MSGINOCCUR, "target send SDTR");
2304*4882a593Smuzhiyun
2305*4882a593Smuzhiyun target->sync_flag |= SDTR_INITIATOR;
2306*4882a593Smuzhiyun
2307*4882a593Smuzhiyun /* offset: */
2308*4882a593Smuzhiyun if (get_offset > SYNC_OFFSET) {
2309*4882a593Smuzhiyun /* send back as SYNC_OFFSET */
2310*4882a593Smuzhiyun get_offset = SYNC_OFFSET;
2311*4882a593Smuzhiyun }
2312*4882a593Smuzhiyun
2313*4882a593Smuzhiyun /* period: */
2314*4882a593Smuzhiyun if (get_period < data->synct[0].period_num) {
2315*4882a593Smuzhiyun get_period = data->synct[0].period_num;
2316*4882a593Smuzhiyun }
2317*4882a593Smuzhiyun
2318*4882a593Smuzhiyun entry = nsp32_search_period_entry(data, target, get_period);
2319*4882a593Smuzhiyun
2320*4882a593Smuzhiyun if (get_offset == ASYNC_OFFSET || entry < 0) {
2321*4882a593Smuzhiyun nsp32_set_async(data, target);
2322*4882a593Smuzhiyun nsp32_build_sdtr(SCpnt, 0, ASYNC_OFFSET);
2323*4882a593Smuzhiyun } else {
2324*4882a593Smuzhiyun nsp32_set_sync_entry(data, target, entry, get_offset);
2325*4882a593Smuzhiyun nsp32_build_sdtr(SCpnt, get_period, get_offset);
2326*4882a593Smuzhiyun }
2327*4882a593Smuzhiyun }
2328*4882a593Smuzhiyun
2329*4882a593Smuzhiyun target->period = get_period;
2330*4882a593Smuzhiyun nsp32_dbg(NSP32_DEBUG_MSGINOCCUR, "exit");
2331*4882a593Smuzhiyun return;
2332*4882a593Smuzhiyun
2333*4882a593Smuzhiyun reject:
2334*4882a593Smuzhiyun /*
2335*4882a593Smuzhiyun * If the current message is unacceptable, send back to the target
2336*4882a593Smuzhiyun * with reject message.
2337*4882a593Smuzhiyun */
2338*4882a593Smuzhiyun nsp32_build_reject(SCpnt);
2339*4882a593Smuzhiyun
2340*4882a593Smuzhiyun async:
2341*4882a593Smuzhiyun nsp32_set_async(data, target); /* set as ASYNC transfer mode */
2342*4882a593Smuzhiyun
2343*4882a593Smuzhiyun target->period = 0;
2344*4882a593Smuzhiyun nsp32_dbg(NSP32_DEBUG_MSGINOCCUR, "exit: set async");
2345*4882a593Smuzhiyun return;
2346*4882a593Smuzhiyun }
2347*4882a593Smuzhiyun
2348*4882a593Smuzhiyun
2349*4882a593Smuzhiyun /*
2350*4882a593Smuzhiyun * Search config entry number matched in sync_table from given
2351*4882a593Smuzhiyun * target and speed period value. If failed to search, return negative value.
2352*4882a593Smuzhiyun */
nsp32_search_period_entry(nsp32_hw_data * data,nsp32_target * target,unsigned char period)2353*4882a593Smuzhiyun static int nsp32_search_period_entry(nsp32_hw_data *data,
2354*4882a593Smuzhiyun nsp32_target *target,
2355*4882a593Smuzhiyun unsigned char period)
2356*4882a593Smuzhiyun {
2357*4882a593Smuzhiyun int i;
2358*4882a593Smuzhiyun
2359*4882a593Smuzhiyun if (target->limit_entry >= data->syncnum) {
2360*4882a593Smuzhiyun nsp32_msg(KERN_ERR, "limit_entry exceeds syncnum!");
2361*4882a593Smuzhiyun target->limit_entry = 0;
2362*4882a593Smuzhiyun }
2363*4882a593Smuzhiyun
2364*4882a593Smuzhiyun for (i = target->limit_entry; i < data->syncnum; i++) {
2365*4882a593Smuzhiyun if (period >= data->synct[i].start_period &&
2366*4882a593Smuzhiyun period <= data->synct[i].end_period) {
2367*4882a593Smuzhiyun break;
2368*4882a593Smuzhiyun }
2369*4882a593Smuzhiyun }
2370*4882a593Smuzhiyun
2371*4882a593Smuzhiyun /*
2372*4882a593Smuzhiyun * Check given period value is over the sync_table value.
2373*4882a593Smuzhiyun * If so, return max value.
2374*4882a593Smuzhiyun */
2375*4882a593Smuzhiyun if (i == data->syncnum) {
2376*4882a593Smuzhiyun i = -1;
2377*4882a593Smuzhiyun }
2378*4882a593Smuzhiyun
2379*4882a593Smuzhiyun return i;
2380*4882a593Smuzhiyun }
2381*4882a593Smuzhiyun
2382*4882a593Smuzhiyun
2383*4882a593Smuzhiyun /*
2384*4882a593Smuzhiyun * target <-> initiator use ASYNC transfer
2385*4882a593Smuzhiyun */
nsp32_set_async(nsp32_hw_data * data,nsp32_target * target)2386*4882a593Smuzhiyun static void nsp32_set_async(nsp32_hw_data *data, nsp32_target *target)
2387*4882a593Smuzhiyun {
2388*4882a593Smuzhiyun unsigned char period = data->synct[target->limit_entry].period_num;
2389*4882a593Smuzhiyun
2390*4882a593Smuzhiyun target->offset = ASYNC_OFFSET;
2391*4882a593Smuzhiyun target->period = 0;
2392*4882a593Smuzhiyun target->syncreg = TO_SYNCREG(period, ASYNC_OFFSET);
2393*4882a593Smuzhiyun target->ackwidth = 0;
2394*4882a593Smuzhiyun target->sample_reg = 0;
2395*4882a593Smuzhiyun
2396*4882a593Smuzhiyun nsp32_dbg(NSP32_DEBUG_SYNC, "set async");
2397*4882a593Smuzhiyun }
2398*4882a593Smuzhiyun
2399*4882a593Smuzhiyun
2400*4882a593Smuzhiyun /*
2401*4882a593Smuzhiyun * target <-> initiator use maximum SYNC transfer
2402*4882a593Smuzhiyun */
nsp32_set_max_sync(nsp32_hw_data * data,nsp32_target * target,unsigned char * period,unsigned char * offset)2403*4882a593Smuzhiyun static void nsp32_set_max_sync(nsp32_hw_data *data,
2404*4882a593Smuzhiyun nsp32_target *target,
2405*4882a593Smuzhiyun unsigned char *period,
2406*4882a593Smuzhiyun unsigned char *offset)
2407*4882a593Smuzhiyun {
2408*4882a593Smuzhiyun unsigned char period_num, ackwidth;
2409*4882a593Smuzhiyun
2410*4882a593Smuzhiyun period_num = data->synct[target->limit_entry].period_num;
2411*4882a593Smuzhiyun *period = data->synct[target->limit_entry].start_period;
2412*4882a593Smuzhiyun ackwidth = data->synct[target->limit_entry].ackwidth;
2413*4882a593Smuzhiyun *offset = SYNC_OFFSET;
2414*4882a593Smuzhiyun
2415*4882a593Smuzhiyun target->syncreg = TO_SYNCREG(period_num, *offset);
2416*4882a593Smuzhiyun target->ackwidth = ackwidth;
2417*4882a593Smuzhiyun target->offset = *offset;
2418*4882a593Smuzhiyun target->sample_reg = 0; /* disable SREQ sampling */
2419*4882a593Smuzhiyun }
2420*4882a593Smuzhiyun
2421*4882a593Smuzhiyun
2422*4882a593Smuzhiyun /*
2423*4882a593Smuzhiyun * target <-> initiator use entry number speed
2424*4882a593Smuzhiyun */
nsp32_set_sync_entry(nsp32_hw_data * data,nsp32_target * target,int entry,unsigned char offset)2425*4882a593Smuzhiyun static void nsp32_set_sync_entry(nsp32_hw_data *data,
2426*4882a593Smuzhiyun nsp32_target *target,
2427*4882a593Smuzhiyun int entry,
2428*4882a593Smuzhiyun unsigned char offset)
2429*4882a593Smuzhiyun {
2430*4882a593Smuzhiyun unsigned char period, ackwidth, sample_rate;
2431*4882a593Smuzhiyun
2432*4882a593Smuzhiyun period = data->synct[entry].period_num;
2433*4882a593Smuzhiyun ackwidth = data->synct[entry].ackwidth;
2434*4882a593Smuzhiyun sample_rate = data->synct[entry].sample_rate;
2435*4882a593Smuzhiyun
2436*4882a593Smuzhiyun target->syncreg = TO_SYNCREG(period, offset);
2437*4882a593Smuzhiyun target->ackwidth = ackwidth;
2438*4882a593Smuzhiyun target->offset = offset;
2439*4882a593Smuzhiyun target->sample_reg = sample_rate | SAMPLING_ENABLE;
2440*4882a593Smuzhiyun
2441*4882a593Smuzhiyun nsp32_dbg(NSP32_DEBUG_SYNC, "set sync");
2442*4882a593Smuzhiyun }
2443*4882a593Smuzhiyun
2444*4882a593Smuzhiyun
2445*4882a593Smuzhiyun /*
2446*4882a593Smuzhiyun * It waits until SCSI REQ becomes assertion or negation state.
2447*4882a593Smuzhiyun *
2448*4882a593Smuzhiyun * Note: If nsp32_msgin_occur is called, we asserts SCSI ACK. Then
2449*4882a593Smuzhiyun * connected target responds SCSI REQ negation. We have to wait
2450*4882a593Smuzhiyun * SCSI REQ becomes negation in order to negate SCSI ACK signal for
2451*4882a593Smuzhiyun * REQ-ACK handshake.
2452*4882a593Smuzhiyun */
nsp32_wait_req(nsp32_hw_data * data,int state)2453*4882a593Smuzhiyun static void nsp32_wait_req(nsp32_hw_data *data, int state)
2454*4882a593Smuzhiyun {
2455*4882a593Smuzhiyun unsigned int base = data->BaseAddress;
2456*4882a593Smuzhiyun int wait_time = 0;
2457*4882a593Smuzhiyun unsigned char bus, req_bit;
2458*4882a593Smuzhiyun
2459*4882a593Smuzhiyun if (!((state == ASSERT) || (state == NEGATE))) {
2460*4882a593Smuzhiyun nsp32_msg(KERN_ERR, "unknown state designation");
2461*4882a593Smuzhiyun }
2462*4882a593Smuzhiyun /* REQ is BIT(5) */
2463*4882a593Smuzhiyun req_bit = (state == ASSERT ? BUSMON_REQ : 0);
2464*4882a593Smuzhiyun
2465*4882a593Smuzhiyun do {
2466*4882a593Smuzhiyun bus = nsp32_read1(base, SCSI_BUS_MONITOR);
2467*4882a593Smuzhiyun if ((bus & BUSMON_REQ) == req_bit) {
2468*4882a593Smuzhiyun nsp32_dbg(NSP32_DEBUG_WAIT,
2469*4882a593Smuzhiyun "wait_time: %d", wait_time);
2470*4882a593Smuzhiyun return;
2471*4882a593Smuzhiyun }
2472*4882a593Smuzhiyun udelay(1);
2473*4882a593Smuzhiyun wait_time++;
2474*4882a593Smuzhiyun } while (wait_time < REQSACK_TIMEOUT_TIME);
2475*4882a593Smuzhiyun
2476*4882a593Smuzhiyun nsp32_msg(KERN_WARNING, "wait REQ timeout, req_bit: 0x%x", req_bit);
2477*4882a593Smuzhiyun }
2478*4882a593Smuzhiyun
2479*4882a593Smuzhiyun /*
2480*4882a593Smuzhiyun * It waits until SCSI SACK becomes assertion or negation state.
2481*4882a593Smuzhiyun */
nsp32_wait_sack(nsp32_hw_data * data,int state)2482*4882a593Smuzhiyun static void nsp32_wait_sack(nsp32_hw_data *data, int state)
2483*4882a593Smuzhiyun {
2484*4882a593Smuzhiyun unsigned int base = data->BaseAddress;
2485*4882a593Smuzhiyun int wait_time = 0;
2486*4882a593Smuzhiyun unsigned char bus, ack_bit;
2487*4882a593Smuzhiyun
2488*4882a593Smuzhiyun if (!((state == ASSERT) || (state == NEGATE))) {
2489*4882a593Smuzhiyun nsp32_msg(KERN_ERR, "unknown state designation");
2490*4882a593Smuzhiyun }
2491*4882a593Smuzhiyun /* ACK is BIT(4) */
2492*4882a593Smuzhiyun ack_bit = (state == ASSERT ? BUSMON_ACK : 0);
2493*4882a593Smuzhiyun
2494*4882a593Smuzhiyun do {
2495*4882a593Smuzhiyun bus = nsp32_read1(base, SCSI_BUS_MONITOR);
2496*4882a593Smuzhiyun if ((bus & BUSMON_ACK) == ack_bit) {
2497*4882a593Smuzhiyun nsp32_dbg(NSP32_DEBUG_WAIT,
2498*4882a593Smuzhiyun "wait_time: %d", wait_time);
2499*4882a593Smuzhiyun return;
2500*4882a593Smuzhiyun }
2501*4882a593Smuzhiyun udelay(1);
2502*4882a593Smuzhiyun wait_time++;
2503*4882a593Smuzhiyun } while (wait_time < REQSACK_TIMEOUT_TIME);
2504*4882a593Smuzhiyun
2505*4882a593Smuzhiyun nsp32_msg(KERN_WARNING, "wait SACK timeout, ack_bit: 0x%x", ack_bit);
2506*4882a593Smuzhiyun }
2507*4882a593Smuzhiyun
2508*4882a593Smuzhiyun /*
2509*4882a593Smuzhiyun * assert SCSI ACK
2510*4882a593Smuzhiyun *
2511*4882a593Smuzhiyun * Note: SCSI ACK assertion needs with ACKENB=1, AUTODIRECTION=1.
2512*4882a593Smuzhiyun */
nsp32_sack_assert(nsp32_hw_data * data)2513*4882a593Smuzhiyun static void nsp32_sack_assert(nsp32_hw_data *data)
2514*4882a593Smuzhiyun {
2515*4882a593Smuzhiyun unsigned int base = data->BaseAddress;
2516*4882a593Smuzhiyun unsigned char busctrl;
2517*4882a593Smuzhiyun
2518*4882a593Smuzhiyun busctrl = nsp32_read1(base, SCSI_BUS_CONTROL);
2519*4882a593Smuzhiyun busctrl |= (BUSCTL_ACK | AUTODIRECTION | ACKENB);
2520*4882a593Smuzhiyun nsp32_write1(base, SCSI_BUS_CONTROL, busctrl);
2521*4882a593Smuzhiyun }
2522*4882a593Smuzhiyun
2523*4882a593Smuzhiyun /*
2524*4882a593Smuzhiyun * negate SCSI ACK
2525*4882a593Smuzhiyun */
nsp32_sack_negate(nsp32_hw_data * data)2526*4882a593Smuzhiyun static void nsp32_sack_negate(nsp32_hw_data *data)
2527*4882a593Smuzhiyun {
2528*4882a593Smuzhiyun unsigned int base = data->BaseAddress;
2529*4882a593Smuzhiyun unsigned char busctrl;
2530*4882a593Smuzhiyun
2531*4882a593Smuzhiyun busctrl = nsp32_read1(base, SCSI_BUS_CONTROL);
2532*4882a593Smuzhiyun busctrl &= ~BUSCTL_ACK;
2533*4882a593Smuzhiyun nsp32_write1(base, SCSI_BUS_CONTROL, busctrl);
2534*4882a593Smuzhiyun }
2535*4882a593Smuzhiyun
2536*4882a593Smuzhiyun
2537*4882a593Smuzhiyun
2538*4882a593Smuzhiyun /*
2539*4882a593Smuzhiyun * Note: n_io_port is defined as 0x7f because I/O register port is
2540*4882a593Smuzhiyun * assigned as:
2541*4882a593Smuzhiyun * 0x800-0x8ff: memory mapped I/O port
2542*4882a593Smuzhiyun * 0x900-0xbff: (map same 0x800-0x8ff I/O port image repeatedly)
2543*4882a593Smuzhiyun * 0xc00-0xfff: CardBus status registers
2544*4882a593Smuzhiyun */
nsp32_detect(struct pci_dev * pdev)2545*4882a593Smuzhiyun static int nsp32_detect(struct pci_dev *pdev)
2546*4882a593Smuzhiyun {
2547*4882a593Smuzhiyun struct Scsi_Host *host; /* registered host structure */
2548*4882a593Smuzhiyun struct resource *res;
2549*4882a593Smuzhiyun nsp32_hw_data *data;
2550*4882a593Smuzhiyun int ret;
2551*4882a593Smuzhiyun int i, j;
2552*4882a593Smuzhiyun
2553*4882a593Smuzhiyun nsp32_dbg(NSP32_DEBUG_REGISTER, "enter");
2554*4882a593Smuzhiyun
2555*4882a593Smuzhiyun /*
2556*4882a593Smuzhiyun * register this HBA as SCSI device
2557*4882a593Smuzhiyun */
2558*4882a593Smuzhiyun host = scsi_host_alloc(&nsp32_template, sizeof(nsp32_hw_data));
2559*4882a593Smuzhiyun if (host == NULL) {
2560*4882a593Smuzhiyun nsp32_msg (KERN_ERR, "failed to scsi register");
2561*4882a593Smuzhiyun goto err;
2562*4882a593Smuzhiyun }
2563*4882a593Smuzhiyun
2564*4882a593Smuzhiyun /*
2565*4882a593Smuzhiyun * set nsp32_hw_data
2566*4882a593Smuzhiyun */
2567*4882a593Smuzhiyun data = (nsp32_hw_data *)host->hostdata;
2568*4882a593Smuzhiyun
2569*4882a593Smuzhiyun memcpy(data, &nsp32_data_base, sizeof(nsp32_hw_data));
2570*4882a593Smuzhiyun
2571*4882a593Smuzhiyun host->irq = data->IrqNumber;
2572*4882a593Smuzhiyun host->io_port = data->BaseAddress;
2573*4882a593Smuzhiyun host->unique_id = data->BaseAddress;
2574*4882a593Smuzhiyun host->n_io_port = data->NumAddress;
2575*4882a593Smuzhiyun host->base = (unsigned long)data->MmioAddress;
2576*4882a593Smuzhiyun
2577*4882a593Smuzhiyun data->Host = host;
2578*4882a593Smuzhiyun spin_lock_init(&(data->Lock));
2579*4882a593Smuzhiyun
2580*4882a593Smuzhiyun data->cur_lunt = NULL;
2581*4882a593Smuzhiyun data->cur_target = NULL;
2582*4882a593Smuzhiyun
2583*4882a593Smuzhiyun /*
2584*4882a593Smuzhiyun * Bus master transfer mode is supported currently.
2585*4882a593Smuzhiyun */
2586*4882a593Smuzhiyun data->trans_method = NSP32_TRANSFER_BUSMASTER;
2587*4882a593Smuzhiyun
2588*4882a593Smuzhiyun /*
2589*4882a593Smuzhiyun * Set clock div, CLOCK_4 (HBA has own external clock, and
2590*4882a593Smuzhiyun * dividing * 100ns/4).
2591*4882a593Smuzhiyun * Currently CLOCK_4 has only tested, not for CLOCK_2/PCICLK yet.
2592*4882a593Smuzhiyun */
2593*4882a593Smuzhiyun data->clock = CLOCK_4;
2594*4882a593Smuzhiyun
2595*4882a593Smuzhiyun /*
2596*4882a593Smuzhiyun * Select appropriate nsp32_sync_table and set I_CLOCKDIV.
2597*4882a593Smuzhiyun */
2598*4882a593Smuzhiyun switch (data->clock) {
2599*4882a593Smuzhiyun case CLOCK_4:
2600*4882a593Smuzhiyun /* If data->clock is CLOCK_4, then select 40M sync table. */
2601*4882a593Smuzhiyun data->synct = nsp32_sync_table_40M;
2602*4882a593Smuzhiyun data->syncnum = ARRAY_SIZE(nsp32_sync_table_40M);
2603*4882a593Smuzhiyun break;
2604*4882a593Smuzhiyun case CLOCK_2:
2605*4882a593Smuzhiyun /* If data->clock is CLOCK_2, then select 20M sync table. */
2606*4882a593Smuzhiyun data->synct = nsp32_sync_table_20M;
2607*4882a593Smuzhiyun data->syncnum = ARRAY_SIZE(nsp32_sync_table_20M);
2608*4882a593Smuzhiyun break;
2609*4882a593Smuzhiyun case PCICLK:
2610*4882a593Smuzhiyun /* If data->clock is PCICLK, then select pci sync table. */
2611*4882a593Smuzhiyun data->synct = nsp32_sync_table_pci;
2612*4882a593Smuzhiyun data->syncnum = ARRAY_SIZE(nsp32_sync_table_pci);
2613*4882a593Smuzhiyun break;
2614*4882a593Smuzhiyun default:
2615*4882a593Smuzhiyun nsp32_msg(KERN_WARNING,
2616*4882a593Smuzhiyun "Invalid clock div is selected, set CLOCK_4.");
2617*4882a593Smuzhiyun /* Use default value CLOCK_4 */
2618*4882a593Smuzhiyun data->clock = CLOCK_4;
2619*4882a593Smuzhiyun data->synct = nsp32_sync_table_40M;
2620*4882a593Smuzhiyun data->syncnum = ARRAY_SIZE(nsp32_sync_table_40M);
2621*4882a593Smuzhiyun }
2622*4882a593Smuzhiyun
2623*4882a593Smuzhiyun /*
2624*4882a593Smuzhiyun * setup nsp32_lunt
2625*4882a593Smuzhiyun */
2626*4882a593Smuzhiyun
2627*4882a593Smuzhiyun /*
2628*4882a593Smuzhiyun * setup DMA
2629*4882a593Smuzhiyun */
2630*4882a593Smuzhiyun if (dma_set_mask(&pdev->dev, DMA_BIT_MASK(32)) != 0) {
2631*4882a593Smuzhiyun nsp32_msg (KERN_ERR, "failed to set PCI DMA mask");
2632*4882a593Smuzhiyun goto scsi_unregister;
2633*4882a593Smuzhiyun }
2634*4882a593Smuzhiyun
2635*4882a593Smuzhiyun /*
2636*4882a593Smuzhiyun * allocate autoparam DMA resource.
2637*4882a593Smuzhiyun */
2638*4882a593Smuzhiyun data->autoparam = dma_alloc_coherent(&pdev->dev,
2639*4882a593Smuzhiyun sizeof(nsp32_autoparam), &(data->auto_paddr),
2640*4882a593Smuzhiyun GFP_KERNEL);
2641*4882a593Smuzhiyun if (data->autoparam == NULL) {
2642*4882a593Smuzhiyun nsp32_msg(KERN_ERR, "failed to allocate DMA memory");
2643*4882a593Smuzhiyun goto scsi_unregister;
2644*4882a593Smuzhiyun }
2645*4882a593Smuzhiyun
2646*4882a593Smuzhiyun /*
2647*4882a593Smuzhiyun * allocate scatter-gather DMA resource.
2648*4882a593Smuzhiyun */
2649*4882a593Smuzhiyun data->sg_list = dma_alloc_coherent(&pdev->dev, NSP32_SG_TABLE_SIZE,
2650*4882a593Smuzhiyun &data->sg_paddr, GFP_KERNEL);
2651*4882a593Smuzhiyun if (data->sg_list == NULL) {
2652*4882a593Smuzhiyun nsp32_msg(KERN_ERR, "failed to allocate DMA memory");
2653*4882a593Smuzhiyun goto free_autoparam;
2654*4882a593Smuzhiyun }
2655*4882a593Smuzhiyun
2656*4882a593Smuzhiyun for (i = 0; i < ARRAY_SIZE(data->lunt); i++) {
2657*4882a593Smuzhiyun for (j = 0; j < ARRAY_SIZE(data->lunt[0]); j++) {
2658*4882a593Smuzhiyun int offset = i * ARRAY_SIZE(data->lunt[0]) + j;
2659*4882a593Smuzhiyun nsp32_lunt tmp = {
2660*4882a593Smuzhiyun .SCpnt = NULL,
2661*4882a593Smuzhiyun .save_datp = 0,
2662*4882a593Smuzhiyun .msgin03 = FALSE,
2663*4882a593Smuzhiyun .sg_num = 0,
2664*4882a593Smuzhiyun .cur_entry = 0,
2665*4882a593Smuzhiyun .sglun = &(data->sg_list[offset]),
2666*4882a593Smuzhiyun .sglun_paddr = data->sg_paddr + (offset * sizeof(nsp32_sglun)),
2667*4882a593Smuzhiyun };
2668*4882a593Smuzhiyun
2669*4882a593Smuzhiyun data->lunt[i][j] = tmp;
2670*4882a593Smuzhiyun }
2671*4882a593Smuzhiyun }
2672*4882a593Smuzhiyun
2673*4882a593Smuzhiyun /*
2674*4882a593Smuzhiyun * setup target
2675*4882a593Smuzhiyun */
2676*4882a593Smuzhiyun for (i = 0; i < ARRAY_SIZE(data->target); i++) {
2677*4882a593Smuzhiyun nsp32_target *target = &(data->target[i]);
2678*4882a593Smuzhiyun
2679*4882a593Smuzhiyun target->limit_entry = 0;
2680*4882a593Smuzhiyun target->sync_flag = 0;
2681*4882a593Smuzhiyun nsp32_set_async(data, target);
2682*4882a593Smuzhiyun }
2683*4882a593Smuzhiyun
2684*4882a593Smuzhiyun /*
2685*4882a593Smuzhiyun * EEPROM check
2686*4882a593Smuzhiyun */
2687*4882a593Smuzhiyun ret = nsp32_getprom_param(data);
2688*4882a593Smuzhiyun if (ret == FALSE) {
2689*4882a593Smuzhiyun data->resettime = 3; /* default 3 */
2690*4882a593Smuzhiyun }
2691*4882a593Smuzhiyun
2692*4882a593Smuzhiyun /*
2693*4882a593Smuzhiyun * setup HBA
2694*4882a593Smuzhiyun */
2695*4882a593Smuzhiyun nsp32hw_init(data);
2696*4882a593Smuzhiyun
2697*4882a593Smuzhiyun snprintf(data->info_str, sizeof(data->info_str),
2698*4882a593Smuzhiyun "NinjaSCSI-32Bi/UDE: irq %d, io 0x%lx+0x%x",
2699*4882a593Smuzhiyun host->irq, host->io_port, host->n_io_port);
2700*4882a593Smuzhiyun
2701*4882a593Smuzhiyun /*
2702*4882a593Smuzhiyun * SCSI bus reset
2703*4882a593Smuzhiyun *
2704*4882a593Smuzhiyun * Note: It's important to reset SCSI bus in initialization phase.
2705*4882a593Smuzhiyun * NinjaSCSI-32Bi/UDE HBA EEPROM seems to exchange SDTR when
2706*4882a593Smuzhiyun * system is coming up, so SCSI devices connected to HBA is set as
2707*4882a593Smuzhiyun * un-asynchronous mode. It brings the merit that this HBA is
2708*4882a593Smuzhiyun * ready to start synchronous transfer without any preparation,
2709*4882a593Smuzhiyun * but we are difficult to control transfer speed. In addition,
2710*4882a593Smuzhiyun * it prevents device transfer speed from effecting EEPROM start-up
2711*4882a593Smuzhiyun * SDTR. NinjaSCSI-32Bi/UDE has the feature if EEPROM is set as
2712*4882a593Smuzhiyun * Auto Mode, then FAST-10M is selected when SCSI devices are
2713*4882a593Smuzhiyun * connected same or more than 4 devices. It should be avoided
2714*4882a593Smuzhiyun * depending on this specification. Thus, resetting the SCSI bus
2715*4882a593Smuzhiyun * restores all connected SCSI devices to asynchronous mode, then
2716*4882a593Smuzhiyun * this driver set SDTR safely later, and we can control all SCSI
2717*4882a593Smuzhiyun * device transfer mode.
2718*4882a593Smuzhiyun */
2719*4882a593Smuzhiyun nsp32_do_bus_reset(data);
2720*4882a593Smuzhiyun
2721*4882a593Smuzhiyun ret = request_irq(host->irq, do_nsp32_isr, IRQF_SHARED, "nsp32", data);
2722*4882a593Smuzhiyun if (ret < 0) {
2723*4882a593Smuzhiyun nsp32_msg(KERN_ERR, "Unable to allocate IRQ for NinjaSCSI32 "
2724*4882a593Smuzhiyun "SCSI PCI controller. Interrupt: %d", host->irq);
2725*4882a593Smuzhiyun goto free_sg_list;
2726*4882a593Smuzhiyun }
2727*4882a593Smuzhiyun
2728*4882a593Smuzhiyun /*
2729*4882a593Smuzhiyun * PCI IO register
2730*4882a593Smuzhiyun */
2731*4882a593Smuzhiyun res = request_region(host->io_port, host->n_io_port, "nsp32");
2732*4882a593Smuzhiyun if (res == NULL) {
2733*4882a593Smuzhiyun nsp32_msg(KERN_ERR,
2734*4882a593Smuzhiyun "I/O region 0x%lx+0x%lx is already used",
2735*4882a593Smuzhiyun data->BaseAddress, data->NumAddress);
2736*4882a593Smuzhiyun goto free_irq;
2737*4882a593Smuzhiyun }
2738*4882a593Smuzhiyun
2739*4882a593Smuzhiyun ret = scsi_add_host(host, &pdev->dev);
2740*4882a593Smuzhiyun if (ret) {
2741*4882a593Smuzhiyun nsp32_msg(KERN_ERR, "failed to add scsi host");
2742*4882a593Smuzhiyun goto free_region;
2743*4882a593Smuzhiyun }
2744*4882a593Smuzhiyun scsi_scan_host(host);
2745*4882a593Smuzhiyun pci_set_drvdata(pdev, host);
2746*4882a593Smuzhiyun return 0;
2747*4882a593Smuzhiyun
2748*4882a593Smuzhiyun free_region:
2749*4882a593Smuzhiyun release_region(host->io_port, host->n_io_port);
2750*4882a593Smuzhiyun
2751*4882a593Smuzhiyun free_irq:
2752*4882a593Smuzhiyun free_irq(host->irq, data);
2753*4882a593Smuzhiyun
2754*4882a593Smuzhiyun free_sg_list:
2755*4882a593Smuzhiyun dma_free_coherent(&pdev->dev, NSP32_SG_TABLE_SIZE,
2756*4882a593Smuzhiyun data->sg_list, data->sg_paddr);
2757*4882a593Smuzhiyun
2758*4882a593Smuzhiyun free_autoparam:
2759*4882a593Smuzhiyun dma_free_coherent(&pdev->dev, sizeof(nsp32_autoparam),
2760*4882a593Smuzhiyun data->autoparam, data->auto_paddr);
2761*4882a593Smuzhiyun
2762*4882a593Smuzhiyun scsi_unregister:
2763*4882a593Smuzhiyun scsi_host_put(host);
2764*4882a593Smuzhiyun
2765*4882a593Smuzhiyun err:
2766*4882a593Smuzhiyun return 1;
2767*4882a593Smuzhiyun }
2768*4882a593Smuzhiyun
nsp32_release(struct Scsi_Host * host)2769*4882a593Smuzhiyun static int nsp32_release(struct Scsi_Host *host)
2770*4882a593Smuzhiyun {
2771*4882a593Smuzhiyun nsp32_hw_data *data = (nsp32_hw_data *)host->hostdata;
2772*4882a593Smuzhiyun
2773*4882a593Smuzhiyun if (data->autoparam) {
2774*4882a593Smuzhiyun dma_free_coherent(&data->Pci->dev, sizeof(nsp32_autoparam),
2775*4882a593Smuzhiyun data->autoparam, data->auto_paddr);
2776*4882a593Smuzhiyun }
2777*4882a593Smuzhiyun
2778*4882a593Smuzhiyun if (data->sg_list) {
2779*4882a593Smuzhiyun dma_free_coherent(&data->Pci->dev, NSP32_SG_TABLE_SIZE,
2780*4882a593Smuzhiyun data->sg_list, data->sg_paddr);
2781*4882a593Smuzhiyun }
2782*4882a593Smuzhiyun
2783*4882a593Smuzhiyun if (host->irq) {
2784*4882a593Smuzhiyun free_irq(host->irq, data);
2785*4882a593Smuzhiyun }
2786*4882a593Smuzhiyun
2787*4882a593Smuzhiyun if (host->io_port && host->n_io_port) {
2788*4882a593Smuzhiyun release_region(host->io_port, host->n_io_port);
2789*4882a593Smuzhiyun }
2790*4882a593Smuzhiyun
2791*4882a593Smuzhiyun if (data->MmioAddress) {
2792*4882a593Smuzhiyun iounmap(data->MmioAddress);
2793*4882a593Smuzhiyun }
2794*4882a593Smuzhiyun
2795*4882a593Smuzhiyun return 0;
2796*4882a593Smuzhiyun }
2797*4882a593Smuzhiyun
nsp32_info(struct Scsi_Host * shpnt)2798*4882a593Smuzhiyun static const char *nsp32_info(struct Scsi_Host *shpnt)
2799*4882a593Smuzhiyun {
2800*4882a593Smuzhiyun nsp32_hw_data *data = (nsp32_hw_data *)shpnt->hostdata;
2801*4882a593Smuzhiyun
2802*4882a593Smuzhiyun return data->info_str;
2803*4882a593Smuzhiyun }
2804*4882a593Smuzhiyun
2805*4882a593Smuzhiyun
2806*4882a593Smuzhiyun /****************************************************************************
2807*4882a593Smuzhiyun * error handler
2808*4882a593Smuzhiyun */
nsp32_eh_abort(struct scsi_cmnd * SCpnt)2809*4882a593Smuzhiyun static int nsp32_eh_abort(struct scsi_cmnd *SCpnt)
2810*4882a593Smuzhiyun {
2811*4882a593Smuzhiyun nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata;
2812*4882a593Smuzhiyun unsigned int base = SCpnt->device->host->io_port;
2813*4882a593Smuzhiyun
2814*4882a593Smuzhiyun nsp32_msg(KERN_WARNING, "abort");
2815*4882a593Smuzhiyun
2816*4882a593Smuzhiyun if (data->cur_lunt->SCpnt == NULL) {
2817*4882a593Smuzhiyun nsp32_dbg(NSP32_DEBUG_BUSRESET, "abort failed");
2818*4882a593Smuzhiyun return FAILED;
2819*4882a593Smuzhiyun }
2820*4882a593Smuzhiyun
2821*4882a593Smuzhiyun if (data->cur_target->sync_flag & (SDTR_INITIATOR | SDTR_TARGET)) {
2822*4882a593Smuzhiyun /* reset SDTR negotiation */
2823*4882a593Smuzhiyun data->cur_target->sync_flag = 0;
2824*4882a593Smuzhiyun nsp32_set_async(data, data->cur_target);
2825*4882a593Smuzhiyun }
2826*4882a593Smuzhiyun
2827*4882a593Smuzhiyun nsp32_write2(base, TRANSFER_CONTROL, 0);
2828*4882a593Smuzhiyun nsp32_write2(base, BM_CNT, 0);
2829*4882a593Smuzhiyun
2830*4882a593Smuzhiyun SCpnt->result = DID_ABORT << 16;
2831*4882a593Smuzhiyun nsp32_scsi_done(SCpnt);
2832*4882a593Smuzhiyun
2833*4882a593Smuzhiyun nsp32_dbg(NSP32_DEBUG_BUSRESET, "abort success");
2834*4882a593Smuzhiyun return SUCCESS;
2835*4882a593Smuzhiyun }
2836*4882a593Smuzhiyun
nsp32_do_bus_reset(nsp32_hw_data * data)2837*4882a593Smuzhiyun static void nsp32_do_bus_reset(nsp32_hw_data *data)
2838*4882a593Smuzhiyun {
2839*4882a593Smuzhiyun unsigned int base = data->BaseAddress;
2840*4882a593Smuzhiyun unsigned short intrdat;
2841*4882a593Smuzhiyun int i;
2842*4882a593Smuzhiyun
2843*4882a593Smuzhiyun nsp32_dbg(NSP32_DEBUG_BUSRESET, "in");
2844*4882a593Smuzhiyun
2845*4882a593Smuzhiyun /*
2846*4882a593Smuzhiyun * stop all transfer
2847*4882a593Smuzhiyun * clear TRANSFERCONTROL_BM_START
2848*4882a593Smuzhiyun * clear counter
2849*4882a593Smuzhiyun */
2850*4882a593Smuzhiyun nsp32_write2(base, TRANSFER_CONTROL, 0);
2851*4882a593Smuzhiyun nsp32_write4(base, BM_CNT, 0);
2852*4882a593Smuzhiyun nsp32_write4(base, CLR_COUNTER, CLRCOUNTER_ALLMASK);
2853*4882a593Smuzhiyun
2854*4882a593Smuzhiyun /*
2855*4882a593Smuzhiyun * fall back to asynchronous transfer mode
2856*4882a593Smuzhiyun * initialize SDTR negotiation flag
2857*4882a593Smuzhiyun */
2858*4882a593Smuzhiyun for (i = 0; i < ARRAY_SIZE(data->target); i++) {
2859*4882a593Smuzhiyun nsp32_target *target = &data->target[i];
2860*4882a593Smuzhiyun
2861*4882a593Smuzhiyun target->sync_flag = 0;
2862*4882a593Smuzhiyun nsp32_set_async(data, target);
2863*4882a593Smuzhiyun }
2864*4882a593Smuzhiyun
2865*4882a593Smuzhiyun /*
2866*4882a593Smuzhiyun * reset SCSI bus
2867*4882a593Smuzhiyun */
2868*4882a593Smuzhiyun nsp32_write1(base, SCSI_BUS_CONTROL, BUSCTL_RST);
2869*4882a593Smuzhiyun mdelay(RESET_HOLD_TIME / 1000);
2870*4882a593Smuzhiyun nsp32_write1(base, SCSI_BUS_CONTROL, 0);
2871*4882a593Smuzhiyun for(i = 0; i < 5; i++) {
2872*4882a593Smuzhiyun intrdat = nsp32_read2(base, IRQ_STATUS); /* dummy read */
2873*4882a593Smuzhiyun nsp32_dbg(NSP32_DEBUG_BUSRESET, "irq:1: 0x%x", intrdat);
2874*4882a593Smuzhiyun }
2875*4882a593Smuzhiyun
2876*4882a593Smuzhiyun data->CurrentSC = NULL;
2877*4882a593Smuzhiyun }
2878*4882a593Smuzhiyun
nsp32_eh_host_reset(struct scsi_cmnd * SCpnt)2879*4882a593Smuzhiyun static int nsp32_eh_host_reset(struct scsi_cmnd *SCpnt)
2880*4882a593Smuzhiyun {
2881*4882a593Smuzhiyun struct Scsi_Host *host = SCpnt->device->host;
2882*4882a593Smuzhiyun unsigned int base = SCpnt->device->host->io_port;
2883*4882a593Smuzhiyun nsp32_hw_data *data = (nsp32_hw_data *)host->hostdata;
2884*4882a593Smuzhiyun
2885*4882a593Smuzhiyun nsp32_msg(KERN_INFO, "Host Reset");
2886*4882a593Smuzhiyun nsp32_dbg(NSP32_DEBUG_BUSRESET, "SCpnt=0x%x", SCpnt);
2887*4882a593Smuzhiyun
2888*4882a593Smuzhiyun spin_lock_irq(SCpnt->device->host->host_lock);
2889*4882a593Smuzhiyun
2890*4882a593Smuzhiyun nsp32hw_init(data);
2891*4882a593Smuzhiyun nsp32_write2(base, IRQ_CONTROL, IRQ_CONTROL_ALL_IRQ_MASK);
2892*4882a593Smuzhiyun nsp32_do_bus_reset(data);
2893*4882a593Smuzhiyun nsp32_write2(base, IRQ_CONTROL, 0);
2894*4882a593Smuzhiyun
2895*4882a593Smuzhiyun spin_unlock_irq(SCpnt->device->host->host_lock);
2896*4882a593Smuzhiyun return SUCCESS; /* Host reset is succeeded at any time. */
2897*4882a593Smuzhiyun }
2898*4882a593Smuzhiyun
2899*4882a593Smuzhiyun
2900*4882a593Smuzhiyun /**************************************************************************
2901*4882a593Smuzhiyun * EEPROM handler
2902*4882a593Smuzhiyun */
2903*4882a593Smuzhiyun
2904*4882a593Smuzhiyun /*
2905*4882a593Smuzhiyun * getting EEPROM parameter
2906*4882a593Smuzhiyun */
nsp32_getprom_param(nsp32_hw_data * data)2907*4882a593Smuzhiyun static int nsp32_getprom_param(nsp32_hw_data *data)
2908*4882a593Smuzhiyun {
2909*4882a593Smuzhiyun int vendor = data->pci_devid->vendor;
2910*4882a593Smuzhiyun int device = data->pci_devid->device;
2911*4882a593Smuzhiyun int ret, val, i;
2912*4882a593Smuzhiyun
2913*4882a593Smuzhiyun /*
2914*4882a593Smuzhiyun * EEPROM checking.
2915*4882a593Smuzhiyun */
2916*4882a593Smuzhiyun ret = nsp32_prom_read(data, 0x7e);
2917*4882a593Smuzhiyun if (ret != 0x55) {
2918*4882a593Smuzhiyun nsp32_msg(KERN_INFO, "No EEPROM detected: 0x%x", ret);
2919*4882a593Smuzhiyun return FALSE;
2920*4882a593Smuzhiyun }
2921*4882a593Smuzhiyun ret = nsp32_prom_read(data, 0x7f);
2922*4882a593Smuzhiyun if (ret != 0xaa) {
2923*4882a593Smuzhiyun nsp32_msg(KERN_INFO, "Invalid number: 0x%x", ret);
2924*4882a593Smuzhiyun return FALSE;
2925*4882a593Smuzhiyun }
2926*4882a593Smuzhiyun
2927*4882a593Smuzhiyun /*
2928*4882a593Smuzhiyun * check EEPROM type
2929*4882a593Smuzhiyun */
2930*4882a593Smuzhiyun if (vendor == PCI_VENDOR_ID_WORKBIT &&
2931*4882a593Smuzhiyun device == PCI_DEVICE_ID_WORKBIT_STANDARD) {
2932*4882a593Smuzhiyun ret = nsp32_getprom_c16(data);
2933*4882a593Smuzhiyun } else if (vendor == PCI_VENDOR_ID_WORKBIT &&
2934*4882a593Smuzhiyun device == PCI_DEVICE_ID_NINJASCSI_32BIB_LOGITEC) {
2935*4882a593Smuzhiyun ret = nsp32_getprom_at24(data);
2936*4882a593Smuzhiyun } else if (vendor == PCI_VENDOR_ID_WORKBIT &&
2937*4882a593Smuzhiyun device == PCI_DEVICE_ID_NINJASCSI_32UDE_MELCO ) {
2938*4882a593Smuzhiyun ret = nsp32_getprom_at24(data);
2939*4882a593Smuzhiyun } else {
2940*4882a593Smuzhiyun nsp32_msg(KERN_WARNING, "Unknown EEPROM");
2941*4882a593Smuzhiyun ret = FALSE;
2942*4882a593Smuzhiyun }
2943*4882a593Smuzhiyun
2944*4882a593Smuzhiyun /* for debug : SPROM data full checking */
2945*4882a593Smuzhiyun for (i = 0; i <= 0x1f; i++) {
2946*4882a593Smuzhiyun val = nsp32_prom_read(data, i);
2947*4882a593Smuzhiyun nsp32_dbg(NSP32_DEBUG_EEPROM,
2948*4882a593Smuzhiyun "rom address 0x%x : 0x%x", i, val);
2949*4882a593Smuzhiyun }
2950*4882a593Smuzhiyun
2951*4882a593Smuzhiyun return ret;
2952*4882a593Smuzhiyun }
2953*4882a593Smuzhiyun
2954*4882a593Smuzhiyun
2955*4882a593Smuzhiyun /*
2956*4882a593Smuzhiyun * AT24C01A (Logitec: LHA-600S), AT24C02 (Melco Buffalo: IFC-USLP) data map:
2957*4882a593Smuzhiyun *
2958*4882a593Smuzhiyun * ROMADDR
2959*4882a593Smuzhiyun * 0x00 - 0x06 : Device Synchronous Transfer Period (SCSI ID 0 - 6)
2960*4882a593Smuzhiyun * Value 0x0: ASYNC, 0x0c: Ultra-20M, 0x19: Fast-10M
2961*4882a593Smuzhiyun * 0x07 : HBA Synchronous Transfer Period
2962*4882a593Smuzhiyun * Value 0: AutoSync, 1: Manual Setting
2963*4882a593Smuzhiyun * 0x08 - 0x0f : Not Used? (0x0)
2964*4882a593Smuzhiyun * 0x10 : Bus Termination
2965*4882a593Smuzhiyun * Value 0: Auto[ON], 1: ON, 2: OFF
2966*4882a593Smuzhiyun * 0x11 : Not Used? (0)
2967*4882a593Smuzhiyun * 0x12 : Bus Reset Delay Time (0x03)
2968*4882a593Smuzhiyun * 0x13 : Bootable CD Support
2969*4882a593Smuzhiyun * Value 0: Disable, 1: Enable
2970*4882a593Smuzhiyun * 0x14 : Device Scan
2971*4882a593Smuzhiyun * Bit 7 6 5 4 3 2 1 0
2972*4882a593Smuzhiyun * | <----------------->
2973*4882a593Smuzhiyun * | SCSI ID: Value 0: Skip, 1: YES
2974*4882a593Smuzhiyun * |-> Value 0: ALL scan, Value 1: Manual
2975*4882a593Smuzhiyun * 0x15 - 0x1b : Not Used? (0)
2976*4882a593Smuzhiyun * 0x1c : Constant? (0x01) (clock div?)
2977*4882a593Smuzhiyun * 0x1d - 0x7c : Not Used (0xff)
2978*4882a593Smuzhiyun * 0x7d : Not Used? (0xff)
2979*4882a593Smuzhiyun * 0x7e : Constant (0x55), Validity signature
2980*4882a593Smuzhiyun * 0x7f : Constant (0xaa), Validity signature
2981*4882a593Smuzhiyun */
nsp32_getprom_at24(nsp32_hw_data * data)2982*4882a593Smuzhiyun static int nsp32_getprom_at24(nsp32_hw_data *data)
2983*4882a593Smuzhiyun {
2984*4882a593Smuzhiyun int ret, i;
2985*4882a593Smuzhiyun int auto_sync;
2986*4882a593Smuzhiyun nsp32_target *target;
2987*4882a593Smuzhiyun int entry;
2988*4882a593Smuzhiyun
2989*4882a593Smuzhiyun /*
2990*4882a593Smuzhiyun * Reset time which is designated by EEPROM.
2991*4882a593Smuzhiyun *
2992*4882a593Smuzhiyun * TODO: Not used yet.
2993*4882a593Smuzhiyun */
2994*4882a593Smuzhiyun data->resettime = nsp32_prom_read(data, 0x12);
2995*4882a593Smuzhiyun
2996*4882a593Smuzhiyun /*
2997*4882a593Smuzhiyun * HBA Synchronous Transfer Period
2998*4882a593Smuzhiyun *
2999*4882a593Smuzhiyun * Note: auto_sync = 0: auto, 1: manual. Ninja SCSI HBA spec says
3000*4882a593Smuzhiyun * that if auto_sync is 0 (auto), and connected SCSI devices are
3001*4882a593Smuzhiyun * same or lower than 3, then transfer speed is set as ULTRA-20M.
3002*4882a593Smuzhiyun * On the contrary if connected SCSI devices are same or higher
3003*4882a593Smuzhiyun * than 4, then transfer speed is set as FAST-10M.
3004*4882a593Smuzhiyun *
3005*4882a593Smuzhiyun * I break this rule. The number of connected SCSI devices are
3006*4882a593Smuzhiyun * only ignored. If auto_sync is 0 (auto), then transfer speed is
3007*4882a593Smuzhiyun * forced as ULTRA-20M.
3008*4882a593Smuzhiyun */
3009*4882a593Smuzhiyun ret = nsp32_prom_read(data, 0x07);
3010*4882a593Smuzhiyun switch (ret) {
3011*4882a593Smuzhiyun case 0:
3012*4882a593Smuzhiyun auto_sync = TRUE;
3013*4882a593Smuzhiyun break;
3014*4882a593Smuzhiyun case 1:
3015*4882a593Smuzhiyun auto_sync = FALSE;
3016*4882a593Smuzhiyun break;
3017*4882a593Smuzhiyun default:
3018*4882a593Smuzhiyun nsp32_msg(KERN_WARNING,
3019*4882a593Smuzhiyun "Unsupported Auto Sync mode. Fall back to manual mode.");
3020*4882a593Smuzhiyun auto_sync = TRUE;
3021*4882a593Smuzhiyun }
3022*4882a593Smuzhiyun
3023*4882a593Smuzhiyun if (trans_mode == ULTRA20M_MODE) {
3024*4882a593Smuzhiyun auto_sync = TRUE;
3025*4882a593Smuzhiyun }
3026*4882a593Smuzhiyun
3027*4882a593Smuzhiyun /*
3028*4882a593Smuzhiyun * each device Synchronous Transfer Period
3029*4882a593Smuzhiyun */
3030*4882a593Smuzhiyun for (i = 0; i < NSP32_HOST_SCSIID; i++) {
3031*4882a593Smuzhiyun target = &data->target[i];
3032*4882a593Smuzhiyun if (auto_sync == TRUE) {
3033*4882a593Smuzhiyun target->limit_entry = 0; /* set as ULTRA20M */
3034*4882a593Smuzhiyun } else {
3035*4882a593Smuzhiyun ret = nsp32_prom_read(data, i);
3036*4882a593Smuzhiyun entry = nsp32_search_period_entry(data, target, ret);
3037*4882a593Smuzhiyun if (entry < 0) {
3038*4882a593Smuzhiyun /* search failed... set maximum speed */
3039*4882a593Smuzhiyun entry = 0;
3040*4882a593Smuzhiyun }
3041*4882a593Smuzhiyun target->limit_entry = entry;
3042*4882a593Smuzhiyun }
3043*4882a593Smuzhiyun }
3044*4882a593Smuzhiyun
3045*4882a593Smuzhiyun return TRUE;
3046*4882a593Smuzhiyun }
3047*4882a593Smuzhiyun
3048*4882a593Smuzhiyun
3049*4882a593Smuzhiyun /*
3050*4882a593Smuzhiyun * C16 110 (I-O Data: SC-NBD) data map:
3051*4882a593Smuzhiyun *
3052*4882a593Smuzhiyun * ROMADDR
3053*4882a593Smuzhiyun * 0x00 - 0x06 : Device Synchronous Transfer Period (SCSI ID 0 - 6)
3054*4882a593Smuzhiyun * Value 0x0: 20MB/S, 0x1: 10MB/S, 0x2: 5MB/S, 0x3: ASYNC
3055*4882a593Smuzhiyun * 0x07 : 0 (HBA Synchronous Transfer Period: Auto Sync)
3056*4882a593Smuzhiyun * 0x08 - 0x0f : Not Used? (0x0)
3057*4882a593Smuzhiyun * 0x10 : Transfer Mode
3058*4882a593Smuzhiyun * Value 0: PIO, 1: Busmater
3059*4882a593Smuzhiyun * 0x11 : Bus Reset Delay Time (0x00-0x20)
3060*4882a593Smuzhiyun * 0x12 : Bus Termination
3061*4882a593Smuzhiyun * Value 0: Disable, 1: Enable
3062*4882a593Smuzhiyun * 0x13 - 0x19 : Disconnection
3063*4882a593Smuzhiyun * Value 0: Disable, 1: Enable
3064*4882a593Smuzhiyun * 0x1a - 0x7c : Not Used? (0)
3065*4882a593Smuzhiyun * 0x7d : Not Used? (0xf8)
3066*4882a593Smuzhiyun * 0x7e : Constant (0x55), Validity signature
3067*4882a593Smuzhiyun * 0x7f : Constant (0xaa), Validity signature
3068*4882a593Smuzhiyun */
nsp32_getprom_c16(nsp32_hw_data * data)3069*4882a593Smuzhiyun static int nsp32_getprom_c16(nsp32_hw_data *data)
3070*4882a593Smuzhiyun {
3071*4882a593Smuzhiyun int ret, i;
3072*4882a593Smuzhiyun nsp32_target *target;
3073*4882a593Smuzhiyun int entry, val;
3074*4882a593Smuzhiyun
3075*4882a593Smuzhiyun /*
3076*4882a593Smuzhiyun * Reset time which is designated by EEPROM.
3077*4882a593Smuzhiyun *
3078*4882a593Smuzhiyun * TODO: Not used yet.
3079*4882a593Smuzhiyun */
3080*4882a593Smuzhiyun data->resettime = nsp32_prom_read(data, 0x11);
3081*4882a593Smuzhiyun
3082*4882a593Smuzhiyun /*
3083*4882a593Smuzhiyun * each device Synchronous Transfer Period
3084*4882a593Smuzhiyun */
3085*4882a593Smuzhiyun for (i = 0; i < NSP32_HOST_SCSIID; i++) {
3086*4882a593Smuzhiyun target = &data->target[i];
3087*4882a593Smuzhiyun ret = nsp32_prom_read(data, i);
3088*4882a593Smuzhiyun switch (ret) {
3089*4882a593Smuzhiyun case 0: /* 20MB/s */
3090*4882a593Smuzhiyun val = 0x0c;
3091*4882a593Smuzhiyun break;
3092*4882a593Smuzhiyun case 1: /* 10MB/s */
3093*4882a593Smuzhiyun val = 0x19;
3094*4882a593Smuzhiyun break;
3095*4882a593Smuzhiyun case 2: /* 5MB/s */
3096*4882a593Smuzhiyun val = 0x32;
3097*4882a593Smuzhiyun break;
3098*4882a593Smuzhiyun case 3: /* ASYNC */
3099*4882a593Smuzhiyun val = 0x00;
3100*4882a593Smuzhiyun break;
3101*4882a593Smuzhiyun default: /* default 20MB/s */
3102*4882a593Smuzhiyun val = 0x0c;
3103*4882a593Smuzhiyun break;
3104*4882a593Smuzhiyun }
3105*4882a593Smuzhiyun entry = nsp32_search_period_entry(data, target, val);
3106*4882a593Smuzhiyun if (entry < 0 || trans_mode == ULTRA20M_MODE) {
3107*4882a593Smuzhiyun /* search failed... set maximum speed */
3108*4882a593Smuzhiyun entry = 0;
3109*4882a593Smuzhiyun }
3110*4882a593Smuzhiyun target->limit_entry = entry;
3111*4882a593Smuzhiyun }
3112*4882a593Smuzhiyun
3113*4882a593Smuzhiyun return TRUE;
3114*4882a593Smuzhiyun }
3115*4882a593Smuzhiyun
3116*4882a593Smuzhiyun
3117*4882a593Smuzhiyun /*
3118*4882a593Smuzhiyun * Atmel AT24C01A (drived in 5V) serial EEPROM routines
3119*4882a593Smuzhiyun */
nsp32_prom_read(nsp32_hw_data * data,int romaddr)3120*4882a593Smuzhiyun static int nsp32_prom_read(nsp32_hw_data *data, int romaddr)
3121*4882a593Smuzhiyun {
3122*4882a593Smuzhiyun int i, val;
3123*4882a593Smuzhiyun
3124*4882a593Smuzhiyun /* start condition */
3125*4882a593Smuzhiyun nsp32_prom_start(data);
3126*4882a593Smuzhiyun
3127*4882a593Smuzhiyun /* device address */
3128*4882a593Smuzhiyun nsp32_prom_write_bit(data, 1); /* 1 */
3129*4882a593Smuzhiyun nsp32_prom_write_bit(data, 0); /* 0 */
3130*4882a593Smuzhiyun nsp32_prom_write_bit(data, 1); /* 1 */
3131*4882a593Smuzhiyun nsp32_prom_write_bit(data, 0); /* 0 */
3132*4882a593Smuzhiyun nsp32_prom_write_bit(data, 0); /* A2: 0 (GND) */
3133*4882a593Smuzhiyun nsp32_prom_write_bit(data, 0); /* A1: 0 (GND) */
3134*4882a593Smuzhiyun nsp32_prom_write_bit(data, 0); /* A0: 0 (GND) */
3135*4882a593Smuzhiyun
3136*4882a593Smuzhiyun /* R/W: W for dummy write */
3137*4882a593Smuzhiyun nsp32_prom_write_bit(data, 0);
3138*4882a593Smuzhiyun
3139*4882a593Smuzhiyun /* ack */
3140*4882a593Smuzhiyun nsp32_prom_write_bit(data, 0);
3141*4882a593Smuzhiyun
3142*4882a593Smuzhiyun /* word address */
3143*4882a593Smuzhiyun for (i = 7; i >= 0; i--) {
3144*4882a593Smuzhiyun nsp32_prom_write_bit(data, ((romaddr >> i) & 1));
3145*4882a593Smuzhiyun }
3146*4882a593Smuzhiyun
3147*4882a593Smuzhiyun /* ack */
3148*4882a593Smuzhiyun nsp32_prom_write_bit(data, 0);
3149*4882a593Smuzhiyun
3150*4882a593Smuzhiyun /* start condition */
3151*4882a593Smuzhiyun nsp32_prom_start(data);
3152*4882a593Smuzhiyun
3153*4882a593Smuzhiyun /* device address */
3154*4882a593Smuzhiyun nsp32_prom_write_bit(data, 1); /* 1 */
3155*4882a593Smuzhiyun nsp32_prom_write_bit(data, 0); /* 0 */
3156*4882a593Smuzhiyun nsp32_prom_write_bit(data, 1); /* 1 */
3157*4882a593Smuzhiyun nsp32_prom_write_bit(data, 0); /* 0 */
3158*4882a593Smuzhiyun nsp32_prom_write_bit(data, 0); /* A2: 0 (GND) */
3159*4882a593Smuzhiyun nsp32_prom_write_bit(data, 0); /* A1: 0 (GND) */
3160*4882a593Smuzhiyun nsp32_prom_write_bit(data, 0); /* A0: 0 (GND) */
3161*4882a593Smuzhiyun
3162*4882a593Smuzhiyun /* R/W: R */
3163*4882a593Smuzhiyun nsp32_prom_write_bit(data, 1);
3164*4882a593Smuzhiyun
3165*4882a593Smuzhiyun /* ack */
3166*4882a593Smuzhiyun nsp32_prom_write_bit(data, 0);
3167*4882a593Smuzhiyun
3168*4882a593Smuzhiyun /* data... */
3169*4882a593Smuzhiyun val = 0;
3170*4882a593Smuzhiyun for (i = 7; i >= 0; i--) {
3171*4882a593Smuzhiyun val += (nsp32_prom_read_bit(data) << i);
3172*4882a593Smuzhiyun }
3173*4882a593Smuzhiyun
3174*4882a593Smuzhiyun /* no ack */
3175*4882a593Smuzhiyun nsp32_prom_write_bit(data, 1);
3176*4882a593Smuzhiyun
3177*4882a593Smuzhiyun /* stop condition */
3178*4882a593Smuzhiyun nsp32_prom_stop(data);
3179*4882a593Smuzhiyun
3180*4882a593Smuzhiyun return val;
3181*4882a593Smuzhiyun }
3182*4882a593Smuzhiyun
nsp32_prom_set(nsp32_hw_data * data,int bit,int val)3183*4882a593Smuzhiyun static void nsp32_prom_set(nsp32_hw_data *data, int bit, int val)
3184*4882a593Smuzhiyun {
3185*4882a593Smuzhiyun int base = data->BaseAddress;
3186*4882a593Smuzhiyun int tmp;
3187*4882a593Smuzhiyun
3188*4882a593Smuzhiyun tmp = nsp32_index_read1(base, SERIAL_ROM_CTL);
3189*4882a593Smuzhiyun
3190*4882a593Smuzhiyun if (val == 0) {
3191*4882a593Smuzhiyun tmp &= ~bit;
3192*4882a593Smuzhiyun } else {
3193*4882a593Smuzhiyun tmp |= bit;
3194*4882a593Smuzhiyun }
3195*4882a593Smuzhiyun
3196*4882a593Smuzhiyun nsp32_index_write1(base, SERIAL_ROM_CTL, tmp);
3197*4882a593Smuzhiyun
3198*4882a593Smuzhiyun udelay(10);
3199*4882a593Smuzhiyun }
3200*4882a593Smuzhiyun
nsp32_prom_get(nsp32_hw_data * data,int bit)3201*4882a593Smuzhiyun static int nsp32_prom_get(nsp32_hw_data *data, int bit)
3202*4882a593Smuzhiyun {
3203*4882a593Smuzhiyun int base = data->BaseAddress;
3204*4882a593Smuzhiyun int tmp, ret;
3205*4882a593Smuzhiyun
3206*4882a593Smuzhiyun if (bit != SDA) {
3207*4882a593Smuzhiyun nsp32_msg(KERN_ERR, "return value is not appropriate");
3208*4882a593Smuzhiyun return 0;
3209*4882a593Smuzhiyun }
3210*4882a593Smuzhiyun
3211*4882a593Smuzhiyun
3212*4882a593Smuzhiyun tmp = nsp32_index_read1(base, SERIAL_ROM_CTL) & bit;
3213*4882a593Smuzhiyun
3214*4882a593Smuzhiyun if (tmp == 0) {
3215*4882a593Smuzhiyun ret = 0;
3216*4882a593Smuzhiyun } else {
3217*4882a593Smuzhiyun ret = 1;
3218*4882a593Smuzhiyun }
3219*4882a593Smuzhiyun
3220*4882a593Smuzhiyun udelay(10);
3221*4882a593Smuzhiyun
3222*4882a593Smuzhiyun return ret;
3223*4882a593Smuzhiyun }
3224*4882a593Smuzhiyun
nsp32_prom_start(nsp32_hw_data * data)3225*4882a593Smuzhiyun static void nsp32_prom_start (nsp32_hw_data *data)
3226*4882a593Smuzhiyun {
3227*4882a593Smuzhiyun /* start condition */
3228*4882a593Smuzhiyun nsp32_prom_set(data, SCL, 1);
3229*4882a593Smuzhiyun nsp32_prom_set(data, SDA, 1);
3230*4882a593Smuzhiyun nsp32_prom_set(data, ENA, 1); /* output mode */
3231*4882a593Smuzhiyun nsp32_prom_set(data, SDA, 0); /* keeping SCL=1 and transiting
3232*4882a593Smuzhiyun * SDA 1->0 is start condition */
3233*4882a593Smuzhiyun nsp32_prom_set(data, SCL, 0);
3234*4882a593Smuzhiyun }
3235*4882a593Smuzhiyun
nsp32_prom_stop(nsp32_hw_data * data)3236*4882a593Smuzhiyun static void nsp32_prom_stop (nsp32_hw_data *data)
3237*4882a593Smuzhiyun {
3238*4882a593Smuzhiyun /* stop condition */
3239*4882a593Smuzhiyun nsp32_prom_set(data, SCL, 1);
3240*4882a593Smuzhiyun nsp32_prom_set(data, SDA, 0);
3241*4882a593Smuzhiyun nsp32_prom_set(data, ENA, 1); /* output mode */
3242*4882a593Smuzhiyun nsp32_prom_set(data, SDA, 1);
3243*4882a593Smuzhiyun nsp32_prom_set(data, SCL, 0);
3244*4882a593Smuzhiyun }
3245*4882a593Smuzhiyun
nsp32_prom_write_bit(nsp32_hw_data * data,int val)3246*4882a593Smuzhiyun static void nsp32_prom_write_bit(nsp32_hw_data *data, int val)
3247*4882a593Smuzhiyun {
3248*4882a593Smuzhiyun /* write */
3249*4882a593Smuzhiyun nsp32_prom_set(data, SDA, val);
3250*4882a593Smuzhiyun nsp32_prom_set(data, SCL, 1 );
3251*4882a593Smuzhiyun nsp32_prom_set(data, SCL, 0 );
3252*4882a593Smuzhiyun }
3253*4882a593Smuzhiyun
nsp32_prom_read_bit(nsp32_hw_data * data)3254*4882a593Smuzhiyun static int nsp32_prom_read_bit(nsp32_hw_data *data)
3255*4882a593Smuzhiyun {
3256*4882a593Smuzhiyun int val;
3257*4882a593Smuzhiyun
3258*4882a593Smuzhiyun /* read */
3259*4882a593Smuzhiyun nsp32_prom_set(data, ENA, 0); /* input mode */
3260*4882a593Smuzhiyun nsp32_prom_set(data, SCL, 1);
3261*4882a593Smuzhiyun
3262*4882a593Smuzhiyun val = nsp32_prom_get(data, SDA);
3263*4882a593Smuzhiyun
3264*4882a593Smuzhiyun nsp32_prom_set(data, SCL, 0);
3265*4882a593Smuzhiyun nsp32_prom_set(data, ENA, 1); /* output mode */
3266*4882a593Smuzhiyun
3267*4882a593Smuzhiyun return val;
3268*4882a593Smuzhiyun }
3269*4882a593Smuzhiyun
3270*4882a593Smuzhiyun
3271*4882a593Smuzhiyun /**************************************************************************
3272*4882a593Smuzhiyun * Power Management
3273*4882a593Smuzhiyun */
3274*4882a593Smuzhiyun #ifdef CONFIG_PM
3275*4882a593Smuzhiyun
3276*4882a593Smuzhiyun /* Device suspended */
nsp32_suspend(struct pci_dev * pdev,pm_message_t state)3277*4882a593Smuzhiyun static int nsp32_suspend(struct pci_dev *pdev, pm_message_t state)
3278*4882a593Smuzhiyun {
3279*4882a593Smuzhiyun struct Scsi_Host *host = pci_get_drvdata(pdev);
3280*4882a593Smuzhiyun
3281*4882a593Smuzhiyun nsp32_msg(KERN_INFO, "pci-suspend: pdev=0x%p, state=%ld, slot=%s, host=0x%p", pdev, state, pci_name(pdev), host);
3282*4882a593Smuzhiyun
3283*4882a593Smuzhiyun pci_save_state (pdev);
3284*4882a593Smuzhiyun pci_disable_device (pdev);
3285*4882a593Smuzhiyun pci_set_power_state(pdev, pci_choose_state(pdev, state));
3286*4882a593Smuzhiyun
3287*4882a593Smuzhiyun return 0;
3288*4882a593Smuzhiyun }
3289*4882a593Smuzhiyun
3290*4882a593Smuzhiyun /* Device woken up */
nsp32_resume(struct pci_dev * pdev)3291*4882a593Smuzhiyun static int nsp32_resume(struct pci_dev *pdev)
3292*4882a593Smuzhiyun {
3293*4882a593Smuzhiyun struct Scsi_Host *host = pci_get_drvdata(pdev);
3294*4882a593Smuzhiyun nsp32_hw_data *data = (nsp32_hw_data *)host->hostdata;
3295*4882a593Smuzhiyun unsigned short reg;
3296*4882a593Smuzhiyun
3297*4882a593Smuzhiyun nsp32_msg(KERN_INFO, "pci-resume: pdev=0x%p, slot=%s, host=0x%p", pdev, pci_name(pdev), host);
3298*4882a593Smuzhiyun
3299*4882a593Smuzhiyun pci_set_power_state(pdev, PCI_D0);
3300*4882a593Smuzhiyun pci_enable_wake (pdev, PCI_D0, 0);
3301*4882a593Smuzhiyun pci_restore_state (pdev);
3302*4882a593Smuzhiyun
3303*4882a593Smuzhiyun reg = nsp32_read2(data->BaseAddress, INDEX_REG);
3304*4882a593Smuzhiyun
3305*4882a593Smuzhiyun nsp32_msg(KERN_INFO, "io=0x%x reg=0x%x", data->BaseAddress, reg);
3306*4882a593Smuzhiyun
3307*4882a593Smuzhiyun if (reg == 0xffff) {
3308*4882a593Smuzhiyun nsp32_msg(KERN_INFO, "missing device. abort resume.");
3309*4882a593Smuzhiyun return 0;
3310*4882a593Smuzhiyun }
3311*4882a593Smuzhiyun
3312*4882a593Smuzhiyun nsp32hw_init (data);
3313*4882a593Smuzhiyun nsp32_do_bus_reset(data);
3314*4882a593Smuzhiyun
3315*4882a593Smuzhiyun nsp32_msg(KERN_INFO, "resume success");
3316*4882a593Smuzhiyun
3317*4882a593Smuzhiyun return 0;
3318*4882a593Smuzhiyun }
3319*4882a593Smuzhiyun
3320*4882a593Smuzhiyun #endif
3321*4882a593Smuzhiyun
3322*4882a593Smuzhiyun /************************************************************************
3323*4882a593Smuzhiyun * PCI/Cardbus probe/remove routine
3324*4882a593Smuzhiyun */
nsp32_probe(struct pci_dev * pdev,const struct pci_device_id * id)3325*4882a593Smuzhiyun static int nsp32_probe(struct pci_dev *pdev, const struct pci_device_id *id)
3326*4882a593Smuzhiyun {
3327*4882a593Smuzhiyun int ret;
3328*4882a593Smuzhiyun nsp32_hw_data *data = &nsp32_data_base;
3329*4882a593Smuzhiyun
3330*4882a593Smuzhiyun nsp32_dbg(NSP32_DEBUG_REGISTER, "enter");
3331*4882a593Smuzhiyun
3332*4882a593Smuzhiyun ret = pci_enable_device(pdev);
3333*4882a593Smuzhiyun if (ret) {
3334*4882a593Smuzhiyun nsp32_msg(KERN_ERR, "failed to enable pci device");
3335*4882a593Smuzhiyun return ret;
3336*4882a593Smuzhiyun }
3337*4882a593Smuzhiyun
3338*4882a593Smuzhiyun data->Pci = pdev;
3339*4882a593Smuzhiyun data->pci_devid = id;
3340*4882a593Smuzhiyun data->IrqNumber = pdev->irq;
3341*4882a593Smuzhiyun data->BaseAddress = pci_resource_start(pdev, 0);
3342*4882a593Smuzhiyun data->NumAddress = pci_resource_len (pdev, 0);
3343*4882a593Smuzhiyun data->MmioAddress = pci_ioremap_bar(pdev, 1);
3344*4882a593Smuzhiyun data->MmioLength = pci_resource_len (pdev, 1);
3345*4882a593Smuzhiyun
3346*4882a593Smuzhiyun pci_set_master(pdev);
3347*4882a593Smuzhiyun
3348*4882a593Smuzhiyun ret = nsp32_detect(pdev);
3349*4882a593Smuzhiyun
3350*4882a593Smuzhiyun nsp32_msg(KERN_INFO, "irq: %i mmio: %p+0x%lx slot: %s model: %s",
3351*4882a593Smuzhiyun pdev->irq,
3352*4882a593Smuzhiyun data->MmioAddress, data->MmioLength,
3353*4882a593Smuzhiyun pci_name(pdev),
3354*4882a593Smuzhiyun nsp32_model[id->driver_data]);
3355*4882a593Smuzhiyun
3356*4882a593Smuzhiyun nsp32_dbg(NSP32_DEBUG_REGISTER, "exit %d", ret);
3357*4882a593Smuzhiyun
3358*4882a593Smuzhiyun return ret;
3359*4882a593Smuzhiyun }
3360*4882a593Smuzhiyun
nsp32_remove(struct pci_dev * pdev)3361*4882a593Smuzhiyun static void nsp32_remove(struct pci_dev *pdev)
3362*4882a593Smuzhiyun {
3363*4882a593Smuzhiyun struct Scsi_Host *host = pci_get_drvdata(pdev);
3364*4882a593Smuzhiyun
3365*4882a593Smuzhiyun nsp32_dbg(NSP32_DEBUG_REGISTER, "enter");
3366*4882a593Smuzhiyun
3367*4882a593Smuzhiyun scsi_remove_host(host);
3368*4882a593Smuzhiyun
3369*4882a593Smuzhiyun nsp32_release(host);
3370*4882a593Smuzhiyun
3371*4882a593Smuzhiyun scsi_host_put(host);
3372*4882a593Smuzhiyun }
3373*4882a593Smuzhiyun
3374*4882a593Smuzhiyun static struct pci_driver nsp32_driver = {
3375*4882a593Smuzhiyun .name = "nsp32",
3376*4882a593Smuzhiyun .id_table = nsp32_pci_table,
3377*4882a593Smuzhiyun .probe = nsp32_probe,
3378*4882a593Smuzhiyun .remove = nsp32_remove,
3379*4882a593Smuzhiyun #ifdef CONFIG_PM
3380*4882a593Smuzhiyun .suspend = nsp32_suspend,
3381*4882a593Smuzhiyun .resume = nsp32_resume,
3382*4882a593Smuzhiyun #endif
3383*4882a593Smuzhiyun };
3384*4882a593Smuzhiyun
3385*4882a593Smuzhiyun /*********************************************************************
3386*4882a593Smuzhiyun * Moule entry point
3387*4882a593Smuzhiyun */
init_nsp32(void)3388*4882a593Smuzhiyun static int __init init_nsp32(void) {
3389*4882a593Smuzhiyun nsp32_msg(KERN_INFO, "loading...");
3390*4882a593Smuzhiyun return pci_register_driver(&nsp32_driver);
3391*4882a593Smuzhiyun }
3392*4882a593Smuzhiyun
exit_nsp32(void)3393*4882a593Smuzhiyun static void __exit exit_nsp32(void) {
3394*4882a593Smuzhiyun nsp32_msg(KERN_INFO, "unloading...");
3395*4882a593Smuzhiyun pci_unregister_driver(&nsp32_driver);
3396*4882a593Smuzhiyun }
3397*4882a593Smuzhiyun
3398*4882a593Smuzhiyun module_init(init_nsp32);
3399*4882a593Smuzhiyun module_exit(exit_nsp32);
3400*4882a593Smuzhiyun
3401*4882a593Smuzhiyun /* end */
3402