1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0-or-later
2*4882a593Smuzhiyun /******************************************************************************
3*4882a593Smuzhiyun ** Device driver for the PCI-SCSI NCR538XX controller family.
4*4882a593Smuzhiyun **
5*4882a593Smuzhiyun ** Copyright (C) 1994 Wolfgang Stanglmeier
6*4882a593Smuzhiyun **
7*4882a593Smuzhiyun **
8*4882a593Smuzhiyun **-----------------------------------------------------------------------------
9*4882a593Smuzhiyun **
10*4882a593Smuzhiyun ** This driver has been ported to Linux from the FreeBSD NCR53C8XX driver
11*4882a593Smuzhiyun ** and is currently maintained by
12*4882a593Smuzhiyun **
13*4882a593Smuzhiyun ** Gerard Roudier <groudier@free.fr>
14*4882a593Smuzhiyun **
15*4882a593Smuzhiyun ** Being given that this driver originates from the FreeBSD version, and
16*4882a593Smuzhiyun ** in order to keep synergy on both, any suggested enhancements and corrections
17*4882a593Smuzhiyun ** received on Linux are automatically a potential candidate for the FreeBSD
18*4882a593Smuzhiyun ** version.
19*4882a593Smuzhiyun **
20*4882a593Smuzhiyun ** The original driver has been written for 386bsd and FreeBSD by
21*4882a593Smuzhiyun ** Wolfgang Stanglmeier <wolf@cologne.de>
22*4882a593Smuzhiyun ** Stefan Esser <se@mi.Uni-Koeln.de>
23*4882a593Smuzhiyun **
24*4882a593Smuzhiyun ** And has been ported to NetBSD by
25*4882a593Smuzhiyun ** Charles M. Hannum <mycroft@gnu.ai.mit.edu>
26*4882a593Smuzhiyun **
27*4882a593Smuzhiyun **-----------------------------------------------------------------------------
28*4882a593Smuzhiyun **
29*4882a593Smuzhiyun ** Brief history
30*4882a593Smuzhiyun **
31*4882a593Smuzhiyun ** December 10 1995 by Gerard Roudier:
32*4882a593Smuzhiyun ** Initial port to Linux.
33*4882a593Smuzhiyun **
34*4882a593Smuzhiyun ** June 23 1996 by Gerard Roudier:
35*4882a593Smuzhiyun ** Support for 64 bits architectures (Alpha).
36*4882a593Smuzhiyun **
37*4882a593Smuzhiyun ** November 30 1996 by Gerard Roudier:
38*4882a593Smuzhiyun ** Support for Fast-20 scsi.
39*4882a593Smuzhiyun ** Support for large DMA fifo and 128 dwords bursting.
40*4882a593Smuzhiyun **
41*4882a593Smuzhiyun ** February 27 1997 by Gerard Roudier:
42*4882a593Smuzhiyun ** Support for Fast-40 scsi.
43*4882a593Smuzhiyun ** Support for on-Board RAM.
44*4882a593Smuzhiyun **
45*4882a593Smuzhiyun ** May 3 1997 by Gerard Roudier:
46*4882a593Smuzhiyun ** Full support for scsi scripts instructions pre-fetching.
47*4882a593Smuzhiyun **
48*4882a593Smuzhiyun ** May 19 1997 by Richard Waltham <dormouse@farsrobt.demon.co.uk>:
49*4882a593Smuzhiyun ** Support for NvRAM detection and reading.
50*4882a593Smuzhiyun **
51*4882a593Smuzhiyun ** August 18 1997 by Cort <cort@cs.nmt.edu>:
52*4882a593Smuzhiyun ** Support for Power/PC (Big Endian).
53*4882a593Smuzhiyun **
54*4882a593Smuzhiyun ** June 20 1998 by Gerard Roudier
55*4882a593Smuzhiyun ** Support for up to 64 tags per lun.
56*4882a593Smuzhiyun ** O(1) everywhere (C and SCRIPTS) for normal cases.
57*4882a593Smuzhiyun ** Low PCI traffic for command handling when on-chip RAM is present.
58*4882a593Smuzhiyun ** Aggressive SCSI SCRIPTS optimizations.
59*4882a593Smuzhiyun **
60*4882a593Smuzhiyun ** 2005 by Matthew Wilcox and James Bottomley
61*4882a593Smuzhiyun ** PCI-ectomy. This driver now supports only the 720 chip (see the
62*4882a593Smuzhiyun ** NCR_Q720 and zalon drivers for the bus probe logic).
63*4882a593Smuzhiyun **
64*4882a593Smuzhiyun *******************************************************************************
65*4882a593Smuzhiyun */
66*4882a593Smuzhiyun
67*4882a593Smuzhiyun /*
68*4882a593Smuzhiyun ** Supported SCSI-II features:
69*4882a593Smuzhiyun ** Synchronous negotiation
70*4882a593Smuzhiyun ** Wide negotiation (depends on the NCR Chip)
71*4882a593Smuzhiyun ** Enable disconnection
72*4882a593Smuzhiyun ** Tagged command queuing
73*4882a593Smuzhiyun ** Parity checking
74*4882a593Smuzhiyun ** Etc...
75*4882a593Smuzhiyun **
76*4882a593Smuzhiyun ** Supported NCR/SYMBIOS chips:
77*4882a593Smuzhiyun ** 53C720 (Wide, Fast SCSI-2, intfly problems)
78*4882a593Smuzhiyun */
79*4882a593Smuzhiyun
80*4882a593Smuzhiyun /* Name and version of the driver */
81*4882a593Smuzhiyun #define SCSI_NCR_DRIVER_NAME "ncr53c8xx-3.4.3g"
82*4882a593Smuzhiyun
83*4882a593Smuzhiyun #define SCSI_NCR_DEBUG_FLAGS (0)
84*4882a593Smuzhiyun
85*4882a593Smuzhiyun #include <linux/blkdev.h>
86*4882a593Smuzhiyun #include <linux/delay.h>
87*4882a593Smuzhiyun #include <linux/dma-mapping.h>
88*4882a593Smuzhiyun #include <linux/errno.h>
89*4882a593Smuzhiyun #include <linux/gfp.h>
90*4882a593Smuzhiyun #include <linux/init.h>
91*4882a593Smuzhiyun #include <linux/interrupt.h>
92*4882a593Smuzhiyun #include <linux/ioport.h>
93*4882a593Smuzhiyun #include <linux/mm.h>
94*4882a593Smuzhiyun #include <linux/module.h>
95*4882a593Smuzhiyun #include <linux/sched.h>
96*4882a593Smuzhiyun #include <linux/signal.h>
97*4882a593Smuzhiyun #include <linux/spinlock.h>
98*4882a593Smuzhiyun #include <linux/stat.h>
99*4882a593Smuzhiyun #include <linux/string.h>
100*4882a593Smuzhiyun #include <linux/time.h>
101*4882a593Smuzhiyun #include <linux/timer.h>
102*4882a593Smuzhiyun #include <linux/types.h>
103*4882a593Smuzhiyun
104*4882a593Smuzhiyun #include <asm/dma.h>
105*4882a593Smuzhiyun #include <asm/io.h>
106*4882a593Smuzhiyun
107*4882a593Smuzhiyun #include <scsi/scsi.h>
108*4882a593Smuzhiyun #include <scsi/scsi_cmnd.h>
109*4882a593Smuzhiyun #include <scsi/scsi_dbg.h>
110*4882a593Smuzhiyun #include <scsi/scsi_device.h>
111*4882a593Smuzhiyun #include <scsi/scsi_tcq.h>
112*4882a593Smuzhiyun #include <scsi/scsi_transport.h>
113*4882a593Smuzhiyun #include <scsi/scsi_transport_spi.h>
114*4882a593Smuzhiyun
115*4882a593Smuzhiyun #include "ncr53c8xx.h"
116*4882a593Smuzhiyun
117*4882a593Smuzhiyun #define NAME53C8XX "ncr53c8xx"
118*4882a593Smuzhiyun
119*4882a593Smuzhiyun /*==========================================================
120*4882a593Smuzhiyun **
121*4882a593Smuzhiyun ** Debugging tags
122*4882a593Smuzhiyun **
123*4882a593Smuzhiyun **==========================================================
124*4882a593Smuzhiyun */
125*4882a593Smuzhiyun
126*4882a593Smuzhiyun #define DEBUG_ALLOC (0x0001)
127*4882a593Smuzhiyun #define DEBUG_PHASE (0x0002)
128*4882a593Smuzhiyun #define DEBUG_QUEUE (0x0008)
129*4882a593Smuzhiyun #define DEBUG_RESULT (0x0010)
130*4882a593Smuzhiyun #define DEBUG_POINTER (0x0020)
131*4882a593Smuzhiyun #define DEBUG_SCRIPT (0x0040)
132*4882a593Smuzhiyun #define DEBUG_TINY (0x0080)
133*4882a593Smuzhiyun #define DEBUG_TIMING (0x0100)
134*4882a593Smuzhiyun #define DEBUG_NEGO (0x0200)
135*4882a593Smuzhiyun #define DEBUG_TAGS (0x0400)
136*4882a593Smuzhiyun #define DEBUG_SCATTER (0x0800)
137*4882a593Smuzhiyun #define DEBUG_IC (0x1000)
138*4882a593Smuzhiyun
139*4882a593Smuzhiyun /*
140*4882a593Smuzhiyun ** Enable/Disable debug messages.
141*4882a593Smuzhiyun ** Can be changed at runtime too.
142*4882a593Smuzhiyun */
143*4882a593Smuzhiyun
144*4882a593Smuzhiyun #ifdef SCSI_NCR_DEBUG_INFO_SUPPORT
145*4882a593Smuzhiyun static int ncr_debug = SCSI_NCR_DEBUG_FLAGS;
146*4882a593Smuzhiyun #define DEBUG_FLAGS ncr_debug
147*4882a593Smuzhiyun #else
148*4882a593Smuzhiyun #define DEBUG_FLAGS SCSI_NCR_DEBUG_FLAGS
149*4882a593Smuzhiyun #endif
150*4882a593Smuzhiyun
ncr_list_pop(struct list_head * head)151*4882a593Smuzhiyun static inline struct list_head *ncr_list_pop(struct list_head *head)
152*4882a593Smuzhiyun {
153*4882a593Smuzhiyun if (!list_empty(head)) {
154*4882a593Smuzhiyun struct list_head *elem = head->next;
155*4882a593Smuzhiyun
156*4882a593Smuzhiyun list_del(elem);
157*4882a593Smuzhiyun return elem;
158*4882a593Smuzhiyun }
159*4882a593Smuzhiyun
160*4882a593Smuzhiyun return NULL;
161*4882a593Smuzhiyun }
162*4882a593Smuzhiyun
163*4882a593Smuzhiyun /*==========================================================
164*4882a593Smuzhiyun **
165*4882a593Smuzhiyun ** Simple power of two buddy-like allocator.
166*4882a593Smuzhiyun **
167*4882a593Smuzhiyun ** This simple code is not intended to be fast, but to
168*4882a593Smuzhiyun ** provide power of 2 aligned memory allocations.
169*4882a593Smuzhiyun ** Since the SCRIPTS processor only supplies 8 bit
170*4882a593Smuzhiyun ** arithmetic, this allocator allows simple and fast
171*4882a593Smuzhiyun ** address calculations from the SCRIPTS code.
172*4882a593Smuzhiyun ** In addition, cache line alignment is guaranteed for
173*4882a593Smuzhiyun ** power of 2 cache line size.
174*4882a593Smuzhiyun ** Enhanced in linux-2.3.44 to provide a memory pool
175*4882a593Smuzhiyun ** per pcidev to support dynamic dma mapping. (I would
176*4882a593Smuzhiyun ** have preferred a real bus abstraction, btw).
177*4882a593Smuzhiyun **
178*4882a593Smuzhiyun **==========================================================
179*4882a593Smuzhiyun */
180*4882a593Smuzhiyun
181*4882a593Smuzhiyun #define MEMO_SHIFT 4 /* 16 bytes minimum memory chunk */
182*4882a593Smuzhiyun #if PAGE_SIZE >= 8192
183*4882a593Smuzhiyun #define MEMO_PAGE_ORDER 0 /* 1 PAGE maximum */
184*4882a593Smuzhiyun #else
185*4882a593Smuzhiyun #define MEMO_PAGE_ORDER 1 /* 2 PAGES maximum */
186*4882a593Smuzhiyun #endif
187*4882a593Smuzhiyun #define MEMO_FREE_UNUSED /* Free unused pages immediately */
188*4882a593Smuzhiyun #define MEMO_WARN 1
189*4882a593Smuzhiyun #define MEMO_GFP_FLAGS GFP_ATOMIC
190*4882a593Smuzhiyun #define MEMO_CLUSTER_SHIFT (PAGE_SHIFT+MEMO_PAGE_ORDER)
191*4882a593Smuzhiyun #define MEMO_CLUSTER_SIZE (1UL << MEMO_CLUSTER_SHIFT)
192*4882a593Smuzhiyun #define MEMO_CLUSTER_MASK (MEMO_CLUSTER_SIZE-1)
193*4882a593Smuzhiyun
194*4882a593Smuzhiyun typedef u_long m_addr_t; /* Enough bits to bit-hack addresses */
195*4882a593Smuzhiyun typedef struct device *m_bush_t; /* Something that addresses DMAable */
196*4882a593Smuzhiyun
197*4882a593Smuzhiyun typedef struct m_link { /* Link between free memory chunks */
198*4882a593Smuzhiyun struct m_link *next;
199*4882a593Smuzhiyun } m_link_s;
200*4882a593Smuzhiyun
201*4882a593Smuzhiyun typedef struct m_vtob { /* Virtual to Bus address translation */
202*4882a593Smuzhiyun struct m_vtob *next;
203*4882a593Smuzhiyun m_addr_t vaddr;
204*4882a593Smuzhiyun m_addr_t baddr;
205*4882a593Smuzhiyun } m_vtob_s;
206*4882a593Smuzhiyun #define VTOB_HASH_SHIFT 5
207*4882a593Smuzhiyun #define VTOB_HASH_SIZE (1UL << VTOB_HASH_SHIFT)
208*4882a593Smuzhiyun #define VTOB_HASH_MASK (VTOB_HASH_SIZE-1)
209*4882a593Smuzhiyun #define VTOB_HASH_CODE(m) \
210*4882a593Smuzhiyun ((((m_addr_t) (m)) >> MEMO_CLUSTER_SHIFT) & VTOB_HASH_MASK)
211*4882a593Smuzhiyun
212*4882a593Smuzhiyun typedef struct m_pool { /* Memory pool of a given kind */
213*4882a593Smuzhiyun m_bush_t bush;
214*4882a593Smuzhiyun m_addr_t (*getp)(struct m_pool *);
215*4882a593Smuzhiyun void (*freep)(struct m_pool *, m_addr_t);
216*4882a593Smuzhiyun int nump;
217*4882a593Smuzhiyun m_vtob_s *(vtob[VTOB_HASH_SIZE]);
218*4882a593Smuzhiyun struct m_pool *next;
219*4882a593Smuzhiyun struct m_link h[PAGE_SHIFT-MEMO_SHIFT+MEMO_PAGE_ORDER+1];
220*4882a593Smuzhiyun } m_pool_s;
221*4882a593Smuzhiyun
___m_alloc(m_pool_s * mp,int size)222*4882a593Smuzhiyun static void *___m_alloc(m_pool_s *mp, int size)
223*4882a593Smuzhiyun {
224*4882a593Smuzhiyun int i = 0;
225*4882a593Smuzhiyun int s = (1 << MEMO_SHIFT);
226*4882a593Smuzhiyun int j;
227*4882a593Smuzhiyun m_addr_t a;
228*4882a593Smuzhiyun m_link_s *h = mp->h;
229*4882a593Smuzhiyun
230*4882a593Smuzhiyun if (size > (PAGE_SIZE << MEMO_PAGE_ORDER))
231*4882a593Smuzhiyun return NULL;
232*4882a593Smuzhiyun
233*4882a593Smuzhiyun while (size > s) {
234*4882a593Smuzhiyun s <<= 1;
235*4882a593Smuzhiyun ++i;
236*4882a593Smuzhiyun }
237*4882a593Smuzhiyun
238*4882a593Smuzhiyun j = i;
239*4882a593Smuzhiyun while (!h[j].next) {
240*4882a593Smuzhiyun if (s == (PAGE_SIZE << MEMO_PAGE_ORDER)) {
241*4882a593Smuzhiyun h[j].next = (m_link_s *)mp->getp(mp);
242*4882a593Smuzhiyun if (h[j].next)
243*4882a593Smuzhiyun h[j].next->next = NULL;
244*4882a593Smuzhiyun break;
245*4882a593Smuzhiyun }
246*4882a593Smuzhiyun ++j;
247*4882a593Smuzhiyun s <<= 1;
248*4882a593Smuzhiyun }
249*4882a593Smuzhiyun a = (m_addr_t) h[j].next;
250*4882a593Smuzhiyun if (a) {
251*4882a593Smuzhiyun h[j].next = h[j].next->next;
252*4882a593Smuzhiyun while (j > i) {
253*4882a593Smuzhiyun j -= 1;
254*4882a593Smuzhiyun s >>= 1;
255*4882a593Smuzhiyun h[j].next = (m_link_s *) (a+s);
256*4882a593Smuzhiyun h[j].next->next = NULL;
257*4882a593Smuzhiyun }
258*4882a593Smuzhiyun }
259*4882a593Smuzhiyun #ifdef DEBUG
260*4882a593Smuzhiyun printk("___m_alloc(%d) = %p\n", size, (void *) a);
261*4882a593Smuzhiyun #endif
262*4882a593Smuzhiyun return (void *) a;
263*4882a593Smuzhiyun }
264*4882a593Smuzhiyun
___m_free(m_pool_s * mp,void * ptr,int size)265*4882a593Smuzhiyun static void ___m_free(m_pool_s *mp, void *ptr, int size)
266*4882a593Smuzhiyun {
267*4882a593Smuzhiyun int i = 0;
268*4882a593Smuzhiyun int s = (1 << MEMO_SHIFT);
269*4882a593Smuzhiyun m_link_s *q;
270*4882a593Smuzhiyun m_addr_t a, b;
271*4882a593Smuzhiyun m_link_s *h = mp->h;
272*4882a593Smuzhiyun
273*4882a593Smuzhiyun #ifdef DEBUG
274*4882a593Smuzhiyun printk("___m_free(%p, %d)\n", ptr, size);
275*4882a593Smuzhiyun #endif
276*4882a593Smuzhiyun
277*4882a593Smuzhiyun if (size > (PAGE_SIZE << MEMO_PAGE_ORDER))
278*4882a593Smuzhiyun return;
279*4882a593Smuzhiyun
280*4882a593Smuzhiyun while (size > s) {
281*4882a593Smuzhiyun s <<= 1;
282*4882a593Smuzhiyun ++i;
283*4882a593Smuzhiyun }
284*4882a593Smuzhiyun
285*4882a593Smuzhiyun a = (m_addr_t) ptr;
286*4882a593Smuzhiyun
287*4882a593Smuzhiyun while (1) {
288*4882a593Smuzhiyun #ifdef MEMO_FREE_UNUSED
289*4882a593Smuzhiyun if (s == (PAGE_SIZE << MEMO_PAGE_ORDER)) {
290*4882a593Smuzhiyun mp->freep(mp, a);
291*4882a593Smuzhiyun break;
292*4882a593Smuzhiyun }
293*4882a593Smuzhiyun #endif
294*4882a593Smuzhiyun b = a ^ s;
295*4882a593Smuzhiyun q = &h[i];
296*4882a593Smuzhiyun while (q->next && q->next != (m_link_s *) b) {
297*4882a593Smuzhiyun q = q->next;
298*4882a593Smuzhiyun }
299*4882a593Smuzhiyun if (!q->next) {
300*4882a593Smuzhiyun ((m_link_s *) a)->next = h[i].next;
301*4882a593Smuzhiyun h[i].next = (m_link_s *) a;
302*4882a593Smuzhiyun break;
303*4882a593Smuzhiyun }
304*4882a593Smuzhiyun q->next = q->next->next;
305*4882a593Smuzhiyun a = a & b;
306*4882a593Smuzhiyun s <<= 1;
307*4882a593Smuzhiyun ++i;
308*4882a593Smuzhiyun }
309*4882a593Smuzhiyun }
310*4882a593Smuzhiyun
311*4882a593Smuzhiyun static DEFINE_SPINLOCK(ncr53c8xx_lock);
312*4882a593Smuzhiyun
__m_calloc2(m_pool_s * mp,int size,char * name,int uflags)313*4882a593Smuzhiyun static void *__m_calloc2(m_pool_s *mp, int size, char *name, int uflags)
314*4882a593Smuzhiyun {
315*4882a593Smuzhiyun void *p;
316*4882a593Smuzhiyun
317*4882a593Smuzhiyun p = ___m_alloc(mp, size);
318*4882a593Smuzhiyun
319*4882a593Smuzhiyun if (DEBUG_FLAGS & DEBUG_ALLOC)
320*4882a593Smuzhiyun printk ("new %-10s[%4d] @%p.\n", name, size, p);
321*4882a593Smuzhiyun
322*4882a593Smuzhiyun if (p)
323*4882a593Smuzhiyun memset(p, 0, size);
324*4882a593Smuzhiyun else if (uflags & MEMO_WARN)
325*4882a593Smuzhiyun printk (NAME53C8XX ": failed to allocate %s[%d]\n", name, size);
326*4882a593Smuzhiyun
327*4882a593Smuzhiyun return p;
328*4882a593Smuzhiyun }
329*4882a593Smuzhiyun
330*4882a593Smuzhiyun #define __m_calloc(mp, s, n) __m_calloc2(mp, s, n, MEMO_WARN)
331*4882a593Smuzhiyun
__m_free(m_pool_s * mp,void * ptr,int size,char * name)332*4882a593Smuzhiyun static void __m_free(m_pool_s *mp, void *ptr, int size, char *name)
333*4882a593Smuzhiyun {
334*4882a593Smuzhiyun if (DEBUG_FLAGS & DEBUG_ALLOC)
335*4882a593Smuzhiyun printk ("freeing %-10s[%4d] @%p.\n", name, size, ptr);
336*4882a593Smuzhiyun
337*4882a593Smuzhiyun ___m_free(mp, ptr, size);
338*4882a593Smuzhiyun
339*4882a593Smuzhiyun }
340*4882a593Smuzhiyun
341*4882a593Smuzhiyun /*
342*4882a593Smuzhiyun * With pci bus iommu support, we use a default pool of unmapped memory
343*4882a593Smuzhiyun * for memory we donnot need to DMA from/to and one pool per pcidev for
344*4882a593Smuzhiyun * memory accessed by the PCI chip. `mp0' is the default not DMAable pool.
345*4882a593Smuzhiyun */
346*4882a593Smuzhiyun
___mp0_getp(m_pool_s * mp)347*4882a593Smuzhiyun static m_addr_t ___mp0_getp(m_pool_s *mp)
348*4882a593Smuzhiyun {
349*4882a593Smuzhiyun m_addr_t m = __get_free_pages(MEMO_GFP_FLAGS, MEMO_PAGE_ORDER);
350*4882a593Smuzhiyun if (m)
351*4882a593Smuzhiyun ++mp->nump;
352*4882a593Smuzhiyun return m;
353*4882a593Smuzhiyun }
354*4882a593Smuzhiyun
___mp0_freep(m_pool_s * mp,m_addr_t m)355*4882a593Smuzhiyun static void ___mp0_freep(m_pool_s *mp, m_addr_t m)
356*4882a593Smuzhiyun {
357*4882a593Smuzhiyun free_pages(m, MEMO_PAGE_ORDER);
358*4882a593Smuzhiyun --mp->nump;
359*4882a593Smuzhiyun }
360*4882a593Smuzhiyun
361*4882a593Smuzhiyun static m_pool_s mp0 = {NULL, ___mp0_getp, ___mp0_freep};
362*4882a593Smuzhiyun
363*4882a593Smuzhiyun /*
364*4882a593Smuzhiyun * DMAable pools.
365*4882a593Smuzhiyun */
366*4882a593Smuzhiyun
367*4882a593Smuzhiyun /*
368*4882a593Smuzhiyun * With pci bus iommu support, we maintain one pool per pcidev and a
369*4882a593Smuzhiyun * hashed reverse table for virtual to bus physical address translations.
370*4882a593Smuzhiyun */
___dma_getp(m_pool_s * mp)371*4882a593Smuzhiyun static m_addr_t ___dma_getp(m_pool_s *mp)
372*4882a593Smuzhiyun {
373*4882a593Smuzhiyun m_addr_t vp;
374*4882a593Smuzhiyun m_vtob_s *vbp;
375*4882a593Smuzhiyun
376*4882a593Smuzhiyun vbp = __m_calloc(&mp0, sizeof(*vbp), "VTOB");
377*4882a593Smuzhiyun if (vbp) {
378*4882a593Smuzhiyun dma_addr_t daddr;
379*4882a593Smuzhiyun vp = (m_addr_t) dma_alloc_coherent(mp->bush,
380*4882a593Smuzhiyun PAGE_SIZE<<MEMO_PAGE_ORDER,
381*4882a593Smuzhiyun &daddr, GFP_ATOMIC);
382*4882a593Smuzhiyun if (vp) {
383*4882a593Smuzhiyun int hc = VTOB_HASH_CODE(vp);
384*4882a593Smuzhiyun vbp->vaddr = vp;
385*4882a593Smuzhiyun vbp->baddr = daddr;
386*4882a593Smuzhiyun vbp->next = mp->vtob[hc];
387*4882a593Smuzhiyun mp->vtob[hc] = vbp;
388*4882a593Smuzhiyun ++mp->nump;
389*4882a593Smuzhiyun return vp;
390*4882a593Smuzhiyun }
391*4882a593Smuzhiyun }
392*4882a593Smuzhiyun if (vbp)
393*4882a593Smuzhiyun __m_free(&mp0, vbp, sizeof(*vbp), "VTOB");
394*4882a593Smuzhiyun return 0;
395*4882a593Smuzhiyun }
396*4882a593Smuzhiyun
___dma_freep(m_pool_s * mp,m_addr_t m)397*4882a593Smuzhiyun static void ___dma_freep(m_pool_s *mp, m_addr_t m)
398*4882a593Smuzhiyun {
399*4882a593Smuzhiyun m_vtob_s **vbpp, *vbp;
400*4882a593Smuzhiyun int hc = VTOB_HASH_CODE(m);
401*4882a593Smuzhiyun
402*4882a593Smuzhiyun vbpp = &mp->vtob[hc];
403*4882a593Smuzhiyun while (*vbpp && (*vbpp)->vaddr != m)
404*4882a593Smuzhiyun vbpp = &(*vbpp)->next;
405*4882a593Smuzhiyun if (*vbpp) {
406*4882a593Smuzhiyun vbp = *vbpp;
407*4882a593Smuzhiyun *vbpp = (*vbpp)->next;
408*4882a593Smuzhiyun dma_free_coherent(mp->bush, PAGE_SIZE<<MEMO_PAGE_ORDER,
409*4882a593Smuzhiyun (void *)vbp->vaddr, (dma_addr_t)vbp->baddr);
410*4882a593Smuzhiyun __m_free(&mp0, vbp, sizeof(*vbp), "VTOB");
411*4882a593Smuzhiyun --mp->nump;
412*4882a593Smuzhiyun }
413*4882a593Smuzhiyun }
414*4882a593Smuzhiyun
___get_dma_pool(m_bush_t bush)415*4882a593Smuzhiyun static inline m_pool_s *___get_dma_pool(m_bush_t bush)
416*4882a593Smuzhiyun {
417*4882a593Smuzhiyun m_pool_s *mp;
418*4882a593Smuzhiyun for (mp = mp0.next; mp && mp->bush != bush; mp = mp->next);
419*4882a593Smuzhiyun return mp;
420*4882a593Smuzhiyun }
421*4882a593Smuzhiyun
___cre_dma_pool(m_bush_t bush)422*4882a593Smuzhiyun static m_pool_s *___cre_dma_pool(m_bush_t bush)
423*4882a593Smuzhiyun {
424*4882a593Smuzhiyun m_pool_s *mp;
425*4882a593Smuzhiyun mp = __m_calloc(&mp0, sizeof(*mp), "MPOOL");
426*4882a593Smuzhiyun if (mp) {
427*4882a593Smuzhiyun memset(mp, 0, sizeof(*mp));
428*4882a593Smuzhiyun mp->bush = bush;
429*4882a593Smuzhiyun mp->getp = ___dma_getp;
430*4882a593Smuzhiyun mp->freep = ___dma_freep;
431*4882a593Smuzhiyun mp->next = mp0.next;
432*4882a593Smuzhiyun mp0.next = mp;
433*4882a593Smuzhiyun }
434*4882a593Smuzhiyun return mp;
435*4882a593Smuzhiyun }
436*4882a593Smuzhiyun
___del_dma_pool(m_pool_s * p)437*4882a593Smuzhiyun static void ___del_dma_pool(m_pool_s *p)
438*4882a593Smuzhiyun {
439*4882a593Smuzhiyun struct m_pool **pp = &mp0.next;
440*4882a593Smuzhiyun
441*4882a593Smuzhiyun while (*pp && *pp != p)
442*4882a593Smuzhiyun pp = &(*pp)->next;
443*4882a593Smuzhiyun if (*pp) {
444*4882a593Smuzhiyun *pp = (*pp)->next;
445*4882a593Smuzhiyun __m_free(&mp0, p, sizeof(*p), "MPOOL");
446*4882a593Smuzhiyun }
447*4882a593Smuzhiyun }
448*4882a593Smuzhiyun
__m_calloc_dma(m_bush_t bush,int size,char * name)449*4882a593Smuzhiyun static void *__m_calloc_dma(m_bush_t bush, int size, char *name)
450*4882a593Smuzhiyun {
451*4882a593Smuzhiyun u_long flags;
452*4882a593Smuzhiyun struct m_pool *mp;
453*4882a593Smuzhiyun void *m = NULL;
454*4882a593Smuzhiyun
455*4882a593Smuzhiyun spin_lock_irqsave(&ncr53c8xx_lock, flags);
456*4882a593Smuzhiyun mp = ___get_dma_pool(bush);
457*4882a593Smuzhiyun if (!mp)
458*4882a593Smuzhiyun mp = ___cre_dma_pool(bush);
459*4882a593Smuzhiyun if (mp)
460*4882a593Smuzhiyun m = __m_calloc(mp, size, name);
461*4882a593Smuzhiyun if (mp && !mp->nump)
462*4882a593Smuzhiyun ___del_dma_pool(mp);
463*4882a593Smuzhiyun spin_unlock_irqrestore(&ncr53c8xx_lock, flags);
464*4882a593Smuzhiyun
465*4882a593Smuzhiyun return m;
466*4882a593Smuzhiyun }
467*4882a593Smuzhiyun
__m_free_dma(m_bush_t bush,void * m,int size,char * name)468*4882a593Smuzhiyun static void __m_free_dma(m_bush_t bush, void *m, int size, char *name)
469*4882a593Smuzhiyun {
470*4882a593Smuzhiyun u_long flags;
471*4882a593Smuzhiyun struct m_pool *mp;
472*4882a593Smuzhiyun
473*4882a593Smuzhiyun spin_lock_irqsave(&ncr53c8xx_lock, flags);
474*4882a593Smuzhiyun mp = ___get_dma_pool(bush);
475*4882a593Smuzhiyun if (mp)
476*4882a593Smuzhiyun __m_free(mp, m, size, name);
477*4882a593Smuzhiyun if (mp && !mp->nump)
478*4882a593Smuzhiyun ___del_dma_pool(mp);
479*4882a593Smuzhiyun spin_unlock_irqrestore(&ncr53c8xx_lock, flags);
480*4882a593Smuzhiyun }
481*4882a593Smuzhiyun
__vtobus(m_bush_t bush,void * m)482*4882a593Smuzhiyun static m_addr_t __vtobus(m_bush_t bush, void *m)
483*4882a593Smuzhiyun {
484*4882a593Smuzhiyun u_long flags;
485*4882a593Smuzhiyun m_pool_s *mp;
486*4882a593Smuzhiyun int hc = VTOB_HASH_CODE(m);
487*4882a593Smuzhiyun m_vtob_s *vp = NULL;
488*4882a593Smuzhiyun m_addr_t a = ((m_addr_t) m) & ~MEMO_CLUSTER_MASK;
489*4882a593Smuzhiyun
490*4882a593Smuzhiyun spin_lock_irqsave(&ncr53c8xx_lock, flags);
491*4882a593Smuzhiyun mp = ___get_dma_pool(bush);
492*4882a593Smuzhiyun if (mp) {
493*4882a593Smuzhiyun vp = mp->vtob[hc];
494*4882a593Smuzhiyun while (vp && (m_addr_t) vp->vaddr != a)
495*4882a593Smuzhiyun vp = vp->next;
496*4882a593Smuzhiyun }
497*4882a593Smuzhiyun spin_unlock_irqrestore(&ncr53c8xx_lock, flags);
498*4882a593Smuzhiyun return vp ? vp->baddr + (((m_addr_t) m) - a) : 0;
499*4882a593Smuzhiyun }
500*4882a593Smuzhiyun
501*4882a593Smuzhiyun #define _m_calloc_dma(np, s, n) __m_calloc_dma(np->dev, s, n)
502*4882a593Smuzhiyun #define _m_free_dma(np, p, s, n) __m_free_dma(np->dev, p, s, n)
503*4882a593Smuzhiyun #define m_calloc_dma(s, n) _m_calloc_dma(np, s, n)
504*4882a593Smuzhiyun #define m_free_dma(p, s, n) _m_free_dma(np, p, s, n)
505*4882a593Smuzhiyun #define _vtobus(np, p) __vtobus(np->dev, p)
506*4882a593Smuzhiyun #define vtobus(p) _vtobus(np, p)
507*4882a593Smuzhiyun
508*4882a593Smuzhiyun /*
509*4882a593Smuzhiyun * Deal with DMA mapping/unmapping.
510*4882a593Smuzhiyun */
511*4882a593Smuzhiyun
512*4882a593Smuzhiyun /* To keep track of the dma mapping (sg/single) that has been set */
513*4882a593Smuzhiyun #define __data_mapped SCp.phase
514*4882a593Smuzhiyun #define __data_mapping SCp.have_data_in
515*4882a593Smuzhiyun
__unmap_scsi_data(struct device * dev,struct scsi_cmnd * cmd)516*4882a593Smuzhiyun static void __unmap_scsi_data(struct device *dev, struct scsi_cmnd *cmd)
517*4882a593Smuzhiyun {
518*4882a593Smuzhiyun switch(cmd->__data_mapped) {
519*4882a593Smuzhiyun case 2:
520*4882a593Smuzhiyun scsi_dma_unmap(cmd);
521*4882a593Smuzhiyun break;
522*4882a593Smuzhiyun }
523*4882a593Smuzhiyun cmd->__data_mapped = 0;
524*4882a593Smuzhiyun }
525*4882a593Smuzhiyun
__map_scsi_sg_data(struct device * dev,struct scsi_cmnd * cmd)526*4882a593Smuzhiyun static int __map_scsi_sg_data(struct device *dev, struct scsi_cmnd *cmd)
527*4882a593Smuzhiyun {
528*4882a593Smuzhiyun int use_sg;
529*4882a593Smuzhiyun
530*4882a593Smuzhiyun use_sg = scsi_dma_map(cmd);
531*4882a593Smuzhiyun if (!use_sg)
532*4882a593Smuzhiyun return 0;
533*4882a593Smuzhiyun
534*4882a593Smuzhiyun cmd->__data_mapped = 2;
535*4882a593Smuzhiyun cmd->__data_mapping = use_sg;
536*4882a593Smuzhiyun
537*4882a593Smuzhiyun return use_sg;
538*4882a593Smuzhiyun }
539*4882a593Smuzhiyun
540*4882a593Smuzhiyun #define unmap_scsi_data(np, cmd) __unmap_scsi_data(np->dev, cmd)
541*4882a593Smuzhiyun #define map_scsi_sg_data(np, cmd) __map_scsi_sg_data(np->dev, cmd)
542*4882a593Smuzhiyun
543*4882a593Smuzhiyun /*==========================================================
544*4882a593Smuzhiyun **
545*4882a593Smuzhiyun ** Driver setup.
546*4882a593Smuzhiyun **
547*4882a593Smuzhiyun ** This structure is initialized from linux config
548*4882a593Smuzhiyun ** options. It can be overridden at boot-up by the boot
549*4882a593Smuzhiyun ** command line.
550*4882a593Smuzhiyun **
551*4882a593Smuzhiyun **==========================================================
552*4882a593Smuzhiyun */
553*4882a593Smuzhiyun static struct ncr_driver_setup
554*4882a593Smuzhiyun driver_setup = SCSI_NCR_DRIVER_SETUP;
555*4882a593Smuzhiyun
556*4882a593Smuzhiyun #ifndef MODULE
557*4882a593Smuzhiyun #ifdef SCSI_NCR_BOOT_COMMAND_LINE_SUPPORT
558*4882a593Smuzhiyun static struct ncr_driver_setup
559*4882a593Smuzhiyun driver_safe_setup __initdata = SCSI_NCR_DRIVER_SAFE_SETUP;
560*4882a593Smuzhiyun #endif
561*4882a593Smuzhiyun #endif /* !MODULE */
562*4882a593Smuzhiyun
563*4882a593Smuzhiyun #define initverbose (driver_setup.verbose)
564*4882a593Smuzhiyun #define bootverbose (np->verbose)
565*4882a593Smuzhiyun
566*4882a593Smuzhiyun
567*4882a593Smuzhiyun /*===================================================================
568*4882a593Smuzhiyun **
569*4882a593Smuzhiyun ** Driver setup from the boot command line
570*4882a593Smuzhiyun **
571*4882a593Smuzhiyun **===================================================================
572*4882a593Smuzhiyun */
573*4882a593Smuzhiyun
574*4882a593Smuzhiyun #ifdef MODULE
575*4882a593Smuzhiyun #define ARG_SEP ' '
576*4882a593Smuzhiyun #else
577*4882a593Smuzhiyun #define ARG_SEP ','
578*4882a593Smuzhiyun #endif
579*4882a593Smuzhiyun
580*4882a593Smuzhiyun #define OPT_TAGS 1
581*4882a593Smuzhiyun #define OPT_MASTER_PARITY 2
582*4882a593Smuzhiyun #define OPT_SCSI_PARITY 3
583*4882a593Smuzhiyun #define OPT_DISCONNECTION 4
584*4882a593Smuzhiyun #define OPT_SPECIAL_FEATURES 5
585*4882a593Smuzhiyun #define OPT_UNUSED_1 6
586*4882a593Smuzhiyun #define OPT_FORCE_SYNC_NEGO 7
587*4882a593Smuzhiyun #define OPT_REVERSE_PROBE 8
588*4882a593Smuzhiyun #define OPT_DEFAULT_SYNC 9
589*4882a593Smuzhiyun #define OPT_VERBOSE 10
590*4882a593Smuzhiyun #define OPT_DEBUG 11
591*4882a593Smuzhiyun #define OPT_BURST_MAX 12
592*4882a593Smuzhiyun #define OPT_LED_PIN 13
593*4882a593Smuzhiyun #define OPT_MAX_WIDE 14
594*4882a593Smuzhiyun #define OPT_SETTLE_DELAY 15
595*4882a593Smuzhiyun #define OPT_DIFF_SUPPORT 16
596*4882a593Smuzhiyun #define OPT_IRQM 17
597*4882a593Smuzhiyun #define OPT_PCI_FIX_UP 18
598*4882a593Smuzhiyun #define OPT_BUS_CHECK 19
599*4882a593Smuzhiyun #define OPT_OPTIMIZE 20
600*4882a593Smuzhiyun #define OPT_RECOVERY 21
601*4882a593Smuzhiyun #define OPT_SAFE_SETUP 22
602*4882a593Smuzhiyun #define OPT_USE_NVRAM 23
603*4882a593Smuzhiyun #define OPT_EXCLUDE 24
604*4882a593Smuzhiyun #define OPT_HOST_ID 25
605*4882a593Smuzhiyun
606*4882a593Smuzhiyun #ifdef SCSI_NCR_IARB_SUPPORT
607*4882a593Smuzhiyun #define OPT_IARB 26
608*4882a593Smuzhiyun #endif
609*4882a593Smuzhiyun
610*4882a593Smuzhiyun #ifdef MODULE
611*4882a593Smuzhiyun #define ARG_SEP ' '
612*4882a593Smuzhiyun #else
613*4882a593Smuzhiyun #define ARG_SEP ','
614*4882a593Smuzhiyun #endif
615*4882a593Smuzhiyun
616*4882a593Smuzhiyun #ifndef MODULE
617*4882a593Smuzhiyun static char setup_token[] __initdata =
618*4882a593Smuzhiyun "tags:" "mpar:"
619*4882a593Smuzhiyun "spar:" "disc:"
620*4882a593Smuzhiyun "specf:" "ultra:"
621*4882a593Smuzhiyun "fsn:" "revprob:"
622*4882a593Smuzhiyun "sync:" "verb:"
623*4882a593Smuzhiyun "debug:" "burst:"
624*4882a593Smuzhiyun "led:" "wide:"
625*4882a593Smuzhiyun "settle:" "diff:"
626*4882a593Smuzhiyun "irqm:" "pcifix:"
627*4882a593Smuzhiyun "buschk:" "optim:"
628*4882a593Smuzhiyun "recovery:"
629*4882a593Smuzhiyun "safe:" "nvram:"
630*4882a593Smuzhiyun "excl:" "hostid:"
631*4882a593Smuzhiyun #ifdef SCSI_NCR_IARB_SUPPORT
632*4882a593Smuzhiyun "iarb:"
633*4882a593Smuzhiyun #endif
634*4882a593Smuzhiyun ; /* DONNOT REMOVE THIS ';' */
635*4882a593Smuzhiyun
get_setup_token(char * p)636*4882a593Smuzhiyun static int __init get_setup_token(char *p)
637*4882a593Smuzhiyun {
638*4882a593Smuzhiyun char *cur = setup_token;
639*4882a593Smuzhiyun char *pc;
640*4882a593Smuzhiyun int i = 0;
641*4882a593Smuzhiyun
642*4882a593Smuzhiyun while (cur != NULL && (pc = strchr(cur, ':')) != NULL) {
643*4882a593Smuzhiyun ++pc;
644*4882a593Smuzhiyun ++i;
645*4882a593Smuzhiyun if (!strncmp(p, cur, pc - cur))
646*4882a593Smuzhiyun return i;
647*4882a593Smuzhiyun cur = pc;
648*4882a593Smuzhiyun }
649*4882a593Smuzhiyun return 0;
650*4882a593Smuzhiyun }
651*4882a593Smuzhiyun
sym53c8xx__setup(char * str)652*4882a593Smuzhiyun static int __init sym53c8xx__setup(char *str)
653*4882a593Smuzhiyun {
654*4882a593Smuzhiyun #ifdef SCSI_NCR_BOOT_COMMAND_LINE_SUPPORT
655*4882a593Smuzhiyun char *cur = str;
656*4882a593Smuzhiyun char *pc, *pv;
657*4882a593Smuzhiyun int i, val, c;
658*4882a593Smuzhiyun int xi = 0;
659*4882a593Smuzhiyun
660*4882a593Smuzhiyun while (cur != NULL && (pc = strchr(cur, ':')) != NULL) {
661*4882a593Smuzhiyun char *pe;
662*4882a593Smuzhiyun
663*4882a593Smuzhiyun val = 0;
664*4882a593Smuzhiyun pv = pc;
665*4882a593Smuzhiyun c = *++pv;
666*4882a593Smuzhiyun
667*4882a593Smuzhiyun if (c == 'n')
668*4882a593Smuzhiyun val = 0;
669*4882a593Smuzhiyun else if (c == 'y')
670*4882a593Smuzhiyun val = 1;
671*4882a593Smuzhiyun else
672*4882a593Smuzhiyun val = (int) simple_strtoul(pv, &pe, 0);
673*4882a593Smuzhiyun
674*4882a593Smuzhiyun switch (get_setup_token(cur)) {
675*4882a593Smuzhiyun case OPT_TAGS:
676*4882a593Smuzhiyun driver_setup.default_tags = val;
677*4882a593Smuzhiyun if (pe && *pe == '/') {
678*4882a593Smuzhiyun i = 0;
679*4882a593Smuzhiyun while (*pe && *pe != ARG_SEP &&
680*4882a593Smuzhiyun i < sizeof(driver_setup.tag_ctrl)-1) {
681*4882a593Smuzhiyun driver_setup.tag_ctrl[i++] = *pe++;
682*4882a593Smuzhiyun }
683*4882a593Smuzhiyun driver_setup.tag_ctrl[i] = '\0';
684*4882a593Smuzhiyun }
685*4882a593Smuzhiyun break;
686*4882a593Smuzhiyun case OPT_MASTER_PARITY:
687*4882a593Smuzhiyun driver_setup.master_parity = val;
688*4882a593Smuzhiyun break;
689*4882a593Smuzhiyun case OPT_SCSI_PARITY:
690*4882a593Smuzhiyun driver_setup.scsi_parity = val;
691*4882a593Smuzhiyun break;
692*4882a593Smuzhiyun case OPT_DISCONNECTION:
693*4882a593Smuzhiyun driver_setup.disconnection = val;
694*4882a593Smuzhiyun break;
695*4882a593Smuzhiyun case OPT_SPECIAL_FEATURES:
696*4882a593Smuzhiyun driver_setup.special_features = val;
697*4882a593Smuzhiyun break;
698*4882a593Smuzhiyun case OPT_FORCE_SYNC_NEGO:
699*4882a593Smuzhiyun driver_setup.force_sync_nego = val;
700*4882a593Smuzhiyun break;
701*4882a593Smuzhiyun case OPT_REVERSE_PROBE:
702*4882a593Smuzhiyun driver_setup.reverse_probe = val;
703*4882a593Smuzhiyun break;
704*4882a593Smuzhiyun case OPT_DEFAULT_SYNC:
705*4882a593Smuzhiyun driver_setup.default_sync = val;
706*4882a593Smuzhiyun break;
707*4882a593Smuzhiyun case OPT_VERBOSE:
708*4882a593Smuzhiyun driver_setup.verbose = val;
709*4882a593Smuzhiyun break;
710*4882a593Smuzhiyun case OPT_DEBUG:
711*4882a593Smuzhiyun driver_setup.debug = val;
712*4882a593Smuzhiyun break;
713*4882a593Smuzhiyun case OPT_BURST_MAX:
714*4882a593Smuzhiyun driver_setup.burst_max = val;
715*4882a593Smuzhiyun break;
716*4882a593Smuzhiyun case OPT_LED_PIN:
717*4882a593Smuzhiyun driver_setup.led_pin = val;
718*4882a593Smuzhiyun break;
719*4882a593Smuzhiyun case OPT_MAX_WIDE:
720*4882a593Smuzhiyun driver_setup.max_wide = val? 1:0;
721*4882a593Smuzhiyun break;
722*4882a593Smuzhiyun case OPT_SETTLE_DELAY:
723*4882a593Smuzhiyun driver_setup.settle_delay = val;
724*4882a593Smuzhiyun break;
725*4882a593Smuzhiyun case OPT_DIFF_SUPPORT:
726*4882a593Smuzhiyun driver_setup.diff_support = val;
727*4882a593Smuzhiyun break;
728*4882a593Smuzhiyun case OPT_IRQM:
729*4882a593Smuzhiyun driver_setup.irqm = val;
730*4882a593Smuzhiyun break;
731*4882a593Smuzhiyun case OPT_PCI_FIX_UP:
732*4882a593Smuzhiyun driver_setup.pci_fix_up = val;
733*4882a593Smuzhiyun break;
734*4882a593Smuzhiyun case OPT_BUS_CHECK:
735*4882a593Smuzhiyun driver_setup.bus_check = val;
736*4882a593Smuzhiyun break;
737*4882a593Smuzhiyun case OPT_OPTIMIZE:
738*4882a593Smuzhiyun driver_setup.optimize = val;
739*4882a593Smuzhiyun break;
740*4882a593Smuzhiyun case OPT_RECOVERY:
741*4882a593Smuzhiyun driver_setup.recovery = val;
742*4882a593Smuzhiyun break;
743*4882a593Smuzhiyun case OPT_USE_NVRAM:
744*4882a593Smuzhiyun driver_setup.use_nvram = val;
745*4882a593Smuzhiyun break;
746*4882a593Smuzhiyun case OPT_SAFE_SETUP:
747*4882a593Smuzhiyun memcpy(&driver_setup, &driver_safe_setup,
748*4882a593Smuzhiyun sizeof(driver_setup));
749*4882a593Smuzhiyun break;
750*4882a593Smuzhiyun case OPT_EXCLUDE:
751*4882a593Smuzhiyun if (xi < SCSI_NCR_MAX_EXCLUDES)
752*4882a593Smuzhiyun driver_setup.excludes[xi++] = val;
753*4882a593Smuzhiyun break;
754*4882a593Smuzhiyun case OPT_HOST_ID:
755*4882a593Smuzhiyun driver_setup.host_id = val;
756*4882a593Smuzhiyun break;
757*4882a593Smuzhiyun #ifdef SCSI_NCR_IARB_SUPPORT
758*4882a593Smuzhiyun case OPT_IARB:
759*4882a593Smuzhiyun driver_setup.iarb = val;
760*4882a593Smuzhiyun break;
761*4882a593Smuzhiyun #endif
762*4882a593Smuzhiyun default:
763*4882a593Smuzhiyun printk("sym53c8xx_setup: unexpected boot option '%.*s' ignored\n", (int)(pc-cur+1), cur);
764*4882a593Smuzhiyun break;
765*4882a593Smuzhiyun }
766*4882a593Smuzhiyun
767*4882a593Smuzhiyun if ((cur = strchr(cur, ARG_SEP)) != NULL)
768*4882a593Smuzhiyun ++cur;
769*4882a593Smuzhiyun }
770*4882a593Smuzhiyun #endif /* SCSI_NCR_BOOT_COMMAND_LINE_SUPPORT */
771*4882a593Smuzhiyun return 1;
772*4882a593Smuzhiyun }
773*4882a593Smuzhiyun #endif /* !MODULE */
774*4882a593Smuzhiyun
775*4882a593Smuzhiyun /*===================================================================
776*4882a593Smuzhiyun **
777*4882a593Smuzhiyun ** Get device queue depth from boot command line.
778*4882a593Smuzhiyun **
779*4882a593Smuzhiyun **===================================================================
780*4882a593Smuzhiyun */
781*4882a593Smuzhiyun #define DEF_DEPTH (driver_setup.default_tags)
782*4882a593Smuzhiyun #define ALL_TARGETS -2
783*4882a593Smuzhiyun #define NO_TARGET -1
784*4882a593Smuzhiyun #define ALL_LUNS -2
785*4882a593Smuzhiyun #define NO_LUN -1
786*4882a593Smuzhiyun
device_queue_depth(int unit,int target,int lun)787*4882a593Smuzhiyun static int device_queue_depth(int unit, int target, int lun)
788*4882a593Smuzhiyun {
789*4882a593Smuzhiyun int c, h, t, u, v;
790*4882a593Smuzhiyun char *p = driver_setup.tag_ctrl;
791*4882a593Smuzhiyun char *ep;
792*4882a593Smuzhiyun
793*4882a593Smuzhiyun h = -1;
794*4882a593Smuzhiyun t = NO_TARGET;
795*4882a593Smuzhiyun u = NO_LUN;
796*4882a593Smuzhiyun while ((c = *p++) != 0) {
797*4882a593Smuzhiyun v = simple_strtoul(p, &ep, 0);
798*4882a593Smuzhiyun switch(c) {
799*4882a593Smuzhiyun case '/':
800*4882a593Smuzhiyun ++h;
801*4882a593Smuzhiyun t = ALL_TARGETS;
802*4882a593Smuzhiyun u = ALL_LUNS;
803*4882a593Smuzhiyun break;
804*4882a593Smuzhiyun case 't':
805*4882a593Smuzhiyun if (t != target)
806*4882a593Smuzhiyun t = (target == v) ? v : NO_TARGET;
807*4882a593Smuzhiyun u = ALL_LUNS;
808*4882a593Smuzhiyun break;
809*4882a593Smuzhiyun case 'u':
810*4882a593Smuzhiyun if (u != lun)
811*4882a593Smuzhiyun u = (lun == v) ? v : NO_LUN;
812*4882a593Smuzhiyun break;
813*4882a593Smuzhiyun case 'q':
814*4882a593Smuzhiyun if (h == unit &&
815*4882a593Smuzhiyun (t == ALL_TARGETS || t == target) &&
816*4882a593Smuzhiyun (u == ALL_LUNS || u == lun))
817*4882a593Smuzhiyun return v;
818*4882a593Smuzhiyun break;
819*4882a593Smuzhiyun case '-':
820*4882a593Smuzhiyun t = ALL_TARGETS;
821*4882a593Smuzhiyun u = ALL_LUNS;
822*4882a593Smuzhiyun break;
823*4882a593Smuzhiyun default:
824*4882a593Smuzhiyun break;
825*4882a593Smuzhiyun }
826*4882a593Smuzhiyun p = ep;
827*4882a593Smuzhiyun }
828*4882a593Smuzhiyun return DEF_DEPTH;
829*4882a593Smuzhiyun }
830*4882a593Smuzhiyun
831*4882a593Smuzhiyun
832*4882a593Smuzhiyun /*==========================================================
833*4882a593Smuzhiyun **
834*4882a593Smuzhiyun ** The CCB done queue uses an array of CCB virtual
835*4882a593Smuzhiyun ** addresses. Empty entries are flagged using the bogus
836*4882a593Smuzhiyun ** virtual address 0xffffffff.
837*4882a593Smuzhiyun **
838*4882a593Smuzhiyun ** Since PCI ensures that only aligned DWORDs are accessed
839*4882a593Smuzhiyun ** atomically, 64 bit little-endian architecture requires
840*4882a593Smuzhiyun ** to test the high order DWORD of the entry to determine
841*4882a593Smuzhiyun ** if it is empty or valid.
842*4882a593Smuzhiyun **
843*4882a593Smuzhiyun ** BTW, I will make things differently as soon as I will
844*4882a593Smuzhiyun ** have a better idea, but this is simple and should work.
845*4882a593Smuzhiyun **
846*4882a593Smuzhiyun **==========================================================
847*4882a593Smuzhiyun */
848*4882a593Smuzhiyun
849*4882a593Smuzhiyun #define SCSI_NCR_CCB_DONE_SUPPORT
850*4882a593Smuzhiyun #ifdef SCSI_NCR_CCB_DONE_SUPPORT
851*4882a593Smuzhiyun
852*4882a593Smuzhiyun #define MAX_DONE 24
853*4882a593Smuzhiyun #define CCB_DONE_EMPTY 0xffffffffUL
854*4882a593Smuzhiyun
855*4882a593Smuzhiyun /* All 32 bit architectures */
856*4882a593Smuzhiyun #if BITS_PER_LONG == 32
857*4882a593Smuzhiyun #define CCB_DONE_VALID(cp) (((u_long) cp) != CCB_DONE_EMPTY)
858*4882a593Smuzhiyun
859*4882a593Smuzhiyun /* All > 32 bit (64 bit) architectures regardless endian-ness */
860*4882a593Smuzhiyun #else
861*4882a593Smuzhiyun #define CCB_DONE_VALID(cp) \
862*4882a593Smuzhiyun ((((u_long) cp) & 0xffffffff00000000ul) && \
863*4882a593Smuzhiyun (((u_long) cp) & 0xfffffffful) != CCB_DONE_EMPTY)
864*4882a593Smuzhiyun #endif
865*4882a593Smuzhiyun
866*4882a593Smuzhiyun #endif /* SCSI_NCR_CCB_DONE_SUPPORT */
867*4882a593Smuzhiyun
868*4882a593Smuzhiyun /*==========================================================
869*4882a593Smuzhiyun **
870*4882a593Smuzhiyun ** Configuration and Debugging
871*4882a593Smuzhiyun **
872*4882a593Smuzhiyun **==========================================================
873*4882a593Smuzhiyun */
874*4882a593Smuzhiyun
875*4882a593Smuzhiyun /*
876*4882a593Smuzhiyun ** SCSI address of this device.
877*4882a593Smuzhiyun ** The boot routines should have set it.
878*4882a593Smuzhiyun ** If not, use this.
879*4882a593Smuzhiyun */
880*4882a593Smuzhiyun
881*4882a593Smuzhiyun #ifndef SCSI_NCR_MYADDR
882*4882a593Smuzhiyun #define SCSI_NCR_MYADDR (7)
883*4882a593Smuzhiyun #endif
884*4882a593Smuzhiyun
885*4882a593Smuzhiyun /*
886*4882a593Smuzhiyun ** The maximum number of tags per logic unit.
887*4882a593Smuzhiyun ** Used only for disk devices that support tags.
888*4882a593Smuzhiyun */
889*4882a593Smuzhiyun
890*4882a593Smuzhiyun #ifndef SCSI_NCR_MAX_TAGS
891*4882a593Smuzhiyun #define SCSI_NCR_MAX_TAGS (8)
892*4882a593Smuzhiyun #endif
893*4882a593Smuzhiyun
894*4882a593Smuzhiyun /*
895*4882a593Smuzhiyun ** TAGS are actually limited to 64 tags/lun.
896*4882a593Smuzhiyun ** We need to deal with power of 2, for alignment constraints.
897*4882a593Smuzhiyun */
898*4882a593Smuzhiyun #if SCSI_NCR_MAX_TAGS > 64
899*4882a593Smuzhiyun #define MAX_TAGS (64)
900*4882a593Smuzhiyun #else
901*4882a593Smuzhiyun #define MAX_TAGS SCSI_NCR_MAX_TAGS
902*4882a593Smuzhiyun #endif
903*4882a593Smuzhiyun
904*4882a593Smuzhiyun #define NO_TAG (255)
905*4882a593Smuzhiyun
906*4882a593Smuzhiyun /*
907*4882a593Smuzhiyun ** Choose appropriate type for tag bitmap.
908*4882a593Smuzhiyun */
909*4882a593Smuzhiyun #if MAX_TAGS > 32
910*4882a593Smuzhiyun typedef u64 tagmap_t;
911*4882a593Smuzhiyun #else
912*4882a593Smuzhiyun typedef u32 tagmap_t;
913*4882a593Smuzhiyun #endif
914*4882a593Smuzhiyun
915*4882a593Smuzhiyun /*
916*4882a593Smuzhiyun ** Number of targets supported by the driver.
917*4882a593Smuzhiyun ** n permits target numbers 0..n-1.
918*4882a593Smuzhiyun ** Default is 16, meaning targets #0..#15.
919*4882a593Smuzhiyun ** #7 .. is myself.
920*4882a593Smuzhiyun */
921*4882a593Smuzhiyun
922*4882a593Smuzhiyun #ifdef SCSI_NCR_MAX_TARGET
923*4882a593Smuzhiyun #define MAX_TARGET (SCSI_NCR_MAX_TARGET)
924*4882a593Smuzhiyun #else
925*4882a593Smuzhiyun #define MAX_TARGET (16)
926*4882a593Smuzhiyun #endif
927*4882a593Smuzhiyun
928*4882a593Smuzhiyun /*
929*4882a593Smuzhiyun ** Number of logic units supported by the driver.
930*4882a593Smuzhiyun ** n enables logic unit numbers 0..n-1.
931*4882a593Smuzhiyun ** The common SCSI devices require only
932*4882a593Smuzhiyun ** one lun, so take 1 as the default.
933*4882a593Smuzhiyun */
934*4882a593Smuzhiyun
935*4882a593Smuzhiyun #ifdef SCSI_NCR_MAX_LUN
936*4882a593Smuzhiyun #define MAX_LUN SCSI_NCR_MAX_LUN
937*4882a593Smuzhiyun #else
938*4882a593Smuzhiyun #define MAX_LUN (1)
939*4882a593Smuzhiyun #endif
940*4882a593Smuzhiyun
941*4882a593Smuzhiyun /*
942*4882a593Smuzhiyun ** Asynchronous pre-scaler (ns). Shall be 40
943*4882a593Smuzhiyun */
944*4882a593Smuzhiyun
945*4882a593Smuzhiyun #ifndef SCSI_NCR_MIN_ASYNC
946*4882a593Smuzhiyun #define SCSI_NCR_MIN_ASYNC (40)
947*4882a593Smuzhiyun #endif
948*4882a593Smuzhiyun
949*4882a593Smuzhiyun /*
950*4882a593Smuzhiyun ** The maximum number of jobs scheduled for starting.
951*4882a593Smuzhiyun ** There should be one slot per target, and one slot
952*4882a593Smuzhiyun ** for each tag of each target in use.
953*4882a593Smuzhiyun ** The calculation below is actually quite silly ...
954*4882a593Smuzhiyun */
955*4882a593Smuzhiyun
956*4882a593Smuzhiyun #ifdef SCSI_NCR_CAN_QUEUE
957*4882a593Smuzhiyun #define MAX_START (SCSI_NCR_CAN_QUEUE + 4)
958*4882a593Smuzhiyun #else
959*4882a593Smuzhiyun #define MAX_START (MAX_TARGET + 7 * MAX_TAGS)
960*4882a593Smuzhiyun #endif
961*4882a593Smuzhiyun
962*4882a593Smuzhiyun /*
963*4882a593Smuzhiyun ** We limit the max number of pending IO to 250.
964*4882a593Smuzhiyun ** since we donnot want to allocate more than 1
965*4882a593Smuzhiyun ** PAGE for 'scripth'.
966*4882a593Smuzhiyun */
967*4882a593Smuzhiyun #if MAX_START > 250
968*4882a593Smuzhiyun #undef MAX_START
969*4882a593Smuzhiyun #define MAX_START 250
970*4882a593Smuzhiyun #endif
971*4882a593Smuzhiyun
972*4882a593Smuzhiyun /*
973*4882a593Smuzhiyun ** The maximum number of segments a transfer is split into.
974*4882a593Smuzhiyun ** We support up to 127 segments for both read and write.
975*4882a593Smuzhiyun ** The data scripts are broken into 2 sub-scripts.
976*4882a593Smuzhiyun ** 80 (MAX_SCATTERL) segments are moved from a sub-script
977*4882a593Smuzhiyun ** in on-chip RAM. This makes data transfers shorter than
978*4882a593Smuzhiyun ** 80k (assuming 1k fs) as fast as possible.
979*4882a593Smuzhiyun */
980*4882a593Smuzhiyun
981*4882a593Smuzhiyun #define MAX_SCATTER (SCSI_NCR_MAX_SCATTER)
982*4882a593Smuzhiyun
983*4882a593Smuzhiyun #if (MAX_SCATTER > 80)
984*4882a593Smuzhiyun #define MAX_SCATTERL 80
985*4882a593Smuzhiyun #define MAX_SCATTERH (MAX_SCATTER - MAX_SCATTERL)
986*4882a593Smuzhiyun #else
987*4882a593Smuzhiyun #define MAX_SCATTERL (MAX_SCATTER-1)
988*4882a593Smuzhiyun #define MAX_SCATTERH 1
989*4882a593Smuzhiyun #endif
990*4882a593Smuzhiyun
991*4882a593Smuzhiyun /*
992*4882a593Smuzhiyun ** other
993*4882a593Smuzhiyun */
994*4882a593Smuzhiyun
995*4882a593Smuzhiyun #define NCR_SNOOP_TIMEOUT (1000000)
996*4882a593Smuzhiyun
997*4882a593Smuzhiyun /*
998*4882a593Smuzhiyun ** Other definitions
999*4882a593Smuzhiyun */
1000*4882a593Smuzhiyun
1001*4882a593Smuzhiyun #define ScsiResult(host_code, scsi_code) (((host_code) << 16) + ((scsi_code) & 0x7f))
1002*4882a593Smuzhiyun
1003*4882a593Smuzhiyun #define initverbose (driver_setup.verbose)
1004*4882a593Smuzhiyun #define bootverbose (np->verbose)
1005*4882a593Smuzhiyun
1006*4882a593Smuzhiyun /*==========================================================
1007*4882a593Smuzhiyun **
1008*4882a593Smuzhiyun ** Command control block states.
1009*4882a593Smuzhiyun **
1010*4882a593Smuzhiyun **==========================================================
1011*4882a593Smuzhiyun */
1012*4882a593Smuzhiyun
1013*4882a593Smuzhiyun #define HS_IDLE (0)
1014*4882a593Smuzhiyun #define HS_BUSY (1)
1015*4882a593Smuzhiyun #define HS_NEGOTIATE (2) /* sync/wide data transfer*/
1016*4882a593Smuzhiyun #define HS_DISCONNECT (3) /* Disconnected by target */
1017*4882a593Smuzhiyun
1018*4882a593Smuzhiyun #define HS_DONEMASK (0x80)
1019*4882a593Smuzhiyun #define HS_COMPLETE (4|HS_DONEMASK)
1020*4882a593Smuzhiyun #define HS_SEL_TIMEOUT (5|HS_DONEMASK) /* Selection timeout */
1021*4882a593Smuzhiyun #define HS_RESET (6|HS_DONEMASK) /* SCSI reset */
1022*4882a593Smuzhiyun #define HS_ABORTED (7|HS_DONEMASK) /* Transfer aborted */
1023*4882a593Smuzhiyun #define HS_TIMEOUT (8|HS_DONEMASK) /* Software timeout */
1024*4882a593Smuzhiyun #define HS_FAIL (9|HS_DONEMASK) /* SCSI or PCI bus errors */
1025*4882a593Smuzhiyun #define HS_UNEXPECTED (10|HS_DONEMASK)/* Unexpected disconnect */
1026*4882a593Smuzhiyun
1027*4882a593Smuzhiyun /*
1028*4882a593Smuzhiyun ** Invalid host status values used by the SCRIPTS processor
1029*4882a593Smuzhiyun ** when the nexus is not fully identified.
1030*4882a593Smuzhiyun ** Shall never appear in a CCB.
1031*4882a593Smuzhiyun */
1032*4882a593Smuzhiyun
1033*4882a593Smuzhiyun #define HS_INVALMASK (0x40)
1034*4882a593Smuzhiyun #define HS_SELECTING (0|HS_INVALMASK)
1035*4882a593Smuzhiyun #define HS_IN_RESELECT (1|HS_INVALMASK)
1036*4882a593Smuzhiyun #define HS_STARTING (2|HS_INVALMASK)
1037*4882a593Smuzhiyun
1038*4882a593Smuzhiyun /*
1039*4882a593Smuzhiyun ** Flags set by the SCRIPT processor for commands
1040*4882a593Smuzhiyun ** that have been skipped.
1041*4882a593Smuzhiyun */
1042*4882a593Smuzhiyun #define HS_SKIPMASK (0x20)
1043*4882a593Smuzhiyun
1044*4882a593Smuzhiyun /*==========================================================
1045*4882a593Smuzhiyun **
1046*4882a593Smuzhiyun ** Software Interrupt Codes
1047*4882a593Smuzhiyun **
1048*4882a593Smuzhiyun **==========================================================
1049*4882a593Smuzhiyun */
1050*4882a593Smuzhiyun
1051*4882a593Smuzhiyun #define SIR_BAD_STATUS (1)
1052*4882a593Smuzhiyun #define SIR_XXXXXXXXXX (2)
1053*4882a593Smuzhiyun #define SIR_NEGO_SYNC (3)
1054*4882a593Smuzhiyun #define SIR_NEGO_WIDE (4)
1055*4882a593Smuzhiyun #define SIR_NEGO_FAILED (5)
1056*4882a593Smuzhiyun #define SIR_NEGO_PROTO (6)
1057*4882a593Smuzhiyun #define SIR_REJECT_RECEIVED (7)
1058*4882a593Smuzhiyun #define SIR_REJECT_SENT (8)
1059*4882a593Smuzhiyun #define SIR_IGN_RESIDUE (9)
1060*4882a593Smuzhiyun #define SIR_MISSING_SAVE (10)
1061*4882a593Smuzhiyun #define SIR_RESEL_NO_MSG_IN (11)
1062*4882a593Smuzhiyun #define SIR_RESEL_NO_IDENTIFY (12)
1063*4882a593Smuzhiyun #define SIR_RESEL_BAD_LUN (13)
1064*4882a593Smuzhiyun #define SIR_RESEL_BAD_TARGET (14)
1065*4882a593Smuzhiyun #define SIR_RESEL_BAD_I_T_L (15)
1066*4882a593Smuzhiyun #define SIR_RESEL_BAD_I_T_L_Q (16)
1067*4882a593Smuzhiyun #define SIR_DONE_OVERFLOW (17)
1068*4882a593Smuzhiyun #define SIR_INTFLY (18)
1069*4882a593Smuzhiyun #define SIR_MAX (18)
1070*4882a593Smuzhiyun
1071*4882a593Smuzhiyun /*==========================================================
1072*4882a593Smuzhiyun **
1073*4882a593Smuzhiyun ** Extended error codes.
1074*4882a593Smuzhiyun ** xerr_status field of struct ccb.
1075*4882a593Smuzhiyun **
1076*4882a593Smuzhiyun **==========================================================
1077*4882a593Smuzhiyun */
1078*4882a593Smuzhiyun
1079*4882a593Smuzhiyun #define XE_OK (0)
1080*4882a593Smuzhiyun #define XE_EXTRA_DATA (1) /* unexpected data phase */
1081*4882a593Smuzhiyun #define XE_BAD_PHASE (2) /* illegal phase (4/5) */
1082*4882a593Smuzhiyun
1083*4882a593Smuzhiyun /*==========================================================
1084*4882a593Smuzhiyun **
1085*4882a593Smuzhiyun ** Negotiation status.
1086*4882a593Smuzhiyun ** nego_status field of struct ccb.
1087*4882a593Smuzhiyun **
1088*4882a593Smuzhiyun **==========================================================
1089*4882a593Smuzhiyun */
1090*4882a593Smuzhiyun
1091*4882a593Smuzhiyun #define NS_NOCHANGE (0)
1092*4882a593Smuzhiyun #define NS_SYNC (1)
1093*4882a593Smuzhiyun #define NS_WIDE (2)
1094*4882a593Smuzhiyun #define NS_PPR (4)
1095*4882a593Smuzhiyun
1096*4882a593Smuzhiyun /*==========================================================
1097*4882a593Smuzhiyun **
1098*4882a593Smuzhiyun ** Misc.
1099*4882a593Smuzhiyun **
1100*4882a593Smuzhiyun **==========================================================
1101*4882a593Smuzhiyun */
1102*4882a593Smuzhiyun
1103*4882a593Smuzhiyun #define CCB_MAGIC (0xf2691ad2)
1104*4882a593Smuzhiyun
1105*4882a593Smuzhiyun /*==========================================================
1106*4882a593Smuzhiyun **
1107*4882a593Smuzhiyun ** Declaration of structs.
1108*4882a593Smuzhiyun **
1109*4882a593Smuzhiyun **==========================================================
1110*4882a593Smuzhiyun */
1111*4882a593Smuzhiyun
1112*4882a593Smuzhiyun static struct scsi_transport_template *ncr53c8xx_transport_template = NULL;
1113*4882a593Smuzhiyun
1114*4882a593Smuzhiyun struct tcb;
1115*4882a593Smuzhiyun struct lcb;
1116*4882a593Smuzhiyun struct ccb;
1117*4882a593Smuzhiyun struct ncb;
1118*4882a593Smuzhiyun struct script;
1119*4882a593Smuzhiyun
1120*4882a593Smuzhiyun struct link {
1121*4882a593Smuzhiyun ncrcmd l_cmd;
1122*4882a593Smuzhiyun ncrcmd l_paddr;
1123*4882a593Smuzhiyun };
1124*4882a593Smuzhiyun
1125*4882a593Smuzhiyun struct usrcmd {
1126*4882a593Smuzhiyun u_long target;
1127*4882a593Smuzhiyun u_long lun;
1128*4882a593Smuzhiyun u_long data;
1129*4882a593Smuzhiyun u_long cmd;
1130*4882a593Smuzhiyun };
1131*4882a593Smuzhiyun
1132*4882a593Smuzhiyun #define UC_SETSYNC 10
1133*4882a593Smuzhiyun #define UC_SETTAGS 11
1134*4882a593Smuzhiyun #define UC_SETDEBUG 12
1135*4882a593Smuzhiyun #define UC_SETORDER 13
1136*4882a593Smuzhiyun #define UC_SETWIDE 14
1137*4882a593Smuzhiyun #define UC_SETFLAG 15
1138*4882a593Smuzhiyun #define UC_SETVERBOSE 17
1139*4882a593Smuzhiyun
1140*4882a593Smuzhiyun #define UF_TRACE (0x01)
1141*4882a593Smuzhiyun #define UF_NODISC (0x02)
1142*4882a593Smuzhiyun #define UF_NOSCAN (0x04)
1143*4882a593Smuzhiyun
1144*4882a593Smuzhiyun /*========================================================================
1145*4882a593Smuzhiyun **
1146*4882a593Smuzhiyun ** Declaration of structs: target control block
1147*4882a593Smuzhiyun **
1148*4882a593Smuzhiyun **========================================================================
1149*4882a593Smuzhiyun */
1150*4882a593Smuzhiyun struct tcb {
1151*4882a593Smuzhiyun /*----------------------------------------------------------------
1152*4882a593Smuzhiyun ** During reselection the ncr jumps to this point with SFBR
1153*4882a593Smuzhiyun ** set to the encoded target number with bit 7 set.
1154*4882a593Smuzhiyun ** if it's not this target, jump to the next.
1155*4882a593Smuzhiyun **
1156*4882a593Smuzhiyun ** JUMP IF (SFBR != #target#), @(next tcb)
1157*4882a593Smuzhiyun **----------------------------------------------------------------
1158*4882a593Smuzhiyun */
1159*4882a593Smuzhiyun struct link jump_tcb;
1160*4882a593Smuzhiyun
1161*4882a593Smuzhiyun /*----------------------------------------------------------------
1162*4882a593Smuzhiyun ** Load the actual values for the sxfer and the scntl3
1163*4882a593Smuzhiyun ** register (sync/wide mode).
1164*4882a593Smuzhiyun **
1165*4882a593Smuzhiyun ** SCR_COPY (1), @(sval field of this tcb), @(sxfer register)
1166*4882a593Smuzhiyun ** SCR_COPY (1), @(wval field of this tcb), @(scntl3 register)
1167*4882a593Smuzhiyun **----------------------------------------------------------------
1168*4882a593Smuzhiyun */
1169*4882a593Smuzhiyun ncrcmd getscr[6];
1170*4882a593Smuzhiyun
1171*4882a593Smuzhiyun /*----------------------------------------------------------------
1172*4882a593Smuzhiyun ** Get the IDENTIFY message and load the LUN to SFBR.
1173*4882a593Smuzhiyun **
1174*4882a593Smuzhiyun ** CALL, <RESEL_LUN>
1175*4882a593Smuzhiyun **----------------------------------------------------------------
1176*4882a593Smuzhiyun */
1177*4882a593Smuzhiyun struct link call_lun;
1178*4882a593Smuzhiyun
1179*4882a593Smuzhiyun /*----------------------------------------------------------------
1180*4882a593Smuzhiyun ** Now look for the right lun.
1181*4882a593Smuzhiyun **
1182*4882a593Smuzhiyun ** For i = 0 to 3
1183*4882a593Smuzhiyun ** SCR_JUMP ^ IFTRUE(MASK(i, 3)), @(first lcb mod. i)
1184*4882a593Smuzhiyun **
1185*4882a593Smuzhiyun ** Recent chips will prefetch the 4 JUMPS using only 1 burst.
1186*4882a593Smuzhiyun ** It is kind of hashcoding.
1187*4882a593Smuzhiyun **----------------------------------------------------------------
1188*4882a593Smuzhiyun */
1189*4882a593Smuzhiyun struct link jump_lcb[4]; /* JUMPs for reselection */
1190*4882a593Smuzhiyun struct lcb * lp[MAX_LUN]; /* The lcb's of this tcb */
1191*4882a593Smuzhiyun
1192*4882a593Smuzhiyun /*----------------------------------------------------------------
1193*4882a593Smuzhiyun ** Pointer to the ccb used for negotiation.
1194*4882a593Smuzhiyun ** Prevent from starting a negotiation for all queued commands
1195*4882a593Smuzhiyun ** when tagged command queuing is enabled.
1196*4882a593Smuzhiyun **----------------------------------------------------------------
1197*4882a593Smuzhiyun */
1198*4882a593Smuzhiyun struct ccb * nego_cp;
1199*4882a593Smuzhiyun
1200*4882a593Smuzhiyun /*----------------------------------------------------------------
1201*4882a593Smuzhiyun ** statistical data
1202*4882a593Smuzhiyun **----------------------------------------------------------------
1203*4882a593Smuzhiyun */
1204*4882a593Smuzhiyun u_long transfers;
1205*4882a593Smuzhiyun u_long bytes;
1206*4882a593Smuzhiyun
1207*4882a593Smuzhiyun /*----------------------------------------------------------------
1208*4882a593Smuzhiyun ** negotiation of wide and synch transfer and device quirks.
1209*4882a593Smuzhiyun **----------------------------------------------------------------
1210*4882a593Smuzhiyun */
1211*4882a593Smuzhiyun #ifdef SCSI_NCR_BIG_ENDIAN
1212*4882a593Smuzhiyun /*0*/ u16 period;
1213*4882a593Smuzhiyun /*2*/ u_char sval;
1214*4882a593Smuzhiyun /*3*/ u_char minsync;
1215*4882a593Smuzhiyun /*0*/ u_char wval;
1216*4882a593Smuzhiyun /*1*/ u_char widedone;
1217*4882a593Smuzhiyun /*2*/ u_char quirks;
1218*4882a593Smuzhiyun /*3*/ u_char maxoffs;
1219*4882a593Smuzhiyun #else
1220*4882a593Smuzhiyun /*0*/ u_char minsync;
1221*4882a593Smuzhiyun /*1*/ u_char sval;
1222*4882a593Smuzhiyun /*2*/ u16 period;
1223*4882a593Smuzhiyun /*0*/ u_char maxoffs;
1224*4882a593Smuzhiyun /*1*/ u_char quirks;
1225*4882a593Smuzhiyun /*2*/ u_char widedone;
1226*4882a593Smuzhiyun /*3*/ u_char wval;
1227*4882a593Smuzhiyun #endif
1228*4882a593Smuzhiyun
1229*4882a593Smuzhiyun /* User settable limits and options. */
1230*4882a593Smuzhiyun u_char usrsync;
1231*4882a593Smuzhiyun u_char usrwide;
1232*4882a593Smuzhiyun u_char usrtags;
1233*4882a593Smuzhiyun u_char usrflag;
1234*4882a593Smuzhiyun struct scsi_target *starget;
1235*4882a593Smuzhiyun };
1236*4882a593Smuzhiyun
1237*4882a593Smuzhiyun /*========================================================================
1238*4882a593Smuzhiyun **
1239*4882a593Smuzhiyun ** Declaration of structs: lun control block
1240*4882a593Smuzhiyun **
1241*4882a593Smuzhiyun **========================================================================
1242*4882a593Smuzhiyun */
1243*4882a593Smuzhiyun struct lcb {
1244*4882a593Smuzhiyun /*----------------------------------------------------------------
1245*4882a593Smuzhiyun ** During reselection the ncr jumps to this point
1246*4882a593Smuzhiyun ** with SFBR set to the "Identify" message.
1247*4882a593Smuzhiyun ** if it's not this lun, jump to the next.
1248*4882a593Smuzhiyun **
1249*4882a593Smuzhiyun ** JUMP IF (SFBR != #lun#), @(next lcb of this target)
1250*4882a593Smuzhiyun **
1251*4882a593Smuzhiyun ** It is this lun. Load TEMP with the nexus jumps table
1252*4882a593Smuzhiyun ** address and jump to RESEL_TAG (or RESEL_NOTAG).
1253*4882a593Smuzhiyun **
1254*4882a593Smuzhiyun ** SCR_COPY (4), p_jump_ccb, TEMP,
1255*4882a593Smuzhiyun ** SCR_JUMP, <RESEL_TAG>
1256*4882a593Smuzhiyun **----------------------------------------------------------------
1257*4882a593Smuzhiyun */
1258*4882a593Smuzhiyun struct link jump_lcb;
1259*4882a593Smuzhiyun ncrcmd load_jump_ccb[3];
1260*4882a593Smuzhiyun struct link jump_tag;
1261*4882a593Smuzhiyun ncrcmd p_jump_ccb; /* Jump table bus address */
1262*4882a593Smuzhiyun
1263*4882a593Smuzhiyun /*----------------------------------------------------------------
1264*4882a593Smuzhiyun ** Jump table used by the script processor to directly jump
1265*4882a593Smuzhiyun ** to the CCB corresponding to the reselected nexus.
1266*4882a593Smuzhiyun ** Address is allocated on 256 bytes boundary in order to
1267*4882a593Smuzhiyun ** allow 8 bit calculation of the tag jump entry for up to
1268*4882a593Smuzhiyun ** 64 possible tags.
1269*4882a593Smuzhiyun **----------------------------------------------------------------
1270*4882a593Smuzhiyun */
1271*4882a593Smuzhiyun u32 jump_ccb_0; /* Default table if no tags */
1272*4882a593Smuzhiyun u32 *jump_ccb; /* Virtual address */
1273*4882a593Smuzhiyun
1274*4882a593Smuzhiyun /*----------------------------------------------------------------
1275*4882a593Smuzhiyun ** CCB queue management.
1276*4882a593Smuzhiyun **----------------------------------------------------------------
1277*4882a593Smuzhiyun */
1278*4882a593Smuzhiyun struct list_head free_ccbq; /* Queue of available CCBs */
1279*4882a593Smuzhiyun struct list_head busy_ccbq; /* Queue of busy CCBs */
1280*4882a593Smuzhiyun struct list_head wait_ccbq; /* Queue of waiting for IO CCBs */
1281*4882a593Smuzhiyun struct list_head skip_ccbq; /* Queue of skipped CCBs */
1282*4882a593Smuzhiyun u_char actccbs; /* Number of allocated CCBs */
1283*4882a593Smuzhiyun u_char busyccbs; /* CCBs busy for this lun */
1284*4882a593Smuzhiyun u_char queuedccbs; /* CCBs queued to the controller*/
1285*4882a593Smuzhiyun u_char queuedepth; /* Queue depth for this lun */
1286*4882a593Smuzhiyun u_char scdev_depth; /* SCSI device queue depth */
1287*4882a593Smuzhiyun u_char maxnxs; /* Max possible nexuses */
1288*4882a593Smuzhiyun
1289*4882a593Smuzhiyun /*----------------------------------------------------------------
1290*4882a593Smuzhiyun ** Control of tagged command queuing.
1291*4882a593Smuzhiyun ** Tags allocation is performed using a circular buffer.
1292*4882a593Smuzhiyun ** This avoids using a loop for tag allocation.
1293*4882a593Smuzhiyun **----------------------------------------------------------------
1294*4882a593Smuzhiyun */
1295*4882a593Smuzhiyun u_char ia_tag; /* Allocation index */
1296*4882a593Smuzhiyun u_char if_tag; /* Freeing index */
1297*4882a593Smuzhiyun u_char cb_tags[MAX_TAGS]; /* Circular tags buffer */
1298*4882a593Smuzhiyun u_char usetags; /* Command queuing is active */
1299*4882a593Smuzhiyun u_char maxtags; /* Max nr of tags asked by user */
1300*4882a593Smuzhiyun u_char numtags; /* Current number of tags */
1301*4882a593Smuzhiyun
1302*4882a593Smuzhiyun /*----------------------------------------------------------------
1303*4882a593Smuzhiyun ** QUEUE FULL control and ORDERED tag control.
1304*4882a593Smuzhiyun **----------------------------------------------------------------
1305*4882a593Smuzhiyun */
1306*4882a593Smuzhiyun /*----------------------------------------------------------------
1307*4882a593Smuzhiyun ** QUEUE FULL and ORDERED tag control.
1308*4882a593Smuzhiyun **----------------------------------------------------------------
1309*4882a593Smuzhiyun */
1310*4882a593Smuzhiyun u16 num_good; /* Nr of GOOD since QUEUE FULL */
1311*4882a593Smuzhiyun tagmap_t tags_umap; /* Used tags bitmap */
1312*4882a593Smuzhiyun tagmap_t tags_smap; /* Tags in use at 'tag_stime' */
1313*4882a593Smuzhiyun u_long tags_stime; /* Last time we set smap=umap */
1314*4882a593Smuzhiyun struct ccb * held_ccb; /* CCB held for QUEUE FULL */
1315*4882a593Smuzhiyun };
1316*4882a593Smuzhiyun
1317*4882a593Smuzhiyun /*========================================================================
1318*4882a593Smuzhiyun **
1319*4882a593Smuzhiyun ** Declaration of structs: the launch script.
1320*4882a593Smuzhiyun **
1321*4882a593Smuzhiyun **========================================================================
1322*4882a593Smuzhiyun **
1323*4882a593Smuzhiyun ** It is part of the CCB and is called by the scripts processor to
1324*4882a593Smuzhiyun ** start or restart the data structure (nexus).
1325*4882a593Smuzhiyun ** This 6 DWORDs mini script makes use of prefetching.
1326*4882a593Smuzhiyun **
1327*4882a593Smuzhiyun **------------------------------------------------------------------------
1328*4882a593Smuzhiyun */
1329*4882a593Smuzhiyun struct launch {
1330*4882a593Smuzhiyun /*----------------------------------------------------------------
1331*4882a593Smuzhiyun ** SCR_COPY(4), @(p_phys), @(dsa register)
1332*4882a593Smuzhiyun ** SCR_JUMP, @(scheduler_point)
1333*4882a593Smuzhiyun **----------------------------------------------------------------
1334*4882a593Smuzhiyun */
1335*4882a593Smuzhiyun ncrcmd setup_dsa[3]; /* Copy 'phys' address to dsa */
1336*4882a593Smuzhiyun struct link schedule; /* Jump to scheduler point */
1337*4882a593Smuzhiyun ncrcmd p_phys; /* 'phys' header bus address */
1338*4882a593Smuzhiyun };
1339*4882a593Smuzhiyun
1340*4882a593Smuzhiyun /*========================================================================
1341*4882a593Smuzhiyun **
1342*4882a593Smuzhiyun ** Declaration of structs: global HEADER.
1343*4882a593Smuzhiyun **
1344*4882a593Smuzhiyun **========================================================================
1345*4882a593Smuzhiyun **
1346*4882a593Smuzhiyun ** This substructure is copied from the ccb to a global address after
1347*4882a593Smuzhiyun ** selection (or reselection) and copied back before disconnect.
1348*4882a593Smuzhiyun **
1349*4882a593Smuzhiyun ** These fields are accessible to the script processor.
1350*4882a593Smuzhiyun **
1351*4882a593Smuzhiyun **------------------------------------------------------------------------
1352*4882a593Smuzhiyun */
1353*4882a593Smuzhiyun
1354*4882a593Smuzhiyun struct head {
1355*4882a593Smuzhiyun /*----------------------------------------------------------------
1356*4882a593Smuzhiyun ** Saved data pointer.
1357*4882a593Smuzhiyun ** Points to the position in the script responsible for the
1358*4882a593Smuzhiyun ** actual transfer transfer of data.
1359*4882a593Smuzhiyun ** It's written after reception of a SAVE_DATA_POINTER message.
1360*4882a593Smuzhiyun ** The goalpointer points after the last transfer command.
1361*4882a593Smuzhiyun **----------------------------------------------------------------
1362*4882a593Smuzhiyun */
1363*4882a593Smuzhiyun u32 savep;
1364*4882a593Smuzhiyun u32 lastp;
1365*4882a593Smuzhiyun u32 goalp;
1366*4882a593Smuzhiyun
1367*4882a593Smuzhiyun /*----------------------------------------------------------------
1368*4882a593Smuzhiyun ** Alternate data pointer.
1369*4882a593Smuzhiyun ** They are copied back to savep/lastp/goalp by the SCRIPTS
1370*4882a593Smuzhiyun ** when the direction is unknown and the device claims data out.
1371*4882a593Smuzhiyun **----------------------------------------------------------------
1372*4882a593Smuzhiyun */
1373*4882a593Smuzhiyun u32 wlastp;
1374*4882a593Smuzhiyun u32 wgoalp;
1375*4882a593Smuzhiyun
1376*4882a593Smuzhiyun /*----------------------------------------------------------------
1377*4882a593Smuzhiyun ** The virtual address of the ccb containing this header.
1378*4882a593Smuzhiyun **----------------------------------------------------------------
1379*4882a593Smuzhiyun */
1380*4882a593Smuzhiyun struct ccb * cp;
1381*4882a593Smuzhiyun
1382*4882a593Smuzhiyun /*----------------------------------------------------------------
1383*4882a593Smuzhiyun ** Status fields.
1384*4882a593Smuzhiyun **----------------------------------------------------------------
1385*4882a593Smuzhiyun */
1386*4882a593Smuzhiyun u_char scr_st[4]; /* script status */
1387*4882a593Smuzhiyun u_char status[4]; /* host status. must be the */
1388*4882a593Smuzhiyun /* last DWORD of the header. */
1389*4882a593Smuzhiyun };
1390*4882a593Smuzhiyun
1391*4882a593Smuzhiyun /*
1392*4882a593Smuzhiyun ** The status bytes are used by the host and the script processor.
1393*4882a593Smuzhiyun **
1394*4882a593Smuzhiyun ** The byte corresponding to the host_status must be stored in the
1395*4882a593Smuzhiyun ** last DWORD of the CCB header since it is used for command
1396*4882a593Smuzhiyun ** completion (ncr_wakeup()). Doing so, we are sure that the header
1397*4882a593Smuzhiyun ** has been entirely copied back to the CCB when the host_status is
1398*4882a593Smuzhiyun ** seen complete by the CPU.
1399*4882a593Smuzhiyun **
1400*4882a593Smuzhiyun ** The last four bytes (status[4]) are copied to the scratchb register
1401*4882a593Smuzhiyun ** (declared as scr0..scr3 in ncr_reg.h) just after the select/reselect,
1402*4882a593Smuzhiyun ** and copied back just after disconnecting.
1403*4882a593Smuzhiyun ** Inside the script the XX_REG are used.
1404*4882a593Smuzhiyun **
1405*4882a593Smuzhiyun ** The first four bytes (scr_st[4]) are used inside the script by
1406*4882a593Smuzhiyun ** "COPY" commands.
1407*4882a593Smuzhiyun ** Because source and destination must have the same alignment
1408*4882a593Smuzhiyun ** in a DWORD, the fields HAVE to be at the chosen offsets.
1409*4882a593Smuzhiyun ** xerr_st 0 (0x34) scratcha
1410*4882a593Smuzhiyun ** sync_st 1 (0x05) sxfer
1411*4882a593Smuzhiyun ** wide_st 3 (0x03) scntl3
1412*4882a593Smuzhiyun */
1413*4882a593Smuzhiyun
1414*4882a593Smuzhiyun /*
1415*4882a593Smuzhiyun ** Last four bytes (script)
1416*4882a593Smuzhiyun */
1417*4882a593Smuzhiyun #define QU_REG scr0
1418*4882a593Smuzhiyun #define HS_REG scr1
1419*4882a593Smuzhiyun #define HS_PRT nc_scr1
1420*4882a593Smuzhiyun #define SS_REG scr2
1421*4882a593Smuzhiyun #define SS_PRT nc_scr2
1422*4882a593Smuzhiyun #define PS_REG scr3
1423*4882a593Smuzhiyun
1424*4882a593Smuzhiyun /*
1425*4882a593Smuzhiyun ** Last four bytes (host)
1426*4882a593Smuzhiyun */
1427*4882a593Smuzhiyun #ifdef SCSI_NCR_BIG_ENDIAN
1428*4882a593Smuzhiyun #define actualquirks phys.header.status[3]
1429*4882a593Smuzhiyun #define host_status phys.header.status[2]
1430*4882a593Smuzhiyun #define scsi_status phys.header.status[1]
1431*4882a593Smuzhiyun #define parity_status phys.header.status[0]
1432*4882a593Smuzhiyun #else
1433*4882a593Smuzhiyun #define actualquirks phys.header.status[0]
1434*4882a593Smuzhiyun #define host_status phys.header.status[1]
1435*4882a593Smuzhiyun #define scsi_status phys.header.status[2]
1436*4882a593Smuzhiyun #define parity_status phys.header.status[3]
1437*4882a593Smuzhiyun #endif
1438*4882a593Smuzhiyun
1439*4882a593Smuzhiyun /*
1440*4882a593Smuzhiyun ** First four bytes (script)
1441*4882a593Smuzhiyun */
1442*4882a593Smuzhiyun #define xerr_st header.scr_st[0]
1443*4882a593Smuzhiyun #define sync_st header.scr_st[1]
1444*4882a593Smuzhiyun #define nego_st header.scr_st[2]
1445*4882a593Smuzhiyun #define wide_st header.scr_st[3]
1446*4882a593Smuzhiyun
1447*4882a593Smuzhiyun /*
1448*4882a593Smuzhiyun ** First four bytes (host)
1449*4882a593Smuzhiyun */
1450*4882a593Smuzhiyun #define xerr_status phys.xerr_st
1451*4882a593Smuzhiyun #define nego_status phys.nego_st
1452*4882a593Smuzhiyun
1453*4882a593Smuzhiyun #if 0
1454*4882a593Smuzhiyun #define sync_status phys.sync_st
1455*4882a593Smuzhiyun #define wide_status phys.wide_st
1456*4882a593Smuzhiyun #endif
1457*4882a593Smuzhiyun
1458*4882a593Smuzhiyun /*==========================================================
1459*4882a593Smuzhiyun **
1460*4882a593Smuzhiyun ** Declaration of structs: Data structure block
1461*4882a593Smuzhiyun **
1462*4882a593Smuzhiyun **==========================================================
1463*4882a593Smuzhiyun **
1464*4882a593Smuzhiyun ** During execution of a ccb by the script processor,
1465*4882a593Smuzhiyun ** the DSA (data structure address) register points
1466*4882a593Smuzhiyun ** to this substructure of the ccb.
1467*4882a593Smuzhiyun ** This substructure contains the header with
1468*4882a593Smuzhiyun ** the script-processor-changeable data and
1469*4882a593Smuzhiyun ** data blocks for the indirect move commands.
1470*4882a593Smuzhiyun **
1471*4882a593Smuzhiyun **----------------------------------------------------------
1472*4882a593Smuzhiyun */
1473*4882a593Smuzhiyun
1474*4882a593Smuzhiyun struct dsb {
1475*4882a593Smuzhiyun
1476*4882a593Smuzhiyun /*
1477*4882a593Smuzhiyun ** Header.
1478*4882a593Smuzhiyun */
1479*4882a593Smuzhiyun
1480*4882a593Smuzhiyun struct head header;
1481*4882a593Smuzhiyun
1482*4882a593Smuzhiyun /*
1483*4882a593Smuzhiyun ** Table data for Script
1484*4882a593Smuzhiyun */
1485*4882a593Smuzhiyun
1486*4882a593Smuzhiyun struct scr_tblsel select;
1487*4882a593Smuzhiyun struct scr_tblmove smsg ;
1488*4882a593Smuzhiyun struct scr_tblmove cmd ;
1489*4882a593Smuzhiyun struct scr_tblmove sense ;
1490*4882a593Smuzhiyun struct scr_tblmove data[MAX_SCATTER];
1491*4882a593Smuzhiyun };
1492*4882a593Smuzhiyun
1493*4882a593Smuzhiyun
1494*4882a593Smuzhiyun /*========================================================================
1495*4882a593Smuzhiyun **
1496*4882a593Smuzhiyun ** Declaration of structs: Command control block.
1497*4882a593Smuzhiyun **
1498*4882a593Smuzhiyun **========================================================================
1499*4882a593Smuzhiyun */
1500*4882a593Smuzhiyun struct ccb {
1501*4882a593Smuzhiyun /*----------------------------------------------------------------
1502*4882a593Smuzhiyun ** This is the data structure which is pointed by the DSA
1503*4882a593Smuzhiyun ** register when it is executed by the script processor.
1504*4882a593Smuzhiyun ** It must be the first entry because it contains the header
1505*4882a593Smuzhiyun ** as first entry that must be cache line aligned.
1506*4882a593Smuzhiyun **----------------------------------------------------------------
1507*4882a593Smuzhiyun */
1508*4882a593Smuzhiyun struct dsb phys;
1509*4882a593Smuzhiyun
1510*4882a593Smuzhiyun /*----------------------------------------------------------------
1511*4882a593Smuzhiyun ** Mini-script used at CCB execution start-up.
1512*4882a593Smuzhiyun ** Load the DSA with the data structure address (phys) and
1513*4882a593Smuzhiyun ** jump to SELECT. Jump to CANCEL if CCB is to be canceled.
1514*4882a593Smuzhiyun **----------------------------------------------------------------
1515*4882a593Smuzhiyun */
1516*4882a593Smuzhiyun struct launch start;
1517*4882a593Smuzhiyun
1518*4882a593Smuzhiyun /*----------------------------------------------------------------
1519*4882a593Smuzhiyun ** Mini-script used at CCB relection to restart the nexus.
1520*4882a593Smuzhiyun ** Load the DSA with the data structure address (phys) and
1521*4882a593Smuzhiyun ** jump to RESEL_DSA. Jump to ABORT if CCB is to be aborted.
1522*4882a593Smuzhiyun **----------------------------------------------------------------
1523*4882a593Smuzhiyun */
1524*4882a593Smuzhiyun struct launch restart;
1525*4882a593Smuzhiyun
1526*4882a593Smuzhiyun /*----------------------------------------------------------------
1527*4882a593Smuzhiyun ** If a data transfer phase is terminated too early
1528*4882a593Smuzhiyun ** (after reception of a message (i.e. DISCONNECT)),
1529*4882a593Smuzhiyun ** we have to prepare a mini script to transfer
1530*4882a593Smuzhiyun ** the rest of the data.
1531*4882a593Smuzhiyun **----------------------------------------------------------------
1532*4882a593Smuzhiyun */
1533*4882a593Smuzhiyun ncrcmd patch[8];
1534*4882a593Smuzhiyun
1535*4882a593Smuzhiyun /*----------------------------------------------------------------
1536*4882a593Smuzhiyun ** The general SCSI driver provides a
1537*4882a593Smuzhiyun ** pointer to a control block.
1538*4882a593Smuzhiyun **----------------------------------------------------------------
1539*4882a593Smuzhiyun */
1540*4882a593Smuzhiyun struct scsi_cmnd *cmd; /* SCSI command */
1541*4882a593Smuzhiyun u_char cdb_buf[16]; /* Copy of CDB */
1542*4882a593Smuzhiyun u_char sense_buf[64];
1543*4882a593Smuzhiyun int data_len; /* Total data length */
1544*4882a593Smuzhiyun
1545*4882a593Smuzhiyun /*----------------------------------------------------------------
1546*4882a593Smuzhiyun ** Message areas.
1547*4882a593Smuzhiyun ** We prepare a message to be sent after selection.
1548*4882a593Smuzhiyun ** We may use a second one if the command is rescheduled
1549*4882a593Smuzhiyun ** due to GETCC or QFULL.
1550*4882a593Smuzhiyun ** Contents are IDENTIFY and SIMPLE_TAG.
1551*4882a593Smuzhiyun ** While negotiating sync or wide transfer,
1552*4882a593Smuzhiyun ** a SDTR or WDTR message is appended.
1553*4882a593Smuzhiyun **----------------------------------------------------------------
1554*4882a593Smuzhiyun */
1555*4882a593Smuzhiyun u_char scsi_smsg [8];
1556*4882a593Smuzhiyun u_char scsi_smsg2[8];
1557*4882a593Smuzhiyun
1558*4882a593Smuzhiyun /*----------------------------------------------------------------
1559*4882a593Smuzhiyun ** Other fields.
1560*4882a593Smuzhiyun **----------------------------------------------------------------
1561*4882a593Smuzhiyun */
1562*4882a593Smuzhiyun u_long p_ccb; /* BUS address of this CCB */
1563*4882a593Smuzhiyun u_char sensecmd[6]; /* Sense command */
1564*4882a593Smuzhiyun u_char tag; /* Tag for this transfer */
1565*4882a593Smuzhiyun /* 255 means no tag */
1566*4882a593Smuzhiyun u_char target;
1567*4882a593Smuzhiyun u_char lun;
1568*4882a593Smuzhiyun u_char queued;
1569*4882a593Smuzhiyun u_char auto_sense;
1570*4882a593Smuzhiyun struct ccb * link_ccb; /* Host adapter CCB chain */
1571*4882a593Smuzhiyun struct list_head link_ccbq; /* Link to unit CCB queue */
1572*4882a593Smuzhiyun u32 startp; /* Initial data pointer */
1573*4882a593Smuzhiyun u_long magic; /* Free / busy CCB flag */
1574*4882a593Smuzhiyun };
1575*4882a593Smuzhiyun
1576*4882a593Smuzhiyun #define CCB_PHYS(cp,lbl) (cp->p_ccb + offsetof(struct ccb, lbl))
1577*4882a593Smuzhiyun
1578*4882a593Smuzhiyun
1579*4882a593Smuzhiyun /*========================================================================
1580*4882a593Smuzhiyun **
1581*4882a593Smuzhiyun ** Declaration of structs: NCR device descriptor
1582*4882a593Smuzhiyun **
1583*4882a593Smuzhiyun **========================================================================
1584*4882a593Smuzhiyun */
1585*4882a593Smuzhiyun struct ncb {
1586*4882a593Smuzhiyun /*----------------------------------------------------------------
1587*4882a593Smuzhiyun ** The global header.
1588*4882a593Smuzhiyun ** It is accessible to both the host and the script processor.
1589*4882a593Smuzhiyun ** Must be cache line size aligned (32 for x86) in order to
1590*4882a593Smuzhiyun ** allow cache line bursting when it is copied to/from CCB.
1591*4882a593Smuzhiyun **----------------------------------------------------------------
1592*4882a593Smuzhiyun */
1593*4882a593Smuzhiyun struct head header;
1594*4882a593Smuzhiyun
1595*4882a593Smuzhiyun /*----------------------------------------------------------------
1596*4882a593Smuzhiyun ** CCBs management queues.
1597*4882a593Smuzhiyun **----------------------------------------------------------------
1598*4882a593Smuzhiyun */
1599*4882a593Smuzhiyun struct scsi_cmnd *waiting_list; /* Commands waiting for a CCB */
1600*4882a593Smuzhiyun /* when lcb is not allocated. */
1601*4882a593Smuzhiyun struct scsi_cmnd *done_list; /* Commands waiting for done() */
1602*4882a593Smuzhiyun /* callback to be invoked. */
1603*4882a593Smuzhiyun spinlock_t smp_lock; /* Lock for SMP threading */
1604*4882a593Smuzhiyun
1605*4882a593Smuzhiyun /*----------------------------------------------------------------
1606*4882a593Smuzhiyun ** Chip and controller identification.
1607*4882a593Smuzhiyun **----------------------------------------------------------------
1608*4882a593Smuzhiyun */
1609*4882a593Smuzhiyun int unit; /* Unit number */
1610*4882a593Smuzhiyun char inst_name[16]; /* ncb instance name */
1611*4882a593Smuzhiyun
1612*4882a593Smuzhiyun /*----------------------------------------------------------------
1613*4882a593Smuzhiyun ** Initial value of some IO register bits.
1614*4882a593Smuzhiyun ** These values are assumed to have been set by BIOS, and may
1615*4882a593Smuzhiyun ** be used for probing adapter implementation differences.
1616*4882a593Smuzhiyun **----------------------------------------------------------------
1617*4882a593Smuzhiyun */
1618*4882a593Smuzhiyun u_char sv_scntl0, sv_scntl3, sv_dmode, sv_dcntl, sv_ctest0, sv_ctest3,
1619*4882a593Smuzhiyun sv_ctest4, sv_ctest5, sv_gpcntl, sv_stest2, sv_stest4;
1620*4882a593Smuzhiyun
1621*4882a593Smuzhiyun /*----------------------------------------------------------------
1622*4882a593Smuzhiyun ** Actual initial value of IO register bits used by the
1623*4882a593Smuzhiyun ** driver. They are loaded at initialisation according to
1624*4882a593Smuzhiyun ** features that are to be enabled.
1625*4882a593Smuzhiyun **----------------------------------------------------------------
1626*4882a593Smuzhiyun */
1627*4882a593Smuzhiyun u_char rv_scntl0, rv_scntl3, rv_dmode, rv_dcntl, rv_ctest0, rv_ctest3,
1628*4882a593Smuzhiyun rv_ctest4, rv_ctest5, rv_stest2;
1629*4882a593Smuzhiyun
1630*4882a593Smuzhiyun /*----------------------------------------------------------------
1631*4882a593Smuzhiyun ** Targets management.
1632*4882a593Smuzhiyun ** During reselection the ncr jumps to jump_tcb.
1633*4882a593Smuzhiyun ** The SFBR register is loaded with the encoded target id.
1634*4882a593Smuzhiyun ** For i = 0 to 3
1635*4882a593Smuzhiyun ** SCR_JUMP ^ IFTRUE(MASK(i, 3)), @(next tcb mod. i)
1636*4882a593Smuzhiyun **
1637*4882a593Smuzhiyun ** Recent chips will prefetch the 4 JUMPS using only 1 burst.
1638*4882a593Smuzhiyun ** It is kind of hashcoding.
1639*4882a593Smuzhiyun **----------------------------------------------------------------
1640*4882a593Smuzhiyun */
1641*4882a593Smuzhiyun struct link jump_tcb[4]; /* JUMPs for reselection */
1642*4882a593Smuzhiyun struct tcb target[MAX_TARGET]; /* Target data */
1643*4882a593Smuzhiyun
1644*4882a593Smuzhiyun /*----------------------------------------------------------------
1645*4882a593Smuzhiyun ** Virtual and physical bus addresses of the chip.
1646*4882a593Smuzhiyun **----------------------------------------------------------------
1647*4882a593Smuzhiyun */
1648*4882a593Smuzhiyun void __iomem *vaddr; /* Virtual and bus address of */
1649*4882a593Smuzhiyun unsigned long paddr; /* chip's IO registers. */
1650*4882a593Smuzhiyun unsigned long paddr2; /* On-chip RAM bus address. */
1651*4882a593Smuzhiyun volatile /* Pointer to volatile for */
1652*4882a593Smuzhiyun struct ncr_reg __iomem *reg; /* memory mapped IO. */
1653*4882a593Smuzhiyun
1654*4882a593Smuzhiyun /*----------------------------------------------------------------
1655*4882a593Smuzhiyun ** SCRIPTS virtual and physical bus addresses.
1656*4882a593Smuzhiyun ** 'script' is loaded in the on-chip RAM if present.
1657*4882a593Smuzhiyun ** 'scripth' stays in main memory.
1658*4882a593Smuzhiyun **----------------------------------------------------------------
1659*4882a593Smuzhiyun */
1660*4882a593Smuzhiyun struct script *script0; /* Copies of script and scripth */
1661*4882a593Smuzhiyun struct scripth *scripth0; /* relocated for this ncb. */
1662*4882a593Smuzhiyun struct scripth *scripth; /* Actual scripth virt. address */
1663*4882a593Smuzhiyun u_long p_script; /* Actual script and scripth */
1664*4882a593Smuzhiyun u_long p_scripth; /* bus addresses. */
1665*4882a593Smuzhiyun
1666*4882a593Smuzhiyun /*----------------------------------------------------------------
1667*4882a593Smuzhiyun ** General controller parameters and configuration.
1668*4882a593Smuzhiyun **----------------------------------------------------------------
1669*4882a593Smuzhiyun */
1670*4882a593Smuzhiyun struct device *dev;
1671*4882a593Smuzhiyun u_char revision_id; /* PCI device revision id */
1672*4882a593Smuzhiyun u32 irq; /* IRQ level */
1673*4882a593Smuzhiyun u32 features; /* Chip features map */
1674*4882a593Smuzhiyun u_char myaddr; /* SCSI id of the adapter */
1675*4882a593Smuzhiyun u_char maxburst; /* log base 2 of dwords burst */
1676*4882a593Smuzhiyun u_char maxwide; /* Maximum transfer width */
1677*4882a593Smuzhiyun u_char minsync; /* Minimum sync period factor */
1678*4882a593Smuzhiyun u_char maxsync; /* Maximum sync period factor */
1679*4882a593Smuzhiyun u_char maxoffs; /* Max scsi offset */
1680*4882a593Smuzhiyun u_char multiplier; /* Clock multiplier (1,2,4) */
1681*4882a593Smuzhiyun u_char clock_divn; /* Number of clock divisors */
1682*4882a593Smuzhiyun u_long clock_khz; /* SCSI clock frequency in KHz */
1683*4882a593Smuzhiyun
1684*4882a593Smuzhiyun /*----------------------------------------------------------------
1685*4882a593Smuzhiyun ** Start queue management.
1686*4882a593Smuzhiyun ** It is filled up by the host processor and accessed by the
1687*4882a593Smuzhiyun ** SCRIPTS processor in order to start SCSI commands.
1688*4882a593Smuzhiyun **----------------------------------------------------------------
1689*4882a593Smuzhiyun */
1690*4882a593Smuzhiyun u16 squeueput; /* Next free slot of the queue */
1691*4882a593Smuzhiyun u16 actccbs; /* Number of allocated CCBs */
1692*4882a593Smuzhiyun u16 queuedccbs; /* Number of CCBs in start queue*/
1693*4882a593Smuzhiyun u16 queuedepth; /* Start queue depth */
1694*4882a593Smuzhiyun
1695*4882a593Smuzhiyun /*----------------------------------------------------------------
1696*4882a593Smuzhiyun ** Timeout handler.
1697*4882a593Smuzhiyun **----------------------------------------------------------------
1698*4882a593Smuzhiyun */
1699*4882a593Smuzhiyun struct timer_list timer; /* Timer handler link header */
1700*4882a593Smuzhiyun u_long lasttime;
1701*4882a593Smuzhiyun u_long settle_time; /* Resetting the SCSI BUS */
1702*4882a593Smuzhiyun
1703*4882a593Smuzhiyun /*----------------------------------------------------------------
1704*4882a593Smuzhiyun ** Debugging and profiling.
1705*4882a593Smuzhiyun **----------------------------------------------------------------
1706*4882a593Smuzhiyun */
1707*4882a593Smuzhiyun struct ncr_reg regdump; /* Register dump */
1708*4882a593Smuzhiyun u_long regtime; /* Time it has been done */
1709*4882a593Smuzhiyun
1710*4882a593Smuzhiyun /*----------------------------------------------------------------
1711*4882a593Smuzhiyun ** Miscellaneous buffers accessed by the scripts-processor.
1712*4882a593Smuzhiyun ** They shall be DWORD aligned, because they may be read or
1713*4882a593Smuzhiyun ** written with a SCR_COPY script command.
1714*4882a593Smuzhiyun **----------------------------------------------------------------
1715*4882a593Smuzhiyun */
1716*4882a593Smuzhiyun u_char msgout[8]; /* Buffer for MESSAGE OUT */
1717*4882a593Smuzhiyun u_char msgin [8]; /* Buffer for MESSAGE IN */
1718*4882a593Smuzhiyun u32 lastmsg; /* Last SCSI message sent */
1719*4882a593Smuzhiyun u_char scratch; /* Scratch for SCSI receive */
1720*4882a593Smuzhiyun
1721*4882a593Smuzhiyun /*----------------------------------------------------------------
1722*4882a593Smuzhiyun ** Miscellaneous configuration and status parameters.
1723*4882a593Smuzhiyun **----------------------------------------------------------------
1724*4882a593Smuzhiyun */
1725*4882a593Smuzhiyun u_char disc; /* Disconnection allowed */
1726*4882a593Smuzhiyun u_char scsi_mode; /* Current SCSI BUS mode */
1727*4882a593Smuzhiyun u_char order; /* Tag order to use */
1728*4882a593Smuzhiyun u_char verbose; /* Verbosity for this controller*/
1729*4882a593Smuzhiyun int ncr_cache; /* Used for cache test at init. */
1730*4882a593Smuzhiyun u_long p_ncb; /* BUS address of this NCB */
1731*4882a593Smuzhiyun
1732*4882a593Smuzhiyun /*----------------------------------------------------------------
1733*4882a593Smuzhiyun ** Command completion handling.
1734*4882a593Smuzhiyun **----------------------------------------------------------------
1735*4882a593Smuzhiyun */
1736*4882a593Smuzhiyun #ifdef SCSI_NCR_CCB_DONE_SUPPORT
1737*4882a593Smuzhiyun struct ccb *(ccb_done[MAX_DONE]);
1738*4882a593Smuzhiyun int ccb_done_ic;
1739*4882a593Smuzhiyun #endif
1740*4882a593Smuzhiyun /*----------------------------------------------------------------
1741*4882a593Smuzhiyun ** Fields that should be removed or changed.
1742*4882a593Smuzhiyun **----------------------------------------------------------------
1743*4882a593Smuzhiyun */
1744*4882a593Smuzhiyun struct ccb *ccb; /* Global CCB */
1745*4882a593Smuzhiyun struct usrcmd user; /* Command from user */
1746*4882a593Smuzhiyun volatile u_char release_stage; /* Synchronisation stage on release */
1747*4882a593Smuzhiyun };
1748*4882a593Smuzhiyun
1749*4882a593Smuzhiyun #define NCB_SCRIPT_PHYS(np,lbl) (np->p_script + offsetof (struct script, lbl))
1750*4882a593Smuzhiyun #define NCB_SCRIPTH_PHYS(np,lbl) (np->p_scripth + offsetof (struct scripth,lbl))
1751*4882a593Smuzhiyun
1752*4882a593Smuzhiyun /*==========================================================
1753*4882a593Smuzhiyun **
1754*4882a593Smuzhiyun **
1755*4882a593Smuzhiyun ** Script for NCR-Processor.
1756*4882a593Smuzhiyun **
1757*4882a593Smuzhiyun ** Use ncr_script_fill() to create the variable parts.
1758*4882a593Smuzhiyun ** Use ncr_script_copy_and_bind() to make a copy and
1759*4882a593Smuzhiyun ** bind to physical addresses.
1760*4882a593Smuzhiyun **
1761*4882a593Smuzhiyun **
1762*4882a593Smuzhiyun **==========================================================
1763*4882a593Smuzhiyun **
1764*4882a593Smuzhiyun ** We have to know the offsets of all labels before
1765*4882a593Smuzhiyun ** we reach them (for forward jumps).
1766*4882a593Smuzhiyun ** Therefore we declare a struct here.
1767*4882a593Smuzhiyun ** If you make changes inside the script,
1768*4882a593Smuzhiyun ** DONT FORGET TO CHANGE THE LENGTHS HERE!
1769*4882a593Smuzhiyun **
1770*4882a593Smuzhiyun **----------------------------------------------------------
1771*4882a593Smuzhiyun */
1772*4882a593Smuzhiyun
1773*4882a593Smuzhiyun /*
1774*4882a593Smuzhiyun ** For HP Zalon/53c720 systems, the Zalon interface
1775*4882a593Smuzhiyun ** between CPU and 53c720 does prefetches, which causes
1776*4882a593Smuzhiyun ** problems with self modifying scripts. The problem
1777*4882a593Smuzhiyun ** is overcome by calling a dummy subroutine after each
1778*4882a593Smuzhiyun ** modification, to force a refetch of the script on
1779*4882a593Smuzhiyun ** return from the subroutine.
1780*4882a593Smuzhiyun */
1781*4882a593Smuzhiyun
1782*4882a593Smuzhiyun #ifdef CONFIG_NCR53C8XX_PREFETCH
1783*4882a593Smuzhiyun #define PREFETCH_FLUSH_CNT 2
1784*4882a593Smuzhiyun #define PREFETCH_FLUSH SCR_CALL, PADDRH (wait_dma),
1785*4882a593Smuzhiyun #else
1786*4882a593Smuzhiyun #define PREFETCH_FLUSH_CNT 0
1787*4882a593Smuzhiyun #define PREFETCH_FLUSH
1788*4882a593Smuzhiyun #endif
1789*4882a593Smuzhiyun
1790*4882a593Smuzhiyun /*
1791*4882a593Smuzhiyun ** Script fragments which are loaded into the on-chip RAM
1792*4882a593Smuzhiyun ** of 825A, 875 and 895 chips.
1793*4882a593Smuzhiyun */
1794*4882a593Smuzhiyun struct script {
1795*4882a593Smuzhiyun ncrcmd start [ 5];
1796*4882a593Smuzhiyun ncrcmd startpos [ 1];
1797*4882a593Smuzhiyun ncrcmd select [ 6];
1798*4882a593Smuzhiyun ncrcmd select2 [ 9 + PREFETCH_FLUSH_CNT];
1799*4882a593Smuzhiyun ncrcmd loadpos [ 4];
1800*4882a593Smuzhiyun ncrcmd send_ident [ 9];
1801*4882a593Smuzhiyun ncrcmd prepare [ 6];
1802*4882a593Smuzhiyun ncrcmd prepare2 [ 7];
1803*4882a593Smuzhiyun ncrcmd command [ 6];
1804*4882a593Smuzhiyun ncrcmd dispatch [ 32];
1805*4882a593Smuzhiyun ncrcmd clrack [ 4];
1806*4882a593Smuzhiyun ncrcmd no_data [ 17];
1807*4882a593Smuzhiyun ncrcmd status [ 8];
1808*4882a593Smuzhiyun ncrcmd msg_in [ 2];
1809*4882a593Smuzhiyun ncrcmd msg_in2 [ 16];
1810*4882a593Smuzhiyun ncrcmd msg_bad [ 4];
1811*4882a593Smuzhiyun ncrcmd setmsg [ 7];
1812*4882a593Smuzhiyun ncrcmd cleanup [ 6];
1813*4882a593Smuzhiyun ncrcmd complete [ 9];
1814*4882a593Smuzhiyun ncrcmd cleanup_ok [ 8 + PREFETCH_FLUSH_CNT];
1815*4882a593Smuzhiyun ncrcmd cleanup0 [ 1];
1816*4882a593Smuzhiyun #ifndef SCSI_NCR_CCB_DONE_SUPPORT
1817*4882a593Smuzhiyun ncrcmd signal [ 12];
1818*4882a593Smuzhiyun #else
1819*4882a593Smuzhiyun ncrcmd signal [ 9];
1820*4882a593Smuzhiyun ncrcmd done_pos [ 1];
1821*4882a593Smuzhiyun ncrcmd done_plug [ 2];
1822*4882a593Smuzhiyun ncrcmd done_end [ 7];
1823*4882a593Smuzhiyun #endif
1824*4882a593Smuzhiyun ncrcmd save_dp [ 7];
1825*4882a593Smuzhiyun ncrcmd restore_dp [ 5];
1826*4882a593Smuzhiyun ncrcmd disconnect [ 10];
1827*4882a593Smuzhiyun ncrcmd msg_out [ 9];
1828*4882a593Smuzhiyun ncrcmd msg_out_done [ 7];
1829*4882a593Smuzhiyun ncrcmd idle [ 2];
1830*4882a593Smuzhiyun ncrcmd reselect [ 8];
1831*4882a593Smuzhiyun ncrcmd reselected [ 8];
1832*4882a593Smuzhiyun ncrcmd resel_dsa [ 6 + PREFETCH_FLUSH_CNT];
1833*4882a593Smuzhiyun ncrcmd loadpos1 [ 4];
1834*4882a593Smuzhiyun ncrcmd resel_lun [ 6];
1835*4882a593Smuzhiyun ncrcmd resel_tag [ 6];
1836*4882a593Smuzhiyun ncrcmd jump_to_nexus [ 4 + PREFETCH_FLUSH_CNT];
1837*4882a593Smuzhiyun ncrcmd nexus_indirect [ 4];
1838*4882a593Smuzhiyun ncrcmd resel_notag [ 4];
1839*4882a593Smuzhiyun ncrcmd data_in [MAX_SCATTERL * 4];
1840*4882a593Smuzhiyun ncrcmd data_in2 [ 4];
1841*4882a593Smuzhiyun ncrcmd data_out [MAX_SCATTERL * 4];
1842*4882a593Smuzhiyun ncrcmd data_out2 [ 4];
1843*4882a593Smuzhiyun };
1844*4882a593Smuzhiyun
1845*4882a593Smuzhiyun /*
1846*4882a593Smuzhiyun ** Script fragments which stay in main memory for all chips.
1847*4882a593Smuzhiyun */
1848*4882a593Smuzhiyun struct scripth {
1849*4882a593Smuzhiyun ncrcmd tryloop [MAX_START*2];
1850*4882a593Smuzhiyun ncrcmd tryloop2 [ 2];
1851*4882a593Smuzhiyun #ifdef SCSI_NCR_CCB_DONE_SUPPORT
1852*4882a593Smuzhiyun ncrcmd done_queue [MAX_DONE*5];
1853*4882a593Smuzhiyun ncrcmd done_queue2 [ 2];
1854*4882a593Smuzhiyun #endif
1855*4882a593Smuzhiyun ncrcmd select_no_atn [ 8];
1856*4882a593Smuzhiyun ncrcmd cancel [ 4];
1857*4882a593Smuzhiyun ncrcmd skip [ 9 + PREFETCH_FLUSH_CNT];
1858*4882a593Smuzhiyun ncrcmd skip2 [ 19];
1859*4882a593Smuzhiyun ncrcmd par_err_data_in [ 6];
1860*4882a593Smuzhiyun ncrcmd par_err_other [ 4];
1861*4882a593Smuzhiyun ncrcmd msg_reject [ 8];
1862*4882a593Smuzhiyun ncrcmd msg_ign_residue [ 24];
1863*4882a593Smuzhiyun ncrcmd msg_extended [ 10];
1864*4882a593Smuzhiyun ncrcmd msg_ext_2 [ 10];
1865*4882a593Smuzhiyun ncrcmd msg_wdtr [ 14];
1866*4882a593Smuzhiyun ncrcmd send_wdtr [ 7];
1867*4882a593Smuzhiyun ncrcmd msg_ext_3 [ 10];
1868*4882a593Smuzhiyun ncrcmd msg_sdtr [ 14];
1869*4882a593Smuzhiyun ncrcmd send_sdtr [ 7];
1870*4882a593Smuzhiyun ncrcmd nego_bad_phase [ 4];
1871*4882a593Smuzhiyun ncrcmd msg_out_abort [ 10];
1872*4882a593Smuzhiyun ncrcmd hdata_in [MAX_SCATTERH * 4];
1873*4882a593Smuzhiyun ncrcmd hdata_in2 [ 2];
1874*4882a593Smuzhiyun ncrcmd hdata_out [MAX_SCATTERH * 4];
1875*4882a593Smuzhiyun ncrcmd hdata_out2 [ 2];
1876*4882a593Smuzhiyun ncrcmd reset [ 4];
1877*4882a593Smuzhiyun ncrcmd aborttag [ 4];
1878*4882a593Smuzhiyun ncrcmd abort [ 2];
1879*4882a593Smuzhiyun ncrcmd abort_resel [ 20];
1880*4882a593Smuzhiyun ncrcmd resend_ident [ 4];
1881*4882a593Smuzhiyun ncrcmd clratn_go_on [ 3];
1882*4882a593Smuzhiyun ncrcmd nxtdsp_go_on [ 1];
1883*4882a593Smuzhiyun ncrcmd sdata_in [ 8];
1884*4882a593Smuzhiyun ncrcmd data_io [ 18];
1885*4882a593Smuzhiyun ncrcmd bad_identify [ 12];
1886*4882a593Smuzhiyun ncrcmd bad_i_t_l [ 4];
1887*4882a593Smuzhiyun ncrcmd bad_i_t_l_q [ 4];
1888*4882a593Smuzhiyun ncrcmd bad_target [ 8];
1889*4882a593Smuzhiyun ncrcmd bad_status [ 8];
1890*4882a593Smuzhiyun ncrcmd start_ram [ 4 + PREFETCH_FLUSH_CNT];
1891*4882a593Smuzhiyun ncrcmd start_ram0 [ 4];
1892*4882a593Smuzhiyun ncrcmd sto_restart [ 5];
1893*4882a593Smuzhiyun ncrcmd wait_dma [ 2];
1894*4882a593Smuzhiyun ncrcmd snooptest [ 9];
1895*4882a593Smuzhiyun ncrcmd snoopend [ 2];
1896*4882a593Smuzhiyun };
1897*4882a593Smuzhiyun
1898*4882a593Smuzhiyun /*==========================================================
1899*4882a593Smuzhiyun **
1900*4882a593Smuzhiyun **
1901*4882a593Smuzhiyun ** Function headers.
1902*4882a593Smuzhiyun **
1903*4882a593Smuzhiyun **
1904*4882a593Smuzhiyun **==========================================================
1905*4882a593Smuzhiyun */
1906*4882a593Smuzhiyun
1907*4882a593Smuzhiyun static void ncr_alloc_ccb (struct ncb *np, u_char tn, u_char ln);
1908*4882a593Smuzhiyun static void ncr_complete (struct ncb *np, struct ccb *cp);
1909*4882a593Smuzhiyun static void ncr_exception (struct ncb *np);
1910*4882a593Smuzhiyun static void ncr_free_ccb (struct ncb *np, struct ccb *cp);
1911*4882a593Smuzhiyun static void ncr_init_ccb (struct ncb *np, struct ccb *cp);
1912*4882a593Smuzhiyun static void ncr_init_tcb (struct ncb *np, u_char tn);
1913*4882a593Smuzhiyun static struct lcb * ncr_alloc_lcb (struct ncb *np, u_char tn, u_char ln);
1914*4882a593Smuzhiyun static struct lcb * ncr_setup_lcb (struct ncb *np, struct scsi_device *sdev);
1915*4882a593Smuzhiyun static void ncr_getclock (struct ncb *np, int mult);
1916*4882a593Smuzhiyun static void ncr_selectclock (struct ncb *np, u_char scntl3);
1917*4882a593Smuzhiyun static struct ccb *ncr_get_ccb (struct ncb *np, struct scsi_cmnd *cmd);
1918*4882a593Smuzhiyun static void ncr_chip_reset (struct ncb *np, int delay);
1919*4882a593Smuzhiyun static void ncr_init (struct ncb *np, int reset, char * msg, u_long code);
1920*4882a593Smuzhiyun static int ncr_int_sbmc (struct ncb *np);
1921*4882a593Smuzhiyun static int ncr_int_par (struct ncb *np);
1922*4882a593Smuzhiyun static void ncr_int_ma (struct ncb *np);
1923*4882a593Smuzhiyun static void ncr_int_sir (struct ncb *np);
1924*4882a593Smuzhiyun static void ncr_int_sto (struct ncb *np);
1925*4882a593Smuzhiyun static void ncr_negotiate (struct ncb* np, struct tcb* tp);
1926*4882a593Smuzhiyun static int ncr_prepare_nego(struct ncb *np, struct ccb *cp, u_char *msgptr);
1927*4882a593Smuzhiyun
1928*4882a593Smuzhiyun static void ncr_script_copy_and_bind
1929*4882a593Smuzhiyun (struct ncb *np, ncrcmd *src, ncrcmd *dst, int len);
1930*4882a593Smuzhiyun static void ncr_script_fill (struct script * scr, struct scripth * scripth);
1931*4882a593Smuzhiyun static int ncr_scatter (struct ncb *np, struct ccb *cp, struct scsi_cmnd *cmd);
1932*4882a593Smuzhiyun static void ncr_getsync (struct ncb *np, u_char sfac, u_char *fakp, u_char *scntl3p);
1933*4882a593Smuzhiyun static void ncr_setsync (struct ncb *np, struct ccb *cp, u_char scntl3, u_char sxfer);
1934*4882a593Smuzhiyun static void ncr_setup_tags (struct ncb *np, struct scsi_device *sdev);
1935*4882a593Smuzhiyun static void ncr_setwide (struct ncb *np, struct ccb *cp, u_char wide, u_char ack);
1936*4882a593Smuzhiyun static int ncr_snooptest (struct ncb *np);
1937*4882a593Smuzhiyun static void ncr_timeout (struct ncb *np);
1938*4882a593Smuzhiyun static void ncr_wakeup (struct ncb *np, u_long code);
1939*4882a593Smuzhiyun static void ncr_wakeup_done (struct ncb *np);
1940*4882a593Smuzhiyun static void ncr_start_next_ccb (struct ncb *np, struct lcb * lp, int maxn);
1941*4882a593Smuzhiyun static void ncr_put_start_queue(struct ncb *np, struct ccb *cp);
1942*4882a593Smuzhiyun
1943*4882a593Smuzhiyun static void insert_into_waiting_list(struct ncb *np, struct scsi_cmnd *cmd);
1944*4882a593Smuzhiyun static struct scsi_cmnd *retrieve_from_waiting_list(int to_remove, struct ncb *np, struct scsi_cmnd *cmd);
1945*4882a593Smuzhiyun static void process_waiting_list(struct ncb *np, int sts);
1946*4882a593Smuzhiyun
1947*4882a593Smuzhiyun #define remove_from_waiting_list(np, cmd) \
1948*4882a593Smuzhiyun retrieve_from_waiting_list(1, (np), (cmd))
1949*4882a593Smuzhiyun #define requeue_waiting_list(np) process_waiting_list((np), DID_OK)
1950*4882a593Smuzhiyun #define reset_waiting_list(np) process_waiting_list((np), DID_RESET)
1951*4882a593Smuzhiyun
ncr_name(struct ncb * np)1952*4882a593Smuzhiyun static inline char *ncr_name (struct ncb *np)
1953*4882a593Smuzhiyun {
1954*4882a593Smuzhiyun return np->inst_name;
1955*4882a593Smuzhiyun }
1956*4882a593Smuzhiyun
1957*4882a593Smuzhiyun
1958*4882a593Smuzhiyun /*==========================================================
1959*4882a593Smuzhiyun **
1960*4882a593Smuzhiyun **
1961*4882a593Smuzhiyun ** Scripts for NCR-Processor.
1962*4882a593Smuzhiyun **
1963*4882a593Smuzhiyun ** Use ncr_script_bind for binding to physical addresses.
1964*4882a593Smuzhiyun **
1965*4882a593Smuzhiyun **
1966*4882a593Smuzhiyun **==========================================================
1967*4882a593Smuzhiyun **
1968*4882a593Smuzhiyun ** NADDR generates a reference to a field of the controller data.
1969*4882a593Smuzhiyun ** PADDR generates a reference to another part of the script.
1970*4882a593Smuzhiyun ** RADDR generates a reference to a script processor register.
1971*4882a593Smuzhiyun ** FADDR generates a reference to a script processor register
1972*4882a593Smuzhiyun ** with offset.
1973*4882a593Smuzhiyun **
1974*4882a593Smuzhiyun **----------------------------------------------------------
1975*4882a593Smuzhiyun */
1976*4882a593Smuzhiyun
1977*4882a593Smuzhiyun #define RELOC_SOFTC 0x40000000
1978*4882a593Smuzhiyun #define RELOC_LABEL 0x50000000
1979*4882a593Smuzhiyun #define RELOC_REGISTER 0x60000000
1980*4882a593Smuzhiyun #if 0
1981*4882a593Smuzhiyun #define RELOC_KVAR 0x70000000
1982*4882a593Smuzhiyun #endif
1983*4882a593Smuzhiyun #define RELOC_LABELH 0x80000000
1984*4882a593Smuzhiyun #define RELOC_MASK 0xf0000000
1985*4882a593Smuzhiyun
1986*4882a593Smuzhiyun #define NADDR(label) (RELOC_SOFTC | offsetof(struct ncb, label))
1987*4882a593Smuzhiyun #define PADDR(label) (RELOC_LABEL | offsetof(struct script, label))
1988*4882a593Smuzhiyun #define PADDRH(label) (RELOC_LABELH | offsetof(struct scripth, label))
1989*4882a593Smuzhiyun #define RADDR(label) (RELOC_REGISTER | REG(label))
1990*4882a593Smuzhiyun #define FADDR(label,ofs)(RELOC_REGISTER | ((REG(label))+(ofs)))
1991*4882a593Smuzhiyun #if 0
1992*4882a593Smuzhiyun #define KVAR(which) (RELOC_KVAR | (which))
1993*4882a593Smuzhiyun #endif
1994*4882a593Smuzhiyun
1995*4882a593Smuzhiyun #if 0
1996*4882a593Smuzhiyun #define SCRIPT_KVAR_JIFFIES (0)
1997*4882a593Smuzhiyun #define SCRIPT_KVAR_FIRST SCRIPT_KVAR_JIFFIES
1998*4882a593Smuzhiyun #define SCRIPT_KVAR_LAST SCRIPT_KVAR_JIFFIES
1999*4882a593Smuzhiyun /*
2000*4882a593Smuzhiyun * Kernel variables referenced in the scripts.
2001*4882a593Smuzhiyun * THESE MUST ALL BE ALIGNED TO A 4-BYTE BOUNDARY.
2002*4882a593Smuzhiyun */
2003*4882a593Smuzhiyun static void *script_kvars[] __initdata =
2004*4882a593Smuzhiyun { (void *)&jiffies };
2005*4882a593Smuzhiyun #endif
2006*4882a593Smuzhiyun
2007*4882a593Smuzhiyun static struct script script0 __initdata = {
2008*4882a593Smuzhiyun /*--------------------------< START >-----------------------*/ {
2009*4882a593Smuzhiyun /*
2010*4882a593Smuzhiyun ** This NOP will be patched with LED ON
2011*4882a593Smuzhiyun ** SCR_REG_REG (gpreg, SCR_AND, 0xfe)
2012*4882a593Smuzhiyun */
2013*4882a593Smuzhiyun SCR_NO_OP,
2014*4882a593Smuzhiyun 0,
2015*4882a593Smuzhiyun /*
2016*4882a593Smuzhiyun ** Clear SIGP.
2017*4882a593Smuzhiyun */
2018*4882a593Smuzhiyun SCR_FROM_REG (ctest2),
2019*4882a593Smuzhiyun 0,
2020*4882a593Smuzhiyun /*
2021*4882a593Smuzhiyun ** Then jump to a certain point in tryloop.
2022*4882a593Smuzhiyun ** Due to the lack of indirect addressing the code
2023*4882a593Smuzhiyun ** is self modifying here.
2024*4882a593Smuzhiyun */
2025*4882a593Smuzhiyun SCR_JUMP,
2026*4882a593Smuzhiyun }/*-------------------------< STARTPOS >--------------------*/,{
2027*4882a593Smuzhiyun PADDRH(tryloop),
2028*4882a593Smuzhiyun
2029*4882a593Smuzhiyun }/*-------------------------< SELECT >----------------------*/,{
2030*4882a593Smuzhiyun /*
2031*4882a593Smuzhiyun ** DSA contains the address of a scheduled
2032*4882a593Smuzhiyun ** data structure.
2033*4882a593Smuzhiyun **
2034*4882a593Smuzhiyun ** SCRATCHA contains the address of the script,
2035*4882a593Smuzhiyun ** which starts the next entry.
2036*4882a593Smuzhiyun **
2037*4882a593Smuzhiyun ** Set Initiator mode.
2038*4882a593Smuzhiyun **
2039*4882a593Smuzhiyun ** (Target mode is left as an exercise for the reader)
2040*4882a593Smuzhiyun */
2041*4882a593Smuzhiyun
2042*4882a593Smuzhiyun SCR_CLR (SCR_TRG),
2043*4882a593Smuzhiyun 0,
2044*4882a593Smuzhiyun SCR_LOAD_REG (HS_REG, HS_SELECTING),
2045*4882a593Smuzhiyun 0,
2046*4882a593Smuzhiyun
2047*4882a593Smuzhiyun /*
2048*4882a593Smuzhiyun ** And try to select this target.
2049*4882a593Smuzhiyun */
2050*4882a593Smuzhiyun SCR_SEL_TBL_ATN ^ offsetof (struct dsb, select),
2051*4882a593Smuzhiyun PADDR (reselect),
2052*4882a593Smuzhiyun
2053*4882a593Smuzhiyun }/*-------------------------< SELECT2 >----------------------*/,{
2054*4882a593Smuzhiyun /*
2055*4882a593Smuzhiyun ** Now there are 4 possibilities:
2056*4882a593Smuzhiyun **
2057*4882a593Smuzhiyun ** (1) The ncr loses arbitration.
2058*4882a593Smuzhiyun ** This is ok, because it will try again,
2059*4882a593Smuzhiyun ** when the bus becomes idle.
2060*4882a593Smuzhiyun ** (But beware of the timeout function!)
2061*4882a593Smuzhiyun **
2062*4882a593Smuzhiyun ** (2) The ncr is reselected.
2063*4882a593Smuzhiyun ** Then the script processor takes the jump
2064*4882a593Smuzhiyun ** to the RESELECT label.
2065*4882a593Smuzhiyun **
2066*4882a593Smuzhiyun ** (3) The ncr wins arbitration.
2067*4882a593Smuzhiyun ** Then it will execute SCRIPTS instruction until
2068*4882a593Smuzhiyun ** the next instruction that checks SCSI phase.
2069*4882a593Smuzhiyun ** Then will stop and wait for selection to be
2070*4882a593Smuzhiyun ** complete or selection time-out to occur.
2071*4882a593Smuzhiyun ** As a result the SCRIPTS instructions until
2072*4882a593Smuzhiyun ** LOADPOS + 2 should be executed in parallel with
2073*4882a593Smuzhiyun ** the SCSI core performing selection.
2074*4882a593Smuzhiyun */
2075*4882a593Smuzhiyun
2076*4882a593Smuzhiyun /*
2077*4882a593Smuzhiyun ** The MESSAGE_REJECT problem seems to be due to a selection
2078*4882a593Smuzhiyun ** timing problem.
2079*4882a593Smuzhiyun ** Wait immediately for the selection to complete.
2080*4882a593Smuzhiyun ** (2.5x behaves so)
2081*4882a593Smuzhiyun */
2082*4882a593Smuzhiyun SCR_JUMPR ^ IFFALSE (WHEN (SCR_MSG_OUT)),
2083*4882a593Smuzhiyun 0,
2084*4882a593Smuzhiyun
2085*4882a593Smuzhiyun /*
2086*4882a593Smuzhiyun ** Next time use the next slot.
2087*4882a593Smuzhiyun */
2088*4882a593Smuzhiyun SCR_COPY (4),
2089*4882a593Smuzhiyun RADDR (temp),
2090*4882a593Smuzhiyun PADDR (startpos),
2091*4882a593Smuzhiyun /*
2092*4882a593Smuzhiyun ** The ncr doesn't have an indirect load
2093*4882a593Smuzhiyun ** or store command. So we have to
2094*4882a593Smuzhiyun ** copy part of the control block to a
2095*4882a593Smuzhiyun ** fixed place, where we can access it.
2096*4882a593Smuzhiyun **
2097*4882a593Smuzhiyun ** We patch the address part of a
2098*4882a593Smuzhiyun ** COPY command with the DSA-register.
2099*4882a593Smuzhiyun */
2100*4882a593Smuzhiyun SCR_COPY_F (4),
2101*4882a593Smuzhiyun RADDR (dsa),
2102*4882a593Smuzhiyun PADDR (loadpos),
2103*4882a593Smuzhiyun /*
2104*4882a593Smuzhiyun ** Flush script prefetch if required
2105*4882a593Smuzhiyun */
2106*4882a593Smuzhiyun PREFETCH_FLUSH
2107*4882a593Smuzhiyun /*
2108*4882a593Smuzhiyun ** then we do the actual copy.
2109*4882a593Smuzhiyun */
2110*4882a593Smuzhiyun SCR_COPY (sizeof (struct head)),
2111*4882a593Smuzhiyun /*
2112*4882a593Smuzhiyun ** continued after the next label ...
2113*4882a593Smuzhiyun */
2114*4882a593Smuzhiyun }/*-------------------------< LOADPOS >---------------------*/,{
2115*4882a593Smuzhiyun 0,
2116*4882a593Smuzhiyun NADDR (header),
2117*4882a593Smuzhiyun /*
2118*4882a593Smuzhiyun ** Wait for the next phase or the selection
2119*4882a593Smuzhiyun ** to complete or time-out.
2120*4882a593Smuzhiyun */
2121*4882a593Smuzhiyun SCR_JUMP ^ IFFALSE (WHEN (SCR_MSG_OUT)),
2122*4882a593Smuzhiyun PADDR (prepare),
2123*4882a593Smuzhiyun
2124*4882a593Smuzhiyun }/*-------------------------< SEND_IDENT >----------------------*/,{
2125*4882a593Smuzhiyun /*
2126*4882a593Smuzhiyun ** Selection complete.
2127*4882a593Smuzhiyun ** Send the IDENTIFY and SIMPLE_TAG messages
2128*4882a593Smuzhiyun ** (and the EXTENDED_SDTR message)
2129*4882a593Smuzhiyun */
2130*4882a593Smuzhiyun SCR_MOVE_TBL ^ SCR_MSG_OUT,
2131*4882a593Smuzhiyun offsetof (struct dsb, smsg),
2132*4882a593Smuzhiyun SCR_JUMP ^ IFTRUE (WHEN (SCR_MSG_OUT)),
2133*4882a593Smuzhiyun PADDRH (resend_ident),
2134*4882a593Smuzhiyun SCR_LOAD_REG (scratcha, 0x80),
2135*4882a593Smuzhiyun 0,
2136*4882a593Smuzhiyun SCR_COPY (1),
2137*4882a593Smuzhiyun RADDR (scratcha),
2138*4882a593Smuzhiyun NADDR (lastmsg),
2139*4882a593Smuzhiyun }/*-------------------------< PREPARE >----------------------*/,{
2140*4882a593Smuzhiyun /*
2141*4882a593Smuzhiyun ** load the savep (saved pointer) into
2142*4882a593Smuzhiyun ** the TEMP register (actual pointer)
2143*4882a593Smuzhiyun */
2144*4882a593Smuzhiyun SCR_COPY (4),
2145*4882a593Smuzhiyun NADDR (header.savep),
2146*4882a593Smuzhiyun RADDR (temp),
2147*4882a593Smuzhiyun /*
2148*4882a593Smuzhiyun ** Initialize the status registers
2149*4882a593Smuzhiyun */
2150*4882a593Smuzhiyun SCR_COPY (4),
2151*4882a593Smuzhiyun NADDR (header.status),
2152*4882a593Smuzhiyun RADDR (scr0),
2153*4882a593Smuzhiyun }/*-------------------------< PREPARE2 >---------------------*/,{
2154*4882a593Smuzhiyun /*
2155*4882a593Smuzhiyun ** Initialize the msgout buffer with a NOOP message.
2156*4882a593Smuzhiyun */
2157*4882a593Smuzhiyun SCR_LOAD_REG (scratcha, NOP),
2158*4882a593Smuzhiyun 0,
2159*4882a593Smuzhiyun SCR_COPY (1),
2160*4882a593Smuzhiyun RADDR (scratcha),
2161*4882a593Smuzhiyun NADDR (msgout),
2162*4882a593Smuzhiyun #if 0
2163*4882a593Smuzhiyun SCR_COPY (1),
2164*4882a593Smuzhiyun RADDR (scratcha),
2165*4882a593Smuzhiyun NADDR (msgin),
2166*4882a593Smuzhiyun #endif
2167*4882a593Smuzhiyun /*
2168*4882a593Smuzhiyun ** Anticipate the COMMAND phase.
2169*4882a593Smuzhiyun ** This is the normal case for initial selection.
2170*4882a593Smuzhiyun */
2171*4882a593Smuzhiyun SCR_JUMP ^ IFFALSE (WHEN (SCR_COMMAND)),
2172*4882a593Smuzhiyun PADDR (dispatch),
2173*4882a593Smuzhiyun
2174*4882a593Smuzhiyun }/*-------------------------< COMMAND >--------------------*/,{
2175*4882a593Smuzhiyun /*
2176*4882a593Smuzhiyun ** ... and send the command
2177*4882a593Smuzhiyun */
2178*4882a593Smuzhiyun SCR_MOVE_TBL ^ SCR_COMMAND,
2179*4882a593Smuzhiyun offsetof (struct dsb, cmd),
2180*4882a593Smuzhiyun /*
2181*4882a593Smuzhiyun ** If status is still HS_NEGOTIATE, negotiation failed.
2182*4882a593Smuzhiyun ** We check this here, since we want to do that
2183*4882a593Smuzhiyun ** only once.
2184*4882a593Smuzhiyun */
2185*4882a593Smuzhiyun SCR_FROM_REG (HS_REG),
2186*4882a593Smuzhiyun 0,
2187*4882a593Smuzhiyun SCR_INT ^ IFTRUE (DATA (HS_NEGOTIATE)),
2188*4882a593Smuzhiyun SIR_NEGO_FAILED,
2189*4882a593Smuzhiyun
2190*4882a593Smuzhiyun }/*-----------------------< DISPATCH >----------------------*/,{
2191*4882a593Smuzhiyun /*
2192*4882a593Smuzhiyun ** MSG_IN is the only phase that shall be
2193*4882a593Smuzhiyun ** entered at least once for each (re)selection.
2194*4882a593Smuzhiyun ** So we test it first.
2195*4882a593Smuzhiyun */
2196*4882a593Smuzhiyun SCR_JUMP ^ IFTRUE (WHEN (SCR_MSG_IN)),
2197*4882a593Smuzhiyun PADDR (msg_in),
2198*4882a593Smuzhiyun
2199*4882a593Smuzhiyun SCR_RETURN ^ IFTRUE (IF (SCR_DATA_OUT)),
2200*4882a593Smuzhiyun 0,
2201*4882a593Smuzhiyun /*
2202*4882a593Smuzhiyun ** DEL 397 - 53C875 Rev 3 - Part Number 609-0392410 - ITEM 4.
2203*4882a593Smuzhiyun ** Possible data corruption during Memory Write and Invalidate.
2204*4882a593Smuzhiyun ** This work-around resets the addressing logic prior to the
2205*4882a593Smuzhiyun ** start of the first MOVE of a DATA IN phase.
2206*4882a593Smuzhiyun ** (See Documentation/scsi/ncr53c8xx.rst for more information)
2207*4882a593Smuzhiyun */
2208*4882a593Smuzhiyun SCR_JUMPR ^ IFFALSE (IF (SCR_DATA_IN)),
2209*4882a593Smuzhiyun 20,
2210*4882a593Smuzhiyun SCR_COPY (4),
2211*4882a593Smuzhiyun RADDR (scratcha),
2212*4882a593Smuzhiyun RADDR (scratcha),
2213*4882a593Smuzhiyun SCR_RETURN,
2214*4882a593Smuzhiyun 0,
2215*4882a593Smuzhiyun SCR_JUMP ^ IFTRUE (IF (SCR_STATUS)),
2216*4882a593Smuzhiyun PADDR (status),
2217*4882a593Smuzhiyun SCR_JUMP ^ IFTRUE (IF (SCR_COMMAND)),
2218*4882a593Smuzhiyun PADDR (command),
2219*4882a593Smuzhiyun SCR_JUMP ^ IFTRUE (IF (SCR_MSG_OUT)),
2220*4882a593Smuzhiyun PADDR (msg_out),
2221*4882a593Smuzhiyun /*
2222*4882a593Smuzhiyun ** Discard one illegal phase byte, if required.
2223*4882a593Smuzhiyun */
2224*4882a593Smuzhiyun SCR_LOAD_REG (scratcha, XE_BAD_PHASE),
2225*4882a593Smuzhiyun 0,
2226*4882a593Smuzhiyun SCR_COPY (1),
2227*4882a593Smuzhiyun RADDR (scratcha),
2228*4882a593Smuzhiyun NADDR (xerr_st),
2229*4882a593Smuzhiyun SCR_JUMPR ^ IFFALSE (IF (SCR_ILG_OUT)),
2230*4882a593Smuzhiyun 8,
2231*4882a593Smuzhiyun SCR_MOVE_ABS (1) ^ SCR_ILG_OUT,
2232*4882a593Smuzhiyun NADDR (scratch),
2233*4882a593Smuzhiyun SCR_JUMPR ^ IFFALSE (IF (SCR_ILG_IN)),
2234*4882a593Smuzhiyun 8,
2235*4882a593Smuzhiyun SCR_MOVE_ABS (1) ^ SCR_ILG_IN,
2236*4882a593Smuzhiyun NADDR (scratch),
2237*4882a593Smuzhiyun SCR_JUMP,
2238*4882a593Smuzhiyun PADDR (dispatch),
2239*4882a593Smuzhiyun
2240*4882a593Smuzhiyun }/*-------------------------< CLRACK >----------------------*/,{
2241*4882a593Smuzhiyun /*
2242*4882a593Smuzhiyun ** Terminate possible pending message phase.
2243*4882a593Smuzhiyun */
2244*4882a593Smuzhiyun SCR_CLR (SCR_ACK),
2245*4882a593Smuzhiyun 0,
2246*4882a593Smuzhiyun SCR_JUMP,
2247*4882a593Smuzhiyun PADDR (dispatch),
2248*4882a593Smuzhiyun
2249*4882a593Smuzhiyun }/*-------------------------< NO_DATA >--------------------*/,{
2250*4882a593Smuzhiyun /*
2251*4882a593Smuzhiyun ** The target wants to tranfer too much data
2252*4882a593Smuzhiyun ** or in the wrong direction.
2253*4882a593Smuzhiyun ** Remember that in extended error.
2254*4882a593Smuzhiyun */
2255*4882a593Smuzhiyun SCR_LOAD_REG (scratcha, XE_EXTRA_DATA),
2256*4882a593Smuzhiyun 0,
2257*4882a593Smuzhiyun SCR_COPY (1),
2258*4882a593Smuzhiyun RADDR (scratcha),
2259*4882a593Smuzhiyun NADDR (xerr_st),
2260*4882a593Smuzhiyun /*
2261*4882a593Smuzhiyun ** Discard one data byte, if required.
2262*4882a593Smuzhiyun */
2263*4882a593Smuzhiyun SCR_JUMPR ^ IFFALSE (WHEN (SCR_DATA_OUT)),
2264*4882a593Smuzhiyun 8,
2265*4882a593Smuzhiyun SCR_MOVE_ABS (1) ^ SCR_DATA_OUT,
2266*4882a593Smuzhiyun NADDR (scratch),
2267*4882a593Smuzhiyun SCR_JUMPR ^ IFFALSE (IF (SCR_DATA_IN)),
2268*4882a593Smuzhiyun 8,
2269*4882a593Smuzhiyun SCR_MOVE_ABS (1) ^ SCR_DATA_IN,
2270*4882a593Smuzhiyun NADDR (scratch),
2271*4882a593Smuzhiyun /*
2272*4882a593Smuzhiyun ** .. and repeat as required.
2273*4882a593Smuzhiyun */
2274*4882a593Smuzhiyun SCR_CALL,
2275*4882a593Smuzhiyun PADDR (dispatch),
2276*4882a593Smuzhiyun SCR_JUMP,
2277*4882a593Smuzhiyun PADDR (no_data),
2278*4882a593Smuzhiyun
2279*4882a593Smuzhiyun }/*-------------------------< STATUS >--------------------*/,{
2280*4882a593Smuzhiyun /*
2281*4882a593Smuzhiyun ** get the status
2282*4882a593Smuzhiyun */
2283*4882a593Smuzhiyun SCR_MOVE_ABS (1) ^ SCR_STATUS,
2284*4882a593Smuzhiyun NADDR (scratch),
2285*4882a593Smuzhiyun /*
2286*4882a593Smuzhiyun ** save status to scsi_status.
2287*4882a593Smuzhiyun ** mark as complete.
2288*4882a593Smuzhiyun */
2289*4882a593Smuzhiyun SCR_TO_REG (SS_REG),
2290*4882a593Smuzhiyun 0,
2291*4882a593Smuzhiyun SCR_LOAD_REG (HS_REG, HS_COMPLETE),
2292*4882a593Smuzhiyun 0,
2293*4882a593Smuzhiyun SCR_JUMP,
2294*4882a593Smuzhiyun PADDR (dispatch),
2295*4882a593Smuzhiyun }/*-------------------------< MSG_IN >--------------------*/,{
2296*4882a593Smuzhiyun /*
2297*4882a593Smuzhiyun ** Get the first byte of the message
2298*4882a593Smuzhiyun ** and save it to SCRATCHA.
2299*4882a593Smuzhiyun **
2300*4882a593Smuzhiyun ** The script processor doesn't negate the
2301*4882a593Smuzhiyun ** ACK signal after this transfer.
2302*4882a593Smuzhiyun */
2303*4882a593Smuzhiyun SCR_MOVE_ABS (1) ^ SCR_MSG_IN,
2304*4882a593Smuzhiyun NADDR (msgin[0]),
2305*4882a593Smuzhiyun }/*-------------------------< MSG_IN2 >--------------------*/,{
2306*4882a593Smuzhiyun /*
2307*4882a593Smuzhiyun ** Handle this message.
2308*4882a593Smuzhiyun */
2309*4882a593Smuzhiyun SCR_JUMP ^ IFTRUE (DATA (COMMAND_COMPLETE)),
2310*4882a593Smuzhiyun PADDR (complete),
2311*4882a593Smuzhiyun SCR_JUMP ^ IFTRUE (DATA (DISCONNECT)),
2312*4882a593Smuzhiyun PADDR (disconnect),
2313*4882a593Smuzhiyun SCR_JUMP ^ IFTRUE (DATA (SAVE_POINTERS)),
2314*4882a593Smuzhiyun PADDR (save_dp),
2315*4882a593Smuzhiyun SCR_JUMP ^ IFTRUE (DATA (RESTORE_POINTERS)),
2316*4882a593Smuzhiyun PADDR (restore_dp),
2317*4882a593Smuzhiyun SCR_JUMP ^ IFTRUE (DATA (EXTENDED_MESSAGE)),
2318*4882a593Smuzhiyun PADDRH (msg_extended),
2319*4882a593Smuzhiyun SCR_JUMP ^ IFTRUE (DATA (NOP)),
2320*4882a593Smuzhiyun PADDR (clrack),
2321*4882a593Smuzhiyun SCR_JUMP ^ IFTRUE (DATA (MESSAGE_REJECT)),
2322*4882a593Smuzhiyun PADDRH (msg_reject),
2323*4882a593Smuzhiyun SCR_JUMP ^ IFTRUE (DATA (IGNORE_WIDE_RESIDUE)),
2324*4882a593Smuzhiyun PADDRH (msg_ign_residue),
2325*4882a593Smuzhiyun /*
2326*4882a593Smuzhiyun ** Rest of the messages left as
2327*4882a593Smuzhiyun ** an exercise ...
2328*4882a593Smuzhiyun **
2329*4882a593Smuzhiyun ** Unimplemented messages:
2330*4882a593Smuzhiyun ** fall through to MSG_BAD.
2331*4882a593Smuzhiyun */
2332*4882a593Smuzhiyun }/*-------------------------< MSG_BAD >------------------*/,{
2333*4882a593Smuzhiyun /*
2334*4882a593Smuzhiyun ** unimplemented message - reject it.
2335*4882a593Smuzhiyun */
2336*4882a593Smuzhiyun SCR_INT,
2337*4882a593Smuzhiyun SIR_REJECT_SENT,
2338*4882a593Smuzhiyun SCR_LOAD_REG (scratcha, MESSAGE_REJECT),
2339*4882a593Smuzhiyun 0,
2340*4882a593Smuzhiyun }/*-------------------------< SETMSG >----------------------*/,{
2341*4882a593Smuzhiyun SCR_COPY (1),
2342*4882a593Smuzhiyun RADDR (scratcha),
2343*4882a593Smuzhiyun NADDR (msgout),
2344*4882a593Smuzhiyun SCR_SET (SCR_ATN),
2345*4882a593Smuzhiyun 0,
2346*4882a593Smuzhiyun SCR_JUMP,
2347*4882a593Smuzhiyun PADDR (clrack),
2348*4882a593Smuzhiyun }/*-------------------------< CLEANUP >-------------------*/,{
2349*4882a593Smuzhiyun /*
2350*4882a593Smuzhiyun ** dsa: Pointer to ccb
2351*4882a593Smuzhiyun ** or xxxxxxFF (no ccb)
2352*4882a593Smuzhiyun **
2353*4882a593Smuzhiyun ** HS_REG: Host-Status (<>0!)
2354*4882a593Smuzhiyun */
2355*4882a593Smuzhiyun SCR_FROM_REG (dsa),
2356*4882a593Smuzhiyun 0,
2357*4882a593Smuzhiyun SCR_JUMP ^ IFTRUE (DATA (0xff)),
2358*4882a593Smuzhiyun PADDR (start),
2359*4882a593Smuzhiyun /*
2360*4882a593Smuzhiyun ** dsa is valid.
2361*4882a593Smuzhiyun ** complete the cleanup.
2362*4882a593Smuzhiyun */
2363*4882a593Smuzhiyun SCR_JUMP,
2364*4882a593Smuzhiyun PADDR (cleanup_ok),
2365*4882a593Smuzhiyun
2366*4882a593Smuzhiyun }/*-------------------------< COMPLETE >-----------------*/,{
2367*4882a593Smuzhiyun /*
2368*4882a593Smuzhiyun ** Complete message.
2369*4882a593Smuzhiyun **
2370*4882a593Smuzhiyun ** Copy TEMP register to LASTP in header.
2371*4882a593Smuzhiyun */
2372*4882a593Smuzhiyun SCR_COPY (4),
2373*4882a593Smuzhiyun RADDR (temp),
2374*4882a593Smuzhiyun NADDR (header.lastp),
2375*4882a593Smuzhiyun /*
2376*4882a593Smuzhiyun ** When we terminate the cycle by clearing ACK,
2377*4882a593Smuzhiyun ** the target may disconnect immediately.
2378*4882a593Smuzhiyun **
2379*4882a593Smuzhiyun ** We don't want to be told of an
2380*4882a593Smuzhiyun ** "unexpected disconnect",
2381*4882a593Smuzhiyun ** so we disable this feature.
2382*4882a593Smuzhiyun */
2383*4882a593Smuzhiyun SCR_REG_REG (scntl2, SCR_AND, 0x7f),
2384*4882a593Smuzhiyun 0,
2385*4882a593Smuzhiyun /*
2386*4882a593Smuzhiyun ** Terminate cycle ...
2387*4882a593Smuzhiyun */
2388*4882a593Smuzhiyun SCR_CLR (SCR_ACK|SCR_ATN),
2389*4882a593Smuzhiyun 0,
2390*4882a593Smuzhiyun /*
2391*4882a593Smuzhiyun ** ... and wait for the disconnect.
2392*4882a593Smuzhiyun */
2393*4882a593Smuzhiyun SCR_WAIT_DISC,
2394*4882a593Smuzhiyun 0,
2395*4882a593Smuzhiyun }/*-------------------------< CLEANUP_OK >----------------*/,{
2396*4882a593Smuzhiyun /*
2397*4882a593Smuzhiyun ** Save host status to header.
2398*4882a593Smuzhiyun */
2399*4882a593Smuzhiyun SCR_COPY (4),
2400*4882a593Smuzhiyun RADDR (scr0),
2401*4882a593Smuzhiyun NADDR (header.status),
2402*4882a593Smuzhiyun /*
2403*4882a593Smuzhiyun ** and copy back the header to the ccb.
2404*4882a593Smuzhiyun */
2405*4882a593Smuzhiyun SCR_COPY_F (4),
2406*4882a593Smuzhiyun RADDR (dsa),
2407*4882a593Smuzhiyun PADDR (cleanup0),
2408*4882a593Smuzhiyun /*
2409*4882a593Smuzhiyun ** Flush script prefetch if required
2410*4882a593Smuzhiyun */
2411*4882a593Smuzhiyun PREFETCH_FLUSH
2412*4882a593Smuzhiyun SCR_COPY (sizeof (struct head)),
2413*4882a593Smuzhiyun NADDR (header),
2414*4882a593Smuzhiyun }/*-------------------------< CLEANUP0 >--------------------*/,{
2415*4882a593Smuzhiyun 0,
2416*4882a593Smuzhiyun }/*-------------------------< SIGNAL >----------------------*/,{
2417*4882a593Smuzhiyun /*
2418*4882a593Smuzhiyun ** if job not completed ...
2419*4882a593Smuzhiyun */
2420*4882a593Smuzhiyun SCR_FROM_REG (HS_REG),
2421*4882a593Smuzhiyun 0,
2422*4882a593Smuzhiyun /*
2423*4882a593Smuzhiyun ** ... start the next command.
2424*4882a593Smuzhiyun */
2425*4882a593Smuzhiyun SCR_JUMP ^ IFTRUE (MASK (0, (HS_DONEMASK|HS_SKIPMASK))),
2426*4882a593Smuzhiyun PADDR(start),
2427*4882a593Smuzhiyun /*
2428*4882a593Smuzhiyun ** If command resulted in not GOOD status,
2429*4882a593Smuzhiyun ** call the C code if needed.
2430*4882a593Smuzhiyun */
2431*4882a593Smuzhiyun SCR_FROM_REG (SS_REG),
2432*4882a593Smuzhiyun 0,
2433*4882a593Smuzhiyun SCR_CALL ^ IFFALSE (DATA (S_GOOD)),
2434*4882a593Smuzhiyun PADDRH (bad_status),
2435*4882a593Smuzhiyun
2436*4882a593Smuzhiyun #ifndef SCSI_NCR_CCB_DONE_SUPPORT
2437*4882a593Smuzhiyun
2438*4882a593Smuzhiyun /*
2439*4882a593Smuzhiyun ** ... signal completion to the host
2440*4882a593Smuzhiyun */
2441*4882a593Smuzhiyun SCR_INT,
2442*4882a593Smuzhiyun SIR_INTFLY,
2443*4882a593Smuzhiyun /*
2444*4882a593Smuzhiyun ** Auf zu neuen Schandtaten!
2445*4882a593Smuzhiyun */
2446*4882a593Smuzhiyun SCR_JUMP,
2447*4882a593Smuzhiyun PADDR(start),
2448*4882a593Smuzhiyun
2449*4882a593Smuzhiyun #else /* defined SCSI_NCR_CCB_DONE_SUPPORT */
2450*4882a593Smuzhiyun
2451*4882a593Smuzhiyun /*
2452*4882a593Smuzhiyun ** ... signal completion to the host
2453*4882a593Smuzhiyun */
2454*4882a593Smuzhiyun SCR_JUMP,
2455*4882a593Smuzhiyun }/*------------------------< DONE_POS >---------------------*/,{
2456*4882a593Smuzhiyun PADDRH (done_queue),
2457*4882a593Smuzhiyun }/*------------------------< DONE_PLUG >--------------------*/,{
2458*4882a593Smuzhiyun SCR_INT,
2459*4882a593Smuzhiyun SIR_DONE_OVERFLOW,
2460*4882a593Smuzhiyun }/*------------------------< DONE_END >---------------------*/,{
2461*4882a593Smuzhiyun SCR_INT,
2462*4882a593Smuzhiyun SIR_INTFLY,
2463*4882a593Smuzhiyun SCR_COPY (4),
2464*4882a593Smuzhiyun RADDR (temp),
2465*4882a593Smuzhiyun PADDR (done_pos),
2466*4882a593Smuzhiyun SCR_JUMP,
2467*4882a593Smuzhiyun PADDR (start),
2468*4882a593Smuzhiyun
2469*4882a593Smuzhiyun #endif /* SCSI_NCR_CCB_DONE_SUPPORT */
2470*4882a593Smuzhiyun
2471*4882a593Smuzhiyun }/*-------------------------< SAVE_DP >------------------*/,{
2472*4882a593Smuzhiyun /*
2473*4882a593Smuzhiyun ** SAVE_DP message:
2474*4882a593Smuzhiyun ** Copy TEMP register to SAVEP in header.
2475*4882a593Smuzhiyun */
2476*4882a593Smuzhiyun SCR_COPY (4),
2477*4882a593Smuzhiyun RADDR (temp),
2478*4882a593Smuzhiyun NADDR (header.savep),
2479*4882a593Smuzhiyun SCR_CLR (SCR_ACK),
2480*4882a593Smuzhiyun 0,
2481*4882a593Smuzhiyun SCR_JUMP,
2482*4882a593Smuzhiyun PADDR (dispatch),
2483*4882a593Smuzhiyun }/*-------------------------< RESTORE_DP >---------------*/,{
2484*4882a593Smuzhiyun /*
2485*4882a593Smuzhiyun ** RESTORE_DP message:
2486*4882a593Smuzhiyun ** Copy SAVEP in header to TEMP register.
2487*4882a593Smuzhiyun */
2488*4882a593Smuzhiyun SCR_COPY (4),
2489*4882a593Smuzhiyun NADDR (header.savep),
2490*4882a593Smuzhiyun RADDR (temp),
2491*4882a593Smuzhiyun SCR_JUMP,
2492*4882a593Smuzhiyun PADDR (clrack),
2493*4882a593Smuzhiyun
2494*4882a593Smuzhiyun }/*-------------------------< DISCONNECT >---------------*/,{
2495*4882a593Smuzhiyun /*
2496*4882a593Smuzhiyun ** DISCONNECTing ...
2497*4882a593Smuzhiyun **
2498*4882a593Smuzhiyun ** disable the "unexpected disconnect" feature,
2499*4882a593Smuzhiyun ** and remove the ACK signal.
2500*4882a593Smuzhiyun */
2501*4882a593Smuzhiyun SCR_REG_REG (scntl2, SCR_AND, 0x7f),
2502*4882a593Smuzhiyun 0,
2503*4882a593Smuzhiyun SCR_CLR (SCR_ACK|SCR_ATN),
2504*4882a593Smuzhiyun 0,
2505*4882a593Smuzhiyun /*
2506*4882a593Smuzhiyun ** Wait for the disconnect.
2507*4882a593Smuzhiyun */
2508*4882a593Smuzhiyun SCR_WAIT_DISC,
2509*4882a593Smuzhiyun 0,
2510*4882a593Smuzhiyun /*
2511*4882a593Smuzhiyun ** Status is: DISCONNECTED.
2512*4882a593Smuzhiyun */
2513*4882a593Smuzhiyun SCR_LOAD_REG (HS_REG, HS_DISCONNECT),
2514*4882a593Smuzhiyun 0,
2515*4882a593Smuzhiyun SCR_JUMP,
2516*4882a593Smuzhiyun PADDR (cleanup_ok),
2517*4882a593Smuzhiyun
2518*4882a593Smuzhiyun }/*-------------------------< MSG_OUT >-------------------*/,{
2519*4882a593Smuzhiyun /*
2520*4882a593Smuzhiyun ** The target requests a message.
2521*4882a593Smuzhiyun */
2522*4882a593Smuzhiyun SCR_MOVE_ABS (1) ^ SCR_MSG_OUT,
2523*4882a593Smuzhiyun NADDR (msgout),
2524*4882a593Smuzhiyun SCR_COPY (1),
2525*4882a593Smuzhiyun NADDR (msgout),
2526*4882a593Smuzhiyun NADDR (lastmsg),
2527*4882a593Smuzhiyun /*
2528*4882a593Smuzhiyun ** If it was no ABORT message ...
2529*4882a593Smuzhiyun */
2530*4882a593Smuzhiyun SCR_JUMP ^ IFTRUE (DATA (ABORT_TASK_SET)),
2531*4882a593Smuzhiyun PADDRH (msg_out_abort),
2532*4882a593Smuzhiyun /*
2533*4882a593Smuzhiyun ** ... wait for the next phase
2534*4882a593Smuzhiyun ** if it's a message out, send it again, ...
2535*4882a593Smuzhiyun */
2536*4882a593Smuzhiyun SCR_JUMP ^ IFTRUE (WHEN (SCR_MSG_OUT)),
2537*4882a593Smuzhiyun PADDR (msg_out),
2538*4882a593Smuzhiyun }/*-------------------------< MSG_OUT_DONE >--------------*/,{
2539*4882a593Smuzhiyun /*
2540*4882a593Smuzhiyun ** ... else clear the message ...
2541*4882a593Smuzhiyun */
2542*4882a593Smuzhiyun SCR_LOAD_REG (scratcha, NOP),
2543*4882a593Smuzhiyun 0,
2544*4882a593Smuzhiyun SCR_COPY (4),
2545*4882a593Smuzhiyun RADDR (scratcha),
2546*4882a593Smuzhiyun NADDR (msgout),
2547*4882a593Smuzhiyun /*
2548*4882a593Smuzhiyun ** ... and process the next phase
2549*4882a593Smuzhiyun */
2550*4882a593Smuzhiyun SCR_JUMP,
2551*4882a593Smuzhiyun PADDR (dispatch),
2552*4882a593Smuzhiyun }/*-------------------------< IDLE >------------------------*/,{
2553*4882a593Smuzhiyun /*
2554*4882a593Smuzhiyun ** Nothing to do?
2555*4882a593Smuzhiyun ** Wait for reselect.
2556*4882a593Smuzhiyun ** This NOP will be patched with LED OFF
2557*4882a593Smuzhiyun ** SCR_REG_REG (gpreg, SCR_OR, 0x01)
2558*4882a593Smuzhiyun */
2559*4882a593Smuzhiyun SCR_NO_OP,
2560*4882a593Smuzhiyun 0,
2561*4882a593Smuzhiyun }/*-------------------------< RESELECT >--------------------*/,{
2562*4882a593Smuzhiyun /*
2563*4882a593Smuzhiyun ** make the DSA invalid.
2564*4882a593Smuzhiyun */
2565*4882a593Smuzhiyun SCR_LOAD_REG (dsa, 0xff),
2566*4882a593Smuzhiyun 0,
2567*4882a593Smuzhiyun SCR_CLR (SCR_TRG),
2568*4882a593Smuzhiyun 0,
2569*4882a593Smuzhiyun SCR_LOAD_REG (HS_REG, HS_IN_RESELECT),
2570*4882a593Smuzhiyun 0,
2571*4882a593Smuzhiyun /*
2572*4882a593Smuzhiyun ** Sleep waiting for a reselection.
2573*4882a593Smuzhiyun ** If SIGP is set, special treatment.
2574*4882a593Smuzhiyun **
2575*4882a593Smuzhiyun ** Zu allem bereit ..
2576*4882a593Smuzhiyun */
2577*4882a593Smuzhiyun SCR_WAIT_RESEL,
2578*4882a593Smuzhiyun PADDR(start),
2579*4882a593Smuzhiyun }/*-------------------------< RESELECTED >------------------*/,{
2580*4882a593Smuzhiyun /*
2581*4882a593Smuzhiyun ** This NOP will be patched with LED ON
2582*4882a593Smuzhiyun ** SCR_REG_REG (gpreg, SCR_AND, 0xfe)
2583*4882a593Smuzhiyun */
2584*4882a593Smuzhiyun SCR_NO_OP,
2585*4882a593Smuzhiyun 0,
2586*4882a593Smuzhiyun /*
2587*4882a593Smuzhiyun ** ... zu nichts zu gebrauchen ?
2588*4882a593Smuzhiyun **
2589*4882a593Smuzhiyun ** load the target id into the SFBR
2590*4882a593Smuzhiyun ** and jump to the control block.
2591*4882a593Smuzhiyun **
2592*4882a593Smuzhiyun ** Look at the declarations of
2593*4882a593Smuzhiyun ** - struct ncb
2594*4882a593Smuzhiyun ** - struct tcb
2595*4882a593Smuzhiyun ** - struct lcb
2596*4882a593Smuzhiyun ** - struct ccb
2597*4882a593Smuzhiyun ** to understand what's going on.
2598*4882a593Smuzhiyun */
2599*4882a593Smuzhiyun SCR_REG_SFBR (ssid, SCR_AND, 0x8F),
2600*4882a593Smuzhiyun 0,
2601*4882a593Smuzhiyun SCR_TO_REG (sdid),
2602*4882a593Smuzhiyun 0,
2603*4882a593Smuzhiyun SCR_JUMP,
2604*4882a593Smuzhiyun NADDR (jump_tcb),
2605*4882a593Smuzhiyun
2606*4882a593Smuzhiyun }/*-------------------------< RESEL_DSA >-------------------*/,{
2607*4882a593Smuzhiyun /*
2608*4882a593Smuzhiyun ** Ack the IDENTIFY or TAG previously received.
2609*4882a593Smuzhiyun */
2610*4882a593Smuzhiyun SCR_CLR (SCR_ACK),
2611*4882a593Smuzhiyun 0,
2612*4882a593Smuzhiyun /*
2613*4882a593Smuzhiyun ** The ncr doesn't have an indirect load
2614*4882a593Smuzhiyun ** or store command. So we have to
2615*4882a593Smuzhiyun ** copy part of the control block to a
2616*4882a593Smuzhiyun ** fixed place, where we can access it.
2617*4882a593Smuzhiyun **
2618*4882a593Smuzhiyun ** We patch the address part of a
2619*4882a593Smuzhiyun ** COPY command with the DSA-register.
2620*4882a593Smuzhiyun */
2621*4882a593Smuzhiyun SCR_COPY_F (4),
2622*4882a593Smuzhiyun RADDR (dsa),
2623*4882a593Smuzhiyun PADDR (loadpos1),
2624*4882a593Smuzhiyun /*
2625*4882a593Smuzhiyun ** Flush script prefetch if required
2626*4882a593Smuzhiyun */
2627*4882a593Smuzhiyun PREFETCH_FLUSH
2628*4882a593Smuzhiyun /*
2629*4882a593Smuzhiyun ** then we do the actual copy.
2630*4882a593Smuzhiyun */
2631*4882a593Smuzhiyun SCR_COPY (sizeof (struct head)),
2632*4882a593Smuzhiyun /*
2633*4882a593Smuzhiyun ** continued after the next label ...
2634*4882a593Smuzhiyun */
2635*4882a593Smuzhiyun
2636*4882a593Smuzhiyun }/*-------------------------< LOADPOS1 >-------------------*/,{
2637*4882a593Smuzhiyun 0,
2638*4882a593Smuzhiyun NADDR (header),
2639*4882a593Smuzhiyun /*
2640*4882a593Smuzhiyun ** The DSA contains the data structure address.
2641*4882a593Smuzhiyun */
2642*4882a593Smuzhiyun SCR_JUMP,
2643*4882a593Smuzhiyun PADDR (prepare),
2644*4882a593Smuzhiyun
2645*4882a593Smuzhiyun }/*-------------------------< RESEL_LUN >-------------------*/,{
2646*4882a593Smuzhiyun /*
2647*4882a593Smuzhiyun ** come back to this point
2648*4882a593Smuzhiyun ** to get an IDENTIFY message
2649*4882a593Smuzhiyun ** Wait for a msg_in phase.
2650*4882a593Smuzhiyun */
2651*4882a593Smuzhiyun SCR_INT ^ IFFALSE (WHEN (SCR_MSG_IN)),
2652*4882a593Smuzhiyun SIR_RESEL_NO_MSG_IN,
2653*4882a593Smuzhiyun /*
2654*4882a593Smuzhiyun ** message phase.
2655*4882a593Smuzhiyun ** Read the data directly from the BUS DATA lines.
2656*4882a593Smuzhiyun ** This helps to support very old SCSI devices that
2657*4882a593Smuzhiyun ** may reselect without sending an IDENTIFY.
2658*4882a593Smuzhiyun */
2659*4882a593Smuzhiyun SCR_FROM_REG (sbdl),
2660*4882a593Smuzhiyun 0,
2661*4882a593Smuzhiyun /*
2662*4882a593Smuzhiyun ** It should be an Identify message.
2663*4882a593Smuzhiyun */
2664*4882a593Smuzhiyun SCR_RETURN,
2665*4882a593Smuzhiyun 0,
2666*4882a593Smuzhiyun }/*-------------------------< RESEL_TAG >-------------------*/,{
2667*4882a593Smuzhiyun /*
2668*4882a593Smuzhiyun ** Read IDENTIFY + SIMPLE + TAG using a single MOVE.
2669*4882a593Smuzhiyun ** Aggressive optimization, is'nt it?
2670*4882a593Smuzhiyun ** No need to test the SIMPLE TAG message, since the
2671*4882a593Smuzhiyun ** driver only supports conformant devices for tags. ;-)
2672*4882a593Smuzhiyun */
2673*4882a593Smuzhiyun SCR_MOVE_ABS (3) ^ SCR_MSG_IN,
2674*4882a593Smuzhiyun NADDR (msgin),
2675*4882a593Smuzhiyun /*
2676*4882a593Smuzhiyun ** Read the TAG from the SIDL.
2677*4882a593Smuzhiyun ** Still an aggressive optimization. ;-)
2678*4882a593Smuzhiyun ** Compute the CCB indirect jump address which
2679*4882a593Smuzhiyun ** is (#TAG*2 & 0xfc) due to tag numbering using
2680*4882a593Smuzhiyun ** 1,3,5..MAXTAGS*2+1 actual values.
2681*4882a593Smuzhiyun */
2682*4882a593Smuzhiyun SCR_REG_SFBR (sidl, SCR_SHL, 0),
2683*4882a593Smuzhiyun 0,
2684*4882a593Smuzhiyun SCR_SFBR_REG (temp, SCR_AND, 0xfc),
2685*4882a593Smuzhiyun 0,
2686*4882a593Smuzhiyun }/*-------------------------< JUMP_TO_NEXUS >-------------------*/,{
2687*4882a593Smuzhiyun SCR_COPY_F (4),
2688*4882a593Smuzhiyun RADDR (temp),
2689*4882a593Smuzhiyun PADDR (nexus_indirect),
2690*4882a593Smuzhiyun /*
2691*4882a593Smuzhiyun ** Flush script prefetch if required
2692*4882a593Smuzhiyun */
2693*4882a593Smuzhiyun PREFETCH_FLUSH
2694*4882a593Smuzhiyun SCR_COPY (4),
2695*4882a593Smuzhiyun }/*-------------------------< NEXUS_INDIRECT >-------------------*/,{
2696*4882a593Smuzhiyun 0,
2697*4882a593Smuzhiyun RADDR (temp),
2698*4882a593Smuzhiyun SCR_RETURN,
2699*4882a593Smuzhiyun 0,
2700*4882a593Smuzhiyun }/*-------------------------< RESEL_NOTAG >-------------------*/,{
2701*4882a593Smuzhiyun /*
2702*4882a593Smuzhiyun ** No tag expected.
2703*4882a593Smuzhiyun ** Read an throw away the IDENTIFY.
2704*4882a593Smuzhiyun */
2705*4882a593Smuzhiyun SCR_MOVE_ABS (1) ^ SCR_MSG_IN,
2706*4882a593Smuzhiyun NADDR (msgin),
2707*4882a593Smuzhiyun SCR_JUMP,
2708*4882a593Smuzhiyun PADDR (jump_to_nexus),
2709*4882a593Smuzhiyun }/*-------------------------< DATA_IN >--------------------*/,{
2710*4882a593Smuzhiyun /*
2711*4882a593Smuzhiyun ** Because the size depends on the
2712*4882a593Smuzhiyun ** #define MAX_SCATTERL parameter,
2713*4882a593Smuzhiyun ** it is filled in at runtime.
2714*4882a593Smuzhiyun **
2715*4882a593Smuzhiyun ** ##===========< i=0; i<MAX_SCATTERL >=========
2716*4882a593Smuzhiyun ** || SCR_CALL ^ IFFALSE (WHEN (SCR_DATA_IN)),
2717*4882a593Smuzhiyun ** || PADDR (dispatch),
2718*4882a593Smuzhiyun ** || SCR_MOVE_TBL ^ SCR_DATA_IN,
2719*4882a593Smuzhiyun ** || offsetof (struct dsb, data[ i]),
2720*4882a593Smuzhiyun ** ##==========================================
2721*4882a593Smuzhiyun **
2722*4882a593Smuzhiyun **---------------------------------------------------------
2723*4882a593Smuzhiyun */
2724*4882a593Smuzhiyun 0
2725*4882a593Smuzhiyun }/*-------------------------< DATA_IN2 >-------------------*/,{
2726*4882a593Smuzhiyun SCR_CALL,
2727*4882a593Smuzhiyun PADDR (dispatch),
2728*4882a593Smuzhiyun SCR_JUMP,
2729*4882a593Smuzhiyun PADDR (no_data),
2730*4882a593Smuzhiyun }/*-------------------------< DATA_OUT >--------------------*/,{
2731*4882a593Smuzhiyun /*
2732*4882a593Smuzhiyun ** Because the size depends on the
2733*4882a593Smuzhiyun ** #define MAX_SCATTERL parameter,
2734*4882a593Smuzhiyun ** it is filled in at runtime.
2735*4882a593Smuzhiyun **
2736*4882a593Smuzhiyun ** ##===========< i=0; i<MAX_SCATTERL >=========
2737*4882a593Smuzhiyun ** || SCR_CALL ^ IFFALSE (WHEN (SCR_DATA_OUT)),
2738*4882a593Smuzhiyun ** || PADDR (dispatch),
2739*4882a593Smuzhiyun ** || SCR_MOVE_TBL ^ SCR_DATA_OUT,
2740*4882a593Smuzhiyun ** || offsetof (struct dsb, data[ i]),
2741*4882a593Smuzhiyun ** ##==========================================
2742*4882a593Smuzhiyun **
2743*4882a593Smuzhiyun **---------------------------------------------------------
2744*4882a593Smuzhiyun */
2745*4882a593Smuzhiyun 0
2746*4882a593Smuzhiyun }/*-------------------------< DATA_OUT2 >-------------------*/,{
2747*4882a593Smuzhiyun SCR_CALL,
2748*4882a593Smuzhiyun PADDR (dispatch),
2749*4882a593Smuzhiyun SCR_JUMP,
2750*4882a593Smuzhiyun PADDR (no_data),
2751*4882a593Smuzhiyun }/*--------------------------------------------------------*/
2752*4882a593Smuzhiyun };
2753*4882a593Smuzhiyun
2754*4882a593Smuzhiyun static struct scripth scripth0 __initdata = {
2755*4882a593Smuzhiyun /*-------------------------< TRYLOOP >---------------------*/{
2756*4882a593Smuzhiyun /*
2757*4882a593Smuzhiyun ** Start the next entry.
2758*4882a593Smuzhiyun ** Called addresses point to the launch script in the CCB.
2759*4882a593Smuzhiyun ** They are patched by the main processor.
2760*4882a593Smuzhiyun **
2761*4882a593Smuzhiyun ** Because the size depends on the
2762*4882a593Smuzhiyun ** #define MAX_START parameter, it is filled
2763*4882a593Smuzhiyun ** in at runtime.
2764*4882a593Smuzhiyun **
2765*4882a593Smuzhiyun **-----------------------------------------------------------
2766*4882a593Smuzhiyun **
2767*4882a593Smuzhiyun ** ##===========< I=0; i<MAX_START >===========
2768*4882a593Smuzhiyun ** || SCR_CALL,
2769*4882a593Smuzhiyun ** || PADDR (idle),
2770*4882a593Smuzhiyun ** ##==========================================
2771*4882a593Smuzhiyun **
2772*4882a593Smuzhiyun **-----------------------------------------------------------
2773*4882a593Smuzhiyun */
2774*4882a593Smuzhiyun 0
2775*4882a593Smuzhiyun }/*------------------------< TRYLOOP2 >---------------------*/,{
2776*4882a593Smuzhiyun SCR_JUMP,
2777*4882a593Smuzhiyun PADDRH(tryloop),
2778*4882a593Smuzhiyun
2779*4882a593Smuzhiyun #ifdef SCSI_NCR_CCB_DONE_SUPPORT
2780*4882a593Smuzhiyun
2781*4882a593Smuzhiyun }/*------------------------< DONE_QUEUE >-------------------*/,{
2782*4882a593Smuzhiyun /*
2783*4882a593Smuzhiyun ** Copy the CCB address to the next done entry.
2784*4882a593Smuzhiyun ** Because the size depends on the
2785*4882a593Smuzhiyun ** #define MAX_DONE parameter, it is filled
2786*4882a593Smuzhiyun ** in at runtime.
2787*4882a593Smuzhiyun **
2788*4882a593Smuzhiyun **-----------------------------------------------------------
2789*4882a593Smuzhiyun **
2790*4882a593Smuzhiyun ** ##===========< I=0; i<MAX_DONE >===========
2791*4882a593Smuzhiyun ** || SCR_COPY (sizeof(struct ccb *),
2792*4882a593Smuzhiyun ** || NADDR (header.cp),
2793*4882a593Smuzhiyun ** || NADDR (ccb_done[i]),
2794*4882a593Smuzhiyun ** || SCR_CALL,
2795*4882a593Smuzhiyun ** || PADDR (done_end),
2796*4882a593Smuzhiyun ** ##==========================================
2797*4882a593Smuzhiyun **
2798*4882a593Smuzhiyun **-----------------------------------------------------------
2799*4882a593Smuzhiyun */
2800*4882a593Smuzhiyun 0
2801*4882a593Smuzhiyun }/*------------------------< DONE_QUEUE2 >------------------*/,{
2802*4882a593Smuzhiyun SCR_JUMP,
2803*4882a593Smuzhiyun PADDRH (done_queue),
2804*4882a593Smuzhiyun
2805*4882a593Smuzhiyun #endif /* SCSI_NCR_CCB_DONE_SUPPORT */
2806*4882a593Smuzhiyun }/*------------------------< SELECT_NO_ATN >-----------------*/,{
2807*4882a593Smuzhiyun /*
2808*4882a593Smuzhiyun ** Set Initiator mode.
2809*4882a593Smuzhiyun ** And try to select this target without ATN.
2810*4882a593Smuzhiyun */
2811*4882a593Smuzhiyun
2812*4882a593Smuzhiyun SCR_CLR (SCR_TRG),
2813*4882a593Smuzhiyun 0,
2814*4882a593Smuzhiyun SCR_LOAD_REG (HS_REG, HS_SELECTING),
2815*4882a593Smuzhiyun 0,
2816*4882a593Smuzhiyun SCR_SEL_TBL ^ offsetof (struct dsb, select),
2817*4882a593Smuzhiyun PADDR (reselect),
2818*4882a593Smuzhiyun SCR_JUMP,
2819*4882a593Smuzhiyun PADDR (select2),
2820*4882a593Smuzhiyun
2821*4882a593Smuzhiyun }/*-------------------------< CANCEL >------------------------*/,{
2822*4882a593Smuzhiyun
2823*4882a593Smuzhiyun SCR_LOAD_REG (scratcha, HS_ABORTED),
2824*4882a593Smuzhiyun 0,
2825*4882a593Smuzhiyun SCR_JUMPR,
2826*4882a593Smuzhiyun 8,
2827*4882a593Smuzhiyun }/*-------------------------< SKIP >------------------------*/,{
2828*4882a593Smuzhiyun SCR_LOAD_REG (scratcha, 0),
2829*4882a593Smuzhiyun 0,
2830*4882a593Smuzhiyun /*
2831*4882a593Smuzhiyun ** This entry has been canceled.
2832*4882a593Smuzhiyun ** Next time use the next slot.
2833*4882a593Smuzhiyun */
2834*4882a593Smuzhiyun SCR_COPY (4),
2835*4882a593Smuzhiyun RADDR (temp),
2836*4882a593Smuzhiyun PADDR (startpos),
2837*4882a593Smuzhiyun /*
2838*4882a593Smuzhiyun ** The ncr doesn't have an indirect load
2839*4882a593Smuzhiyun ** or store command. So we have to
2840*4882a593Smuzhiyun ** copy part of the control block to a
2841*4882a593Smuzhiyun ** fixed place, where we can access it.
2842*4882a593Smuzhiyun **
2843*4882a593Smuzhiyun ** We patch the address part of a
2844*4882a593Smuzhiyun ** COPY command with the DSA-register.
2845*4882a593Smuzhiyun */
2846*4882a593Smuzhiyun SCR_COPY_F (4),
2847*4882a593Smuzhiyun RADDR (dsa),
2848*4882a593Smuzhiyun PADDRH (skip2),
2849*4882a593Smuzhiyun /*
2850*4882a593Smuzhiyun ** Flush script prefetch if required
2851*4882a593Smuzhiyun */
2852*4882a593Smuzhiyun PREFETCH_FLUSH
2853*4882a593Smuzhiyun /*
2854*4882a593Smuzhiyun ** then we do the actual copy.
2855*4882a593Smuzhiyun */
2856*4882a593Smuzhiyun SCR_COPY (sizeof (struct head)),
2857*4882a593Smuzhiyun /*
2858*4882a593Smuzhiyun ** continued after the next label ...
2859*4882a593Smuzhiyun */
2860*4882a593Smuzhiyun }/*-------------------------< SKIP2 >---------------------*/,{
2861*4882a593Smuzhiyun 0,
2862*4882a593Smuzhiyun NADDR (header),
2863*4882a593Smuzhiyun /*
2864*4882a593Smuzhiyun ** Initialize the status registers
2865*4882a593Smuzhiyun */
2866*4882a593Smuzhiyun SCR_COPY (4),
2867*4882a593Smuzhiyun NADDR (header.status),
2868*4882a593Smuzhiyun RADDR (scr0),
2869*4882a593Smuzhiyun /*
2870*4882a593Smuzhiyun ** Force host status.
2871*4882a593Smuzhiyun */
2872*4882a593Smuzhiyun SCR_FROM_REG (scratcha),
2873*4882a593Smuzhiyun 0,
2874*4882a593Smuzhiyun SCR_JUMPR ^ IFFALSE (MASK (0, HS_DONEMASK)),
2875*4882a593Smuzhiyun 16,
2876*4882a593Smuzhiyun SCR_REG_REG (HS_REG, SCR_OR, HS_SKIPMASK),
2877*4882a593Smuzhiyun 0,
2878*4882a593Smuzhiyun SCR_JUMPR,
2879*4882a593Smuzhiyun 8,
2880*4882a593Smuzhiyun SCR_TO_REG (HS_REG),
2881*4882a593Smuzhiyun 0,
2882*4882a593Smuzhiyun SCR_LOAD_REG (SS_REG, S_GOOD),
2883*4882a593Smuzhiyun 0,
2884*4882a593Smuzhiyun SCR_JUMP,
2885*4882a593Smuzhiyun PADDR (cleanup_ok),
2886*4882a593Smuzhiyun
2887*4882a593Smuzhiyun },/*-------------------------< PAR_ERR_DATA_IN >---------------*/{
2888*4882a593Smuzhiyun /*
2889*4882a593Smuzhiyun ** Ignore all data in byte, until next phase
2890*4882a593Smuzhiyun */
2891*4882a593Smuzhiyun SCR_JUMP ^ IFFALSE (WHEN (SCR_DATA_IN)),
2892*4882a593Smuzhiyun PADDRH (par_err_other),
2893*4882a593Smuzhiyun SCR_MOVE_ABS (1) ^ SCR_DATA_IN,
2894*4882a593Smuzhiyun NADDR (scratch),
2895*4882a593Smuzhiyun SCR_JUMPR,
2896*4882a593Smuzhiyun -24,
2897*4882a593Smuzhiyun },/*-------------------------< PAR_ERR_OTHER >------------------*/{
2898*4882a593Smuzhiyun /*
2899*4882a593Smuzhiyun ** count it.
2900*4882a593Smuzhiyun */
2901*4882a593Smuzhiyun SCR_REG_REG (PS_REG, SCR_ADD, 0x01),
2902*4882a593Smuzhiyun 0,
2903*4882a593Smuzhiyun /*
2904*4882a593Smuzhiyun ** jump to dispatcher.
2905*4882a593Smuzhiyun */
2906*4882a593Smuzhiyun SCR_JUMP,
2907*4882a593Smuzhiyun PADDR (dispatch),
2908*4882a593Smuzhiyun }/*-------------------------< MSG_REJECT >---------------*/,{
2909*4882a593Smuzhiyun /*
2910*4882a593Smuzhiyun ** If a negotiation was in progress,
2911*4882a593Smuzhiyun ** negotiation failed.
2912*4882a593Smuzhiyun ** Otherwise, let the C code print
2913*4882a593Smuzhiyun ** some message.
2914*4882a593Smuzhiyun */
2915*4882a593Smuzhiyun SCR_FROM_REG (HS_REG),
2916*4882a593Smuzhiyun 0,
2917*4882a593Smuzhiyun SCR_INT ^ IFFALSE (DATA (HS_NEGOTIATE)),
2918*4882a593Smuzhiyun SIR_REJECT_RECEIVED,
2919*4882a593Smuzhiyun SCR_INT ^ IFTRUE (DATA (HS_NEGOTIATE)),
2920*4882a593Smuzhiyun SIR_NEGO_FAILED,
2921*4882a593Smuzhiyun SCR_JUMP,
2922*4882a593Smuzhiyun PADDR (clrack),
2923*4882a593Smuzhiyun
2924*4882a593Smuzhiyun }/*-------------------------< MSG_IGN_RESIDUE >----------*/,{
2925*4882a593Smuzhiyun /*
2926*4882a593Smuzhiyun ** Terminate cycle
2927*4882a593Smuzhiyun */
2928*4882a593Smuzhiyun SCR_CLR (SCR_ACK),
2929*4882a593Smuzhiyun 0,
2930*4882a593Smuzhiyun SCR_JUMP ^ IFFALSE (WHEN (SCR_MSG_IN)),
2931*4882a593Smuzhiyun PADDR (dispatch),
2932*4882a593Smuzhiyun /*
2933*4882a593Smuzhiyun ** get residue size.
2934*4882a593Smuzhiyun */
2935*4882a593Smuzhiyun SCR_MOVE_ABS (1) ^ SCR_MSG_IN,
2936*4882a593Smuzhiyun NADDR (msgin[1]),
2937*4882a593Smuzhiyun /*
2938*4882a593Smuzhiyun ** Size is 0 .. ignore message.
2939*4882a593Smuzhiyun */
2940*4882a593Smuzhiyun SCR_JUMP ^ IFTRUE (DATA (0)),
2941*4882a593Smuzhiyun PADDR (clrack),
2942*4882a593Smuzhiyun /*
2943*4882a593Smuzhiyun ** Size is not 1 .. have to interrupt.
2944*4882a593Smuzhiyun */
2945*4882a593Smuzhiyun SCR_JUMPR ^ IFFALSE (DATA (1)),
2946*4882a593Smuzhiyun 40,
2947*4882a593Smuzhiyun /*
2948*4882a593Smuzhiyun ** Check for residue byte in swide register
2949*4882a593Smuzhiyun */
2950*4882a593Smuzhiyun SCR_FROM_REG (scntl2),
2951*4882a593Smuzhiyun 0,
2952*4882a593Smuzhiyun SCR_JUMPR ^ IFFALSE (MASK (WSR, WSR)),
2953*4882a593Smuzhiyun 16,
2954*4882a593Smuzhiyun /*
2955*4882a593Smuzhiyun ** There IS data in the swide register.
2956*4882a593Smuzhiyun ** Discard it.
2957*4882a593Smuzhiyun */
2958*4882a593Smuzhiyun SCR_REG_REG (scntl2, SCR_OR, WSR),
2959*4882a593Smuzhiyun 0,
2960*4882a593Smuzhiyun SCR_JUMP,
2961*4882a593Smuzhiyun PADDR (clrack),
2962*4882a593Smuzhiyun /*
2963*4882a593Smuzhiyun ** Load again the size to the sfbr register.
2964*4882a593Smuzhiyun */
2965*4882a593Smuzhiyun SCR_FROM_REG (scratcha),
2966*4882a593Smuzhiyun 0,
2967*4882a593Smuzhiyun SCR_INT,
2968*4882a593Smuzhiyun SIR_IGN_RESIDUE,
2969*4882a593Smuzhiyun SCR_JUMP,
2970*4882a593Smuzhiyun PADDR (clrack),
2971*4882a593Smuzhiyun
2972*4882a593Smuzhiyun }/*-------------------------< MSG_EXTENDED >-------------*/,{
2973*4882a593Smuzhiyun /*
2974*4882a593Smuzhiyun ** Terminate cycle
2975*4882a593Smuzhiyun */
2976*4882a593Smuzhiyun SCR_CLR (SCR_ACK),
2977*4882a593Smuzhiyun 0,
2978*4882a593Smuzhiyun SCR_JUMP ^ IFFALSE (WHEN (SCR_MSG_IN)),
2979*4882a593Smuzhiyun PADDR (dispatch),
2980*4882a593Smuzhiyun /*
2981*4882a593Smuzhiyun ** get length.
2982*4882a593Smuzhiyun */
2983*4882a593Smuzhiyun SCR_MOVE_ABS (1) ^ SCR_MSG_IN,
2984*4882a593Smuzhiyun NADDR (msgin[1]),
2985*4882a593Smuzhiyun /*
2986*4882a593Smuzhiyun */
2987*4882a593Smuzhiyun SCR_JUMP ^ IFTRUE (DATA (3)),
2988*4882a593Smuzhiyun PADDRH (msg_ext_3),
2989*4882a593Smuzhiyun SCR_JUMP ^ IFFALSE (DATA (2)),
2990*4882a593Smuzhiyun PADDR (msg_bad),
2991*4882a593Smuzhiyun }/*-------------------------< MSG_EXT_2 >----------------*/,{
2992*4882a593Smuzhiyun SCR_CLR (SCR_ACK),
2993*4882a593Smuzhiyun 0,
2994*4882a593Smuzhiyun SCR_JUMP ^ IFFALSE (WHEN (SCR_MSG_IN)),
2995*4882a593Smuzhiyun PADDR (dispatch),
2996*4882a593Smuzhiyun /*
2997*4882a593Smuzhiyun ** get extended message code.
2998*4882a593Smuzhiyun */
2999*4882a593Smuzhiyun SCR_MOVE_ABS (1) ^ SCR_MSG_IN,
3000*4882a593Smuzhiyun NADDR (msgin[2]),
3001*4882a593Smuzhiyun SCR_JUMP ^ IFTRUE (DATA (EXTENDED_WDTR)),
3002*4882a593Smuzhiyun PADDRH (msg_wdtr),
3003*4882a593Smuzhiyun /*
3004*4882a593Smuzhiyun ** unknown extended message
3005*4882a593Smuzhiyun */
3006*4882a593Smuzhiyun SCR_JUMP,
3007*4882a593Smuzhiyun PADDR (msg_bad)
3008*4882a593Smuzhiyun }/*-------------------------< MSG_WDTR >-----------------*/,{
3009*4882a593Smuzhiyun SCR_CLR (SCR_ACK),
3010*4882a593Smuzhiyun 0,
3011*4882a593Smuzhiyun SCR_JUMP ^ IFFALSE (WHEN (SCR_MSG_IN)),
3012*4882a593Smuzhiyun PADDR (dispatch),
3013*4882a593Smuzhiyun /*
3014*4882a593Smuzhiyun ** get data bus width
3015*4882a593Smuzhiyun */
3016*4882a593Smuzhiyun SCR_MOVE_ABS (1) ^ SCR_MSG_IN,
3017*4882a593Smuzhiyun NADDR (msgin[3]),
3018*4882a593Smuzhiyun /*
3019*4882a593Smuzhiyun ** let the host do the real work.
3020*4882a593Smuzhiyun */
3021*4882a593Smuzhiyun SCR_INT,
3022*4882a593Smuzhiyun SIR_NEGO_WIDE,
3023*4882a593Smuzhiyun /*
3024*4882a593Smuzhiyun ** let the target fetch our answer.
3025*4882a593Smuzhiyun */
3026*4882a593Smuzhiyun SCR_SET (SCR_ATN),
3027*4882a593Smuzhiyun 0,
3028*4882a593Smuzhiyun SCR_CLR (SCR_ACK),
3029*4882a593Smuzhiyun 0,
3030*4882a593Smuzhiyun SCR_JUMP ^ IFFALSE (WHEN (SCR_MSG_OUT)),
3031*4882a593Smuzhiyun PADDRH (nego_bad_phase),
3032*4882a593Smuzhiyun
3033*4882a593Smuzhiyun }/*-------------------------< SEND_WDTR >----------------*/,{
3034*4882a593Smuzhiyun /*
3035*4882a593Smuzhiyun ** Send the EXTENDED_WDTR
3036*4882a593Smuzhiyun */
3037*4882a593Smuzhiyun SCR_MOVE_ABS (4) ^ SCR_MSG_OUT,
3038*4882a593Smuzhiyun NADDR (msgout),
3039*4882a593Smuzhiyun SCR_COPY (1),
3040*4882a593Smuzhiyun NADDR (msgout),
3041*4882a593Smuzhiyun NADDR (lastmsg),
3042*4882a593Smuzhiyun SCR_JUMP,
3043*4882a593Smuzhiyun PADDR (msg_out_done),
3044*4882a593Smuzhiyun
3045*4882a593Smuzhiyun }/*-------------------------< MSG_EXT_3 >----------------*/,{
3046*4882a593Smuzhiyun SCR_CLR (SCR_ACK),
3047*4882a593Smuzhiyun 0,
3048*4882a593Smuzhiyun SCR_JUMP ^ IFFALSE (WHEN (SCR_MSG_IN)),
3049*4882a593Smuzhiyun PADDR (dispatch),
3050*4882a593Smuzhiyun /*
3051*4882a593Smuzhiyun ** get extended message code.
3052*4882a593Smuzhiyun */
3053*4882a593Smuzhiyun SCR_MOVE_ABS (1) ^ SCR_MSG_IN,
3054*4882a593Smuzhiyun NADDR (msgin[2]),
3055*4882a593Smuzhiyun SCR_JUMP ^ IFTRUE (DATA (EXTENDED_SDTR)),
3056*4882a593Smuzhiyun PADDRH (msg_sdtr),
3057*4882a593Smuzhiyun /*
3058*4882a593Smuzhiyun ** unknown extended message
3059*4882a593Smuzhiyun */
3060*4882a593Smuzhiyun SCR_JUMP,
3061*4882a593Smuzhiyun PADDR (msg_bad)
3062*4882a593Smuzhiyun
3063*4882a593Smuzhiyun }/*-------------------------< MSG_SDTR >-----------------*/,{
3064*4882a593Smuzhiyun SCR_CLR (SCR_ACK),
3065*4882a593Smuzhiyun 0,
3066*4882a593Smuzhiyun SCR_JUMP ^ IFFALSE (WHEN (SCR_MSG_IN)),
3067*4882a593Smuzhiyun PADDR (dispatch),
3068*4882a593Smuzhiyun /*
3069*4882a593Smuzhiyun ** get period and offset
3070*4882a593Smuzhiyun */
3071*4882a593Smuzhiyun SCR_MOVE_ABS (2) ^ SCR_MSG_IN,
3072*4882a593Smuzhiyun NADDR (msgin[3]),
3073*4882a593Smuzhiyun /*
3074*4882a593Smuzhiyun ** let the host do the real work.
3075*4882a593Smuzhiyun */
3076*4882a593Smuzhiyun SCR_INT,
3077*4882a593Smuzhiyun SIR_NEGO_SYNC,
3078*4882a593Smuzhiyun /*
3079*4882a593Smuzhiyun ** let the target fetch our answer.
3080*4882a593Smuzhiyun */
3081*4882a593Smuzhiyun SCR_SET (SCR_ATN),
3082*4882a593Smuzhiyun 0,
3083*4882a593Smuzhiyun SCR_CLR (SCR_ACK),
3084*4882a593Smuzhiyun 0,
3085*4882a593Smuzhiyun SCR_JUMP ^ IFFALSE (WHEN (SCR_MSG_OUT)),
3086*4882a593Smuzhiyun PADDRH (nego_bad_phase),
3087*4882a593Smuzhiyun
3088*4882a593Smuzhiyun }/*-------------------------< SEND_SDTR >-------------*/,{
3089*4882a593Smuzhiyun /*
3090*4882a593Smuzhiyun ** Send the EXTENDED_SDTR
3091*4882a593Smuzhiyun */
3092*4882a593Smuzhiyun SCR_MOVE_ABS (5) ^ SCR_MSG_OUT,
3093*4882a593Smuzhiyun NADDR (msgout),
3094*4882a593Smuzhiyun SCR_COPY (1),
3095*4882a593Smuzhiyun NADDR (msgout),
3096*4882a593Smuzhiyun NADDR (lastmsg),
3097*4882a593Smuzhiyun SCR_JUMP,
3098*4882a593Smuzhiyun PADDR (msg_out_done),
3099*4882a593Smuzhiyun
3100*4882a593Smuzhiyun }/*-------------------------< NEGO_BAD_PHASE >------------*/,{
3101*4882a593Smuzhiyun SCR_INT,
3102*4882a593Smuzhiyun SIR_NEGO_PROTO,
3103*4882a593Smuzhiyun SCR_JUMP,
3104*4882a593Smuzhiyun PADDR (dispatch),
3105*4882a593Smuzhiyun
3106*4882a593Smuzhiyun }/*-------------------------< MSG_OUT_ABORT >-------------*/,{
3107*4882a593Smuzhiyun /*
3108*4882a593Smuzhiyun ** After ABORT message,
3109*4882a593Smuzhiyun **
3110*4882a593Smuzhiyun ** expect an immediate disconnect, ...
3111*4882a593Smuzhiyun */
3112*4882a593Smuzhiyun SCR_REG_REG (scntl2, SCR_AND, 0x7f),
3113*4882a593Smuzhiyun 0,
3114*4882a593Smuzhiyun SCR_CLR (SCR_ACK|SCR_ATN),
3115*4882a593Smuzhiyun 0,
3116*4882a593Smuzhiyun SCR_WAIT_DISC,
3117*4882a593Smuzhiyun 0,
3118*4882a593Smuzhiyun /*
3119*4882a593Smuzhiyun ** ... and set the status to "ABORTED"
3120*4882a593Smuzhiyun */
3121*4882a593Smuzhiyun SCR_LOAD_REG (HS_REG, HS_ABORTED),
3122*4882a593Smuzhiyun 0,
3123*4882a593Smuzhiyun SCR_JUMP,
3124*4882a593Smuzhiyun PADDR (cleanup),
3125*4882a593Smuzhiyun
3126*4882a593Smuzhiyun }/*-------------------------< HDATA_IN >-------------------*/,{
3127*4882a593Smuzhiyun /*
3128*4882a593Smuzhiyun ** Because the size depends on the
3129*4882a593Smuzhiyun ** #define MAX_SCATTERH parameter,
3130*4882a593Smuzhiyun ** it is filled in at runtime.
3131*4882a593Smuzhiyun **
3132*4882a593Smuzhiyun ** ##==< i=MAX_SCATTERL; i<MAX_SCATTERL+MAX_SCATTERH >==
3133*4882a593Smuzhiyun ** || SCR_CALL ^ IFFALSE (WHEN (SCR_DATA_IN)),
3134*4882a593Smuzhiyun ** || PADDR (dispatch),
3135*4882a593Smuzhiyun ** || SCR_MOVE_TBL ^ SCR_DATA_IN,
3136*4882a593Smuzhiyun ** || offsetof (struct dsb, data[ i]),
3137*4882a593Smuzhiyun ** ##===================================================
3138*4882a593Smuzhiyun **
3139*4882a593Smuzhiyun **---------------------------------------------------------
3140*4882a593Smuzhiyun */
3141*4882a593Smuzhiyun 0
3142*4882a593Smuzhiyun }/*-------------------------< HDATA_IN2 >------------------*/,{
3143*4882a593Smuzhiyun SCR_JUMP,
3144*4882a593Smuzhiyun PADDR (data_in),
3145*4882a593Smuzhiyun
3146*4882a593Smuzhiyun }/*-------------------------< HDATA_OUT >-------------------*/,{
3147*4882a593Smuzhiyun /*
3148*4882a593Smuzhiyun ** Because the size depends on the
3149*4882a593Smuzhiyun ** #define MAX_SCATTERH parameter,
3150*4882a593Smuzhiyun ** it is filled in at runtime.
3151*4882a593Smuzhiyun **
3152*4882a593Smuzhiyun ** ##==< i=MAX_SCATTERL; i<MAX_SCATTERL+MAX_SCATTERH >==
3153*4882a593Smuzhiyun ** || SCR_CALL ^ IFFALSE (WHEN (SCR_DATA_OUT)),
3154*4882a593Smuzhiyun ** || PADDR (dispatch),
3155*4882a593Smuzhiyun ** || SCR_MOVE_TBL ^ SCR_DATA_OUT,
3156*4882a593Smuzhiyun ** || offsetof (struct dsb, data[ i]),
3157*4882a593Smuzhiyun ** ##===================================================
3158*4882a593Smuzhiyun **
3159*4882a593Smuzhiyun **---------------------------------------------------------
3160*4882a593Smuzhiyun */
3161*4882a593Smuzhiyun 0
3162*4882a593Smuzhiyun }/*-------------------------< HDATA_OUT2 >------------------*/,{
3163*4882a593Smuzhiyun SCR_JUMP,
3164*4882a593Smuzhiyun PADDR (data_out),
3165*4882a593Smuzhiyun
3166*4882a593Smuzhiyun }/*-------------------------< RESET >----------------------*/,{
3167*4882a593Smuzhiyun /*
3168*4882a593Smuzhiyun ** Send a TARGET_RESET message if bad IDENTIFY
3169*4882a593Smuzhiyun ** received on reselection.
3170*4882a593Smuzhiyun */
3171*4882a593Smuzhiyun SCR_LOAD_REG (scratcha, ABORT_TASK),
3172*4882a593Smuzhiyun 0,
3173*4882a593Smuzhiyun SCR_JUMP,
3174*4882a593Smuzhiyun PADDRH (abort_resel),
3175*4882a593Smuzhiyun }/*-------------------------< ABORTTAG >-------------------*/,{
3176*4882a593Smuzhiyun /*
3177*4882a593Smuzhiyun ** Abort a wrong tag received on reselection.
3178*4882a593Smuzhiyun */
3179*4882a593Smuzhiyun SCR_LOAD_REG (scratcha, ABORT_TASK),
3180*4882a593Smuzhiyun 0,
3181*4882a593Smuzhiyun SCR_JUMP,
3182*4882a593Smuzhiyun PADDRH (abort_resel),
3183*4882a593Smuzhiyun }/*-------------------------< ABORT >----------------------*/,{
3184*4882a593Smuzhiyun /*
3185*4882a593Smuzhiyun ** Abort a reselection when no active CCB.
3186*4882a593Smuzhiyun */
3187*4882a593Smuzhiyun SCR_LOAD_REG (scratcha, ABORT_TASK_SET),
3188*4882a593Smuzhiyun 0,
3189*4882a593Smuzhiyun }/*-------------------------< ABORT_RESEL >----------------*/,{
3190*4882a593Smuzhiyun SCR_COPY (1),
3191*4882a593Smuzhiyun RADDR (scratcha),
3192*4882a593Smuzhiyun NADDR (msgout),
3193*4882a593Smuzhiyun SCR_SET (SCR_ATN),
3194*4882a593Smuzhiyun 0,
3195*4882a593Smuzhiyun SCR_CLR (SCR_ACK),
3196*4882a593Smuzhiyun 0,
3197*4882a593Smuzhiyun /*
3198*4882a593Smuzhiyun ** and send it.
3199*4882a593Smuzhiyun ** we expect an immediate disconnect
3200*4882a593Smuzhiyun */
3201*4882a593Smuzhiyun SCR_REG_REG (scntl2, SCR_AND, 0x7f),
3202*4882a593Smuzhiyun 0,
3203*4882a593Smuzhiyun SCR_MOVE_ABS (1) ^ SCR_MSG_OUT,
3204*4882a593Smuzhiyun NADDR (msgout),
3205*4882a593Smuzhiyun SCR_COPY (1),
3206*4882a593Smuzhiyun NADDR (msgout),
3207*4882a593Smuzhiyun NADDR (lastmsg),
3208*4882a593Smuzhiyun SCR_CLR (SCR_ACK|SCR_ATN),
3209*4882a593Smuzhiyun 0,
3210*4882a593Smuzhiyun SCR_WAIT_DISC,
3211*4882a593Smuzhiyun 0,
3212*4882a593Smuzhiyun SCR_JUMP,
3213*4882a593Smuzhiyun PADDR (start),
3214*4882a593Smuzhiyun }/*-------------------------< RESEND_IDENT >-------------------*/,{
3215*4882a593Smuzhiyun /*
3216*4882a593Smuzhiyun ** The target stays in MSG OUT phase after having acked
3217*4882a593Smuzhiyun ** Identify [+ Tag [+ Extended message ]]. Targets shall
3218*4882a593Smuzhiyun ** behave this way on parity error.
3219*4882a593Smuzhiyun ** We must send it again all the messages.
3220*4882a593Smuzhiyun */
3221*4882a593Smuzhiyun SCR_SET (SCR_ATN), /* Shall be asserted 2 deskew delays before the */
3222*4882a593Smuzhiyun 0, /* 1rst ACK = 90 ns. Hope the NCR is'nt too fast */
3223*4882a593Smuzhiyun SCR_JUMP,
3224*4882a593Smuzhiyun PADDR (send_ident),
3225*4882a593Smuzhiyun }/*-------------------------< CLRATN_GO_ON >-------------------*/,{
3226*4882a593Smuzhiyun SCR_CLR (SCR_ATN),
3227*4882a593Smuzhiyun 0,
3228*4882a593Smuzhiyun SCR_JUMP,
3229*4882a593Smuzhiyun }/*-------------------------< NXTDSP_GO_ON >-------------------*/,{
3230*4882a593Smuzhiyun 0,
3231*4882a593Smuzhiyun }/*-------------------------< SDATA_IN >-------------------*/,{
3232*4882a593Smuzhiyun SCR_CALL ^ IFFALSE (WHEN (SCR_DATA_IN)),
3233*4882a593Smuzhiyun PADDR (dispatch),
3234*4882a593Smuzhiyun SCR_MOVE_TBL ^ SCR_DATA_IN,
3235*4882a593Smuzhiyun offsetof (struct dsb, sense),
3236*4882a593Smuzhiyun SCR_CALL,
3237*4882a593Smuzhiyun PADDR (dispatch),
3238*4882a593Smuzhiyun SCR_JUMP,
3239*4882a593Smuzhiyun PADDR (no_data),
3240*4882a593Smuzhiyun }/*-------------------------< DATA_IO >--------------------*/,{
3241*4882a593Smuzhiyun /*
3242*4882a593Smuzhiyun ** We jump here if the data direction was unknown at the
3243*4882a593Smuzhiyun ** time we had to queue the command to the scripts processor.
3244*4882a593Smuzhiyun ** Pointers had been set as follow in this situation:
3245*4882a593Smuzhiyun ** savep --> DATA_IO
3246*4882a593Smuzhiyun ** lastp --> start pointer when DATA_IN
3247*4882a593Smuzhiyun ** goalp --> goal pointer when DATA_IN
3248*4882a593Smuzhiyun ** wlastp --> start pointer when DATA_OUT
3249*4882a593Smuzhiyun ** wgoalp --> goal pointer when DATA_OUT
3250*4882a593Smuzhiyun ** This script sets savep/lastp/goalp according to the
3251*4882a593Smuzhiyun ** direction chosen by the target.
3252*4882a593Smuzhiyun */
3253*4882a593Smuzhiyun SCR_JUMPR ^ IFTRUE (WHEN (SCR_DATA_OUT)),
3254*4882a593Smuzhiyun 32,
3255*4882a593Smuzhiyun /*
3256*4882a593Smuzhiyun ** Direction is DATA IN.
3257*4882a593Smuzhiyun ** Warning: we jump here, even when phase is DATA OUT.
3258*4882a593Smuzhiyun */
3259*4882a593Smuzhiyun SCR_COPY (4),
3260*4882a593Smuzhiyun NADDR (header.lastp),
3261*4882a593Smuzhiyun NADDR (header.savep),
3262*4882a593Smuzhiyun
3263*4882a593Smuzhiyun /*
3264*4882a593Smuzhiyun ** Jump to the SCRIPTS according to actual direction.
3265*4882a593Smuzhiyun */
3266*4882a593Smuzhiyun SCR_COPY (4),
3267*4882a593Smuzhiyun NADDR (header.savep),
3268*4882a593Smuzhiyun RADDR (temp),
3269*4882a593Smuzhiyun SCR_RETURN,
3270*4882a593Smuzhiyun 0,
3271*4882a593Smuzhiyun /*
3272*4882a593Smuzhiyun ** Direction is DATA OUT.
3273*4882a593Smuzhiyun */
3274*4882a593Smuzhiyun SCR_COPY (4),
3275*4882a593Smuzhiyun NADDR (header.wlastp),
3276*4882a593Smuzhiyun NADDR (header.lastp),
3277*4882a593Smuzhiyun SCR_COPY (4),
3278*4882a593Smuzhiyun NADDR (header.wgoalp),
3279*4882a593Smuzhiyun NADDR (header.goalp),
3280*4882a593Smuzhiyun SCR_JUMPR,
3281*4882a593Smuzhiyun -64,
3282*4882a593Smuzhiyun }/*-------------------------< BAD_IDENTIFY >---------------*/,{
3283*4882a593Smuzhiyun /*
3284*4882a593Smuzhiyun ** If message phase but not an IDENTIFY,
3285*4882a593Smuzhiyun ** get some help from the C code.
3286*4882a593Smuzhiyun ** Old SCSI device may behave so.
3287*4882a593Smuzhiyun */
3288*4882a593Smuzhiyun SCR_JUMPR ^ IFTRUE (MASK (0x80, 0x80)),
3289*4882a593Smuzhiyun 16,
3290*4882a593Smuzhiyun SCR_INT,
3291*4882a593Smuzhiyun SIR_RESEL_NO_IDENTIFY,
3292*4882a593Smuzhiyun SCR_JUMP,
3293*4882a593Smuzhiyun PADDRH (reset),
3294*4882a593Smuzhiyun /*
3295*4882a593Smuzhiyun ** Message is an IDENTIFY, but lun is unknown.
3296*4882a593Smuzhiyun ** Read the message, since we got it directly
3297*4882a593Smuzhiyun ** from the SCSI BUS data lines.
3298*4882a593Smuzhiyun ** Signal problem to C code for logging the event.
3299*4882a593Smuzhiyun ** Send an ABORT_TASK_SET to clear all pending tasks.
3300*4882a593Smuzhiyun */
3301*4882a593Smuzhiyun SCR_INT,
3302*4882a593Smuzhiyun SIR_RESEL_BAD_LUN,
3303*4882a593Smuzhiyun SCR_MOVE_ABS (1) ^ SCR_MSG_IN,
3304*4882a593Smuzhiyun NADDR (msgin),
3305*4882a593Smuzhiyun SCR_JUMP,
3306*4882a593Smuzhiyun PADDRH (abort),
3307*4882a593Smuzhiyun }/*-------------------------< BAD_I_T_L >------------------*/,{
3308*4882a593Smuzhiyun /*
3309*4882a593Smuzhiyun ** We donnot have a task for that I_T_L.
3310*4882a593Smuzhiyun ** Signal problem to C code for logging the event.
3311*4882a593Smuzhiyun ** Send an ABORT_TASK_SET message.
3312*4882a593Smuzhiyun */
3313*4882a593Smuzhiyun SCR_INT,
3314*4882a593Smuzhiyun SIR_RESEL_BAD_I_T_L,
3315*4882a593Smuzhiyun SCR_JUMP,
3316*4882a593Smuzhiyun PADDRH (abort),
3317*4882a593Smuzhiyun }/*-------------------------< BAD_I_T_L_Q >----------------*/,{
3318*4882a593Smuzhiyun /*
3319*4882a593Smuzhiyun ** We donnot have a task that matches the tag.
3320*4882a593Smuzhiyun ** Signal problem to C code for logging the event.
3321*4882a593Smuzhiyun ** Send an ABORT_TASK message.
3322*4882a593Smuzhiyun */
3323*4882a593Smuzhiyun SCR_INT,
3324*4882a593Smuzhiyun SIR_RESEL_BAD_I_T_L_Q,
3325*4882a593Smuzhiyun SCR_JUMP,
3326*4882a593Smuzhiyun PADDRH (aborttag),
3327*4882a593Smuzhiyun }/*-------------------------< BAD_TARGET >-----------------*/,{
3328*4882a593Smuzhiyun /*
3329*4882a593Smuzhiyun ** We donnot know the target that reselected us.
3330*4882a593Smuzhiyun ** Grab the first message if any (IDENTIFY).
3331*4882a593Smuzhiyun ** Signal problem to C code for logging the event.
3332*4882a593Smuzhiyun ** TARGET_RESET message.
3333*4882a593Smuzhiyun */
3334*4882a593Smuzhiyun SCR_INT,
3335*4882a593Smuzhiyun SIR_RESEL_BAD_TARGET,
3336*4882a593Smuzhiyun SCR_JUMPR ^ IFFALSE (WHEN (SCR_MSG_IN)),
3337*4882a593Smuzhiyun 8,
3338*4882a593Smuzhiyun SCR_MOVE_ABS (1) ^ SCR_MSG_IN,
3339*4882a593Smuzhiyun NADDR (msgin),
3340*4882a593Smuzhiyun SCR_JUMP,
3341*4882a593Smuzhiyun PADDRH (reset),
3342*4882a593Smuzhiyun }/*-------------------------< BAD_STATUS >-----------------*/,{
3343*4882a593Smuzhiyun /*
3344*4882a593Smuzhiyun ** If command resulted in either QUEUE FULL,
3345*4882a593Smuzhiyun ** CHECK CONDITION or COMMAND TERMINATED,
3346*4882a593Smuzhiyun ** call the C code.
3347*4882a593Smuzhiyun */
3348*4882a593Smuzhiyun SCR_INT ^ IFTRUE (DATA (S_QUEUE_FULL)),
3349*4882a593Smuzhiyun SIR_BAD_STATUS,
3350*4882a593Smuzhiyun SCR_INT ^ IFTRUE (DATA (S_CHECK_COND)),
3351*4882a593Smuzhiyun SIR_BAD_STATUS,
3352*4882a593Smuzhiyun SCR_INT ^ IFTRUE (DATA (S_TERMINATED)),
3353*4882a593Smuzhiyun SIR_BAD_STATUS,
3354*4882a593Smuzhiyun SCR_RETURN,
3355*4882a593Smuzhiyun 0,
3356*4882a593Smuzhiyun }/*-------------------------< START_RAM >-------------------*/,{
3357*4882a593Smuzhiyun /*
3358*4882a593Smuzhiyun ** Load the script into on-chip RAM,
3359*4882a593Smuzhiyun ** and jump to start point.
3360*4882a593Smuzhiyun */
3361*4882a593Smuzhiyun SCR_COPY_F (4),
3362*4882a593Smuzhiyun RADDR (scratcha),
3363*4882a593Smuzhiyun PADDRH (start_ram0),
3364*4882a593Smuzhiyun /*
3365*4882a593Smuzhiyun ** Flush script prefetch if required
3366*4882a593Smuzhiyun */
3367*4882a593Smuzhiyun PREFETCH_FLUSH
3368*4882a593Smuzhiyun SCR_COPY (sizeof (struct script)),
3369*4882a593Smuzhiyun }/*-------------------------< START_RAM0 >--------------------*/,{
3370*4882a593Smuzhiyun 0,
3371*4882a593Smuzhiyun PADDR (start),
3372*4882a593Smuzhiyun SCR_JUMP,
3373*4882a593Smuzhiyun PADDR (start),
3374*4882a593Smuzhiyun }/*-------------------------< STO_RESTART >-------------------*/,{
3375*4882a593Smuzhiyun /*
3376*4882a593Smuzhiyun **
3377*4882a593Smuzhiyun ** Repair start queue (e.g. next time use the next slot)
3378*4882a593Smuzhiyun ** and jump to start point.
3379*4882a593Smuzhiyun */
3380*4882a593Smuzhiyun SCR_COPY (4),
3381*4882a593Smuzhiyun RADDR (temp),
3382*4882a593Smuzhiyun PADDR (startpos),
3383*4882a593Smuzhiyun SCR_JUMP,
3384*4882a593Smuzhiyun PADDR (start),
3385*4882a593Smuzhiyun }/*-------------------------< WAIT_DMA >-------------------*/,{
3386*4882a593Smuzhiyun /*
3387*4882a593Smuzhiyun ** For HP Zalon/53c720 systems, the Zalon interface
3388*4882a593Smuzhiyun ** between CPU and 53c720 does prefetches, which causes
3389*4882a593Smuzhiyun ** problems with self modifying scripts. The problem
3390*4882a593Smuzhiyun ** is overcome by calling a dummy subroutine after each
3391*4882a593Smuzhiyun ** modification, to force a refetch of the script on
3392*4882a593Smuzhiyun ** return from the subroutine.
3393*4882a593Smuzhiyun */
3394*4882a593Smuzhiyun SCR_RETURN,
3395*4882a593Smuzhiyun 0,
3396*4882a593Smuzhiyun }/*-------------------------< SNOOPTEST >-------------------*/,{
3397*4882a593Smuzhiyun /*
3398*4882a593Smuzhiyun ** Read the variable.
3399*4882a593Smuzhiyun */
3400*4882a593Smuzhiyun SCR_COPY (4),
3401*4882a593Smuzhiyun NADDR(ncr_cache),
3402*4882a593Smuzhiyun RADDR (scratcha),
3403*4882a593Smuzhiyun /*
3404*4882a593Smuzhiyun ** Write the variable.
3405*4882a593Smuzhiyun */
3406*4882a593Smuzhiyun SCR_COPY (4),
3407*4882a593Smuzhiyun RADDR (temp),
3408*4882a593Smuzhiyun NADDR(ncr_cache),
3409*4882a593Smuzhiyun /*
3410*4882a593Smuzhiyun ** Read back the variable.
3411*4882a593Smuzhiyun */
3412*4882a593Smuzhiyun SCR_COPY (4),
3413*4882a593Smuzhiyun NADDR(ncr_cache),
3414*4882a593Smuzhiyun RADDR (temp),
3415*4882a593Smuzhiyun }/*-------------------------< SNOOPEND >-------------------*/,{
3416*4882a593Smuzhiyun /*
3417*4882a593Smuzhiyun ** And stop.
3418*4882a593Smuzhiyun */
3419*4882a593Smuzhiyun SCR_INT,
3420*4882a593Smuzhiyun 99,
3421*4882a593Smuzhiyun }/*--------------------------------------------------------*/
3422*4882a593Smuzhiyun };
3423*4882a593Smuzhiyun
3424*4882a593Smuzhiyun /*==========================================================
3425*4882a593Smuzhiyun **
3426*4882a593Smuzhiyun **
3427*4882a593Smuzhiyun ** Fill in #define dependent parts of the script
3428*4882a593Smuzhiyun **
3429*4882a593Smuzhiyun **
3430*4882a593Smuzhiyun **==========================================================
3431*4882a593Smuzhiyun */
3432*4882a593Smuzhiyun
ncr_script_fill(struct script * scr,struct scripth * scrh)3433*4882a593Smuzhiyun void __init ncr_script_fill (struct script * scr, struct scripth * scrh)
3434*4882a593Smuzhiyun {
3435*4882a593Smuzhiyun int i;
3436*4882a593Smuzhiyun ncrcmd *p;
3437*4882a593Smuzhiyun
3438*4882a593Smuzhiyun p = scrh->tryloop;
3439*4882a593Smuzhiyun for (i=0; i<MAX_START; i++) {
3440*4882a593Smuzhiyun *p++ =SCR_CALL;
3441*4882a593Smuzhiyun *p++ =PADDR (idle);
3442*4882a593Smuzhiyun }
3443*4882a593Smuzhiyun
3444*4882a593Smuzhiyun BUG_ON((u_long)p != (u_long)&scrh->tryloop + sizeof (scrh->tryloop));
3445*4882a593Smuzhiyun
3446*4882a593Smuzhiyun #ifdef SCSI_NCR_CCB_DONE_SUPPORT
3447*4882a593Smuzhiyun
3448*4882a593Smuzhiyun p = scrh->done_queue;
3449*4882a593Smuzhiyun for (i = 0; i<MAX_DONE; i++) {
3450*4882a593Smuzhiyun *p++ =SCR_COPY (sizeof(struct ccb *));
3451*4882a593Smuzhiyun *p++ =NADDR (header.cp);
3452*4882a593Smuzhiyun *p++ =NADDR (ccb_done[i]);
3453*4882a593Smuzhiyun *p++ =SCR_CALL;
3454*4882a593Smuzhiyun *p++ =PADDR (done_end);
3455*4882a593Smuzhiyun }
3456*4882a593Smuzhiyun
3457*4882a593Smuzhiyun BUG_ON((u_long)p != (u_long)&scrh->done_queue+sizeof(scrh->done_queue));
3458*4882a593Smuzhiyun
3459*4882a593Smuzhiyun #endif /* SCSI_NCR_CCB_DONE_SUPPORT */
3460*4882a593Smuzhiyun
3461*4882a593Smuzhiyun p = scrh->hdata_in;
3462*4882a593Smuzhiyun for (i=0; i<MAX_SCATTERH; i++) {
3463*4882a593Smuzhiyun *p++ =SCR_CALL ^ IFFALSE (WHEN (SCR_DATA_IN));
3464*4882a593Smuzhiyun *p++ =PADDR (dispatch);
3465*4882a593Smuzhiyun *p++ =SCR_MOVE_TBL ^ SCR_DATA_IN;
3466*4882a593Smuzhiyun *p++ =offsetof (struct dsb, data[i]);
3467*4882a593Smuzhiyun }
3468*4882a593Smuzhiyun
3469*4882a593Smuzhiyun BUG_ON((u_long)p != (u_long)&scrh->hdata_in + sizeof (scrh->hdata_in));
3470*4882a593Smuzhiyun
3471*4882a593Smuzhiyun p = scr->data_in;
3472*4882a593Smuzhiyun for (i=MAX_SCATTERH; i<MAX_SCATTERH+MAX_SCATTERL; i++) {
3473*4882a593Smuzhiyun *p++ =SCR_CALL ^ IFFALSE (WHEN (SCR_DATA_IN));
3474*4882a593Smuzhiyun *p++ =PADDR (dispatch);
3475*4882a593Smuzhiyun *p++ =SCR_MOVE_TBL ^ SCR_DATA_IN;
3476*4882a593Smuzhiyun *p++ =offsetof (struct dsb, data[i]);
3477*4882a593Smuzhiyun }
3478*4882a593Smuzhiyun
3479*4882a593Smuzhiyun BUG_ON((u_long)p != (u_long)&scr->data_in + sizeof (scr->data_in));
3480*4882a593Smuzhiyun
3481*4882a593Smuzhiyun p = scrh->hdata_out;
3482*4882a593Smuzhiyun for (i=0; i<MAX_SCATTERH; i++) {
3483*4882a593Smuzhiyun *p++ =SCR_CALL ^ IFFALSE (WHEN (SCR_DATA_OUT));
3484*4882a593Smuzhiyun *p++ =PADDR (dispatch);
3485*4882a593Smuzhiyun *p++ =SCR_MOVE_TBL ^ SCR_DATA_OUT;
3486*4882a593Smuzhiyun *p++ =offsetof (struct dsb, data[i]);
3487*4882a593Smuzhiyun }
3488*4882a593Smuzhiyun
3489*4882a593Smuzhiyun BUG_ON((u_long)p != (u_long)&scrh->hdata_out + sizeof (scrh->hdata_out));
3490*4882a593Smuzhiyun
3491*4882a593Smuzhiyun p = scr->data_out;
3492*4882a593Smuzhiyun for (i=MAX_SCATTERH; i<MAX_SCATTERH+MAX_SCATTERL; i++) {
3493*4882a593Smuzhiyun *p++ =SCR_CALL ^ IFFALSE (WHEN (SCR_DATA_OUT));
3494*4882a593Smuzhiyun *p++ =PADDR (dispatch);
3495*4882a593Smuzhiyun *p++ =SCR_MOVE_TBL ^ SCR_DATA_OUT;
3496*4882a593Smuzhiyun *p++ =offsetof (struct dsb, data[i]);
3497*4882a593Smuzhiyun }
3498*4882a593Smuzhiyun
3499*4882a593Smuzhiyun BUG_ON((u_long) p != (u_long)&scr->data_out + sizeof (scr->data_out));
3500*4882a593Smuzhiyun }
3501*4882a593Smuzhiyun
3502*4882a593Smuzhiyun /*==========================================================
3503*4882a593Smuzhiyun **
3504*4882a593Smuzhiyun **
3505*4882a593Smuzhiyun ** Copy and rebind a script.
3506*4882a593Smuzhiyun **
3507*4882a593Smuzhiyun **
3508*4882a593Smuzhiyun **==========================================================
3509*4882a593Smuzhiyun */
3510*4882a593Smuzhiyun
3511*4882a593Smuzhiyun static void __init
ncr_script_copy_and_bind(struct ncb * np,ncrcmd * src,ncrcmd * dst,int len)3512*4882a593Smuzhiyun ncr_script_copy_and_bind (struct ncb *np, ncrcmd *src, ncrcmd *dst, int len)
3513*4882a593Smuzhiyun {
3514*4882a593Smuzhiyun ncrcmd opcode, new, old, tmp1, tmp2;
3515*4882a593Smuzhiyun ncrcmd *start, *end;
3516*4882a593Smuzhiyun int relocs;
3517*4882a593Smuzhiyun int opchanged = 0;
3518*4882a593Smuzhiyun
3519*4882a593Smuzhiyun start = src;
3520*4882a593Smuzhiyun end = src + len/4;
3521*4882a593Smuzhiyun
3522*4882a593Smuzhiyun while (src < end) {
3523*4882a593Smuzhiyun
3524*4882a593Smuzhiyun opcode = *src++;
3525*4882a593Smuzhiyun *dst++ = cpu_to_scr(opcode);
3526*4882a593Smuzhiyun
3527*4882a593Smuzhiyun /*
3528*4882a593Smuzhiyun ** If we forget to change the length
3529*4882a593Smuzhiyun ** in struct script, a field will be
3530*4882a593Smuzhiyun ** padded with 0. This is an illegal
3531*4882a593Smuzhiyun ** command.
3532*4882a593Smuzhiyun */
3533*4882a593Smuzhiyun
3534*4882a593Smuzhiyun if (opcode == 0) {
3535*4882a593Smuzhiyun printk (KERN_ERR "%s: ERROR0 IN SCRIPT at %d.\n",
3536*4882a593Smuzhiyun ncr_name(np), (int) (src-start-1));
3537*4882a593Smuzhiyun mdelay(1000);
3538*4882a593Smuzhiyun }
3539*4882a593Smuzhiyun
3540*4882a593Smuzhiyun if (DEBUG_FLAGS & DEBUG_SCRIPT)
3541*4882a593Smuzhiyun printk (KERN_DEBUG "%p: <%x>\n",
3542*4882a593Smuzhiyun (src-1), (unsigned)opcode);
3543*4882a593Smuzhiyun
3544*4882a593Smuzhiyun /*
3545*4882a593Smuzhiyun ** We don't have to decode ALL commands
3546*4882a593Smuzhiyun */
3547*4882a593Smuzhiyun switch (opcode >> 28) {
3548*4882a593Smuzhiyun
3549*4882a593Smuzhiyun case 0xc:
3550*4882a593Smuzhiyun /*
3551*4882a593Smuzhiyun ** COPY has TWO arguments.
3552*4882a593Smuzhiyun */
3553*4882a593Smuzhiyun relocs = 2;
3554*4882a593Smuzhiyun tmp1 = src[0];
3555*4882a593Smuzhiyun #ifdef RELOC_KVAR
3556*4882a593Smuzhiyun if ((tmp1 & RELOC_MASK) == RELOC_KVAR)
3557*4882a593Smuzhiyun tmp1 = 0;
3558*4882a593Smuzhiyun #endif
3559*4882a593Smuzhiyun tmp2 = src[1];
3560*4882a593Smuzhiyun #ifdef RELOC_KVAR
3561*4882a593Smuzhiyun if ((tmp2 & RELOC_MASK) == RELOC_KVAR)
3562*4882a593Smuzhiyun tmp2 = 0;
3563*4882a593Smuzhiyun #endif
3564*4882a593Smuzhiyun if ((tmp1 ^ tmp2) & 3) {
3565*4882a593Smuzhiyun printk (KERN_ERR"%s: ERROR1 IN SCRIPT at %d.\n",
3566*4882a593Smuzhiyun ncr_name(np), (int) (src-start-1));
3567*4882a593Smuzhiyun mdelay(1000);
3568*4882a593Smuzhiyun }
3569*4882a593Smuzhiyun /*
3570*4882a593Smuzhiyun ** If PREFETCH feature not enabled, remove
3571*4882a593Smuzhiyun ** the NO FLUSH bit if present.
3572*4882a593Smuzhiyun */
3573*4882a593Smuzhiyun if ((opcode & SCR_NO_FLUSH) && !(np->features & FE_PFEN)) {
3574*4882a593Smuzhiyun dst[-1] = cpu_to_scr(opcode & ~SCR_NO_FLUSH);
3575*4882a593Smuzhiyun ++opchanged;
3576*4882a593Smuzhiyun }
3577*4882a593Smuzhiyun break;
3578*4882a593Smuzhiyun
3579*4882a593Smuzhiyun case 0x0:
3580*4882a593Smuzhiyun /*
3581*4882a593Smuzhiyun ** MOVE (absolute address)
3582*4882a593Smuzhiyun */
3583*4882a593Smuzhiyun relocs = 1;
3584*4882a593Smuzhiyun break;
3585*4882a593Smuzhiyun
3586*4882a593Smuzhiyun case 0x8:
3587*4882a593Smuzhiyun /*
3588*4882a593Smuzhiyun ** JUMP / CALL
3589*4882a593Smuzhiyun ** don't relocate if relative :-)
3590*4882a593Smuzhiyun */
3591*4882a593Smuzhiyun if (opcode & 0x00800000)
3592*4882a593Smuzhiyun relocs = 0;
3593*4882a593Smuzhiyun else
3594*4882a593Smuzhiyun relocs = 1;
3595*4882a593Smuzhiyun break;
3596*4882a593Smuzhiyun
3597*4882a593Smuzhiyun case 0x4:
3598*4882a593Smuzhiyun case 0x5:
3599*4882a593Smuzhiyun case 0x6:
3600*4882a593Smuzhiyun case 0x7:
3601*4882a593Smuzhiyun relocs = 1;
3602*4882a593Smuzhiyun break;
3603*4882a593Smuzhiyun
3604*4882a593Smuzhiyun default:
3605*4882a593Smuzhiyun relocs = 0;
3606*4882a593Smuzhiyun break;
3607*4882a593Smuzhiyun }
3608*4882a593Smuzhiyun
3609*4882a593Smuzhiyun if (relocs) {
3610*4882a593Smuzhiyun while (relocs--) {
3611*4882a593Smuzhiyun old = *src++;
3612*4882a593Smuzhiyun
3613*4882a593Smuzhiyun switch (old & RELOC_MASK) {
3614*4882a593Smuzhiyun case RELOC_REGISTER:
3615*4882a593Smuzhiyun new = (old & ~RELOC_MASK) + np->paddr;
3616*4882a593Smuzhiyun break;
3617*4882a593Smuzhiyun case RELOC_LABEL:
3618*4882a593Smuzhiyun new = (old & ~RELOC_MASK) + np->p_script;
3619*4882a593Smuzhiyun break;
3620*4882a593Smuzhiyun case RELOC_LABELH:
3621*4882a593Smuzhiyun new = (old & ~RELOC_MASK) + np->p_scripth;
3622*4882a593Smuzhiyun break;
3623*4882a593Smuzhiyun case RELOC_SOFTC:
3624*4882a593Smuzhiyun new = (old & ~RELOC_MASK) + np->p_ncb;
3625*4882a593Smuzhiyun break;
3626*4882a593Smuzhiyun #ifdef RELOC_KVAR
3627*4882a593Smuzhiyun case RELOC_KVAR:
3628*4882a593Smuzhiyun if (((old & ~RELOC_MASK) <
3629*4882a593Smuzhiyun SCRIPT_KVAR_FIRST) ||
3630*4882a593Smuzhiyun ((old & ~RELOC_MASK) >
3631*4882a593Smuzhiyun SCRIPT_KVAR_LAST))
3632*4882a593Smuzhiyun panic("ncr KVAR out of range");
3633*4882a593Smuzhiyun new = vtophys(script_kvars[old &
3634*4882a593Smuzhiyun ~RELOC_MASK]);
3635*4882a593Smuzhiyun break;
3636*4882a593Smuzhiyun #endif
3637*4882a593Smuzhiyun case 0:
3638*4882a593Smuzhiyun /* Don't relocate a 0 address. */
3639*4882a593Smuzhiyun if (old == 0) {
3640*4882a593Smuzhiyun new = old;
3641*4882a593Smuzhiyun break;
3642*4882a593Smuzhiyun }
3643*4882a593Smuzhiyun fallthrough;
3644*4882a593Smuzhiyun default:
3645*4882a593Smuzhiyun panic("ncr_script_copy_and_bind: weird relocation %x\n", old);
3646*4882a593Smuzhiyun break;
3647*4882a593Smuzhiyun }
3648*4882a593Smuzhiyun
3649*4882a593Smuzhiyun *dst++ = cpu_to_scr(new);
3650*4882a593Smuzhiyun }
3651*4882a593Smuzhiyun } else
3652*4882a593Smuzhiyun *dst++ = cpu_to_scr(*src++);
3653*4882a593Smuzhiyun
3654*4882a593Smuzhiyun }
3655*4882a593Smuzhiyun }
3656*4882a593Smuzhiyun
3657*4882a593Smuzhiyun /*
3658*4882a593Smuzhiyun ** Linux host data structure
3659*4882a593Smuzhiyun */
3660*4882a593Smuzhiyun
3661*4882a593Smuzhiyun struct host_data {
3662*4882a593Smuzhiyun struct ncb *ncb;
3663*4882a593Smuzhiyun };
3664*4882a593Smuzhiyun
3665*4882a593Smuzhiyun #define PRINT_ADDR(cmd, arg...) dev_info(&cmd->device->sdev_gendev , ## arg)
3666*4882a593Smuzhiyun
ncr_print_msg(struct ccb * cp,char * label,u_char * msg)3667*4882a593Smuzhiyun static void ncr_print_msg(struct ccb *cp, char *label, u_char *msg)
3668*4882a593Smuzhiyun {
3669*4882a593Smuzhiyun PRINT_ADDR(cp->cmd, "%s: ", label);
3670*4882a593Smuzhiyun
3671*4882a593Smuzhiyun spi_print_msg(msg);
3672*4882a593Smuzhiyun printk("\n");
3673*4882a593Smuzhiyun }
3674*4882a593Smuzhiyun
3675*4882a593Smuzhiyun /*==========================================================
3676*4882a593Smuzhiyun **
3677*4882a593Smuzhiyun ** NCR chip clock divisor table.
3678*4882a593Smuzhiyun ** Divisors are multiplied by 10,000,000 in order to make
3679*4882a593Smuzhiyun ** calculations more simple.
3680*4882a593Smuzhiyun **
3681*4882a593Smuzhiyun **==========================================================
3682*4882a593Smuzhiyun */
3683*4882a593Smuzhiyun
3684*4882a593Smuzhiyun #define _5M 5000000
3685*4882a593Smuzhiyun static u_long div_10M[] =
3686*4882a593Smuzhiyun {2*_5M, 3*_5M, 4*_5M, 6*_5M, 8*_5M, 12*_5M, 16*_5M};
3687*4882a593Smuzhiyun
3688*4882a593Smuzhiyun
3689*4882a593Smuzhiyun /*===============================================================
3690*4882a593Smuzhiyun **
3691*4882a593Smuzhiyun ** Prepare io register values used by ncr_init() according
3692*4882a593Smuzhiyun ** to selected and supported features.
3693*4882a593Smuzhiyun **
3694*4882a593Smuzhiyun ** NCR chips allow burst lengths of 2, 4, 8, 16, 32, 64, 128
3695*4882a593Smuzhiyun ** transfers. 32,64,128 are only supported by 875 and 895 chips.
3696*4882a593Smuzhiyun ** We use log base 2 (burst length) as internal code, with
3697*4882a593Smuzhiyun ** value 0 meaning "burst disabled".
3698*4882a593Smuzhiyun **
3699*4882a593Smuzhiyun **===============================================================
3700*4882a593Smuzhiyun */
3701*4882a593Smuzhiyun
3702*4882a593Smuzhiyun /*
3703*4882a593Smuzhiyun * Burst length from burst code.
3704*4882a593Smuzhiyun */
3705*4882a593Smuzhiyun #define burst_length(bc) (!(bc))? 0 : 1 << (bc)
3706*4882a593Smuzhiyun
3707*4882a593Smuzhiyun /*
3708*4882a593Smuzhiyun * Burst code from io register bits. Burst enable is ctest0 for c720
3709*4882a593Smuzhiyun */
3710*4882a593Smuzhiyun #define burst_code(dmode, ctest0) \
3711*4882a593Smuzhiyun (ctest0) & 0x80 ? 0 : (((dmode) & 0xc0) >> 6) + 1
3712*4882a593Smuzhiyun
3713*4882a593Smuzhiyun /*
3714*4882a593Smuzhiyun * Set initial io register bits from burst code.
3715*4882a593Smuzhiyun */
ncr_init_burst(struct ncb * np,u_char bc)3716*4882a593Smuzhiyun static inline void ncr_init_burst(struct ncb *np, u_char bc)
3717*4882a593Smuzhiyun {
3718*4882a593Smuzhiyun u_char *be = &np->rv_ctest0;
3719*4882a593Smuzhiyun *be &= ~0x80;
3720*4882a593Smuzhiyun np->rv_dmode &= ~(0x3 << 6);
3721*4882a593Smuzhiyun np->rv_ctest5 &= ~0x4;
3722*4882a593Smuzhiyun
3723*4882a593Smuzhiyun if (!bc) {
3724*4882a593Smuzhiyun *be |= 0x80;
3725*4882a593Smuzhiyun } else {
3726*4882a593Smuzhiyun --bc;
3727*4882a593Smuzhiyun np->rv_dmode |= ((bc & 0x3) << 6);
3728*4882a593Smuzhiyun np->rv_ctest5 |= (bc & 0x4);
3729*4882a593Smuzhiyun }
3730*4882a593Smuzhiyun }
3731*4882a593Smuzhiyun
ncr_prepare_setting(struct ncb * np)3732*4882a593Smuzhiyun static void __init ncr_prepare_setting(struct ncb *np)
3733*4882a593Smuzhiyun {
3734*4882a593Smuzhiyun u_char burst_max;
3735*4882a593Smuzhiyun u_long period;
3736*4882a593Smuzhiyun int i;
3737*4882a593Smuzhiyun
3738*4882a593Smuzhiyun /*
3739*4882a593Smuzhiyun ** Save assumed BIOS setting
3740*4882a593Smuzhiyun */
3741*4882a593Smuzhiyun
3742*4882a593Smuzhiyun np->sv_scntl0 = INB(nc_scntl0) & 0x0a;
3743*4882a593Smuzhiyun np->sv_scntl3 = INB(nc_scntl3) & 0x07;
3744*4882a593Smuzhiyun np->sv_dmode = INB(nc_dmode) & 0xce;
3745*4882a593Smuzhiyun np->sv_dcntl = INB(nc_dcntl) & 0xa8;
3746*4882a593Smuzhiyun np->sv_ctest0 = INB(nc_ctest0) & 0x84;
3747*4882a593Smuzhiyun np->sv_ctest3 = INB(nc_ctest3) & 0x01;
3748*4882a593Smuzhiyun np->sv_ctest4 = INB(nc_ctest4) & 0x80;
3749*4882a593Smuzhiyun np->sv_ctest5 = INB(nc_ctest5) & 0x24;
3750*4882a593Smuzhiyun np->sv_gpcntl = INB(nc_gpcntl);
3751*4882a593Smuzhiyun np->sv_stest2 = INB(nc_stest2) & 0x20;
3752*4882a593Smuzhiyun np->sv_stest4 = INB(nc_stest4);
3753*4882a593Smuzhiyun
3754*4882a593Smuzhiyun /*
3755*4882a593Smuzhiyun ** Wide ?
3756*4882a593Smuzhiyun */
3757*4882a593Smuzhiyun
3758*4882a593Smuzhiyun np->maxwide = (np->features & FE_WIDE)? 1 : 0;
3759*4882a593Smuzhiyun
3760*4882a593Smuzhiyun /*
3761*4882a593Smuzhiyun * Guess the frequency of the chip's clock.
3762*4882a593Smuzhiyun */
3763*4882a593Smuzhiyun if (np->features & FE_ULTRA)
3764*4882a593Smuzhiyun np->clock_khz = 80000;
3765*4882a593Smuzhiyun else
3766*4882a593Smuzhiyun np->clock_khz = 40000;
3767*4882a593Smuzhiyun
3768*4882a593Smuzhiyun /*
3769*4882a593Smuzhiyun * Get the clock multiplier factor.
3770*4882a593Smuzhiyun */
3771*4882a593Smuzhiyun if (np->features & FE_QUAD)
3772*4882a593Smuzhiyun np->multiplier = 4;
3773*4882a593Smuzhiyun else if (np->features & FE_DBLR)
3774*4882a593Smuzhiyun np->multiplier = 2;
3775*4882a593Smuzhiyun else
3776*4882a593Smuzhiyun np->multiplier = 1;
3777*4882a593Smuzhiyun
3778*4882a593Smuzhiyun /*
3779*4882a593Smuzhiyun * Measure SCSI clock frequency for chips
3780*4882a593Smuzhiyun * it may vary from assumed one.
3781*4882a593Smuzhiyun */
3782*4882a593Smuzhiyun if (np->features & FE_VARCLK)
3783*4882a593Smuzhiyun ncr_getclock(np, np->multiplier);
3784*4882a593Smuzhiyun
3785*4882a593Smuzhiyun /*
3786*4882a593Smuzhiyun * Divisor to be used for async (timer pre-scaler).
3787*4882a593Smuzhiyun */
3788*4882a593Smuzhiyun i = np->clock_divn - 1;
3789*4882a593Smuzhiyun while (--i >= 0) {
3790*4882a593Smuzhiyun if (10ul * SCSI_NCR_MIN_ASYNC * np->clock_khz > div_10M[i]) {
3791*4882a593Smuzhiyun ++i;
3792*4882a593Smuzhiyun break;
3793*4882a593Smuzhiyun }
3794*4882a593Smuzhiyun }
3795*4882a593Smuzhiyun np->rv_scntl3 = i+1;
3796*4882a593Smuzhiyun
3797*4882a593Smuzhiyun /*
3798*4882a593Smuzhiyun * Minimum synchronous period factor supported by the chip.
3799*4882a593Smuzhiyun * Btw, 'period' is in tenths of nanoseconds.
3800*4882a593Smuzhiyun */
3801*4882a593Smuzhiyun
3802*4882a593Smuzhiyun period = (4 * div_10M[0] + np->clock_khz - 1) / np->clock_khz;
3803*4882a593Smuzhiyun if (period <= 250) np->minsync = 10;
3804*4882a593Smuzhiyun else if (period <= 303) np->minsync = 11;
3805*4882a593Smuzhiyun else if (period <= 500) np->minsync = 12;
3806*4882a593Smuzhiyun else np->minsync = (period + 40 - 1) / 40;
3807*4882a593Smuzhiyun
3808*4882a593Smuzhiyun /*
3809*4882a593Smuzhiyun * Check against chip SCSI standard support (SCSI-2,ULTRA,ULTRA2).
3810*4882a593Smuzhiyun */
3811*4882a593Smuzhiyun
3812*4882a593Smuzhiyun if (np->minsync < 25 && !(np->features & FE_ULTRA))
3813*4882a593Smuzhiyun np->minsync = 25;
3814*4882a593Smuzhiyun
3815*4882a593Smuzhiyun /*
3816*4882a593Smuzhiyun * Maximum synchronous period factor supported by the chip.
3817*4882a593Smuzhiyun */
3818*4882a593Smuzhiyun
3819*4882a593Smuzhiyun period = (11 * div_10M[np->clock_divn - 1]) / (4 * np->clock_khz);
3820*4882a593Smuzhiyun np->maxsync = period > 2540 ? 254 : period / 10;
3821*4882a593Smuzhiyun
3822*4882a593Smuzhiyun /*
3823*4882a593Smuzhiyun ** Prepare initial value of other IO registers
3824*4882a593Smuzhiyun */
3825*4882a593Smuzhiyun #if defined SCSI_NCR_TRUST_BIOS_SETTING
3826*4882a593Smuzhiyun np->rv_scntl0 = np->sv_scntl0;
3827*4882a593Smuzhiyun np->rv_dmode = np->sv_dmode;
3828*4882a593Smuzhiyun np->rv_dcntl = np->sv_dcntl;
3829*4882a593Smuzhiyun np->rv_ctest0 = np->sv_ctest0;
3830*4882a593Smuzhiyun np->rv_ctest3 = np->sv_ctest3;
3831*4882a593Smuzhiyun np->rv_ctest4 = np->sv_ctest4;
3832*4882a593Smuzhiyun np->rv_ctest5 = np->sv_ctest5;
3833*4882a593Smuzhiyun burst_max = burst_code(np->sv_dmode, np->sv_ctest0);
3834*4882a593Smuzhiyun #else
3835*4882a593Smuzhiyun
3836*4882a593Smuzhiyun /*
3837*4882a593Smuzhiyun ** Select burst length (dwords)
3838*4882a593Smuzhiyun */
3839*4882a593Smuzhiyun burst_max = driver_setup.burst_max;
3840*4882a593Smuzhiyun if (burst_max == 255)
3841*4882a593Smuzhiyun burst_max = burst_code(np->sv_dmode, np->sv_ctest0);
3842*4882a593Smuzhiyun if (burst_max > 7)
3843*4882a593Smuzhiyun burst_max = 7;
3844*4882a593Smuzhiyun if (burst_max > np->maxburst)
3845*4882a593Smuzhiyun burst_max = np->maxburst;
3846*4882a593Smuzhiyun
3847*4882a593Smuzhiyun /*
3848*4882a593Smuzhiyun ** Select all supported special features
3849*4882a593Smuzhiyun */
3850*4882a593Smuzhiyun if (np->features & FE_ERL)
3851*4882a593Smuzhiyun np->rv_dmode |= ERL; /* Enable Read Line */
3852*4882a593Smuzhiyun if (np->features & FE_BOF)
3853*4882a593Smuzhiyun np->rv_dmode |= BOF; /* Burst Opcode Fetch */
3854*4882a593Smuzhiyun if (np->features & FE_ERMP)
3855*4882a593Smuzhiyun np->rv_dmode |= ERMP; /* Enable Read Multiple */
3856*4882a593Smuzhiyun if (np->features & FE_PFEN)
3857*4882a593Smuzhiyun np->rv_dcntl |= PFEN; /* Prefetch Enable */
3858*4882a593Smuzhiyun if (np->features & FE_CLSE)
3859*4882a593Smuzhiyun np->rv_dcntl |= CLSE; /* Cache Line Size Enable */
3860*4882a593Smuzhiyun if (np->features & FE_WRIE)
3861*4882a593Smuzhiyun np->rv_ctest3 |= WRIE; /* Write and Invalidate */
3862*4882a593Smuzhiyun if (np->features & FE_DFS)
3863*4882a593Smuzhiyun np->rv_ctest5 |= DFS; /* Dma Fifo Size */
3864*4882a593Smuzhiyun if (np->features & FE_MUX)
3865*4882a593Smuzhiyun np->rv_ctest4 |= MUX; /* Host bus multiplex mode */
3866*4882a593Smuzhiyun if (np->features & FE_EA)
3867*4882a593Smuzhiyun np->rv_dcntl |= EA; /* Enable ACK */
3868*4882a593Smuzhiyun if (np->features & FE_EHP)
3869*4882a593Smuzhiyun np->rv_ctest0 |= EHP; /* Even host parity */
3870*4882a593Smuzhiyun
3871*4882a593Smuzhiyun /*
3872*4882a593Smuzhiyun ** Select some other
3873*4882a593Smuzhiyun */
3874*4882a593Smuzhiyun if (driver_setup.master_parity)
3875*4882a593Smuzhiyun np->rv_ctest4 |= MPEE; /* Master parity checking */
3876*4882a593Smuzhiyun if (driver_setup.scsi_parity)
3877*4882a593Smuzhiyun np->rv_scntl0 |= 0x0a; /* full arb., ena parity, par->ATN */
3878*4882a593Smuzhiyun
3879*4882a593Smuzhiyun /*
3880*4882a593Smuzhiyun ** Get SCSI addr of host adapter (set by bios?).
3881*4882a593Smuzhiyun */
3882*4882a593Smuzhiyun if (np->myaddr == 255) {
3883*4882a593Smuzhiyun np->myaddr = INB(nc_scid) & 0x07;
3884*4882a593Smuzhiyun if (!np->myaddr)
3885*4882a593Smuzhiyun np->myaddr = SCSI_NCR_MYADDR;
3886*4882a593Smuzhiyun }
3887*4882a593Smuzhiyun
3888*4882a593Smuzhiyun #endif /* SCSI_NCR_TRUST_BIOS_SETTING */
3889*4882a593Smuzhiyun
3890*4882a593Smuzhiyun /*
3891*4882a593Smuzhiyun * Prepare initial io register bits for burst length
3892*4882a593Smuzhiyun */
3893*4882a593Smuzhiyun ncr_init_burst(np, burst_max);
3894*4882a593Smuzhiyun
3895*4882a593Smuzhiyun /*
3896*4882a593Smuzhiyun ** Set SCSI BUS mode.
3897*4882a593Smuzhiyun **
3898*4882a593Smuzhiyun ** - ULTRA2 chips (895/895A/896) report the current
3899*4882a593Smuzhiyun ** BUS mode through the STEST4 IO register.
3900*4882a593Smuzhiyun ** - For previous generation chips (825/825A/875),
3901*4882a593Smuzhiyun ** user has to tell us how to check against HVD,
3902*4882a593Smuzhiyun ** since a 100% safe algorithm is not possible.
3903*4882a593Smuzhiyun */
3904*4882a593Smuzhiyun np->scsi_mode = SMODE_SE;
3905*4882a593Smuzhiyun if (np->features & FE_DIFF) {
3906*4882a593Smuzhiyun switch(driver_setup.diff_support) {
3907*4882a593Smuzhiyun case 4: /* Trust previous settings if present, then GPIO3 */
3908*4882a593Smuzhiyun if (np->sv_scntl3) {
3909*4882a593Smuzhiyun if (np->sv_stest2 & 0x20)
3910*4882a593Smuzhiyun np->scsi_mode = SMODE_HVD;
3911*4882a593Smuzhiyun break;
3912*4882a593Smuzhiyun }
3913*4882a593Smuzhiyun fallthrough;
3914*4882a593Smuzhiyun case 3: /* SYMBIOS controllers report HVD through GPIO3 */
3915*4882a593Smuzhiyun if (INB(nc_gpreg) & 0x08)
3916*4882a593Smuzhiyun break;
3917*4882a593Smuzhiyun fallthrough;
3918*4882a593Smuzhiyun case 2: /* Set HVD unconditionally */
3919*4882a593Smuzhiyun np->scsi_mode = SMODE_HVD;
3920*4882a593Smuzhiyun fallthrough;
3921*4882a593Smuzhiyun case 1: /* Trust previous settings for HVD */
3922*4882a593Smuzhiyun if (np->sv_stest2 & 0x20)
3923*4882a593Smuzhiyun np->scsi_mode = SMODE_HVD;
3924*4882a593Smuzhiyun break;
3925*4882a593Smuzhiyun default:/* Don't care about HVD */
3926*4882a593Smuzhiyun break;
3927*4882a593Smuzhiyun }
3928*4882a593Smuzhiyun }
3929*4882a593Smuzhiyun if (np->scsi_mode == SMODE_HVD)
3930*4882a593Smuzhiyun np->rv_stest2 |= 0x20;
3931*4882a593Smuzhiyun
3932*4882a593Smuzhiyun /*
3933*4882a593Smuzhiyun ** Set LED support from SCRIPTS.
3934*4882a593Smuzhiyun ** Ignore this feature for boards known to use a
3935*4882a593Smuzhiyun ** specific GPIO wiring and for the 895A or 896
3936*4882a593Smuzhiyun ** that drive the LED directly.
3937*4882a593Smuzhiyun ** Also probe initial setting of GPIO0 as output.
3938*4882a593Smuzhiyun */
3939*4882a593Smuzhiyun if ((driver_setup.led_pin) &&
3940*4882a593Smuzhiyun !(np->features & FE_LEDC) && !(np->sv_gpcntl & 0x01))
3941*4882a593Smuzhiyun np->features |= FE_LED0;
3942*4882a593Smuzhiyun
3943*4882a593Smuzhiyun /*
3944*4882a593Smuzhiyun ** Set irq mode.
3945*4882a593Smuzhiyun */
3946*4882a593Smuzhiyun switch(driver_setup.irqm & 3) {
3947*4882a593Smuzhiyun case 2:
3948*4882a593Smuzhiyun np->rv_dcntl |= IRQM;
3949*4882a593Smuzhiyun break;
3950*4882a593Smuzhiyun case 1:
3951*4882a593Smuzhiyun np->rv_dcntl |= (np->sv_dcntl & IRQM);
3952*4882a593Smuzhiyun break;
3953*4882a593Smuzhiyun default:
3954*4882a593Smuzhiyun break;
3955*4882a593Smuzhiyun }
3956*4882a593Smuzhiyun
3957*4882a593Smuzhiyun /*
3958*4882a593Smuzhiyun ** Configure targets according to driver setup.
3959*4882a593Smuzhiyun ** Allow to override sync, wide and NOSCAN from
3960*4882a593Smuzhiyun ** boot command line.
3961*4882a593Smuzhiyun */
3962*4882a593Smuzhiyun for (i = 0 ; i < MAX_TARGET ; i++) {
3963*4882a593Smuzhiyun struct tcb *tp = &np->target[i];
3964*4882a593Smuzhiyun
3965*4882a593Smuzhiyun tp->usrsync = driver_setup.default_sync;
3966*4882a593Smuzhiyun tp->usrwide = driver_setup.max_wide;
3967*4882a593Smuzhiyun tp->usrtags = MAX_TAGS;
3968*4882a593Smuzhiyun tp->period = 0xffff;
3969*4882a593Smuzhiyun if (!driver_setup.disconnection)
3970*4882a593Smuzhiyun np->target[i].usrflag = UF_NODISC;
3971*4882a593Smuzhiyun }
3972*4882a593Smuzhiyun
3973*4882a593Smuzhiyun /*
3974*4882a593Smuzhiyun ** Announce all that stuff to user.
3975*4882a593Smuzhiyun */
3976*4882a593Smuzhiyun
3977*4882a593Smuzhiyun printk(KERN_INFO "%s: ID %d, Fast-%d%s%s\n", ncr_name(np),
3978*4882a593Smuzhiyun np->myaddr,
3979*4882a593Smuzhiyun np->minsync < 12 ? 40 : (np->minsync < 25 ? 20 : 10),
3980*4882a593Smuzhiyun (np->rv_scntl0 & 0xa) ? ", Parity Checking" : ", NO Parity",
3981*4882a593Smuzhiyun (np->rv_stest2 & 0x20) ? ", Differential" : "");
3982*4882a593Smuzhiyun
3983*4882a593Smuzhiyun if (bootverbose > 1) {
3984*4882a593Smuzhiyun printk (KERN_INFO "%s: initial SCNTL3/DMODE/DCNTL/CTEST3/4/5 = "
3985*4882a593Smuzhiyun "(hex) %02x/%02x/%02x/%02x/%02x/%02x\n",
3986*4882a593Smuzhiyun ncr_name(np), np->sv_scntl3, np->sv_dmode, np->sv_dcntl,
3987*4882a593Smuzhiyun np->sv_ctest3, np->sv_ctest4, np->sv_ctest5);
3988*4882a593Smuzhiyun
3989*4882a593Smuzhiyun printk (KERN_INFO "%s: final SCNTL3/DMODE/DCNTL/CTEST3/4/5 = "
3990*4882a593Smuzhiyun "(hex) %02x/%02x/%02x/%02x/%02x/%02x\n",
3991*4882a593Smuzhiyun ncr_name(np), np->rv_scntl3, np->rv_dmode, np->rv_dcntl,
3992*4882a593Smuzhiyun np->rv_ctest3, np->rv_ctest4, np->rv_ctest5);
3993*4882a593Smuzhiyun }
3994*4882a593Smuzhiyun
3995*4882a593Smuzhiyun if (bootverbose && np->paddr2)
3996*4882a593Smuzhiyun printk (KERN_INFO "%s: on-chip RAM at 0x%lx\n",
3997*4882a593Smuzhiyun ncr_name(np), np->paddr2);
3998*4882a593Smuzhiyun }
3999*4882a593Smuzhiyun
4000*4882a593Smuzhiyun /*==========================================================
4001*4882a593Smuzhiyun **
4002*4882a593Smuzhiyun **
4003*4882a593Smuzhiyun ** Done SCSI commands list management.
4004*4882a593Smuzhiyun **
4005*4882a593Smuzhiyun ** We donnot enter the scsi_done() callback immediately
4006*4882a593Smuzhiyun ** after a command has been seen as completed but we
4007*4882a593Smuzhiyun ** insert it into a list which is flushed outside any kind
4008*4882a593Smuzhiyun ** of driver critical section.
4009*4882a593Smuzhiyun ** This allows to do minimal stuff under interrupt and
4010*4882a593Smuzhiyun ** inside critical sections and to also avoid locking up
4011*4882a593Smuzhiyun ** on recursive calls to driver entry points under SMP.
4012*4882a593Smuzhiyun ** In fact, the only kernel point which is entered by the
4013*4882a593Smuzhiyun ** driver with a driver lock set is kmalloc(GFP_ATOMIC)
4014*4882a593Smuzhiyun ** that shall not reenter the driver under any circumstances,
4015*4882a593Smuzhiyun ** AFAIK.
4016*4882a593Smuzhiyun **
4017*4882a593Smuzhiyun **==========================================================
4018*4882a593Smuzhiyun */
ncr_queue_done_cmd(struct ncb * np,struct scsi_cmnd * cmd)4019*4882a593Smuzhiyun static inline void ncr_queue_done_cmd(struct ncb *np, struct scsi_cmnd *cmd)
4020*4882a593Smuzhiyun {
4021*4882a593Smuzhiyun unmap_scsi_data(np, cmd);
4022*4882a593Smuzhiyun cmd->host_scribble = (char *) np->done_list;
4023*4882a593Smuzhiyun np->done_list = cmd;
4024*4882a593Smuzhiyun }
4025*4882a593Smuzhiyun
ncr_flush_done_cmds(struct scsi_cmnd * lcmd)4026*4882a593Smuzhiyun static inline void ncr_flush_done_cmds(struct scsi_cmnd *lcmd)
4027*4882a593Smuzhiyun {
4028*4882a593Smuzhiyun struct scsi_cmnd *cmd;
4029*4882a593Smuzhiyun
4030*4882a593Smuzhiyun while (lcmd) {
4031*4882a593Smuzhiyun cmd = lcmd;
4032*4882a593Smuzhiyun lcmd = (struct scsi_cmnd *) cmd->host_scribble;
4033*4882a593Smuzhiyun cmd->scsi_done(cmd);
4034*4882a593Smuzhiyun }
4035*4882a593Smuzhiyun }
4036*4882a593Smuzhiyun
4037*4882a593Smuzhiyun /*==========================================================
4038*4882a593Smuzhiyun **
4039*4882a593Smuzhiyun **
4040*4882a593Smuzhiyun ** Prepare the next negotiation message if needed.
4041*4882a593Smuzhiyun **
4042*4882a593Smuzhiyun ** Fill in the part of message buffer that contains the
4043*4882a593Smuzhiyun ** negotiation and the nego_status field of the CCB.
4044*4882a593Smuzhiyun ** Returns the size of the message in bytes.
4045*4882a593Smuzhiyun **
4046*4882a593Smuzhiyun **
4047*4882a593Smuzhiyun **==========================================================
4048*4882a593Smuzhiyun */
4049*4882a593Smuzhiyun
4050*4882a593Smuzhiyun
ncr_prepare_nego(struct ncb * np,struct ccb * cp,u_char * msgptr)4051*4882a593Smuzhiyun static int ncr_prepare_nego(struct ncb *np, struct ccb *cp, u_char *msgptr)
4052*4882a593Smuzhiyun {
4053*4882a593Smuzhiyun struct tcb *tp = &np->target[cp->target];
4054*4882a593Smuzhiyun int msglen = 0;
4055*4882a593Smuzhiyun int nego = 0;
4056*4882a593Smuzhiyun struct scsi_target *starget = tp->starget;
4057*4882a593Smuzhiyun
4058*4882a593Smuzhiyun /* negotiate wide transfers ? */
4059*4882a593Smuzhiyun if (!tp->widedone) {
4060*4882a593Smuzhiyun if (spi_support_wide(starget)) {
4061*4882a593Smuzhiyun nego = NS_WIDE;
4062*4882a593Smuzhiyun } else
4063*4882a593Smuzhiyun tp->widedone=1;
4064*4882a593Smuzhiyun }
4065*4882a593Smuzhiyun
4066*4882a593Smuzhiyun /* negotiate synchronous transfers? */
4067*4882a593Smuzhiyun if (!nego && !tp->period) {
4068*4882a593Smuzhiyun if (spi_support_sync(starget)) {
4069*4882a593Smuzhiyun nego = NS_SYNC;
4070*4882a593Smuzhiyun } else {
4071*4882a593Smuzhiyun tp->period =0xffff;
4072*4882a593Smuzhiyun dev_info(&starget->dev, "target did not report SYNC.\n");
4073*4882a593Smuzhiyun }
4074*4882a593Smuzhiyun }
4075*4882a593Smuzhiyun
4076*4882a593Smuzhiyun switch (nego) {
4077*4882a593Smuzhiyun case NS_SYNC:
4078*4882a593Smuzhiyun msglen += spi_populate_sync_msg(msgptr + msglen,
4079*4882a593Smuzhiyun tp->maxoffs ? tp->minsync : 0, tp->maxoffs);
4080*4882a593Smuzhiyun break;
4081*4882a593Smuzhiyun case NS_WIDE:
4082*4882a593Smuzhiyun msglen += spi_populate_width_msg(msgptr + msglen, tp->usrwide);
4083*4882a593Smuzhiyun break;
4084*4882a593Smuzhiyun }
4085*4882a593Smuzhiyun
4086*4882a593Smuzhiyun cp->nego_status = nego;
4087*4882a593Smuzhiyun
4088*4882a593Smuzhiyun if (nego) {
4089*4882a593Smuzhiyun tp->nego_cp = cp;
4090*4882a593Smuzhiyun if (DEBUG_FLAGS & DEBUG_NEGO) {
4091*4882a593Smuzhiyun ncr_print_msg(cp, nego == NS_WIDE ?
4092*4882a593Smuzhiyun "wide msgout":"sync_msgout", msgptr);
4093*4882a593Smuzhiyun }
4094*4882a593Smuzhiyun }
4095*4882a593Smuzhiyun
4096*4882a593Smuzhiyun return msglen;
4097*4882a593Smuzhiyun }
4098*4882a593Smuzhiyun
4099*4882a593Smuzhiyun
4100*4882a593Smuzhiyun
4101*4882a593Smuzhiyun /*==========================================================
4102*4882a593Smuzhiyun **
4103*4882a593Smuzhiyun **
4104*4882a593Smuzhiyun ** Start execution of a SCSI command.
4105*4882a593Smuzhiyun ** This is called from the generic SCSI driver.
4106*4882a593Smuzhiyun **
4107*4882a593Smuzhiyun **
4108*4882a593Smuzhiyun **==========================================================
4109*4882a593Smuzhiyun */
ncr_queue_command(struct ncb * np,struct scsi_cmnd * cmd)4110*4882a593Smuzhiyun static int ncr_queue_command (struct ncb *np, struct scsi_cmnd *cmd)
4111*4882a593Smuzhiyun {
4112*4882a593Smuzhiyun struct scsi_device *sdev = cmd->device;
4113*4882a593Smuzhiyun struct tcb *tp = &np->target[sdev->id];
4114*4882a593Smuzhiyun struct lcb *lp = tp->lp[sdev->lun];
4115*4882a593Smuzhiyun struct ccb *cp;
4116*4882a593Smuzhiyun
4117*4882a593Smuzhiyun int segments;
4118*4882a593Smuzhiyun u_char idmsg, *msgptr;
4119*4882a593Smuzhiyun u32 msglen;
4120*4882a593Smuzhiyun int direction;
4121*4882a593Smuzhiyun u32 lastp, goalp;
4122*4882a593Smuzhiyun
4123*4882a593Smuzhiyun /*---------------------------------------------
4124*4882a593Smuzhiyun **
4125*4882a593Smuzhiyun ** Some shortcuts ...
4126*4882a593Smuzhiyun **
4127*4882a593Smuzhiyun **---------------------------------------------
4128*4882a593Smuzhiyun */
4129*4882a593Smuzhiyun if ((sdev->id == np->myaddr ) ||
4130*4882a593Smuzhiyun (sdev->id >= MAX_TARGET) ||
4131*4882a593Smuzhiyun (sdev->lun >= MAX_LUN )) {
4132*4882a593Smuzhiyun return(DID_BAD_TARGET);
4133*4882a593Smuzhiyun }
4134*4882a593Smuzhiyun
4135*4882a593Smuzhiyun /*---------------------------------------------
4136*4882a593Smuzhiyun **
4137*4882a593Smuzhiyun ** Complete the 1st TEST UNIT READY command
4138*4882a593Smuzhiyun ** with error condition if the device is
4139*4882a593Smuzhiyun ** flagged NOSCAN, in order to speed up
4140*4882a593Smuzhiyun ** the boot.
4141*4882a593Smuzhiyun **
4142*4882a593Smuzhiyun **---------------------------------------------
4143*4882a593Smuzhiyun */
4144*4882a593Smuzhiyun if ((cmd->cmnd[0] == 0 || cmd->cmnd[0] == 0x12) &&
4145*4882a593Smuzhiyun (tp->usrflag & UF_NOSCAN)) {
4146*4882a593Smuzhiyun tp->usrflag &= ~UF_NOSCAN;
4147*4882a593Smuzhiyun return DID_BAD_TARGET;
4148*4882a593Smuzhiyun }
4149*4882a593Smuzhiyun
4150*4882a593Smuzhiyun if (DEBUG_FLAGS & DEBUG_TINY) {
4151*4882a593Smuzhiyun PRINT_ADDR(cmd, "CMD=%x ", cmd->cmnd[0]);
4152*4882a593Smuzhiyun }
4153*4882a593Smuzhiyun
4154*4882a593Smuzhiyun /*---------------------------------------------------
4155*4882a593Smuzhiyun **
4156*4882a593Smuzhiyun ** Assign a ccb / bind cmd.
4157*4882a593Smuzhiyun ** If resetting, shorten settle_time if necessary
4158*4882a593Smuzhiyun ** in order to avoid spurious timeouts.
4159*4882a593Smuzhiyun ** If resetting or no free ccb,
4160*4882a593Smuzhiyun ** insert cmd into the waiting list.
4161*4882a593Smuzhiyun **
4162*4882a593Smuzhiyun **----------------------------------------------------
4163*4882a593Smuzhiyun */
4164*4882a593Smuzhiyun if (np->settle_time && cmd->request->timeout >= HZ) {
4165*4882a593Smuzhiyun u_long tlimit = jiffies + cmd->request->timeout - HZ;
4166*4882a593Smuzhiyun if (time_after(np->settle_time, tlimit))
4167*4882a593Smuzhiyun np->settle_time = tlimit;
4168*4882a593Smuzhiyun }
4169*4882a593Smuzhiyun
4170*4882a593Smuzhiyun if (np->settle_time || !(cp=ncr_get_ccb (np, cmd))) {
4171*4882a593Smuzhiyun insert_into_waiting_list(np, cmd);
4172*4882a593Smuzhiyun return(DID_OK);
4173*4882a593Smuzhiyun }
4174*4882a593Smuzhiyun cp->cmd = cmd;
4175*4882a593Smuzhiyun
4176*4882a593Smuzhiyun /*----------------------------------------------------
4177*4882a593Smuzhiyun **
4178*4882a593Smuzhiyun ** Build the identify / tag / sdtr message
4179*4882a593Smuzhiyun **
4180*4882a593Smuzhiyun **----------------------------------------------------
4181*4882a593Smuzhiyun */
4182*4882a593Smuzhiyun
4183*4882a593Smuzhiyun idmsg = IDENTIFY(0, sdev->lun);
4184*4882a593Smuzhiyun
4185*4882a593Smuzhiyun if (cp ->tag != NO_TAG ||
4186*4882a593Smuzhiyun (cp != np->ccb && np->disc && !(tp->usrflag & UF_NODISC)))
4187*4882a593Smuzhiyun idmsg |= 0x40;
4188*4882a593Smuzhiyun
4189*4882a593Smuzhiyun msgptr = cp->scsi_smsg;
4190*4882a593Smuzhiyun msglen = 0;
4191*4882a593Smuzhiyun msgptr[msglen++] = idmsg;
4192*4882a593Smuzhiyun
4193*4882a593Smuzhiyun if (cp->tag != NO_TAG) {
4194*4882a593Smuzhiyun char order = np->order;
4195*4882a593Smuzhiyun
4196*4882a593Smuzhiyun /*
4197*4882a593Smuzhiyun ** Force ordered tag if necessary to avoid timeouts
4198*4882a593Smuzhiyun ** and to preserve interactivity.
4199*4882a593Smuzhiyun */
4200*4882a593Smuzhiyun if (lp && time_after(jiffies, lp->tags_stime)) {
4201*4882a593Smuzhiyun if (lp->tags_smap) {
4202*4882a593Smuzhiyun order = ORDERED_QUEUE_TAG;
4203*4882a593Smuzhiyun if ((DEBUG_FLAGS & DEBUG_TAGS)||bootverbose>2){
4204*4882a593Smuzhiyun PRINT_ADDR(cmd,
4205*4882a593Smuzhiyun "ordered tag forced.\n");
4206*4882a593Smuzhiyun }
4207*4882a593Smuzhiyun }
4208*4882a593Smuzhiyun lp->tags_stime = jiffies + 3*HZ;
4209*4882a593Smuzhiyun lp->tags_smap = lp->tags_umap;
4210*4882a593Smuzhiyun }
4211*4882a593Smuzhiyun
4212*4882a593Smuzhiyun if (order == 0) {
4213*4882a593Smuzhiyun /*
4214*4882a593Smuzhiyun ** Ordered write ops, unordered read ops.
4215*4882a593Smuzhiyun */
4216*4882a593Smuzhiyun switch (cmd->cmnd[0]) {
4217*4882a593Smuzhiyun case 0x08: /* READ_SMALL (6) */
4218*4882a593Smuzhiyun case 0x28: /* READ_BIG (10) */
4219*4882a593Smuzhiyun case 0xa8: /* READ_HUGE (12) */
4220*4882a593Smuzhiyun order = SIMPLE_QUEUE_TAG;
4221*4882a593Smuzhiyun break;
4222*4882a593Smuzhiyun default:
4223*4882a593Smuzhiyun order = ORDERED_QUEUE_TAG;
4224*4882a593Smuzhiyun }
4225*4882a593Smuzhiyun }
4226*4882a593Smuzhiyun msgptr[msglen++] = order;
4227*4882a593Smuzhiyun /*
4228*4882a593Smuzhiyun ** Actual tags are numbered 1,3,5,..2*MAXTAGS+1,
4229*4882a593Smuzhiyun ** since we may have to deal with devices that have
4230*4882a593Smuzhiyun ** problems with #TAG 0 or too great #TAG numbers.
4231*4882a593Smuzhiyun */
4232*4882a593Smuzhiyun msgptr[msglen++] = (cp->tag << 1) + 1;
4233*4882a593Smuzhiyun }
4234*4882a593Smuzhiyun
4235*4882a593Smuzhiyun /*----------------------------------------------------
4236*4882a593Smuzhiyun **
4237*4882a593Smuzhiyun ** Build the data descriptors
4238*4882a593Smuzhiyun **
4239*4882a593Smuzhiyun **----------------------------------------------------
4240*4882a593Smuzhiyun */
4241*4882a593Smuzhiyun
4242*4882a593Smuzhiyun direction = cmd->sc_data_direction;
4243*4882a593Smuzhiyun if (direction != DMA_NONE) {
4244*4882a593Smuzhiyun segments = ncr_scatter(np, cp, cp->cmd);
4245*4882a593Smuzhiyun if (segments < 0) {
4246*4882a593Smuzhiyun ncr_free_ccb(np, cp);
4247*4882a593Smuzhiyun return(DID_ERROR);
4248*4882a593Smuzhiyun }
4249*4882a593Smuzhiyun }
4250*4882a593Smuzhiyun else {
4251*4882a593Smuzhiyun cp->data_len = 0;
4252*4882a593Smuzhiyun segments = 0;
4253*4882a593Smuzhiyun }
4254*4882a593Smuzhiyun
4255*4882a593Smuzhiyun /*---------------------------------------------------
4256*4882a593Smuzhiyun **
4257*4882a593Smuzhiyun ** negotiation required?
4258*4882a593Smuzhiyun **
4259*4882a593Smuzhiyun ** (nego_status is filled by ncr_prepare_nego())
4260*4882a593Smuzhiyun **
4261*4882a593Smuzhiyun **---------------------------------------------------
4262*4882a593Smuzhiyun */
4263*4882a593Smuzhiyun
4264*4882a593Smuzhiyun cp->nego_status = 0;
4265*4882a593Smuzhiyun
4266*4882a593Smuzhiyun if ((!tp->widedone || !tp->period) && !tp->nego_cp && lp) {
4267*4882a593Smuzhiyun msglen += ncr_prepare_nego (np, cp, msgptr + msglen);
4268*4882a593Smuzhiyun }
4269*4882a593Smuzhiyun
4270*4882a593Smuzhiyun /*----------------------------------------------------
4271*4882a593Smuzhiyun **
4272*4882a593Smuzhiyun ** Determine xfer direction.
4273*4882a593Smuzhiyun **
4274*4882a593Smuzhiyun **----------------------------------------------------
4275*4882a593Smuzhiyun */
4276*4882a593Smuzhiyun if (!cp->data_len)
4277*4882a593Smuzhiyun direction = DMA_NONE;
4278*4882a593Smuzhiyun
4279*4882a593Smuzhiyun /*
4280*4882a593Smuzhiyun ** If data direction is BIDIRECTIONAL, speculate FROM_DEVICE
4281*4882a593Smuzhiyun ** but prepare alternate pointers for TO_DEVICE in case
4282*4882a593Smuzhiyun ** of our speculation will be just wrong.
4283*4882a593Smuzhiyun ** SCRIPTS will swap values if needed.
4284*4882a593Smuzhiyun */
4285*4882a593Smuzhiyun switch(direction) {
4286*4882a593Smuzhiyun case DMA_BIDIRECTIONAL:
4287*4882a593Smuzhiyun case DMA_TO_DEVICE:
4288*4882a593Smuzhiyun goalp = NCB_SCRIPT_PHYS (np, data_out2) + 8;
4289*4882a593Smuzhiyun if (segments <= MAX_SCATTERL)
4290*4882a593Smuzhiyun lastp = goalp - 8 - (segments * 16);
4291*4882a593Smuzhiyun else {
4292*4882a593Smuzhiyun lastp = NCB_SCRIPTH_PHYS (np, hdata_out2);
4293*4882a593Smuzhiyun lastp -= (segments - MAX_SCATTERL) * 16;
4294*4882a593Smuzhiyun }
4295*4882a593Smuzhiyun if (direction != DMA_BIDIRECTIONAL)
4296*4882a593Smuzhiyun break;
4297*4882a593Smuzhiyun cp->phys.header.wgoalp = cpu_to_scr(goalp);
4298*4882a593Smuzhiyun cp->phys.header.wlastp = cpu_to_scr(lastp);
4299*4882a593Smuzhiyun fallthrough;
4300*4882a593Smuzhiyun case DMA_FROM_DEVICE:
4301*4882a593Smuzhiyun goalp = NCB_SCRIPT_PHYS (np, data_in2) + 8;
4302*4882a593Smuzhiyun if (segments <= MAX_SCATTERL)
4303*4882a593Smuzhiyun lastp = goalp - 8 - (segments * 16);
4304*4882a593Smuzhiyun else {
4305*4882a593Smuzhiyun lastp = NCB_SCRIPTH_PHYS (np, hdata_in2);
4306*4882a593Smuzhiyun lastp -= (segments - MAX_SCATTERL) * 16;
4307*4882a593Smuzhiyun }
4308*4882a593Smuzhiyun break;
4309*4882a593Smuzhiyun default:
4310*4882a593Smuzhiyun case DMA_NONE:
4311*4882a593Smuzhiyun lastp = goalp = NCB_SCRIPT_PHYS (np, no_data);
4312*4882a593Smuzhiyun break;
4313*4882a593Smuzhiyun }
4314*4882a593Smuzhiyun
4315*4882a593Smuzhiyun /*
4316*4882a593Smuzhiyun ** Set all pointers values needed by SCRIPTS.
4317*4882a593Smuzhiyun ** If direction is unknown, start at data_io.
4318*4882a593Smuzhiyun */
4319*4882a593Smuzhiyun cp->phys.header.lastp = cpu_to_scr(lastp);
4320*4882a593Smuzhiyun cp->phys.header.goalp = cpu_to_scr(goalp);
4321*4882a593Smuzhiyun
4322*4882a593Smuzhiyun if (direction == DMA_BIDIRECTIONAL)
4323*4882a593Smuzhiyun cp->phys.header.savep =
4324*4882a593Smuzhiyun cpu_to_scr(NCB_SCRIPTH_PHYS (np, data_io));
4325*4882a593Smuzhiyun else
4326*4882a593Smuzhiyun cp->phys.header.savep= cpu_to_scr(lastp);
4327*4882a593Smuzhiyun
4328*4882a593Smuzhiyun /*
4329*4882a593Smuzhiyun ** Save the initial data pointer in order to be able
4330*4882a593Smuzhiyun ** to redo the command.
4331*4882a593Smuzhiyun */
4332*4882a593Smuzhiyun cp->startp = cp->phys.header.savep;
4333*4882a593Smuzhiyun
4334*4882a593Smuzhiyun /*----------------------------------------------------
4335*4882a593Smuzhiyun **
4336*4882a593Smuzhiyun ** fill in ccb
4337*4882a593Smuzhiyun **
4338*4882a593Smuzhiyun **----------------------------------------------------
4339*4882a593Smuzhiyun **
4340*4882a593Smuzhiyun **
4341*4882a593Smuzhiyun ** physical -> virtual backlink
4342*4882a593Smuzhiyun ** Generic SCSI command
4343*4882a593Smuzhiyun */
4344*4882a593Smuzhiyun
4345*4882a593Smuzhiyun /*
4346*4882a593Smuzhiyun ** Startqueue
4347*4882a593Smuzhiyun */
4348*4882a593Smuzhiyun cp->start.schedule.l_paddr = cpu_to_scr(NCB_SCRIPT_PHYS (np, select));
4349*4882a593Smuzhiyun cp->restart.schedule.l_paddr = cpu_to_scr(NCB_SCRIPT_PHYS (np, resel_dsa));
4350*4882a593Smuzhiyun /*
4351*4882a593Smuzhiyun ** select
4352*4882a593Smuzhiyun */
4353*4882a593Smuzhiyun cp->phys.select.sel_id = sdev_id(sdev);
4354*4882a593Smuzhiyun cp->phys.select.sel_scntl3 = tp->wval;
4355*4882a593Smuzhiyun cp->phys.select.sel_sxfer = tp->sval;
4356*4882a593Smuzhiyun /*
4357*4882a593Smuzhiyun ** message
4358*4882a593Smuzhiyun */
4359*4882a593Smuzhiyun cp->phys.smsg.addr = cpu_to_scr(CCB_PHYS (cp, scsi_smsg));
4360*4882a593Smuzhiyun cp->phys.smsg.size = cpu_to_scr(msglen);
4361*4882a593Smuzhiyun
4362*4882a593Smuzhiyun /*
4363*4882a593Smuzhiyun ** command
4364*4882a593Smuzhiyun */
4365*4882a593Smuzhiyun memcpy(cp->cdb_buf, cmd->cmnd, min_t(int, cmd->cmd_len, sizeof(cp->cdb_buf)));
4366*4882a593Smuzhiyun cp->phys.cmd.addr = cpu_to_scr(CCB_PHYS (cp, cdb_buf[0]));
4367*4882a593Smuzhiyun cp->phys.cmd.size = cpu_to_scr(cmd->cmd_len);
4368*4882a593Smuzhiyun
4369*4882a593Smuzhiyun /*
4370*4882a593Smuzhiyun ** status
4371*4882a593Smuzhiyun */
4372*4882a593Smuzhiyun cp->actualquirks = 0;
4373*4882a593Smuzhiyun cp->host_status = cp->nego_status ? HS_NEGOTIATE : HS_BUSY;
4374*4882a593Smuzhiyun cp->scsi_status = S_ILLEGAL;
4375*4882a593Smuzhiyun cp->parity_status = 0;
4376*4882a593Smuzhiyun
4377*4882a593Smuzhiyun cp->xerr_status = XE_OK;
4378*4882a593Smuzhiyun #if 0
4379*4882a593Smuzhiyun cp->sync_status = tp->sval;
4380*4882a593Smuzhiyun cp->wide_status = tp->wval;
4381*4882a593Smuzhiyun #endif
4382*4882a593Smuzhiyun
4383*4882a593Smuzhiyun /*----------------------------------------------------
4384*4882a593Smuzhiyun **
4385*4882a593Smuzhiyun ** Critical region: start this job.
4386*4882a593Smuzhiyun **
4387*4882a593Smuzhiyun **----------------------------------------------------
4388*4882a593Smuzhiyun */
4389*4882a593Smuzhiyun
4390*4882a593Smuzhiyun /* activate this job. */
4391*4882a593Smuzhiyun cp->magic = CCB_MAGIC;
4392*4882a593Smuzhiyun
4393*4882a593Smuzhiyun /*
4394*4882a593Smuzhiyun ** insert next CCBs into start queue.
4395*4882a593Smuzhiyun ** 2 max at a time is enough to flush the CCB wait queue.
4396*4882a593Smuzhiyun */
4397*4882a593Smuzhiyun cp->auto_sense = 0;
4398*4882a593Smuzhiyun if (lp)
4399*4882a593Smuzhiyun ncr_start_next_ccb(np, lp, 2);
4400*4882a593Smuzhiyun else
4401*4882a593Smuzhiyun ncr_put_start_queue(np, cp);
4402*4882a593Smuzhiyun
4403*4882a593Smuzhiyun /* Command is successfully queued. */
4404*4882a593Smuzhiyun
4405*4882a593Smuzhiyun return DID_OK;
4406*4882a593Smuzhiyun }
4407*4882a593Smuzhiyun
4408*4882a593Smuzhiyun
4409*4882a593Smuzhiyun /*==========================================================
4410*4882a593Smuzhiyun **
4411*4882a593Smuzhiyun **
4412*4882a593Smuzhiyun ** Insert a CCB into the start queue and wake up the
4413*4882a593Smuzhiyun ** SCRIPTS processor.
4414*4882a593Smuzhiyun **
4415*4882a593Smuzhiyun **
4416*4882a593Smuzhiyun **==========================================================
4417*4882a593Smuzhiyun */
4418*4882a593Smuzhiyun
ncr_start_next_ccb(struct ncb * np,struct lcb * lp,int maxn)4419*4882a593Smuzhiyun static void ncr_start_next_ccb(struct ncb *np, struct lcb *lp, int maxn)
4420*4882a593Smuzhiyun {
4421*4882a593Smuzhiyun struct list_head *qp;
4422*4882a593Smuzhiyun struct ccb *cp;
4423*4882a593Smuzhiyun
4424*4882a593Smuzhiyun if (lp->held_ccb)
4425*4882a593Smuzhiyun return;
4426*4882a593Smuzhiyun
4427*4882a593Smuzhiyun while (maxn-- && lp->queuedccbs < lp->queuedepth) {
4428*4882a593Smuzhiyun qp = ncr_list_pop(&lp->wait_ccbq);
4429*4882a593Smuzhiyun if (!qp)
4430*4882a593Smuzhiyun break;
4431*4882a593Smuzhiyun ++lp->queuedccbs;
4432*4882a593Smuzhiyun cp = list_entry(qp, struct ccb, link_ccbq);
4433*4882a593Smuzhiyun list_add_tail(qp, &lp->busy_ccbq);
4434*4882a593Smuzhiyun lp->jump_ccb[cp->tag == NO_TAG ? 0 : cp->tag] =
4435*4882a593Smuzhiyun cpu_to_scr(CCB_PHYS (cp, restart));
4436*4882a593Smuzhiyun ncr_put_start_queue(np, cp);
4437*4882a593Smuzhiyun }
4438*4882a593Smuzhiyun }
4439*4882a593Smuzhiyun
ncr_put_start_queue(struct ncb * np,struct ccb * cp)4440*4882a593Smuzhiyun static void ncr_put_start_queue(struct ncb *np, struct ccb *cp)
4441*4882a593Smuzhiyun {
4442*4882a593Smuzhiyun u16 qidx;
4443*4882a593Smuzhiyun
4444*4882a593Smuzhiyun /*
4445*4882a593Smuzhiyun ** insert into start queue.
4446*4882a593Smuzhiyun */
4447*4882a593Smuzhiyun if (!np->squeueput) np->squeueput = 1;
4448*4882a593Smuzhiyun qidx = np->squeueput + 2;
4449*4882a593Smuzhiyun if (qidx >= MAX_START + MAX_START) qidx = 1;
4450*4882a593Smuzhiyun
4451*4882a593Smuzhiyun np->scripth->tryloop [qidx] = cpu_to_scr(NCB_SCRIPT_PHYS (np, idle));
4452*4882a593Smuzhiyun MEMORY_BARRIER();
4453*4882a593Smuzhiyun np->scripth->tryloop [np->squeueput] = cpu_to_scr(CCB_PHYS (cp, start));
4454*4882a593Smuzhiyun
4455*4882a593Smuzhiyun np->squeueput = qidx;
4456*4882a593Smuzhiyun ++np->queuedccbs;
4457*4882a593Smuzhiyun cp->queued = 1;
4458*4882a593Smuzhiyun
4459*4882a593Smuzhiyun if (DEBUG_FLAGS & DEBUG_QUEUE)
4460*4882a593Smuzhiyun printk ("%s: queuepos=%d.\n", ncr_name (np), np->squeueput);
4461*4882a593Smuzhiyun
4462*4882a593Smuzhiyun /*
4463*4882a593Smuzhiyun ** Script processor may be waiting for reselect.
4464*4882a593Smuzhiyun ** Wake it up.
4465*4882a593Smuzhiyun */
4466*4882a593Smuzhiyun MEMORY_BARRIER();
4467*4882a593Smuzhiyun OUTB (nc_istat, SIGP);
4468*4882a593Smuzhiyun }
4469*4882a593Smuzhiyun
4470*4882a593Smuzhiyun
ncr_reset_scsi_bus(struct ncb * np,int enab_int,int settle_delay)4471*4882a593Smuzhiyun static int ncr_reset_scsi_bus(struct ncb *np, int enab_int, int settle_delay)
4472*4882a593Smuzhiyun {
4473*4882a593Smuzhiyun u32 term;
4474*4882a593Smuzhiyun int retv = 0;
4475*4882a593Smuzhiyun
4476*4882a593Smuzhiyun np->settle_time = jiffies + settle_delay * HZ;
4477*4882a593Smuzhiyun
4478*4882a593Smuzhiyun if (bootverbose > 1)
4479*4882a593Smuzhiyun printk("%s: resetting, "
4480*4882a593Smuzhiyun "command processing suspended for %d seconds\n",
4481*4882a593Smuzhiyun ncr_name(np), settle_delay);
4482*4882a593Smuzhiyun
4483*4882a593Smuzhiyun ncr_chip_reset(np, 100);
4484*4882a593Smuzhiyun udelay(2000); /* The 895 needs time for the bus mode to settle */
4485*4882a593Smuzhiyun if (enab_int)
4486*4882a593Smuzhiyun OUTW (nc_sien, RST);
4487*4882a593Smuzhiyun /*
4488*4882a593Smuzhiyun ** Enable Tolerant, reset IRQD if present and
4489*4882a593Smuzhiyun ** properly set IRQ mode, prior to resetting the bus.
4490*4882a593Smuzhiyun */
4491*4882a593Smuzhiyun OUTB (nc_stest3, TE);
4492*4882a593Smuzhiyun OUTB (nc_scntl1, CRST);
4493*4882a593Smuzhiyun udelay(200);
4494*4882a593Smuzhiyun
4495*4882a593Smuzhiyun if (!driver_setup.bus_check)
4496*4882a593Smuzhiyun goto out;
4497*4882a593Smuzhiyun /*
4498*4882a593Smuzhiyun ** Check for no terminators or SCSI bus shorts to ground.
4499*4882a593Smuzhiyun ** Read SCSI data bus, data parity bits and control signals.
4500*4882a593Smuzhiyun ** We are expecting RESET to be TRUE and other signals to be
4501*4882a593Smuzhiyun ** FALSE.
4502*4882a593Smuzhiyun */
4503*4882a593Smuzhiyun
4504*4882a593Smuzhiyun term = INB(nc_sstat0);
4505*4882a593Smuzhiyun term = ((term & 2) << 7) + ((term & 1) << 17); /* rst sdp0 */
4506*4882a593Smuzhiyun term |= ((INB(nc_sstat2) & 0x01) << 26) | /* sdp1 */
4507*4882a593Smuzhiyun ((INW(nc_sbdl) & 0xff) << 9) | /* d7-0 */
4508*4882a593Smuzhiyun ((INW(nc_sbdl) & 0xff00) << 10) | /* d15-8 */
4509*4882a593Smuzhiyun INB(nc_sbcl); /* req ack bsy sel atn msg cd io */
4510*4882a593Smuzhiyun
4511*4882a593Smuzhiyun if (!(np->features & FE_WIDE))
4512*4882a593Smuzhiyun term &= 0x3ffff;
4513*4882a593Smuzhiyun
4514*4882a593Smuzhiyun if (term != (2<<7)) {
4515*4882a593Smuzhiyun printk("%s: suspicious SCSI data while resetting the BUS.\n",
4516*4882a593Smuzhiyun ncr_name(np));
4517*4882a593Smuzhiyun printk("%s: %sdp0,d7-0,rst,req,ack,bsy,sel,atn,msg,c/d,i/o = "
4518*4882a593Smuzhiyun "0x%lx, expecting 0x%lx\n",
4519*4882a593Smuzhiyun ncr_name(np),
4520*4882a593Smuzhiyun (np->features & FE_WIDE) ? "dp1,d15-8," : "",
4521*4882a593Smuzhiyun (u_long)term, (u_long)(2<<7));
4522*4882a593Smuzhiyun if (driver_setup.bus_check == 1)
4523*4882a593Smuzhiyun retv = 1;
4524*4882a593Smuzhiyun }
4525*4882a593Smuzhiyun out:
4526*4882a593Smuzhiyun OUTB (nc_scntl1, 0);
4527*4882a593Smuzhiyun return retv;
4528*4882a593Smuzhiyun }
4529*4882a593Smuzhiyun
4530*4882a593Smuzhiyun /*
4531*4882a593Smuzhiyun * Start reset process.
4532*4882a593Smuzhiyun * If reset in progress do nothing.
4533*4882a593Smuzhiyun * The interrupt handler will reinitialize the chip.
4534*4882a593Smuzhiyun * The timeout handler will wait for settle_time before
4535*4882a593Smuzhiyun * clearing it and so resuming command processing.
4536*4882a593Smuzhiyun */
ncr_start_reset(struct ncb * np)4537*4882a593Smuzhiyun static void ncr_start_reset(struct ncb *np)
4538*4882a593Smuzhiyun {
4539*4882a593Smuzhiyun if (!np->settle_time) {
4540*4882a593Smuzhiyun ncr_reset_scsi_bus(np, 1, driver_setup.settle_delay);
4541*4882a593Smuzhiyun }
4542*4882a593Smuzhiyun }
4543*4882a593Smuzhiyun
4544*4882a593Smuzhiyun /*==========================================================
4545*4882a593Smuzhiyun **
4546*4882a593Smuzhiyun **
4547*4882a593Smuzhiyun ** Reset the SCSI BUS.
4548*4882a593Smuzhiyun ** This is called from the generic SCSI driver.
4549*4882a593Smuzhiyun **
4550*4882a593Smuzhiyun **
4551*4882a593Smuzhiyun **==========================================================
4552*4882a593Smuzhiyun */
ncr_reset_bus(struct ncb * np,struct scsi_cmnd * cmd,int sync_reset)4553*4882a593Smuzhiyun static int ncr_reset_bus (struct ncb *np, struct scsi_cmnd *cmd, int sync_reset)
4554*4882a593Smuzhiyun {
4555*4882a593Smuzhiyun /* struct scsi_device *device = cmd->device; */
4556*4882a593Smuzhiyun struct ccb *cp;
4557*4882a593Smuzhiyun int found;
4558*4882a593Smuzhiyun
4559*4882a593Smuzhiyun /*
4560*4882a593Smuzhiyun * Return immediately if reset is in progress.
4561*4882a593Smuzhiyun */
4562*4882a593Smuzhiyun if (np->settle_time) {
4563*4882a593Smuzhiyun return FAILED;
4564*4882a593Smuzhiyun }
4565*4882a593Smuzhiyun /*
4566*4882a593Smuzhiyun * Start the reset process.
4567*4882a593Smuzhiyun * The script processor is then assumed to be stopped.
4568*4882a593Smuzhiyun * Commands will now be queued in the waiting list until a settle
4569*4882a593Smuzhiyun * delay of 2 seconds will be completed.
4570*4882a593Smuzhiyun */
4571*4882a593Smuzhiyun ncr_start_reset(np);
4572*4882a593Smuzhiyun /*
4573*4882a593Smuzhiyun * First, look in the wakeup list
4574*4882a593Smuzhiyun */
4575*4882a593Smuzhiyun for (found=0, cp=np->ccb; cp; cp=cp->link_ccb) {
4576*4882a593Smuzhiyun /*
4577*4882a593Smuzhiyun ** look for the ccb of this command.
4578*4882a593Smuzhiyun */
4579*4882a593Smuzhiyun if (cp->host_status == HS_IDLE) continue;
4580*4882a593Smuzhiyun if (cp->cmd == cmd) {
4581*4882a593Smuzhiyun found = 1;
4582*4882a593Smuzhiyun break;
4583*4882a593Smuzhiyun }
4584*4882a593Smuzhiyun }
4585*4882a593Smuzhiyun /*
4586*4882a593Smuzhiyun * Then, look in the waiting list
4587*4882a593Smuzhiyun */
4588*4882a593Smuzhiyun if (!found && retrieve_from_waiting_list(0, np, cmd))
4589*4882a593Smuzhiyun found = 1;
4590*4882a593Smuzhiyun /*
4591*4882a593Smuzhiyun * Wake-up all awaiting commands with DID_RESET.
4592*4882a593Smuzhiyun */
4593*4882a593Smuzhiyun reset_waiting_list(np);
4594*4882a593Smuzhiyun /*
4595*4882a593Smuzhiyun * Wake-up all pending commands with HS_RESET -> DID_RESET.
4596*4882a593Smuzhiyun */
4597*4882a593Smuzhiyun ncr_wakeup(np, HS_RESET);
4598*4882a593Smuzhiyun /*
4599*4882a593Smuzhiyun * If the involved command was not in a driver queue, and the
4600*4882a593Smuzhiyun * scsi driver told us reset is synchronous, and the command is not
4601*4882a593Smuzhiyun * currently in the waiting list, complete it with DID_RESET status,
4602*4882a593Smuzhiyun * in order to keep it alive.
4603*4882a593Smuzhiyun */
4604*4882a593Smuzhiyun if (!found && sync_reset && !retrieve_from_waiting_list(0, np, cmd)) {
4605*4882a593Smuzhiyun cmd->result = DID_RESET << 16;
4606*4882a593Smuzhiyun ncr_queue_done_cmd(np, cmd);
4607*4882a593Smuzhiyun }
4608*4882a593Smuzhiyun
4609*4882a593Smuzhiyun return SUCCESS;
4610*4882a593Smuzhiyun }
4611*4882a593Smuzhiyun
4612*4882a593Smuzhiyun #if 0 /* unused and broken.. */
4613*4882a593Smuzhiyun /*==========================================================
4614*4882a593Smuzhiyun **
4615*4882a593Smuzhiyun **
4616*4882a593Smuzhiyun ** Abort an SCSI command.
4617*4882a593Smuzhiyun ** This is called from the generic SCSI driver.
4618*4882a593Smuzhiyun **
4619*4882a593Smuzhiyun **
4620*4882a593Smuzhiyun **==========================================================
4621*4882a593Smuzhiyun */
4622*4882a593Smuzhiyun static int ncr_abort_command (struct ncb *np, struct scsi_cmnd *cmd)
4623*4882a593Smuzhiyun {
4624*4882a593Smuzhiyun /* struct scsi_device *device = cmd->device; */
4625*4882a593Smuzhiyun struct ccb *cp;
4626*4882a593Smuzhiyun int found;
4627*4882a593Smuzhiyun int retv;
4628*4882a593Smuzhiyun
4629*4882a593Smuzhiyun /*
4630*4882a593Smuzhiyun * First, look for the scsi command in the waiting list
4631*4882a593Smuzhiyun */
4632*4882a593Smuzhiyun if (remove_from_waiting_list(np, cmd)) {
4633*4882a593Smuzhiyun cmd->result = ScsiResult(DID_ABORT, 0);
4634*4882a593Smuzhiyun ncr_queue_done_cmd(np, cmd);
4635*4882a593Smuzhiyun return SCSI_ABORT_SUCCESS;
4636*4882a593Smuzhiyun }
4637*4882a593Smuzhiyun
4638*4882a593Smuzhiyun /*
4639*4882a593Smuzhiyun * Then, look in the wakeup list
4640*4882a593Smuzhiyun */
4641*4882a593Smuzhiyun for (found=0, cp=np->ccb; cp; cp=cp->link_ccb) {
4642*4882a593Smuzhiyun /*
4643*4882a593Smuzhiyun ** look for the ccb of this command.
4644*4882a593Smuzhiyun */
4645*4882a593Smuzhiyun if (cp->host_status == HS_IDLE) continue;
4646*4882a593Smuzhiyun if (cp->cmd == cmd) {
4647*4882a593Smuzhiyun found = 1;
4648*4882a593Smuzhiyun break;
4649*4882a593Smuzhiyun }
4650*4882a593Smuzhiyun }
4651*4882a593Smuzhiyun
4652*4882a593Smuzhiyun if (!found) {
4653*4882a593Smuzhiyun return SCSI_ABORT_NOT_RUNNING;
4654*4882a593Smuzhiyun }
4655*4882a593Smuzhiyun
4656*4882a593Smuzhiyun if (np->settle_time) {
4657*4882a593Smuzhiyun return SCSI_ABORT_SNOOZE;
4658*4882a593Smuzhiyun }
4659*4882a593Smuzhiyun
4660*4882a593Smuzhiyun /*
4661*4882a593Smuzhiyun ** If the CCB is active, patch schedule jumps for the
4662*4882a593Smuzhiyun ** script to abort the command.
4663*4882a593Smuzhiyun */
4664*4882a593Smuzhiyun
4665*4882a593Smuzhiyun switch(cp->host_status) {
4666*4882a593Smuzhiyun case HS_BUSY:
4667*4882a593Smuzhiyun case HS_NEGOTIATE:
4668*4882a593Smuzhiyun printk ("%s: abort ccb=%p (cancel)\n", ncr_name (np), cp);
4669*4882a593Smuzhiyun cp->start.schedule.l_paddr =
4670*4882a593Smuzhiyun cpu_to_scr(NCB_SCRIPTH_PHYS (np, cancel));
4671*4882a593Smuzhiyun retv = SCSI_ABORT_PENDING;
4672*4882a593Smuzhiyun break;
4673*4882a593Smuzhiyun case HS_DISCONNECT:
4674*4882a593Smuzhiyun cp->restart.schedule.l_paddr =
4675*4882a593Smuzhiyun cpu_to_scr(NCB_SCRIPTH_PHYS (np, abort));
4676*4882a593Smuzhiyun retv = SCSI_ABORT_PENDING;
4677*4882a593Smuzhiyun break;
4678*4882a593Smuzhiyun default:
4679*4882a593Smuzhiyun retv = SCSI_ABORT_NOT_RUNNING;
4680*4882a593Smuzhiyun break;
4681*4882a593Smuzhiyun
4682*4882a593Smuzhiyun }
4683*4882a593Smuzhiyun
4684*4882a593Smuzhiyun /*
4685*4882a593Smuzhiyun ** If there are no requests, the script
4686*4882a593Smuzhiyun ** processor will sleep on SEL_WAIT_RESEL.
4687*4882a593Smuzhiyun ** Let's wake it up, since it may have to work.
4688*4882a593Smuzhiyun */
4689*4882a593Smuzhiyun OUTB (nc_istat, SIGP);
4690*4882a593Smuzhiyun
4691*4882a593Smuzhiyun return retv;
4692*4882a593Smuzhiyun }
4693*4882a593Smuzhiyun #endif
4694*4882a593Smuzhiyun
ncr_detach(struct ncb * np)4695*4882a593Smuzhiyun static void ncr_detach(struct ncb *np)
4696*4882a593Smuzhiyun {
4697*4882a593Smuzhiyun struct ccb *cp;
4698*4882a593Smuzhiyun struct tcb *tp;
4699*4882a593Smuzhiyun struct lcb *lp;
4700*4882a593Smuzhiyun int target, lun;
4701*4882a593Smuzhiyun int i;
4702*4882a593Smuzhiyun char inst_name[16];
4703*4882a593Smuzhiyun
4704*4882a593Smuzhiyun /* Local copy so we don't access np after freeing it! */
4705*4882a593Smuzhiyun strlcpy(inst_name, ncr_name(np), sizeof(inst_name));
4706*4882a593Smuzhiyun
4707*4882a593Smuzhiyun printk("%s: releasing host resources\n", ncr_name(np));
4708*4882a593Smuzhiyun
4709*4882a593Smuzhiyun /*
4710*4882a593Smuzhiyun ** Stop the ncr_timeout process
4711*4882a593Smuzhiyun ** Set release_stage to 1 and wait that ncr_timeout() set it to 2.
4712*4882a593Smuzhiyun */
4713*4882a593Smuzhiyun
4714*4882a593Smuzhiyun #ifdef DEBUG_NCR53C8XX
4715*4882a593Smuzhiyun printk("%s: stopping the timer\n", ncr_name(np));
4716*4882a593Smuzhiyun #endif
4717*4882a593Smuzhiyun np->release_stage = 1;
4718*4882a593Smuzhiyun for (i = 50 ; i && np->release_stage != 2 ; i--)
4719*4882a593Smuzhiyun mdelay(100);
4720*4882a593Smuzhiyun if (np->release_stage != 2)
4721*4882a593Smuzhiyun printk("%s: the timer seems to be already stopped\n", ncr_name(np));
4722*4882a593Smuzhiyun else np->release_stage = 2;
4723*4882a593Smuzhiyun
4724*4882a593Smuzhiyun /*
4725*4882a593Smuzhiyun ** Disable chip interrupts
4726*4882a593Smuzhiyun */
4727*4882a593Smuzhiyun
4728*4882a593Smuzhiyun #ifdef DEBUG_NCR53C8XX
4729*4882a593Smuzhiyun printk("%s: disabling chip interrupts\n", ncr_name(np));
4730*4882a593Smuzhiyun #endif
4731*4882a593Smuzhiyun OUTW (nc_sien , 0);
4732*4882a593Smuzhiyun OUTB (nc_dien , 0);
4733*4882a593Smuzhiyun
4734*4882a593Smuzhiyun /*
4735*4882a593Smuzhiyun ** Reset NCR chip
4736*4882a593Smuzhiyun ** Restore bios setting for automatic clock detection.
4737*4882a593Smuzhiyun */
4738*4882a593Smuzhiyun
4739*4882a593Smuzhiyun printk("%s: resetting chip\n", ncr_name(np));
4740*4882a593Smuzhiyun ncr_chip_reset(np, 100);
4741*4882a593Smuzhiyun
4742*4882a593Smuzhiyun OUTB(nc_dmode, np->sv_dmode);
4743*4882a593Smuzhiyun OUTB(nc_dcntl, np->sv_dcntl);
4744*4882a593Smuzhiyun OUTB(nc_ctest0, np->sv_ctest0);
4745*4882a593Smuzhiyun OUTB(nc_ctest3, np->sv_ctest3);
4746*4882a593Smuzhiyun OUTB(nc_ctest4, np->sv_ctest4);
4747*4882a593Smuzhiyun OUTB(nc_ctest5, np->sv_ctest5);
4748*4882a593Smuzhiyun OUTB(nc_gpcntl, np->sv_gpcntl);
4749*4882a593Smuzhiyun OUTB(nc_stest2, np->sv_stest2);
4750*4882a593Smuzhiyun
4751*4882a593Smuzhiyun ncr_selectclock(np, np->sv_scntl3);
4752*4882a593Smuzhiyun
4753*4882a593Smuzhiyun /*
4754*4882a593Smuzhiyun ** Free allocated ccb(s)
4755*4882a593Smuzhiyun */
4756*4882a593Smuzhiyun
4757*4882a593Smuzhiyun while ((cp=np->ccb->link_ccb) != NULL) {
4758*4882a593Smuzhiyun np->ccb->link_ccb = cp->link_ccb;
4759*4882a593Smuzhiyun if (cp->host_status) {
4760*4882a593Smuzhiyun printk("%s: shall free an active ccb (host_status=%d)\n",
4761*4882a593Smuzhiyun ncr_name(np), cp->host_status);
4762*4882a593Smuzhiyun }
4763*4882a593Smuzhiyun #ifdef DEBUG_NCR53C8XX
4764*4882a593Smuzhiyun printk("%s: freeing ccb (%lx)\n", ncr_name(np), (u_long) cp);
4765*4882a593Smuzhiyun #endif
4766*4882a593Smuzhiyun m_free_dma(cp, sizeof(*cp), "CCB");
4767*4882a593Smuzhiyun }
4768*4882a593Smuzhiyun
4769*4882a593Smuzhiyun /* Free allocated tp(s) */
4770*4882a593Smuzhiyun
4771*4882a593Smuzhiyun for (target = 0; target < MAX_TARGET ; target++) {
4772*4882a593Smuzhiyun tp=&np->target[target];
4773*4882a593Smuzhiyun for (lun = 0 ; lun < MAX_LUN ; lun++) {
4774*4882a593Smuzhiyun lp = tp->lp[lun];
4775*4882a593Smuzhiyun if (lp) {
4776*4882a593Smuzhiyun #ifdef DEBUG_NCR53C8XX
4777*4882a593Smuzhiyun printk("%s: freeing lp (%lx)\n", ncr_name(np), (u_long) lp);
4778*4882a593Smuzhiyun #endif
4779*4882a593Smuzhiyun if (lp->jump_ccb != &lp->jump_ccb_0)
4780*4882a593Smuzhiyun m_free_dma(lp->jump_ccb,256,"JUMP_CCB");
4781*4882a593Smuzhiyun m_free_dma(lp, sizeof(*lp), "LCB");
4782*4882a593Smuzhiyun }
4783*4882a593Smuzhiyun }
4784*4882a593Smuzhiyun }
4785*4882a593Smuzhiyun
4786*4882a593Smuzhiyun if (np->scripth0)
4787*4882a593Smuzhiyun m_free_dma(np->scripth0, sizeof(struct scripth), "SCRIPTH");
4788*4882a593Smuzhiyun if (np->script0)
4789*4882a593Smuzhiyun m_free_dma(np->script0, sizeof(struct script), "SCRIPT");
4790*4882a593Smuzhiyun if (np->ccb)
4791*4882a593Smuzhiyun m_free_dma(np->ccb, sizeof(struct ccb), "CCB");
4792*4882a593Smuzhiyun m_free_dma(np, sizeof(struct ncb), "NCB");
4793*4882a593Smuzhiyun
4794*4882a593Smuzhiyun printk("%s: host resources successfully released\n", inst_name);
4795*4882a593Smuzhiyun }
4796*4882a593Smuzhiyun
4797*4882a593Smuzhiyun /*==========================================================
4798*4882a593Smuzhiyun **
4799*4882a593Smuzhiyun **
4800*4882a593Smuzhiyun ** Complete execution of a SCSI command.
4801*4882a593Smuzhiyun ** Signal completion to the generic SCSI driver.
4802*4882a593Smuzhiyun **
4803*4882a593Smuzhiyun **
4804*4882a593Smuzhiyun **==========================================================
4805*4882a593Smuzhiyun */
4806*4882a593Smuzhiyun
ncr_complete(struct ncb * np,struct ccb * cp)4807*4882a593Smuzhiyun void ncr_complete (struct ncb *np, struct ccb *cp)
4808*4882a593Smuzhiyun {
4809*4882a593Smuzhiyun struct scsi_cmnd *cmd;
4810*4882a593Smuzhiyun struct tcb *tp;
4811*4882a593Smuzhiyun struct lcb *lp;
4812*4882a593Smuzhiyun
4813*4882a593Smuzhiyun /*
4814*4882a593Smuzhiyun ** Sanity check
4815*4882a593Smuzhiyun */
4816*4882a593Smuzhiyun
4817*4882a593Smuzhiyun if (!cp || cp->magic != CCB_MAGIC || !cp->cmd)
4818*4882a593Smuzhiyun return;
4819*4882a593Smuzhiyun
4820*4882a593Smuzhiyun /*
4821*4882a593Smuzhiyun ** Print minimal debug information.
4822*4882a593Smuzhiyun */
4823*4882a593Smuzhiyun
4824*4882a593Smuzhiyun if (DEBUG_FLAGS & DEBUG_TINY)
4825*4882a593Smuzhiyun printk ("CCB=%lx STAT=%x/%x\n", (unsigned long)cp,
4826*4882a593Smuzhiyun cp->host_status,cp->scsi_status);
4827*4882a593Smuzhiyun
4828*4882a593Smuzhiyun /*
4829*4882a593Smuzhiyun ** Get command, target and lun pointers.
4830*4882a593Smuzhiyun */
4831*4882a593Smuzhiyun
4832*4882a593Smuzhiyun cmd = cp->cmd;
4833*4882a593Smuzhiyun cp->cmd = NULL;
4834*4882a593Smuzhiyun tp = &np->target[cmd->device->id];
4835*4882a593Smuzhiyun lp = tp->lp[cmd->device->lun];
4836*4882a593Smuzhiyun
4837*4882a593Smuzhiyun /*
4838*4882a593Smuzhiyun ** We donnot queue more than 1 ccb per target
4839*4882a593Smuzhiyun ** with negotiation at any time. If this ccb was
4840*4882a593Smuzhiyun ** used for negotiation, clear this info in the tcb.
4841*4882a593Smuzhiyun */
4842*4882a593Smuzhiyun
4843*4882a593Smuzhiyun if (cp == tp->nego_cp)
4844*4882a593Smuzhiyun tp->nego_cp = NULL;
4845*4882a593Smuzhiyun
4846*4882a593Smuzhiyun /*
4847*4882a593Smuzhiyun ** If auto-sense performed, change scsi status.
4848*4882a593Smuzhiyun */
4849*4882a593Smuzhiyun if (cp->auto_sense) {
4850*4882a593Smuzhiyun cp->scsi_status = cp->auto_sense;
4851*4882a593Smuzhiyun }
4852*4882a593Smuzhiyun
4853*4882a593Smuzhiyun /*
4854*4882a593Smuzhiyun ** If we were recovering from queue full or performing
4855*4882a593Smuzhiyun ** auto-sense, requeue skipped CCBs to the wait queue.
4856*4882a593Smuzhiyun */
4857*4882a593Smuzhiyun
4858*4882a593Smuzhiyun if (lp && lp->held_ccb) {
4859*4882a593Smuzhiyun if (cp == lp->held_ccb) {
4860*4882a593Smuzhiyun list_splice_init(&lp->skip_ccbq, &lp->wait_ccbq);
4861*4882a593Smuzhiyun lp->held_ccb = NULL;
4862*4882a593Smuzhiyun }
4863*4882a593Smuzhiyun }
4864*4882a593Smuzhiyun
4865*4882a593Smuzhiyun /*
4866*4882a593Smuzhiyun ** Check for parity errors.
4867*4882a593Smuzhiyun */
4868*4882a593Smuzhiyun
4869*4882a593Smuzhiyun if (cp->parity_status > 1) {
4870*4882a593Smuzhiyun PRINT_ADDR(cmd, "%d parity error(s).\n",cp->parity_status);
4871*4882a593Smuzhiyun }
4872*4882a593Smuzhiyun
4873*4882a593Smuzhiyun /*
4874*4882a593Smuzhiyun ** Check for extended errors.
4875*4882a593Smuzhiyun */
4876*4882a593Smuzhiyun
4877*4882a593Smuzhiyun if (cp->xerr_status != XE_OK) {
4878*4882a593Smuzhiyun switch (cp->xerr_status) {
4879*4882a593Smuzhiyun case XE_EXTRA_DATA:
4880*4882a593Smuzhiyun PRINT_ADDR(cmd, "extraneous data discarded.\n");
4881*4882a593Smuzhiyun break;
4882*4882a593Smuzhiyun case XE_BAD_PHASE:
4883*4882a593Smuzhiyun PRINT_ADDR(cmd, "invalid scsi phase (4/5).\n");
4884*4882a593Smuzhiyun break;
4885*4882a593Smuzhiyun default:
4886*4882a593Smuzhiyun PRINT_ADDR(cmd, "extended error %d.\n",
4887*4882a593Smuzhiyun cp->xerr_status);
4888*4882a593Smuzhiyun break;
4889*4882a593Smuzhiyun }
4890*4882a593Smuzhiyun if (cp->host_status==HS_COMPLETE)
4891*4882a593Smuzhiyun cp->host_status = HS_FAIL;
4892*4882a593Smuzhiyun }
4893*4882a593Smuzhiyun
4894*4882a593Smuzhiyun /*
4895*4882a593Smuzhiyun ** Print out any error for debugging purpose.
4896*4882a593Smuzhiyun */
4897*4882a593Smuzhiyun if (DEBUG_FLAGS & (DEBUG_RESULT|DEBUG_TINY)) {
4898*4882a593Smuzhiyun if (cp->host_status!=HS_COMPLETE || cp->scsi_status!=S_GOOD) {
4899*4882a593Smuzhiyun PRINT_ADDR(cmd, "ERROR: cmd=%x host_status=%x "
4900*4882a593Smuzhiyun "scsi_status=%x\n", cmd->cmnd[0],
4901*4882a593Smuzhiyun cp->host_status, cp->scsi_status);
4902*4882a593Smuzhiyun }
4903*4882a593Smuzhiyun }
4904*4882a593Smuzhiyun
4905*4882a593Smuzhiyun /*
4906*4882a593Smuzhiyun ** Check the status.
4907*4882a593Smuzhiyun */
4908*4882a593Smuzhiyun if ( (cp->host_status == HS_COMPLETE)
4909*4882a593Smuzhiyun && (cp->scsi_status == S_GOOD ||
4910*4882a593Smuzhiyun cp->scsi_status == S_COND_MET)) {
4911*4882a593Smuzhiyun /*
4912*4882a593Smuzhiyun * All went well (GOOD status).
4913*4882a593Smuzhiyun * CONDITION MET status is returned on
4914*4882a593Smuzhiyun * `Pre-Fetch' or `Search data' success.
4915*4882a593Smuzhiyun */
4916*4882a593Smuzhiyun cmd->result = ScsiResult(DID_OK, cp->scsi_status);
4917*4882a593Smuzhiyun
4918*4882a593Smuzhiyun /*
4919*4882a593Smuzhiyun ** @RESID@
4920*4882a593Smuzhiyun ** Could dig out the correct value for resid,
4921*4882a593Smuzhiyun ** but it would be quite complicated.
4922*4882a593Smuzhiyun */
4923*4882a593Smuzhiyun /* if (cp->phys.header.lastp != cp->phys.header.goalp) */
4924*4882a593Smuzhiyun
4925*4882a593Smuzhiyun /*
4926*4882a593Smuzhiyun ** Allocate the lcb if not yet.
4927*4882a593Smuzhiyun */
4928*4882a593Smuzhiyun if (!lp)
4929*4882a593Smuzhiyun ncr_alloc_lcb (np, cmd->device->id, cmd->device->lun);
4930*4882a593Smuzhiyun
4931*4882a593Smuzhiyun tp->bytes += cp->data_len;
4932*4882a593Smuzhiyun tp->transfers ++;
4933*4882a593Smuzhiyun
4934*4882a593Smuzhiyun /*
4935*4882a593Smuzhiyun ** If tags was reduced due to queue full,
4936*4882a593Smuzhiyun ** increase tags if 1000 good status received.
4937*4882a593Smuzhiyun */
4938*4882a593Smuzhiyun if (lp && lp->usetags && lp->numtags < lp->maxtags) {
4939*4882a593Smuzhiyun ++lp->num_good;
4940*4882a593Smuzhiyun if (lp->num_good >= 1000) {
4941*4882a593Smuzhiyun lp->num_good = 0;
4942*4882a593Smuzhiyun ++lp->numtags;
4943*4882a593Smuzhiyun ncr_setup_tags (np, cmd->device);
4944*4882a593Smuzhiyun }
4945*4882a593Smuzhiyun }
4946*4882a593Smuzhiyun } else if ((cp->host_status == HS_COMPLETE)
4947*4882a593Smuzhiyun && (cp->scsi_status == S_CHECK_COND)) {
4948*4882a593Smuzhiyun /*
4949*4882a593Smuzhiyun ** Check condition code
4950*4882a593Smuzhiyun */
4951*4882a593Smuzhiyun cmd->result = DID_OK << 16 | S_CHECK_COND;
4952*4882a593Smuzhiyun
4953*4882a593Smuzhiyun /*
4954*4882a593Smuzhiyun ** Copy back sense data to caller's buffer.
4955*4882a593Smuzhiyun */
4956*4882a593Smuzhiyun memcpy(cmd->sense_buffer, cp->sense_buf,
4957*4882a593Smuzhiyun min_t(size_t, SCSI_SENSE_BUFFERSIZE,
4958*4882a593Smuzhiyun sizeof(cp->sense_buf)));
4959*4882a593Smuzhiyun
4960*4882a593Smuzhiyun if (DEBUG_FLAGS & (DEBUG_RESULT|DEBUG_TINY)) {
4961*4882a593Smuzhiyun u_char *p = cmd->sense_buffer;
4962*4882a593Smuzhiyun int i;
4963*4882a593Smuzhiyun PRINT_ADDR(cmd, "sense data:");
4964*4882a593Smuzhiyun for (i=0; i<14; i++) printk (" %x", *p++);
4965*4882a593Smuzhiyun printk (".\n");
4966*4882a593Smuzhiyun }
4967*4882a593Smuzhiyun } else if ((cp->host_status == HS_COMPLETE)
4968*4882a593Smuzhiyun && (cp->scsi_status == S_CONFLICT)) {
4969*4882a593Smuzhiyun /*
4970*4882a593Smuzhiyun ** Reservation Conflict condition code
4971*4882a593Smuzhiyun */
4972*4882a593Smuzhiyun cmd->result = DID_OK << 16 | S_CONFLICT;
4973*4882a593Smuzhiyun
4974*4882a593Smuzhiyun } else if ((cp->host_status == HS_COMPLETE)
4975*4882a593Smuzhiyun && (cp->scsi_status == S_BUSY ||
4976*4882a593Smuzhiyun cp->scsi_status == S_QUEUE_FULL)) {
4977*4882a593Smuzhiyun
4978*4882a593Smuzhiyun /*
4979*4882a593Smuzhiyun ** Target is busy.
4980*4882a593Smuzhiyun */
4981*4882a593Smuzhiyun cmd->result = ScsiResult(DID_OK, cp->scsi_status);
4982*4882a593Smuzhiyun
4983*4882a593Smuzhiyun } else if ((cp->host_status == HS_SEL_TIMEOUT)
4984*4882a593Smuzhiyun || (cp->host_status == HS_TIMEOUT)) {
4985*4882a593Smuzhiyun
4986*4882a593Smuzhiyun /*
4987*4882a593Smuzhiyun ** No response
4988*4882a593Smuzhiyun */
4989*4882a593Smuzhiyun cmd->result = ScsiResult(DID_TIME_OUT, cp->scsi_status);
4990*4882a593Smuzhiyun
4991*4882a593Smuzhiyun } else if (cp->host_status == HS_RESET) {
4992*4882a593Smuzhiyun
4993*4882a593Smuzhiyun /*
4994*4882a593Smuzhiyun ** SCSI bus reset
4995*4882a593Smuzhiyun */
4996*4882a593Smuzhiyun cmd->result = ScsiResult(DID_RESET, cp->scsi_status);
4997*4882a593Smuzhiyun
4998*4882a593Smuzhiyun } else if (cp->host_status == HS_ABORTED) {
4999*4882a593Smuzhiyun
5000*4882a593Smuzhiyun /*
5001*4882a593Smuzhiyun ** Transfer aborted
5002*4882a593Smuzhiyun */
5003*4882a593Smuzhiyun cmd->result = ScsiResult(DID_ABORT, cp->scsi_status);
5004*4882a593Smuzhiyun
5005*4882a593Smuzhiyun } else {
5006*4882a593Smuzhiyun
5007*4882a593Smuzhiyun /*
5008*4882a593Smuzhiyun ** Other protocol messes
5009*4882a593Smuzhiyun */
5010*4882a593Smuzhiyun PRINT_ADDR(cmd, "COMMAND FAILED (%x %x) @%p.\n",
5011*4882a593Smuzhiyun cp->host_status, cp->scsi_status, cp);
5012*4882a593Smuzhiyun
5013*4882a593Smuzhiyun cmd->result = ScsiResult(DID_ERROR, cp->scsi_status);
5014*4882a593Smuzhiyun }
5015*4882a593Smuzhiyun
5016*4882a593Smuzhiyun /*
5017*4882a593Smuzhiyun ** trace output
5018*4882a593Smuzhiyun */
5019*4882a593Smuzhiyun
5020*4882a593Smuzhiyun if (tp->usrflag & UF_TRACE) {
5021*4882a593Smuzhiyun u_char * p;
5022*4882a593Smuzhiyun int i;
5023*4882a593Smuzhiyun PRINT_ADDR(cmd, " CMD:");
5024*4882a593Smuzhiyun p = (u_char*) &cmd->cmnd[0];
5025*4882a593Smuzhiyun for (i=0; i<cmd->cmd_len; i++) printk (" %x", *p++);
5026*4882a593Smuzhiyun
5027*4882a593Smuzhiyun if (cp->host_status==HS_COMPLETE) {
5028*4882a593Smuzhiyun switch (cp->scsi_status) {
5029*4882a593Smuzhiyun case S_GOOD:
5030*4882a593Smuzhiyun printk (" GOOD");
5031*4882a593Smuzhiyun break;
5032*4882a593Smuzhiyun case S_CHECK_COND:
5033*4882a593Smuzhiyun printk (" SENSE:");
5034*4882a593Smuzhiyun p = (u_char*) &cmd->sense_buffer;
5035*4882a593Smuzhiyun for (i=0; i<14; i++)
5036*4882a593Smuzhiyun printk (" %x", *p++);
5037*4882a593Smuzhiyun break;
5038*4882a593Smuzhiyun default:
5039*4882a593Smuzhiyun printk (" STAT: %x\n", cp->scsi_status);
5040*4882a593Smuzhiyun break;
5041*4882a593Smuzhiyun }
5042*4882a593Smuzhiyun } else printk (" HOSTERROR: %x", cp->host_status);
5043*4882a593Smuzhiyun printk ("\n");
5044*4882a593Smuzhiyun }
5045*4882a593Smuzhiyun
5046*4882a593Smuzhiyun /*
5047*4882a593Smuzhiyun ** Free this ccb
5048*4882a593Smuzhiyun */
5049*4882a593Smuzhiyun ncr_free_ccb (np, cp);
5050*4882a593Smuzhiyun
5051*4882a593Smuzhiyun /*
5052*4882a593Smuzhiyun ** requeue awaiting scsi commands for this lun.
5053*4882a593Smuzhiyun */
5054*4882a593Smuzhiyun if (lp && lp->queuedccbs < lp->queuedepth &&
5055*4882a593Smuzhiyun !list_empty(&lp->wait_ccbq))
5056*4882a593Smuzhiyun ncr_start_next_ccb(np, lp, 2);
5057*4882a593Smuzhiyun
5058*4882a593Smuzhiyun /*
5059*4882a593Smuzhiyun ** requeue awaiting scsi commands for this controller.
5060*4882a593Smuzhiyun */
5061*4882a593Smuzhiyun if (np->waiting_list)
5062*4882a593Smuzhiyun requeue_waiting_list(np);
5063*4882a593Smuzhiyun
5064*4882a593Smuzhiyun /*
5065*4882a593Smuzhiyun ** signal completion to generic driver.
5066*4882a593Smuzhiyun */
5067*4882a593Smuzhiyun ncr_queue_done_cmd(np, cmd);
5068*4882a593Smuzhiyun }
5069*4882a593Smuzhiyun
5070*4882a593Smuzhiyun /*==========================================================
5071*4882a593Smuzhiyun **
5072*4882a593Smuzhiyun **
5073*4882a593Smuzhiyun ** Signal all (or one) control block done.
5074*4882a593Smuzhiyun **
5075*4882a593Smuzhiyun **
5076*4882a593Smuzhiyun **==========================================================
5077*4882a593Smuzhiyun */
5078*4882a593Smuzhiyun
5079*4882a593Smuzhiyun /*
5080*4882a593Smuzhiyun ** This CCB has been skipped by the NCR.
5081*4882a593Smuzhiyun ** Queue it in the corresponding unit queue.
5082*4882a593Smuzhiyun */
ncr_ccb_skipped(struct ncb * np,struct ccb * cp)5083*4882a593Smuzhiyun static void ncr_ccb_skipped(struct ncb *np, struct ccb *cp)
5084*4882a593Smuzhiyun {
5085*4882a593Smuzhiyun struct tcb *tp = &np->target[cp->target];
5086*4882a593Smuzhiyun struct lcb *lp = tp->lp[cp->lun];
5087*4882a593Smuzhiyun
5088*4882a593Smuzhiyun if (lp && cp != np->ccb) {
5089*4882a593Smuzhiyun cp->host_status &= ~HS_SKIPMASK;
5090*4882a593Smuzhiyun cp->start.schedule.l_paddr =
5091*4882a593Smuzhiyun cpu_to_scr(NCB_SCRIPT_PHYS (np, select));
5092*4882a593Smuzhiyun list_move_tail(&cp->link_ccbq, &lp->skip_ccbq);
5093*4882a593Smuzhiyun if (cp->queued) {
5094*4882a593Smuzhiyun --lp->queuedccbs;
5095*4882a593Smuzhiyun }
5096*4882a593Smuzhiyun }
5097*4882a593Smuzhiyun if (cp->queued) {
5098*4882a593Smuzhiyun --np->queuedccbs;
5099*4882a593Smuzhiyun cp->queued = 0;
5100*4882a593Smuzhiyun }
5101*4882a593Smuzhiyun }
5102*4882a593Smuzhiyun
5103*4882a593Smuzhiyun /*
5104*4882a593Smuzhiyun ** The NCR has completed CCBs.
5105*4882a593Smuzhiyun ** Look at the DONE QUEUE if enabled, otherwise scan all CCBs
5106*4882a593Smuzhiyun */
ncr_wakeup_done(struct ncb * np)5107*4882a593Smuzhiyun void ncr_wakeup_done (struct ncb *np)
5108*4882a593Smuzhiyun {
5109*4882a593Smuzhiyun struct ccb *cp;
5110*4882a593Smuzhiyun #ifdef SCSI_NCR_CCB_DONE_SUPPORT
5111*4882a593Smuzhiyun int i, j;
5112*4882a593Smuzhiyun
5113*4882a593Smuzhiyun i = np->ccb_done_ic;
5114*4882a593Smuzhiyun while (1) {
5115*4882a593Smuzhiyun j = i+1;
5116*4882a593Smuzhiyun if (j >= MAX_DONE)
5117*4882a593Smuzhiyun j = 0;
5118*4882a593Smuzhiyun
5119*4882a593Smuzhiyun cp = np->ccb_done[j];
5120*4882a593Smuzhiyun if (!CCB_DONE_VALID(cp))
5121*4882a593Smuzhiyun break;
5122*4882a593Smuzhiyun
5123*4882a593Smuzhiyun np->ccb_done[j] = (struct ccb *)CCB_DONE_EMPTY;
5124*4882a593Smuzhiyun np->scripth->done_queue[5*j + 4] =
5125*4882a593Smuzhiyun cpu_to_scr(NCB_SCRIPT_PHYS (np, done_plug));
5126*4882a593Smuzhiyun MEMORY_BARRIER();
5127*4882a593Smuzhiyun np->scripth->done_queue[5*i + 4] =
5128*4882a593Smuzhiyun cpu_to_scr(NCB_SCRIPT_PHYS (np, done_end));
5129*4882a593Smuzhiyun
5130*4882a593Smuzhiyun if (cp->host_status & HS_DONEMASK)
5131*4882a593Smuzhiyun ncr_complete (np, cp);
5132*4882a593Smuzhiyun else if (cp->host_status & HS_SKIPMASK)
5133*4882a593Smuzhiyun ncr_ccb_skipped (np, cp);
5134*4882a593Smuzhiyun
5135*4882a593Smuzhiyun i = j;
5136*4882a593Smuzhiyun }
5137*4882a593Smuzhiyun np->ccb_done_ic = i;
5138*4882a593Smuzhiyun #else
5139*4882a593Smuzhiyun cp = np->ccb;
5140*4882a593Smuzhiyun while (cp) {
5141*4882a593Smuzhiyun if (cp->host_status & HS_DONEMASK)
5142*4882a593Smuzhiyun ncr_complete (np, cp);
5143*4882a593Smuzhiyun else if (cp->host_status & HS_SKIPMASK)
5144*4882a593Smuzhiyun ncr_ccb_skipped (np, cp);
5145*4882a593Smuzhiyun cp = cp->link_ccb;
5146*4882a593Smuzhiyun }
5147*4882a593Smuzhiyun #endif
5148*4882a593Smuzhiyun }
5149*4882a593Smuzhiyun
5150*4882a593Smuzhiyun /*
5151*4882a593Smuzhiyun ** Complete all active CCBs.
5152*4882a593Smuzhiyun */
ncr_wakeup(struct ncb * np,u_long code)5153*4882a593Smuzhiyun void ncr_wakeup (struct ncb *np, u_long code)
5154*4882a593Smuzhiyun {
5155*4882a593Smuzhiyun struct ccb *cp = np->ccb;
5156*4882a593Smuzhiyun
5157*4882a593Smuzhiyun while (cp) {
5158*4882a593Smuzhiyun if (cp->host_status != HS_IDLE) {
5159*4882a593Smuzhiyun cp->host_status = code;
5160*4882a593Smuzhiyun ncr_complete (np, cp);
5161*4882a593Smuzhiyun }
5162*4882a593Smuzhiyun cp = cp->link_ccb;
5163*4882a593Smuzhiyun }
5164*4882a593Smuzhiyun }
5165*4882a593Smuzhiyun
5166*4882a593Smuzhiyun /*
5167*4882a593Smuzhiyun ** Reset ncr chip.
5168*4882a593Smuzhiyun */
5169*4882a593Smuzhiyun
5170*4882a593Smuzhiyun /* Some initialisation must be done immediately following reset, for 53c720,
5171*4882a593Smuzhiyun * at least. EA (dcntl bit 5) isn't set here as it is set once only in
5172*4882a593Smuzhiyun * the _detect function.
5173*4882a593Smuzhiyun */
ncr_chip_reset(struct ncb * np,int delay)5174*4882a593Smuzhiyun static void ncr_chip_reset(struct ncb *np, int delay)
5175*4882a593Smuzhiyun {
5176*4882a593Smuzhiyun OUTB (nc_istat, SRST);
5177*4882a593Smuzhiyun udelay(delay);
5178*4882a593Smuzhiyun OUTB (nc_istat, 0 );
5179*4882a593Smuzhiyun
5180*4882a593Smuzhiyun if (np->features & FE_EHP)
5181*4882a593Smuzhiyun OUTB (nc_ctest0, EHP);
5182*4882a593Smuzhiyun if (np->features & FE_MUX)
5183*4882a593Smuzhiyun OUTB (nc_ctest4, MUX);
5184*4882a593Smuzhiyun }
5185*4882a593Smuzhiyun
5186*4882a593Smuzhiyun
5187*4882a593Smuzhiyun /*==========================================================
5188*4882a593Smuzhiyun **
5189*4882a593Smuzhiyun **
5190*4882a593Smuzhiyun ** Start NCR chip.
5191*4882a593Smuzhiyun **
5192*4882a593Smuzhiyun **
5193*4882a593Smuzhiyun **==========================================================
5194*4882a593Smuzhiyun */
5195*4882a593Smuzhiyun
ncr_init(struct ncb * np,int reset,char * msg,u_long code)5196*4882a593Smuzhiyun void ncr_init (struct ncb *np, int reset, char * msg, u_long code)
5197*4882a593Smuzhiyun {
5198*4882a593Smuzhiyun int i;
5199*4882a593Smuzhiyun
5200*4882a593Smuzhiyun /*
5201*4882a593Smuzhiyun ** Reset chip if asked, otherwise just clear fifos.
5202*4882a593Smuzhiyun */
5203*4882a593Smuzhiyun
5204*4882a593Smuzhiyun if (reset) {
5205*4882a593Smuzhiyun OUTB (nc_istat, SRST);
5206*4882a593Smuzhiyun udelay(100);
5207*4882a593Smuzhiyun }
5208*4882a593Smuzhiyun else {
5209*4882a593Smuzhiyun OUTB (nc_stest3, TE|CSF);
5210*4882a593Smuzhiyun OUTONB (nc_ctest3, CLF);
5211*4882a593Smuzhiyun }
5212*4882a593Smuzhiyun
5213*4882a593Smuzhiyun /*
5214*4882a593Smuzhiyun ** Message.
5215*4882a593Smuzhiyun */
5216*4882a593Smuzhiyun
5217*4882a593Smuzhiyun if (msg) printk (KERN_INFO "%s: restart (%s).\n", ncr_name (np), msg);
5218*4882a593Smuzhiyun
5219*4882a593Smuzhiyun /*
5220*4882a593Smuzhiyun ** Clear Start Queue
5221*4882a593Smuzhiyun */
5222*4882a593Smuzhiyun np->queuedepth = MAX_START - 1; /* 1 entry needed as end marker */
5223*4882a593Smuzhiyun for (i = 1; i < MAX_START + MAX_START; i += 2)
5224*4882a593Smuzhiyun np->scripth0->tryloop[i] =
5225*4882a593Smuzhiyun cpu_to_scr(NCB_SCRIPT_PHYS (np, idle));
5226*4882a593Smuzhiyun
5227*4882a593Smuzhiyun /*
5228*4882a593Smuzhiyun ** Start at first entry.
5229*4882a593Smuzhiyun */
5230*4882a593Smuzhiyun np->squeueput = 0;
5231*4882a593Smuzhiyun np->script0->startpos[0] = cpu_to_scr(NCB_SCRIPTH_PHYS (np, tryloop));
5232*4882a593Smuzhiyun
5233*4882a593Smuzhiyun #ifdef SCSI_NCR_CCB_DONE_SUPPORT
5234*4882a593Smuzhiyun /*
5235*4882a593Smuzhiyun ** Clear Done Queue
5236*4882a593Smuzhiyun */
5237*4882a593Smuzhiyun for (i = 0; i < MAX_DONE; i++) {
5238*4882a593Smuzhiyun np->ccb_done[i] = (struct ccb *)CCB_DONE_EMPTY;
5239*4882a593Smuzhiyun np->scripth0->done_queue[5*i + 4] =
5240*4882a593Smuzhiyun cpu_to_scr(NCB_SCRIPT_PHYS (np, done_end));
5241*4882a593Smuzhiyun }
5242*4882a593Smuzhiyun #endif
5243*4882a593Smuzhiyun
5244*4882a593Smuzhiyun /*
5245*4882a593Smuzhiyun ** Start at first entry.
5246*4882a593Smuzhiyun */
5247*4882a593Smuzhiyun np->script0->done_pos[0] = cpu_to_scr(NCB_SCRIPTH_PHYS (np,done_queue));
5248*4882a593Smuzhiyun np->ccb_done_ic = MAX_DONE-1;
5249*4882a593Smuzhiyun np->scripth0->done_queue[5*(MAX_DONE-1) + 4] =
5250*4882a593Smuzhiyun cpu_to_scr(NCB_SCRIPT_PHYS (np, done_plug));
5251*4882a593Smuzhiyun
5252*4882a593Smuzhiyun /*
5253*4882a593Smuzhiyun ** Wakeup all pending jobs.
5254*4882a593Smuzhiyun */
5255*4882a593Smuzhiyun ncr_wakeup (np, code);
5256*4882a593Smuzhiyun
5257*4882a593Smuzhiyun /*
5258*4882a593Smuzhiyun ** Init chip.
5259*4882a593Smuzhiyun */
5260*4882a593Smuzhiyun
5261*4882a593Smuzhiyun /*
5262*4882a593Smuzhiyun ** Remove reset; big delay because the 895 needs time for the
5263*4882a593Smuzhiyun ** bus mode to settle
5264*4882a593Smuzhiyun */
5265*4882a593Smuzhiyun ncr_chip_reset(np, 2000);
5266*4882a593Smuzhiyun
5267*4882a593Smuzhiyun OUTB (nc_scntl0, np->rv_scntl0 | 0xc0);
5268*4882a593Smuzhiyun /* full arb., ena parity, par->ATN */
5269*4882a593Smuzhiyun OUTB (nc_scntl1, 0x00); /* odd parity, and remove CRST!! */
5270*4882a593Smuzhiyun
5271*4882a593Smuzhiyun ncr_selectclock(np, np->rv_scntl3); /* Select SCSI clock */
5272*4882a593Smuzhiyun
5273*4882a593Smuzhiyun OUTB (nc_scid , RRE|np->myaddr); /* Adapter SCSI address */
5274*4882a593Smuzhiyun OUTW (nc_respid, 1ul<<np->myaddr); /* Id to respond to */
5275*4882a593Smuzhiyun OUTB (nc_istat , SIGP ); /* Signal Process */
5276*4882a593Smuzhiyun OUTB (nc_dmode , np->rv_dmode); /* Burst length, dma mode */
5277*4882a593Smuzhiyun OUTB (nc_ctest5, np->rv_ctest5); /* Large fifo + large burst */
5278*4882a593Smuzhiyun
5279*4882a593Smuzhiyun OUTB (nc_dcntl , NOCOM|np->rv_dcntl); /* Protect SFBR */
5280*4882a593Smuzhiyun OUTB (nc_ctest0, np->rv_ctest0); /* 720: CDIS and EHP */
5281*4882a593Smuzhiyun OUTB (nc_ctest3, np->rv_ctest3); /* Write and invalidate */
5282*4882a593Smuzhiyun OUTB (nc_ctest4, np->rv_ctest4); /* Master parity checking */
5283*4882a593Smuzhiyun
5284*4882a593Smuzhiyun OUTB (nc_stest2, EXT|np->rv_stest2); /* Extended Sreq/Sack filtering */
5285*4882a593Smuzhiyun OUTB (nc_stest3, TE); /* TolerANT enable */
5286*4882a593Smuzhiyun OUTB (nc_stime0, 0x0c ); /* HTH disabled STO 0.25 sec */
5287*4882a593Smuzhiyun
5288*4882a593Smuzhiyun /*
5289*4882a593Smuzhiyun ** Disable disconnects.
5290*4882a593Smuzhiyun */
5291*4882a593Smuzhiyun
5292*4882a593Smuzhiyun np->disc = 0;
5293*4882a593Smuzhiyun
5294*4882a593Smuzhiyun /*
5295*4882a593Smuzhiyun ** Enable GPIO0 pin for writing if LED support.
5296*4882a593Smuzhiyun */
5297*4882a593Smuzhiyun
5298*4882a593Smuzhiyun if (np->features & FE_LED0) {
5299*4882a593Smuzhiyun OUTOFFB (nc_gpcntl, 0x01);
5300*4882a593Smuzhiyun }
5301*4882a593Smuzhiyun
5302*4882a593Smuzhiyun /*
5303*4882a593Smuzhiyun ** enable ints
5304*4882a593Smuzhiyun */
5305*4882a593Smuzhiyun
5306*4882a593Smuzhiyun OUTW (nc_sien , STO|HTH|MA|SGE|UDC|RST|PAR);
5307*4882a593Smuzhiyun OUTB (nc_dien , MDPE|BF|ABRT|SSI|SIR|IID);
5308*4882a593Smuzhiyun
5309*4882a593Smuzhiyun /*
5310*4882a593Smuzhiyun ** Fill in target structure.
5311*4882a593Smuzhiyun ** Reinitialize usrsync.
5312*4882a593Smuzhiyun ** Reinitialize usrwide.
5313*4882a593Smuzhiyun ** Prepare sync negotiation according to actual SCSI bus mode.
5314*4882a593Smuzhiyun */
5315*4882a593Smuzhiyun
5316*4882a593Smuzhiyun for (i=0;i<MAX_TARGET;i++) {
5317*4882a593Smuzhiyun struct tcb *tp = &np->target[i];
5318*4882a593Smuzhiyun
5319*4882a593Smuzhiyun tp->sval = 0;
5320*4882a593Smuzhiyun tp->wval = np->rv_scntl3;
5321*4882a593Smuzhiyun
5322*4882a593Smuzhiyun if (tp->usrsync != 255) {
5323*4882a593Smuzhiyun if (tp->usrsync <= np->maxsync) {
5324*4882a593Smuzhiyun if (tp->usrsync < np->minsync) {
5325*4882a593Smuzhiyun tp->usrsync = np->minsync;
5326*4882a593Smuzhiyun }
5327*4882a593Smuzhiyun }
5328*4882a593Smuzhiyun else
5329*4882a593Smuzhiyun tp->usrsync = 255;
5330*4882a593Smuzhiyun }
5331*4882a593Smuzhiyun
5332*4882a593Smuzhiyun if (tp->usrwide > np->maxwide)
5333*4882a593Smuzhiyun tp->usrwide = np->maxwide;
5334*4882a593Smuzhiyun
5335*4882a593Smuzhiyun }
5336*4882a593Smuzhiyun
5337*4882a593Smuzhiyun /*
5338*4882a593Smuzhiyun ** Start script processor.
5339*4882a593Smuzhiyun */
5340*4882a593Smuzhiyun if (np->paddr2) {
5341*4882a593Smuzhiyun if (bootverbose)
5342*4882a593Smuzhiyun printk ("%s: Downloading SCSI SCRIPTS.\n",
5343*4882a593Smuzhiyun ncr_name(np));
5344*4882a593Smuzhiyun OUTL (nc_scratcha, vtobus(np->script0));
5345*4882a593Smuzhiyun OUTL_DSP (NCB_SCRIPTH_PHYS (np, start_ram));
5346*4882a593Smuzhiyun }
5347*4882a593Smuzhiyun else
5348*4882a593Smuzhiyun OUTL_DSP (NCB_SCRIPT_PHYS (np, start));
5349*4882a593Smuzhiyun }
5350*4882a593Smuzhiyun
5351*4882a593Smuzhiyun /*==========================================================
5352*4882a593Smuzhiyun **
5353*4882a593Smuzhiyun ** Prepare the negotiation values for wide and
5354*4882a593Smuzhiyun ** synchronous transfers.
5355*4882a593Smuzhiyun **
5356*4882a593Smuzhiyun **==========================================================
5357*4882a593Smuzhiyun */
5358*4882a593Smuzhiyun
ncr_negotiate(struct ncb * np,struct tcb * tp)5359*4882a593Smuzhiyun static void ncr_negotiate (struct ncb* np, struct tcb* tp)
5360*4882a593Smuzhiyun {
5361*4882a593Smuzhiyun /*
5362*4882a593Smuzhiyun ** minsync unit is 4ns !
5363*4882a593Smuzhiyun */
5364*4882a593Smuzhiyun
5365*4882a593Smuzhiyun u_long minsync = tp->usrsync;
5366*4882a593Smuzhiyun
5367*4882a593Smuzhiyun /*
5368*4882a593Smuzhiyun ** SCSI bus mode limit
5369*4882a593Smuzhiyun */
5370*4882a593Smuzhiyun
5371*4882a593Smuzhiyun if (np->scsi_mode && np->scsi_mode == SMODE_SE) {
5372*4882a593Smuzhiyun if (minsync < 12) minsync = 12;
5373*4882a593Smuzhiyun }
5374*4882a593Smuzhiyun
5375*4882a593Smuzhiyun /*
5376*4882a593Smuzhiyun ** our limit ..
5377*4882a593Smuzhiyun */
5378*4882a593Smuzhiyun
5379*4882a593Smuzhiyun if (minsync < np->minsync)
5380*4882a593Smuzhiyun minsync = np->minsync;
5381*4882a593Smuzhiyun
5382*4882a593Smuzhiyun /*
5383*4882a593Smuzhiyun ** divider limit
5384*4882a593Smuzhiyun */
5385*4882a593Smuzhiyun
5386*4882a593Smuzhiyun if (minsync > np->maxsync)
5387*4882a593Smuzhiyun minsync = 255;
5388*4882a593Smuzhiyun
5389*4882a593Smuzhiyun if (tp->maxoffs > np->maxoffs)
5390*4882a593Smuzhiyun tp->maxoffs = np->maxoffs;
5391*4882a593Smuzhiyun
5392*4882a593Smuzhiyun tp->minsync = minsync;
5393*4882a593Smuzhiyun tp->maxoffs = (minsync<255 ? tp->maxoffs : 0);
5394*4882a593Smuzhiyun
5395*4882a593Smuzhiyun /*
5396*4882a593Smuzhiyun ** period=0: has to negotiate sync transfer
5397*4882a593Smuzhiyun */
5398*4882a593Smuzhiyun
5399*4882a593Smuzhiyun tp->period=0;
5400*4882a593Smuzhiyun
5401*4882a593Smuzhiyun /*
5402*4882a593Smuzhiyun ** widedone=0: has to negotiate wide transfer
5403*4882a593Smuzhiyun */
5404*4882a593Smuzhiyun tp->widedone=0;
5405*4882a593Smuzhiyun }
5406*4882a593Smuzhiyun
5407*4882a593Smuzhiyun /*==========================================================
5408*4882a593Smuzhiyun **
5409*4882a593Smuzhiyun ** Get clock factor and sync divisor for a given
5410*4882a593Smuzhiyun ** synchronous factor period.
5411*4882a593Smuzhiyun ** Returns the clock factor (in sxfer) and scntl3
5412*4882a593Smuzhiyun ** synchronous divisor field.
5413*4882a593Smuzhiyun **
5414*4882a593Smuzhiyun **==========================================================
5415*4882a593Smuzhiyun */
5416*4882a593Smuzhiyun
ncr_getsync(struct ncb * np,u_char sfac,u_char * fakp,u_char * scntl3p)5417*4882a593Smuzhiyun static void ncr_getsync(struct ncb *np, u_char sfac, u_char *fakp, u_char *scntl3p)
5418*4882a593Smuzhiyun {
5419*4882a593Smuzhiyun u_long clk = np->clock_khz; /* SCSI clock frequency in kHz */
5420*4882a593Smuzhiyun int div = np->clock_divn; /* Number of divisors supported */
5421*4882a593Smuzhiyun u_long fak; /* Sync factor in sxfer */
5422*4882a593Smuzhiyun u_long per; /* Period in tenths of ns */
5423*4882a593Smuzhiyun u_long kpc; /* (per * clk) */
5424*4882a593Smuzhiyun
5425*4882a593Smuzhiyun /*
5426*4882a593Smuzhiyun ** Compute the synchronous period in tenths of nano-seconds
5427*4882a593Smuzhiyun */
5428*4882a593Smuzhiyun if (sfac <= 10) per = 250;
5429*4882a593Smuzhiyun else if (sfac == 11) per = 303;
5430*4882a593Smuzhiyun else if (sfac == 12) per = 500;
5431*4882a593Smuzhiyun else per = 40 * sfac;
5432*4882a593Smuzhiyun
5433*4882a593Smuzhiyun /*
5434*4882a593Smuzhiyun ** Look for the greatest clock divisor that allows an
5435*4882a593Smuzhiyun ** input speed faster than the period.
5436*4882a593Smuzhiyun */
5437*4882a593Smuzhiyun kpc = per * clk;
5438*4882a593Smuzhiyun while (--div > 0)
5439*4882a593Smuzhiyun if (kpc >= (div_10M[div] << 2)) break;
5440*4882a593Smuzhiyun
5441*4882a593Smuzhiyun /*
5442*4882a593Smuzhiyun ** Calculate the lowest clock factor that allows an output
5443*4882a593Smuzhiyun ** speed not faster than the period.
5444*4882a593Smuzhiyun */
5445*4882a593Smuzhiyun fak = (kpc - 1) / div_10M[div] + 1;
5446*4882a593Smuzhiyun
5447*4882a593Smuzhiyun #if 0 /* This optimization does not seem very useful */
5448*4882a593Smuzhiyun
5449*4882a593Smuzhiyun per = (fak * div_10M[div]) / clk;
5450*4882a593Smuzhiyun
5451*4882a593Smuzhiyun /*
5452*4882a593Smuzhiyun ** Why not to try the immediate lower divisor and to choose
5453*4882a593Smuzhiyun ** the one that allows the fastest output speed ?
5454*4882a593Smuzhiyun ** We don't want input speed too much greater than output speed.
5455*4882a593Smuzhiyun */
5456*4882a593Smuzhiyun if (div >= 1 && fak < 8) {
5457*4882a593Smuzhiyun u_long fak2, per2;
5458*4882a593Smuzhiyun fak2 = (kpc - 1) / div_10M[div-1] + 1;
5459*4882a593Smuzhiyun per2 = (fak2 * div_10M[div-1]) / clk;
5460*4882a593Smuzhiyun if (per2 < per && fak2 <= 8) {
5461*4882a593Smuzhiyun fak = fak2;
5462*4882a593Smuzhiyun per = per2;
5463*4882a593Smuzhiyun --div;
5464*4882a593Smuzhiyun }
5465*4882a593Smuzhiyun }
5466*4882a593Smuzhiyun #endif
5467*4882a593Smuzhiyun
5468*4882a593Smuzhiyun if (fak < 4) fak = 4; /* Should never happen, too bad ... */
5469*4882a593Smuzhiyun
5470*4882a593Smuzhiyun /*
5471*4882a593Smuzhiyun ** Compute and return sync parameters for the ncr
5472*4882a593Smuzhiyun */
5473*4882a593Smuzhiyun *fakp = fak - 4;
5474*4882a593Smuzhiyun *scntl3p = ((div+1) << 4) + (sfac < 25 ? 0x80 : 0);
5475*4882a593Smuzhiyun }
5476*4882a593Smuzhiyun
5477*4882a593Smuzhiyun
5478*4882a593Smuzhiyun /*==========================================================
5479*4882a593Smuzhiyun **
5480*4882a593Smuzhiyun ** Set actual values, sync status and patch all ccbs of
5481*4882a593Smuzhiyun ** a target according to new sync/wide agreement.
5482*4882a593Smuzhiyun **
5483*4882a593Smuzhiyun **==========================================================
5484*4882a593Smuzhiyun */
5485*4882a593Smuzhiyun
ncr_set_sync_wide_status(struct ncb * np,u_char target)5486*4882a593Smuzhiyun static void ncr_set_sync_wide_status (struct ncb *np, u_char target)
5487*4882a593Smuzhiyun {
5488*4882a593Smuzhiyun struct ccb *cp;
5489*4882a593Smuzhiyun struct tcb *tp = &np->target[target];
5490*4882a593Smuzhiyun
5491*4882a593Smuzhiyun /*
5492*4882a593Smuzhiyun ** set actual value and sync_status
5493*4882a593Smuzhiyun */
5494*4882a593Smuzhiyun OUTB (nc_sxfer, tp->sval);
5495*4882a593Smuzhiyun np->sync_st = tp->sval;
5496*4882a593Smuzhiyun OUTB (nc_scntl3, tp->wval);
5497*4882a593Smuzhiyun np->wide_st = tp->wval;
5498*4882a593Smuzhiyun
5499*4882a593Smuzhiyun /*
5500*4882a593Smuzhiyun ** patch ALL ccbs of this target.
5501*4882a593Smuzhiyun */
5502*4882a593Smuzhiyun for (cp = np->ccb; cp; cp = cp->link_ccb) {
5503*4882a593Smuzhiyun if (!cp->cmd) continue;
5504*4882a593Smuzhiyun if (scmd_id(cp->cmd) != target) continue;
5505*4882a593Smuzhiyun #if 0
5506*4882a593Smuzhiyun cp->sync_status = tp->sval;
5507*4882a593Smuzhiyun cp->wide_status = tp->wval;
5508*4882a593Smuzhiyun #endif
5509*4882a593Smuzhiyun cp->phys.select.sel_scntl3 = tp->wval;
5510*4882a593Smuzhiyun cp->phys.select.sel_sxfer = tp->sval;
5511*4882a593Smuzhiyun }
5512*4882a593Smuzhiyun }
5513*4882a593Smuzhiyun
5514*4882a593Smuzhiyun /*==========================================================
5515*4882a593Smuzhiyun **
5516*4882a593Smuzhiyun ** Switch sync mode for current job and it's target
5517*4882a593Smuzhiyun **
5518*4882a593Smuzhiyun **==========================================================
5519*4882a593Smuzhiyun */
5520*4882a593Smuzhiyun
ncr_setsync(struct ncb * np,struct ccb * cp,u_char scntl3,u_char sxfer)5521*4882a593Smuzhiyun static void ncr_setsync (struct ncb *np, struct ccb *cp, u_char scntl3, u_char sxfer)
5522*4882a593Smuzhiyun {
5523*4882a593Smuzhiyun struct scsi_cmnd *cmd = cp->cmd;
5524*4882a593Smuzhiyun struct tcb *tp;
5525*4882a593Smuzhiyun u_char target = INB (nc_sdid) & 0x0f;
5526*4882a593Smuzhiyun u_char idiv;
5527*4882a593Smuzhiyun
5528*4882a593Smuzhiyun BUG_ON(target != (scmd_id(cmd) & 0xf));
5529*4882a593Smuzhiyun
5530*4882a593Smuzhiyun tp = &np->target[target];
5531*4882a593Smuzhiyun
5532*4882a593Smuzhiyun if (!scntl3 || !(sxfer & 0x1f))
5533*4882a593Smuzhiyun scntl3 = np->rv_scntl3;
5534*4882a593Smuzhiyun scntl3 = (scntl3 & 0xf0) | (tp->wval & EWS) | (np->rv_scntl3 & 0x07);
5535*4882a593Smuzhiyun
5536*4882a593Smuzhiyun /*
5537*4882a593Smuzhiyun ** Deduce the value of controller sync period from scntl3.
5538*4882a593Smuzhiyun ** period is in tenths of nano-seconds.
5539*4882a593Smuzhiyun */
5540*4882a593Smuzhiyun
5541*4882a593Smuzhiyun idiv = ((scntl3 >> 4) & 0x7);
5542*4882a593Smuzhiyun if ((sxfer & 0x1f) && idiv)
5543*4882a593Smuzhiyun tp->period = (((sxfer>>5)+4)*div_10M[idiv-1])/np->clock_khz;
5544*4882a593Smuzhiyun else
5545*4882a593Smuzhiyun tp->period = 0xffff;
5546*4882a593Smuzhiyun
5547*4882a593Smuzhiyun /* Stop there if sync parameters are unchanged */
5548*4882a593Smuzhiyun if (tp->sval == sxfer && tp->wval == scntl3)
5549*4882a593Smuzhiyun return;
5550*4882a593Smuzhiyun tp->sval = sxfer;
5551*4882a593Smuzhiyun tp->wval = scntl3;
5552*4882a593Smuzhiyun
5553*4882a593Smuzhiyun if (sxfer & 0x01f) {
5554*4882a593Smuzhiyun /* Disable extended Sreq/Sack filtering */
5555*4882a593Smuzhiyun if (tp->period <= 2000)
5556*4882a593Smuzhiyun OUTOFFB(nc_stest2, EXT);
5557*4882a593Smuzhiyun }
5558*4882a593Smuzhiyun
5559*4882a593Smuzhiyun spi_display_xfer_agreement(tp->starget);
5560*4882a593Smuzhiyun
5561*4882a593Smuzhiyun /*
5562*4882a593Smuzhiyun ** set actual value and sync_status
5563*4882a593Smuzhiyun ** patch ALL ccbs of this target.
5564*4882a593Smuzhiyun */
5565*4882a593Smuzhiyun ncr_set_sync_wide_status(np, target);
5566*4882a593Smuzhiyun }
5567*4882a593Smuzhiyun
5568*4882a593Smuzhiyun /*==========================================================
5569*4882a593Smuzhiyun **
5570*4882a593Smuzhiyun ** Switch wide mode for current job and it's target
5571*4882a593Smuzhiyun ** SCSI specs say: a SCSI device that accepts a WDTR
5572*4882a593Smuzhiyun ** message shall reset the synchronous agreement to
5573*4882a593Smuzhiyun ** asynchronous mode.
5574*4882a593Smuzhiyun **
5575*4882a593Smuzhiyun **==========================================================
5576*4882a593Smuzhiyun */
5577*4882a593Smuzhiyun
ncr_setwide(struct ncb * np,struct ccb * cp,u_char wide,u_char ack)5578*4882a593Smuzhiyun static void ncr_setwide (struct ncb *np, struct ccb *cp, u_char wide, u_char ack)
5579*4882a593Smuzhiyun {
5580*4882a593Smuzhiyun struct scsi_cmnd *cmd = cp->cmd;
5581*4882a593Smuzhiyun u16 target = INB (nc_sdid) & 0x0f;
5582*4882a593Smuzhiyun struct tcb *tp;
5583*4882a593Smuzhiyun u_char scntl3;
5584*4882a593Smuzhiyun u_char sxfer;
5585*4882a593Smuzhiyun
5586*4882a593Smuzhiyun BUG_ON(target != (scmd_id(cmd) & 0xf));
5587*4882a593Smuzhiyun
5588*4882a593Smuzhiyun tp = &np->target[target];
5589*4882a593Smuzhiyun tp->widedone = wide+1;
5590*4882a593Smuzhiyun scntl3 = (tp->wval & (~EWS)) | (wide ? EWS : 0);
5591*4882a593Smuzhiyun
5592*4882a593Smuzhiyun sxfer = ack ? 0 : tp->sval;
5593*4882a593Smuzhiyun
5594*4882a593Smuzhiyun /*
5595*4882a593Smuzhiyun ** Stop there if sync/wide parameters are unchanged
5596*4882a593Smuzhiyun */
5597*4882a593Smuzhiyun if (tp->sval == sxfer && tp->wval == scntl3) return;
5598*4882a593Smuzhiyun tp->sval = sxfer;
5599*4882a593Smuzhiyun tp->wval = scntl3;
5600*4882a593Smuzhiyun
5601*4882a593Smuzhiyun /*
5602*4882a593Smuzhiyun ** Bells and whistles ;-)
5603*4882a593Smuzhiyun */
5604*4882a593Smuzhiyun if (bootverbose >= 2) {
5605*4882a593Smuzhiyun dev_info(&cmd->device->sdev_target->dev, "WIDE SCSI %sabled.\n",
5606*4882a593Smuzhiyun (scntl3 & EWS) ? "en" : "dis");
5607*4882a593Smuzhiyun }
5608*4882a593Smuzhiyun
5609*4882a593Smuzhiyun /*
5610*4882a593Smuzhiyun ** set actual value and sync_status
5611*4882a593Smuzhiyun ** patch ALL ccbs of this target.
5612*4882a593Smuzhiyun */
5613*4882a593Smuzhiyun ncr_set_sync_wide_status(np, target);
5614*4882a593Smuzhiyun }
5615*4882a593Smuzhiyun
5616*4882a593Smuzhiyun /*==========================================================
5617*4882a593Smuzhiyun **
5618*4882a593Smuzhiyun ** Switch tagged mode for a target.
5619*4882a593Smuzhiyun **
5620*4882a593Smuzhiyun **==========================================================
5621*4882a593Smuzhiyun */
5622*4882a593Smuzhiyun
ncr_setup_tags(struct ncb * np,struct scsi_device * sdev)5623*4882a593Smuzhiyun static void ncr_setup_tags (struct ncb *np, struct scsi_device *sdev)
5624*4882a593Smuzhiyun {
5625*4882a593Smuzhiyun unsigned char tn = sdev->id, ln = sdev->lun;
5626*4882a593Smuzhiyun struct tcb *tp = &np->target[tn];
5627*4882a593Smuzhiyun struct lcb *lp = tp->lp[ln];
5628*4882a593Smuzhiyun u_char reqtags, maxdepth;
5629*4882a593Smuzhiyun
5630*4882a593Smuzhiyun /*
5631*4882a593Smuzhiyun ** Just in case ...
5632*4882a593Smuzhiyun */
5633*4882a593Smuzhiyun if ((!tp) || (!lp) || !sdev)
5634*4882a593Smuzhiyun return;
5635*4882a593Smuzhiyun
5636*4882a593Smuzhiyun /*
5637*4882a593Smuzhiyun ** If SCSI device queue depth is not yet set, leave here.
5638*4882a593Smuzhiyun */
5639*4882a593Smuzhiyun if (!lp->scdev_depth)
5640*4882a593Smuzhiyun return;
5641*4882a593Smuzhiyun
5642*4882a593Smuzhiyun /*
5643*4882a593Smuzhiyun ** Donnot allow more tags than the SCSI driver can queue
5644*4882a593Smuzhiyun ** for this device.
5645*4882a593Smuzhiyun ** Donnot allow more tags than we can handle.
5646*4882a593Smuzhiyun */
5647*4882a593Smuzhiyun maxdepth = lp->scdev_depth;
5648*4882a593Smuzhiyun if (maxdepth > lp->maxnxs) maxdepth = lp->maxnxs;
5649*4882a593Smuzhiyun if (lp->maxtags > maxdepth) lp->maxtags = maxdepth;
5650*4882a593Smuzhiyun if (lp->numtags > maxdepth) lp->numtags = maxdepth;
5651*4882a593Smuzhiyun
5652*4882a593Smuzhiyun /*
5653*4882a593Smuzhiyun ** only devices conformant to ANSI Version >= 2
5654*4882a593Smuzhiyun ** only devices capable of tagged commands
5655*4882a593Smuzhiyun ** only if enabled by user ..
5656*4882a593Smuzhiyun */
5657*4882a593Smuzhiyun if (sdev->tagged_supported && lp->numtags > 1) {
5658*4882a593Smuzhiyun reqtags = lp->numtags;
5659*4882a593Smuzhiyun } else {
5660*4882a593Smuzhiyun reqtags = 1;
5661*4882a593Smuzhiyun }
5662*4882a593Smuzhiyun
5663*4882a593Smuzhiyun /*
5664*4882a593Smuzhiyun ** Update max number of tags
5665*4882a593Smuzhiyun */
5666*4882a593Smuzhiyun lp->numtags = reqtags;
5667*4882a593Smuzhiyun if (lp->numtags > lp->maxtags)
5668*4882a593Smuzhiyun lp->maxtags = lp->numtags;
5669*4882a593Smuzhiyun
5670*4882a593Smuzhiyun /*
5671*4882a593Smuzhiyun ** If we want to switch tag mode, we must wait
5672*4882a593Smuzhiyun ** for no CCB to be active.
5673*4882a593Smuzhiyun */
5674*4882a593Smuzhiyun if (reqtags > 1 && lp->usetags) { /* Stay in tagged mode */
5675*4882a593Smuzhiyun if (lp->queuedepth == reqtags) /* Already announced */
5676*4882a593Smuzhiyun return;
5677*4882a593Smuzhiyun lp->queuedepth = reqtags;
5678*4882a593Smuzhiyun }
5679*4882a593Smuzhiyun else if (reqtags <= 1 && !lp->usetags) { /* Stay in untagged mode */
5680*4882a593Smuzhiyun lp->queuedepth = reqtags;
5681*4882a593Smuzhiyun return;
5682*4882a593Smuzhiyun }
5683*4882a593Smuzhiyun else { /* Want to switch tag mode */
5684*4882a593Smuzhiyun if (lp->busyccbs) /* If not yet safe, return */
5685*4882a593Smuzhiyun return;
5686*4882a593Smuzhiyun lp->queuedepth = reqtags;
5687*4882a593Smuzhiyun lp->usetags = reqtags > 1 ? 1 : 0;
5688*4882a593Smuzhiyun }
5689*4882a593Smuzhiyun
5690*4882a593Smuzhiyun /*
5691*4882a593Smuzhiyun ** Patch the lun mini-script, according to tag mode.
5692*4882a593Smuzhiyun */
5693*4882a593Smuzhiyun lp->jump_tag.l_paddr = lp->usetags?
5694*4882a593Smuzhiyun cpu_to_scr(NCB_SCRIPT_PHYS(np, resel_tag)) :
5695*4882a593Smuzhiyun cpu_to_scr(NCB_SCRIPT_PHYS(np, resel_notag));
5696*4882a593Smuzhiyun
5697*4882a593Smuzhiyun /*
5698*4882a593Smuzhiyun ** Announce change to user.
5699*4882a593Smuzhiyun */
5700*4882a593Smuzhiyun if (bootverbose) {
5701*4882a593Smuzhiyun if (lp->usetags) {
5702*4882a593Smuzhiyun dev_info(&sdev->sdev_gendev,
5703*4882a593Smuzhiyun "tagged command queue depth set to %d\n",
5704*4882a593Smuzhiyun reqtags);
5705*4882a593Smuzhiyun } else {
5706*4882a593Smuzhiyun dev_info(&sdev->sdev_gendev,
5707*4882a593Smuzhiyun "tagged command queueing disabled\n");
5708*4882a593Smuzhiyun }
5709*4882a593Smuzhiyun }
5710*4882a593Smuzhiyun }
5711*4882a593Smuzhiyun
5712*4882a593Smuzhiyun /*==========================================================
5713*4882a593Smuzhiyun **
5714*4882a593Smuzhiyun **
5715*4882a593Smuzhiyun ** ncr timeout handler.
5716*4882a593Smuzhiyun **
5717*4882a593Smuzhiyun **
5718*4882a593Smuzhiyun **==========================================================
5719*4882a593Smuzhiyun **
5720*4882a593Smuzhiyun ** Misused to keep the driver running when
5721*4882a593Smuzhiyun ** interrupts are not configured correctly.
5722*4882a593Smuzhiyun **
5723*4882a593Smuzhiyun **----------------------------------------------------------
5724*4882a593Smuzhiyun */
5725*4882a593Smuzhiyun
ncr_timeout(struct ncb * np)5726*4882a593Smuzhiyun static void ncr_timeout (struct ncb *np)
5727*4882a593Smuzhiyun {
5728*4882a593Smuzhiyun u_long thistime = jiffies;
5729*4882a593Smuzhiyun
5730*4882a593Smuzhiyun /*
5731*4882a593Smuzhiyun ** If release process in progress, let's go
5732*4882a593Smuzhiyun ** Set the release stage from 1 to 2 to synchronize
5733*4882a593Smuzhiyun ** with the release process.
5734*4882a593Smuzhiyun */
5735*4882a593Smuzhiyun
5736*4882a593Smuzhiyun if (np->release_stage) {
5737*4882a593Smuzhiyun if (np->release_stage == 1) np->release_stage = 2;
5738*4882a593Smuzhiyun return;
5739*4882a593Smuzhiyun }
5740*4882a593Smuzhiyun
5741*4882a593Smuzhiyun np->timer.expires = jiffies + SCSI_NCR_TIMER_INTERVAL;
5742*4882a593Smuzhiyun add_timer(&np->timer);
5743*4882a593Smuzhiyun
5744*4882a593Smuzhiyun /*
5745*4882a593Smuzhiyun ** If we are resetting the ncr, wait for settle_time before
5746*4882a593Smuzhiyun ** clearing it. Then command processing will be resumed.
5747*4882a593Smuzhiyun */
5748*4882a593Smuzhiyun if (np->settle_time) {
5749*4882a593Smuzhiyun if (np->settle_time <= thistime) {
5750*4882a593Smuzhiyun if (bootverbose > 1)
5751*4882a593Smuzhiyun printk("%s: command processing resumed\n", ncr_name(np));
5752*4882a593Smuzhiyun np->settle_time = 0;
5753*4882a593Smuzhiyun np->disc = 1;
5754*4882a593Smuzhiyun requeue_waiting_list(np);
5755*4882a593Smuzhiyun }
5756*4882a593Smuzhiyun return;
5757*4882a593Smuzhiyun }
5758*4882a593Smuzhiyun
5759*4882a593Smuzhiyun /*
5760*4882a593Smuzhiyun ** Since the generic scsi driver only allows us 0.5 second
5761*4882a593Smuzhiyun ** to perform abort of a command, we must look at ccbs about
5762*4882a593Smuzhiyun ** every 0.25 second.
5763*4882a593Smuzhiyun */
5764*4882a593Smuzhiyun if (np->lasttime + 4*HZ < thistime) {
5765*4882a593Smuzhiyun /*
5766*4882a593Smuzhiyun ** block ncr interrupts
5767*4882a593Smuzhiyun */
5768*4882a593Smuzhiyun np->lasttime = thistime;
5769*4882a593Smuzhiyun }
5770*4882a593Smuzhiyun
5771*4882a593Smuzhiyun #ifdef SCSI_NCR_BROKEN_INTR
5772*4882a593Smuzhiyun if (INB(nc_istat) & (INTF|SIP|DIP)) {
5773*4882a593Smuzhiyun
5774*4882a593Smuzhiyun /*
5775*4882a593Smuzhiyun ** Process pending interrupts.
5776*4882a593Smuzhiyun */
5777*4882a593Smuzhiyun if (DEBUG_FLAGS & DEBUG_TINY) printk ("{");
5778*4882a593Smuzhiyun ncr_exception (np);
5779*4882a593Smuzhiyun if (DEBUG_FLAGS & DEBUG_TINY) printk ("}");
5780*4882a593Smuzhiyun }
5781*4882a593Smuzhiyun #endif /* SCSI_NCR_BROKEN_INTR */
5782*4882a593Smuzhiyun }
5783*4882a593Smuzhiyun
5784*4882a593Smuzhiyun /*==========================================================
5785*4882a593Smuzhiyun **
5786*4882a593Smuzhiyun ** log message for real hard errors
5787*4882a593Smuzhiyun **
5788*4882a593Smuzhiyun ** "ncr0 targ 0?: ERROR (ds:si) (so-si-sd) (sxfer/scntl3) @ name (dsp:dbc)."
5789*4882a593Smuzhiyun ** " reg: r0 r1 r2 r3 r4 r5 r6 ..... rf."
5790*4882a593Smuzhiyun **
5791*4882a593Smuzhiyun ** exception register:
5792*4882a593Smuzhiyun ** ds: dstat
5793*4882a593Smuzhiyun ** si: sist
5794*4882a593Smuzhiyun **
5795*4882a593Smuzhiyun ** SCSI bus lines:
5796*4882a593Smuzhiyun ** so: control lines as driver by NCR.
5797*4882a593Smuzhiyun ** si: control lines as seen by NCR.
5798*4882a593Smuzhiyun ** sd: scsi data lines as seen by NCR.
5799*4882a593Smuzhiyun **
5800*4882a593Smuzhiyun ** wide/fastmode:
5801*4882a593Smuzhiyun ** sxfer: (see the manual)
5802*4882a593Smuzhiyun ** scntl3: (see the manual)
5803*4882a593Smuzhiyun **
5804*4882a593Smuzhiyun ** current script command:
5805*4882a593Smuzhiyun ** dsp: script address (relative to start of script).
5806*4882a593Smuzhiyun ** dbc: first word of script command.
5807*4882a593Smuzhiyun **
5808*4882a593Smuzhiyun ** First 16 register of the chip:
5809*4882a593Smuzhiyun ** r0..rf
5810*4882a593Smuzhiyun **
5811*4882a593Smuzhiyun **==========================================================
5812*4882a593Smuzhiyun */
5813*4882a593Smuzhiyun
ncr_log_hard_error(struct ncb * np,u16 sist,u_char dstat)5814*4882a593Smuzhiyun static void ncr_log_hard_error(struct ncb *np, u16 sist, u_char dstat)
5815*4882a593Smuzhiyun {
5816*4882a593Smuzhiyun u32 dsp;
5817*4882a593Smuzhiyun int script_ofs;
5818*4882a593Smuzhiyun int script_size;
5819*4882a593Smuzhiyun char *script_name;
5820*4882a593Smuzhiyun u_char *script_base;
5821*4882a593Smuzhiyun int i;
5822*4882a593Smuzhiyun
5823*4882a593Smuzhiyun dsp = INL (nc_dsp);
5824*4882a593Smuzhiyun
5825*4882a593Smuzhiyun if (dsp > np->p_script && dsp <= np->p_script + sizeof(struct script)) {
5826*4882a593Smuzhiyun script_ofs = dsp - np->p_script;
5827*4882a593Smuzhiyun script_size = sizeof(struct script);
5828*4882a593Smuzhiyun script_base = (u_char *) np->script0;
5829*4882a593Smuzhiyun script_name = "script";
5830*4882a593Smuzhiyun }
5831*4882a593Smuzhiyun else if (np->p_scripth < dsp &&
5832*4882a593Smuzhiyun dsp <= np->p_scripth + sizeof(struct scripth)) {
5833*4882a593Smuzhiyun script_ofs = dsp - np->p_scripth;
5834*4882a593Smuzhiyun script_size = sizeof(struct scripth);
5835*4882a593Smuzhiyun script_base = (u_char *) np->scripth0;
5836*4882a593Smuzhiyun script_name = "scripth";
5837*4882a593Smuzhiyun } else {
5838*4882a593Smuzhiyun script_ofs = dsp;
5839*4882a593Smuzhiyun script_size = 0;
5840*4882a593Smuzhiyun script_base = NULL;
5841*4882a593Smuzhiyun script_name = "mem";
5842*4882a593Smuzhiyun }
5843*4882a593Smuzhiyun
5844*4882a593Smuzhiyun printk ("%s:%d: ERROR (%x:%x) (%x-%x-%x) (%x/%x) @ (%s %x:%08x).\n",
5845*4882a593Smuzhiyun ncr_name (np), (unsigned)INB (nc_sdid)&0x0f, dstat, sist,
5846*4882a593Smuzhiyun (unsigned)INB (nc_socl), (unsigned)INB (nc_sbcl), (unsigned)INB (nc_sbdl),
5847*4882a593Smuzhiyun (unsigned)INB (nc_sxfer),(unsigned)INB (nc_scntl3), script_name, script_ofs,
5848*4882a593Smuzhiyun (unsigned)INL (nc_dbc));
5849*4882a593Smuzhiyun
5850*4882a593Smuzhiyun if (((script_ofs & 3) == 0) &&
5851*4882a593Smuzhiyun (unsigned)script_ofs < script_size) {
5852*4882a593Smuzhiyun printk ("%s: script cmd = %08x\n", ncr_name(np),
5853*4882a593Smuzhiyun scr_to_cpu((int) *(ncrcmd *)(script_base + script_ofs)));
5854*4882a593Smuzhiyun }
5855*4882a593Smuzhiyun
5856*4882a593Smuzhiyun printk ("%s: regdump:", ncr_name(np));
5857*4882a593Smuzhiyun for (i=0; i<16;i++)
5858*4882a593Smuzhiyun printk (" %02x", (unsigned)INB_OFF(i));
5859*4882a593Smuzhiyun printk (".\n");
5860*4882a593Smuzhiyun }
5861*4882a593Smuzhiyun
5862*4882a593Smuzhiyun /*============================================================
5863*4882a593Smuzhiyun **
5864*4882a593Smuzhiyun ** ncr chip exception handler.
5865*4882a593Smuzhiyun **
5866*4882a593Smuzhiyun **============================================================
5867*4882a593Smuzhiyun **
5868*4882a593Smuzhiyun ** In normal cases, interrupt conditions occur one at a
5869*4882a593Smuzhiyun ** time. The ncr is able to stack in some extra registers
5870*4882a593Smuzhiyun ** other interrupts that will occur after the first one.
5871*4882a593Smuzhiyun ** But, several interrupts may occur at the same time.
5872*4882a593Smuzhiyun **
5873*4882a593Smuzhiyun ** We probably should only try to deal with the normal
5874*4882a593Smuzhiyun ** case, but it seems that multiple interrupts occur in
5875*4882a593Smuzhiyun ** some cases that are not abnormal at all.
5876*4882a593Smuzhiyun **
5877*4882a593Smuzhiyun ** The most frequent interrupt condition is Phase Mismatch.
5878*4882a593Smuzhiyun ** We should want to service this interrupt quickly.
5879*4882a593Smuzhiyun ** A SCSI parity error may be delivered at the same time.
5880*4882a593Smuzhiyun ** The SIR interrupt is not very frequent in this driver,
5881*4882a593Smuzhiyun ** since the INTFLY is likely used for command completion
5882*4882a593Smuzhiyun ** signaling.
5883*4882a593Smuzhiyun ** The Selection Timeout interrupt may be triggered with
5884*4882a593Smuzhiyun ** IID and/or UDC.
5885*4882a593Smuzhiyun ** The SBMC interrupt (SCSI Bus Mode Change) may probably
5886*4882a593Smuzhiyun ** occur at any time.
5887*4882a593Smuzhiyun **
5888*4882a593Smuzhiyun ** This handler try to deal as cleverly as possible with all
5889*4882a593Smuzhiyun ** the above.
5890*4882a593Smuzhiyun **
5891*4882a593Smuzhiyun **============================================================
5892*4882a593Smuzhiyun */
5893*4882a593Smuzhiyun
ncr_exception(struct ncb * np)5894*4882a593Smuzhiyun void ncr_exception (struct ncb *np)
5895*4882a593Smuzhiyun {
5896*4882a593Smuzhiyun u_char istat, dstat;
5897*4882a593Smuzhiyun u16 sist;
5898*4882a593Smuzhiyun int i;
5899*4882a593Smuzhiyun
5900*4882a593Smuzhiyun /*
5901*4882a593Smuzhiyun ** interrupt on the fly ?
5902*4882a593Smuzhiyun ** Since the global header may be copied back to a CCB
5903*4882a593Smuzhiyun ** using a posted PCI memory write, the last operation on
5904*4882a593Smuzhiyun ** the istat register is a READ in order to flush posted
5905*4882a593Smuzhiyun ** PCI write commands.
5906*4882a593Smuzhiyun */
5907*4882a593Smuzhiyun istat = INB (nc_istat);
5908*4882a593Smuzhiyun if (istat & INTF) {
5909*4882a593Smuzhiyun OUTB (nc_istat, (istat & SIGP) | INTF);
5910*4882a593Smuzhiyun istat = INB (nc_istat);
5911*4882a593Smuzhiyun if (DEBUG_FLAGS & DEBUG_TINY) printk ("F ");
5912*4882a593Smuzhiyun ncr_wakeup_done (np);
5913*4882a593Smuzhiyun }
5914*4882a593Smuzhiyun
5915*4882a593Smuzhiyun if (!(istat & (SIP|DIP)))
5916*4882a593Smuzhiyun return;
5917*4882a593Smuzhiyun
5918*4882a593Smuzhiyun if (istat & CABRT)
5919*4882a593Smuzhiyun OUTB (nc_istat, CABRT);
5920*4882a593Smuzhiyun
5921*4882a593Smuzhiyun /*
5922*4882a593Smuzhiyun ** Steinbach's Guideline for Systems Programming:
5923*4882a593Smuzhiyun ** Never test for an error condition you don't know how to handle.
5924*4882a593Smuzhiyun */
5925*4882a593Smuzhiyun
5926*4882a593Smuzhiyun sist = (istat & SIP) ? INW (nc_sist) : 0;
5927*4882a593Smuzhiyun dstat = (istat & DIP) ? INB (nc_dstat) : 0;
5928*4882a593Smuzhiyun
5929*4882a593Smuzhiyun if (DEBUG_FLAGS & DEBUG_TINY)
5930*4882a593Smuzhiyun printk ("<%d|%x:%x|%x:%x>",
5931*4882a593Smuzhiyun (int)INB(nc_scr0),
5932*4882a593Smuzhiyun dstat,sist,
5933*4882a593Smuzhiyun (unsigned)INL(nc_dsp),
5934*4882a593Smuzhiyun (unsigned)INL(nc_dbc));
5935*4882a593Smuzhiyun
5936*4882a593Smuzhiyun /*========================================================
5937*4882a593Smuzhiyun ** First, interrupts we want to service cleanly.
5938*4882a593Smuzhiyun **
5939*4882a593Smuzhiyun ** Phase mismatch is the most frequent interrupt, and
5940*4882a593Smuzhiyun ** so we have to service it as quickly and as cleanly
5941*4882a593Smuzhiyun ** as possible.
5942*4882a593Smuzhiyun ** Programmed interrupts are rarely used in this driver,
5943*4882a593Smuzhiyun ** but we must handle them cleanly anyway.
5944*4882a593Smuzhiyun ** We try to deal with PAR and SBMC combined with
5945*4882a593Smuzhiyun ** some other interrupt(s).
5946*4882a593Smuzhiyun **=========================================================
5947*4882a593Smuzhiyun */
5948*4882a593Smuzhiyun
5949*4882a593Smuzhiyun if (!(sist & (STO|GEN|HTH|SGE|UDC|RST)) &&
5950*4882a593Smuzhiyun !(dstat & (MDPE|BF|ABRT|IID))) {
5951*4882a593Smuzhiyun if ((sist & SBMC) && ncr_int_sbmc (np))
5952*4882a593Smuzhiyun return;
5953*4882a593Smuzhiyun if ((sist & PAR) && ncr_int_par (np))
5954*4882a593Smuzhiyun return;
5955*4882a593Smuzhiyun if (sist & MA) {
5956*4882a593Smuzhiyun ncr_int_ma (np);
5957*4882a593Smuzhiyun return;
5958*4882a593Smuzhiyun }
5959*4882a593Smuzhiyun if (dstat & SIR) {
5960*4882a593Smuzhiyun ncr_int_sir (np);
5961*4882a593Smuzhiyun return;
5962*4882a593Smuzhiyun }
5963*4882a593Smuzhiyun /*
5964*4882a593Smuzhiyun ** DEL 397 - 53C875 Rev 3 - Part Number 609-0392410 - ITEM 2.
5965*4882a593Smuzhiyun */
5966*4882a593Smuzhiyun if (!(sist & (SBMC|PAR)) && !(dstat & SSI)) {
5967*4882a593Smuzhiyun printk( "%s: unknown interrupt(s) ignored, "
5968*4882a593Smuzhiyun "ISTAT=%x DSTAT=%x SIST=%x\n",
5969*4882a593Smuzhiyun ncr_name(np), istat, dstat, sist);
5970*4882a593Smuzhiyun return;
5971*4882a593Smuzhiyun }
5972*4882a593Smuzhiyun OUTONB_STD ();
5973*4882a593Smuzhiyun return;
5974*4882a593Smuzhiyun }
5975*4882a593Smuzhiyun
5976*4882a593Smuzhiyun /*========================================================
5977*4882a593Smuzhiyun ** Now, interrupts that need some fixing up.
5978*4882a593Smuzhiyun ** Order and multiple interrupts is so less important.
5979*4882a593Smuzhiyun **
5980*4882a593Smuzhiyun ** If SRST has been asserted, we just reset the chip.
5981*4882a593Smuzhiyun **
5982*4882a593Smuzhiyun ** Selection is intirely handled by the chip. If the
5983*4882a593Smuzhiyun ** chip says STO, we trust it. Seems some other
5984*4882a593Smuzhiyun ** interrupts may occur at the same time (UDC, IID), so
5985*4882a593Smuzhiyun ** we ignore them. In any case we do enough fix-up
5986*4882a593Smuzhiyun ** in the service routine.
5987*4882a593Smuzhiyun ** We just exclude some fatal dma errors.
5988*4882a593Smuzhiyun **=========================================================
5989*4882a593Smuzhiyun */
5990*4882a593Smuzhiyun
5991*4882a593Smuzhiyun if (sist & RST) {
5992*4882a593Smuzhiyun ncr_init (np, 1, bootverbose ? "scsi reset" : NULL, HS_RESET);
5993*4882a593Smuzhiyun return;
5994*4882a593Smuzhiyun }
5995*4882a593Smuzhiyun
5996*4882a593Smuzhiyun if ((sist & STO) &&
5997*4882a593Smuzhiyun !(dstat & (MDPE|BF|ABRT))) {
5998*4882a593Smuzhiyun /*
5999*4882a593Smuzhiyun ** DEL 397 - 53C875 Rev 3 - Part Number 609-0392410 - ITEM 1.
6000*4882a593Smuzhiyun */
6001*4882a593Smuzhiyun OUTONB (nc_ctest3, CLF);
6002*4882a593Smuzhiyun
6003*4882a593Smuzhiyun ncr_int_sto (np);
6004*4882a593Smuzhiyun return;
6005*4882a593Smuzhiyun }
6006*4882a593Smuzhiyun
6007*4882a593Smuzhiyun /*=========================================================
6008*4882a593Smuzhiyun ** Now, interrupts we are not able to recover cleanly.
6009*4882a593Smuzhiyun ** (At least for the moment).
6010*4882a593Smuzhiyun **
6011*4882a593Smuzhiyun ** Do the register dump.
6012*4882a593Smuzhiyun ** Log message for real hard errors.
6013*4882a593Smuzhiyun ** Clear all fifos.
6014*4882a593Smuzhiyun ** For MDPE, BF, ABORT, IID, SGE and HTH we reset the
6015*4882a593Smuzhiyun ** BUS and the chip.
6016*4882a593Smuzhiyun ** We are more soft for UDC.
6017*4882a593Smuzhiyun **=========================================================
6018*4882a593Smuzhiyun */
6019*4882a593Smuzhiyun
6020*4882a593Smuzhiyun if (time_after(jiffies, np->regtime)) {
6021*4882a593Smuzhiyun np->regtime = jiffies + 10*HZ;
6022*4882a593Smuzhiyun for (i = 0; i<sizeof(np->regdump); i++)
6023*4882a593Smuzhiyun ((char*)&np->regdump)[i] = INB_OFF(i);
6024*4882a593Smuzhiyun np->regdump.nc_dstat = dstat;
6025*4882a593Smuzhiyun np->regdump.nc_sist = sist;
6026*4882a593Smuzhiyun }
6027*4882a593Smuzhiyun
6028*4882a593Smuzhiyun ncr_log_hard_error(np, sist, dstat);
6029*4882a593Smuzhiyun
6030*4882a593Smuzhiyun printk ("%s: have to clear fifos.\n", ncr_name (np));
6031*4882a593Smuzhiyun OUTB (nc_stest3, TE|CSF);
6032*4882a593Smuzhiyun OUTONB (nc_ctest3, CLF);
6033*4882a593Smuzhiyun
6034*4882a593Smuzhiyun if ((sist & (SGE)) ||
6035*4882a593Smuzhiyun (dstat & (MDPE|BF|ABRT|IID))) {
6036*4882a593Smuzhiyun ncr_start_reset(np);
6037*4882a593Smuzhiyun return;
6038*4882a593Smuzhiyun }
6039*4882a593Smuzhiyun
6040*4882a593Smuzhiyun if (sist & HTH) {
6041*4882a593Smuzhiyun printk ("%s: handshake timeout\n", ncr_name(np));
6042*4882a593Smuzhiyun ncr_start_reset(np);
6043*4882a593Smuzhiyun return;
6044*4882a593Smuzhiyun }
6045*4882a593Smuzhiyun
6046*4882a593Smuzhiyun if (sist & UDC) {
6047*4882a593Smuzhiyun printk ("%s: unexpected disconnect\n", ncr_name(np));
6048*4882a593Smuzhiyun OUTB (HS_PRT, HS_UNEXPECTED);
6049*4882a593Smuzhiyun OUTL_DSP (NCB_SCRIPT_PHYS (np, cleanup));
6050*4882a593Smuzhiyun return;
6051*4882a593Smuzhiyun }
6052*4882a593Smuzhiyun
6053*4882a593Smuzhiyun /*=========================================================
6054*4882a593Smuzhiyun ** We just miss the cause of the interrupt. :(
6055*4882a593Smuzhiyun ** Print a message. The timeout will do the real work.
6056*4882a593Smuzhiyun **=========================================================
6057*4882a593Smuzhiyun */
6058*4882a593Smuzhiyun printk ("%s: unknown interrupt\n", ncr_name(np));
6059*4882a593Smuzhiyun }
6060*4882a593Smuzhiyun
6061*4882a593Smuzhiyun /*==========================================================
6062*4882a593Smuzhiyun **
6063*4882a593Smuzhiyun ** ncr chip exception handler for selection timeout
6064*4882a593Smuzhiyun **
6065*4882a593Smuzhiyun **==========================================================
6066*4882a593Smuzhiyun **
6067*4882a593Smuzhiyun ** There seems to be a bug in the 53c810.
6068*4882a593Smuzhiyun ** Although a STO-Interrupt is pending,
6069*4882a593Smuzhiyun ** it continues executing script commands.
6070*4882a593Smuzhiyun ** But it will fail and interrupt (IID) on
6071*4882a593Smuzhiyun ** the next instruction where it's looking
6072*4882a593Smuzhiyun ** for a valid phase.
6073*4882a593Smuzhiyun **
6074*4882a593Smuzhiyun **----------------------------------------------------------
6075*4882a593Smuzhiyun */
6076*4882a593Smuzhiyun
ncr_int_sto(struct ncb * np)6077*4882a593Smuzhiyun void ncr_int_sto (struct ncb *np)
6078*4882a593Smuzhiyun {
6079*4882a593Smuzhiyun u_long dsa;
6080*4882a593Smuzhiyun struct ccb *cp;
6081*4882a593Smuzhiyun if (DEBUG_FLAGS & DEBUG_TINY) printk ("T");
6082*4882a593Smuzhiyun
6083*4882a593Smuzhiyun /*
6084*4882a593Smuzhiyun ** look for ccb and set the status.
6085*4882a593Smuzhiyun */
6086*4882a593Smuzhiyun
6087*4882a593Smuzhiyun dsa = INL (nc_dsa);
6088*4882a593Smuzhiyun cp = np->ccb;
6089*4882a593Smuzhiyun while (cp && (CCB_PHYS (cp, phys) != dsa))
6090*4882a593Smuzhiyun cp = cp->link_ccb;
6091*4882a593Smuzhiyun
6092*4882a593Smuzhiyun if (cp) {
6093*4882a593Smuzhiyun cp-> host_status = HS_SEL_TIMEOUT;
6094*4882a593Smuzhiyun ncr_complete (np, cp);
6095*4882a593Smuzhiyun }
6096*4882a593Smuzhiyun
6097*4882a593Smuzhiyun /*
6098*4882a593Smuzhiyun ** repair start queue and jump to start point.
6099*4882a593Smuzhiyun */
6100*4882a593Smuzhiyun
6101*4882a593Smuzhiyun OUTL_DSP (NCB_SCRIPTH_PHYS (np, sto_restart));
6102*4882a593Smuzhiyun return;
6103*4882a593Smuzhiyun }
6104*4882a593Smuzhiyun
6105*4882a593Smuzhiyun /*==========================================================
6106*4882a593Smuzhiyun **
6107*4882a593Smuzhiyun ** ncr chip exception handler for SCSI bus mode change
6108*4882a593Smuzhiyun **
6109*4882a593Smuzhiyun **==========================================================
6110*4882a593Smuzhiyun **
6111*4882a593Smuzhiyun ** spi2-r12 11.2.3 says a transceiver mode change must
6112*4882a593Smuzhiyun ** generate a reset event and a device that detects a reset
6113*4882a593Smuzhiyun ** event shall initiate a hard reset. It says also that a
6114*4882a593Smuzhiyun ** device that detects a mode change shall set data transfer
6115*4882a593Smuzhiyun ** mode to eight bit asynchronous, etc...
6116*4882a593Smuzhiyun ** So, just resetting should be enough.
6117*4882a593Smuzhiyun **
6118*4882a593Smuzhiyun **
6119*4882a593Smuzhiyun **----------------------------------------------------------
6120*4882a593Smuzhiyun */
6121*4882a593Smuzhiyun
ncr_int_sbmc(struct ncb * np)6122*4882a593Smuzhiyun static int ncr_int_sbmc (struct ncb *np)
6123*4882a593Smuzhiyun {
6124*4882a593Smuzhiyun u_char scsi_mode = INB (nc_stest4) & SMODE;
6125*4882a593Smuzhiyun
6126*4882a593Smuzhiyun if (scsi_mode != np->scsi_mode) {
6127*4882a593Smuzhiyun printk("%s: SCSI bus mode change from %x to %x.\n",
6128*4882a593Smuzhiyun ncr_name(np), np->scsi_mode, scsi_mode);
6129*4882a593Smuzhiyun
6130*4882a593Smuzhiyun np->scsi_mode = scsi_mode;
6131*4882a593Smuzhiyun
6132*4882a593Smuzhiyun
6133*4882a593Smuzhiyun /*
6134*4882a593Smuzhiyun ** Suspend command processing for 1 second and
6135*4882a593Smuzhiyun ** reinitialize all except the chip.
6136*4882a593Smuzhiyun */
6137*4882a593Smuzhiyun np->settle_time = jiffies + HZ;
6138*4882a593Smuzhiyun ncr_init (np, 0, bootverbose ? "scsi mode change" : NULL, HS_RESET);
6139*4882a593Smuzhiyun return 1;
6140*4882a593Smuzhiyun }
6141*4882a593Smuzhiyun return 0;
6142*4882a593Smuzhiyun }
6143*4882a593Smuzhiyun
6144*4882a593Smuzhiyun /*==========================================================
6145*4882a593Smuzhiyun **
6146*4882a593Smuzhiyun ** ncr chip exception handler for SCSI parity error.
6147*4882a593Smuzhiyun **
6148*4882a593Smuzhiyun **==========================================================
6149*4882a593Smuzhiyun **
6150*4882a593Smuzhiyun **
6151*4882a593Smuzhiyun **----------------------------------------------------------
6152*4882a593Smuzhiyun */
6153*4882a593Smuzhiyun
ncr_int_par(struct ncb * np)6154*4882a593Smuzhiyun static int ncr_int_par (struct ncb *np)
6155*4882a593Smuzhiyun {
6156*4882a593Smuzhiyun u_char hsts = INB (HS_PRT);
6157*4882a593Smuzhiyun u32 dbc = INL (nc_dbc);
6158*4882a593Smuzhiyun u_char sstat1 = INB (nc_sstat1);
6159*4882a593Smuzhiyun int phase = -1;
6160*4882a593Smuzhiyun int msg = -1;
6161*4882a593Smuzhiyun u32 jmp;
6162*4882a593Smuzhiyun
6163*4882a593Smuzhiyun printk("%s: SCSI parity error detected: SCR1=%d DBC=%x SSTAT1=%x\n",
6164*4882a593Smuzhiyun ncr_name(np), hsts, dbc, sstat1);
6165*4882a593Smuzhiyun
6166*4882a593Smuzhiyun /*
6167*4882a593Smuzhiyun * Ignore the interrupt if the NCR is not connected
6168*4882a593Smuzhiyun * to the SCSI bus, since the right work should have
6169*4882a593Smuzhiyun * been done on unexpected disconnection handling.
6170*4882a593Smuzhiyun */
6171*4882a593Smuzhiyun if (!(INB (nc_scntl1) & ISCON))
6172*4882a593Smuzhiyun return 0;
6173*4882a593Smuzhiyun
6174*4882a593Smuzhiyun /*
6175*4882a593Smuzhiyun * If the nexus is not clearly identified, reset the bus.
6176*4882a593Smuzhiyun * We will try to do better later.
6177*4882a593Smuzhiyun */
6178*4882a593Smuzhiyun if (hsts & HS_INVALMASK)
6179*4882a593Smuzhiyun goto reset_all;
6180*4882a593Smuzhiyun
6181*4882a593Smuzhiyun /*
6182*4882a593Smuzhiyun * If the SCSI parity error occurs in MSG IN phase, prepare a
6183*4882a593Smuzhiyun * MSG PARITY message. Otherwise, prepare a INITIATOR DETECTED
6184*4882a593Smuzhiyun * ERROR message and let the device decide to retry the command
6185*4882a593Smuzhiyun * or to terminate with check condition. If we were in MSG IN
6186*4882a593Smuzhiyun * phase waiting for the response of a negotiation, we will
6187*4882a593Smuzhiyun * get SIR_NEGO_FAILED at dispatch.
6188*4882a593Smuzhiyun */
6189*4882a593Smuzhiyun if (!(dbc & 0xc0000000))
6190*4882a593Smuzhiyun phase = (dbc >> 24) & 7;
6191*4882a593Smuzhiyun if (phase == 7)
6192*4882a593Smuzhiyun msg = MSG_PARITY_ERROR;
6193*4882a593Smuzhiyun else
6194*4882a593Smuzhiyun msg = INITIATOR_ERROR;
6195*4882a593Smuzhiyun
6196*4882a593Smuzhiyun
6197*4882a593Smuzhiyun /*
6198*4882a593Smuzhiyun * If the NCR stopped on a MOVE ^ DATA_IN, we jump to a
6199*4882a593Smuzhiyun * script that will ignore all data in bytes until phase
6200*4882a593Smuzhiyun * change, since we are not sure the chip will wait the phase
6201*4882a593Smuzhiyun * change prior to delivering the interrupt.
6202*4882a593Smuzhiyun */
6203*4882a593Smuzhiyun if (phase == 1)
6204*4882a593Smuzhiyun jmp = NCB_SCRIPTH_PHYS (np, par_err_data_in);
6205*4882a593Smuzhiyun else
6206*4882a593Smuzhiyun jmp = NCB_SCRIPTH_PHYS (np, par_err_other);
6207*4882a593Smuzhiyun
6208*4882a593Smuzhiyun OUTONB (nc_ctest3, CLF ); /* clear dma fifo */
6209*4882a593Smuzhiyun OUTB (nc_stest3, TE|CSF); /* clear scsi fifo */
6210*4882a593Smuzhiyun
6211*4882a593Smuzhiyun np->msgout[0] = msg;
6212*4882a593Smuzhiyun OUTL_DSP (jmp);
6213*4882a593Smuzhiyun return 1;
6214*4882a593Smuzhiyun
6215*4882a593Smuzhiyun reset_all:
6216*4882a593Smuzhiyun ncr_start_reset(np);
6217*4882a593Smuzhiyun return 1;
6218*4882a593Smuzhiyun }
6219*4882a593Smuzhiyun
6220*4882a593Smuzhiyun /*==========================================================
6221*4882a593Smuzhiyun **
6222*4882a593Smuzhiyun **
6223*4882a593Smuzhiyun ** ncr chip exception handler for phase errors.
6224*4882a593Smuzhiyun **
6225*4882a593Smuzhiyun **
6226*4882a593Smuzhiyun **==========================================================
6227*4882a593Smuzhiyun **
6228*4882a593Smuzhiyun ** We have to construct a new transfer descriptor,
6229*4882a593Smuzhiyun ** to transfer the rest of the current block.
6230*4882a593Smuzhiyun **
6231*4882a593Smuzhiyun **----------------------------------------------------------
6232*4882a593Smuzhiyun */
6233*4882a593Smuzhiyun
ncr_int_ma(struct ncb * np)6234*4882a593Smuzhiyun static void ncr_int_ma (struct ncb *np)
6235*4882a593Smuzhiyun {
6236*4882a593Smuzhiyun u32 dbc;
6237*4882a593Smuzhiyun u32 rest;
6238*4882a593Smuzhiyun u32 dsp;
6239*4882a593Smuzhiyun u32 dsa;
6240*4882a593Smuzhiyun u32 nxtdsp;
6241*4882a593Smuzhiyun u32 newtmp;
6242*4882a593Smuzhiyun u32 *vdsp;
6243*4882a593Smuzhiyun u32 oadr, olen;
6244*4882a593Smuzhiyun u32 *tblp;
6245*4882a593Smuzhiyun ncrcmd *newcmd;
6246*4882a593Smuzhiyun u_char cmd, sbcl;
6247*4882a593Smuzhiyun struct ccb *cp;
6248*4882a593Smuzhiyun
6249*4882a593Smuzhiyun dsp = INL (nc_dsp);
6250*4882a593Smuzhiyun dbc = INL (nc_dbc);
6251*4882a593Smuzhiyun sbcl = INB (nc_sbcl);
6252*4882a593Smuzhiyun
6253*4882a593Smuzhiyun cmd = dbc >> 24;
6254*4882a593Smuzhiyun rest = dbc & 0xffffff;
6255*4882a593Smuzhiyun
6256*4882a593Smuzhiyun /*
6257*4882a593Smuzhiyun ** Take into account dma fifo and various buffers and latches,
6258*4882a593Smuzhiyun ** only if the interrupted phase is an OUTPUT phase.
6259*4882a593Smuzhiyun */
6260*4882a593Smuzhiyun
6261*4882a593Smuzhiyun if ((cmd & 1) == 0) {
6262*4882a593Smuzhiyun u_char ctest5, ss0, ss2;
6263*4882a593Smuzhiyun u16 delta;
6264*4882a593Smuzhiyun
6265*4882a593Smuzhiyun ctest5 = (np->rv_ctest5 & DFS) ? INB (nc_ctest5) : 0;
6266*4882a593Smuzhiyun if (ctest5 & DFS)
6267*4882a593Smuzhiyun delta=(((ctest5 << 8) | (INB (nc_dfifo) & 0xff)) - rest) & 0x3ff;
6268*4882a593Smuzhiyun else
6269*4882a593Smuzhiyun delta=(INB (nc_dfifo) - rest) & 0x7f;
6270*4882a593Smuzhiyun
6271*4882a593Smuzhiyun /*
6272*4882a593Smuzhiyun ** The data in the dma fifo has not been transferred to
6273*4882a593Smuzhiyun ** the target -> add the amount to the rest
6274*4882a593Smuzhiyun ** and clear the data.
6275*4882a593Smuzhiyun ** Check the sstat2 register in case of wide transfer.
6276*4882a593Smuzhiyun */
6277*4882a593Smuzhiyun
6278*4882a593Smuzhiyun rest += delta;
6279*4882a593Smuzhiyun ss0 = INB (nc_sstat0);
6280*4882a593Smuzhiyun if (ss0 & OLF) rest++;
6281*4882a593Smuzhiyun if (ss0 & ORF) rest++;
6282*4882a593Smuzhiyun if (INB(nc_scntl3) & EWS) {
6283*4882a593Smuzhiyun ss2 = INB (nc_sstat2);
6284*4882a593Smuzhiyun if (ss2 & OLF1) rest++;
6285*4882a593Smuzhiyun if (ss2 & ORF1) rest++;
6286*4882a593Smuzhiyun }
6287*4882a593Smuzhiyun
6288*4882a593Smuzhiyun if (DEBUG_FLAGS & (DEBUG_TINY|DEBUG_PHASE))
6289*4882a593Smuzhiyun printk ("P%x%x RL=%d D=%d SS0=%x ", cmd&7, sbcl&7,
6290*4882a593Smuzhiyun (unsigned) rest, (unsigned) delta, ss0);
6291*4882a593Smuzhiyun
6292*4882a593Smuzhiyun } else {
6293*4882a593Smuzhiyun if (DEBUG_FLAGS & (DEBUG_TINY|DEBUG_PHASE))
6294*4882a593Smuzhiyun printk ("P%x%x RL=%d ", cmd&7, sbcl&7, rest);
6295*4882a593Smuzhiyun }
6296*4882a593Smuzhiyun
6297*4882a593Smuzhiyun /*
6298*4882a593Smuzhiyun ** Clear fifos.
6299*4882a593Smuzhiyun */
6300*4882a593Smuzhiyun OUTONB (nc_ctest3, CLF ); /* clear dma fifo */
6301*4882a593Smuzhiyun OUTB (nc_stest3, TE|CSF); /* clear scsi fifo */
6302*4882a593Smuzhiyun
6303*4882a593Smuzhiyun /*
6304*4882a593Smuzhiyun ** locate matching cp.
6305*4882a593Smuzhiyun ** if the interrupted phase is DATA IN or DATA OUT,
6306*4882a593Smuzhiyun ** trust the global header.
6307*4882a593Smuzhiyun */
6308*4882a593Smuzhiyun dsa = INL (nc_dsa);
6309*4882a593Smuzhiyun if (!(cmd & 6)) {
6310*4882a593Smuzhiyun cp = np->header.cp;
6311*4882a593Smuzhiyun if (CCB_PHYS(cp, phys) != dsa)
6312*4882a593Smuzhiyun cp = NULL;
6313*4882a593Smuzhiyun } else {
6314*4882a593Smuzhiyun cp = np->ccb;
6315*4882a593Smuzhiyun while (cp && (CCB_PHYS (cp, phys) != dsa))
6316*4882a593Smuzhiyun cp = cp->link_ccb;
6317*4882a593Smuzhiyun }
6318*4882a593Smuzhiyun
6319*4882a593Smuzhiyun /*
6320*4882a593Smuzhiyun ** try to find the interrupted script command,
6321*4882a593Smuzhiyun ** and the address at which to continue.
6322*4882a593Smuzhiyun */
6323*4882a593Smuzhiyun vdsp = NULL;
6324*4882a593Smuzhiyun nxtdsp = 0;
6325*4882a593Smuzhiyun if (dsp > np->p_script &&
6326*4882a593Smuzhiyun dsp <= np->p_script + sizeof(struct script)) {
6327*4882a593Smuzhiyun vdsp = (u32 *)((char*)np->script0 + (dsp-np->p_script-8));
6328*4882a593Smuzhiyun nxtdsp = dsp;
6329*4882a593Smuzhiyun }
6330*4882a593Smuzhiyun else if (dsp > np->p_scripth &&
6331*4882a593Smuzhiyun dsp <= np->p_scripth + sizeof(struct scripth)) {
6332*4882a593Smuzhiyun vdsp = (u32 *)((char*)np->scripth0 + (dsp-np->p_scripth-8));
6333*4882a593Smuzhiyun nxtdsp = dsp;
6334*4882a593Smuzhiyun }
6335*4882a593Smuzhiyun else if (cp) {
6336*4882a593Smuzhiyun if (dsp == CCB_PHYS (cp, patch[2])) {
6337*4882a593Smuzhiyun vdsp = &cp->patch[0];
6338*4882a593Smuzhiyun nxtdsp = scr_to_cpu(vdsp[3]);
6339*4882a593Smuzhiyun }
6340*4882a593Smuzhiyun else if (dsp == CCB_PHYS (cp, patch[6])) {
6341*4882a593Smuzhiyun vdsp = &cp->patch[4];
6342*4882a593Smuzhiyun nxtdsp = scr_to_cpu(vdsp[3]);
6343*4882a593Smuzhiyun }
6344*4882a593Smuzhiyun }
6345*4882a593Smuzhiyun
6346*4882a593Smuzhiyun /*
6347*4882a593Smuzhiyun ** log the information
6348*4882a593Smuzhiyun */
6349*4882a593Smuzhiyun
6350*4882a593Smuzhiyun if (DEBUG_FLAGS & DEBUG_PHASE) {
6351*4882a593Smuzhiyun printk ("\nCP=%p CP2=%p DSP=%x NXT=%x VDSP=%p CMD=%x ",
6352*4882a593Smuzhiyun cp, np->header.cp,
6353*4882a593Smuzhiyun (unsigned)dsp,
6354*4882a593Smuzhiyun (unsigned)nxtdsp, vdsp, cmd);
6355*4882a593Smuzhiyun }
6356*4882a593Smuzhiyun
6357*4882a593Smuzhiyun /*
6358*4882a593Smuzhiyun ** cp=0 means that the DSA does not point to a valid control
6359*4882a593Smuzhiyun ** block. This should not happen since we donnot use multi-byte
6360*4882a593Smuzhiyun ** move while we are being reselected ot after command complete.
6361*4882a593Smuzhiyun ** We are not able to recover from such a phase error.
6362*4882a593Smuzhiyun */
6363*4882a593Smuzhiyun if (!cp) {
6364*4882a593Smuzhiyun printk ("%s: SCSI phase error fixup: "
6365*4882a593Smuzhiyun "CCB already dequeued (0x%08lx)\n",
6366*4882a593Smuzhiyun ncr_name (np), (u_long) np->header.cp);
6367*4882a593Smuzhiyun goto reset_all;
6368*4882a593Smuzhiyun }
6369*4882a593Smuzhiyun
6370*4882a593Smuzhiyun /*
6371*4882a593Smuzhiyun ** get old startaddress and old length.
6372*4882a593Smuzhiyun */
6373*4882a593Smuzhiyun
6374*4882a593Smuzhiyun oadr = scr_to_cpu(vdsp[1]);
6375*4882a593Smuzhiyun
6376*4882a593Smuzhiyun if (cmd & 0x10) { /* Table indirect */
6377*4882a593Smuzhiyun tblp = (u32 *) ((char*) &cp->phys + oadr);
6378*4882a593Smuzhiyun olen = scr_to_cpu(tblp[0]);
6379*4882a593Smuzhiyun oadr = scr_to_cpu(tblp[1]);
6380*4882a593Smuzhiyun } else {
6381*4882a593Smuzhiyun tblp = (u32 *) 0;
6382*4882a593Smuzhiyun olen = scr_to_cpu(vdsp[0]) & 0xffffff;
6383*4882a593Smuzhiyun }
6384*4882a593Smuzhiyun
6385*4882a593Smuzhiyun if (DEBUG_FLAGS & DEBUG_PHASE) {
6386*4882a593Smuzhiyun printk ("OCMD=%x\nTBLP=%p OLEN=%x OADR=%x\n",
6387*4882a593Smuzhiyun (unsigned) (scr_to_cpu(vdsp[0]) >> 24),
6388*4882a593Smuzhiyun tblp,
6389*4882a593Smuzhiyun (unsigned) olen,
6390*4882a593Smuzhiyun (unsigned) oadr);
6391*4882a593Smuzhiyun }
6392*4882a593Smuzhiyun
6393*4882a593Smuzhiyun /*
6394*4882a593Smuzhiyun ** check cmd against assumed interrupted script command.
6395*4882a593Smuzhiyun */
6396*4882a593Smuzhiyun
6397*4882a593Smuzhiyun if (cmd != (scr_to_cpu(vdsp[0]) >> 24)) {
6398*4882a593Smuzhiyun PRINT_ADDR(cp->cmd, "internal error: cmd=%02x != %02x=(vdsp[0] "
6399*4882a593Smuzhiyun ">> 24)\n", cmd, scr_to_cpu(vdsp[0]) >> 24);
6400*4882a593Smuzhiyun
6401*4882a593Smuzhiyun goto reset_all;
6402*4882a593Smuzhiyun }
6403*4882a593Smuzhiyun
6404*4882a593Smuzhiyun /*
6405*4882a593Smuzhiyun ** cp != np->header.cp means that the header of the CCB
6406*4882a593Smuzhiyun ** currently being processed has not yet been copied to
6407*4882a593Smuzhiyun ** the global header area. That may happen if the device did
6408*4882a593Smuzhiyun ** not accept all our messages after having been selected.
6409*4882a593Smuzhiyun */
6410*4882a593Smuzhiyun if (cp != np->header.cp) {
6411*4882a593Smuzhiyun printk ("%s: SCSI phase error fixup: "
6412*4882a593Smuzhiyun "CCB address mismatch (0x%08lx != 0x%08lx)\n",
6413*4882a593Smuzhiyun ncr_name (np), (u_long) cp, (u_long) np->header.cp);
6414*4882a593Smuzhiyun }
6415*4882a593Smuzhiyun
6416*4882a593Smuzhiyun /*
6417*4882a593Smuzhiyun ** if old phase not dataphase, leave here.
6418*4882a593Smuzhiyun */
6419*4882a593Smuzhiyun
6420*4882a593Smuzhiyun if (cmd & 0x06) {
6421*4882a593Smuzhiyun PRINT_ADDR(cp->cmd, "phase change %x-%x %d@%08x resid=%d.\n",
6422*4882a593Smuzhiyun cmd&7, sbcl&7, (unsigned)olen,
6423*4882a593Smuzhiyun (unsigned)oadr, (unsigned)rest);
6424*4882a593Smuzhiyun goto unexpected_phase;
6425*4882a593Smuzhiyun }
6426*4882a593Smuzhiyun
6427*4882a593Smuzhiyun /*
6428*4882a593Smuzhiyun ** choose the correct patch area.
6429*4882a593Smuzhiyun ** if savep points to one, choose the other.
6430*4882a593Smuzhiyun */
6431*4882a593Smuzhiyun
6432*4882a593Smuzhiyun newcmd = cp->patch;
6433*4882a593Smuzhiyun newtmp = CCB_PHYS (cp, patch);
6434*4882a593Smuzhiyun if (newtmp == scr_to_cpu(cp->phys.header.savep)) {
6435*4882a593Smuzhiyun newcmd = &cp->patch[4];
6436*4882a593Smuzhiyun newtmp = CCB_PHYS (cp, patch[4]);
6437*4882a593Smuzhiyun }
6438*4882a593Smuzhiyun
6439*4882a593Smuzhiyun /*
6440*4882a593Smuzhiyun ** fillin the commands
6441*4882a593Smuzhiyun */
6442*4882a593Smuzhiyun
6443*4882a593Smuzhiyun newcmd[0] = cpu_to_scr(((cmd & 0x0f) << 24) | rest);
6444*4882a593Smuzhiyun newcmd[1] = cpu_to_scr(oadr + olen - rest);
6445*4882a593Smuzhiyun newcmd[2] = cpu_to_scr(SCR_JUMP);
6446*4882a593Smuzhiyun newcmd[3] = cpu_to_scr(nxtdsp);
6447*4882a593Smuzhiyun
6448*4882a593Smuzhiyun if (DEBUG_FLAGS & DEBUG_PHASE) {
6449*4882a593Smuzhiyun PRINT_ADDR(cp->cmd, "newcmd[%d] %x %x %x %x.\n",
6450*4882a593Smuzhiyun (int) (newcmd - cp->patch),
6451*4882a593Smuzhiyun (unsigned)scr_to_cpu(newcmd[0]),
6452*4882a593Smuzhiyun (unsigned)scr_to_cpu(newcmd[1]),
6453*4882a593Smuzhiyun (unsigned)scr_to_cpu(newcmd[2]),
6454*4882a593Smuzhiyun (unsigned)scr_to_cpu(newcmd[3]));
6455*4882a593Smuzhiyun }
6456*4882a593Smuzhiyun /*
6457*4882a593Smuzhiyun ** fake the return address (to the patch).
6458*4882a593Smuzhiyun ** and restart script processor at dispatcher.
6459*4882a593Smuzhiyun */
6460*4882a593Smuzhiyun OUTL (nc_temp, newtmp);
6461*4882a593Smuzhiyun OUTL_DSP (NCB_SCRIPT_PHYS (np, dispatch));
6462*4882a593Smuzhiyun return;
6463*4882a593Smuzhiyun
6464*4882a593Smuzhiyun /*
6465*4882a593Smuzhiyun ** Unexpected phase changes that occurs when the current phase
6466*4882a593Smuzhiyun ** is not a DATA IN or DATA OUT phase are due to error conditions.
6467*4882a593Smuzhiyun ** Such event may only happen when the SCRIPTS is using a
6468*4882a593Smuzhiyun ** multibyte SCSI MOVE.
6469*4882a593Smuzhiyun **
6470*4882a593Smuzhiyun ** Phase change Some possible cause
6471*4882a593Smuzhiyun **
6472*4882a593Smuzhiyun ** COMMAND --> MSG IN SCSI parity error detected by target.
6473*4882a593Smuzhiyun ** COMMAND --> STATUS Bad command or refused by target.
6474*4882a593Smuzhiyun ** MSG OUT --> MSG IN Message rejected by target.
6475*4882a593Smuzhiyun ** MSG OUT --> COMMAND Bogus target that discards extended
6476*4882a593Smuzhiyun ** negotiation messages.
6477*4882a593Smuzhiyun **
6478*4882a593Smuzhiyun ** The code below does not care of the new phase and so
6479*4882a593Smuzhiyun ** trusts the target. Why to annoy it ?
6480*4882a593Smuzhiyun ** If the interrupted phase is COMMAND phase, we restart at
6481*4882a593Smuzhiyun ** dispatcher.
6482*4882a593Smuzhiyun ** If a target does not get all the messages after selection,
6483*4882a593Smuzhiyun ** the code assumes blindly that the target discards extended
6484*4882a593Smuzhiyun ** messages and clears the negotiation status.
6485*4882a593Smuzhiyun ** If the target does not want all our response to negotiation,
6486*4882a593Smuzhiyun ** we force a SIR_NEGO_PROTO interrupt (it is a hack that avoids
6487*4882a593Smuzhiyun ** bloat for such a should_not_happen situation).
6488*4882a593Smuzhiyun ** In all other situation, we reset the BUS.
6489*4882a593Smuzhiyun ** Are these assumptions reasonable ? (Wait and see ...)
6490*4882a593Smuzhiyun */
6491*4882a593Smuzhiyun unexpected_phase:
6492*4882a593Smuzhiyun dsp -= 8;
6493*4882a593Smuzhiyun nxtdsp = 0;
6494*4882a593Smuzhiyun
6495*4882a593Smuzhiyun switch (cmd & 7) {
6496*4882a593Smuzhiyun case 2: /* COMMAND phase */
6497*4882a593Smuzhiyun nxtdsp = NCB_SCRIPT_PHYS (np, dispatch);
6498*4882a593Smuzhiyun break;
6499*4882a593Smuzhiyun #if 0
6500*4882a593Smuzhiyun case 3: /* STATUS phase */
6501*4882a593Smuzhiyun nxtdsp = NCB_SCRIPT_PHYS (np, dispatch);
6502*4882a593Smuzhiyun break;
6503*4882a593Smuzhiyun #endif
6504*4882a593Smuzhiyun case 6: /* MSG OUT phase */
6505*4882a593Smuzhiyun np->scripth->nxtdsp_go_on[0] = cpu_to_scr(dsp + 8);
6506*4882a593Smuzhiyun if (dsp == NCB_SCRIPT_PHYS (np, send_ident)) {
6507*4882a593Smuzhiyun cp->host_status = HS_BUSY;
6508*4882a593Smuzhiyun nxtdsp = NCB_SCRIPTH_PHYS (np, clratn_go_on);
6509*4882a593Smuzhiyun }
6510*4882a593Smuzhiyun else if (dsp == NCB_SCRIPTH_PHYS (np, send_wdtr) ||
6511*4882a593Smuzhiyun dsp == NCB_SCRIPTH_PHYS (np, send_sdtr)) {
6512*4882a593Smuzhiyun nxtdsp = NCB_SCRIPTH_PHYS (np, nego_bad_phase);
6513*4882a593Smuzhiyun }
6514*4882a593Smuzhiyun break;
6515*4882a593Smuzhiyun #if 0
6516*4882a593Smuzhiyun case 7: /* MSG IN phase */
6517*4882a593Smuzhiyun nxtdsp = NCB_SCRIPT_PHYS (np, clrack);
6518*4882a593Smuzhiyun break;
6519*4882a593Smuzhiyun #endif
6520*4882a593Smuzhiyun }
6521*4882a593Smuzhiyun
6522*4882a593Smuzhiyun if (nxtdsp) {
6523*4882a593Smuzhiyun OUTL_DSP (nxtdsp);
6524*4882a593Smuzhiyun return;
6525*4882a593Smuzhiyun }
6526*4882a593Smuzhiyun
6527*4882a593Smuzhiyun reset_all:
6528*4882a593Smuzhiyun ncr_start_reset(np);
6529*4882a593Smuzhiyun }
6530*4882a593Smuzhiyun
6531*4882a593Smuzhiyun
ncr_sir_to_redo(struct ncb * np,int num,struct ccb * cp)6532*4882a593Smuzhiyun static void ncr_sir_to_redo(struct ncb *np, int num, struct ccb *cp)
6533*4882a593Smuzhiyun {
6534*4882a593Smuzhiyun struct scsi_cmnd *cmd = cp->cmd;
6535*4882a593Smuzhiyun struct tcb *tp = &np->target[cmd->device->id];
6536*4882a593Smuzhiyun struct lcb *lp = tp->lp[cmd->device->lun];
6537*4882a593Smuzhiyun struct list_head *qp;
6538*4882a593Smuzhiyun struct ccb * cp2;
6539*4882a593Smuzhiyun int disc_cnt = 0;
6540*4882a593Smuzhiyun int busy_cnt = 0;
6541*4882a593Smuzhiyun u32 startp;
6542*4882a593Smuzhiyun u_char s_status = INB (SS_PRT);
6543*4882a593Smuzhiyun
6544*4882a593Smuzhiyun /*
6545*4882a593Smuzhiyun ** Let the SCRIPTS processor skip all not yet started CCBs,
6546*4882a593Smuzhiyun ** and count disconnected CCBs. Since the busy queue is in
6547*4882a593Smuzhiyun ** the same order as the chip start queue, disconnected CCBs
6548*4882a593Smuzhiyun ** are before cp and busy ones after.
6549*4882a593Smuzhiyun */
6550*4882a593Smuzhiyun if (lp) {
6551*4882a593Smuzhiyun qp = lp->busy_ccbq.prev;
6552*4882a593Smuzhiyun while (qp != &lp->busy_ccbq) {
6553*4882a593Smuzhiyun cp2 = list_entry(qp, struct ccb, link_ccbq);
6554*4882a593Smuzhiyun qp = qp->prev;
6555*4882a593Smuzhiyun ++busy_cnt;
6556*4882a593Smuzhiyun if (cp2 == cp)
6557*4882a593Smuzhiyun break;
6558*4882a593Smuzhiyun cp2->start.schedule.l_paddr =
6559*4882a593Smuzhiyun cpu_to_scr(NCB_SCRIPTH_PHYS (np, skip));
6560*4882a593Smuzhiyun }
6561*4882a593Smuzhiyun lp->held_ccb = cp; /* Requeue when this one completes */
6562*4882a593Smuzhiyun disc_cnt = lp->queuedccbs - busy_cnt;
6563*4882a593Smuzhiyun }
6564*4882a593Smuzhiyun
6565*4882a593Smuzhiyun switch(s_status) {
6566*4882a593Smuzhiyun default: /* Just for safety, should never happen */
6567*4882a593Smuzhiyun case S_QUEUE_FULL:
6568*4882a593Smuzhiyun /*
6569*4882a593Smuzhiyun ** Decrease number of tags to the number of
6570*4882a593Smuzhiyun ** disconnected commands.
6571*4882a593Smuzhiyun */
6572*4882a593Smuzhiyun if (!lp)
6573*4882a593Smuzhiyun goto out;
6574*4882a593Smuzhiyun if (bootverbose >= 1) {
6575*4882a593Smuzhiyun PRINT_ADDR(cmd, "QUEUE FULL! %d busy, %d disconnected "
6576*4882a593Smuzhiyun "CCBs\n", busy_cnt, disc_cnt);
6577*4882a593Smuzhiyun }
6578*4882a593Smuzhiyun if (disc_cnt < lp->numtags) {
6579*4882a593Smuzhiyun lp->numtags = disc_cnt > 2 ? disc_cnt : 2;
6580*4882a593Smuzhiyun lp->num_good = 0;
6581*4882a593Smuzhiyun ncr_setup_tags (np, cmd->device);
6582*4882a593Smuzhiyun }
6583*4882a593Smuzhiyun /*
6584*4882a593Smuzhiyun ** Requeue the command to the start queue.
6585*4882a593Smuzhiyun ** If any disconnected commands,
6586*4882a593Smuzhiyun ** Clear SIGP.
6587*4882a593Smuzhiyun ** Jump to reselect.
6588*4882a593Smuzhiyun */
6589*4882a593Smuzhiyun cp->phys.header.savep = cp->startp;
6590*4882a593Smuzhiyun cp->host_status = HS_BUSY;
6591*4882a593Smuzhiyun cp->scsi_status = S_ILLEGAL;
6592*4882a593Smuzhiyun
6593*4882a593Smuzhiyun ncr_put_start_queue(np, cp);
6594*4882a593Smuzhiyun if (disc_cnt)
6595*4882a593Smuzhiyun INB (nc_ctest2); /* Clear SIGP */
6596*4882a593Smuzhiyun OUTL_DSP (NCB_SCRIPT_PHYS (np, reselect));
6597*4882a593Smuzhiyun return;
6598*4882a593Smuzhiyun case S_TERMINATED:
6599*4882a593Smuzhiyun case S_CHECK_COND:
6600*4882a593Smuzhiyun /*
6601*4882a593Smuzhiyun ** If we were requesting sense, give up.
6602*4882a593Smuzhiyun */
6603*4882a593Smuzhiyun if (cp->auto_sense)
6604*4882a593Smuzhiyun goto out;
6605*4882a593Smuzhiyun
6606*4882a593Smuzhiyun /*
6607*4882a593Smuzhiyun ** Device returned CHECK CONDITION status.
6608*4882a593Smuzhiyun ** Prepare all needed data strutures for getting
6609*4882a593Smuzhiyun ** sense data.
6610*4882a593Smuzhiyun **
6611*4882a593Smuzhiyun ** identify message
6612*4882a593Smuzhiyun */
6613*4882a593Smuzhiyun cp->scsi_smsg2[0] = IDENTIFY(0, cmd->device->lun);
6614*4882a593Smuzhiyun cp->phys.smsg.addr = cpu_to_scr(CCB_PHYS (cp, scsi_smsg2));
6615*4882a593Smuzhiyun cp->phys.smsg.size = cpu_to_scr(1);
6616*4882a593Smuzhiyun
6617*4882a593Smuzhiyun /*
6618*4882a593Smuzhiyun ** sense command
6619*4882a593Smuzhiyun */
6620*4882a593Smuzhiyun cp->phys.cmd.addr = cpu_to_scr(CCB_PHYS (cp, sensecmd));
6621*4882a593Smuzhiyun cp->phys.cmd.size = cpu_to_scr(6);
6622*4882a593Smuzhiyun
6623*4882a593Smuzhiyun /*
6624*4882a593Smuzhiyun ** patch requested size into sense command
6625*4882a593Smuzhiyun */
6626*4882a593Smuzhiyun cp->sensecmd[0] = 0x03;
6627*4882a593Smuzhiyun cp->sensecmd[1] = (cmd->device->lun & 0x7) << 5;
6628*4882a593Smuzhiyun cp->sensecmd[4] = sizeof(cp->sense_buf);
6629*4882a593Smuzhiyun
6630*4882a593Smuzhiyun /*
6631*4882a593Smuzhiyun ** sense data
6632*4882a593Smuzhiyun */
6633*4882a593Smuzhiyun memset(cp->sense_buf, 0, sizeof(cp->sense_buf));
6634*4882a593Smuzhiyun cp->phys.sense.addr = cpu_to_scr(CCB_PHYS(cp,sense_buf[0]));
6635*4882a593Smuzhiyun cp->phys.sense.size = cpu_to_scr(sizeof(cp->sense_buf));
6636*4882a593Smuzhiyun
6637*4882a593Smuzhiyun /*
6638*4882a593Smuzhiyun ** requeue the command.
6639*4882a593Smuzhiyun */
6640*4882a593Smuzhiyun startp = cpu_to_scr(NCB_SCRIPTH_PHYS (np, sdata_in));
6641*4882a593Smuzhiyun
6642*4882a593Smuzhiyun cp->phys.header.savep = startp;
6643*4882a593Smuzhiyun cp->phys.header.goalp = startp + 24;
6644*4882a593Smuzhiyun cp->phys.header.lastp = startp;
6645*4882a593Smuzhiyun cp->phys.header.wgoalp = startp + 24;
6646*4882a593Smuzhiyun cp->phys.header.wlastp = startp;
6647*4882a593Smuzhiyun
6648*4882a593Smuzhiyun cp->host_status = HS_BUSY;
6649*4882a593Smuzhiyun cp->scsi_status = S_ILLEGAL;
6650*4882a593Smuzhiyun cp->auto_sense = s_status;
6651*4882a593Smuzhiyun
6652*4882a593Smuzhiyun cp->start.schedule.l_paddr =
6653*4882a593Smuzhiyun cpu_to_scr(NCB_SCRIPT_PHYS (np, select));
6654*4882a593Smuzhiyun
6655*4882a593Smuzhiyun /*
6656*4882a593Smuzhiyun ** Select without ATN for quirky devices.
6657*4882a593Smuzhiyun */
6658*4882a593Smuzhiyun if (cmd->device->select_no_atn)
6659*4882a593Smuzhiyun cp->start.schedule.l_paddr =
6660*4882a593Smuzhiyun cpu_to_scr(NCB_SCRIPTH_PHYS (np, select_no_atn));
6661*4882a593Smuzhiyun
6662*4882a593Smuzhiyun ncr_put_start_queue(np, cp);
6663*4882a593Smuzhiyun
6664*4882a593Smuzhiyun OUTL_DSP (NCB_SCRIPT_PHYS (np, start));
6665*4882a593Smuzhiyun return;
6666*4882a593Smuzhiyun }
6667*4882a593Smuzhiyun
6668*4882a593Smuzhiyun out:
6669*4882a593Smuzhiyun OUTONB_STD ();
6670*4882a593Smuzhiyun return;
6671*4882a593Smuzhiyun }
6672*4882a593Smuzhiyun
6673*4882a593Smuzhiyun
6674*4882a593Smuzhiyun /*==========================================================
6675*4882a593Smuzhiyun **
6676*4882a593Smuzhiyun **
6677*4882a593Smuzhiyun ** ncr chip exception handler for programmed interrupts.
6678*4882a593Smuzhiyun **
6679*4882a593Smuzhiyun **
6680*4882a593Smuzhiyun **==========================================================
6681*4882a593Smuzhiyun */
6682*4882a593Smuzhiyun
ncr_int_sir(struct ncb * np)6683*4882a593Smuzhiyun void ncr_int_sir (struct ncb *np)
6684*4882a593Smuzhiyun {
6685*4882a593Smuzhiyun u_char scntl3;
6686*4882a593Smuzhiyun u_char chg, ofs, per, fak, wide;
6687*4882a593Smuzhiyun u_char num = INB (nc_dsps);
6688*4882a593Smuzhiyun struct ccb *cp=NULL;
6689*4882a593Smuzhiyun u_long dsa = INL (nc_dsa);
6690*4882a593Smuzhiyun u_char target = INB (nc_sdid) & 0x0f;
6691*4882a593Smuzhiyun struct tcb *tp = &np->target[target];
6692*4882a593Smuzhiyun struct scsi_target *starget = tp->starget;
6693*4882a593Smuzhiyun
6694*4882a593Smuzhiyun if (DEBUG_FLAGS & DEBUG_TINY) printk ("I#%d", num);
6695*4882a593Smuzhiyun
6696*4882a593Smuzhiyun switch (num) {
6697*4882a593Smuzhiyun case SIR_INTFLY:
6698*4882a593Smuzhiyun /*
6699*4882a593Smuzhiyun ** This is used for HP Zalon/53c720 where INTFLY
6700*4882a593Smuzhiyun ** operation is currently broken.
6701*4882a593Smuzhiyun */
6702*4882a593Smuzhiyun ncr_wakeup_done(np);
6703*4882a593Smuzhiyun #ifdef SCSI_NCR_CCB_DONE_SUPPORT
6704*4882a593Smuzhiyun OUTL(nc_dsp, NCB_SCRIPT_PHYS (np, done_end) + 8);
6705*4882a593Smuzhiyun #else
6706*4882a593Smuzhiyun OUTL(nc_dsp, NCB_SCRIPT_PHYS (np, start));
6707*4882a593Smuzhiyun #endif
6708*4882a593Smuzhiyun return;
6709*4882a593Smuzhiyun case SIR_RESEL_NO_MSG_IN:
6710*4882a593Smuzhiyun case SIR_RESEL_NO_IDENTIFY:
6711*4882a593Smuzhiyun /*
6712*4882a593Smuzhiyun ** If devices reselecting without sending an IDENTIFY
6713*4882a593Smuzhiyun ** message still exist, this should help.
6714*4882a593Smuzhiyun ** We just assume lun=0, 1 CCB, no tag.
6715*4882a593Smuzhiyun */
6716*4882a593Smuzhiyun if (tp->lp[0]) {
6717*4882a593Smuzhiyun OUTL_DSP (scr_to_cpu(tp->lp[0]->jump_ccb[0]));
6718*4882a593Smuzhiyun return;
6719*4882a593Smuzhiyun }
6720*4882a593Smuzhiyun fallthrough;
6721*4882a593Smuzhiyun case SIR_RESEL_BAD_TARGET: /* Will send a TARGET RESET message */
6722*4882a593Smuzhiyun case SIR_RESEL_BAD_LUN: /* Will send a TARGET RESET message */
6723*4882a593Smuzhiyun case SIR_RESEL_BAD_I_T_L_Q: /* Will send an ABORT TAG message */
6724*4882a593Smuzhiyun case SIR_RESEL_BAD_I_T_L: /* Will send an ABORT message */
6725*4882a593Smuzhiyun printk ("%s:%d: SIR %d, "
6726*4882a593Smuzhiyun "incorrect nexus identification on reselection\n",
6727*4882a593Smuzhiyun ncr_name (np), target, num);
6728*4882a593Smuzhiyun goto out;
6729*4882a593Smuzhiyun case SIR_DONE_OVERFLOW:
6730*4882a593Smuzhiyun printk ("%s:%d: SIR %d, "
6731*4882a593Smuzhiyun "CCB done queue overflow\n",
6732*4882a593Smuzhiyun ncr_name (np), target, num);
6733*4882a593Smuzhiyun goto out;
6734*4882a593Smuzhiyun case SIR_BAD_STATUS:
6735*4882a593Smuzhiyun cp = np->header.cp;
6736*4882a593Smuzhiyun if (!cp || CCB_PHYS (cp, phys) != dsa)
6737*4882a593Smuzhiyun goto out;
6738*4882a593Smuzhiyun ncr_sir_to_redo(np, num, cp);
6739*4882a593Smuzhiyun return;
6740*4882a593Smuzhiyun default:
6741*4882a593Smuzhiyun /*
6742*4882a593Smuzhiyun ** lookup the ccb
6743*4882a593Smuzhiyun */
6744*4882a593Smuzhiyun cp = np->ccb;
6745*4882a593Smuzhiyun while (cp && (CCB_PHYS (cp, phys) != dsa))
6746*4882a593Smuzhiyun cp = cp->link_ccb;
6747*4882a593Smuzhiyun
6748*4882a593Smuzhiyun BUG_ON(!cp);
6749*4882a593Smuzhiyun BUG_ON(cp != np->header.cp);
6750*4882a593Smuzhiyun
6751*4882a593Smuzhiyun if (!cp || cp != np->header.cp)
6752*4882a593Smuzhiyun goto out;
6753*4882a593Smuzhiyun }
6754*4882a593Smuzhiyun
6755*4882a593Smuzhiyun switch (num) {
6756*4882a593Smuzhiyun /*-----------------------------------------------------------------------------
6757*4882a593Smuzhiyun **
6758*4882a593Smuzhiyun ** Was Sie schon immer ueber transfermode negotiation wissen wollten ...
6759*4882a593Smuzhiyun ** ("Everything you've always wanted to know about transfer mode
6760*4882a593Smuzhiyun ** negotiation")
6761*4882a593Smuzhiyun **
6762*4882a593Smuzhiyun ** We try to negotiate sync and wide transfer only after
6763*4882a593Smuzhiyun ** a successful inquire command. We look at byte 7 of the
6764*4882a593Smuzhiyun ** inquire data to determine the capabilities of the target.
6765*4882a593Smuzhiyun **
6766*4882a593Smuzhiyun ** When we try to negotiate, we append the negotiation message
6767*4882a593Smuzhiyun ** to the identify and (maybe) simple tag message.
6768*4882a593Smuzhiyun ** The host status field is set to HS_NEGOTIATE to mark this
6769*4882a593Smuzhiyun ** situation.
6770*4882a593Smuzhiyun **
6771*4882a593Smuzhiyun ** If the target doesn't answer this message immediately
6772*4882a593Smuzhiyun ** (as required by the standard), the SIR_NEGO_FAIL interrupt
6773*4882a593Smuzhiyun ** will be raised eventually.
6774*4882a593Smuzhiyun ** The handler removes the HS_NEGOTIATE status, and sets the
6775*4882a593Smuzhiyun ** negotiated value to the default (async / nowide).
6776*4882a593Smuzhiyun **
6777*4882a593Smuzhiyun ** If we receive a matching answer immediately, we check it
6778*4882a593Smuzhiyun ** for validity, and set the values.
6779*4882a593Smuzhiyun **
6780*4882a593Smuzhiyun ** If we receive a Reject message immediately, we assume the
6781*4882a593Smuzhiyun ** negotiation has failed, and fall back to standard values.
6782*4882a593Smuzhiyun **
6783*4882a593Smuzhiyun ** If we receive a negotiation message while not in HS_NEGOTIATE
6784*4882a593Smuzhiyun ** state, it's a target initiated negotiation. We prepare a
6785*4882a593Smuzhiyun ** (hopefully) valid answer, set our parameters, and send back
6786*4882a593Smuzhiyun ** this answer to the target.
6787*4882a593Smuzhiyun **
6788*4882a593Smuzhiyun ** If the target doesn't fetch the answer (no message out phase),
6789*4882a593Smuzhiyun ** we assume the negotiation has failed, and fall back to default
6790*4882a593Smuzhiyun ** settings.
6791*4882a593Smuzhiyun **
6792*4882a593Smuzhiyun ** When we set the values, we adjust them in all ccbs belonging
6793*4882a593Smuzhiyun ** to this target, in the controller's register, and in the "phys"
6794*4882a593Smuzhiyun ** field of the controller's struct ncb.
6795*4882a593Smuzhiyun **
6796*4882a593Smuzhiyun ** Possible cases: hs sir msg_in value send goto
6797*4882a593Smuzhiyun ** We try to negotiate:
6798*4882a593Smuzhiyun ** -> target doesn't msgin NEG FAIL noop defa. - dispatch
6799*4882a593Smuzhiyun ** -> target rejected our msg NEG FAIL reject defa. - dispatch
6800*4882a593Smuzhiyun ** -> target answered (ok) NEG SYNC sdtr set - clrack
6801*4882a593Smuzhiyun ** -> target answered (!ok) NEG SYNC sdtr defa. REJ--->msg_bad
6802*4882a593Smuzhiyun ** -> target answered (ok) NEG WIDE wdtr set - clrack
6803*4882a593Smuzhiyun ** -> target answered (!ok) NEG WIDE wdtr defa. REJ--->msg_bad
6804*4882a593Smuzhiyun ** -> any other msgin NEG FAIL noop defa. - dispatch
6805*4882a593Smuzhiyun **
6806*4882a593Smuzhiyun ** Target tries to negotiate:
6807*4882a593Smuzhiyun ** -> incoming message --- SYNC sdtr set SDTR -
6808*4882a593Smuzhiyun ** -> incoming message --- WIDE wdtr set WDTR -
6809*4882a593Smuzhiyun ** We sent our answer:
6810*4882a593Smuzhiyun ** -> target doesn't msgout --- PROTO ? defa. - dispatch
6811*4882a593Smuzhiyun **
6812*4882a593Smuzhiyun **-----------------------------------------------------------------------------
6813*4882a593Smuzhiyun */
6814*4882a593Smuzhiyun
6815*4882a593Smuzhiyun case SIR_NEGO_FAILED:
6816*4882a593Smuzhiyun /*-------------------------------------------------------
6817*4882a593Smuzhiyun **
6818*4882a593Smuzhiyun ** Negotiation failed.
6819*4882a593Smuzhiyun ** Target doesn't send an answer message,
6820*4882a593Smuzhiyun ** or target rejected our message.
6821*4882a593Smuzhiyun **
6822*4882a593Smuzhiyun ** Remove negotiation request.
6823*4882a593Smuzhiyun **
6824*4882a593Smuzhiyun **-------------------------------------------------------
6825*4882a593Smuzhiyun */
6826*4882a593Smuzhiyun OUTB (HS_PRT, HS_BUSY);
6827*4882a593Smuzhiyun
6828*4882a593Smuzhiyun fallthrough;
6829*4882a593Smuzhiyun
6830*4882a593Smuzhiyun case SIR_NEGO_PROTO:
6831*4882a593Smuzhiyun /*-------------------------------------------------------
6832*4882a593Smuzhiyun **
6833*4882a593Smuzhiyun ** Negotiation failed.
6834*4882a593Smuzhiyun ** Target doesn't fetch the answer message.
6835*4882a593Smuzhiyun **
6836*4882a593Smuzhiyun **-------------------------------------------------------
6837*4882a593Smuzhiyun */
6838*4882a593Smuzhiyun
6839*4882a593Smuzhiyun if (DEBUG_FLAGS & DEBUG_NEGO) {
6840*4882a593Smuzhiyun PRINT_ADDR(cp->cmd, "negotiation failed sir=%x "
6841*4882a593Smuzhiyun "status=%x.\n", num, cp->nego_status);
6842*4882a593Smuzhiyun }
6843*4882a593Smuzhiyun
6844*4882a593Smuzhiyun /*
6845*4882a593Smuzhiyun ** any error in negotiation:
6846*4882a593Smuzhiyun ** fall back to default mode.
6847*4882a593Smuzhiyun */
6848*4882a593Smuzhiyun switch (cp->nego_status) {
6849*4882a593Smuzhiyun
6850*4882a593Smuzhiyun case NS_SYNC:
6851*4882a593Smuzhiyun spi_period(starget) = 0;
6852*4882a593Smuzhiyun spi_offset(starget) = 0;
6853*4882a593Smuzhiyun ncr_setsync (np, cp, 0, 0xe0);
6854*4882a593Smuzhiyun break;
6855*4882a593Smuzhiyun
6856*4882a593Smuzhiyun case NS_WIDE:
6857*4882a593Smuzhiyun spi_width(starget) = 0;
6858*4882a593Smuzhiyun ncr_setwide (np, cp, 0, 0);
6859*4882a593Smuzhiyun break;
6860*4882a593Smuzhiyun
6861*4882a593Smuzhiyun }
6862*4882a593Smuzhiyun np->msgin [0] = NOP;
6863*4882a593Smuzhiyun np->msgout[0] = NOP;
6864*4882a593Smuzhiyun cp->nego_status = 0;
6865*4882a593Smuzhiyun break;
6866*4882a593Smuzhiyun
6867*4882a593Smuzhiyun case SIR_NEGO_SYNC:
6868*4882a593Smuzhiyun if (DEBUG_FLAGS & DEBUG_NEGO) {
6869*4882a593Smuzhiyun ncr_print_msg(cp, "sync msgin", np->msgin);
6870*4882a593Smuzhiyun }
6871*4882a593Smuzhiyun
6872*4882a593Smuzhiyun chg = 0;
6873*4882a593Smuzhiyun per = np->msgin[3];
6874*4882a593Smuzhiyun ofs = np->msgin[4];
6875*4882a593Smuzhiyun if (ofs==0) per=255;
6876*4882a593Smuzhiyun
6877*4882a593Smuzhiyun /*
6878*4882a593Smuzhiyun ** if target sends SDTR message,
6879*4882a593Smuzhiyun ** it CAN transfer synch.
6880*4882a593Smuzhiyun */
6881*4882a593Smuzhiyun
6882*4882a593Smuzhiyun if (ofs && starget)
6883*4882a593Smuzhiyun spi_support_sync(starget) = 1;
6884*4882a593Smuzhiyun
6885*4882a593Smuzhiyun /*
6886*4882a593Smuzhiyun ** check values against driver limits.
6887*4882a593Smuzhiyun */
6888*4882a593Smuzhiyun
6889*4882a593Smuzhiyun if (per < np->minsync)
6890*4882a593Smuzhiyun {chg = 1; per = np->minsync;}
6891*4882a593Smuzhiyun if (per < tp->minsync)
6892*4882a593Smuzhiyun {chg = 1; per = tp->minsync;}
6893*4882a593Smuzhiyun if (ofs > tp->maxoffs)
6894*4882a593Smuzhiyun {chg = 1; ofs = tp->maxoffs;}
6895*4882a593Smuzhiyun
6896*4882a593Smuzhiyun /*
6897*4882a593Smuzhiyun ** Check against controller limits.
6898*4882a593Smuzhiyun */
6899*4882a593Smuzhiyun fak = 7;
6900*4882a593Smuzhiyun scntl3 = 0;
6901*4882a593Smuzhiyun if (ofs != 0) {
6902*4882a593Smuzhiyun ncr_getsync(np, per, &fak, &scntl3);
6903*4882a593Smuzhiyun if (fak > 7) {
6904*4882a593Smuzhiyun chg = 1;
6905*4882a593Smuzhiyun ofs = 0;
6906*4882a593Smuzhiyun }
6907*4882a593Smuzhiyun }
6908*4882a593Smuzhiyun if (ofs == 0) {
6909*4882a593Smuzhiyun fak = 7;
6910*4882a593Smuzhiyun per = 0;
6911*4882a593Smuzhiyun scntl3 = 0;
6912*4882a593Smuzhiyun tp->minsync = 0;
6913*4882a593Smuzhiyun }
6914*4882a593Smuzhiyun
6915*4882a593Smuzhiyun if (DEBUG_FLAGS & DEBUG_NEGO) {
6916*4882a593Smuzhiyun PRINT_ADDR(cp->cmd, "sync: per=%d scntl3=0x%x ofs=%d "
6917*4882a593Smuzhiyun "fak=%d chg=%d.\n", per, scntl3, ofs, fak, chg);
6918*4882a593Smuzhiyun }
6919*4882a593Smuzhiyun
6920*4882a593Smuzhiyun if (INB (HS_PRT) == HS_NEGOTIATE) {
6921*4882a593Smuzhiyun OUTB (HS_PRT, HS_BUSY);
6922*4882a593Smuzhiyun switch (cp->nego_status) {
6923*4882a593Smuzhiyun
6924*4882a593Smuzhiyun case NS_SYNC:
6925*4882a593Smuzhiyun /* This was an answer message */
6926*4882a593Smuzhiyun if (chg) {
6927*4882a593Smuzhiyun /* Answer wasn't acceptable. */
6928*4882a593Smuzhiyun spi_period(starget) = 0;
6929*4882a593Smuzhiyun spi_offset(starget) = 0;
6930*4882a593Smuzhiyun ncr_setsync(np, cp, 0, 0xe0);
6931*4882a593Smuzhiyun OUTL_DSP(NCB_SCRIPT_PHYS (np, msg_bad));
6932*4882a593Smuzhiyun } else {
6933*4882a593Smuzhiyun /* Answer is ok. */
6934*4882a593Smuzhiyun spi_period(starget) = per;
6935*4882a593Smuzhiyun spi_offset(starget) = ofs;
6936*4882a593Smuzhiyun ncr_setsync(np, cp, scntl3, (fak<<5)|ofs);
6937*4882a593Smuzhiyun OUTL_DSP(NCB_SCRIPT_PHYS (np, clrack));
6938*4882a593Smuzhiyun }
6939*4882a593Smuzhiyun return;
6940*4882a593Smuzhiyun
6941*4882a593Smuzhiyun case NS_WIDE:
6942*4882a593Smuzhiyun spi_width(starget) = 0;
6943*4882a593Smuzhiyun ncr_setwide(np, cp, 0, 0);
6944*4882a593Smuzhiyun break;
6945*4882a593Smuzhiyun }
6946*4882a593Smuzhiyun }
6947*4882a593Smuzhiyun
6948*4882a593Smuzhiyun /*
6949*4882a593Smuzhiyun ** It was a request. Set value and
6950*4882a593Smuzhiyun ** prepare an answer message
6951*4882a593Smuzhiyun */
6952*4882a593Smuzhiyun
6953*4882a593Smuzhiyun spi_period(starget) = per;
6954*4882a593Smuzhiyun spi_offset(starget) = ofs;
6955*4882a593Smuzhiyun ncr_setsync(np, cp, scntl3, (fak<<5)|ofs);
6956*4882a593Smuzhiyun
6957*4882a593Smuzhiyun spi_populate_sync_msg(np->msgout, per, ofs);
6958*4882a593Smuzhiyun cp->nego_status = NS_SYNC;
6959*4882a593Smuzhiyun
6960*4882a593Smuzhiyun if (DEBUG_FLAGS & DEBUG_NEGO) {
6961*4882a593Smuzhiyun ncr_print_msg(cp, "sync msgout", np->msgout);
6962*4882a593Smuzhiyun }
6963*4882a593Smuzhiyun
6964*4882a593Smuzhiyun if (!ofs) {
6965*4882a593Smuzhiyun OUTL_DSP (NCB_SCRIPT_PHYS (np, msg_bad));
6966*4882a593Smuzhiyun return;
6967*4882a593Smuzhiyun }
6968*4882a593Smuzhiyun np->msgin [0] = NOP;
6969*4882a593Smuzhiyun
6970*4882a593Smuzhiyun break;
6971*4882a593Smuzhiyun
6972*4882a593Smuzhiyun case SIR_NEGO_WIDE:
6973*4882a593Smuzhiyun /*
6974*4882a593Smuzhiyun ** Wide request message received.
6975*4882a593Smuzhiyun */
6976*4882a593Smuzhiyun if (DEBUG_FLAGS & DEBUG_NEGO) {
6977*4882a593Smuzhiyun ncr_print_msg(cp, "wide msgin", np->msgin);
6978*4882a593Smuzhiyun }
6979*4882a593Smuzhiyun
6980*4882a593Smuzhiyun /*
6981*4882a593Smuzhiyun ** get requested values.
6982*4882a593Smuzhiyun */
6983*4882a593Smuzhiyun
6984*4882a593Smuzhiyun chg = 0;
6985*4882a593Smuzhiyun wide = np->msgin[3];
6986*4882a593Smuzhiyun
6987*4882a593Smuzhiyun /*
6988*4882a593Smuzhiyun ** if target sends WDTR message,
6989*4882a593Smuzhiyun ** it CAN transfer wide.
6990*4882a593Smuzhiyun */
6991*4882a593Smuzhiyun
6992*4882a593Smuzhiyun if (wide && starget)
6993*4882a593Smuzhiyun spi_support_wide(starget) = 1;
6994*4882a593Smuzhiyun
6995*4882a593Smuzhiyun /*
6996*4882a593Smuzhiyun ** check values against driver limits.
6997*4882a593Smuzhiyun */
6998*4882a593Smuzhiyun
6999*4882a593Smuzhiyun if (wide > tp->usrwide)
7000*4882a593Smuzhiyun {chg = 1; wide = tp->usrwide;}
7001*4882a593Smuzhiyun
7002*4882a593Smuzhiyun if (DEBUG_FLAGS & DEBUG_NEGO) {
7003*4882a593Smuzhiyun PRINT_ADDR(cp->cmd, "wide: wide=%d chg=%d.\n", wide,
7004*4882a593Smuzhiyun chg);
7005*4882a593Smuzhiyun }
7006*4882a593Smuzhiyun
7007*4882a593Smuzhiyun if (INB (HS_PRT) == HS_NEGOTIATE) {
7008*4882a593Smuzhiyun OUTB (HS_PRT, HS_BUSY);
7009*4882a593Smuzhiyun switch (cp->nego_status) {
7010*4882a593Smuzhiyun
7011*4882a593Smuzhiyun case NS_WIDE:
7012*4882a593Smuzhiyun /*
7013*4882a593Smuzhiyun ** This was an answer message
7014*4882a593Smuzhiyun */
7015*4882a593Smuzhiyun if (chg) {
7016*4882a593Smuzhiyun /* Answer wasn't acceptable. */
7017*4882a593Smuzhiyun spi_width(starget) = 0;
7018*4882a593Smuzhiyun ncr_setwide(np, cp, 0, 1);
7019*4882a593Smuzhiyun OUTL_DSP (NCB_SCRIPT_PHYS (np, msg_bad));
7020*4882a593Smuzhiyun } else {
7021*4882a593Smuzhiyun /* Answer is ok. */
7022*4882a593Smuzhiyun spi_width(starget) = wide;
7023*4882a593Smuzhiyun ncr_setwide(np, cp, wide, 1);
7024*4882a593Smuzhiyun OUTL_DSP (NCB_SCRIPT_PHYS (np, clrack));
7025*4882a593Smuzhiyun }
7026*4882a593Smuzhiyun return;
7027*4882a593Smuzhiyun
7028*4882a593Smuzhiyun case NS_SYNC:
7029*4882a593Smuzhiyun spi_period(starget) = 0;
7030*4882a593Smuzhiyun spi_offset(starget) = 0;
7031*4882a593Smuzhiyun ncr_setsync(np, cp, 0, 0xe0);
7032*4882a593Smuzhiyun break;
7033*4882a593Smuzhiyun }
7034*4882a593Smuzhiyun }
7035*4882a593Smuzhiyun
7036*4882a593Smuzhiyun /*
7037*4882a593Smuzhiyun ** It was a request, set value and
7038*4882a593Smuzhiyun ** prepare an answer message
7039*4882a593Smuzhiyun */
7040*4882a593Smuzhiyun
7041*4882a593Smuzhiyun spi_width(starget) = wide;
7042*4882a593Smuzhiyun ncr_setwide(np, cp, wide, 1);
7043*4882a593Smuzhiyun spi_populate_width_msg(np->msgout, wide);
7044*4882a593Smuzhiyun
7045*4882a593Smuzhiyun np->msgin [0] = NOP;
7046*4882a593Smuzhiyun
7047*4882a593Smuzhiyun cp->nego_status = NS_WIDE;
7048*4882a593Smuzhiyun
7049*4882a593Smuzhiyun if (DEBUG_FLAGS & DEBUG_NEGO) {
7050*4882a593Smuzhiyun ncr_print_msg(cp, "wide msgout", np->msgin);
7051*4882a593Smuzhiyun }
7052*4882a593Smuzhiyun break;
7053*4882a593Smuzhiyun
7054*4882a593Smuzhiyun /*--------------------------------------------------------------------
7055*4882a593Smuzhiyun **
7056*4882a593Smuzhiyun ** Processing of special messages
7057*4882a593Smuzhiyun **
7058*4882a593Smuzhiyun **--------------------------------------------------------------------
7059*4882a593Smuzhiyun */
7060*4882a593Smuzhiyun
7061*4882a593Smuzhiyun case SIR_REJECT_RECEIVED:
7062*4882a593Smuzhiyun /*-----------------------------------------------
7063*4882a593Smuzhiyun **
7064*4882a593Smuzhiyun ** We received a MESSAGE_REJECT.
7065*4882a593Smuzhiyun **
7066*4882a593Smuzhiyun **-----------------------------------------------
7067*4882a593Smuzhiyun */
7068*4882a593Smuzhiyun
7069*4882a593Smuzhiyun PRINT_ADDR(cp->cmd, "MESSAGE_REJECT received (%x:%x).\n",
7070*4882a593Smuzhiyun (unsigned)scr_to_cpu(np->lastmsg), np->msgout[0]);
7071*4882a593Smuzhiyun break;
7072*4882a593Smuzhiyun
7073*4882a593Smuzhiyun case SIR_REJECT_SENT:
7074*4882a593Smuzhiyun /*-----------------------------------------------
7075*4882a593Smuzhiyun **
7076*4882a593Smuzhiyun ** We received an unknown message
7077*4882a593Smuzhiyun **
7078*4882a593Smuzhiyun **-----------------------------------------------
7079*4882a593Smuzhiyun */
7080*4882a593Smuzhiyun
7081*4882a593Smuzhiyun ncr_print_msg(cp, "MESSAGE_REJECT sent for", np->msgin);
7082*4882a593Smuzhiyun break;
7083*4882a593Smuzhiyun
7084*4882a593Smuzhiyun /*--------------------------------------------------------------------
7085*4882a593Smuzhiyun **
7086*4882a593Smuzhiyun ** Processing of special messages
7087*4882a593Smuzhiyun **
7088*4882a593Smuzhiyun **--------------------------------------------------------------------
7089*4882a593Smuzhiyun */
7090*4882a593Smuzhiyun
7091*4882a593Smuzhiyun case SIR_IGN_RESIDUE:
7092*4882a593Smuzhiyun /*-----------------------------------------------
7093*4882a593Smuzhiyun **
7094*4882a593Smuzhiyun ** We received an IGNORE RESIDUE message,
7095*4882a593Smuzhiyun ** which couldn't be handled by the script.
7096*4882a593Smuzhiyun **
7097*4882a593Smuzhiyun **-----------------------------------------------
7098*4882a593Smuzhiyun */
7099*4882a593Smuzhiyun
7100*4882a593Smuzhiyun PRINT_ADDR(cp->cmd, "IGNORE_WIDE_RESIDUE received, but not yet "
7101*4882a593Smuzhiyun "implemented.\n");
7102*4882a593Smuzhiyun break;
7103*4882a593Smuzhiyun #if 0
7104*4882a593Smuzhiyun case SIR_MISSING_SAVE:
7105*4882a593Smuzhiyun /*-----------------------------------------------
7106*4882a593Smuzhiyun **
7107*4882a593Smuzhiyun ** We received an DISCONNECT message,
7108*4882a593Smuzhiyun ** but the datapointer wasn't saved before.
7109*4882a593Smuzhiyun **
7110*4882a593Smuzhiyun **-----------------------------------------------
7111*4882a593Smuzhiyun */
7112*4882a593Smuzhiyun
7113*4882a593Smuzhiyun PRINT_ADDR(cp->cmd, "DISCONNECT received, but datapointer "
7114*4882a593Smuzhiyun "not saved: data=%x save=%x goal=%x.\n",
7115*4882a593Smuzhiyun (unsigned) INL (nc_temp),
7116*4882a593Smuzhiyun (unsigned) scr_to_cpu(np->header.savep),
7117*4882a593Smuzhiyun (unsigned) scr_to_cpu(np->header.goalp));
7118*4882a593Smuzhiyun break;
7119*4882a593Smuzhiyun #endif
7120*4882a593Smuzhiyun }
7121*4882a593Smuzhiyun
7122*4882a593Smuzhiyun out:
7123*4882a593Smuzhiyun OUTONB_STD ();
7124*4882a593Smuzhiyun }
7125*4882a593Smuzhiyun
7126*4882a593Smuzhiyun /*==========================================================
7127*4882a593Smuzhiyun **
7128*4882a593Smuzhiyun **
7129*4882a593Smuzhiyun ** Acquire a control block
7130*4882a593Smuzhiyun **
7131*4882a593Smuzhiyun **
7132*4882a593Smuzhiyun **==========================================================
7133*4882a593Smuzhiyun */
7134*4882a593Smuzhiyun
ncr_get_ccb(struct ncb * np,struct scsi_cmnd * cmd)7135*4882a593Smuzhiyun static struct ccb *ncr_get_ccb(struct ncb *np, struct scsi_cmnd *cmd)
7136*4882a593Smuzhiyun {
7137*4882a593Smuzhiyun u_char tn = cmd->device->id;
7138*4882a593Smuzhiyun u_char ln = cmd->device->lun;
7139*4882a593Smuzhiyun struct tcb *tp = &np->target[tn];
7140*4882a593Smuzhiyun struct lcb *lp = tp->lp[ln];
7141*4882a593Smuzhiyun u_char tag = NO_TAG;
7142*4882a593Smuzhiyun struct ccb *cp = NULL;
7143*4882a593Smuzhiyun
7144*4882a593Smuzhiyun /*
7145*4882a593Smuzhiyun ** Lun structure available ?
7146*4882a593Smuzhiyun */
7147*4882a593Smuzhiyun if (lp) {
7148*4882a593Smuzhiyun struct list_head *qp;
7149*4882a593Smuzhiyun /*
7150*4882a593Smuzhiyun ** Keep from using more tags than we can handle.
7151*4882a593Smuzhiyun */
7152*4882a593Smuzhiyun if (lp->usetags && lp->busyccbs >= lp->maxnxs)
7153*4882a593Smuzhiyun return NULL;
7154*4882a593Smuzhiyun
7155*4882a593Smuzhiyun /*
7156*4882a593Smuzhiyun ** Allocate a new CCB if needed.
7157*4882a593Smuzhiyun */
7158*4882a593Smuzhiyun if (list_empty(&lp->free_ccbq))
7159*4882a593Smuzhiyun ncr_alloc_ccb(np, tn, ln);
7160*4882a593Smuzhiyun
7161*4882a593Smuzhiyun /*
7162*4882a593Smuzhiyun ** Look for free CCB
7163*4882a593Smuzhiyun */
7164*4882a593Smuzhiyun qp = ncr_list_pop(&lp->free_ccbq);
7165*4882a593Smuzhiyun if (qp) {
7166*4882a593Smuzhiyun cp = list_entry(qp, struct ccb, link_ccbq);
7167*4882a593Smuzhiyun if (cp->magic) {
7168*4882a593Smuzhiyun PRINT_ADDR(cmd, "ccb free list corrupted "
7169*4882a593Smuzhiyun "(@%p)\n", cp);
7170*4882a593Smuzhiyun cp = NULL;
7171*4882a593Smuzhiyun } else {
7172*4882a593Smuzhiyun list_add_tail(qp, &lp->wait_ccbq);
7173*4882a593Smuzhiyun ++lp->busyccbs;
7174*4882a593Smuzhiyun }
7175*4882a593Smuzhiyun }
7176*4882a593Smuzhiyun
7177*4882a593Smuzhiyun /*
7178*4882a593Smuzhiyun ** If a CCB is available,
7179*4882a593Smuzhiyun ** Get a tag for this nexus if required.
7180*4882a593Smuzhiyun */
7181*4882a593Smuzhiyun if (cp) {
7182*4882a593Smuzhiyun if (lp->usetags)
7183*4882a593Smuzhiyun tag = lp->cb_tags[lp->ia_tag];
7184*4882a593Smuzhiyun }
7185*4882a593Smuzhiyun else if (lp->actccbs > 0)
7186*4882a593Smuzhiyun return NULL;
7187*4882a593Smuzhiyun }
7188*4882a593Smuzhiyun
7189*4882a593Smuzhiyun /*
7190*4882a593Smuzhiyun ** if nothing available, take the default.
7191*4882a593Smuzhiyun */
7192*4882a593Smuzhiyun if (!cp)
7193*4882a593Smuzhiyun cp = np->ccb;
7194*4882a593Smuzhiyun
7195*4882a593Smuzhiyun /*
7196*4882a593Smuzhiyun ** Wait until available.
7197*4882a593Smuzhiyun */
7198*4882a593Smuzhiyun #if 0
7199*4882a593Smuzhiyun while (cp->magic) {
7200*4882a593Smuzhiyun if (flags & SCSI_NOSLEEP) break;
7201*4882a593Smuzhiyun if (tsleep ((caddr_t)cp, PRIBIO|PCATCH, "ncr", 0))
7202*4882a593Smuzhiyun break;
7203*4882a593Smuzhiyun }
7204*4882a593Smuzhiyun #endif
7205*4882a593Smuzhiyun
7206*4882a593Smuzhiyun if (cp->magic)
7207*4882a593Smuzhiyun return NULL;
7208*4882a593Smuzhiyun
7209*4882a593Smuzhiyun cp->magic = 1;
7210*4882a593Smuzhiyun
7211*4882a593Smuzhiyun /*
7212*4882a593Smuzhiyun ** Move to next available tag if tag used.
7213*4882a593Smuzhiyun */
7214*4882a593Smuzhiyun if (lp) {
7215*4882a593Smuzhiyun if (tag != NO_TAG) {
7216*4882a593Smuzhiyun ++lp->ia_tag;
7217*4882a593Smuzhiyun if (lp->ia_tag == MAX_TAGS)
7218*4882a593Smuzhiyun lp->ia_tag = 0;
7219*4882a593Smuzhiyun lp->tags_umap |= (((tagmap_t) 1) << tag);
7220*4882a593Smuzhiyun }
7221*4882a593Smuzhiyun }
7222*4882a593Smuzhiyun
7223*4882a593Smuzhiyun /*
7224*4882a593Smuzhiyun ** Remember all informations needed to free this CCB.
7225*4882a593Smuzhiyun */
7226*4882a593Smuzhiyun cp->tag = tag;
7227*4882a593Smuzhiyun cp->target = tn;
7228*4882a593Smuzhiyun cp->lun = ln;
7229*4882a593Smuzhiyun
7230*4882a593Smuzhiyun if (DEBUG_FLAGS & DEBUG_TAGS) {
7231*4882a593Smuzhiyun PRINT_ADDR(cmd, "ccb @%p using tag %d.\n", cp, tag);
7232*4882a593Smuzhiyun }
7233*4882a593Smuzhiyun
7234*4882a593Smuzhiyun return cp;
7235*4882a593Smuzhiyun }
7236*4882a593Smuzhiyun
7237*4882a593Smuzhiyun /*==========================================================
7238*4882a593Smuzhiyun **
7239*4882a593Smuzhiyun **
7240*4882a593Smuzhiyun ** Release one control block
7241*4882a593Smuzhiyun **
7242*4882a593Smuzhiyun **
7243*4882a593Smuzhiyun **==========================================================
7244*4882a593Smuzhiyun */
7245*4882a593Smuzhiyun
ncr_free_ccb(struct ncb * np,struct ccb * cp)7246*4882a593Smuzhiyun static void ncr_free_ccb (struct ncb *np, struct ccb *cp)
7247*4882a593Smuzhiyun {
7248*4882a593Smuzhiyun struct tcb *tp = &np->target[cp->target];
7249*4882a593Smuzhiyun struct lcb *lp = tp->lp[cp->lun];
7250*4882a593Smuzhiyun
7251*4882a593Smuzhiyun if (DEBUG_FLAGS & DEBUG_TAGS) {
7252*4882a593Smuzhiyun PRINT_ADDR(cp->cmd, "ccb @%p freeing tag %d.\n", cp, cp->tag);
7253*4882a593Smuzhiyun }
7254*4882a593Smuzhiyun
7255*4882a593Smuzhiyun /*
7256*4882a593Smuzhiyun ** If lun control block available,
7257*4882a593Smuzhiyun ** decrement active commands and increment credit,
7258*4882a593Smuzhiyun ** free the tag if any and remove the JUMP for reselect.
7259*4882a593Smuzhiyun */
7260*4882a593Smuzhiyun if (lp) {
7261*4882a593Smuzhiyun if (cp->tag != NO_TAG) {
7262*4882a593Smuzhiyun lp->cb_tags[lp->if_tag++] = cp->tag;
7263*4882a593Smuzhiyun if (lp->if_tag == MAX_TAGS)
7264*4882a593Smuzhiyun lp->if_tag = 0;
7265*4882a593Smuzhiyun lp->tags_umap &= ~(((tagmap_t) 1) << cp->tag);
7266*4882a593Smuzhiyun lp->tags_smap &= lp->tags_umap;
7267*4882a593Smuzhiyun lp->jump_ccb[cp->tag] =
7268*4882a593Smuzhiyun cpu_to_scr(NCB_SCRIPTH_PHYS(np, bad_i_t_l_q));
7269*4882a593Smuzhiyun } else {
7270*4882a593Smuzhiyun lp->jump_ccb[0] =
7271*4882a593Smuzhiyun cpu_to_scr(NCB_SCRIPTH_PHYS(np, bad_i_t_l));
7272*4882a593Smuzhiyun }
7273*4882a593Smuzhiyun }
7274*4882a593Smuzhiyun
7275*4882a593Smuzhiyun /*
7276*4882a593Smuzhiyun ** Make this CCB available.
7277*4882a593Smuzhiyun */
7278*4882a593Smuzhiyun
7279*4882a593Smuzhiyun if (lp) {
7280*4882a593Smuzhiyun if (cp != np->ccb)
7281*4882a593Smuzhiyun list_move(&cp->link_ccbq, &lp->free_ccbq);
7282*4882a593Smuzhiyun --lp->busyccbs;
7283*4882a593Smuzhiyun if (cp->queued) {
7284*4882a593Smuzhiyun --lp->queuedccbs;
7285*4882a593Smuzhiyun }
7286*4882a593Smuzhiyun }
7287*4882a593Smuzhiyun cp -> host_status = HS_IDLE;
7288*4882a593Smuzhiyun cp -> magic = 0;
7289*4882a593Smuzhiyun if (cp->queued) {
7290*4882a593Smuzhiyun --np->queuedccbs;
7291*4882a593Smuzhiyun cp->queued = 0;
7292*4882a593Smuzhiyun }
7293*4882a593Smuzhiyun
7294*4882a593Smuzhiyun #if 0
7295*4882a593Smuzhiyun if (cp == np->ccb)
7296*4882a593Smuzhiyun wakeup ((caddr_t) cp);
7297*4882a593Smuzhiyun #endif
7298*4882a593Smuzhiyun }
7299*4882a593Smuzhiyun
7300*4882a593Smuzhiyun
7301*4882a593Smuzhiyun #define ncr_reg_bus_addr(r) (np->paddr + offsetof (struct ncr_reg, r))
7302*4882a593Smuzhiyun
7303*4882a593Smuzhiyun /*------------------------------------------------------------------------
7304*4882a593Smuzhiyun ** Initialize the fixed part of a CCB structure.
7305*4882a593Smuzhiyun **------------------------------------------------------------------------
7306*4882a593Smuzhiyun **------------------------------------------------------------------------
7307*4882a593Smuzhiyun */
ncr_init_ccb(struct ncb * np,struct ccb * cp)7308*4882a593Smuzhiyun static void ncr_init_ccb(struct ncb *np, struct ccb *cp)
7309*4882a593Smuzhiyun {
7310*4882a593Smuzhiyun ncrcmd copy_4 = np->features & FE_PFEN ? SCR_COPY(4) : SCR_COPY_F(4);
7311*4882a593Smuzhiyun
7312*4882a593Smuzhiyun /*
7313*4882a593Smuzhiyun ** Remember virtual and bus address of this ccb.
7314*4882a593Smuzhiyun */
7315*4882a593Smuzhiyun cp->p_ccb = vtobus(cp);
7316*4882a593Smuzhiyun cp->phys.header.cp = cp;
7317*4882a593Smuzhiyun
7318*4882a593Smuzhiyun /*
7319*4882a593Smuzhiyun ** This allows list_del to work for the default ccb.
7320*4882a593Smuzhiyun */
7321*4882a593Smuzhiyun INIT_LIST_HEAD(&cp->link_ccbq);
7322*4882a593Smuzhiyun
7323*4882a593Smuzhiyun /*
7324*4882a593Smuzhiyun ** Initialyze the start and restart launch script.
7325*4882a593Smuzhiyun **
7326*4882a593Smuzhiyun ** COPY(4) @(...p_phys), @(dsa)
7327*4882a593Smuzhiyun ** JUMP @(sched_point)
7328*4882a593Smuzhiyun */
7329*4882a593Smuzhiyun cp->start.setup_dsa[0] = cpu_to_scr(copy_4);
7330*4882a593Smuzhiyun cp->start.setup_dsa[1] = cpu_to_scr(CCB_PHYS(cp, start.p_phys));
7331*4882a593Smuzhiyun cp->start.setup_dsa[2] = cpu_to_scr(ncr_reg_bus_addr(nc_dsa));
7332*4882a593Smuzhiyun cp->start.schedule.l_cmd = cpu_to_scr(SCR_JUMP);
7333*4882a593Smuzhiyun cp->start.p_phys = cpu_to_scr(CCB_PHYS(cp, phys));
7334*4882a593Smuzhiyun
7335*4882a593Smuzhiyun memcpy(&cp->restart, &cp->start, sizeof(cp->restart));
7336*4882a593Smuzhiyun
7337*4882a593Smuzhiyun cp->start.schedule.l_paddr = cpu_to_scr(NCB_SCRIPT_PHYS (np, idle));
7338*4882a593Smuzhiyun cp->restart.schedule.l_paddr = cpu_to_scr(NCB_SCRIPTH_PHYS (np, abort));
7339*4882a593Smuzhiyun }
7340*4882a593Smuzhiyun
7341*4882a593Smuzhiyun
7342*4882a593Smuzhiyun /*------------------------------------------------------------------------
7343*4882a593Smuzhiyun ** Allocate a CCB and initialize its fixed part.
7344*4882a593Smuzhiyun **------------------------------------------------------------------------
7345*4882a593Smuzhiyun **------------------------------------------------------------------------
7346*4882a593Smuzhiyun */
ncr_alloc_ccb(struct ncb * np,u_char tn,u_char ln)7347*4882a593Smuzhiyun static void ncr_alloc_ccb(struct ncb *np, u_char tn, u_char ln)
7348*4882a593Smuzhiyun {
7349*4882a593Smuzhiyun struct tcb *tp = &np->target[tn];
7350*4882a593Smuzhiyun struct lcb *lp = tp->lp[ln];
7351*4882a593Smuzhiyun struct ccb *cp = NULL;
7352*4882a593Smuzhiyun
7353*4882a593Smuzhiyun /*
7354*4882a593Smuzhiyun ** Allocate memory for this CCB.
7355*4882a593Smuzhiyun */
7356*4882a593Smuzhiyun cp = m_calloc_dma(sizeof(struct ccb), "CCB");
7357*4882a593Smuzhiyun if (!cp)
7358*4882a593Smuzhiyun return;
7359*4882a593Smuzhiyun
7360*4882a593Smuzhiyun /*
7361*4882a593Smuzhiyun ** Count it and initialyze it.
7362*4882a593Smuzhiyun */
7363*4882a593Smuzhiyun lp->actccbs++;
7364*4882a593Smuzhiyun np->actccbs++;
7365*4882a593Smuzhiyun memset(cp, 0, sizeof (*cp));
7366*4882a593Smuzhiyun ncr_init_ccb(np, cp);
7367*4882a593Smuzhiyun
7368*4882a593Smuzhiyun /*
7369*4882a593Smuzhiyun ** Chain into wakeup list and free ccb queue and take it
7370*4882a593Smuzhiyun ** into account for tagged commands.
7371*4882a593Smuzhiyun */
7372*4882a593Smuzhiyun cp->link_ccb = np->ccb->link_ccb;
7373*4882a593Smuzhiyun np->ccb->link_ccb = cp;
7374*4882a593Smuzhiyun
7375*4882a593Smuzhiyun list_add(&cp->link_ccbq, &lp->free_ccbq);
7376*4882a593Smuzhiyun }
7377*4882a593Smuzhiyun
7378*4882a593Smuzhiyun /*==========================================================
7379*4882a593Smuzhiyun **
7380*4882a593Smuzhiyun **
7381*4882a593Smuzhiyun ** Allocation of resources for Targets/Luns/Tags.
7382*4882a593Smuzhiyun **
7383*4882a593Smuzhiyun **
7384*4882a593Smuzhiyun **==========================================================
7385*4882a593Smuzhiyun */
7386*4882a593Smuzhiyun
7387*4882a593Smuzhiyun
7388*4882a593Smuzhiyun /*------------------------------------------------------------------------
7389*4882a593Smuzhiyun ** Target control block initialisation.
7390*4882a593Smuzhiyun **------------------------------------------------------------------------
7391*4882a593Smuzhiyun ** This data structure is fully initialized after a SCSI command
7392*4882a593Smuzhiyun ** has been successfully completed for this target.
7393*4882a593Smuzhiyun ** It contains a SCRIPT that is called on target reselection.
7394*4882a593Smuzhiyun **------------------------------------------------------------------------
7395*4882a593Smuzhiyun */
ncr_init_tcb(struct ncb * np,u_char tn)7396*4882a593Smuzhiyun static void ncr_init_tcb (struct ncb *np, u_char tn)
7397*4882a593Smuzhiyun {
7398*4882a593Smuzhiyun struct tcb *tp = &np->target[tn];
7399*4882a593Smuzhiyun ncrcmd copy_1 = np->features & FE_PFEN ? SCR_COPY(1) : SCR_COPY_F(1);
7400*4882a593Smuzhiyun int th = tn & 3;
7401*4882a593Smuzhiyun int i;
7402*4882a593Smuzhiyun
7403*4882a593Smuzhiyun /*
7404*4882a593Smuzhiyun ** Jump to next tcb if SFBR does not match this target.
7405*4882a593Smuzhiyun ** JUMP IF (SFBR != #target#), @(next tcb)
7406*4882a593Smuzhiyun */
7407*4882a593Smuzhiyun tp->jump_tcb.l_cmd =
7408*4882a593Smuzhiyun cpu_to_scr((SCR_JUMP ^ IFFALSE (DATA (0x80 + tn))));
7409*4882a593Smuzhiyun tp->jump_tcb.l_paddr = np->jump_tcb[th].l_paddr;
7410*4882a593Smuzhiyun
7411*4882a593Smuzhiyun /*
7412*4882a593Smuzhiyun ** Load the synchronous transfer register.
7413*4882a593Smuzhiyun ** COPY @(tp->sval), @(sxfer)
7414*4882a593Smuzhiyun */
7415*4882a593Smuzhiyun tp->getscr[0] = cpu_to_scr(copy_1);
7416*4882a593Smuzhiyun tp->getscr[1] = cpu_to_scr(vtobus (&tp->sval));
7417*4882a593Smuzhiyun #ifdef SCSI_NCR_BIG_ENDIAN
7418*4882a593Smuzhiyun tp->getscr[2] = cpu_to_scr(ncr_reg_bus_addr(nc_sxfer) ^ 3);
7419*4882a593Smuzhiyun #else
7420*4882a593Smuzhiyun tp->getscr[2] = cpu_to_scr(ncr_reg_bus_addr(nc_sxfer));
7421*4882a593Smuzhiyun #endif
7422*4882a593Smuzhiyun
7423*4882a593Smuzhiyun /*
7424*4882a593Smuzhiyun ** Load the timing register.
7425*4882a593Smuzhiyun ** COPY @(tp->wval), @(scntl3)
7426*4882a593Smuzhiyun */
7427*4882a593Smuzhiyun tp->getscr[3] = cpu_to_scr(copy_1);
7428*4882a593Smuzhiyun tp->getscr[4] = cpu_to_scr(vtobus (&tp->wval));
7429*4882a593Smuzhiyun #ifdef SCSI_NCR_BIG_ENDIAN
7430*4882a593Smuzhiyun tp->getscr[5] = cpu_to_scr(ncr_reg_bus_addr(nc_scntl3) ^ 3);
7431*4882a593Smuzhiyun #else
7432*4882a593Smuzhiyun tp->getscr[5] = cpu_to_scr(ncr_reg_bus_addr(nc_scntl3));
7433*4882a593Smuzhiyun #endif
7434*4882a593Smuzhiyun
7435*4882a593Smuzhiyun /*
7436*4882a593Smuzhiyun ** Get the IDENTIFY message and the lun.
7437*4882a593Smuzhiyun ** CALL @script(resel_lun)
7438*4882a593Smuzhiyun */
7439*4882a593Smuzhiyun tp->call_lun.l_cmd = cpu_to_scr(SCR_CALL);
7440*4882a593Smuzhiyun tp->call_lun.l_paddr = cpu_to_scr(NCB_SCRIPT_PHYS (np, resel_lun));
7441*4882a593Smuzhiyun
7442*4882a593Smuzhiyun /*
7443*4882a593Smuzhiyun ** Look for the lun control block of this nexus.
7444*4882a593Smuzhiyun ** For i = 0 to 3
7445*4882a593Smuzhiyun ** JUMP ^ IFTRUE (MASK (i, 3)), @(next_lcb)
7446*4882a593Smuzhiyun */
7447*4882a593Smuzhiyun for (i = 0 ; i < 4 ; i++) {
7448*4882a593Smuzhiyun tp->jump_lcb[i].l_cmd =
7449*4882a593Smuzhiyun cpu_to_scr((SCR_JUMP ^ IFTRUE (MASK (i, 3))));
7450*4882a593Smuzhiyun tp->jump_lcb[i].l_paddr =
7451*4882a593Smuzhiyun cpu_to_scr(NCB_SCRIPTH_PHYS (np, bad_identify));
7452*4882a593Smuzhiyun }
7453*4882a593Smuzhiyun
7454*4882a593Smuzhiyun /*
7455*4882a593Smuzhiyun ** Link this target control block to the JUMP chain.
7456*4882a593Smuzhiyun */
7457*4882a593Smuzhiyun np->jump_tcb[th].l_paddr = cpu_to_scr(vtobus (&tp->jump_tcb));
7458*4882a593Smuzhiyun
7459*4882a593Smuzhiyun /*
7460*4882a593Smuzhiyun ** These assert's should be moved at driver initialisations.
7461*4882a593Smuzhiyun */
7462*4882a593Smuzhiyun #ifdef SCSI_NCR_BIG_ENDIAN
7463*4882a593Smuzhiyun BUG_ON(((offsetof(struct ncr_reg, nc_sxfer) ^
7464*4882a593Smuzhiyun offsetof(struct tcb , sval )) &3) != 3);
7465*4882a593Smuzhiyun BUG_ON(((offsetof(struct ncr_reg, nc_scntl3) ^
7466*4882a593Smuzhiyun offsetof(struct tcb , wval )) &3) != 3);
7467*4882a593Smuzhiyun #else
7468*4882a593Smuzhiyun BUG_ON(((offsetof(struct ncr_reg, nc_sxfer) ^
7469*4882a593Smuzhiyun offsetof(struct tcb , sval )) &3) != 0);
7470*4882a593Smuzhiyun BUG_ON(((offsetof(struct ncr_reg, nc_scntl3) ^
7471*4882a593Smuzhiyun offsetof(struct tcb , wval )) &3) != 0);
7472*4882a593Smuzhiyun #endif
7473*4882a593Smuzhiyun }
7474*4882a593Smuzhiyun
7475*4882a593Smuzhiyun
7476*4882a593Smuzhiyun /*------------------------------------------------------------------------
7477*4882a593Smuzhiyun ** Lun control block allocation and initialization.
7478*4882a593Smuzhiyun **------------------------------------------------------------------------
7479*4882a593Smuzhiyun ** This data structure is allocated and initialized after a SCSI
7480*4882a593Smuzhiyun ** command has been successfully completed for this target/lun.
7481*4882a593Smuzhiyun **------------------------------------------------------------------------
7482*4882a593Smuzhiyun */
ncr_alloc_lcb(struct ncb * np,u_char tn,u_char ln)7483*4882a593Smuzhiyun static struct lcb *ncr_alloc_lcb (struct ncb *np, u_char tn, u_char ln)
7484*4882a593Smuzhiyun {
7485*4882a593Smuzhiyun struct tcb *tp = &np->target[tn];
7486*4882a593Smuzhiyun struct lcb *lp = tp->lp[ln];
7487*4882a593Smuzhiyun ncrcmd copy_4 = np->features & FE_PFEN ? SCR_COPY(4) : SCR_COPY_F(4);
7488*4882a593Smuzhiyun int lh = ln & 3;
7489*4882a593Smuzhiyun
7490*4882a593Smuzhiyun /*
7491*4882a593Smuzhiyun ** Already done, return.
7492*4882a593Smuzhiyun */
7493*4882a593Smuzhiyun if (lp)
7494*4882a593Smuzhiyun return lp;
7495*4882a593Smuzhiyun
7496*4882a593Smuzhiyun /*
7497*4882a593Smuzhiyun ** Allocate the lcb.
7498*4882a593Smuzhiyun */
7499*4882a593Smuzhiyun lp = m_calloc_dma(sizeof(struct lcb), "LCB");
7500*4882a593Smuzhiyun if (!lp)
7501*4882a593Smuzhiyun goto fail;
7502*4882a593Smuzhiyun memset(lp, 0, sizeof(*lp));
7503*4882a593Smuzhiyun tp->lp[ln] = lp;
7504*4882a593Smuzhiyun
7505*4882a593Smuzhiyun /*
7506*4882a593Smuzhiyun ** Initialize the target control block if not yet.
7507*4882a593Smuzhiyun */
7508*4882a593Smuzhiyun if (!tp->jump_tcb.l_cmd)
7509*4882a593Smuzhiyun ncr_init_tcb(np, tn);
7510*4882a593Smuzhiyun
7511*4882a593Smuzhiyun /*
7512*4882a593Smuzhiyun ** Initialize the CCB queue headers.
7513*4882a593Smuzhiyun */
7514*4882a593Smuzhiyun INIT_LIST_HEAD(&lp->free_ccbq);
7515*4882a593Smuzhiyun INIT_LIST_HEAD(&lp->busy_ccbq);
7516*4882a593Smuzhiyun INIT_LIST_HEAD(&lp->wait_ccbq);
7517*4882a593Smuzhiyun INIT_LIST_HEAD(&lp->skip_ccbq);
7518*4882a593Smuzhiyun
7519*4882a593Smuzhiyun /*
7520*4882a593Smuzhiyun ** Set max CCBs to 1 and use the default 1 entry
7521*4882a593Smuzhiyun ** jump table by default.
7522*4882a593Smuzhiyun */
7523*4882a593Smuzhiyun lp->maxnxs = 1;
7524*4882a593Smuzhiyun lp->jump_ccb = &lp->jump_ccb_0;
7525*4882a593Smuzhiyun lp->p_jump_ccb = cpu_to_scr(vtobus(lp->jump_ccb));
7526*4882a593Smuzhiyun
7527*4882a593Smuzhiyun /*
7528*4882a593Smuzhiyun ** Initilialyze the reselect script:
7529*4882a593Smuzhiyun **
7530*4882a593Smuzhiyun ** Jump to next lcb if SFBR does not match this lun.
7531*4882a593Smuzhiyun ** Load TEMP with the CCB direct jump table bus address.
7532*4882a593Smuzhiyun ** Get the SIMPLE TAG message and the tag.
7533*4882a593Smuzhiyun **
7534*4882a593Smuzhiyun ** JUMP IF (SFBR != #lun#), @(next lcb)
7535*4882a593Smuzhiyun ** COPY @(lp->p_jump_ccb), @(temp)
7536*4882a593Smuzhiyun ** JUMP @script(resel_notag)
7537*4882a593Smuzhiyun */
7538*4882a593Smuzhiyun lp->jump_lcb.l_cmd =
7539*4882a593Smuzhiyun cpu_to_scr((SCR_JUMP ^ IFFALSE (MASK (0x80+ln, 0xff))));
7540*4882a593Smuzhiyun lp->jump_lcb.l_paddr = tp->jump_lcb[lh].l_paddr;
7541*4882a593Smuzhiyun
7542*4882a593Smuzhiyun lp->load_jump_ccb[0] = cpu_to_scr(copy_4);
7543*4882a593Smuzhiyun lp->load_jump_ccb[1] = cpu_to_scr(vtobus (&lp->p_jump_ccb));
7544*4882a593Smuzhiyun lp->load_jump_ccb[2] = cpu_to_scr(ncr_reg_bus_addr(nc_temp));
7545*4882a593Smuzhiyun
7546*4882a593Smuzhiyun lp->jump_tag.l_cmd = cpu_to_scr(SCR_JUMP);
7547*4882a593Smuzhiyun lp->jump_tag.l_paddr = cpu_to_scr(NCB_SCRIPT_PHYS (np, resel_notag));
7548*4882a593Smuzhiyun
7549*4882a593Smuzhiyun /*
7550*4882a593Smuzhiyun ** Link this lun control block to the JUMP chain.
7551*4882a593Smuzhiyun */
7552*4882a593Smuzhiyun tp->jump_lcb[lh].l_paddr = cpu_to_scr(vtobus (&lp->jump_lcb));
7553*4882a593Smuzhiyun
7554*4882a593Smuzhiyun /*
7555*4882a593Smuzhiyun ** Initialize command queuing control.
7556*4882a593Smuzhiyun */
7557*4882a593Smuzhiyun lp->busyccbs = 1;
7558*4882a593Smuzhiyun lp->queuedccbs = 1;
7559*4882a593Smuzhiyun lp->queuedepth = 1;
7560*4882a593Smuzhiyun fail:
7561*4882a593Smuzhiyun return lp;
7562*4882a593Smuzhiyun }
7563*4882a593Smuzhiyun
7564*4882a593Smuzhiyun
7565*4882a593Smuzhiyun /*------------------------------------------------------------------------
7566*4882a593Smuzhiyun ** Lun control block setup on INQUIRY data received.
7567*4882a593Smuzhiyun **------------------------------------------------------------------------
7568*4882a593Smuzhiyun ** We only support WIDE, SYNC for targets and CMDQ for logical units.
7569*4882a593Smuzhiyun ** This setup is done on each INQUIRY since we are expecting user
7570*4882a593Smuzhiyun ** will play with CHANGE DEFINITION commands. :-)
7571*4882a593Smuzhiyun **------------------------------------------------------------------------
7572*4882a593Smuzhiyun */
ncr_setup_lcb(struct ncb * np,struct scsi_device * sdev)7573*4882a593Smuzhiyun static struct lcb *ncr_setup_lcb (struct ncb *np, struct scsi_device *sdev)
7574*4882a593Smuzhiyun {
7575*4882a593Smuzhiyun unsigned char tn = sdev->id, ln = sdev->lun;
7576*4882a593Smuzhiyun struct tcb *tp = &np->target[tn];
7577*4882a593Smuzhiyun struct lcb *lp = tp->lp[ln];
7578*4882a593Smuzhiyun
7579*4882a593Smuzhiyun /* If no lcb, try to allocate it. */
7580*4882a593Smuzhiyun if (!lp && !(lp = ncr_alloc_lcb(np, tn, ln)))
7581*4882a593Smuzhiyun goto fail;
7582*4882a593Smuzhiyun
7583*4882a593Smuzhiyun /*
7584*4882a593Smuzhiyun ** If unit supports tagged commands, allocate the
7585*4882a593Smuzhiyun ** CCB JUMP table if not yet.
7586*4882a593Smuzhiyun */
7587*4882a593Smuzhiyun if (sdev->tagged_supported && lp->jump_ccb == &lp->jump_ccb_0) {
7588*4882a593Smuzhiyun int i;
7589*4882a593Smuzhiyun lp->jump_ccb = m_calloc_dma(256, "JUMP_CCB");
7590*4882a593Smuzhiyun if (!lp->jump_ccb) {
7591*4882a593Smuzhiyun lp->jump_ccb = &lp->jump_ccb_0;
7592*4882a593Smuzhiyun goto fail;
7593*4882a593Smuzhiyun }
7594*4882a593Smuzhiyun lp->p_jump_ccb = cpu_to_scr(vtobus(lp->jump_ccb));
7595*4882a593Smuzhiyun for (i = 0 ; i < 64 ; i++)
7596*4882a593Smuzhiyun lp->jump_ccb[i] =
7597*4882a593Smuzhiyun cpu_to_scr(NCB_SCRIPTH_PHYS (np, bad_i_t_l_q));
7598*4882a593Smuzhiyun for (i = 0 ; i < MAX_TAGS ; i++)
7599*4882a593Smuzhiyun lp->cb_tags[i] = i;
7600*4882a593Smuzhiyun lp->maxnxs = MAX_TAGS;
7601*4882a593Smuzhiyun lp->tags_stime = jiffies + 3*HZ;
7602*4882a593Smuzhiyun ncr_setup_tags (np, sdev);
7603*4882a593Smuzhiyun }
7604*4882a593Smuzhiyun
7605*4882a593Smuzhiyun
7606*4882a593Smuzhiyun fail:
7607*4882a593Smuzhiyun return lp;
7608*4882a593Smuzhiyun }
7609*4882a593Smuzhiyun
7610*4882a593Smuzhiyun /*==========================================================
7611*4882a593Smuzhiyun **
7612*4882a593Smuzhiyun **
7613*4882a593Smuzhiyun ** Build Scatter Gather Block
7614*4882a593Smuzhiyun **
7615*4882a593Smuzhiyun **
7616*4882a593Smuzhiyun **==========================================================
7617*4882a593Smuzhiyun **
7618*4882a593Smuzhiyun ** The transfer area may be scattered among
7619*4882a593Smuzhiyun ** several non adjacent physical pages.
7620*4882a593Smuzhiyun **
7621*4882a593Smuzhiyun ** We may use MAX_SCATTER blocks.
7622*4882a593Smuzhiyun **
7623*4882a593Smuzhiyun **----------------------------------------------------------
7624*4882a593Smuzhiyun */
7625*4882a593Smuzhiyun
7626*4882a593Smuzhiyun /*
7627*4882a593Smuzhiyun ** We try to reduce the number of interrupts caused
7628*4882a593Smuzhiyun ** by unexpected phase changes due to disconnects.
7629*4882a593Smuzhiyun ** A typical harddisk may disconnect before ANY block.
7630*4882a593Smuzhiyun ** If we wanted to avoid unexpected phase changes at all
7631*4882a593Smuzhiyun ** we had to use a break point every 512 bytes.
7632*4882a593Smuzhiyun ** Of course the number of scatter/gather blocks is
7633*4882a593Smuzhiyun ** limited.
7634*4882a593Smuzhiyun ** Under Linux, the scatter/gatter blocks are provided by
7635*4882a593Smuzhiyun ** the generic driver. We just have to copy addresses and
7636*4882a593Smuzhiyun ** sizes to the data segment array.
7637*4882a593Smuzhiyun */
7638*4882a593Smuzhiyun
ncr_scatter(struct ncb * np,struct ccb * cp,struct scsi_cmnd * cmd)7639*4882a593Smuzhiyun static int ncr_scatter(struct ncb *np, struct ccb *cp, struct scsi_cmnd *cmd)
7640*4882a593Smuzhiyun {
7641*4882a593Smuzhiyun int segment = 0;
7642*4882a593Smuzhiyun int use_sg = scsi_sg_count(cmd);
7643*4882a593Smuzhiyun
7644*4882a593Smuzhiyun cp->data_len = 0;
7645*4882a593Smuzhiyun
7646*4882a593Smuzhiyun use_sg = map_scsi_sg_data(np, cmd);
7647*4882a593Smuzhiyun if (use_sg > 0) {
7648*4882a593Smuzhiyun struct scatterlist *sg;
7649*4882a593Smuzhiyun struct scr_tblmove *data;
7650*4882a593Smuzhiyun
7651*4882a593Smuzhiyun if (use_sg > MAX_SCATTER) {
7652*4882a593Smuzhiyun unmap_scsi_data(np, cmd);
7653*4882a593Smuzhiyun return -1;
7654*4882a593Smuzhiyun }
7655*4882a593Smuzhiyun
7656*4882a593Smuzhiyun data = &cp->phys.data[MAX_SCATTER - use_sg];
7657*4882a593Smuzhiyun
7658*4882a593Smuzhiyun scsi_for_each_sg(cmd, sg, use_sg, segment) {
7659*4882a593Smuzhiyun dma_addr_t baddr = sg_dma_address(sg);
7660*4882a593Smuzhiyun unsigned int len = sg_dma_len(sg);
7661*4882a593Smuzhiyun
7662*4882a593Smuzhiyun ncr_build_sge(np, &data[segment], baddr, len);
7663*4882a593Smuzhiyun cp->data_len += len;
7664*4882a593Smuzhiyun }
7665*4882a593Smuzhiyun } else
7666*4882a593Smuzhiyun segment = -2;
7667*4882a593Smuzhiyun
7668*4882a593Smuzhiyun return segment;
7669*4882a593Smuzhiyun }
7670*4882a593Smuzhiyun
7671*4882a593Smuzhiyun /*==========================================================
7672*4882a593Smuzhiyun **
7673*4882a593Smuzhiyun **
7674*4882a593Smuzhiyun ** Test the bus snoop logic :-(
7675*4882a593Smuzhiyun **
7676*4882a593Smuzhiyun ** Has to be called with interrupts disabled.
7677*4882a593Smuzhiyun **
7678*4882a593Smuzhiyun **
7679*4882a593Smuzhiyun **==========================================================
7680*4882a593Smuzhiyun */
7681*4882a593Smuzhiyun
ncr_regtest(struct ncb * np)7682*4882a593Smuzhiyun static int __init ncr_regtest (struct ncb* np)
7683*4882a593Smuzhiyun {
7684*4882a593Smuzhiyun register volatile u32 data;
7685*4882a593Smuzhiyun /*
7686*4882a593Smuzhiyun ** ncr registers may NOT be cached.
7687*4882a593Smuzhiyun ** write 0xffffffff to a read only register area,
7688*4882a593Smuzhiyun ** and try to read it back.
7689*4882a593Smuzhiyun */
7690*4882a593Smuzhiyun data = 0xffffffff;
7691*4882a593Smuzhiyun OUTL_OFF(offsetof(struct ncr_reg, nc_dstat), data);
7692*4882a593Smuzhiyun data = INL_OFF(offsetof(struct ncr_reg, nc_dstat));
7693*4882a593Smuzhiyun #if 1
7694*4882a593Smuzhiyun if (data == 0xffffffff) {
7695*4882a593Smuzhiyun #else
7696*4882a593Smuzhiyun if ((data & 0xe2f0fffd) != 0x02000080) {
7697*4882a593Smuzhiyun #endif
7698*4882a593Smuzhiyun printk ("CACHE TEST FAILED: reg dstat-sstat2 readback %x.\n",
7699*4882a593Smuzhiyun (unsigned) data);
7700*4882a593Smuzhiyun return (0x10);
7701*4882a593Smuzhiyun }
7702*4882a593Smuzhiyun return (0);
7703*4882a593Smuzhiyun }
7704*4882a593Smuzhiyun
7705*4882a593Smuzhiyun static int __init ncr_snooptest (struct ncb* np)
7706*4882a593Smuzhiyun {
7707*4882a593Smuzhiyun u32 ncr_rd, ncr_wr, ncr_bk, host_rd, host_wr, pc;
7708*4882a593Smuzhiyun int i, err=0;
7709*4882a593Smuzhiyun if (np->reg) {
7710*4882a593Smuzhiyun err |= ncr_regtest (np);
7711*4882a593Smuzhiyun if (err)
7712*4882a593Smuzhiyun return (err);
7713*4882a593Smuzhiyun }
7714*4882a593Smuzhiyun
7715*4882a593Smuzhiyun /* init */
7716*4882a593Smuzhiyun pc = NCB_SCRIPTH_PHYS (np, snooptest);
7717*4882a593Smuzhiyun host_wr = 1;
7718*4882a593Smuzhiyun ncr_wr = 2;
7719*4882a593Smuzhiyun /*
7720*4882a593Smuzhiyun ** Set memory and register.
7721*4882a593Smuzhiyun */
7722*4882a593Smuzhiyun np->ncr_cache = cpu_to_scr(host_wr);
7723*4882a593Smuzhiyun OUTL (nc_temp, ncr_wr);
7724*4882a593Smuzhiyun /*
7725*4882a593Smuzhiyun ** Start script (exchange values)
7726*4882a593Smuzhiyun */
7727*4882a593Smuzhiyun OUTL_DSP (pc);
7728*4882a593Smuzhiyun /*
7729*4882a593Smuzhiyun ** Wait 'til done (with timeout)
7730*4882a593Smuzhiyun */
7731*4882a593Smuzhiyun for (i=0; i<NCR_SNOOP_TIMEOUT; i++)
7732*4882a593Smuzhiyun if (INB(nc_istat) & (INTF|SIP|DIP))
7733*4882a593Smuzhiyun break;
7734*4882a593Smuzhiyun /*
7735*4882a593Smuzhiyun ** Save termination position.
7736*4882a593Smuzhiyun */
7737*4882a593Smuzhiyun pc = INL (nc_dsp);
7738*4882a593Smuzhiyun /*
7739*4882a593Smuzhiyun ** Read memory and register.
7740*4882a593Smuzhiyun */
7741*4882a593Smuzhiyun host_rd = scr_to_cpu(np->ncr_cache);
7742*4882a593Smuzhiyun ncr_rd = INL (nc_scratcha);
7743*4882a593Smuzhiyun ncr_bk = INL (nc_temp);
7744*4882a593Smuzhiyun /*
7745*4882a593Smuzhiyun ** Reset ncr chip
7746*4882a593Smuzhiyun */
7747*4882a593Smuzhiyun ncr_chip_reset(np, 100);
7748*4882a593Smuzhiyun /*
7749*4882a593Smuzhiyun ** check for timeout
7750*4882a593Smuzhiyun */
7751*4882a593Smuzhiyun if (i>=NCR_SNOOP_TIMEOUT) {
7752*4882a593Smuzhiyun printk ("CACHE TEST FAILED: timeout.\n");
7753*4882a593Smuzhiyun return (0x20);
7754*4882a593Smuzhiyun }
7755*4882a593Smuzhiyun /*
7756*4882a593Smuzhiyun ** Check termination position.
7757*4882a593Smuzhiyun */
7758*4882a593Smuzhiyun if (pc != NCB_SCRIPTH_PHYS (np, snoopend)+8) {
7759*4882a593Smuzhiyun printk ("CACHE TEST FAILED: script execution failed.\n");
7760*4882a593Smuzhiyun printk ("start=%08lx, pc=%08lx, end=%08lx\n",
7761*4882a593Smuzhiyun (u_long) NCB_SCRIPTH_PHYS (np, snooptest), (u_long) pc,
7762*4882a593Smuzhiyun (u_long) NCB_SCRIPTH_PHYS (np, snoopend) +8);
7763*4882a593Smuzhiyun return (0x40);
7764*4882a593Smuzhiyun }
7765*4882a593Smuzhiyun /*
7766*4882a593Smuzhiyun ** Show results.
7767*4882a593Smuzhiyun */
7768*4882a593Smuzhiyun if (host_wr != ncr_rd) {
7769*4882a593Smuzhiyun printk ("CACHE TEST FAILED: host wrote %d, ncr read %d.\n",
7770*4882a593Smuzhiyun (int) host_wr, (int) ncr_rd);
7771*4882a593Smuzhiyun err |= 1;
7772*4882a593Smuzhiyun }
7773*4882a593Smuzhiyun if (host_rd != ncr_wr) {
7774*4882a593Smuzhiyun printk ("CACHE TEST FAILED: ncr wrote %d, host read %d.\n",
7775*4882a593Smuzhiyun (int) ncr_wr, (int) host_rd);
7776*4882a593Smuzhiyun err |= 2;
7777*4882a593Smuzhiyun }
7778*4882a593Smuzhiyun if (ncr_bk != ncr_wr) {
7779*4882a593Smuzhiyun printk ("CACHE TEST FAILED: ncr wrote %d, read back %d.\n",
7780*4882a593Smuzhiyun (int) ncr_wr, (int) ncr_bk);
7781*4882a593Smuzhiyun err |= 4;
7782*4882a593Smuzhiyun }
7783*4882a593Smuzhiyun return (err);
7784*4882a593Smuzhiyun }
7785*4882a593Smuzhiyun
7786*4882a593Smuzhiyun /*==========================================================
7787*4882a593Smuzhiyun **
7788*4882a593Smuzhiyun ** Determine the ncr's clock frequency.
7789*4882a593Smuzhiyun ** This is essential for the negotiation
7790*4882a593Smuzhiyun ** of the synchronous transfer rate.
7791*4882a593Smuzhiyun **
7792*4882a593Smuzhiyun **==========================================================
7793*4882a593Smuzhiyun **
7794*4882a593Smuzhiyun ** Note: we have to return the correct value.
7795*4882a593Smuzhiyun ** THERE IS NO SAFE DEFAULT VALUE.
7796*4882a593Smuzhiyun **
7797*4882a593Smuzhiyun ** Most NCR/SYMBIOS boards are delivered with a 40 Mhz clock.
7798*4882a593Smuzhiyun ** 53C860 and 53C875 rev. 1 support fast20 transfers but
7799*4882a593Smuzhiyun ** do not have a clock doubler and so are provided with a
7800*4882a593Smuzhiyun ** 80 MHz clock. All other fast20 boards incorporate a doubler
7801*4882a593Smuzhiyun ** and so should be delivered with a 40 MHz clock.
7802*4882a593Smuzhiyun ** The future fast40 chips (895/895) use a 40 Mhz base clock
7803*4882a593Smuzhiyun ** and provide a clock quadrupler (160 Mhz). The code below
7804*4882a593Smuzhiyun ** tries to deal as cleverly as possible with all this stuff.
7805*4882a593Smuzhiyun **
7806*4882a593Smuzhiyun **----------------------------------------------------------
7807*4882a593Smuzhiyun */
7808*4882a593Smuzhiyun
7809*4882a593Smuzhiyun /*
7810*4882a593Smuzhiyun * Select NCR SCSI clock frequency
7811*4882a593Smuzhiyun */
7812*4882a593Smuzhiyun static void ncr_selectclock(struct ncb *np, u_char scntl3)
7813*4882a593Smuzhiyun {
7814*4882a593Smuzhiyun if (np->multiplier < 2) {
7815*4882a593Smuzhiyun OUTB(nc_scntl3, scntl3);
7816*4882a593Smuzhiyun return;
7817*4882a593Smuzhiyun }
7818*4882a593Smuzhiyun
7819*4882a593Smuzhiyun if (bootverbose >= 2)
7820*4882a593Smuzhiyun printk ("%s: enabling clock multiplier\n", ncr_name(np));
7821*4882a593Smuzhiyun
7822*4882a593Smuzhiyun OUTB(nc_stest1, DBLEN); /* Enable clock multiplier */
7823*4882a593Smuzhiyun if (np->multiplier > 2) { /* Poll bit 5 of stest4 for quadrupler */
7824*4882a593Smuzhiyun int i = 20;
7825*4882a593Smuzhiyun while (!(INB(nc_stest4) & LCKFRQ) && --i > 0)
7826*4882a593Smuzhiyun udelay(20);
7827*4882a593Smuzhiyun if (!i)
7828*4882a593Smuzhiyun printk("%s: the chip cannot lock the frequency\n", ncr_name(np));
7829*4882a593Smuzhiyun } else /* Wait 20 micro-seconds for doubler */
7830*4882a593Smuzhiyun udelay(20);
7831*4882a593Smuzhiyun OUTB(nc_stest3, HSC); /* Halt the scsi clock */
7832*4882a593Smuzhiyun OUTB(nc_scntl3, scntl3);
7833*4882a593Smuzhiyun OUTB(nc_stest1, (DBLEN|DBLSEL));/* Select clock multiplier */
7834*4882a593Smuzhiyun OUTB(nc_stest3, 0x00); /* Restart scsi clock */
7835*4882a593Smuzhiyun }
7836*4882a593Smuzhiyun
7837*4882a593Smuzhiyun
7838*4882a593Smuzhiyun /*
7839*4882a593Smuzhiyun * calculate NCR SCSI clock frequency (in KHz)
7840*4882a593Smuzhiyun */
7841*4882a593Smuzhiyun static unsigned __init ncrgetfreq (struct ncb *np, int gen)
7842*4882a593Smuzhiyun {
7843*4882a593Smuzhiyun unsigned ms = 0;
7844*4882a593Smuzhiyun char count = 0;
7845*4882a593Smuzhiyun
7846*4882a593Smuzhiyun /*
7847*4882a593Smuzhiyun * Measure GEN timer delay in order
7848*4882a593Smuzhiyun * to calculate SCSI clock frequency
7849*4882a593Smuzhiyun *
7850*4882a593Smuzhiyun * This code will never execute too
7851*4882a593Smuzhiyun * many loop iterations (if DELAY is
7852*4882a593Smuzhiyun * reasonably correct). It could get
7853*4882a593Smuzhiyun * too low a delay (too high a freq.)
7854*4882a593Smuzhiyun * if the CPU is slow executing the
7855*4882a593Smuzhiyun * loop for some reason (an NMI, for
7856*4882a593Smuzhiyun * example). For this reason we will
7857*4882a593Smuzhiyun * if multiple measurements are to be
7858*4882a593Smuzhiyun * performed trust the higher delay
7859*4882a593Smuzhiyun * (lower frequency returned).
7860*4882a593Smuzhiyun */
7861*4882a593Smuzhiyun OUTB (nc_stest1, 0); /* make sure clock doubler is OFF */
7862*4882a593Smuzhiyun OUTW (nc_sien , 0); /* mask all scsi interrupts */
7863*4882a593Smuzhiyun (void) INW (nc_sist); /* clear pending scsi interrupt */
7864*4882a593Smuzhiyun OUTB (nc_dien , 0); /* mask all dma interrupts */
7865*4882a593Smuzhiyun (void) INW (nc_sist); /* another one, just to be sure :) */
7866*4882a593Smuzhiyun OUTB (nc_scntl3, 4); /* set pre-scaler to divide by 3 */
7867*4882a593Smuzhiyun OUTB (nc_stime1, 0); /* disable general purpose timer */
7868*4882a593Smuzhiyun OUTB (nc_stime1, gen); /* set to nominal delay of 1<<gen * 125us */
7869*4882a593Smuzhiyun while (!(INW(nc_sist) & GEN) && ms++ < 100000) {
7870*4882a593Smuzhiyun for (count = 0; count < 10; count ++)
7871*4882a593Smuzhiyun udelay(100); /* count ms */
7872*4882a593Smuzhiyun }
7873*4882a593Smuzhiyun OUTB (nc_stime1, 0); /* disable general purpose timer */
7874*4882a593Smuzhiyun /*
7875*4882a593Smuzhiyun * set prescaler to divide by whatever 0 means
7876*4882a593Smuzhiyun * 0 ought to choose divide by 2, but appears
7877*4882a593Smuzhiyun * to set divide by 3.5 mode in my 53c810 ...
7878*4882a593Smuzhiyun */
7879*4882a593Smuzhiyun OUTB (nc_scntl3, 0);
7880*4882a593Smuzhiyun
7881*4882a593Smuzhiyun if (bootverbose >= 2)
7882*4882a593Smuzhiyun printk ("%s: Delay (GEN=%d): %u msec\n", ncr_name(np), gen, ms);
7883*4882a593Smuzhiyun /*
7884*4882a593Smuzhiyun * adjust for prescaler, and convert into KHz
7885*4882a593Smuzhiyun */
7886*4882a593Smuzhiyun return ms ? ((1 << gen) * 4340) / ms : 0;
7887*4882a593Smuzhiyun }
7888*4882a593Smuzhiyun
7889*4882a593Smuzhiyun /*
7890*4882a593Smuzhiyun * Get/probe NCR SCSI clock frequency
7891*4882a593Smuzhiyun */
7892*4882a593Smuzhiyun static void __init ncr_getclock (struct ncb *np, int mult)
7893*4882a593Smuzhiyun {
7894*4882a593Smuzhiyun unsigned char scntl3 = INB(nc_scntl3);
7895*4882a593Smuzhiyun unsigned char stest1 = INB(nc_stest1);
7896*4882a593Smuzhiyun unsigned f1;
7897*4882a593Smuzhiyun
7898*4882a593Smuzhiyun np->multiplier = 1;
7899*4882a593Smuzhiyun f1 = 40000;
7900*4882a593Smuzhiyun
7901*4882a593Smuzhiyun /*
7902*4882a593Smuzhiyun ** True with 875 or 895 with clock multiplier selected
7903*4882a593Smuzhiyun */
7904*4882a593Smuzhiyun if (mult > 1 && (stest1 & (DBLEN+DBLSEL)) == DBLEN+DBLSEL) {
7905*4882a593Smuzhiyun if (bootverbose >= 2)
7906*4882a593Smuzhiyun printk ("%s: clock multiplier found\n", ncr_name(np));
7907*4882a593Smuzhiyun np->multiplier = mult;
7908*4882a593Smuzhiyun }
7909*4882a593Smuzhiyun
7910*4882a593Smuzhiyun /*
7911*4882a593Smuzhiyun ** If multiplier not found or scntl3 not 7,5,3,
7912*4882a593Smuzhiyun ** reset chip and get frequency from general purpose timer.
7913*4882a593Smuzhiyun ** Otherwise trust scntl3 BIOS setting.
7914*4882a593Smuzhiyun */
7915*4882a593Smuzhiyun if (np->multiplier != mult || (scntl3 & 7) < 3 || !(scntl3 & 1)) {
7916*4882a593Smuzhiyun unsigned f2;
7917*4882a593Smuzhiyun
7918*4882a593Smuzhiyun ncr_chip_reset(np, 5);
7919*4882a593Smuzhiyun
7920*4882a593Smuzhiyun (void) ncrgetfreq (np, 11); /* throw away first result */
7921*4882a593Smuzhiyun f1 = ncrgetfreq (np, 11);
7922*4882a593Smuzhiyun f2 = ncrgetfreq (np, 11);
7923*4882a593Smuzhiyun
7924*4882a593Smuzhiyun if(bootverbose)
7925*4882a593Smuzhiyun printk ("%s: NCR clock is %uKHz, %uKHz\n", ncr_name(np), f1, f2);
7926*4882a593Smuzhiyun
7927*4882a593Smuzhiyun if (f1 > f2) f1 = f2; /* trust lower result */
7928*4882a593Smuzhiyun
7929*4882a593Smuzhiyun if (f1 < 45000) f1 = 40000;
7930*4882a593Smuzhiyun else if (f1 < 55000) f1 = 50000;
7931*4882a593Smuzhiyun else f1 = 80000;
7932*4882a593Smuzhiyun
7933*4882a593Smuzhiyun if (f1 < 80000 && mult > 1) {
7934*4882a593Smuzhiyun if (bootverbose >= 2)
7935*4882a593Smuzhiyun printk ("%s: clock multiplier assumed\n", ncr_name(np));
7936*4882a593Smuzhiyun np->multiplier = mult;
7937*4882a593Smuzhiyun }
7938*4882a593Smuzhiyun } else {
7939*4882a593Smuzhiyun if ((scntl3 & 7) == 3) f1 = 40000;
7940*4882a593Smuzhiyun else if ((scntl3 & 7) == 5) f1 = 80000;
7941*4882a593Smuzhiyun else f1 = 160000;
7942*4882a593Smuzhiyun
7943*4882a593Smuzhiyun f1 /= np->multiplier;
7944*4882a593Smuzhiyun }
7945*4882a593Smuzhiyun
7946*4882a593Smuzhiyun /*
7947*4882a593Smuzhiyun ** Compute controller synchronous parameters.
7948*4882a593Smuzhiyun */
7949*4882a593Smuzhiyun f1 *= np->multiplier;
7950*4882a593Smuzhiyun np->clock_khz = f1;
7951*4882a593Smuzhiyun }
7952*4882a593Smuzhiyun
7953*4882a593Smuzhiyun /*===================== LINUX ENTRY POINTS SECTION ==========================*/
7954*4882a593Smuzhiyun
7955*4882a593Smuzhiyun static int ncr53c8xx_slave_alloc(struct scsi_device *device)
7956*4882a593Smuzhiyun {
7957*4882a593Smuzhiyun struct Scsi_Host *host = device->host;
7958*4882a593Smuzhiyun struct ncb *np = ((struct host_data *) host->hostdata)->ncb;
7959*4882a593Smuzhiyun struct tcb *tp = &np->target[device->id];
7960*4882a593Smuzhiyun tp->starget = device->sdev_target;
7961*4882a593Smuzhiyun
7962*4882a593Smuzhiyun return 0;
7963*4882a593Smuzhiyun }
7964*4882a593Smuzhiyun
7965*4882a593Smuzhiyun static int ncr53c8xx_slave_configure(struct scsi_device *device)
7966*4882a593Smuzhiyun {
7967*4882a593Smuzhiyun struct Scsi_Host *host = device->host;
7968*4882a593Smuzhiyun struct ncb *np = ((struct host_data *) host->hostdata)->ncb;
7969*4882a593Smuzhiyun struct tcb *tp = &np->target[device->id];
7970*4882a593Smuzhiyun struct lcb *lp = tp->lp[device->lun];
7971*4882a593Smuzhiyun int numtags, depth_to_use;
7972*4882a593Smuzhiyun
7973*4882a593Smuzhiyun ncr_setup_lcb(np, device);
7974*4882a593Smuzhiyun
7975*4882a593Smuzhiyun /*
7976*4882a593Smuzhiyun ** Select queue depth from driver setup.
7977*4882a593Smuzhiyun ** Donnot use more than configured by user.
7978*4882a593Smuzhiyun ** Use at least 2.
7979*4882a593Smuzhiyun ** Donnot use more than our maximum.
7980*4882a593Smuzhiyun */
7981*4882a593Smuzhiyun numtags = device_queue_depth(np->unit, device->id, device->lun);
7982*4882a593Smuzhiyun if (numtags > tp->usrtags)
7983*4882a593Smuzhiyun numtags = tp->usrtags;
7984*4882a593Smuzhiyun if (!device->tagged_supported)
7985*4882a593Smuzhiyun numtags = 1;
7986*4882a593Smuzhiyun depth_to_use = numtags;
7987*4882a593Smuzhiyun if (depth_to_use < 2)
7988*4882a593Smuzhiyun depth_to_use = 2;
7989*4882a593Smuzhiyun if (depth_to_use > MAX_TAGS)
7990*4882a593Smuzhiyun depth_to_use = MAX_TAGS;
7991*4882a593Smuzhiyun
7992*4882a593Smuzhiyun scsi_change_queue_depth(device, depth_to_use);
7993*4882a593Smuzhiyun
7994*4882a593Smuzhiyun /*
7995*4882a593Smuzhiyun ** Since the queue depth is not tunable under Linux,
7996*4882a593Smuzhiyun ** we need to know this value in order not to
7997*4882a593Smuzhiyun ** announce stupid things to user.
7998*4882a593Smuzhiyun **
7999*4882a593Smuzhiyun ** XXX(hch): As of Linux 2.6 it certainly _is_ tunable..
8000*4882a593Smuzhiyun ** In fact we just tuned it, or did I miss
8001*4882a593Smuzhiyun ** something important? :)
8002*4882a593Smuzhiyun */
8003*4882a593Smuzhiyun if (lp) {
8004*4882a593Smuzhiyun lp->numtags = lp->maxtags = numtags;
8005*4882a593Smuzhiyun lp->scdev_depth = depth_to_use;
8006*4882a593Smuzhiyun }
8007*4882a593Smuzhiyun ncr_setup_tags (np, device);
8008*4882a593Smuzhiyun
8009*4882a593Smuzhiyun #ifdef DEBUG_NCR53C8XX
8010*4882a593Smuzhiyun printk("ncr53c8xx_select_queue_depth: host=%d, id=%d, lun=%d, depth=%d\n",
8011*4882a593Smuzhiyun np->unit, device->id, device->lun, depth_to_use);
8012*4882a593Smuzhiyun #endif
8013*4882a593Smuzhiyun
8014*4882a593Smuzhiyun if (spi_support_sync(device->sdev_target) &&
8015*4882a593Smuzhiyun !spi_initial_dv(device->sdev_target))
8016*4882a593Smuzhiyun spi_dv_device(device);
8017*4882a593Smuzhiyun return 0;
8018*4882a593Smuzhiyun }
8019*4882a593Smuzhiyun
8020*4882a593Smuzhiyun static int ncr53c8xx_queue_command_lck (struct scsi_cmnd *cmd, void (*done)(struct scsi_cmnd *))
8021*4882a593Smuzhiyun {
8022*4882a593Smuzhiyun struct ncb *np = ((struct host_data *) cmd->device->host->hostdata)->ncb;
8023*4882a593Smuzhiyun unsigned long flags;
8024*4882a593Smuzhiyun int sts;
8025*4882a593Smuzhiyun
8026*4882a593Smuzhiyun #ifdef DEBUG_NCR53C8XX
8027*4882a593Smuzhiyun printk("ncr53c8xx_queue_command\n");
8028*4882a593Smuzhiyun #endif
8029*4882a593Smuzhiyun
8030*4882a593Smuzhiyun cmd->scsi_done = done;
8031*4882a593Smuzhiyun cmd->host_scribble = NULL;
8032*4882a593Smuzhiyun cmd->__data_mapped = 0;
8033*4882a593Smuzhiyun cmd->__data_mapping = 0;
8034*4882a593Smuzhiyun
8035*4882a593Smuzhiyun spin_lock_irqsave(&np->smp_lock, flags);
8036*4882a593Smuzhiyun
8037*4882a593Smuzhiyun if ((sts = ncr_queue_command(np, cmd)) != DID_OK) {
8038*4882a593Smuzhiyun cmd->result = sts << 16;
8039*4882a593Smuzhiyun #ifdef DEBUG_NCR53C8XX
8040*4882a593Smuzhiyun printk("ncr53c8xx : command not queued - result=%d\n", sts);
8041*4882a593Smuzhiyun #endif
8042*4882a593Smuzhiyun }
8043*4882a593Smuzhiyun #ifdef DEBUG_NCR53C8XX
8044*4882a593Smuzhiyun else
8045*4882a593Smuzhiyun printk("ncr53c8xx : command successfully queued\n");
8046*4882a593Smuzhiyun #endif
8047*4882a593Smuzhiyun
8048*4882a593Smuzhiyun spin_unlock_irqrestore(&np->smp_lock, flags);
8049*4882a593Smuzhiyun
8050*4882a593Smuzhiyun if (sts != DID_OK) {
8051*4882a593Smuzhiyun unmap_scsi_data(np, cmd);
8052*4882a593Smuzhiyun done(cmd);
8053*4882a593Smuzhiyun sts = 0;
8054*4882a593Smuzhiyun }
8055*4882a593Smuzhiyun
8056*4882a593Smuzhiyun return sts;
8057*4882a593Smuzhiyun }
8058*4882a593Smuzhiyun
8059*4882a593Smuzhiyun static DEF_SCSI_QCMD(ncr53c8xx_queue_command)
8060*4882a593Smuzhiyun
8061*4882a593Smuzhiyun irqreturn_t ncr53c8xx_intr(int irq, void *dev_id)
8062*4882a593Smuzhiyun {
8063*4882a593Smuzhiyun unsigned long flags;
8064*4882a593Smuzhiyun struct Scsi_Host *shost = (struct Scsi_Host *)dev_id;
8065*4882a593Smuzhiyun struct host_data *host_data = (struct host_data *)shost->hostdata;
8066*4882a593Smuzhiyun struct ncb *np = host_data->ncb;
8067*4882a593Smuzhiyun struct scsi_cmnd *done_list;
8068*4882a593Smuzhiyun
8069*4882a593Smuzhiyun #ifdef DEBUG_NCR53C8XX
8070*4882a593Smuzhiyun printk("ncr53c8xx : interrupt received\n");
8071*4882a593Smuzhiyun #endif
8072*4882a593Smuzhiyun
8073*4882a593Smuzhiyun if (DEBUG_FLAGS & DEBUG_TINY) printk ("[");
8074*4882a593Smuzhiyun
8075*4882a593Smuzhiyun spin_lock_irqsave(&np->smp_lock, flags);
8076*4882a593Smuzhiyun ncr_exception(np);
8077*4882a593Smuzhiyun done_list = np->done_list;
8078*4882a593Smuzhiyun np->done_list = NULL;
8079*4882a593Smuzhiyun spin_unlock_irqrestore(&np->smp_lock, flags);
8080*4882a593Smuzhiyun
8081*4882a593Smuzhiyun if (DEBUG_FLAGS & DEBUG_TINY) printk ("]\n");
8082*4882a593Smuzhiyun
8083*4882a593Smuzhiyun if (done_list)
8084*4882a593Smuzhiyun ncr_flush_done_cmds(done_list);
8085*4882a593Smuzhiyun return IRQ_HANDLED;
8086*4882a593Smuzhiyun }
8087*4882a593Smuzhiyun
8088*4882a593Smuzhiyun static void ncr53c8xx_timeout(struct timer_list *t)
8089*4882a593Smuzhiyun {
8090*4882a593Smuzhiyun struct ncb *np = from_timer(np, t, timer);
8091*4882a593Smuzhiyun unsigned long flags;
8092*4882a593Smuzhiyun struct scsi_cmnd *done_list;
8093*4882a593Smuzhiyun
8094*4882a593Smuzhiyun spin_lock_irqsave(&np->smp_lock, flags);
8095*4882a593Smuzhiyun ncr_timeout(np);
8096*4882a593Smuzhiyun done_list = np->done_list;
8097*4882a593Smuzhiyun np->done_list = NULL;
8098*4882a593Smuzhiyun spin_unlock_irqrestore(&np->smp_lock, flags);
8099*4882a593Smuzhiyun
8100*4882a593Smuzhiyun if (done_list)
8101*4882a593Smuzhiyun ncr_flush_done_cmds(done_list);
8102*4882a593Smuzhiyun }
8103*4882a593Smuzhiyun
8104*4882a593Smuzhiyun static int ncr53c8xx_bus_reset(struct scsi_cmnd *cmd)
8105*4882a593Smuzhiyun {
8106*4882a593Smuzhiyun struct ncb *np = ((struct host_data *) cmd->device->host->hostdata)->ncb;
8107*4882a593Smuzhiyun int sts;
8108*4882a593Smuzhiyun unsigned long flags;
8109*4882a593Smuzhiyun struct scsi_cmnd *done_list;
8110*4882a593Smuzhiyun
8111*4882a593Smuzhiyun /*
8112*4882a593Smuzhiyun * If the mid-level driver told us reset is synchronous, it seems
8113*4882a593Smuzhiyun * that we must call the done() callback for the involved command,
8114*4882a593Smuzhiyun * even if this command was not queued to the low-level driver,
8115*4882a593Smuzhiyun * before returning SUCCESS.
8116*4882a593Smuzhiyun */
8117*4882a593Smuzhiyun
8118*4882a593Smuzhiyun spin_lock_irqsave(&np->smp_lock, flags);
8119*4882a593Smuzhiyun sts = ncr_reset_bus(np, cmd, 1);
8120*4882a593Smuzhiyun
8121*4882a593Smuzhiyun done_list = np->done_list;
8122*4882a593Smuzhiyun np->done_list = NULL;
8123*4882a593Smuzhiyun spin_unlock_irqrestore(&np->smp_lock, flags);
8124*4882a593Smuzhiyun
8125*4882a593Smuzhiyun ncr_flush_done_cmds(done_list);
8126*4882a593Smuzhiyun
8127*4882a593Smuzhiyun return sts;
8128*4882a593Smuzhiyun }
8129*4882a593Smuzhiyun
8130*4882a593Smuzhiyun #if 0 /* unused and broken */
8131*4882a593Smuzhiyun static int ncr53c8xx_abort(struct scsi_cmnd *cmd)
8132*4882a593Smuzhiyun {
8133*4882a593Smuzhiyun struct ncb *np = ((struct host_data *) cmd->device->host->hostdata)->ncb;
8134*4882a593Smuzhiyun int sts;
8135*4882a593Smuzhiyun unsigned long flags;
8136*4882a593Smuzhiyun struct scsi_cmnd *done_list;
8137*4882a593Smuzhiyun
8138*4882a593Smuzhiyun printk("ncr53c8xx_abort\n");
8139*4882a593Smuzhiyun
8140*4882a593Smuzhiyun NCR_LOCK_NCB(np, flags);
8141*4882a593Smuzhiyun
8142*4882a593Smuzhiyun sts = ncr_abort_command(np, cmd);
8143*4882a593Smuzhiyun out:
8144*4882a593Smuzhiyun done_list = np->done_list;
8145*4882a593Smuzhiyun np->done_list = NULL;
8146*4882a593Smuzhiyun NCR_UNLOCK_NCB(np, flags);
8147*4882a593Smuzhiyun
8148*4882a593Smuzhiyun ncr_flush_done_cmds(done_list);
8149*4882a593Smuzhiyun
8150*4882a593Smuzhiyun return sts;
8151*4882a593Smuzhiyun }
8152*4882a593Smuzhiyun #endif
8153*4882a593Smuzhiyun
8154*4882a593Smuzhiyun
8155*4882a593Smuzhiyun /*
8156*4882a593Smuzhiyun ** Scsi command waiting list management.
8157*4882a593Smuzhiyun **
8158*4882a593Smuzhiyun ** It may happen that we cannot insert a scsi command into the start queue,
8159*4882a593Smuzhiyun ** in the following circumstances.
8160*4882a593Smuzhiyun ** Too few preallocated ccb(s),
8161*4882a593Smuzhiyun ** maxtags < cmd_per_lun of the Linux host control block,
8162*4882a593Smuzhiyun ** etc...
8163*4882a593Smuzhiyun ** Such scsi commands are inserted into a waiting list.
8164*4882a593Smuzhiyun ** When a scsi command complete, we try to requeue the commands of the
8165*4882a593Smuzhiyun ** waiting list.
8166*4882a593Smuzhiyun */
8167*4882a593Smuzhiyun
8168*4882a593Smuzhiyun #define next_wcmd host_scribble
8169*4882a593Smuzhiyun
8170*4882a593Smuzhiyun static void insert_into_waiting_list(struct ncb *np, struct scsi_cmnd *cmd)
8171*4882a593Smuzhiyun {
8172*4882a593Smuzhiyun struct scsi_cmnd *wcmd;
8173*4882a593Smuzhiyun
8174*4882a593Smuzhiyun #ifdef DEBUG_WAITING_LIST
8175*4882a593Smuzhiyun printk("%s: cmd %lx inserted into waiting list\n", ncr_name(np), (u_long) cmd);
8176*4882a593Smuzhiyun #endif
8177*4882a593Smuzhiyun cmd->next_wcmd = NULL;
8178*4882a593Smuzhiyun if (!(wcmd = np->waiting_list)) np->waiting_list = cmd;
8179*4882a593Smuzhiyun else {
8180*4882a593Smuzhiyun while (wcmd->next_wcmd)
8181*4882a593Smuzhiyun wcmd = (struct scsi_cmnd *) wcmd->next_wcmd;
8182*4882a593Smuzhiyun wcmd->next_wcmd = (char *) cmd;
8183*4882a593Smuzhiyun }
8184*4882a593Smuzhiyun }
8185*4882a593Smuzhiyun
8186*4882a593Smuzhiyun static struct scsi_cmnd *retrieve_from_waiting_list(int to_remove, struct ncb *np, struct scsi_cmnd *cmd)
8187*4882a593Smuzhiyun {
8188*4882a593Smuzhiyun struct scsi_cmnd **pcmd = &np->waiting_list;
8189*4882a593Smuzhiyun
8190*4882a593Smuzhiyun while (*pcmd) {
8191*4882a593Smuzhiyun if (cmd == *pcmd) {
8192*4882a593Smuzhiyun if (to_remove) {
8193*4882a593Smuzhiyun *pcmd = (struct scsi_cmnd *) cmd->next_wcmd;
8194*4882a593Smuzhiyun cmd->next_wcmd = NULL;
8195*4882a593Smuzhiyun }
8196*4882a593Smuzhiyun #ifdef DEBUG_WAITING_LIST
8197*4882a593Smuzhiyun printk("%s: cmd %lx retrieved from waiting list\n", ncr_name(np), (u_long) cmd);
8198*4882a593Smuzhiyun #endif
8199*4882a593Smuzhiyun return cmd;
8200*4882a593Smuzhiyun }
8201*4882a593Smuzhiyun pcmd = (struct scsi_cmnd **) &(*pcmd)->next_wcmd;
8202*4882a593Smuzhiyun }
8203*4882a593Smuzhiyun return NULL;
8204*4882a593Smuzhiyun }
8205*4882a593Smuzhiyun
8206*4882a593Smuzhiyun static void process_waiting_list(struct ncb *np, int sts)
8207*4882a593Smuzhiyun {
8208*4882a593Smuzhiyun struct scsi_cmnd *waiting_list, *wcmd;
8209*4882a593Smuzhiyun
8210*4882a593Smuzhiyun waiting_list = np->waiting_list;
8211*4882a593Smuzhiyun np->waiting_list = NULL;
8212*4882a593Smuzhiyun
8213*4882a593Smuzhiyun #ifdef DEBUG_WAITING_LIST
8214*4882a593Smuzhiyun if (waiting_list) printk("%s: waiting_list=%lx processing sts=%d\n", ncr_name(np), (u_long) waiting_list, sts);
8215*4882a593Smuzhiyun #endif
8216*4882a593Smuzhiyun while ((wcmd = waiting_list) != NULL) {
8217*4882a593Smuzhiyun waiting_list = (struct scsi_cmnd *) wcmd->next_wcmd;
8218*4882a593Smuzhiyun wcmd->next_wcmd = NULL;
8219*4882a593Smuzhiyun if (sts == DID_OK) {
8220*4882a593Smuzhiyun #ifdef DEBUG_WAITING_LIST
8221*4882a593Smuzhiyun printk("%s: cmd %lx trying to requeue\n", ncr_name(np), (u_long) wcmd);
8222*4882a593Smuzhiyun #endif
8223*4882a593Smuzhiyun sts = ncr_queue_command(np, wcmd);
8224*4882a593Smuzhiyun }
8225*4882a593Smuzhiyun if (sts != DID_OK) {
8226*4882a593Smuzhiyun #ifdef DEBUG_WAITING_LIST
8227*4882a593Smuzhiyun printk("%s: cmd %lx done forced sts=%d\n", ncr_name(np), (u_long) wcmd, sts);
8228*4882a593Smuzhiyun #endif
8229*4882a593Smuzhiyun wcmd->result = sts << 16;
8230*4882a593Smuzhiyun ncr_queue_done_cmd(np, wcmd);
8231*4882a593Smuzhiyun }
8232*4882a593Smuzhiyun }
8233*4882a593Smuzhiyun }
8234*4882a593Smuzhiyun
8235*4882a593Smuzhiyun #undef next_wcmd
8236*4882a593Smuzhiyun
8237*4882a593Smuzhiyun static ssize_t show_ncr53c8xx_revision(struct device *dev,
8238*4882a593Smuzhiyun struct device_attribute *attr, char *buf)
8239*4882a593Smuzhiyun {
8240*4882a593Smuzhiyun struct Scsi_Host *host = class_to_shost(dev);
8241*4882a593Smuzhiyun struct host_data *host_data = (struct host_data *)host->hostdata;
8242*4882a593Smuzhiyun
8243*4882a593Smuzhiyun return snprintf(buf, 20, "0x%x\n", host_data->ncb->revision_id);
8244*4882a593Smuzhiyun }
8245*4882a593Smuzhiyun
8246*4882a593Smuzhiyun static struct device_attribute ncr53c8xx_revision_attr = {
8247*4882a593Smuzhiyun .attr = { .name = "revision", .mode = S_IRUGO, },
8248*4882a593Smuzhiyun .show = show_ncr53c8xx_revision,
8249*4882a593Smuzhiyun };
8250*4882a593Smuzhiyun
8251*4882a593Smuzhiyun static struct device_attribute *ncr53c8xx_host_attrs[] = {
8252*4882a593Smuzhiyun &ncr53c8xx_revision_attr,
8253*4882a593Smuzhiyun NULL
8254*4882a593Smuzhiyun };
8255*4882a593Smuzhiyun
8256*4882a593Smuzhiyun /*==========================================================
8257*4882a593Smuzhiyun **
8258*4882a593Smuzhiyun ** Boot command line.
8259*4882a593Smuzhiyun **
8260*4882a593Smuzhiyun **==========================================================
8261*4882a593Smuzhiyun */
8262*4882a593Smuzhiyun #ifdef MODULE
8263*4882a593Smuzhiyun char *ncr53c8xx; /* command line passed by insmod */
8264*4882a593Smuzhiyun module_param(ncr53c8xx, charp, 0);
8265*4882a593Smuzhiyun #endif
8266*4882a593Smuzhiyun
8267*4882a593Smuzhiyun #ifndef MODULE
8268*4882a593Smuzhiyun static int __init ncr53c8xx_setup(char *str)
8269*4882a593Smuzhiyun {
8270*4882a593Smuzhiyun return sym53c8xx__setup(str);
8271*4882a593Smuzhiyun }
8272*4882a593Smuzhiyun
8273*4882a593Smuzhiyun __setup("ncr53c8xx=", ncr53c8xx_setup);
8274*4882a593Smuzhiyun #endif
8275*4882a593Smuzhiyun
8276*4882a593Smuzhiyun
8277*4882a593Smuzhiyun /*
8278*4882a593Smuzhiyun * Host attach and initialisations.
8279*4882a593Smuzhiyun *
8280*4882a593Smuzhiyun * Allocate host data and ncb structure.
8281*4882a593Smuzhiyun * Request IO region and remap MMIO region.
8282*4882a593Smuzhiyun * Do chip initialization.
8283*4882a593Smuzhiyun * If all is OK, install interrupt handling and
8284*4882a593Smuzhiyun * start the timer daemon.
8285*4882a593Smuzhiyun */
8286*4882a593Smuzhiyun struct Scsi_Host * __init ncr_attach(struct scsi_host_template *tpnt,
8287*4882a593Smuzhiyun int unit, struct ncr_device *device)
8288*4882a593Smuzhiyun {
8289*4882a593Smuzhiyun struct host_data *host_data;
8290*4882a593Smuzhiyun struct ncb *np = NULL;
8291*4882a593Smuzhiyun struct Scsi_Host *instance = NULL;
8292*4882a593Smuzhiyun u_long flags = 0;
8293*4882a593Smuzhiyun int i;
8294*4882a593Smuzhiyun
8295*4882a593Smuzhiyun if (!tpnt->name)
8296*4882a593Smuzhiyun tpnt->name = SCSI_NCR_DRIVER_NAME;
8297*4882a593Smuzhiyun if (!tpnt->shost_attrs)
8298*4882a593Smuzhiyun tpnt->shost_attrs = ncr53c8xx_host_attrs;
8299*4882a593Smuzhiyun
8300*4882a593Smuzhiyun tpnt->queuecommand = ncr53c8xx_queue_command;
8301*4882a593Smuzhiyun tpnt->slave_configure = ncr53c8xx_slave_configure;
8302*4882a593Smuzhiyun tpnt->slave_alloc = ncr53c8xx_slave_alloc;
8303*4882a593Smuzhiyun tpnt->eh_bus_reset_handler = ncr53c8xx_bus_reset;
8304*4882a593Smuzhiyun tpnt->can_queue = SCSI_NCR_CAN_QUEUE;
8305*4882a593Smuzhiyun tpnt->this_id = 7;
8306*4882a593Smuzhiyun tpnt->sg_tablesize = SCSI_NCR_SG_TABLESIZE;
8307*4882a593Smuzhiyun tpnt->cmd_per_lun = SCSI_NCR_CMD_PER_LUN;
8308*4882a593Smuzhiyun
8309*4882a593Smuzhiyun if (device->differential)
8310*4882a593Smuzhiyun driver_setup.diff_support = device->differential;
8311*4882a593Smuzhiyun
8312*4882a593Smuzhiyun printk(KERN_INFO "ncr53c720-%d: rev 0x%x irq %d\n",
8313*4882a593Smuzhiyun unit, device->chip.revision_id, device->slot.irq);
8314*4882a593Smuzhiyun
8315*4882a593Smuzhiyun instance = scsi_host_alloc(tpnt, sizeof(*host_data));
8316*4882a593Smuzhiyun if (!instance)
8317*4882a593Smuzhiyun goto attach_error;
8318*4882a593Smuzhiyun host_data = (struct host_data *) instance->hostdata;
8319*4882a593Smuzhiyun
8320*4882a593Smuzhiyun np = __m_calloc_dma(device->dev, sizeof(struct ncb), "NCB");
8321*4882a593Smuzhiyun if (!np)
8322*4882a593Smuzhiyun goto attach_error;
8323*4882a593Smuzhiyun spin_lock_init(&np->smp_lock);
8324*4882a593Smuzhiyun np->dev = device->dev;
8325*4882a593Smuzhiyun np->p_ncb = vtobus(np);
8326*4882a593Smuzhiyun host_data->ncb = np;
8327*4882a593Smuzhiyun
8328*4882a593Smuzhiyun np->ccb = m_calloc_dma(sizeof(struct ccb), "CCB");
8329*4882a593Smuzhiyun if (!np->ccb)
8330*4882a593Smuzhiyun goto attach_error;
8331*4882a593Smuzhiyun
8332*4882a593Smuzhiyun /* Store input information in the host data structure. */
8333*4882a593Smuzhiyun np->unit = unit;
8334*4882a593Smuzhiyun np->verbose = driver_setup.verbose;
8335*4882a593Smuzhiyun sprintf(np->inst_name, "ncr53c720-%d", np->unit);
8336*4882a593Smuzhiyun np->revision_id = device->chip.revision_id;
8337*4882a593Smuzhiyun np->features = device->chip.features;
8338*4882a593Smuzhiyun np->clock_divn = device->chip.nr_divisor;
8339*4882a593Smuzhiyun np->maxoffs = device->chip.offset_max;
8340*4882a593Smuzhiyun np->maxburst = device->chip.burst_max;
8341*4882a593Smuzhiyun np->myaddr = device->host_id;
8342*4882a593Smuzhiyun
8343*4882a593Smuzhiyun /* Allocate SCRIPTS areas. */
8344*4882a593Smuzhiyun np->script0 = m_calloc_dma(sizeof(struct script), "SCRIPT");
8345*4882a593Smuzhiyun if (!np->script0)
8346*4882a593Smuzhiyun goto attach_error;
8347*4882a593Smuzhiyun np->scripth0 = m_calloc_dma(sizeof(struct scripth), "SCRIPTH");
8348*4882a593Smuzhiyun if (!np->scripth0)
8349*4882a593Smuzhiyun goto attach_error;
8350*4882a593Smuzhiyun
8351*4882a593Smuzhiyun timer_setup(&np->timer, ncr53c8xx_timeout, 0);
8352*4882a593Smuzhiyun
8353*4882a593Smuzhiyun /* Try to map the controller chip to virtual and physical memory. */
8354*4882a593Smuzhiyun
8355*4882a593Smuzhiyun np->paddr = device->slot.base;
8356*4882a593Smuzhiyun np->paddr2 = (np->features & FE_RAM) ? device->slot.base_2 : 0;
8357*4882a593Smuzhiyun
8358*4882a593Smuzhiyun if (device->slot.base_v)
8359*4882a593Smuzhiyun np->vaddr = device->slot.base_v;
8360*4882a593Smuzhiyun else
8361*4882a593Smuzhiyun np->vaddr = ioremap(device->slot.base_c, 128);
8362*4882a593Smuzhiyun
8363*4882a593Smuzhiyun if (!np->vaddr) {
8364*4882a593Smuzhiyun printk(KERN_ERR
8365*4882a593Smuzhiyun "%s: can't map memory mapped IO region\n",ncr_name(np));
8366*4882a593Smuzhiyun goto attach_error;
8367*4882a593Smuzhiyun } else {
8368*4882a593Smuzhiyun if (bootverbose > 1)
8369*4882a593Smuzhiyun printk(KERN_INFO
8370*4882a593Smuzhiyun "%s: using memory mapped IO at virtual address 0x%lx\n", ncr_name(np), (u_long) np->vaddr);
8371*4882a593Smuzhiyun }
8372*4882a593Smuzhiyun
8373*4882a593Smuzhiyun /* Make the controller's registers available. Now the INB INW INL
8374*4882a593Smuzhiyun * OUTB OUTW OUTL macros can be used safely.
8375*4882a593Smuzhiyun */
8376*4882a593Smuzhiyun
8377*4882a593Smuzhiyun np->reg = (struct ncr_reg __iomem *)np->vaddr;
8378*4882a593Smuzhiyun
8379*4882a593Smuzhiyun /* Do chip dependent initialization. */
8380*4882a593Smuzhiyun ncr_prepare_setting(np);
8381*4882a593Smuzhiyun
8382*4882a593Smuzhiyun if (np->paddr2 && sizeof(struct script) > 4096) {
8383*4882a593Smuzhiyun np->paddr2 = 0;
8384*4882a593Smuzhiyun printk(KERN_WARNING "%s: script too large, NOT using on chip RAM.\n",
8385*4882a593Smuzhiyun ncr_name(np));
8386*4882a593Smuzhiyun }
8387*4882a593Smuzhiyun
8388*4882a593Smuzhiyun instance->max_channel = 0;
8389*4882a593Smuzhiyun instance->this_id = np->myaddr;
8390*4882a593Smuzhiyun instance->max_id = np->maxwide ? 16 : 8;
8391*4882a593Smuzhiyun instance->max_lun = SCSI_NCR_MAX_LUN;
8392*4882a593Smuzhiyun instance->base = (unsigned long) np->reg;
8393*4882a593Smuzhiyun instance->irq = device->slot.irq;
8394*4882a593Smuzhiyun instance->unique_id = device->slot.base;
8395*4882a593Smuzhiyun instance->dma_channel = 0;
8396*4882a593Smuzhiyun instance->cmd_per_lun = MAX_TAGS;
8397*4882a593Smuzhiyun instance->can_queue = (MAX_START-4);
8398*4882a593Smuzhiyun /* This can happen if you forget to call ncr53c8xx_init from
8399*4882a593Smuzhiyun * your module_init */
8400*4882a593Smuzhiyun BUG_ON(!ncr53c8xx_transport_template);
8401*4882a593Smuzhiyun instance->transportt = ncr53c8xx_transport_template;
8402*4882a593Smuzhiyun
8403*4882a593Smuzhiyun /* Patch script to physical addresses */
8404*4882a593Smuzhiyun ncr_script_fill(&script0, &scripth0);
8405*4882a593Smuzhiyun
8406*4882a593Smuzhiyun np->scripth = np->scripth0;
8407*4882a593Smuzhiyun np->p_scripth = vtobus(np->scripth);
8408*4882a593Smuzhiyun np->p_script = (np->paddr2) ? np->paddr2 : vtobus(np->script0);
8409*4882a593Smuzhiyun
8410*4882a593Smuzhiyun ncr_script_copy_and_bind(np, (ncrcmd *) &script0,
8411*4882a593Smuzhiyun (ncrcmd *) np->script0, sizeof(struct script));
8412*4882a593Smuzhiyun ncr_script_copy_and_bind(np, (ncrcmd *) &scripth0,
8413*4882a593Smuzhiyun (ncrcmd *) np->scripth0, sizeof(struct scripth));
8414*4882a593Smuzhiyun np->ccb->p_ccb = vtobus (np->ccb);
8415*4882a593Smuzhiyun
8416*4882a593Smuzhiyun /* Patch the script for LED support. */
8417*4882a593Smuzhiyun
8418*4882a593Smuzhiyun if (np->features & FE_LED0) {
8419*4882a593Smuzhiyun np->script0->idle[0] =
8420*4882a593Smuzhiyun cpu_to_scr(SCR_REG_REG(gpreg, SCR_OR, 0x01));
8421*4882a593Smuzhiyun np->script0->reselected[0] =
8422*4882a593Smuzhiyun cpu_to_scr(SCR_REG_REG(gpreg, SCR_AND, 0xfe));
8423*4882a593Smuzhiyun np->script0->start[0] =
8424*4882a593Smuzhiyun cpu_to_scr(SCR_REG_REG(gpreg, SCR_AND, 0xfe));
8425*4882a593Smuzhiyun }
8426*4882a593Smuzhiyun
8427*4882a593Smuzhiyun /*
8428*4882a593Smuzhiyun * Look for the target control block of this nexus.
8429*4882a593Smuzhiyun * For i = 0 to 3
8430*4882a593Smuzhiyun * JUMP ^ IFTRUE (MASK (i, 3)), @(next_lcb)
8431*4882a593Smuzhiyun */
8432*4882a593Smuzhiyun for (i = 0 ; i < 4 ; i++) {
8433*4882a593Smuzhiyun np->jump_tcb[i].l_cmd =
8434*4882a593Smuzhiyun cpu_to_scr((SCR_JUMP ^ IFTRUE (MASK (i, 3))));
8435*4882a593Smuzhiyun np->jump_tcb[i].l_paddr =
8436*4882a593Smuzhiyun cpu_to_scr(NCB_SCRIPTH_PHYS (np, bad_target));
8437*4882a593Smuzhiyun }
8438*4882a593Smuzhiyun
8439*4882a593Smuzhiyun ncr_chip_reset(np, 100);
8440*4882a593Smuzhiyun
8441*4882a593Smuzhiyun /* Now check the cache handling of the chipset. */
8442*4882a593Smuzhiyun
8443*4882a593Smuzhiyun if (ncr_snooptest(np)) {
8444*4882a593Smuzhiyun printk(KERN_ERR "CACHE INCORRECTLY CONFIGURED.\n");
8445*4882a593Smuzhiyun goto attach_error;
8446*4882a593Smuzhiyun }
8447*4882a593Smuzhiyun
8448*4882a593Smuzhiyun /* Install the interrupt handler. */
8449*4882a593Smuzhiyun np->irq = device->slot.irq;
8450*4882a593Smuzhiyun
8451*4882a593Smuzhiyun /* Initialize the fixed part of the default ccb. */
8452*4882a593Smuzhiyun ncr_init_ccb(np, np->ccb);
8453*4882a593Smuzhiyun
8454*4882a593Smuzhiyun /*
8455*4882a593Smuzhiyun * After SCSI devices have been opened, we cannot reset the bus
8456*4882a593Smuzhiyun * safely, so we do it here. Interrupt handler does the real work.
8457*4882a593Smuzhiyun * Process the reset exception if interrupts are not enabled yet.
8458*4882a593Smuzhiyun * Then enable disconnects.
8459*4882a593Smuzhiyun */
8460*4882a593Smuzhiyun spin_lock_irqsave(&np->smp_lock, flags);
8461*4882a593Smuzhiyun if (ncr_reset_scsi_bus(np, 0, driver_setup.settle_delay) != 0) {
8462*4882a593Smuzhiyun printk(KERN_ERR "%s: FATAL ERROR: CHECK SCSI BUS - CABLES, TERMINATION, DEVICE POWER etc.!\n", ncr_name(np));
8463*4882a593Smuzhiyun
8464*4882a593Smuzhiyun spin_unlock_irqrestore(&np->smp_lock, flags);
8465*4882a593Smuzhiyun goto attach_error;
8466*4882a593Smuzhiyun }
8467*4882a593Smuzhiyun ncr_exception(np);
8468*4882a593Smuzhiyun
8469*4882a593Smuzhiyun np->disc = 1;
8470*4882a593Smuzhiyun
8471*4882a593Smuzhiyun /*
8472*4882a593Smuzhiyun * The middle-level SCSI driver does not wait for devices to settle.
8473*4882a593Smuzhiyun * Wait synchronously if more than 2 seconds.
8474*4882a593Smuzhiyun */
8475*4882a593Smuzhiyun if (driver_setup.settle_delay > 2) {
8476*4882a593Smuzhiyun printk(KERN_INFO "%s: waiting %d seconds for scsi devices to settle...\n",
8477*4882a593Smuzhiyun ncr_name(np), driver_setup.settle_delay);
8478*4882a593Smuzhiyun mdelay(1000 * driver_setup.settle_delay);
8479*4882a593Smuzhiyun }
8480*4882a593Smuzhiyun
8481*4882a593Smuzhiyun /* start the timeout daemon */
8482*4882a593Smuzhiyun np->lasttime=0;
8483*4882a593Smuzhiyun ncr_timeout (np);
8484*4882a593Smuzhiyun
8485*4882a593Smuzhiyun /* use SIMPLE TAG messages by default */
8486*4882a593Smuzhiyun #ifdef SCSI_NCR_ALWAYS_SIMPLE_TAG
8487*4882a593Smuzhiyun np->order = SIMPLE_QUEUE_TAG;
8488*4882a593Smuzhiyun #endif
8489*4882a593Smuzhiyun
8490*4882a593Smuzhiyun spin_unlock_irqrestore(&np->smp_lock, flags);
8491*4882a593Smuzhiyun
8492*4882a593Smuzhiyun return instance;
8493*4882a593Smuzhiyun
8494*4882a593Smuzhiyun attach_error:
8495*4882a593Smuzhiyun if (!instance)
8496*4882a593Smuzhiyun return NULL;
8497*4882a593Smuzhiyun printk(KERN_INFO "%s: detaching...\n", ncr_name(np));
8498*4882a593Smuzhiyun if (!np)
8499*4882a593Smuzhiyun goto unregister;
8500*4882a593Smuzhiyun if (np->scripth0)
8501*4882a593Smuzhiyun m_free_dma(np->scripth0, sizeof(struct scripth), "SCRIPTH");
8502*4882a593Smuzhiyun if (np->script0)
8503*4882a593Smuzhiyun m_free_dma(np->script0, sizeof(struct script), "SCRIPT");
8504*4882a593Smuzhiyun if (np->ccb)
8505*4882a593Smuzhiyun m_free_dma(np->ccb, sizeof(struct ccb), "CCB");
8506*4882a593Smuzhiyun m_free_dma(np, sizeof(struct ncb), "NCB");
8507*4882a593Smuzhiyun host_data->ncb = NULL;
8508*4882a593Smuzhiyun
8509*4882a593Smuzhiyun unregister:
8510*4882a593Smuzhiyun scsi_host_put(instance);
8511*4882a593Smuzhiyun
8512*4882a593Smuzhiyun return NULL;
8513*4882a593Smuzhiyun }
8514*4882a593Smuzhiyun
8515*4882a593Smuzhiyun
8516*4882a593Smuzhiyun void ncr53c8xx_release(struct Scsi_Host *host)
8517*4882a593Smuzhiyun {
8518*4882a593Smuzhiyun struct host_data *host_data = shost_priv(host);
8519*4882a593Smuzhiyun #ifdef DEBUG_NCR53C8XX
8520*4882a593Smuzhiyun printk("ncr53c8xx: release\n");
8521*4882a593Smuzhiyun #endif
8522*4882a593Smuzhiyun if (host_data->ncb)
8523*4882a593Smuzhiyun ncr_detach(host_data->ncb);
8524*4882a593Smuzhiyun scsi_host_put(host);
8525*4882a593Smuzhiyun }
8526*4882a593Smuzhiyun
8527*4882a593Smuzhiyun static void ncr53c8xx_set_period(struct scsi_target *starget, int period)
8528*4882a593Smuzhiyun {
8529*4882a593Smuzhiyun struct Scsi_Host *shost = dev_to_shost(starget->dev.parent);
8530*4882a593Smuzhiyun struct ncb *np = ((struct host_data *)shost->hostdata)->ncb;
8531*4882a593Smuzhiyun struct tcb *tp = &np->target[starget->id];
8532*4882a593Smuzhiyun
8533*4882a593Smuzhiyun if (period > np->maxsync)
8534*4882a593Smuzhiyun period = np->maxsync;
8535*4882a593Smuzhiyun else if (period < np->minsync)
8536*4882a593Smuzhiyun period = np->minsync;
8537*4882a593Smuzhiyun
8538*4882a593Smuzhiyun tp->usrsync = period;
8539*4882a593Smuzhiyun
8540*4882a593Smuzhiyun ncr_negotiate(np, tp);
8541*4882a593Smuzhiyun }
8542*4882a593Smuzhiyun
8543*4882a593Smuzhiyun static void ncr53c8xx_set_offset(struct scsi_target *starget, int offset)
8544*4882a593Smuzhiyun {
8545*4882a593Smuzhiyun struct Scsi_Host *shost = dev_to_shost(starget->dev.parent);
8546*4882a593Smuzhiyun struct ncb *np = ((struct host_data *)shost->hostdata)->ncb;
8547*4882a593Smuzhiyun struct tcb *tp = &np->target[starget->id];
8548*4882a593Smuzhiyun
8549*4882a593Smuzhiyun if (offset > np->maxoffs)
8550*4882a593Smuzhiyun offset = np->maxoffs;
8551*4882a593Smuzhiyun else if (offset < 0)
8552*4882a593Smuzhiyun offset = 0;
8553*4882a593Smuzhiyun
8554*4882a593Smuzhiyun tp->maxoffs = offset;
8555*4882a593Smuzhiyun
8556*4882a593Smuzhiyun ncr_negotiate(np, tp);
8557*4882a593Smuzhiyun }
8558*4882a593Smuzhiyun
8559*4882a593Smuzhiyun static void ncr53c8xx_set_width(struct scsi_target *starget, int width)
8560*4882a593Smuzhiyun {
8561*4882a593Smuzhiyun struct Scsi_Host *shost = dev_to_shost(starget->dev.parent);
8562*4882a593Smuzhiyun struct ncb *np = ((struct host_data *)shost->hostdata)->ncb;
8563*4882a593Smuzhiyun struct tcb *tp = &np->target[starget->id];
8564*4882a593Smuzhiyun
8565*4882a593Smuzhiyun if (width > np->maxwide)
8566*4882a593Smuzhiyun width = np->maxwide;
8567*4882a593Smuzhiyun else if (width < 0)
8568*4882a593Smuzhiyun width = 0;
8569*4882a593Smuzhiyun
8570*4882a593Smuzhiyun tp->usrwide = width;
8571*4882a593Smuzhiyun
8572*4882a593Smuzhiyun ncr_negotiate(np, tp);
8573*4882a593Smuzhiyun }
8574*4882a593Smuzhiyun
8575*4882a593Smuzhiyun static void ncr53c8xx_get_signalling(struct Scsi_Host *shost)
8576*4882a593Smuzhiyun {
8577*4882a593Smuzhiyun struct ncb *np = ((struct host_data *)shost->hostdata)->ncb;
8578*4882a593Smuzhiyun enum spi_signal_type type;
8579*4882a593Smuzhiyun
8580*4882a593Smuzhiyun switch (np->scsi_mode) {
8581*4882a593Smuzhiyun case SMODE_SE:
8582*4882a593Smuzhiyun type = SPI_SIGNAL_SE;
8583*4882a593Smuzhiyun break;
8584*4882a593Smuzhiyun case SMODE_HVD:
8585*4882a593Smuzhiyun type = SPI_SIGNAL_HVD;
8586*4882a593Smuzhiyun break;
8587*4882a593Smuzhiyun default:
8588*4882a593Smuzhiyun type = SPI_SIGNAL_UNKNOWN;
8589*4882a593Smuzhiyun break;
8590*4882a593Smuzhiyun }
8591*4882a593Smuzhiyun spi_signalling(shost) = type;
8592*4882a593Smuzhiyun }
8593*4882a593Smuzhiyun
8594*4882a593Smuzhiyun static struct spi_function_template ncr53c8xx_transport_functions = {
8595*4882a593Smuzhiyun .set_period = ncr53c8xx_set_period,
8596*4882a593Smuzhiyun .show_period = 1,
8597*4882a593Smuzhiyun .set_offset = ncr53c8xx_set_offset,
8598*4882a593Smuzhiyun .show_offset = 1,
8599*4882a593Smuzhiyun .set_width = ncr53c8xx_set_width,
8600*4882a593Smuzhiyun .show_width = 1,
8601*4882a593Smuzhiyun .get_signalling = ncr53c8xx_get_signalling,
8602*4882a593Smuzhiyun };
8603*4882a593Smuzhiyun
8604*4882a593Smuzhiyun int __init ncr53c8xx_init(void)
8605*4882a593Smuzhiyun {
8606*4882a593Smuzhiyun ncr53c8xx_transport_template = spi_attach_transport(&ncr53c8xx_transport_functions);
8607*4882a593Smuzhiyun if (!ncr53c8xx_transport_template)
8608*4882a593Smuzhiyun return -ENODEV;
8609*4882a593Smuzhiyun return 0;
8610*4882a593Smuzhiyun }
8611*4882a593Smuzhiyun
8612*4882a593Smuzhiyun void ncr53c8xx_exit(void)
8613*4882a593Smuzhiyun {
8614*4882a593Smuzhiyun spi_release_transport(ncr53c8xx_transport_template);
8615*4882a593Smuzhiyun }
8616