xref: /OK3568_Linux_fs/kernel/drivers/scsi/mvsas/mv_sas.c (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0-only
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun  * Marvell 88SE64xx/88SE94xx main function
4*4882a593Smuzhiyun  *
5*4882a593Smuzhiyun  * Copyright 2007 Red Hat, Inc.
6*4882a593Smuzhiyun  * Copyright 2008 Marvell. <kewei@marvell.com>
7*4882a593Smuzhiyun  * Copyright 2009-2011 Marvell. <yuxiangl@marvell.com>
8*4882a593Smuzhiyun */
9*4882a593Smuzhiyun 
10*4882a593Smuzhiyun #include "mv_sas.h"
11*4882a593Smuzhiyun 
mvs_find_tag(struct mvs_info * mvi,struct sas_task * task,u32 * tag)12*4882a593Smuzhiyun static int mvs_find_tag(struct mvs_info *mvi, struct sas_task *task, u32 *tag)
13*4882a593Smuzhiyun {
14*4882a593Smuzhiyun 	if (task->lldd_task) {
15*4882a593Smuzhiyun 		struct mvs_slot_info *slot;
16*4882a593Smuzhiyun 		slot = task->lldd_task;
17*4882a593Smuzhiyun 		*tag = slot->slot_tag;
18*4882a593Smuzhiyun 		return 1;
19*4882a593Smuzhiyun 	}
20*4882a593Smuzhiyun 	return 0;
21*4882a593Smuzhiyun }
22*4882a593Smuzhiyun 
mvs_tag_clear(struct mvs_info * mvi,u32 tag)23*4882a593Smuzhiyun void mvs_tag_clear(struct mvs_info *mvi, u32 tag)
24*4882a593Smuzhiyun {
25*4882a593Smuzhiyun 	void *bitmap = mvi->tags;
26*4882a593Smuzhiyun 	clear_bit(tag, bitmap);
27*4882a593Smuzhiyun }
28*4882a593Smuzhiyun 
mvs_tag_free(struct mvs_info * mvi,u32 tag)29*4882a593Smuzhiyun void mvs_tag_free(struct mvs_info *mvi, u32 tag)
30*4882a593Smuzhiyun {
31*4882a593Smuzhiyun 	mvs_tag_clear(mvi, tag);
32*4882a593Smuzhiyun }
33*4882a593Smuzhiyun 
mvs_tag_set(struct mvs_info * mvi,unsigned int tag)34*4882a593Smuzhiyun void mvs_tag_set(struct mvs_info *mvi, unsigned int tag)
35*4882a593Smuzhiyun {
36*4882a593Smuzhiyun 	void *bitmap = mvi->tags;
37*4882a593Smuzhiyun 	set_bit(tag, bitmap);
38*4882a593Smuzhiyun }
39*4882a593Smuzhiyun 
mvs_tag_alloc(struct mvs_info * mvi,u32 * tag_out)40*4882a593Smuzhiyun inline int mvs_tag_alloc(struct mvs_info *mvi, u32 *tag_out)
41*4882a593Smuzhiyun {
42*4882a593Smuzhiyun 	unsigned int index, tag;
43*4882a593Smuzhiyun 	void *bitmap = mvi->tags;
44*4882a593Smuzhiyun 
45*4882a593Smuzhiyun 	index = find_first_zero_bit(bitmap, mvi->tags_num);
46*4882a593Smuzhiyun 	tag = index;
47*4882a593Smuzhiyun 	if (tag >= mvi->tags_num)
48*4882a593Smuzhiyun 		return -SAS_QUEUE_FULL;
49*4882a593Smuzhiyun 	mvs_tag_set(mvi, tag);
50*4882a593Smuzhiyun 	*tag_out = tag;
51*4882a593Smuzhiyun 	return 0;
52*4882a593Smuzhiyun }
53*4882a593Smuzhiyun 
mvs_tag_init(struct mvs_info * mvi)54*4882a593Smuzhiyun void mvs_tag_init(struct mvs_info *mvi)
55*4882a593Smuzhiyun {
56*4882a593Smuzhiyun 	int i;
57*4882a593Smuzhiyun 	for (i = 0; i < mvi->tags_num; ++i)
58*4882a593Smuzhiyun 		mvs_tag_clear(mvi, i);
59*4882a593Smuzhiyun }
60*4882a593Smuzhiyun 
mvs_find_dev_mvi(struct domain_device * dev)61*4882a593Smuzhiyun static struct mvs_info *mvs_find_dev_mvi(struct domain_device *dev)
62*4882a593Smuzhiyun {
63*4882a593Smuzhiyun 	unsigned long i = 0, j = 0, hi = 0;
64*4882a593Smuzhiyun 	struct sas_ha_struct *sha = dev->port->ha;
65*4882a593Smuzhiyun 	struct mvs_info *mvi = NULL;
66*4882a593Smuzhiyun 	struct asd_sas_phy *phy;
67*4882a593Smuzhiyun 
68*4882a593Smuzhiyun 	while (sha->sas_port[i]) {
69*4882a593Smuzhiyun 		if (sha->sas_port[i] == dev->port) {
70*4882a593Smuzhiyun 			phy =  container_of(sha->sas_port[i]->phy_list.next,
71*4882a593Smuzhiyun 				struct asd_sas_phy, port_phy_el);
72*4882a593Smuzhiyun 			j = 0;
73*4882a593Smuzhiyun 			while (sha->sas_phy[j]) {
74*4882a593Smuzhiyun 				if (sha->sas_phy[j] == phy)
75*4882a593Smuzhiyun 					break;
76*4882a593Smuzhiyun 				j++;
77*4882a593Smuzhiyun 			}
78*4882a593Smuzhiyun 			break;
79*4882a593Smuzhiyun 		}
80*4882a593Smuzhiyun 		i++;
81*4882a593Smuzhiyun 	}
82*4882a593Smuzhiyun 	hi = j/((struct mvs_prv_info *)sha->lldd_ha)->n_phy;
83*4882a593Smuzhiyun 	mvi = ((struct mvs_prv_info *)sha->lldd_ha)->mvi[hi];
84*4882a593Smuzhiyun 
85*4882a593Smuzhiyun 	return mvi;
86*4882a593Smuzhiyun 
87*4882a593Smuzhiyun }
88*4882a593Smuzhiyun 
mvs_find_dev_phyno(struct domain_device * dev,int * phyno)89*4882a593Smuzhiyun static int mvs_find_dev_phyno(struct domain_device *dev, int *phyno)
90*4882a593Smuzhiyun {
91*4882a593Smuzhiyun 	unsigned long i = 0, j = 0, n = 0, num = 0;
92*4882a593Smuzhiyun 	struct mvs_device *mvi_dev = (struct mvs_device *)dev->lldd_dev;
93*4882a593Smuzhiyun 	struct mvs_info *mvi = mvi_dev->mvi_info;
94*4882a593Smuzhiyun 	struct sas_ha_struct *sha = dev->port->ha;
95*4882a593Smuzhiyun 
96*4882a593Smuzhiyun 	while (sha->sas_port[i]) {
97*4882a593Smuzhiyun 		if (sha->sas_port[i] == dev->port) {
98*4882a593Smuzhiyun 			struct asd_sas_phy *phy;
99*4882a593Smuzhiyun 			list_for_each_entry(phy,
100*4882a593Smuzhiyun 				&sha->sas_port[i]->phy_list, port_phy_el) {
101*4882a593Smuzhiyun 				j = 0;
102*4882a593Smuzhiyun 				while (sha->sas_phy[j]) {
103*4882a593Smuzhiyun 					if (sha->sas_phy[j] == phy)
104*4882a593Smuzhiyun 						break;
105*4882a593Smuzhiyun 					j++;
106*4882a593Smuzhiyun 				}
107*4882a593Smuzhiyun 				phyno[n] = (j >= mvi->chip->n_phy) ?
108*4882a593Smuzhiyun 					(j - mvi->chip->n_phy) : j;
109*4882a593Smuzhiyun 				num++;
110*4882a593Smuzhiyun 				n++;
111*4882a593Smuzhiyun 			}
112*4882a593Smuzhiyun 			break;
113*4882a593Smuzhiyun 		}
114*4882a593Smuzhiyun 		i++;
115*4882a593Smuzhiyun 	}
116*4882a593Smuzhiyun 	return num;
117*4882a593Smuzhiyun }
118*4882a593Smuzhiyun 
mvs_find_dev_by_reg_set(struct mvs_info * mvi,u8 reg_set)119*4882a593Smuzhiyun struct mvs_device *mvs_find_dev_by_reg_set(struct mvs_info *mvi,
120*4882a593Smuzhiyun 						u8 reg_set)
121*4882a593Smuzhiyun {
122*4882a593Smuzhiyun 	u32 dev_no;
123*4882a593Smuzhiyun 	for (dev_no = 0; dev_no < MVS_MAX_DEVICES; dev_no++) {
124*4882a593Smuzhiyun 		if (mvi->devices[dev_no].taskfileset == MVS_ID_NOT_MAPPED)
125*4882a593Smuzhiyun 			continue;
126*4882a593Smuzhiyun 
127*4882a593Smuzhiyun 		if (mvi->devices[dev_no].taskfileset == reg_set)
128*4882a593Smuzhiyun 			return &mvi->devices[dev_no];
129*4882a593Smuzhiyun 	}
130*4882a593Smuzhiyun 	return NULL;
131*4882a593Smuzhiyun }
132*4882a593Smuzhiyun 
mvs_free_reg_set(struct mvs_info * mvi,struct mvs_device * dev)133*4882a593Smuzhiyun static inline void mvs_free_reg_set(struct mvs_info *mvi,
134*4882a593Smuzhiyun 				struct mvs_device *dev)
135*4882a593Smuzhiyun {
136*4882a593Smuzhiyun 	if (!dev) {
137*4882a593Smuzhiyun 		mv_printk("device has been free.\n");
138*4882a593Smuzhiyun 		return;
139*4882a593Smuzhiyun 	}
140*4882a593Smuzhiyun 	if (dev->taskfileset == MVS_ID_NOT_MAPPED)
141*4882a593Smuzhiyun 		return;
142*4882a593Smuzhiyun 	MVS_CHIP_DISP->free_reg_set(mvi, &dev->taskfileset);
143*4882a593Smuzhiyun }
144*4882a593Smuzhiyun 
mvs_assign_reg_set(struct mvs_info * mvi,struct mvs_device * dev)145*4882a593Smuzhiyun static inline u8 mvs_assign_reg_set(struct mvs_info *mvi,
146*4882a593Smuzhiyun 				struct mvs_device *dev)
147*4882a593Smuzhiyun {
148*4882a593Smuzhiyun 	if (dev->taskfileset != MVS_ID_NOT_MAPPED)
149*4882a593Smuzhiyun 		return 0;
150*4882a593Smuzhiyun 	return MVS_CHIP_DISP->assign_reg_set(mvi, &dev->taskfileset);
151*4882a593Smuzhiyun }
152*4882a593Smuzhiyun 
mvs_phys_reset(struct mvs_info * mvi,u32 phy_mask,int hard)153*4882a593Smuzhiyun void mvs_phys_reset(struct mvs_info *mvi, u32 phy_mask, int hard)
154*4882a593Smuzhiyun {
155*4882a593Smuzhiyun 	u32 no;
156*4882a593Smuzhiyun 	for_each_phy(phy_mask, phy_mask, no) {
157*4882a593Smuzhiyun 		if (!(phy_mask & 1))
158*4882a593Smuzhiyun 			continue;
159*4882a593Smuzhiyun 		MVS_CHIP_DISP->phy_reset(mvi, no, hard);
160*4882a593Smuzhiyun 	}
161*4882a593Smuzhiyun }
162*4882a593Smuzhiyun 
mvs_phy_control(struct asd_sas_phy * sas_phy,enum phy_func func,void * funcdata)163*4882a593Smuzhiyun int mvs_phy_control(struct asd_sas_phy *sas_phy, enum phy_func func,
164*4882a593Smuzhiyun 			void *funcdata)
165*4882a593Smuzhiyun {
166*4882a593Smuzhiyun 	int rc = 0, phy_id = sas_phy->id;
167*4882a593Smuzhiyun 	u32 tmp, i = 0, hi;
168*4882a593Smuzhiyun 	struct sas_ha_struct *sha = sas_phy->ha;
169*4882a593Smuzhiyun 	struct mvs_info *mvi = NULL;
170*4882a593Smuzhiyun 
171*4882a593Smuzhiyun 	while (sha->sas_phy[i]) {
172*4882a593Smuzhiyun 		if (sha->sas_phy[i] == sas_phy)
173*4882a593Smuzhiyun 			break;
174*4882a593Smuzhiyun 		i++;
175*4882a593Smuzhiyun 	}
176*4882a593Smuzhiyun 	hi = i/((struct mvs_prv_info *)sha->lldd_ha)->n_phy;
177*4882a593Smuzhiyun 	mvi = ((struct mvs_prv_info *)sha->lldd_ha)->mvi[hi];
178*4882a593Smuzhiyun 
179*4882a593Smuzhiyun 	switch (func) {
180*4882a593Smuzhiyun 	case PHY_FUNC_SET_LINK_RATE:
181*4882a593Smuzhiyun 		MVS_CHIP_DISP->phy_set_link_rate(mvi, phy_id, funcdata);
182*4882a593Smuzhiyun 		break;
183*4882a593Smuzhiyun 
184*4882a593Smuzhiyun 	case PHY_FUNC_HARD_RESET:
185*4882a593Smuzhiyun 		tmp = MVS_CHIP_DISP->read_phy_ctl(mvi, phy_id);
186*4882a593Smuzhiyun 		if (tmp & PHY_RST_HARD)
187*4882a593Smuzhiyun 			break;
188*4882a593Smuzhiyun 		MVS_CHIP_DISP->phy_reset(mvi, phy_id, MVS_HARD_RESET);
189*4882a593Smuzhiyun 		break;
190*4882a593Smuzhiyun 
191*4882a593Smuzhiyun 	case PHY_FUNC_LINK_RESET:
192*4882a593Smuzhiyun 		MVS_CHIP_DISP->phy_enable(mvi, phy_id);
193*4882a593Smuzhiyun 		MVS_CHIP_DISP->phy_reset(mvi, phy_id, MVS_SOFT_RESET);
194*4882a593Smuzhiyun 		break;
195*4882a593Smuzhiyun 
196*4882a593Smuzhiyun 	case PHY_FUNC_DISABLE:
197*4882a593Smuzhiyun 		MVS_CHIP_DISP->phy_disable(mvi, phy_id);
198*4882a593Smuzhiyun 		break;
199*4882a593Smuzhiyun 	case PHY_FUNC_RELEASE_SPINUP_HOLD:
200*4882a593Smuzhiyun 	default:
201*4882a593Smuzhiyun 		rc = -ENOSYS;
202*4882a593Smuzhiyun 	}
203*4882a593Smuzhiyun 	msleep(200);
204*4882a593Smuzhiyun 	return rc;
205*4882a593Smuzhiyun }
206*4882a593Smuzhiyun 
mvs_set_sas_addr(struct mvs_info * mvi,int port_id,u32 off_lo,u32 off_hi,u64 sas_addr)207*4882a593Smuzhiyun void mvs_set_sas_addr(struct mvs_info *mvi, int port_id, u32 off_lo,
208*4882a593Smuzhiyun 		      u32 off_hi, u64 sas_addr)
209*4882a593Smuzhiyun {
210*4882a593Smuzhiyun 	u32 lo = (u32)sas_addr;
211*4882a593Smuzhiyun 	u32 hi = (u32)(sas_addr>>32);
212*4882a593Smuzhiyun 
213*4882a593Smuzhiyun 	MVS_CHIP_DISP->write_port_cfg_addr(mvi, port_id, off_lo);
214*4882a593Smuzhiyun 	MVS_CHIP_DISP->write_port_cfg_data(mvi, port_id, lo);
215*4882a593Smuzhiyun 	MVS_CHIP_DISP->write_port_cfg_addr(mvi, port_id, off_hi);
216*4882a593Smuzhiyun 	MVS_CHIP_DISP->write_port_cfg_data(mvi, port_id, hi);
217*4882a593Smuzhiyun }
218*4882a593Smuzhiyun 
mvs_bytes_dmaed(struct mvs_info * mvi,int i,gfp_t gfp_flags)219*4882a593Smuzhiyun static void mvs_bytes_dmaed(struct mvs_info *mvi, int i, gfp_t gfp_flags)
220*4882a593Smuzhiyun {
221*4882a593Smuzhiyun 	struct mvs_phy *phy = &mvi->phy[i];
222*4882a593Smuzhiyun 	struct asd_sas_phy *sas_phy = &phy->sas_phy;
223*4882a593Smuzhiyun 
224*4882a593Smuzhiyun 	if (!phy->phy_attached)
225*4882a593Smuzhiyun 		return;
226*4882a593Smuzhiyun 
227*4882a593Smuzhiyun 	if (!(phy->att_dev_info & PORT_DEV_TRGT_MASK)
228*4882a593Smuzhiyun 		&& phy->phy_type & PORT_TYPE_SAS) {
229*4882a593Smuzhiyun 		return;
230*4882a593Smuzhiyun 	}
231*4882a593Smuzhiyun 
232*4882a593Smuzhiyun 	sas_notify_phy_event_gfp(sas_phy, PHYE_OOB_DONE, gfp_flags);
233*4882a593Smuzhiyun 
234*4882a593Smuzhiyun 	if (sas_phy->phy) {
235*4882a593Smuzhiyun 		struct sas_phy *sphy = sas_phy->phy;
236*4882a593Smuzhiyun 
237*4882a593Smuzhiyun 		sphy->negotiated_linkrate = sas_phy->linkrate;
238*4882a593Smuzhiyun 		sphy->minimum_linkrate = phy->minimum_linkrate;
239*4882a593Smuzhiyun 		sphy->minimum_linkrate_hw = SAS_LINK_RATE_1_5_GBPS;
240*4882a593Smuzhiyun 		sphy->maximum_linkrate = phy->maximum_linkrate;
241*4882a593Smuzhiyun 		sphy->maximum_linkrate_hw = MVS_CHIP_DISP->phy_max_link_rate();
242*4882a593Smuzhiyun 	}
243*4882a593Smuzhiyun 
244*4882a593Smuzhiyun 	if (phy->phy_type & PORT_TYPE_SAS) {
245*4882a593Smuzhiyun 		struct sas_identify_frame *id;
246*4882a593Smuzhiyun 
247*4882a593Smuzhiyun 		id = (struct sas_identify_frame *)phy->frame_rcvd;
248*4882a593Smuzhiyun 		id->dev_type = phy->identify.device_type;
249*4882a593Smuzhiyun 		id->initiator_bits = SAS_PROTOCOL_ALL;
250*4882a593Smuzhiyun 		id->target_bits = phy->identify.target_port_protocols;
251*4882a593Smuzhiyun 
252*4882a593Smuzhiyun 		/* direct attached SAS device */
253*4882a593Smuzhiyun 		if (phy->att_dev_info & PORT_SSP_TRGT_MASK) {
254*4882a593Smuzhiyun 			MVS_CHIP_DISP->write_port_cfg_addr(mvi, i, PHYR_PHY_STAT);
255*4882a593Smuzhiyun 			MVS_CHIP_DISP->write_port_cfg_data(mvi, i, 0x00);
256*4882a593Smuzhiyun 		}
257*4882a593Smuzhiyun 	} else if (phy->phy_type & PORT_TYPE_SATA) {
258*4882a593Smuzhiyun 		/*Nothing*/
259*4882a593Smuzhiyun 	}
260*4882a593Smuzhiyun 	mv_dprintk("phy %d byte dmaded.\n", i + mvi->id * mvi->chip->n_phy);
261*4882a593Smuzhiyun 
262*4882a593Smuzhiyun 	sas_phy->frame_rcvd_size = phy->frame_rcvd_size;
263*4882a593Smuzhiyun 
264*4882a593Smuzhiyun 	sas_notify_port_event_gfp(sas_phy, PORTE_BYTES_DMAED, gfp_flags);
265*4882a593Smuzhiyun }
266*4882a593Smuzhiyun 
mvs_scan_start(struct Scsi_Host * shost)267*4882a593Smuzhiyun void mvs_scan_start(struct Scsi_Host *shost)
268*4882a593Smuzhiyun {
269*4882a593Smuzhiyun 	int i, j;
270*4882a593Smuzhiyun 	unsigned short core_nr;
271*4882a593Smuzhiyun 	struct mvs_info *mvi;
272*4882a593Smuzhiyun 	struct sas_ha_struct *sha = SHOST_TO_SAS_HA(shost);
273*4882a593Smuzhiyun 	struct mvs_prv_info *mvs_prv = sha->lldd_ha;
274*4882a593Smuzhiyun 
275*4882a593Smuzhiyun 	core_nr = ((struct mvs_prv_info *)sha->lldd_ha)->n_host;
276*4882a593Smuzhiyun 
277*4882a593Smuzhiyun 	for (j = 0; j < core_nr; j++) {
278*4882a593Smuzhiyun 		mvi = ((struct mvs_prv_info *)sha->lldd_ha)->mvi[j];
279*4882a593Smuzhiyun 		for (i = 0; i < mvi->chip->n_phy; ++i)
280*4882a593Smuzhiyun 			mvs_bytes_dmaed(mvi, i, GFP_KERNEL);
281*4882a593Smuzhiyun 	}
282*4882a593Smuzhiyun 	mvs_prv->scan_finished = 1;
283*4882a593Smuzhiyun }
284*4882a593Smuzhiyun 
mvs_scan_finished(struct Scsi_Host * shost,unsigned long time)285*4882a593Smuzhiyun int mvs_scan_finished(struct Scsi_Host *shost, unsigned long time)
286*4882a593Smuzhiyun {
287*4882a593Smuzhiyun 	struct sas_ha_struct *sha = SHOST_TO_SAS_HA(shost);
288*4882a593Smuzhiyun 	struct mvs_prv_info *mvs_prv = sha->lldd_ha;
289*4882a593Smuzhiyun 
290*4882a593Smuzhiyun 	if (mvs_prv->scan_finished == 0)
291*4882a593Smuzhiyun 		return 0;
292*4882a593Smuzhiyun 
293*4882a593Smuzhiyun 	sas_drain_work(sha);
294*4882a593Smuzhiyun 	return 1;
295*4882a593Smuzhiyun }
296*4882a593Smuzhiyun 
mvs_task_prep_smp(struct mvs_info * mvi,struct mvs_task_exec_info * tei)297*4882a593Smuzhiyun static int mvs_task_prep_smp(struct mvs_info *mvi,
298*4882a593Smuzhiyun 			     struct mvs_task_exec_info *tei)
299*4882a593Smuzhiyun {
300*4882a593Smuzhiyun 	int elem, rc, i;
301*4882a593Smuzhiyun 	struct sas_ha_struct *sha = mvi->sas;
302*4882a593Smuzhiyun 	struct sas_task *task = tei->task;
303*4882a593Smuzhiyun 	struct mvs_cmd_hdr *hdr = tei->hdr;
304*4882a593Smuzhiyun 	struct domain_device *dev = task->dev;
305*4882a593Smuzhiyun 	struct asd_sas_port *sas_port = dev->port;
306*4882a593Smuzhiyun 	struct sas_phy *sphy = dev->phy;
307*4882a593Smuzhiyun 	struct asd_sas_phy *sas_phy = sha->sas_phy[sphy->number];
308*4882a593Smuzhiyun 	struct scatterlist *sg_req, *sg_resp;
309*4882a593Smuzhiyun 	u32 req_len, resp_len, tag = tei->tag;
310*4882a593Smuzhiyun 	void *buf_tmp;
311*4882a593Smuzhiyun 	u8 *buf_oaf;
312*4882a593Smuzhiyun 	dma_addr_t buf_tmp_dma;
313*4882a593Smuzhiyun 	void *buf_prd;
314*4882a593Smuzhiyun 	struct mvs_slot_info *slot = &mvi->slot_info[tag];
315*4882a593Smuzhiyun 	u32 flags = (tei->n_elem << MCH_PRD_LEN_SHIFT);
316*4882a593Smuzhiyun 
317*4882a593Smuzhiyun 	/*
318*4882a593Smuzhiyun 	 * DMA-map SMP request, response buffers
319*4882a593Smuzhiyun 	 */
320*4882a593Smuzhiyun 	sg_req = &task->smp_task.smp_req;
321*4882a593Smuzhiyun 	elem = dma_map_sg(mvi->dev, sg_req, 1, DMA_TO_DEVICE);
322*4882a593Smuzhiyun 	if (!elem)
323*4882a593Smuzhiyun 		return -ENOMEM;
324*4882a593Smuzhiyun 	req_len = sg_dma_len(sg_req);
325*4882a593Smuzhiyun 
326*4882a593Smuzhiyun 	sg_resp = &task->smp_task.smp_resp;
327*4882a593Smuzhiyun 	elem = dma_map_sg(mvi->dev, sg_resp, 1, DMA_FROM_DEVICE);
328*4882a593Smuzhiyun 	if (!elem) {
329*4882a593Smuzhiyun 		rc = -ENOMEM;
330*4882a593Smuzhiyun 		goto err_out;
331*4882a593Smuzhiyun 	}
332*4882a593Smuzhiyun 	resp_len = SB_RFB_MAX;
333*4882a593Smuzhiyun 
334*4882a593Smuzhiyun 	/* must be in dwords */
335*4882a593Smuzhiyun 	if ((req_len & 0x3) || (resp_len & 0x3)) {
336*4882a593Smuzhiyun 		rc = -EINVAL;
337*4882a593Smuzhiyun 		goto err_out_2;
338*4882a593Smuzhiyun 	}
339*4882a593Smuzhiyun 
340*4882a593Smuzhiyun 	/*
341*4882a593Smuzhiyun 	 * arrange MVS_SLOT_BUF_SZ-sized DMA buffer according to our needs
342*4882a593Smuzhiyun 	 */
343*4882a593Smuzhiyun 
344*4882a593Smuzhiyun 	/* region 1: command table area (MVS_SSP_CMD_SZ bytes) ***** */
345*4882a593Smuzhiyun 	buf_tmp = slot->buf;
346*4882a593Smuzhiyun 	buf_tmp_dma = slot->buf_dma;
347*4882a593Smuzhiyun 
348*4882a593Smuzhiyun 	hdr->cmd_tbl = cpu_to_le64(sg_dma_address(sg_req));
349*4882a593Smuzhiyun 
350*4882a593Smuzhiyun 	/* region 2: open address frame area (MVS_OAF_SZ bytes) ********* */
351*4882a593Smuzhiyun 	buf_oaf = buf_tmp;
352*4882a593Smuzhiyun 	hdr->open_frame = cpu_to_le64(buf_tmp_dma);
353*4882a593Smuzhiyun 
354*4882a593Smuzhiyun 	buf_tmp += MVS_OAF_SZ;
355*4882a593Smuzhiyun 	buf_tmp_dma += MVS_OAF_SZ;
356*4882a593Smuzhiyun 
357*4882a593Smuzhiyun 	/* region 3: PRD table *********************************** */
358*4882a593Smuzhiyun 	buf_prd = buf_tmp;
359*4882a593Smuzhiyun 	if (tei->n_elem)
360*4882a593Smuzhiyun 		hdr->prd_tbl = cpu_to_le64(buf_tmp_dma);
361*4882a593Smuzhiyun 	else
362*4882a593Smuzhiyun 		hdr->prd_tbl = 0;
363*4882a593Smuzhiyun 
364*4882a593Smuzhiyun 	i = MVS_CHIP_DISP->prd_size() * tei->n_elem;
365*4882a593Smuzhiyun 	buf_tmp += i;
366*4882a593Smuzhiyun 	buf_tmp_dma += i;
367*4882a593Smuzhiyun 
368*4882a593Smuzhiyun 	/* region 4: status buffer (larger the PRD, smaller this buf) ****** */
369*4882a593Smuzhiyun 	slot->response = buf_tmp;
370*4882a593Smuzhiyun 	hdr->status_buf = cpu_to_le64(buf_tmp_dma);
371*4882a593Smuzhiyun 	if (mvi->flags & MVF_FLAG_SOC)
372*4882a593Smuzhiyun 		hdr->reserved[0] = 0;
373*4882a593Smuzhiyun 
374*4882a593Smuzhiyun 	/*
375*4882a593Smuzhiyun 	 * Fill in TX ring and command slot header
376*4882a593Smuzhiyun 	 */
377*4882a593Smuzhiyun 	slot->tx = mvi->tx_prod;
378*4882a593Smuzhiyun 	mvi->tx[mvi->tx_prod] = cpu_to_le32((TXQ_CMD_SMP << TXQ_CMD_SHIFT) |
379*4882a593Smuzhiyun 					TXQ_MODE_I | tag |
380*4882a593Smuzhiyun 					(MVS_PHY_ID << TXQ_PHY_SHIFT));
381*4882a593Smuzhiyun 
382*4882a593Smuzhiyun 	hdr->flags |= flags;
383*4882a593Smuzhiyun 	hdr->lens = cpu_to_le32(((resp_len / 4) << 16) | ((req_len - 4) / 4));
384*4882a593Smuzhiyun 	hdr->tags = cpu_to_le32(tag);
385*4882a593Smuzhiyun 	hdr->data_len = 0;
386*4882a593Smuzhiyun 
387*4882a593Smuzhiyun 	/* generate open address frame hdr (first 12 bytes) */
388*4882a593Smuzhiyun 	/* initiator, SMP, ftype 1h */
389*4882a593Smuzhiyun 	buf_oaf[0] = (1 << 7) | (PROTOCOL_SMP << 4) | 0x01;
390*4882a593Smuzhiyun 	buf_oaf[1] = min(sas_port->linkrate, dev->linkrate) & 0xf;
391*4882a593Smuzhiyun 	*(u16 *)(buf_oaf + 2) = 0xFFFF;		/* SAS SPEC */
392*4882a593Smuzhiyun 	memcpy(buf_oaf + 4, dev->sas_addr, SAS_ADDR_SIZE);
393*4882a593Smuzhiyun 
394*4882a593Smuzhiyun 	/* fill in PRD (scatter/gather) table, if any */
395*4882a593Smuzhiyun 	MVS_CHIP_DISP->make_prd(task->scatter, tei->n_elem, buf_prd);
396*4882a593Smuzhiyun 
397*4882a593Smuzhiyun 	return 0;
398*4882a593Smuzhiyun 
399*4882a593Smuzhiyun err_out_2:
400*4882a593Smuzhiyun 	dma_unmap_sg(mvi->dev, &tei->task->smp_task.smp_resp, 1,
401*4882a593Smuzhiyun 		     DMA_FROM_DEVICE);
402*4882a593Smuzhiyun err_out:
403*4882a593Smuzhiyun 	dma_unmap_sg(mvi->dev, &tei->task->smp_task.smp_req, 1,
404*4882a593Smuzhiyun 		     DMA_TO_DEVICE);
405*4882a593Smuzhiyun 	return rc;
406*4882a593Smuzhiyun }
407*4882a593Smuzhiyun 
mvs_get_ncq_tag(struct sas_task * task,u32 * tag)408*4882a593Smuzhiyun static u32 mvs_get_ncq_tag(struct sas_task *task, u32 *tag)
409*4882a593Smuzhiyun {
410*4882a593Smuzhiyun 	struct ata_queued_cmd *qc = task->uldd_task;
411*4882a593Smuzhiyun 
412*4882a593Smuzhiyun 	if (qc) {
413*4882a593Smuzhiyun 		if (qc->tf.command == ATA_CMD_FPDMA_WRITE ||
414*4882a593Smuzhiyun 		    qc->tf.command == ATA_CMD_FPDMA_READ ||
415*4882a593Smuzhiyun 		    qc->tf.command == ATA_CMD_FPDMA_RECV ||
416*4882a593Smuzhiyun 		    qc->tf.command == ATA_CMD_FPDMA_SEND ||
417*4882a593Smuzhiyun 		    qc->tf.command == ATA_CMD_NCQ_NON_DATA) {
418*4882a593Smuzhiyun 			*tag = qc->tag;
419*4882a593Smuzhiyun 			return 1;
420*4882a593Smuzhiyun 		}
421*4882a593Smuzhiyun 	}
422*4882a593Smuzhiyun 
423*4882a593Smuzhiyun 	return 0;
424*4882a593Smuzhiyun }
425*4882a593Smuzhiyun 
mvs_task_prep_ata(struct mvs_info * mvi,struct mvs_task_exec_info * tei)426*4882a593Smuzhiyun static int mvs_task_prep_ata(struct mvs_info *mvi,
427*4882a593Smuzhiyun 			     struct mvs_task_exec_info *tei)
428*4882a593Smuzhiyun {
429*4882a593Smuzhiyun 	struct sas_task *task = tei->task;
430*4882a593Smuzhiyun 	struct domain_device *dev = task->dev;
431*4882a593Smuzhiyun 	struct mvs_device *mvi_dev = dev->lldd_dev;
432*4882a593Smuzhiyun 	struct mvs_cmd_hdr *hdr = tei->hdr;
433*4882a593Smuzhiyun 	struct asd_sas_port *sas_port = dev->port;
434*4882a593Smuzhiyun 	struct mvs_slot_info *slot;
435*4882a593Smuzhiyun 	void *buf_prd;
436*4882a593Smuzhiyun 	u32 tag = tei->tag, hdr_tag;
437*4882a593Smuzhiyun 	u32 flags, del_q;
438*4882a593Smuzhiyun 	void *buf_tmp;
439*4882a593Smuzhiyun 	u8 *buf_cmd, *buf_oaf;
440*4882a593Smuzhiyun 	dma_addr_t buf_tmp_dma;
441*4882a593Smuzhiyun 	u32 i, req_len, resp_len;
442*4882a593Smuzhiyun 	const u32 max_resp_len = SB_RFB_MAX;
443*4882a593Smuzhiyun 
444*4882a593Smuzhiyun 	if (mvs_assign_reg_set(mvi, mvi_dev) == MVS_ID_NOT_MAPPED) {
445*4882a593Smuzhiyun 		mv_dprintk("Have not enough regiset for dev %d.\n",
446*4882a593Smuzhiyun 			mvi_dev->device_id);
447*4882a593Smuzhiyun 		return -EBUSY;
448*4882a593Smuzhiyun 	}
449*4882a593Smuzhiyun 	slot = &mvi->slot_info[tag];
450*4882a593Smuzhiyun 	slot->tx = mvi->tx_prod;
451*4882a593Smuzhiyun 	del_q = TXQ_MODE_I | tag |
452*4882a593Smuzhiyun 		(TXQ_CMD_STP << TXQ_CMD_SHIFT) |
453*4882a593Smuzhiyun 		((sas_port->phy_mask & TXQ_PHY_MASK) << TXQ_PHY_SHIFT) |
454*4882a593Smuzhiyun 		(mvi_dev->taskfileset << TXQ_SRS_SHIFT);
455*4882a593Smuzhiyun 	mvi->tx[mvi->tx_prod] = cpu_to_le32(del_q);
456*4882a593Smuzhiyun 
457*4882a593Smuzhiyun 	if (task->data_dir == DMA_FROM_DEVICE)
458*4882a593Smuzhiyun 		flags = (MVS_CHIP_DISP->prd_count() << MCH_PRD_LEN_SHIFT);
459*4882a593Smuzhiyun 	else
460*4882a593Smuzhiyun 		flags = (tei->n_elem << MCH_PRD_LEN_SHIFT);
461*4882a593Smuzhiyun 
462*4882a593Smuzhiyun 	if (task->ata_task.use_ncq)
463*4882a593Smuzhiyun 		flags |= MCH_FPDMA;
464*4882a593Smuzhiyun 	if (dev->sata_dev.class == ATA_DEV_ATAPI) {
465*4882a593Smuzhiyun 		if (task->ata_task.fis.command != ATA_CMD_ID_ATAPI)
466*4882a593Smuzhiyun 			flags |= MCH_ATAPI;
467*4882a593Smuzhiyun 	}
468*4882a593Smuzhiyun 
469*4882a593Smuzhiyun 	hdr->flags = cpu_to_le32(flags);
470*4882a593Smuzhiyun 
471*4882a593Smuzhiyun 	if (task->ata_task.use_ncq && mvs_get_ncq_tag(task, &hdr_tag))
472*4882a593Smuzhiyun 		task->ata_task.fis.sector_count |= (u8) (hdr_tag << 3);
473*4882a593Smuzhiyun 	else
474*4882a593Smuzhiyun 		hdr_tag = tag;
475*4882a593Smuzhiyun 
476*4882a593Smuzhiyun 	hdr->tags = cpu_to_le32(hdr_tag);
477*4882a593Smuzhiyun 
478*4882a593Smuzhiyun 	hdr->data_len = cpu_to_le32(task->total_xfer_len);
479*4882a593Smuzhiyun 
480*4882a593Smuzhiyun 	/*
481*4882a593Smuzhiyun 	 * arrange MVS_SLOT_BUF_SZ-sized DMA buffer according to our needs
482*4882a593Smuzhiyun 	 */
483*4882a593Smuzhiyun 
484*4882a593Smuzhiyun 	/* region 1: command table area (MVS_ATA_CMD_SZ bytes) ************** */
485*4882a593Smuzhiyun 	buf_cmd = buf_tmp = slot->buf;
486*4882a593Smuzhiyun 	buf_tmp_dma = slot->buf_dma;
487*4882a593Smuzhiyun 
488*4882a593Smuzhiyun 	hdr->cmd_tbl = cpu_to_le64(buf_tmp_dma);
489*4882a593Smuzhiyun 
490*4882a593Smuzhiyun 	buf_tmp += MVS_ATA_CMD_SZ;
491*4882a593Smuzhiyun 	buf_tmp_dma += MVS_ATA_CMD_SZ;
492*4882a593Smuzhiyun 
493*4882a593Smuzhiyun 	/* region 2: open address frame area (MVS_OAF_SZ bytes) ********* */
494*4882a593Smuzhiyun 	/* used for STP.  unused for SATA? */
495*4882a593Smuzhiyun 	buf_oaf = buf_tmp;
496*4882a593Smuzhiyun 	hdr->open_frame = cpu_to_le64(buf_tmp_dma);
497*4882a593Smuzhiyun 
498*4882a593Smuzhiyun 	buf_tmp += MVS_OAF_SZ;
499*4882a593Smuzhiyun 	buf_tmp_dma += MVS_OAF_SZ;
500*4882a593Smuzhiyun 
501*4882a593Smuzhiyun 	/* region 3: PRD table ********************************************* */
502*4882a593Smuzhiyun 	buf_prd = buf_tmp;
503*4882a593Smuzhiyun 
504*4882a593Smuzhiyun 	if (tei->n_elem)
505*4882a593Smuzhiyun 		hdr->prd_tbl = cpu_to_le64(buf_tmp_dma);
506*4882a593Smuzhiyun 	else
507*4882a593Smuzhiyun 		hdr->prd_tbl = 0;
508*4882a593Smuzhiyun 	i = MVS_CHIP_DISP->prd_size() * MVS_CHIP_DISP->prd_count();
509*4882a593Smuzhiyun 
510*4882a593Smuzhiyun 	buf_tmp += i;
511*4882a593Smuzhiyun 	buf_tmp_dma += i;
512*4882a593Smuzhiyun 
513*4882a593Smuzhiyun 	/* region 4: status buffer (larger the PRD, smaller this buf) ****** */
514*4882a593Smuzhiyun 	slot->response = buf_tmp;
515*4882a593Smuzhiyun 	hdr->status_buf = cpu_to_le64(buf_tmp_dma);
516*4882a593Smuzhiyun 	if (mvi->flags & MVF_FLAG_SOC)
517*4882a593Smuzhiyun 		hdr->reserved[0] = 0;
518*4882a593Smuzhiyun 
519*4882a593Smuzhiyun 	req_len = sizeof(struct host_to_dev_fis);
520*4882a593Smuzhiyun 	resp_len = MVS_SLOT_BUF_SZ - MVS_ATA_CMD_SZ -
521*4882a593Smuzhiyun 	    sizeof(struct mvs_err_info) - i;
522*4882a593Smuzhiyun 
523*4882a593Smuzhiyun 	/* request, response lengths */
524*4882a593Smuzhiyun 	resp_len = min(resp_len, max_resp_len);
525*4882a593Smuzhiyun 	hdr->lens = cpu_to_le32(((resp_len / 4) << 16) | (req_len / 4));
526*4882a593Smuzhiyun 
527*4882a593Smuzhiyun 	if (likely(!task->ata_task.device_control_reg_update))
528*4882a593Smuzhiyun 		task->ata_task.fis.flags |= 0x80; /* C=1: update ATA cmd reg */
529*4882a593Smuzhiyun 	/* fill in command FIS and ATAPI CDB */
530*4882a593Smuzhiyun 	memcpy(buf_cmd, &task->ata_task.fis, sizeof(struct host_to_dev_fis));
531*4882a593Smuzhiyun 	if (dev->sata_dev.class == ATA_DEV_ATAPI)
532*4882a593Smuzhiyun 		memcpy(buf_cmd + STP_ATAPI_CMD,
533*4882a593Smuzhiyun 			task->ata_task.atapi_packet, 16);
534*4882a593Smuzhiyun 
535*4882a593Smuzhiyun 	/* generate open address frame hdr (first 12 bytes) */
536*4882a593Smuzhiyun 	/* initiator, STP, ftype 1h */
537*4882a593Smuzhiyun 	buf_oaf[0] = (1 << 7) | (PROTOCOL_STP << 4) | 0x1;
538*4882a593Smuzhiyun 	buf_oaf[1] = min(sas_port->linkrate, dev->linkrate) & 0xf;
539*4882a593Smuzhiyun 	*(u16 *)(buf_oaf + 2) = cpu_to_be16(mvi_dev->device_id + 1);
540*4882a593Smuzhiyun 	memcpy(buf_oaf + 4, dev->sas_addr, SAS_ADDR_SIZE);
541*4882a593Smuzhiyun 
542*4882a593Smuzhiyun 	/* fill in PRD (scatter/gather) table, if any */
543*4882a593Smuzhiyun 	MVS_CHIP_DISP->make_prd(task->scatter, tei->n_elem, buf_prd);
544*4882a593Smuzhiyun 
545*4882a593Smuzhiyun 	if (task->data_dir == DMA_FROM_DEVICE)
546*4882a593Smuzhiyun 		MVS_CHIP_DISP->dma_fix(mvi, sas_port->phy_mask,
547*4882a593Smuzhiyun 				TRASH_BUCKET_SIZE, tei->n_elem, buf_prd);
548*4882a593Smuzhiyun 
549*4882a593Smuzhiyun 	return 0;
550*4882a593Smuzhiyun }
551*4882a593Smuzhiyun 
mvs_task_prep_ssp(struct mvs_info * mvi,struct mvs_task_exec_info * tei,int is_tmf,struct mvs_tmf_task * tmf)552*4882a593Smuzhiyun static int mvs_task_prep_ssp(struct mvs_info *mvi,
553*4882a593Smuzhiyun 			     struct mvs_task_exec_info *tei, int is_tmf,
554*4882a593Smuzhiyun 			     struct mvs_tmf_task *tmf)
555*4882a593Smuzhiyun {
556*4882a593Smuzhiyun 	struct sas_task *task = tei->task;
557*4882a593Smuzhiyun 	struct mvs_cmd_hdr *hdr = tei->hdr;
558*4882a593Smuzhiyun 	struct mvs_port *port = tei->port;
559*4882a593Smuzhiyun 	struct domain_device *dev = task->dev;
560*4882a593Smuzhiyun 	struct mvs_device *mvi_dev = dev->lldd_dev;
561*4882a593Smuzhiyun 	struct asd_sas_port *sas_port = dev->port;
562*4882a593Smuzhiyun 	struct mvs_slot_info *slot;
563*4882a593Smuzhiyun 	void *buf_prd;
564*4882a593Smuzhiyun 	struct ssp_frame_hdr *ssp_hdr;
565*4882a593Smuzhiyun 	void *buf_tmp;
566*4882a593Smuzhiyun 	u8 *buf_cmd, *buf_oaf, fburst = 0;
567*4882a593Smuzhiyun 	dma_addr_t buf_tmp_dma;
568*4882a593Smuzhiyun 	u32 flags;
569*4882a593Smuzhiyun 	u32 resp_len, req_len, i, tag = tei->tag;
570*4882a593Smuzhiyun 	const u32 max_resp_len = SB_RFB_MAX;
571*4882a593Smuzhiyun 	u32 phy_mask;
572*4882a593Smuzhiyun 
573*4882a593Smuzhiyun 	slot = &mvi->slot_info[tag];
574*4882a593Smuzhiyun 
575*4882a593Smuzhiyun 	phy_mask = ((port->wide_port_phymap) ? port->wide_port_phymap :
576*4882a593Smuzhiyun 		sas_port->phy_mask) & TXQ_PHY_MASK;
577*4882a593Smuzhiyun 
578*4882a593Smuzhiyun 	slot->tx = mvi->tx_prod;
579*4882a593Smuzhiyun 	mvi->tx[mvi->tx_prod] = cpu_to_le32(TXQ_MODE_I | tag |
580*4882a593Smuzhiyun 				(TXQ_CMD_SSP << TXQ_CMD_SHIFT) |
581*4882a593Smuzhiyun 				(phy_mask << TXQ_PHY_SHIFT));
582*4882a593Smuzhiyun 
583*4882a593Smuzhiyun 	flags = MCH_RETRY;
584*4882a593Smuzhiyun 	if (task->ssp_task.enable_first_burst) {
585*4882a593Smuzhiyun 		flags |= MCH_FBURST;
586*4882a593Smuzhiyun 		fburst = (1 << 7);
587*4882a593Smuzhiyun 	}
588*4882a593Smuzhiyun 	if (is_tmf)
589*4882a593Smuzhiyun 		flags |= (MCH_SSP_FR_TASK << MCH_SSP_FR_TYPE_SHIFT);
590*4882a593Smuzhiyun 	else
591*4882a593Smuzhiyun 		flags |= (MCH_SSP_FR_CMD << MCH_SSP_FR_TYPE_SHIFT);
592*4882a593Smuzhiyun 
593*4882a593Smuzhiyun 	hdr->flags = cpu_to_le32(flags | (tei->n_elem << MCH_PRD_LEN_SHIFT));
594*4882a593Smuzhiyun 	hdr->tags = cpu_to_le32(tag);
595*4882a593Smuzhiyun 	hdr->data_len = cpu_to_le32(task->total_xfer_len);
596*4882a593Smuzhiyun 
597*4882a593Smuzhiyun 	/*
598*4882a593Smuzhiyun 	 * arrange MVS_SLOT_BUF_SZ-sized DMA buffer according to our needs
599*4882a593Smuzhiyun 	 */
600*4882a593Smuzhiyun 
601*4882a593Smuzhiyun 	/* region 1: command table area (MVS_SSP_CMD_SZ bytes) ************** */
602*4882a593Smuzhiyun 	buf_cmd = buf_tmp = slot->buf;
603*4882a593Smuzhiyun 	buf_tmp_dma = slot->buf_dma;
604*4882a593Smuzhiyun 
605*4882a593Smuzhiyun 	hdr->cmd_tbl = cpu_to_le64(buf_tmp_dma);
606*4882a593Smuzhiyun 
607*4882a593Smuzhiyun 	buf_tmp += MVS_SSP_CMD_SZ;
608*4882a593Smuzhiyun 	buf_tmp_dma += MVS_SSP_CMD_SZ;
609*4882a593Smuzhiyun 
610*4882a593Smuzhiyun 	/* region 2: open address frame area (MVS_OAF_SZ bytes) ********* */
611*4882a593Smuzhiyun 	buf_oaf = buf_tmp;
612*4882a593Smuzhiyun 	hdr->open_frame = cpu_to_le64(buf_tmp_dma);
613*4882a593Smuzhiyun 
614*4882a593Smuzhiyun 	buf_tmp += MVS_OAF_SZ;
615*4882a593Smuzhiyun 	buf_tmp_dma += MVS_OAF_SZ;
616*4882a593Smuzhiyun 
617*4882a593Smuzhiyun 	/* region 3: PRD table ********************************************* */
618*4882a593Smuzhiyun 	buf_prd = buf_tmp;
619*4882a593Smuzhiyun 	if (tei->n_elem)
620*4882a593Smuzhiyun 		hdr->prd_tbl = cpu_to_le64(buf_tmp_dma);
621*4882a593Smuzhiyun 	else
622*4882a593Smuzhiyun 		hdr->prd_tbl = 0;
623*4882a593Smuzhiyun 
624*4882a593Smuzhiyun 	i = MVS_CHIP_DISP->prd_size() * tei->n_elem;
625*4882a593Smuzhiyun 	buf_tmp += i;
626*4882a593Smuzhiyun 	buf_tmp_dma += i;
627*4882a593Smuzhiyun 
628*4882a593Smuzhiyun 	/* region 4: status buffer (larger the PRD, smaller this buf) ****** */
629*4882a593Smuzhiyun 	slot->response = buf_tmp;
630*4882a593Smuzhiyun 	hdr->status_buf = cpu_to_le64(buf_tmp_dma);
631*4882a593Smuzhiyun 	if (mvi->flags & MVF_FLAG_SOC)
632*4882a593Smuzhiyun 		hdr->reserved[0] = 0;
633*4882a593Smuzhiyun 
634*4882a593Smuzhiyun 	resp_len = MVS_SLOT_BUF_SZ - MVS_SSP_CMD_SZ - MVS_OAF_SZ -
635*4882a593Smuzhiyun 	    sizeof(struct mvs_err_info) - i;
636*4882a593Smuzhiyun 	resp_len = min(resp_len, max_resp_len);
637*4882a593Smuzhiyun 
638*4882a593Smuzhiyun 	req_len = sizeof(struct ssp_frame_hdr) + 28;
639*4882a593Smuzhiyun 
640*4882a593Smuzhiyun 	/* request, response lengths */
641*4882a593Smuzhiyun 	hdr->lens = cpu_to_le32(((resp_len / 4) << 16) | (req_len / 4));
642*4882a593Smuzhiyun 
643*4882a593Smuzhiyun 	/* generate open address frame hdr (first 12 bytes) */
644*4882a593Smuzhiyun 	/* initiator, SSP, ftype 1h */
645*4882a593Smuzhiyun 	buf_oaf[0] = (1 << 7) | (PROTOCOL_SSP << 4) | 0x1;
646*4882a593Smuzhiyun 	buf_oaf[1] = min(sas_port->linkrate, dev->linkrate) & 0xf;
647*4882a593Smuzhiyun 	*(u16 *)(buf_oaf + 2) = cpu_to_be16(mvi_dev->device_id + 1);
648*4882a593Smuzhiyun 	memcpy(buf_oaf + 4, dev->sas_addr, SAS_ADDR_SIZE);
649*4882a593Smuzhiyun 
650*4882a593Smuzhiyun 	/* fill in SSP frame header (Command Table.SSP frame header) */
651*4882a593Smuzhiyun 	ssp_hdr = (struct ssp_frame_hdr *)buf_cmd;
652*4882a593Smuzhiyun 
653*4882a593Smuzhiyun 	if (is_tmf)
654*4882a593Smuzhiyun 		ssp_hdr->frame_type = SSP_TASK;
655*4882a593Smuzhiyun 	else
656*4882a593Smuzhiyun 		ssp_hdr->frame_type = SSP_COMMAND;
657*4882a593Smuzhiyun 
658*4882a593Smuzhiyun 	memcpy(ssp_hdr->hashed_dest_addr, dev->hashed_sas_addr,
659*4882a593Smuzhiyun 	       HASHED_SAS_ADDR_SIZE);
660*4882a593Smuzhiyun 	memcpy(ssp_hdr->hashed_src_addr,
661*4882a593Smuzhiyun 	       dev->hashed_sas_addr, HASHED_SAS_ADDR_SIZE);
662*4882a593Smuzhiyun 	ssp_hdr->tag = cpu_to_be16(tag);
663*4882a593Smuzhiyun 
664*4882a593Smuzhiyun 	/* fill in IU for TASK and Command Frame */
665*4882a593Smuzhiyun 	buf_cmd += sizeof(*ssp_hdr);
666*4882a593Smuzhiyun 	memcpy(buf_cmd, &task->ssp_task.LUN, 8);
667*4882a593Smuzhiyun 
668*4882a593Smuzhiyun 	if (ssp_hdr->frame_type != SSP_TASK) {
669*4882a593Smuzhiyun 		buf_cmd[9] = fburst | task->ssp_task.task_attr |
670*4882a593Smuzhiyun 				(task->ssp_task.task_prio << 3);
671*4882a593Smuzhiyun 		memcpy(buf_cmd + 12, task->ssp_task.cmd->cmnd,
672*4882a593Smuzhiyun 		       task->ssp_task.cmd->cmd_len);
673*4882a593Smuzhiyun 	} else{
674*4882a593Smuzhiyun 		buf_cmd[10] = tmf->tmf;
675*4882a593Smuzhiyun 		switch (tmf->tmf) {
676*4882a593Smuzhiyun 		case TMF_ABORT_TASK:
677*4882a593Smuzhiyun 		case TMF_QUERY_TASK:
678*4882a593Smuzhiyun 			buf_cmd[12] =
679*4882a593Smuzhiyun 				(tmf->tag_of_task_to_be_managed >> 8) & 0xff;
680*4882a593Smuzhiyun 			buf_cmd[13] =
681*4882a593Smuzhiyun 				tmf->tag_of_task_to_be_managed & 0xff;
682*4882a593Smuzhiyun 			break;
683*4882a593Smuzhiyun 		default:
684*4882a593Smuzhiyun 			break;
685*4882a593Smuzhiyun 		}
686*4882a593Smuzhiyun 	}
687*4882a593Smuzhiyun 	/* fill in PRD (scatter/gather) table, if any */
688*4882a593Smuzhiyun 	MVS_CHIP_DISP->make_prd(task->scatter, tei->n_elem, buf_prd);
689*4882a593Smuzhiyun 	return 0;
690*4882a593Smuzhiyun }
691*4882a593Smuzhiyun 
692*4882a593Smuzhiyun #define	DEV_IS_GONE(mvi_dev)	((!mvi_dev || (mvi_dev->dev_type == SAS_PHY_UNUSED)))
mvs_task_prep(struct sas_task * task,struct mvs_info * mvi,int is_tmf,struct mvs_tmf_task * tmf,int * pass)693*4882a593Smuzhiyun static int mvs_task_prep(struct sas_task *task, struct mvs_info *mvi, int is_tmf,
694*4882a593Smuzhiyun 				struct mvs_tmf_task *tmf, int *pass)
695*4882a593Smuzhiyun {
696*4882a593Smuzhiyun 	struct domain_device *dev = task->dev;
697*4882a593Smuzhiyun 	struct mvs_device *mvi_dev = dev->lldd_dev;
698*4882a593Smuzhiyun 	struct mvs_task_exec_info tei;
699*4882a593Smuzhiyun 	struct mvs_slot_info *slot;
700*4882a593Smuzhiyun 	u32 tag = 0xdeadbeef, n_elem = 0;
701*4882a593Smuzhiyun 	int rc = 0;
702*4882a593Smuzhiyun 
703*4882a593Smuzhiyun 	if (!dev->port) {
704*4882a593Smuzhiyun 		struct task_status_struct *tsm = &task->task_status;
705*4882a593Smuzhiyun 
706*4882a593Smuzhiyun 		tsm->resp = SAS_TASK_UNDELIVERED;
707*4882a593Smuzhiyun 		tsm->stat = SAS_PHY_DOWN;
708*4882a593Smuzhiyun 		/*
709*4882a593Smuzhiyun 		 * libsas will use dev->port, should
710*4882a593Smuzhiyun 		 * not call task_done for sata
711*4882a593Smuzhiyun 		 */
712*4882a593Smuzhiyun 		if (dev->dev_type != SAS_SATA_DEV)
713*4882a593Smuzhiyun 			task->task_done(task);
714*4882a593Smuzhiyun 		return rc;
715*4882a593Smuzhiyun 	}
716*4882a593Smuzhiyun 
717*4882a593Smuzhiyun 	if (DEV_IS_GONE(mvi_dev)) {
718*4882a593Smuzhiyun 		if (mvi_dev)
719*4882a593Smuzhiyun 			mv_dprintk("device %d not ready.\n",
720*4882a593Smuzhiyun 				mvi_dev->device_id);
721*4882a593Smuzhiyun 		else
722*4882a593Smuzhiyun 			mv_dprintk("device %016llx not ready.\n",
723*4882a593Smuzhiyun 				SAS_ADDR(dev->sas_addr));
724*4882a593Smuzhiyun 
725*4882a593Smuzhiyun 		rc = SAS_PHY_DOWN;
726*4882a593Smuzhiyun 		return rc;
727*4882a593Smuzhiyun 	}
728*4882a593Smuzhiyun 	tei.port = dev->port->lldd_port;
729*4882a593Smuzhiyun 	if (tei.port && !tei.port->port_attached && !tmf) {
730*4882a593Smuzhiyun 		if (sas_protocol_ata(task->task_proto)) {
731*4882a593Smuzhiyun 			struct task_status_struct *ts = &task->task_status;
732*4882a593Smuzhiyun 			mv_dprintk("SATA/STP port %d does not attach"
733*4882a593Smuzhiyun 					"device.\n", dev->port->id);
734*4882a593Smuzhiyun 			ts->resp = SAS_TASK_COMPLETE;
735*4882a593Smuzhiyun 			ts->stat = SAS_PHY_DOWN;
736*4882a593Smuzhiyun 
737*4882a593Smuzhiyun 			task->task_done(task);
738*4882a593Smuzhiyun 
739*4882a593Smuzhiyun 		} else {
740*4882a593Smuzhiyun 			struct task_status_struct *ts = &task->task_status;
741*4882a593Smuzhiyun 			mv_dprintk("SAS port %d does not attach"
742*4882a593Smuzhiyun 				"device.\n", dev->port->id);
743*4882a593Smuzhiyun 			ts->resp = SAS_TASK_UNDELIVERED;
744*4882a593Smuzhiyun 			ts->stat = SAS_PHY_DOWN;
745*4882a593Smuzhiyun 			task->task_done(task);
746*4882a593Smuzhiyun 		}
747*4882a593Smuzhiyun 		return rc;
748*4882a593Smuzhiyun 	}
749*4882a593Smuzhiyun 
750*4882a593Smuzhiyun 	if (!sas_protocol_ata(task->task_proto)) {
751*4882a593Smuzhiyun 		if (task->num_scatter) {
752*4882a593Smuzhiyun 			n_elem = dma_map_sg(mvi->dev,
753*4882a593Smuzhiyun 					    task->scatter,
754*4882a593Smuzhiyun 					    task->num_scatter,
755*4882a593Smuzhiyun 					    task->data_dir);
756*4882a593Smuzhiyun 			if (!n_elem) {
757*4882a593Smuzhiyun 				rc = -ENOMEM;
758*4882a593Smuzhiyun 				goto prep_out;
759*4882a593Smuzhiyun 			}
760*4882a593Smuzhiyun 		}
761*4882a593Smuzhiyun 	} else {
762*4882a593Smuzhiyun 		n_elem = task->num_scatter;
763*4882a593Smuzhiyun 	}
764*4882a593Smuzhiyun 
765*4882a593Smuzhiyun 	rc = mvs_tag_alloc(mvi, &tag);
766*4882a593Smuzhiyun 	if (rc)
767*4882a593Smuzhiyun 		goto err_out;
768*4882a593Smuzhiyun 
769*4882a593Smuzhiyun 	slot = &mvi->slot_info[tag];
770*4882a593Smuzhiyun 
771*4882a593Smuzhiyun 	task->lldd_task = NULL;
772*4882a593Smuzhiyun 	slot->n_elem = n_elem;
773*4882a593Smuzhiyun 	slot->slot_tag = tag;
774*4882a593Smuzhiyun 
775*4882a593Smuzhiyun 	slot->buf = dma_pool_zalloc(mvi->dma_pool, GFP_ATOMIC, &slot->buf_dma);
776*4882a593Smuzhiyun 	if (!slot->buf) {
777*4882a593Smuzhiyun 		rc = -ENOMEM;
778*4882a593Smuzhiyun 		goto err_out_tag;
779*4882a593Smuzhiyun 	}
780*4882a593Smuzhiyun 
781*4882a593Smuzhiyun 	tei.task = task;
782*4882a593Smuzhiyun 	tei.hdr = &mvi->slot[tag];
783*4882a593Smuzhiyun 	tei.tag = tag;
784*4882a593Smuzhiyun 	tei.n_elem = n_elem;
785*4882a593Smuzhiyun 	switch (task->task_proto) {
786*4882a593Smuzhiyun 	case SAS_PROTOCOL_SMP:
787*4882a593Smuzhiyun 		rc = mvs_task_prep_smp(mvi, &tei);
788*4882a593Smuzhiyun 		break;
789*4882a593Smuzhiyun 	case SAS_PROTOCOL_SSP:
790*4882a593Smuzhiyun 		rc = mvs_task_prep_ssp(mvi, &tei, is_tmf, tmf);
791*4882a593Smuzhiyun 		break;
792*4882a593Smuzhiyun 	case SAS_PROTOCOL_SATA:
793*4882a593Smuzhiyun 	case SAS_PROTOCOL_STP:
794*4882a593Smuzhiyun 	case SAS_PROTOCOL_SATA | SAS_PROTOCOL_STP:
795*4882a593Smuzhiyun 		rc = mvs_task_prep_ata(mvi, &tei);
796*4882a593Smuzhiyun 		break;
797*4882a593Smuzhiyun 	default:
798*4882a593Smuzhiyun 		dev_printk(KERN_ERR, mvi->dev,
799*4882a593Smuzhiyun 			"unknown sas_task proto: 0x%x\n",
800*4882a593Smuzhiyun 			task->task_proto);
801*4882a593Smuzhiyun 		rc = -EINVAL;
802*4882a593Smuzhiyun 		break;
803*4882a593Smuzhiyun 	}
804*4882a593Smuzhiyun 
805*4882a593Smuzhiyun 	if (rc) {
806*4882a593Smuzhiyun 		mv_dprintk("rc is %x\n", rc);
807*4882a593Smuzhiyun 		goto err_out_slot_buf;
808*4882a593Smuzhiyun 	}
809*4882a593Smuzhiyun 	slot->task = task;
810*4882a593Smuzhiyun 	slot->port = tei.port;
811*4882a593Smuzhiyun 	task->lldd_task = slot;
812*4882a593Smuzhiyun 	list_add_tail(&slot->entry, &tei.port->list);
813*4882a593Smuzhiyun 	spin_lock(&task->task_state_lock);
814*4882a593Smuzhiyun 	task->task_state_flags |= SAS_TASK_AT_INITIATOR;
815*4882a593Smuzhiyun 	spin_unlock(&task->task_state_lock);
816*4882a593Smuzhiyun 
817*4882a593Smuzhiyun 	mvi_dev->running_req++;
818*4882a593Smuzhiyun 	++(*pass);
819*4882a593Smuzhiyun 	mvi->tx_prod = (mvi->tx_prod + 1) & (MVS_CHIP_SLOT_SZ - 1);
820*4882a593Smuzhiyun 
821*4882a593Smuzhiyun 	return rc;
822*4882a593Smuzhiyun 
823*4882a593Smuzhiyun err_out_slot_buf:
824*4882a593Smuzhiyun 	dma_pool_free(mvi->dma_pool, slot->buf, slot->buf_dma);
825*4882a593Smuzhiyun err_out_tag:
826*4882a593Smuzhiyun 	mvs_tag_free(mvi, tag);
827*4882a593Smuzhiyun err_out:
828*4882a593Smuzhiyun 
829*4882a593Smuzhiyun 	dev_printk(KERN_ERR, mvi->dev, "mvsas prep failed[%d]!\n", rc);
830*4882a593Smuzhiyun 	if (!sas_protocol_ata(task->task_proto))
831*4882a593Smuzhiyun 		if (n_elem)
832*4882a593Smuzhiyun 			dma_unmap_sg(mvi->dev, task->scatter, n_elem,
833*4882a593Smuzhiyun 				     task->data_dir);
834*4882a593Smuzhiyun prep_out:
835*4882a593Smuzhiyun 	return rc;
836*4882a593Smuzhiyun }
837*4882a593Smuzhiyun 
mvs_task_exec(struct sas_task * task,gfp_t gfp_flags,struct completion * completion,int is_tmf,struct mvs_tmf_task * tmf)838*4882a593Smuzhiyun static int mvs_task_exec(struct sas_task *task, gfp_t gfp_flags,
839*4882a593Smuzhiyun 				struct completion *completion, int is_tmf,
840*4882a593Smuzhiyun 				struct mvs_tmf_task *tmf)
841*4882a593Smuzhiyun {
842*4882a593Smuzhiyun 	struct mvs_info *mvi = NULL;
843*4882a593Smuzhiyun 	u32 rc = 0;
844*4882a593Smuzhiyun 	u32 pass = 0;
845*4882a593Smuzhiyun 	unsigned long flags = 0;
846*4882a593Smuzhiyun 
847*4882a593Smuzhiyun 	mvi = ((struct mvs_device *)task->dev->lldd_dev)->mvi_info;
848*4882a593Smuzhiyun 
849*4882a593Smuzhiyun 	spin_lock_irqsave(&mvi->lock, flags);
850*4882a593Smuzhiyun 	rc = mvs_task_prep(task, mvi, is_tmf, tmf, &pass);
851*4882a593Smuzhiyun 	if (rc)
852*4882a593Smuzhiyun 		dev_printk(KERN_ERR, mvi->dev, "mvsas exec failed[%d]!\n", rc);
853*4882a593Smuzhiyun 
854*4882a593Smuzhiyun 	if (likely(pass))
855*4882a593Smuzhiyun 			MVS_CHIP_DISP->start_delivery(mvi, (mvi->tx_prod - 1) &
856*4882a593Smuzhiyun 				(MVS_CHIP_SLOT_SZ - 1));
857*4882a593Smuzhiyun 	spin_unlock_irqrestore(&mvi->lock, flags);
858*4882a593Smuzhiyun 
859*4882a593Smuzhiyun 	return rc;
860*4882a593Smuzhiyun }
861*4882a593Smuzhiyun 
mvs_queue_command(struct sas_task * task,gfp_t gfp_flags)862*4882a593Smuzhiyun int mvs_queue_command(struct sas_task *task, gfp_t gfp_flags)
863*4882a593Smuzhiyun {
864*4882a593Smuzhiyun 	return mvs_task_exec(task, gfp_flags, NULL, 0, NULL);
865*4882a593Smuzhiyun }
866*4882a593Smuzhiyun 
mvs_slot_free(struct mvs_info * mvi,u32 rx_desc)867*4882a593Smuzhiyun static void mvs_slot_free(struct mvs_info *mvi, u32 rx_desc)
868*4882a593Smuzhiyun {
869*4882a593Smuzhiyun 	u32 slot_idx = rx_desc & RXQ_SLOT_MASK;
870*4882a593Smuzhiyun 	mvs_tag_clear(mvi, slot_idx);
871*4882a593Smuzhiyun }
872*4882a593Smuzhiyun 
mvs_slot_task_free(struct mvs_info * mvi,struct sas_task * task,struct mvs_slot_info * slot,u32 slot_idx)873*4882a593Smuzhiyun static void mvs_slot_task_free(struct mvs_info *mvi, struct sas_task *task,
874*4882a593Smuzhiyun 			  struct mvs_slot_info *slot, u32 slot_idx)
875*4882a593Smuzhiyun {
876*4882a593Smuzhiyun 	if (!slot)
877*4882a593Smuzhiyun 		return;
878*4882a593Smuzhiyun 	if (!slot->task)
879*4882a593Smuzhiyun 		return;
880*4882a593Smuzhiyun 	if (!sas_protocol_ata(task->task_proto))
881*4882a593Smuzhiyun 		if (slot->n_elem)
882*4882a593Smuzhiyun 			dma_unmap_sg(mvi->dev, task->scatter,
883*4882a593Smuzhiyun 				     slot->n_elem, task->data_dir);
884*4882a593Smuzhiyun 
885*4882a593Smuzhiyun 	switch (task->task_proto) {
886*4882a593Smuzhiyun 	case SAS_PROTOCOL_SMP:
887*4882a593Smuzhiyun 		dma_unmap_sg(mvi->dev, &task->smp_task.smp_resp, 1,
888*4882a593Smuzhiyun 			     DMA_FROM_DEVICE);
889*4882a593Smuzhiyun 		dma_unmap_sg(mvi->dev, &task->smp_task.smp_req, 1,
890*4882a593Smuzhiyun 			     DMA_TO_DEVICE);
891*4882a593Smuzhiyun 		break;
892*4882a593Smuzhiyun 
893*4882a593Smuzhiyun 	case SAS_PROTOCOL_SATA:
894*4882a593Smuzhiyun 	case SAS_PROTOCOL_STP:
895*4882a593Smuzhiyun 	case SAS_PROTOCOL_SSP:
896*4882a593Smuzhiyun 	default:
897*4882a593Smuzhiyun 		/* do nothing */
898*4882a593Smuzhiyun 		break;
899*4882a593Smuzhiyun 	}
900*4882a593Smuzhiyun 
901*4882a593Smuzhiyun 	if (slot->buf) {
902*4882a593Smuzhiyun 		dma_pool_free(mvi->dma_pool, slot->buf, slot->buf_dma);
903*4882a593Smuzhiyun 		slot->buf = NULL;
904*4882a593Smuzhiyun 	}
905*4882a593Smuzhiyun 	list_del_init(&slot->entry);
906*4882a593Smuzhiyun 	task->lldd_task = NULL;
907*4882a593Smuzhiyun 	slot->task = NULL;
908*4882a593Smuzhiyun 	slot->port = NULL;
909*4882a593Smuzhiyun 	slot->slot_tag = 0xFFFFFFFF;
910*4882a593Smuzhiyun 	mvs_slot_free(mvi, slot_idx);
911*4882a593Smuzhiyun }
912*4882a593Smuzhiyun 
mvs_update_wideport(struct mvs_info * mvi,int phy_no)913*4882a593Smuzhiyun static void mvs_update_wideport(struct mvs_info *mvi, int phy_no)
914*4882a593Smuzhiyun {
915*4882a593Smuzhiyun 	struct mvs_phy *phy = &mvi->phy[phy_no];
916*4882a593Smuzhiyun 	struct mvs_port *port = phy->port;
917*4882a593Smuzhiyun 	int j, no;
918*4882a593Smuzhiyun 
919*4882a593Smuzhiyun 	for_each_phy(port->wide_port_phymap, j, no) {
920*4882a593Smuzhiyun 		if (j & 1) {
921*4882a593Smuzhiyun 			MVS_CHIP_DISP->write_port_cfg_addr(mvi, no,
922*4882a593Smuzhiyun 						PHYR_WIDE_PORT);
923*4882a593Smuzhiyun 			MVS_CHIP_DISP->write_port_cfg_data(mvi, no,
924*4882a593Smuzhiyun 						port->wide_port_phymap);
925*4882a593Smuzhiyun 		} else {
926*4882a593Smuzhiyun 			MVS_CHIP_DISP->write_port_cfg_addr(mvi, no,
927*4882a593Smuzhiyun 						PHYR_WIDE_PORT);
928*4882a593Smuzhiyun 			MVS_CHIP_DISP->write_port_cfg_data(mvi, no,
929*4882a593Smuzhiyun 						0);
930*4882a593Smuzhiyun 		}
931*4882a593Smuzhiyun 	}
932*4882a593Smuzhiyun }
933*4882a593Smuzhiyun 
mvs_is_phy_ready(struct mvs_info * mvi,int i)934*4882a593Smuzhiyun static u32 mvs_is_phy_ready(struct mvs_info *mvi, int i)
935*4882a593Smuzhiyun {
936*4882a593Smuzhiyun 	u32 tmp;
937*4882a593Smuzhiyun 	struct mvs_phy *phy = &mvi->phy[i];
938*4882a593Smuzhiyun 	struct mvs_port *port = phy->port;
939*4882a593Smuzhiyun 
940*4882a593Smuzhiyun 	tmp = MVS_CHIP_DISP->read_phy_ctl(mvi, i);
941*4882a593Smuzhiyun 	if ((tmp & PHY_READY_MASK) && !(phy->irq_status & PHYEV_POOF)) {
942*4882a593Smuzhiyun 		if (!port)
943*4882a593Smuzhiyun 			phy->phy_attached = 1;
944*4882a593Smuzhiyun 		return tmp;
945*4882a593Smuzhiyun 	}
946*4882a593Smuzhiyun 
947*4882a593Smuzhiyun 	if (port) {
948*4882a593Smuzhiyun 		if (phy->phy_type & PORT_TYPE_SAS) {
949*4882a593Smuzhiyun 			port->wide_port_phymap &= ~(1U << i);
950*4882a593Smuzhiyun 			if (!port->wide_port_phymap)
951*4882a593Smuzhiyun 				port->port_attached = 0;
952*4882a593Smuzhiyun 			mvs_update_wideport(mvi, i);
953*4882a593Smuzhiyun 		} else if (phy->phy_type & PORT_TYPE_SATA)
954*4882a593Smuzhiyun 			port->port_attached = 0;
955*4882a593Smuzhiyun 		phy->port = NULL;
956*4882a593Smuzhiyun 		phy->phy_attached = 0;
957*4882a593Smuzhiyun 		phy->phy_type &= ~(PORT_TYPE_SAS | PORT_TYPE_SATA);
958*4882a593Smuzhiyun 	}
959*4882a593Smuzhiyun 	return 0;
960*4882a593Smuzhiyun }
961*4882a593Smuzhiyun 
mvs_get_d2h_reg(struct mvs_info * mvi,int i,void * buf)962*4882a593Smuzhiyun static void *mvs_get_d2h_reg(struct mvs_info *mvi, int i, void *buf)
963*4882a593Smuzhiyun {
964*4882a593Smuzhiyun 	u32 *s = (u32 *) buf;
965*4882a593Smuzhiyun 
966*4882a593Smuzhiyun 	if (!s)
967*4882a593Smuzhiyun 		return NULL;
968*4882a593Smuzhiyun 
969*4882a593Smuzhiyun 	MVS_CHIP_DISP->write_port_cfg_addr(mvi, i, PHYR_SATA_SIG3);
970*4882a593Smuzhiyun 	s[3] = cpu_to_le32(MVS_CHIP_DISP->read_port_cfg_data(mvi, i));
971*4882a593Smuzhiyun 
972*4882a593Smuzhiyun 	MVS_CHIP_DISP->write_port_cfg_addr(mvi, i, PHYR_SATA_SIG2);
973*4882a593Smuzhiyun 	s[2] = cpu_to_le32(MVS_CHIP_DISP->read_port_cfg_data(mvi, i));
974*4882a593Smuzhiyun 
975*4882a593Smuzhiyun 	MVS_CHIP_DISP->write_port_cfg_addr(mvi, i, PHYR_SATA_SIG1);
976*4882a593Smuzhiyun 	s[1] = cpu_to_le32(MVS_CHIP_DISP->read_port_cfg_data(mvi, i));
977*4882a593Smuzhiyun 
978*4882a593Smuzhiyun 	MVS_CHIP_DISP->write_port_cfg_addr(mvi, i, PHYR_SATA_SIG0);
979*4882a593Smuzhiyun 	s[0] = cpu_to_le32(MVS_CHIP_DISP->read_port_cfg_data(mvi, i));
980*4882a593Smuzhiyun 
981*4882a593Smuzhiyun 	if (((s[1] & 0x00FFFFFF) == 0x00EB1401) && (*(u8 *)&s[3] == 0x01))
982*4882a593Smuzhiyun 		s[1] = 0x00EB1401 | (*((u8 *)&s[1] + 3) & 0x10);
983*4882a593Smuzhiyun 
984*4882a593Smuzhiyun 	return s;
985*4882a593Smuzhiyun }
986*4882a593Smuzhiyun 
mvs_is_sig_fis_received(u32 irq_status)987*4882a593Smuzhiyun static u32 mvs_is_sig_fis_received(u32 irq_status)
988*4882a593Smuzhiyun {
989*4882a593Smuzhiyun 	return irq_status & PHYEV_SIG_FIS;
990*4882a593Smuzhiyun }
991*4882a593Smuzhiyun 
mvs_sig_remove_timer(struct mvs_phy * phy)992*4882a593Smuzhiyun static void mvs_sig_remove_timer(struct mvs_phy *phy)
993*4882a593Smuzhiyun {
994*4882a593Smuzhiyun 	if (phy->timer.function)
995*4882a593Smuzhiyun 		del_timer(&phy->timer);
996*4882a593Smuzhiyun 	phy->timer.function = NULL;
997*4882a593Smuzhiyun }
998*4882a593Smuzhiyun 
mvs_update_phyinfo(struct mvs_info * mvi,int i,int get_st)999*4882a593Smuzhiyun void mvs_update_phyinfo(struct mvs_info *mvi, int i, int get_st)
1000*4882a593Smuzhiyun {
1001*4882a593Smuzhiyun 	struct mvs_phy *phy = &mvi->phy[i];
1002*4882a593Smuzhiyun 	struct sas_identify_frame *id;
1003*4882a593Smuzhiyun 
1004*4882a593Smuzhiyun 	id = (struct sas_identify_frame *)phy->frame_rcvd;
1005*4882a593Smuzhiyun 
1006*4882a593Smuzhiyun 	if (get_st) {
1007*4882a593Smuzhiyun 		phy->irq_status = MVS_CHIP_DISP->read_port_irq_stat(mvi, i);
1008*4882a593Smuzhiyun 		phy->phy_status = mvs_is_phy_ready(mvi, i);
1009*4882a593Smuzhiyun 	}
1010*4882a593Smuzhiyun 
1011*4882a593Smuzhiyun 	if (phy->phy_status) {
1012*4882a593Smuzhiyun 		int oob_done = 0;
1013*4882a593Smuzhiyun 		struct asd_sas_phy *sas_phy = &mvi->phy[i].sas_phy;
1014*4882a593Smuzhiyun 
1015*4882a593Smuzhiyun 		oob_done = MVS_CHIP_DISP->oob_done(mvi, i);
1016*4882a593Smuzhiyun 
1017*4882a593Smuzhiyun 		MVS_CHIP_DISP->fix_phy_info(mvi, i, id);
1018*4882a593Smuzhiyun 		if (phy->phy_type & PORT_TYPE_SATA) {
1019*4882a593Smuzhiyun 			phy->identify.target_port_protocols = SAS_PROTOCOL_STP;
1020*4882a593Smuzhiyun 			if (mvs_is_sig_fis_received(phy->irq_status)) {
1021*4882a593Smuzhiyun 				mvs_sig_remove_timer(phy);
1022*4882a593Smuzhiyun 				phy->phy_attached = 1;
1023*4882a593Smuzhiyun 				phy->att_dev_sas_addr =
1024*4882a593Smuzhiyun 					i + mvi->id * mvi->chip->n_phy;
1025*4882a593Smuzhiyun 				if (oob_done)
1026*4882a593Smuzhiyun 					sas_phy->oob_mode = SATA_OOB_MODE;
1027*4882a593Smuzhiyun 				phy->frame_rcvd_size =
1028*4882a593Smuzhiyun 				    sizeof(struct dev_to_host_fis);
1029*4882a593Smuzhiyun 				mvs_get_d2h_reg(mvi, i, id);
1030*4882a593Smuzhiyun 			} else {
1031*4882a593Smuzhiyun 				u32 tmp;
1032*4882a593Smuzhiyun 				dev_printk(KERN_DEBUG, mvi->dev,
1033*4882a593Smuzhiyun 					"Phy%d : No sig fis\n", i);
1034*4882a593Smuzhiyun 				tmp = MVS_CHIP_DISP->read_port_irq_mask(mvi, i);
1035*4882a593Smuzhiyun 				MVS_CHIP_DISP->write_port_irq_mask(mvi, i,
1036*4882a593Smuzhiyun 						tmp | PHYEV_SIG_FIS);
1037*4882a593Smuzhiyun 				phy->phy_attached = 0;
1038*4882a593Smuzhiyun 				phy->phy_type &= ~PORT_TYPE_SATA;
1039*4882a593Smuzhiyun 				goto out_done;
1040*4882a593Smuzhiyun 			}
1041*4882a593Smuzhiyun 		}	else if (phy->phy_type & PORT_TYPE_SAS
1042*4882a593Smuzhiyun 			|| phy->att_dev_info & PORT_SSP_INIT_MASK) {
1043*4882a593Smuzhiyun 			phy->phy_attached = 1;
1044*4882a593Smuzhiyun 			phy->identify.device_type =
1045*4882a593Smuzhiyun 				phy->att_dev_info & PORT_DEV_TYPE_MASK;
1046*4882a593Smuzhiyun 
1047*4882a593Smuzhiyun 			if (phy->identify.device_type == SAS_END_DEVICE)
1048*4882a593Smuzhiyun 				phy->identify.target_port_protocols =
1049*4882a593Smuzhiyun 							SAS_PROTOCOL_SSP;
1050*4882a593Smuzhiyun 			else if (phy->identify.device_type != SAS_PHY_UNUSED)
1051*4882a593Smuzhiyun 				phy->identify.target_port_protocols =
1052*4882a593Smuzhiyun 							SAS_PROTOCOL_SMP;
1053*4882a593Smuzhiyun 			if (oob_done)
1054*4882a593Smuzhiyun 				sas_phy->oob_mode = SAS_OOB_MODE;
1055*4882a593Smuzhiyun 			phy->frame_rcvd_size =
1056*4882a593Smuzhiyun 			    sizeof(struct sas_identify_frame);
1057*4882a593Smuzhiyun 		}
1058*4882a593Smuzhiyun 		memcpy(sas_phy->attached_sas_addr,
1059*4882a593Smuzhiyun 			&phy->att_dev_sas_addr, SAS_ADDR_SIZE);
1060*4882a593Smuzhiyun 
1061*4882a593Smuzhiyun 		if (MVS_CHIP_DISP->phy_work_around)
1062*4882a593Smuzhiyun 			MVS_CHIP_DISP->phy_work_around(mvi, i);
1063*4882a593Smuzhiyun 	}
1064*4882a593Smuzhiyun 	mv_dprintk("phy %d attach dev info is %x\n",
1065*4882a593Smuzhiyun 		i + mvi->id * mvi->chip->n_phy, phy->att_dev_info);
1066*4882a593Smuzhiyun 	mv_dprintk("phy %d attach sas addr is %llx\n",
1067*4882a593Smuzhiyun 		i + mvi->id * mvi->chip->n_phy, phy->att_dev_sas_addr);
1068*4882a593Smuzhiyun out_done:
1069*4882a593Smuzhiyun 	if (get_st)
1070*4882a593Smuzhiyun 		MVS_CHIP_DISP->write_port_irq_stat(mvi, i, phy->irq_status);
1071*4882a593Smuzhiyun }
1072*4882a593Smuzhiyun 
mvs_port_notify_formed(struct asd_sas_phy * sas_phy,int lock)1073*4882a593Smuzhiyun static void mvs_port_notify_formed(struct asd_sas_phy *sas_phy, int lock)
1074*4882a593Smuzhiyun {
1075*4882a593Smuzhiyun 	struct sas_ha_struct *sas_ha = sas_phy->ha;
1076*4882a593Smuzhiyun 	struct mvs_info *mvi = NULL; int i = 0, hi;
1077*4882a593Smuzhiyun 	struct mvs_phy *phy = sas_phy->lldd_phy;
1078*4882a593Smuzhiyun 	struct asd_sas_port *sas_port = sas_phy->port;
1079*4882a593Smuzhiyun 	struct mvs_port *port;
1080*4882a593Smuzhiyun 	unsigned long flags = 0;
1081*4882a593Smuzhiyun 	if (!sas_port)
1082*4882a593Smuzhiyun 		return;
1083*4882a593Smuzhiyun 
1084*4882a593Smuzhiyun 	while (sas_ha->sas_phy[i]) {
1085*4882a593Smuzhiyun 		if (sas_ha->sas_phy[i] == sas_phy)
1086*4882a593Smuzhiyun 			break;
1087*4882a593Smuzhiyun 		i++;
1088*4882a593Smuzhiyun 	}
1089*4882a593Smuzhiyun 	hi = i/((struct mvs_prv_info *)sas_ha->lldd_ha)->n_phy;
1090*4882a593Smuzhiyun 	mvi = ((struct mvs_prv_info *)sas_ha->lldd_ha)->mvi[hi];
1091*4882a593Smuzhiyun 	if (i >= mvi->chip->n_phy)
1092*4882a593Smuzhiyun 		port = &mvi->port[i - mvi->chip->n_phy];
1093*4882a593Smuzhiyun 	else
1094*4882a593Smuzhiyun 		port = &mvi->port[i];
1095*4882a593Smuzhiyun 	if (lock)
1096*4882a593Smuzhiyun 		spin_lock_irqsave(&mvi->lock, flags);
1097*4882a593Smuzhiyun 	port->port_attached = 1;
1098*4882a593Smuzhiyun 	phy->port = port;
1099*4882a593Smuzhiyun 	sas_port->lldd_port = port;
1100*4882a593Smuzhiyun 	if (phy->phy_type & PORT_TYPE_SAS) {
1101*4882a593Smuzhiyun 		port->wide_port_phymap = sas_port->phy_mask;
1102*4882a593Smuzhiyun 		mv_printk("set wide port phy map %x\n", sas_port->phy_mask);
1103*4882a593Smuzhiyun 		mvs_update_wideport(mvi, sas_phy->id);
1104*4882a593Smuzhiyun 
1105*4882a593Smuzhiyun 		/* direct attached SAS device */
1106*4882a593Smuzhiyun 		if (phy->att_dev_info & PORT_SSP_TRGT_MASK) {
1107*4882a593Smuzhiyun 			MVS_CHIP_DISP->write_port_cfg_addr(mvi, i, PHYR_PHY_STAT);
1108*4882a593Smuzhiyun 			MVS_CHIP_DISP->write_port_cfg_data(mvi, i, 0x04);
1109*4882a593Smuzhiyun 		}
1110*4882a593Smuzhiyun 	}
1111*4882a593Smuzhiyun 	if (lock)
1112*4882a593Smuzhiyun 		spin_unlock_irqrestore(&mvi->lock, flags);
1113*4882a593Smuzhiyun }
1114*4882a593Smuzhiyun 
mvs_port_notify_deformed(struct asd_sas_phy * sas_phy,int lock)1115*4882a593Smuzhiyun static void mvs_port_notify_deformed(struct asd_sas_phy *sas_phy, int lock)
1116*4882a593Smuzhiyun {
1117*4882a593Smuzhiyun 	struct domain_device *dev;
1118*4882a593Smuzhiyun 	struct mvs_phy *phy = sas_phy->lldd_phy;
1119*4882a593Smuzhiyun 	struct mvs_info *mvi = phy->mvi;
1120*4882a593Smuzhiyun 	struct asd_sas_port *port = sas_phy->port;
1121*4882a593Smuzhiyun 	int phy_no = 0;
1122*4882a593Smuzhiyun 
1123*4882a593Smuzhiyun 	while (phy != &mvi->phy[phy_no]) {
1124*4882a593Smuzhiyun 		phy_no++;
1125*4882a593Smuzhiyun 		if (phy_no >= MVS_MAX_PHYS)
1126*4882a593Smuzhiyun 			return;
1127*4882a593Smuzhiyun 	}
1128*4882a593Smuzhiyun 	list_for_each_entry(dev, &port->dev_list, dev_list_node)
1129*4882a593Smuzhiyun 		mvs_do_release_task(phy->mvi, phy_no, dev);
1130*4882a593Smuzhiyun 
1131*4882a593Smuzhiyun }
1132*4882a593Smuzhiyun 
1133*4882a593Smuzhiyun 
mvs_port_formed(struct asd_sas_phy * sas_phy)1134*4882a593Smuzhiyun void mvs_port_formed(struct asd_sas_phy *sas_phy)
1135*4882a593Smuzhiyun {
1136*4882a593Smuzhiyun 	mvs_port_notify_formed(sas_phy, 1);
1137*4882a593Smuzhiyun }
1138*4882a593Smuzhiyun 
mvs_port_deformed(struct asd_sas_phy * sas_phy)1139*4882a593Smuzhiyun void mvs_port_deformed(struct asd_sas_phy *sas_phy)
1140*4882a593Smuzhiyun {
1141*4882a593Smuzhiyun 	mvs_port_notify_deformed(sas_phy, 1);
1142*4882a593Smuzhiyun }
1143*4882a593Smuzhiyun 
mvs_alloc_dev(struct mvs_info * mvi)1144*4882a593Smuzhiyun static struct mvs_device *mvs_alloc_dev(struct mvs_info *mvi)
1145*4882a593Smuzhiyun {
1146*4882a593Smuzhiyun 	u32 dev;
1147*4882a593Smuzhiyun 	for (dev = 0; dev < MVS_MAX_DEVICES; dev++) {
1148*4882a593Smuzhiyun 		if (mvi->devices[dev].dev_type == SAS_PHY_UNUSED) {
1149*4882a593Smuzhiyun 			mvi->devices[dev].device_id = dev;
1150*4882a593Smuzhiyun 			return &mvi->devices[dev];
1151*4882a593Smuzhiyun 		}
1152*4882a593Smuzhiyun 	}
1153*4882a593Smuzhiyun 
1154*4882a593Smuzhiyun 	if (dev == MVS_MAX_DEVICES)
1155*4882a593Smuzhiyun 		mv_printk("max support %d devices, ignore ..\n",
1156*4882a593Smuzhiyun 			MVS_MAX_DEVICES);
1157*4882a593Smuzhiyun 
1158*4882a593Smuzhiyun 	return NULL;
1159*4882a593Smuzhiyun }
1160*4882a593Smuzhiyun 
mvs_free_dev(struct mvs_device * mvi_dev)1161*4882a593Smuzhiyun static void mvs_free_dev(struct mvs_device *mvi_dev)
1162*4882a593Smuzhiyun {
1163*4882a593Smuzhiyun 	u32 id = mvi_dev->device_id;
1164*4882a593Smuzhiyun 	memset(mvi_dev, 0, sizeof(*mvi_dev));
1165*4882a593Smuzhiyun 	mvi_dev->device_id = id;
1166*4882a593Smuzhiyun 	mvi_dev->dev_type = SAS_PHY_UNUSED;
1167*4882a593Smuzhiyun 	mvi_dev->dev_status = MVS_DEV_NORMAL;
1168*4882a593Smuzhiyun 	mvi_dev->taskfileset = MVS_ID_NOT_MAPPED;
1169*4882a593Smuzhiyun }
1170*4882a593Smuzhiyun 
mvs_dev_found_notify(struct domain_device * dev,int lock)1171*4882a593Smuzhiyun static int mvs_dev_found_notify(struct domain_device *dev, int lock)
1172*4882a593Smuzhiyun {
1173*4882a593Smuzhiyun 	unsigned long flags = 0;
1174*4882a593Smuzhiyun 	int res = 0;
1175*4882a593Smuzhiyun 	struct mvs_info *mvi = NULL;
1176*4882a593Smuzhiyun 	struct domain_device *parent_dev = dev->parent;
1177*4882a593Smuzhiyun 	struct mvs_device *mvi_device;
1178*4882a593Smuzhiyun 
1179*4882a593Smuzhiyun 	mvi = mvs_find_dev_mvi(dev);
1180*4882a593Smuzhiyun 
1181*4882a593Smuzhiyun 	if (lock)
1182*4882a593Smuzhiyun 		spin_lock_irqsave(&mvi->lock, flags);
1183*4882a593Smuzhiyun 
1184*4882a593Smuzhiyun 	mvi_device = mvs_alloc_dev(mvi);
1185*4882a593Smuzhiyun 	if (!mvi_device) {
1186*4882a593Smuzhiyun 		res = -1;
1187*4882a593Smuzhiyun 		goto found_out;
1188*4882a593Smuzhiyun 	}
1189*4882a593Smuzhiyun 	dev->lldd_dev = mvi_device;
1190*4882a593Smuzhiyun 	mvi_device->dev_status = MVS_DEV_NORMAL;
1191*4882a593Smuzhiyun 	mvi_device->dev_type = dev->dev_type;
1192*4882a593Smuzhiyun 	mvi_device->mvi_info = mvi;
1193*4882a593Smuzhiyun 	mvi_device->sas_device = dev;
1194*4882a593Smuzhiyun 	if (parent_dev && dev_is_expander(parent_dev->dev_type)) {
1195*4882a593Smuzhiyun 		int phy_id;
1196*4882a593Smuzhiyun 		u8 phy_num = parent_dev->ex_dev.num_phys;
1197*4882a593Smuzhiyun 		struct ex_phy *phy;
1198*4882a593Smuzhiyun 		for (phy_id = 0; phy_id < phy_num; phy_id++) {
1199*4882a593Smuzhiyun 			phy = &parent_dev->ex_dev.ex_phy[phy_id];
1200*4882a593Smuzhiyun 			if (SAS_ADDR(phy->attached_sas_addr) ==
1201*4882a593Smuzhiyun 				SAS_ADDR(dev->sas_addr)) {
1202*4882a593Smuzhiyun 				mvi_device->attached_phy = phy_id;
1203*4882a593Smuzhiyun 				break;
1204*4882a593Smuzhiyun 			}
1205*4882a593Smuzhiyun 		}
1206*4882a593Smuzhiyun 
1207*4882a593Smuzhiyun 		if (phy_id == phy_num) {
1208*4882a593Smuzhiyun 			mv_printk("Error: no attached dev:%016llx"
1209*4882a593Smuzhiyun 				"at ex:%016llx.\n",
1210*4882a593Smuzhiyun 				SAS_ADDR(dev->sas_addr),
1211*4882a593Smuzhiyun 				SAS_ADDR(parent_dev->sas_addr));
1212*4882a593Smuzhiyun 			res = -1;
1213*4882a593Smuzhiyun 		}
1214*4882a593Smuzhiyun 	}
1215*4882a593Smuzhiyun 
1216*4882a593Smuzhiyun found_out:
1217*4882a593Smuzhiyun 	if (lock)
1218*4882a593Smuzhiyun 		spin_unlock_irqrestore(&mvi->lock, flags);
1219*4882a593Smuzhiyun 	return res;
1220*4882a593Smuzhiyun }
1221*4882a593Smuzhiyun 
mvs_dev_found(struct domain_device * dev)1222*4882a593Smuzhiyun int mvs_dev_found(struct domain_device *dev)
1223*4882a593Smuzhiyun {
1224*4882a593Smuzhiyun 	return mvs_dev_found_notify(dev, 1);
1225*4882a593Smuzhiyun }
1226*4882a593Smuzhiyun 
mvs_dev_gone_notify(struct domain_device * dev)1227*4882a593Smuzhiyun static void mvs_dev_gone_notify(struct domain_device *dev)
1228*4882a593Smuzhiyun {
1229*4882a593Smuzhiyun 	unsigned long flags = 0;
1230*4882a593Smuzhiyun 	struct mvs_device *mvi_dev = dev->lldd_dev;
1231*4882a593Smuzhiyun 	struct mvs_info *mvi;
1232*4882a593Smuzhiyun 
1233*4882a593Smuzhiyun 	if (!mvi_dev) {
1234*4882a593Smuzhiyun 		mv_dprintk("found dev has gone.\n");
1235*4882a593Smuzhiyun 		return;
1236*4882a593Smuzhiyun 	}
1237*4882a593Smuzhiyun 
1238*4882a593Smuzhiyun 	mvi = mvi_dev->mvi_info;
1239*4882a593Smuzhiyun 
1240*4882a593Smuzhiyun 	spin_lock_irqsave(&mvi->lock, flags);
1241*4882a593Smuzhiyun 
1242*4882a593Smuzhiyun 	mv_dprintk("found dev[%d:%x] is gone.\n",
1243*4882a593Smuzhiyun 		mvi_dev->device_id, mvi_dev->dev_type);
1244*4882a593Smuzhiyun 	mvs_release_task(mvi, dev);
1245*4882a593Smuzhiyun 	mvs_free_reg_set(mvi, mvi_dev);
1246*4882a593Smuzhiyun 	mvs_free_dev(mvi_dev);
1247*4882a593Smuzhiyun 
1248*4882a593Smuzhiyun 	dev->lldd_dev = NULL;
1249*4882a593Smuzhiyun 	mvi_dev->sas_device = NULL;
1250*4882a593Smuzhiyun 
1251*4882a593Smuzhiyun 	spin_unlock_irqrestore(&mvi->lock, flags);
1252*4882a593Smuzhiyun }
1253*4882a593Smuzhiyun 
1254*4882a593Smuzhiyun 
mvs_dev_gone(struct domain_device * dev)1255*4882a593Smuzhiyun void mvs_dev_gone(struct domain_device *dev)
1256*4882a593Smuzhiyun {
1257*4882a593Smuzhiyun 	mvs_dev_gone_notify(dev);
1258*4882a593Smuzhiyun }
1259*4882a593Smuzhiyun 
mvs_task_done(struct sas_task * task)1260*4882a593Smuzhiyun static void mvs_task_done(struct sas_task *task)
1261*4882a593Smuzhiyun {
1262*4882a593Smuzhiyun 	if (!del_timer(&task->slow_task->timer))
1263*4882a593Smuzhiyun 		return;
1264*4882a593Smuzhiyun 	complete(&task->slow_task->completion);
1265*4882a593Smuzhiyun }
1266*4882a593Smuzhiyun 
mvs_tmf_timedout(struct timer_list * t)1267*4882a593Smuzhiyun static void mvs_tmf_timedout(struct timer_list *t)
1268*4882a593Smuzhiyun {
1269*4882a593Smuzhiyun 	struct sas_task_slow *slow = from_timer(slow, t, timer);
1270*4882a593Smuzhiyun 	struct sas_task *task = slow->task;
1271*4882a593Smuzhiyun 
1272*4882a593Smuzhiyun 	task->task_state_flags |= SAS_TASK_STATE_ABORTED;
1273*4882a593Smuzhiyun 	complete(&task->slow_task->completion);
1274*4882a593Smuzhiyun }
1275*4882a593Smuzhiyun 
1276*4882a593Smuzhiyun #define MVS_TASK_TIMEOUT 20
mvs_exec_internal_tmf_task(struct domain_device * dev,void * parameter,u32 para_len,struct mvs_tmf_task * tmf)1277*4882a593Smuzhiyun static int mvs_exec_internal_tmf_task(struct domain_device *dev,
1278*4882a593Smuzhiyun 			void *parameter, u32 para_len, struct mvs_tmf_task *tmf)
1279*4882a593Smuzhiyun {
1280*4882a593Smuzhiyun 	int res, retry;
1281*4882a593Smuzhiyun 	struct sas_task *task = NULL;
1282*4882a593Smuzhiyun 
1283*4882a593Smuzhiyun 	for (retry = 0; retry < 3; retry++) {
1284*4882a593Smuzhiyun 		task = sas_alloc_slow_task(GFP_KERNEL);
1285*4882a593Smuzhiyun 		if (!task)
1286*4882a593Smuzhiyun 			return -ENOMEM;
1287*4882a593Smuzhiyun 
1288*4882a593Smuzhiyun 		task->dev = dev;
1289*4882a593Smuzhiyun 		task->task_proto = dev->tproto;
1290*4882a593Smuzhiyun 
1291*4882a593Smuzhiyun 		memcpy(&task->ssp_task, parameter, para_len);
1292*4882a593Smuzhiyun 		task->task_done = mvs_task_done;
1293*4882a593Smuzhiyun 
1294*4882a593Smuzhiyun 		task->slow_task->timer.function = mvs_tmf_timedout;
1295*4882a593Smuzhiyun 		task->slow_task->timer.expires = jiffies + MVS_TASK_TIMEOUT*HZ;
1296*4882a593Smuzhiyun 		add_timer(&task->slow_task->timer);
1297*4882a593Smuzhiyun 
1298*4882a593Smuzhiyun 		res = mvs_task_exec(task, GFP_KERNEL, NULL, 1, tmf);
1299*4882a593Smuzhiyun 
1300*4882a593Smuzhiyun 		if (res) {
1301*4882a593Smuzhiyun 			del_timer(&task->slow_task->timer);
1302*4882a593Smuzhiyun 			mv_printk("executing internal task failed:%d\n", res);
1303*4882a593Smuzhiyun 			goto ex_err;
1304*4882a593Smuzhiyun 		}
1305*4882a593Smuzhiyun 
1306*4882a593Smuzhiyun 		wait_for_completion(&task->slow_task->completion);
1307*4882a593Smuzhiyun 		res = TMF_RESP_FUNC_FAILED;
1308*4882a593Smuzhiyun 		/* Even TMF timed out, return direct. */
1309*4882a593Smuzhiyun 		if ((task->task_state_flags & SAS_TASK_STATE_ABORTED)) {
1310*4882a593Smuzhiyun 			if (!(task->task_state_flags & SAS_TASK_STATE_DONE)) {
1311*4882a593Smuzhiyun 				mv_printk("TMF task[%x] timeout.\n", tmf->tmf);
1312*4882a593Smuzhiyun 				goto ex_err;
1313*4882a593Smuzhiyun 			}
1314*4882a593Smuzhiyun 		}
1315*4882a593Smuzhiyun 
1316*4882a593Smuzhiyun 		if (task->task_status.resp == SAS_TASK_COMPLETE &&
1317*4882a593Smuzhiyun 		    task->task_status.stat == SAM_STAT_GOOD) {
1318*4882a593Smuzhiyun 			res = TMF_RESP_FUNC_COMPLETE;
1319*4882a593Smuzhiyun 			break;
1320*4882a593Smuzhiyun 		}
1321*4882a593Smuzhiyun 
1322*4882a593Smuzhiyun 		if (task->task_status.resp == SAS_TASK_COMPLETE &&
1323*4882a593Smuzhiyun 		      task->task_status.stat == SAS_DATA_UNDERRUN) {
1324*4882a593Smuzhiyun 			/* no error, but return the number of bytes of
1325*4882a593Smuzhiyun 			 * underrun */
1326*4882a593Smuzhiyun 			res = task->task_status.residual;
1327*4882a593Smuzhiyun 			break;
1328*4882a593Smuzhiyun 		}
1329*4882a593Smuzhiyun 
1330*4882a593Smuzhiyun 		if (task->task_status.resp == SAS_TASK_COMPLETE &&
1331*4882a593Smuzhiyun 		      task->task_status.stat == SAS_DATA_OVERRUN) {
1332*4882a593Smuzhiyun 			mv_dprintk("blocked task error.\n");
1333*4882a593Smuzhiyun 			res = -EMSGSIZE;
1334*4882a593Smuzhiyun 			break;
1335*4882a593Smuzhiyun 		} else {
1336*4882a593Smuzhiyun 			mv_dprintk(" task to dev %016llx response: 0x%x "
1337*4882a593Smuzhiyun 				    "status 0x%x\n",
1338*4882a593Smuzhiyun 				    SAS_ADDR(dev->sas_addr),
1339*4882a593Smuzhiyun 				    task->task_status.resp,
1340*4882a593Smuzhiyun 				    task->task_status.stat);
1341*4882a593Smuzhiyun 			sas_free_task(task);
1342*4882a593Smuzhiyun 			task = NULL;
1343*4882a593Smuzhiyun 
1344*4882a593Smuzhiyun 		}
1345*4882a593Smuzhiyun 	}
1346*4882a593Smuzhiyun ex_err:
1347*4882a593Smuzhiyun 	BUG_ON(retry == 3 && task != NULL);
1348*4882a593Smuzhiyun 	sas_free_task(task);
1349*4882a593Smuzhiyun 	return res;
1350*4882a593Smuzhiyun }
1351*4882a593Smuzhiyun 
mvs_debug_issue_ssp_tmf(struct domain_device * dev,u8 * lun,struct mvs_tmf_task * tmf)1352*4882a593Smuzhiyun static int mvs_debug_issue_ssp_tmf(struct domain_device *dev,
1353*4882a593Smuzhiyun 				u8 *lun, struct mvs_tmf_task *tmf)
1354*4882a593Smuzhiyun {
1355*4882a593Smuzhiyun 	struct sas_ssp_task ssp_task;
1356*4882a593Smuzhiyun 	if (!(dev->tproto & SAS_PROTOCOL_SSP))
1357*4882a593Smuzhiyun 		return TMF_RESP_FUNC_ESUPP;
1358*4882a593Smuzhiyun 
1359*4882a593Smuzhiyun 	memcpy(ssp_task.LUN, lun, 8);
1360*4882a593Smuzhiyun 
1361*4882a593Smuzhiyun 	return mvs_exec_internal_tmf_task(dev, &ssp_task,
1362*4882a593Smuzhiyun 				sizeof(ssp_task), tmf);
1363*4882a593Smuzhiyun }
1364*4882a593Smuzhiyun 
1365*4882a593Smuzhiyun 
1366*4882a593Smuzhiyun /*  Standard mandates link reset for ATA  (type 0)
1367*4882a593Smuzhiyun     and hard reset for SSP (type 1) , only for RECOVERY */
mvs_debug_I_T_nexus_reset(struct domain_device * dev)1368*4882a593Smuzhiyun static int mvs_debug_I_T_nexus_reset(struct domain_device *dev)
1369*4882a593Smuzhiyun {
1370*4882a593Smuzhiyun 	int rc;
1371*4882a593Smuzhiyun 	struct sas_phy *phy = sas_get_local_phy(dev);
1372*4882a593Smuzhiyun 	int reset_type = (dev->dev_type == SAS_SATA_DEV ||
1373*4882a593Smuzhiyun 			(dev->tproto & SAS_PROTOCOL_STP)) ? 0 : 1;
1374*4882a593Smuzhiyun 	rc = sas_phy_reset(phy, reset_type);
1375*4882a593Smuzhiyun 	sas_put_local_phy(phy);
1376*4882a593Smuzhiyun 	msleep(2000);
1377*4882a593Smuzhiyun 	return rc;
1378*4882a593Smuzhiyun }
1379*4882a593Smuzhiyun 
1380*4882a593Smuzhiyun /* mandatory SAM-3 */
mvs_lu_reset(struct domain_device * dev,u8 * lun)1381*4882a593Smuzhiyun int mvs_lu_reset(struct domain_device *dev, u8 *lun)
1382*4882a593Smuzhiyun {
1383*4882a593Smuzhiyun 	unsigned long flags;
1384*4882a593Smuzhiyun 	int rc = TMF_RESP_FUNC_FAILED;
1385*4882a593Smuzhiyun 	struct mvs_tmf_task tmf_task;
1386*4882a593Smuzhiyun 	struct mvs_device * mvi_dev = dev->lldd_dev;
1387*4882a593Smuzhiyun 	struct mvs_info *mvi = mvi_dev->mvi_info;
1388*4882a593Smuzhiyun 
1389*4882a593Smuzhiyun 	tmf_task.tmf = TMF_LU_RESET;
1390*4882a593Smuzhiyun 	mvi_dev->dev_status = MVS_DEV_EH;
1391*4882a593Smuzhiyun 	rc = mvs_debug_issue_ssp_tmf(dev, lun, &tmf_task);
1392*4882a593Smuzhiyun 	if (rc == TMF_RESP_FUNC_COMPLETE) {
1393*4882a593Smuzhiyun 		spin_lock_irqsave(&mvi->lock, flags);
1394*4882a593Smuzhiyun 		mvs_release_task(mvi, dev);
1395*4882a593Smuzhiyun 		spin_unlock_irqrestore(&mvi->lock, flags);
1396*4882a593Smuzhiyun 	}
1397*4882a593Smuzhiyun 	/* If failed, fall-through I_T_Nexus reset */
1398*4882a593Smuzhiyun 	mv_printk("%s for device[%x]:rc= %d\n", __func__,
1399*4882a593Smuzhiyun 			mvi_dev->device_id, rc);
1400*4882a593Smuzhiyun 	return rc;
1401*4882a593Smuzhiyun }
1402*4882a593Smuzhiyun 
mvs_I_T_nexus_reset(struct domain_device * dev)1403*4882a593Smuzhiyun int mvs_I_T_nexus_reset(struct domain_device *dev)
1404*4882a593Smuzhiyun {
1405*4882a593Smuzhiyun 	unsigned long flags;
1406*4882a593Smuzhiyun 	int rc = TMF_RESP_FUNC_FAILED;
1407*4882a593Smuzhiyun 	struct mvs_device *mvi_dev = (struct mvs_device *)dev->lldd_dev;
1408*4882a593Smuzhiyun 	struct mvs_info *mvi = mvi_dev->mvi_info;
1409*4882a593Smuzhiyun 
1410*4882a593Smuzhiyun 	if (mvi_dev->dev_status != MVS_DEV_EH)
1411*4882a593Smuzhiyun 		return TMF_RESP_FUNC_COMPLETE;
1412*4882a593Smuzhiyun 	else
1413*4882a593Smuzhiyun 		mvi_dev->dev_status = MVS_DEV_NORMAL;
1414*4882a593Smuzhiyun 	rc = mvs_debug_I_T_nexus_reset(dev);
1415*4882a593Smuzhiyun 	mv_printk("%s for device[%x]:rc= %d\n",
1416*4882a593Smuzhiyun 		__func__, mvi_dev->device_id, rc);
1417*4882a593Smuzhiyun 
1418*4882a593Smuzhiyun 	spin_lock_irqsave(&mvi->lock, flags);
1419*4882a593Smuzhiyun 	mvs_release_task(mvi, dev);
1420*4882a593Smuzhiyun 	spin_unlock_irqrestore(&mvi->lock, flags);
1421*4882a593Smuzhiyun 
1422*4882a593Smuzhiyun 	return rc;
1423*4882a593Smuzhiyun }
1424*4882a593Smuzhiyun /* optional SAM-3 */
mvs_query_task(struct sas_task * task)1425*4882a593Smuzhiyun int mvs_query_task(struct sas_task *task)
1426*4882a593Smuzhiyun {
1427*4882a593Smuzhiyun 	u32 tag;
1428*4882a593Smuzhiyun 	struct scsi_lun lun;
1429*4882a593Smuzhiyun 	struct mvs_tmf_task tmf_task;
1430*4882a593Smuzhiyun 	int rc = TMF_RESP_FUNC_FAILED;
1431*4882a593Smuzhiyun 
1432*4882a593Smuzhiyun 	if (task->lldd_task && task->task_proto & SAS_PROTOCOL_SSP) {
1433*4882a593Smuzhiyun 		struct scsi_cmnd * cmnd = (struct scsi_cmnd *)task->uldd_task;
1434*4882a593Smuzhiyun 		struct domain_device *dev = task->dev;
1435*4882a593Smuzhiyun 		struct mvs_device *mvi_dev = (struct mvs_device *)dev->lldd_dev;
1436*4882a593Smuzhiyun 		struct mvs_info *mvi = mvi_dev->mvi_info;
1437*4882a593Smuzhiyun 
1438*4882a593Smuzhiyun 		int_to_scsilun(cmnd->device->lun, &lun);
1439*4882a593Smuzhiyun 		rc = mvs_find_tag(mvi, task, &tag);
1440*4882a593Smuzhiyun 		if (rc == 0) {
1441*4882a593Smuzhiyun 			rc = TMF_RESP_FUNC_FAILED;
1442*4882a593Smuzhiyun 			return rc;
1443*4882a593Smuzhiyun 		}
1444*4882a593Smuzhiyun 
1445*4882a593Smuzhiyun 		tmf_task.tmf = TMF_QUERY_TASK;
1446*4882a593Smuzhiyun 		tmf_task.tag_of_task_to_be_managed = cpu_to_le16(tag);
1447*4882a593Smuzhiyun 
1448*4882a593Smuzhiyun 		rc = mvs_debug_issue_ssp_tmf(dev, lun.scsi_lun, &tmf_task);
1449*4882a593Smuzhiyun 		switch (rc) {
1450*4882a593Smuzhiyun 		/* The task is still in Lun, release it then */
1451*4882a593Smuzhiyun 		case TMF_RESP_FUNC_SUCC:
1452*4882a593Smuzhiyun 		/* The task is not in Lun or failed, reset the phy */
1453*4882a593Smuzhiyun 		case TMF_RESP_FUNC_FAILED:
1454*4882a593Smuzhiyun 		case TMF_RESP_FUNC_COMPLETE:
1455*4882a593Smuzhiyun 			break;
1456*4882a593Smuzhiyun 		}
1457*4882a593Smuzhiyun 	}
1458*4882a593Smuzhiyun 	mv_printk("%s:rc= %d\n", __func__, rc);
1459*4882a593Smuzhiyun 	return rc;
1460*4882a593Smuzhiyun }
1461*4882a593Smuzhiyun 
1462*4882a593Smuzhiyun /*  mandatory SAM-3, still need free task/slot info */
mvs_abort_task(struct sas_task * task)1463*4882a593Smuzhiyun int mvs_abort_task(struct sas_task *task)
1464*4882a593Smuzhiyun {
1465*4882a593Smuzhiyun 	struct scsi_lun lun;
1466*4882a593Smuzhiyun 	struct mvs_tmf_task tmf_task;
1467*4882a593Smuzhiyun 	struct domain_device *dev = task->dev;
1468*4882a593Smuzhiyun 	struct mvs_device *mvi_dev = (struct mvs_device *)dev->lldd_dev;
1469*4882a593Smuzhiyun 	struct mvs_info *mvi;
1470*4882a593Smuzhiyun 	int rc = TMF_RESP_FUNC_FAILED;
1471*4882a593Smuzhiyun 	unsigned long flags;
1472*4882a593Smuzhiyun 	u32 tag;
1473*4882a593Smuzhiyun 
1474*4882a593Smuzhiyun 	if (!mvi_dev) {
1475*4882a593Smuzhiyun 		mv_printk("Device has removed\n");
1476*4882a593Smuzhiyun 		return TMF_RESP_FUNC_FAILED;
1477*4882a593Smuzhiyun 	}
1478*4882a593Smuzhiyun 
1479*4882a593Smuzhiyun 	mvi = mvi_dev->mvi_info;
1480*4882a593Smuzhiyun 
1481*4882a593Smuzhiyun 	spin_lock_irqsave(&task->task_state_lock, flags);
1482*4882a593Smuzhiyun 	if (task->task_state_flags & SAS_TASK_STATE_DONE) {
1483*4882a593Smuzhiyun 		spin_unlock_irqrestore(&task->task_state_lock, flags);
1484*4882a593Smuzhiyun 		rc = TMF_RESP_FUNC_COMPLETE;
1485*4882a593Smuzhiyun 		goto out;
1486*4882a593Smuzhiyun 	}
1487*4882a593Smuzhiyun 	spin_unlock_irqrestore(&task->task_state_lock, flags);
1488*4882a593Smuzhiyun 	mvi_dev->dev_status = MVS_DEV_EH;
1489*4882a593Smuzhiyun 	if (task->lldd_task && task->task_proto & SAS_PROTOCOL_SSP) {
1490*4882a593Smuzhiyun 		struct scsi_cmnd * cmnd = (struct scsi_cmnd *)task->uldd_task;
1491*4882a593Smuzhiyun 
1492*4882a593Smuzhiyun 		int_to_scsilun(cmnd->device->lun, &lun);
1493*4882a593Smuzhiyun 		rc = mvs_find_tag(mvi, task, &tag);
1494*4882a593Smuzhiyun 		if (rc == 0) {
1495*4882a593Smuzhiyun 			mv_printk("No such tag in %s\n", __func__);
1496*4882a593Smuzhiyun 			rc = TMF_RESP_FUNC_FAILED;
1497*4882a593Smuzhiyun 			return rc;
1498*4882a593Smuzhiyun 		}
1499*4882a593Smuzhiyun 
1500*4882a593Smuzhiyun 		tmf_task.tmf = TMF_ABORT_TASK;
1501*4882a593Smuzhiyun 		tmf_task.tag_of_task_to_be_managed = cpu_to_le16(tag);
1502*4882a593Smuzhiyun 
1503*4882a593Smuzhiyun 		rc = mvs_debug_issue_ssp_tmf(dev, lun.scsi_lun, &tmf_task);
1504*4882a593Smuzhiyun 
1505*4882a593Smuzhiyun 		/* if successful, clear the task and callback forwards.*/
1506*4882a593Smuzhiyun 		if (rc == TMF_RESP_FUNC_COMPLETE) {
1507*4882a593Smuzhiyun 			u32 slot_no;
1508*4882a593Smuzhiyun 			struct mvs_slot_info *slot;
1509*4882a593Smuzhiyun 
1510*4882a593Smuzhiyun 			if (task->lldd_task) {
1511*4882a593Smuzhiyun 				slot = task->lldd_task;
1512*4882a593Smuzhiyun 				slot_no = (u32) (slot - mvi->slot_info);
1513*4882a593Smuzhiyun 				spin_lock_irqsave(&mvi->lock, flags);
1514*4882a593Smuzhiyun 				mvs_slot_complete(mvi, slot_no, 1);
1515*4882a593Smuzhiyun 				spin_unlock_irqrestore(&mvi->lock, flags);
1516*4882a593Smuzhiyun 			}
1517*4882a593Smuzhiyun 		}
1518*4882a593Smuzhiyun 
1519*4882a593Smuzhiyun 	} else if (task->task_proto & SAS_PROTOCOL_SATA ||
1520*4882a593Smuzhiyun 		task->task_proto & SAS_PROTOCOL_STP) {
1521*4882a593Smuzhiyun 		if (SAS_SATA_DEV == dev->dev_type) {
1522*4882a593Smuzhiyun 			struct mvs_slot_info *slot = task->lldd_task;
1523*4882a593Smuzhiyun 			u32 slot_idx = (u32)(slot - mvi->slot_info);
1524*4882a593Smuzhiyun 			mv_dprintk("mvs_abort_task() mvi=%p task=%p "
1525*4882a593Smuzhiyun 				   "slot=%p slot_idx=x%x\n",
1526*4882a593Smuzhiyun 				   mvi, task, slot, slot_idx);
1527*4882a593Smuzhiyun 			task->task_state_flags |= SAS_TASK_STATE_ABORTED;
1528*4882a593Smuzhiyun 			mvs_slot_task_free(mvi, task, slot, slot_idx);
1529*4882a593Smuzhiyun 			rc = TMF_RESP_FUNC_COMPLETE;
1530*4882a593Smuzhiyun 			goto out;
1531*4882a593Smuzhiyun 		}
1532*4882a593Smuzhiyun 
1533*4882a593Smuzhiyun 	}
1534*4882a593Smuzhiyun out:
1535*4882a593Smuzhiyun 	if (rc != TMF_RESP_FUNC_COMPLETE)
1536*4882a593Smuzhiyun 		mv_printk("%s:rc= %d\n", __func__, rc);
1537*4882a593Smuzhiyun 	return rc;
1538*4882a593Smuzhiyun }
1539*4882a593Smuzhiyun 
mvs_abort_task_set(struct domain_device * dev,u8 * lun)1540*4882a593Smuzhiyun int mvs_abort_task_set(struct domain_device *dev, u8 *lun)
1541*4882a593Smuzhiyun {
1542*4882a593Smuzhiyun 	int rc;
1543*4882a593Smuzhiyun 	struct mvs_tmf_task tmf_task;
1544*4882a593Smuzhiyun 
1545*4882a593Smuzhiyun 	tmf_task.tmf = TMF_ABORT_TASK_SET;
1546*4882a593Smuzhiyun 	rc = mvs_debug_issue_ssp_tmf(dev, lun, &tmf_task);
1547*4882a593Smuzhiyun 
1548*4882a593Smuzhiyun 	return rc;
1549*4882a593Smuzhiyun }
1550*4882a593Smuzhiyun 
mvs_clear_aca(struct domain_device * dev,u8 * lun)1551*4882a593Smuzhiyun int mvs_clear_aca(struct domain_device *dev, u8 *lun)
1552*4882a593Smuzhiyun {
1553*4882a593Smuzhiyun 	int rc = TMF_RESP_FUNC_FAILED;
1554*4882a593Smuzhiyun 	struct mvs_tmf_task tmf_task;
1555*4882a593Smuzhiyun 
1556*4882a593Smuzhiyun 	tmf_task.tmf = TMF_CLEAR_ACA;
1557*4882a593Smuzhiyun 	rc = mvs_debug_issue_ssp_tmf(dev, lun, &tmf_task);
1558*4882a593Smuzhiyun 
1559*4882a593Smuzhiyun 	return rc;
1560*4882a593Smuzhiyun }
1561*4882a593Smuzhiyun 
mvs_clear_task_set(struct domain_device * dev,u8 * lun)1562*4882a593Smuzhiyun int mvs_clear_task_set(struct domain_device *dev, u8 *lun)
1563*4882a593Smuzhiyun {
1564*4882a593Smuzhiyun 	int rc = TMF_RESP_FUNC_FAILED;
1565*4882a593Smuzhiyun 	struct mvs_tmf_task tmf_task;
1566*4882a593Smuzhiyun 
1567*4882a593Smuzhiyun 	tmf_task.tmf = TMF_CLEAR_TASK_SET;
1568*4882a593Smuzhiyun 	rc = mvs_debug_issue_ssp_tmf(dev, lun, &tmf_task);
1569*4882a593Smuzhiyun 
1570*4882a593Smuzhiyun 	return rc;
1571*4882a593Smuzhiyun }
1572*4882a593Smuzhiyun 
mvs_sata_done(struct mvs_info * mvi,struct sas_task * task,u32 slot_idx,int err)1573*4882a593Smuzhiyun static int mvs_sata_done(struct mvs_info *mvi, struct sas_task *task,
1574*4882a593Smuzhiyun 			u32 slot_idx, int err)
1575*4882a593Smuzhiyun {
1576*4882a593Smuzhiyun 	struct mvs_device *mvi_dev = task->dev->lldd_dev;
1577*4882a593Smuzhiyun 	struct task_status_struct *tstat = &task->task_status;
1578*4882a593Smuzhiyun 	struct ata_task_resp *resp = (struct ata_task_resp *)tstat->buf;
1579*4882a593Smuzhiyun 	int stat = SAM_STAT_GOOD;
1580*4882a593Smuzhiyun 
1581*4882a593Smuzhiyun 
1582*4882a593Smuzhiyun 	resp->frame_len = sizeof(struct dev_to_host_fis);
1583*4882a593Smuzhiyun 	memcpy(&resp->ending_fis[0],
1584*4882a593Smuzhiyun 	       SATA_RECEIVED_D2H_FIS(mvi_dev->taskfileset),
1585*4882a593Smuzhiyun 	       sizeof(struct dev_to_host_fis));
1586*4882a593Smuzhiyun 	tstat->buf_valid_size = sizeof(*resp);
1587*4882a593Smuzhiyun 	if (unlikely(err)) {
1588*4882a593Smuzhiyun 		if (unlikely(err & CMD_ISS_STPD))
1589*4882a593Smuzhiyun 			stat = SAS_OPEN_REJECT;
1590*4882a593Smuzhiyun 		else
1591*4882a593Smuzhiyun 			stat = SAS_PROTO_RESPONSE;
1592*4882a593Smuzhiyun        }
1593*4882a593Smuzhiyun 
1594*4882a593Smuzhiyun 	return stat;
1595*4882a593Smuzhiyun }
1596*4882a593Smuzhiyun 
mvs_set_sense(u8 * buffer,int len,int d_sense,int key,int asc,int ascq)1597*4882a593Smuzhiyun static void mvs_set_sense(u8 *buffer, int len, int d_sense,
1598*4882a593Smuzhiyun 		int key, int asc, int ascq)
1599*4882a593Smuzhiyun {
1600*4882a593Smuzhiyun 	memset(buffer, 0, len);
1601*4882a593Smuzhiyun 
1602*4882a593Smuzhiyun 	if (d_sense) {
1603*4882a593Smuzhiyun 		/* Descriptor format */
1604*4882a593Smuzhiyun 		if (len < 4) {
1605*4882a593Smuzhiyun 			mv_printk("Length %d of sense buffer too small to "
1606*4882a593Smuzhiyun 				"fit sense %x:%x:%x", len, key, asc, ascq);
1607*4882a593Smuzhiyun 		}
1608*4882a593Smuzhiyun 
1609*4882a593Smuzhiyun 		buffer[0] = 0x72;		/* Response Code	*/
1610*4882a593Smuzhiyun 		if (len > 1)
1611*4882a593Smuzhiyun 			buffer[1] = key;	/* Sense Key */
1612*4882a593Smuzhiyun 		if (len > 2)
1613*4882a593Smuzhiyun 			buffer[2] = asc;	/* ASC	*/
1614*4882a593Smuzhiyun 		if (len > 3)
1615*4882a593Smuzhiyun 			buffer[3] = ascq;	/* ASCQ	*/
1616*4882a593Smuzhiyun 	} else {
1617*4882a593Smuzhiyun 		if (len < 14) {
1618*4882a593Smuzhiyun 			mv_printk("Length %d of sense buffer too small to "
1619*4882a593Smuzhiyun 				"fit sense %x:%x:%x", len, key, asc, ascq);
1620*4882a593Smuzhiyun 		}
1621*4882a593Smuzhiyun 
1622*4882a593Smuzhiyun 		buffer[0] = 0x70;		/* Response Code	*/
1623*4882a593Smuzhiyun 		if (len > 2)
1624*4882a593Smuzhiyun 			buffer[2] = key;	/* Sense Key */
1625*4882a593Smuzhiyun 		if (len > 7)
1626*4882a593Smuzhiyun 			buffer[7] = 0x0a;	/* Additional Sense Length */
1627*4882a593Smuzhiyun 		if (len > 12)
1628*4882a593Smuzhiyun 			buffer[12] = asc;	/* ASC */
1629*4882a593Smuzhiyun 		if (len > 13)
1630*4882a593Smuzhiyun 			buffer[13] = ascq; /* ASCQ */
1631*4882a593Smuzhiyun 	}
1632*4882a593Smuzhiyun 
1633*4882a593Smuzhiyun 	return;
1634*4882a593Smuzhiyun }
1635*4882a593Smuzhiyun 
mvs_fill_ssp_resp_iu(struct ssp_response_iu * iu,u8 key,u8 asc,u8 asc_q)1636*4882a593Smuzhiyun static void mvs_fill_ssp_resp_iu(struct ssp_response_iu *iu,
1637*4882a593Smuzhiyun 				u8 key, u8 asc, u8 asc_q)
1638*4882a593Smuzhiyun {
1639*4882a593Smuzhiyun 	iu->datapres = 2;
1640*4882a593Smuzhiyun 	iu->response_data_len = 0;
1641*4882a593Smuzhiyun 	iu->sense_data_len = 17;
1642*4882a593Smuzhiyun 	iu->status = 02;
1643*4882a593Smuzhiyun 	mvs_set_sense(iu->sense_data, 17, 0,
1644*4882a593Smuzhiyun 			key, asc, asc_q);
1645*4882a593Smuzhiyun }
1646*4882a593Smuzhiyun 
mvs_slot_err(struct mvs_info * mvi,struct sas_task * task,u32 slot_idx)1647*4882a593Smuzhiyun static int mvs_slot_err(struct mvs_info *mvi, struct sas_task *task,
1648*4882a593Smuzhiyun 			 u32 slot_idx)
1649*4882a593Smuzhiyun {
1650*4882a593Smuzhiyun 	struct mvs_slot_info *slot = &mvi->slot_info[slot_idx];
1651*4882a593Smuzhiyun 	int stat;
1652*4882a593Smuzhiyun 	u32 err_dw0 = le32_to_cpu(*(u32 *)slot->response);
1653*4882a593Smuzhiyun 	u32 err_dw1 = le32_to_cpu(*((u32 *)slot->response + 1));
1654*4882a593Smuzhiyun 	u32 tfs = 0;
1655*4882a593Smuzhiyun 	enum mvs_port_type type = PORT_TYPE_SAS;
1656*4882a593Smuzhiyun 
1657*4882a593Smuzhiyun 	if (err_dw0 & CMD_ISS_STPD)
1658*4882a593Smuzhiyun 		MVS_CHIP_DISP->issue_stop(mvi, type, tfs);
1659*4882a593Smuzhiyun 
1660*4882a593Smuzhiyun 	MVS_CHIP_DISP->command_active(mvi, slot_idx);
1661*4882a593Smuzhiyun 
1662*4882a593Smuzhiyun 	stat = SAM_STAT_CHECK_CONDITION;
1663*4882a593Smuzhiyun 	switch (task->task_proto) {
1664*4882a593Smuzhiyun 	case SAS_PROTOCOL_SSP:
1665*4882a593Smuzhiyun 	{
1666*4882a593Smuzhiyun 		stat = SAS_ABORTED_TASK;
1667*4882a593Smuzhiyun 		if ((err_dw0 & NO_DEST) || err_dw1 & bit(31)) {
1668*4882a593Smuzhiyun 			struct ssp_response_iu *iu = slot->response +
1669*4882a593Smuzhiyun 				sizeof(struct mvs_err_info);
1670*4882a593Smuzhiyun 			mvs_fill_ssp_resp_iu(iu, NOT_READY, 0x04, 01);
1671*4882a593Smuzhiyun 			sas_ssp_task_response(mvi->dev, task, iu);
1672*4882a593Smuzhiyun 			stat = SAM_STAT_CHECK_CONDITION;
1673*4882a593Smuzhiyun 		}
1674*4882a593Smuzhiyun 		if (err_dw1 & bit(31))
1675*4882a593Smuzhiyun 			mv_printk("reuse same slot, retry command.\n");
1676*4882a593Smuzhiyun 		break;
1677*4882a593Smuzhiyun 	}
1678*4882a593Smuzhiyun 	case SAS_PROTOCOL_SMP:
1679*4882a593Smuzhiyun 		stat = SAM_STAT_CHECK_CONDITION;
1680*4882a593Smuzhiyun 		break;
1681*4882a593Smuzhiyun 
1682*4882a593Smuzhiyun 	case SAS_PROTOCOL_SATA:
1683*4882a593Smuzhiyun 	case SAS_PROTOCOL_STP:
1684*4882a593Smuzhiyun 	case SAS_PROTOCOL_SATA | SAS_PROTOCOL_STP:
1685*4882a593Smuzhiyun 	{
1686*4882a593Smuzhiyun 		task->ata_task.use_ncq = 0;
1687*4882a593Smuzhiyun 		stat = SAS_PROTO_RESPONSE;
1688*4882a593Smuzhiyun 		mvs_sata_done(mvi, task, slot_idx, err_dw0);
1689*4882a593Smuzhiyun 	}
1690*4882a593Smuzhiyun 		break;
1691*4882a593Smuzhiyun 	default:
1692*4882a593Smuzhiyun 		break;
1693*4882a593Smuzhiyun 	}
1694*4882a593Smuzhiyun 
1695*4882a593Smuzhiyun 	return stat;
1696*4882a593Smuzhiyun }
1697*4882a593Smuzhiyun 
mvs_slot_complete(struct mvs_info * mvi,u32 rx_desc,u32 flags)1698*4882a593Smuzhiyun int mvs_slot_complete(struct mvs_info *mvi, u32 rx_desc, u32 flags)
1699*4882a593Smuzhiyun {
1700*4882a593Smuzhiyun 	u32 slot_idx = rx_desc & RXQ_SLOT_MASK;
1701*4882a593Smuzhiyun 	struct mvs_slot_info *slot = &mvi->slot_info[slot_idx];
1702*4882a593Smuzhiyun 	struct sas_task *task = slot->task;
1703*4882a593Smuzhiyun 	struct mvs_device *mvi_dev = NULL;
1704*4882a593Smuzhiyun 	struct task_status_struct *tstat;
1705*4882a593Smuzhiyun 	struct domain_device *dev;
1706*4882a593Smuzhiyun 	u32 aborted;
1707*4882a593Smuzhiyun 
1708*4882a593Smuzhiyun 	void *to;
1709*4882a593Smuzhiyun 	enum exec_status sts;
1710*4882a593Smuzhiyun 
1711*4882a593Smuzhiyun 	if (unlikely(!task || !task->lldd_task || !task->dev))
1712*4882a593Smuzhiyun 		return -1;
1713*4882a593Smuzhiyun 
1714*4882a593Smuzhiyun 	tstat = &task->task_status;
1715*4882a593Smuzhiyun 	dev = task->dev;
1716*4882a593Smuzhiyun 	mvi_dev = dev->lldd_dev;
1717*4882a593Smuzhiyun 
1718*4882a593Smuzhiyun 	spin_lock(&task->task_state_lock);
1719*4882a593Smuzhiyun 	task->task_state_flags &=
1720*4882a593Smuzhiyun 		~(SAS_TASK_STATE_PENDING | SAS_TASK_AT_INITIATOR);
1721*4882a593Smuzhiyun 	task->task_state_flags |= SAS_TASK_STATE_DONE;
1722*4882a593Smuzhiyun 	/* race condition*/
1723*4882a593Smuzhiyun 	aborted = task->task_state_flags & SAS_TASK_STATE_ABORTED;
1724*4882a593Smuzhiyun 	spin_unlock(&task->task_state_lock);
1725*4882a593Smuzhiyun 
1726*4882a593Smuzhiyun 	memset(tstat, 0, sizeof(*tstat));
1727*4882a593Smuzhiyun 	tstat->resp = SAS_TASK_COMPLETE;
1728*4882a593Smuzhiyun 
1729*4882a593Smuzhiyun 	if (unlikely(aborted)) {
1730*4882a593Smuzhiyun 		tstat->stat = SAS_ABORTED_TASK;
1731*4882a593Smuzhiyun 		if (mvi_dev && mvi_dev->running_req)
1732*4882a593Smuzhiyun 			mvi_dev->running_req--;
1733*4882a593Smuzhiyun 		if (sas_protocol_ata(task->task_proto))
1734*4882a593Smuzhiyun 			mvs_free_reg_set(mvi, mvi_dev);
1735*4882a593Smuzhiyun 
1736*4882a593Smuzhiyun 		mvs_slot_task_free(mvi, task, slot, slot_idx);
1737*4882a593Smuzhiyun 		return -1;
1738*4882a593Smuzhiyun 	}
1739*4882a593Smuzhiyun 
1740*4882a593Smuzhiyun 	/* when no device attaching, go ahead and complete by error handling*/
1741*4882a593Smuzhiyun 	if (unlikely(!mvi_dev || flags)) {
1742*4882a593Smuzhiyun 		if (!mvi_dev)
1743*4882a593Smuzhiyun 			mv_dprintk("port has not device.\n");
1744*4882a593Smuzhiyun 		tstat->stat = SAS_PHY_DOWN;
1745*4882a593Smuzhiyun 		goto out;
1746*4882a593Smuzhiyun 	}
1747*4882a593Smuzhiyun 
1748*4882a593Smuzhiyun 	/*
1749*4882a593Smuzhiyun 	 * error info record present; slot->response is 32 bit aligned but may
1750*4882a593Smuzhiyun 	 * not be 64 bit aligned, so check for zero in two 32 bit reads
1751*4882a593Smuzhiyun 	 */
1752*4882a593Smuzhiyun 	if (unlikely((rx_desc & RXQ_ERR)
1753*4882a593Smuzhiyun 		     && (*((u32 *)slot->response)
1754*4882a593Smuzhiyun 			 || *(((u32 *)slot->response) + 1)))) {
1755*4882a593Smuzhiyun 		mv_dprintk("port %d slot %d rx_desc %X has error info"
1756*4882a593Smuzhiyun 			"%016llX.\n", slot->port->sas_port.id, slot_idx,
1757*4882a593Smuzhiyun 			 rx_desc, get_unaligned_le64(slot->response));
1758*4882a593Smuzhiyun 		tstat->stat = mvs_slot_err(mvi, task, slot_idx);
1759*4882a593Smuzhiyun 		tstat->resp = SAS_TASK_COMPLETE;
1760*4882a593Smuzhiyun 		goto out;
1761*4882a593Smuzhiyun 	}
1762*4882a593Smuzhiyun 
1763*4882a593Smuzhiyun 	switch (task->task_proto) {
1764*4882a593Smuzhiyun 	case SAS_PROTOCOL_SSP:
1765*4882a593Smuzhiyun 		/* hw says status == 0, datapres == 0 */
1766*4882a593Smuzhiyun 		if (rx_desc & RXQ_GOOD) {
1767*4882a593Smuzhiyun 			tstat->stat = SAM_STAT_GOOD;
1768*4882a593Smuzhiyun 			tstat->resp = SAS_TASK_COMPLETE;
1769*4882a593Smuzhiyun 		}
1770*4882a593Smuzhiyun 		/* response frame present */
1771*4882a593Smuzhiyun 		else if (rx_desc & RXQ_RSP) {
1772*4882a593Smuzhiyun 			struct ssp_response_iu *iu = slot->response +
1773*4882a593Smuzhiyun 						sizeof(struct mvs_err_info);
1774*4882a593Smuzhiyun 			sas_ssp_task_response(mvi->dev, task, iu);
1775*4882a593Smuzhiyun 		} else
1776*4882a593Smuzhiyun 			tstat->stat = SAM_STAT_CHECK_CONDITION;
1777*4882a593Smuzhiyun 		break;
1778*4882a593Smuzhiyun 
1779*4882a593Smuzhiyun 	case SAS_PROTOCOL_SMP: {
1780*4882a593Smuzhiyun 			struct scatterlist *sg_resp = &task->smp_task.smp_resp;
1781*4882a593Smuzhiyun 			tstat->stat = SAM_STAT_GOOD;
1782*4882a593Smuzhiyun 			to = kmap_atomic(sg_page(sg_resp));
1783*4882a593Smuzhiyun 			memcpy(to + sg_resp->offset,
1784*4882a593Smuzhiyun 				slot->response + sizeof(struct mvs_err_info),
1785*4882a593Smuzhiyun 				sg_dma_len(sg_resp));
1786*4882a593Smuzhiyun 			kunmap_atomic(to);
1787*4882a593Smuzhiyun 			break;
1788*4882a593Smuzhiyun 		}
1789*4882a593Smuzhiyun 
1790*4882a593Smuzhiyun 	case SAS_PROTOCOL_SATA:
1791*4882a593Smuzhiyun 	case SAS_PROTOCOL_STP:
1792*4882a593Smuzhiyun 	case SAS_PROTOCOL_SATA | SAS_PROTOCOL_STP: {
1793*4882a593Smuzhiyun 			tstat->stat = mvs_sata_done(mvi, task, slot_idx, 0);
1794*4882a593Smuzhiyun 			break;
1795*4882a593Smuzhiyun 		}
1796*4882a593Smuzhiyun 
1797*4882a593Smuzhiyun 	default:
1798*4882a593Smuzhiyun 		tstat->stat = SAM_STAT_CHECK_CONDITION;
1799*4882a593Smuzhiyun 		break;
1800*4882a593Smuzhiyun 	}
1801*4882a593Smuzhiyun 	if (!slot->port->port_attached) {
1802*4882a593Smuzhiyun 		mv_dprintk("port %d has removed.\n", slot->port->sas_port.id);
1803*4882a593Smuzhiyun 		tstat->stat = SAS_PHY_DOWN;
1804*4882a593Smuzhiyun 	}
1805*4882a593Smuzhiyun 
1806*4882a593Smuzhiyun 
1807*4882a593Smuzhiyun out:
1808*4882a593Smuzhiyun 	if (mvi_dev && mvi_dev->running_req) {
1809*4882a593Smuzhiyun 		mvi_dev->running_req--;
1810*4882a593Smuzhiyun 		if (sas_protocol_ata(task->task_proto) && !mvi_dev->running_req)
1811*4882a593Smuzhiyun 			mvs_free_reg_set(mvi, mvi_dev);
1812*4882a593Smuzhiyun 	}
1813*4882a593Smuzhiyun 	mvs_slot_task_free(mvi, task, slot, slot_idx);
1814*4882a593Smuzhiyun 	sts = tstat->stat;
1815*4882a593Smuzhiyun 
1816*4882a593Smuzhiyun 	spin_unlock(&mvi->lock);
1817*4882a593Smuzhiyun 	if (task->task_done)
1818*4882a593Smuzhiyun 		task->task_done(task);
1819*4882a593Smuzhiyun 
1820*4882a593Smuzhiyun 	spin_lock(&mvi->lock);
1821*4882a593Smuzhiyun 
1822*4882a593Smuzhiyun 	return sts;
1823*4882a593Smuzhiyun }
1824*4882a593Smuzhiyun 
mvs_do_release_task(struct mvs_info * mvi,int phy_no,struct domain_device * dev)1825*4882a593Smuzhiyun void mvs_do_release_task(struct mvs_info *mvi,
1826*4882a593Smuzhiyun 		int phy_no, struct domain_device *dev)
1827*4882a593Smuzhiyun {
1828*4882a593Smuzhiyun 	u32 slot_idx;
1829*4882a593Smuzhiyun 	struct mvs_phy *phy;
1830*4882a593Smuzhiyun 	struct mvs_port *port;
1831*4882a593Smuzhiyun 	struct mvs_slot_info *slot, *slot2;
1832*4882a593Smuzhiyun 
1833*4882a593Smuzhiyun 	phy = &mvi->phy[phy_no];
1834*4882a593Smuzhiyun 	port = phy->port;
1835*4882a593Smuzhiyun 	if (!port)
1836*4882a593Smuzhiyun 		return;
1837*4882a593Smuzhiyun 	/* clean cmpl queue in case request is already finished */
1838*4882a593Smuzhiyun 	mvs_int_rx(mvi, false);
1839*4882a593Smuzhiyun 
1840*4882a593Smuzhiyun 
1841*4882a593Smuzhiyun 
1842*4882a593Smuzhiyun 	list_for_each_entry_safe(slot, slot2, &port->list, entry) {
1843*4882a593Smuzhiyun 		struct sas_task *task;
1844*4882a593Smuzhiyun 		slot_idx = (u32) (slot - mvi->slot_info);
1845*4882a593Smuzhiyun 		task = slot->task;
1846*4882a593Smuzhiyun 
1847*4882a593Smuzhiyun 		if (dev && task->dev != dev)
1848*4882a593Smuzhiyun 			continue;
1849*4882a593Smuzhiyun 
1850*4882a593Smuzhiyun 		mv_printk("Release slot [%x] tag[%x], task [%p]:\n",
1851*4882a593Smuzhiyun 			slot_idx, slot->slot_tag, task);
1852*4882a593Smuzhiyun 		MVS_CHIP_DISP->command_active(mvi, slot_idx);
1853*4882a593Smuzhiyun 
1854*4882a593Smuzhiyun 		mvs_slot_complete(mvi, slot_idx, 1);
1855*4882a593Smuzhiyun 	}
1856*4882a593Smuzhiyun }
1857*4882a593Smuzhiyun 
mvs_release_task(struct mvs_info * mvi,struct domain_device * dev)1858*4882a593Smuzhiyun void mvs_release_task(struct mvs_info *mvi,
1859*4882a593Smuzhiyun 		      struct domain_device *dev)
1860*4882a593Smuzhiyun {
1861*4882a593Smuzhiyun 	int i, phyno[WIDE_PORT_MAX_PHY], num;
1862*4882a593Smuzhiyun 	num = mvs_find_dev_phyno(dev, phyno);
1863*4882a593Smuzhiyun 	for (i = 0; i < num; i++)
1864*4882a593Smuzhiyun 		mvs_do_release_task(mvi, phyno[i], dev);
1865*4882a593Smuzhiyun }
1866*4882a593Smuzhiyun 
mvs_phy_disconnected(struct mvs_phy * phy)1867*4882a593Smuzhiyun static void mvs_phy_disconnected(struct mvs_phy *phy)
1868*4882a593Smuzhiyun {
1869*4882a593Smuzhiyun 	phy->phy_attached = 0;
1870*4882a593Smuzhiyun 	phy->att_dev_info = 0;
1871*4882a593Smuzhiyun 	phy->att_dev_sas_addr = 0;
1872*4882a593Smuzhiyun }
1873*4882a593Smuzhiyun 
mvs_work_queue(struct work_struct * work)1874*4882a593Smuzhiyun static void mvs_work_queue(struct work_struct *work)
1875*4882a593Smuzhiyun {
1876*4882a593Smuzhiyun 	struct delayed_work *dw = container_of(work, struct delayed_work, work);
1877*4882a593Smuzhiyun 	struct mvs_wq *mwq = container_of(dw, struct mvs_wq, work_q);
1878*4882a593Smuzhiyun 	struct mvs_info *mvi = mwq->mvi;
1879*4882a593Smuzhiyun 	unsigned long flags;
1880*4882a593Smuzhiyun 	u32 phy_no = (unsigned long) mwq->data;
1881*4882a593Smuzhiyun 	struct mvs_phy *phy = &mvi->phy[phy_no];
1882*4882a593Smuzhiyun 	struct asd_sas_phy *sas_phy = &phy->sas_phy;
1883*4882a593Smuzhiyun 
1884*4882a593Smuzhiyun 	spin_lock_irqsave(&mvi->lock, flags);
1885*4882a593Smuzhiyun 	if (mwq->handler & PHY_PLUG_EVENT) {
1886*4882a593Smuzhiyun 
1887*4882a593Smuzhiyun 		if (phy->phy_event & PHY_PLUG_OUT) {
1888*4882a593Smuzhiyun 			u32 tmp;
1889*4882a593Smuzhiyun 
1890*4882a593Smuzhiyun 			tmp = MVS_CHIP_DISP->read_phy_ctl(mvi, phy_no);
1891*4882a593Smuzhiyun 			phy->phy_event &= ~PHY_PLUG_OUT;
1892*4882a593Smuzhiyun 			if (!(tmp & PHY_READY_MASK)) {
1893*4882a593Smuzhiyun 				sas_phy_disconnected(sas_phy);
1894*4882a593Smuzhiyun 				mvs_phy_disconnected(phy);
1895*4882a593Smuzhiyun 				sas_notify_phy_event_gfp(sas_phy,
1896*4882a593Smuzhiyun 					PHYE_LOSS_OF_SIGNAL, GFP_ATOMIC);
1897*4882a593Smuzhiyun 				mv_dprintk("phy%d Removed Device\n", phy_no);
1898*4882a593Smuzhiyun 			} else {
1899*4882a593Smuzhiyun 				MVS_CHIP_DISP->detect_porttype(mvi, phy_no);
1900*4882a593Smuzhiyun 				mvs_update_phyinfo(mvi, phy_no, 1);
1901*4882a593Smuzhiyun 				mvs_bytes_dmaed(mvi, phy_no, GFP_ATOMIC);
1902*4882a593Smuzhiyun 				mvs_port_notify_formed(sas_phy, 0);
1903*4882a593Smuzhiyun 				mv_dprintk("phy%d Attached Device\n", phy_no);
1904*4882a593Smuzhiyun 			}
1905*4882a593Smuzhiyun 		}
1906*4882a593Smuzhiyun 	} else if (mwq->handler & EXP_BRCT_CHG) {
1907*4882a593Smuzhiyun 		phy->phy_event &= ~EXP_BRCT_CHG;
1908*4882a593Smuzhiyun 		sas_notify_port_event_gfp(sas_phy,
1909*4882a593Smuzhiyun 				PORTE_BROADCAST_RCVD, GFP_ATOMIC);
1910*4882a593Smuzhiyun 		mv_dprintk("phy%d Got Broadcast Change\n", phy_no);
1911*4882a593Smuzhiyun 	}
1912*4882a593Smuzhiyun 	list_del(&mwq->entry);
1913*4882a593Smuzhiyun 	spin_unlock_irqrestore(&mvi->lock, flags);
1914*4882a593Smuzhiyun 	kfree(mwq);
1915*4882a593Smuzhiyun }
1916*4882a593Smuzhiyun 
mvs_handle_event(struct mvs_info * mvi,void * data,int handler)1917*4882a593Smuzhiyun static int mvs_handle_event(struct mvs_info *mvi, void *data, int handler)
1918*4882a593Smuzhiyun {
1919*4882a593Smuzhiyun 	struct mvs_wq *mwq;
1920*4882a593Smuzhiyun 	int ret = 0;
1921*4882a593Smuzhiyun 
1922*4882a593Smuzhiyun 	mwq = kmalloc(sizeof(struct mvs_wq), GFP_ATOMIC);
1923*4882a593Smuzhiyun 	if (mwq) {
1924*4882a593Smuzhiyun 		mwq->mvi = mvi;
1925*4882a593Smuzhiyun 		mwq->data = data;
1926*4882a593Smuzhiyun 		mwq->handler = handler;
1927*4882a593Smuzhiyun 		MV_INIT_DELAYED_WORK(&mwq->work_q, mvs_work_queue, mwq);
1928*4882a593Smuzhiyun 		list_add_tail(&mwq->entry, &mvi->wq_list);
1929*4882a593Smuzhiyun 		schedule_delayed_work(&mwq->work_q, HZ * 2);
1930*4882a593Smuzhiyun 	} else
1931*4882a593Smuzhiyun 		ret = -ENOMEM;
1932*4882a593Smuzhiyun 
1933*4882a593Smuzhiyun 	return ret;
1934*4882a593Smuzhiyun }
1935*4882a593Smuzhiyun 
mvs_sig_time_out(struct timer_list * t)1936*4882a593Smuzhiyun static void mvs_sig_time_out(struct timer_list *t)
1937*4882a593Smuzhiyun {
1938*4882a593Smuzhiyun 	struct mvs_phy *phy = from_timer(phy, t, timer);
1939*4882a593Smuzhiyun 	struct mvs_info *mvi = phy->mvi;
1940*4882a593Smuzhiyun 	u8 phy_no;
1941*4882a593Smuzhiyun 
1942*4882a593Smuzhiyun 	for (phy_no = 0; phy_no < mvi->chip->n_phy; phy_no++) {
1943*4882a593Smuzhiyun 		if (&mvi->phy[phy_no] == phy) {
1944*4882a593Smuzhiyun 			mv_dprintk("Get signature time out, reset phy %d\n",
1945*4882a593Smuzhiyun 				phy_no+mvi->id*mvi->chip->n_phy);
1946*4882a593Smuzhiyun 			MVS_CHIP_DISP->phy_reset(mvi, phy_no, MVS_HARD_RESET);
1947*4882a593Smuzhiyun 		}
1948*4882a593Smuzhiyun 	}
1949*4882a593Smuzhiyun }
1950*4882a593Smuzhiyun 
mvs_int_port(struct mvs_info * mvi,int phy_no,u32 events)1951*4882a593Smuzhiyun void mvs_int_port(struct mvs_info *mvi, int phy_no, u32 events)
1952*4882a593Smuzhiyun {
1953*4882a593Smuzhiyun 	u32 tmp;
1954*4882a593Smuzhiyun 	struct mvs_phy *phy = &mvi->phy[phy_no];
1955*4882a593Smuzhiyun 
1956*4882a593Smuzhiyun 	phy->irq_status = MVS_CHIP_DISP->read_port_irq_stat(mvi, phy_no);
1957*4882a593Smuzhiyun 	MVS_CHIP_DISP->write_port_irq_stat(mvi, phy_no, phy->irq_status);
1958*4882a593Smuzhiyun 	mv_dprintk("phy %d ctrl sts=0x%08X.\n", phy_no+mvi->id*mvi->chip->n_phy,
1959*4882a593Smuzhiyun 		MVS_CHIP_DISP->read_phy_ctl(mvi, phy_no));
1960*4882a593Smuzhiyun 	mv_dprintk("phy %d irq sts = 0x%08X\n", phy_no+mvi->id*mvi->chip->n_phy,
1961*4882a593Smuzhiyun 		phy->irq_status);
1962*4882a593Smuzhiyun 
1963*4882a593Smuzhiyun 	/*
1964*4882a593Smuzhiyun 	* events is port event now ,
1965*4882a593Smuzhiyun 	* we need check the interrupt status which belongs to per port.
1966*4882a593Smuzhiyun 	*/
1967*4882a593Smuzhiyun 
1968*4882a593Smuzhiyun 	if (phy->irq_status & PHYEV_DCDR_ERR) {
1969*4882a593Smuzhiyun 		mv_dprintk("phy %d STP decoding error.\n",
1970*4882a593Smuzhiyun 		phy_no + mvi->id*mvi->chip->n_phy);
1971*4882a593Smuzhiyun 	}
1972*4882a593Smuzhiyun 
1973*4882a593Smuzhiyun 	if (phy->irq_status & PHYEV_POOF) {
1974*4882a593Smuzhiyun 		mdelay(500);
1975*4882a593Smuzhiyun 		if (!(phy->phy_event & PHY_PLUG_OUT)) {
1976*4882a593Smuzhiyun 			int dev_sata = phy->phy_type & PORT_TYPE_SATA;
1977*4882a593Smuzhiyun 			int ready;
1978*4882a593Smuzhiyun 			mvs_do_release_task(mvi, phy_no, NULL);
1979*4882a593Smuzhiyun 			phy->phy_event |= PHY_PLUG_OUT;
1980*4882a593Smuzhiyun 			MVS_CHIP_DISP->clear_srs_irq(mvi, 0, 1);
1981*4882a593Smuzhiyun 			mvs_handle_event(mvi,
1982*4882a593Smuzhiyun 				(void *)(unsigned long)phy_no,
1983*4882a593Smuzhiyun 				PHY_PLUG_EVENT);
1984*4882a593Smuzhiyun 			ready = mvs_is_phy_ready(mvi, phy_no);
1985*4882a593Smuzhiyun 			if (ready || dev_sata) {
1986*4882a593Smuzhiyun 				if (MVS_CHIP_DISP->stp_reset)
1987*4882a593Smuzhiyun 					MVS_CHIP_DISP->stp_reset(mvi,
1988*4882a593Smuzhiyun 							phy_no);
1989*4882a593Smuzhiyun 				else
1990*4882a593Smuzhiyun 					MVS_CHIP_DISP->phy_reset(mvi,
1991*4882a593Smuzhiyun 							phy_no, MVS_SOFT_RESET);
1992*4882a593Smuzhiyun 				return;
1993*4882a593Smuzhiyun 			}
1994*4882a593Smuzhiyun 		}
1995*4882a593Smuzhiyun 	}
1996*4882a593Smuzhiyun 
1997*4882a593Smuzhiyun 	if (phy->irq_status & PHYEV_COMWAKE) {
1998*4882a593Smuzhiyun 		tmp = MVS_CHIP_DISP->read_port_irq_mask(mvi, phy_no);
1999*4882a593Smuzhiyun 		MVS_CHIP_DISP->write_port_irq_mask(mvi, phy_no,
2000*4882a593Smuzhiyun 					tmp | PHYEV_SIG_FIS);
2001*4882a593Smuzhiyun 		if (phy->timer.function == NULL) {
2002*4882a593Smuzhiyun 			phy->timer.function = mvs_sig_time_out;
2003*4882a593Smuzhiyun 			phy->timer.expires = jiffies + 5*HZ;
2004*4882a593Smuzhiyun 			add_timer(&phy->timer);
2005*4882a593Smuzhiyun 		}
2006*4882a593Smuzhiyun 	}
2007*4882a593Smuzhiyun 	if (phy->irq_status & (PHYEV_SIG_FIS | PHYEV_ID_DONE)) {
2008*4882a593Smuzhiyun 		phy->phy_status = mvs_is_phy_ready(mvi, phy_no);
2009*4882a593Smuzhiyun 		mv_dprintk("notify plug in on phy[%d]\n", phy_no);
2010*4882a593Smuzhiyun 		if (phy->phy_status) {
2011*4882a593Smuzhiyun 			mdelay(10);
2012*4882a593Smuzhiyun 			MVS_CHIP_DISP->detect_porttype(mvi, phy_no);
2013*4882a593Smuzhiyun 			if (phy->phy_type & PORT_TYPE_SATA) {
2014*4882a593Smuzhiyun 				tmp = MVS_CHIP_DISP->read_port_irq_mask(
2015*4882a593Smuzhiyun 						mvi, phy_no);
2016*4882a593Smuzhiyun 				tmp &= ~PHYEV_SIG_FIS;
2017*4882a593Smuzhiyun 				MVS_CHIP_DISP->write_port_irq_mask(mvi,
2018*4882a593Smuzhiyun 							phy_no, tmp);
2019*4882a593Smuzhiyun 			}
2020*4882a593Smuzhiyun 			mvs_update_phyinfo(mvi, phy_no, 0);
2021*4882a593Smuzhiyun 			if (phy->phy_type & PORT_TYPE_SAS) {
2022*4882a593Smuzhiyun 				MVS_CHIP_DISP->phy_reset(mvi, phy_no, MVS_PHY_TUNE);
2023*4882a593Smuzhiyun 				mdelay(10);
2024*4882a593Smuzhiyun 			}
2025*4882a593Smuzhiyun 
2026*4882a593Smuzhiyun 			mvs_bytes_dmaed(mvi, phy_no, GFP_ATOMIC);
2027*4882a593Smuzhiyun 			/* whether driver is going to handle hot plug */
2028*4882a593Smuzhiyun 			if (phy->phy_event & PHY_PLUG_OUT) {
2029*4882a593Smuzhiyun 				mvs_port_notify_formed(&phy->sas_phy, 0);
2030*4882a593Smuzhiyun 				phy->phy_event &= ~PHY_PLUG_OUT;
2031*4882a593Smuzhiyun 			}
2032*4882a593Smuzhiyun 		} else {
2033*4882a593Smuzhiyun 			mv_dprintk("plugin interrupt but phy%d is gone\n",
2034*4882a593Smuzhiyun 				phy_no + mvi->id*mvi->chip->n_phy);
2035*4882a593Smuzhiyun 		}
2036*4882a593Smuzhiyun 	} else if (phy->irq_status & PHYEV_BROAD_CH) {
2037*4882a593Smuzhiyun 		mv_dprintk("phy %d broadcast change.\n",
2038*4882a593Smuzhiyun 			phy_no + mvi->id*mvi->chip->n_phy);
2039*4882a593Smuzhiyun 		mvs_handle_event(mvi, (void *)(unsigned long)phy_no,
2040*4882a593Smuzhiyun 				EXP_BRCT_CHG);
2041*4882a593Smuzhiyun 	}
2042*4882a593Smuzhiyun }
2043*4882a593Smuzhiyun 
mvs_int_rx(struct mvs_info * mvi,bool self_clear)2044*4882a593Smuzhiyun int mvs_int_rx(struct mvs_info *mvi, bool self_clear)
2045*4882a593Smuzhiyun {
2046*4882a593Smuzhiyun 	u32 rx_prod_idx, rx_desc;
2047*4882a593Smuzhiyun 	bool attn = false;
2048*4882a593Smuzhiyun 
2049*4882a593Smuzhiyun 	/* the first dword in the RX ring is special: it contains
2050*4882a593Smuzhiyun 	 * a mirror of the hardware's RX producer index, so that
2051*4882a593Smuzhiyun 	 * we don't have to stall the CPU reading that register.
2052*4882a593Smuzhiyun 	 * The actual RX ring is offset by one dword, due to this.
2053*4882a593Smuzhiyun 	 */
2054*4882a593Smuzhiyun 	rx_prod_idx = mvi->rx_cons;
2055*4882a593Smuzhiyun 	mvi->rx_cons = le32_to_cpu(mvi->rx[0]);
2056*4882a593Smuzhiyun 	if (mvi->rx_cons == 0xfff)	/* h/w hasn't touched RX ring yet */
2057*4882a593Smuzhiyun 		return 0;
2058*4882a593Smuzhiyun 
2059*4882a593Smuzhiyun 	/* The CMPL_Q may come late, read from register and try again
2060*4882a593Smuzhiyun 	* note: if coalescing is enabled,
2061*4882a593Smuzhiyun 	* it will need to read from register every time for sure
2062*4882a593Smuzhiyun 	*/
2063*4882a593Smuzhiyun 	if (unlikely(mvi->rx_cons == rx_prod_idx))
2064*4882a593Smuzhiyun 		mvi->rx_cons = MVS_CHIP_DISP->rx_update(mvi) & RX_RING_SZ_MASK;
2065*4882a593Smuzhiyun 
2066*4882a593Smuzhiyun 	if (mvi->rx_cons == rx_prod_idx)
2067*4882a593Smuzhiyun 		return 0;
2068*4882a593Smuzhiyun 
2069*4882a593Smuzhiyun 	while (mvi->rx_cons != rx_prod_idx) {
2070*4882a593Smuzhiyun 		/* increment our internal RX consumer pointer */
2071*4882a593Smuzhiyun 		rx_prod_idx = (rx_prod_idx + 1) & (MVS_RX_RING_SZ - 1);
2072*4882a593Smuzhiyun 		rx_desc = le32_to_cpu(mvi->rx[rx_prod_idx + 1]);
2073*4882a593Smuzhiyun 
2074*4882a593Smuzhiyun 		if (likely(rx_desc & RXQ_DONE))
2075*4882a593Smuzhiyun 			mvs_slot_complete(mvi, rx_desc, 0);
2076*4882a593Smuzhiyun 		if (rx_desc & RXQ_ATTN) {
2077*4882a593Smuzhiyun 			attn = true;
2078*4882a593Smuzhiyun 		} else if (rx_desc & RXQ_ERR) {
2079*4882a593Smuzhiyun 			if (!(rx_desc & RXQ_DONE))
2080*4882a593Smuzhiyun 				mvs_slot_complete(mvi, rx_desc, 0);
2081*4882a593Smuzhiyun 		} else if (rx_desc & RXQ_SLOT_RESET) {
2082*4882a593Smuzhiyun 			mvs_slot_free(mvi, rx_desc);
2083*4882a593Smuzhiyun 		}
2084*4882a593Smuzhiyun 	}
2085*4882a593Smuzhiyun 
2086*4882a593Smuzhiyun 	if (attn && self_clear)
2087*4882a593Smuzhiyun 		MVS_CHIP_DISP->int_full(mvi);
2088*4882a593Smuzhiyun 	return 0;
2089*4882a593Smuzhiyun }
2090*4882a593Smuzhiyun 
mvs_gpio_write(struct sas_ha_struct * sha,u8 reg_type,u8 reg_index,u8 reg_count,u8 * write_data)2091*4882a593Smuzhiyun int mvs_gpio_write(struct sas_ha_struct *sha, u8 reg_type, u8 reg_index,
2092*4882a593Smuzhiyun 			u8 reg_count, u8 *write_data)
2093*4882a593Smuzhiyun {
2094*4882a593Smuzhiyun 	struct mvs_prv_info *mvs_prv = sha->lldd_ha;
2095*4882a593Smuzhiyun 	struct mvs_info *mvi = mvs_prv->mvi[0];
2096*4882a593Smuzhiyun 
2097*4882a593Smuzhiyun 	if (MVS_CHIP_DISP->gpio_write) {
2098*4882a593Smuzhiyun 		return MVS_CHIP_DISP->gpio_write(mvs_prv, reg_type,
2099*4882a593Smuzhiyun 			reg_index, reg_count, write_data);
2100*4882a593Smuzhiyun 	}
2101*4882a593Smuzhiyun 
2102*4882a593Smuzhiyun 	return -ENOSYS;
2103*4882a593Smuzhiyun }
2104