1*4882a593Smuzhiyun /* SPDX-License-Identifier: GPL-2.0 */ 2*4882a593Smuzhiyun /* 3*4882a593Smuzhiyun * Copyright 2000-2020 Broadcom Inc. All rights reserved. 4*4882a593Smuzhiyun * 5*4882a593Smuzhiyun * 6*4882a593Smuzhiyun * Name: mpi2_init.h 7*4882a593Smuzhiyun * Title: MPI SCSI initiator mode messages and structures 8*4882a593Smuzhiyun * Creation Date: June 23, 2006 9*4882a593Smuzhiyun * 10*4882a593Smuzhiyun * mpi2_init.h Version: 02.00.21 11*4882a593Smuzhiyun * 12*4882a593Smuzhiyun * NOTE: Names (typedefs, defines, etc.) beginning with an MPI25 or Mpi25 13*4882a593Smuzhiyun * prefix are for use only on MPI v2.5 products, and must not be used 14*4882a593Smuzhiyun * with MPI v2.0 products. Unless otherwise noted, names beginning with 15*4882a593Smuzhiyun * MPI2 or Mpi2 are for use with both MPI v2.0 and MPI v2.5 products. 16*4882a593Smuzhiyun * 17*4882a593Smuzhiyun * Version History 18*4882a593Smuzhiyun * --------------- 19*4882a593Smuzhiyun * 20*4882a593Smuzhiyun * Date Version Description 21*4882a593Smuzhiyun * -------- -------- ------------------------------------------------------ 22*4882a593Smuzhiyun * 04-30-07 02.00.00 Corresponds to Fusion-MPT MPI Specification Rev A. 23*4882a593Smuzhiyun * 10-31-07 02.00.01 Fixed name for pMpi2SCSITaskManagementRequest_t. 24*4882a593Smuzhiyun * 12-18-07 02.00.02 Modified Task Management Target Reset Method defines. 25*4882a593Smuzhiyun * 02-29-08 02.00.03 Added Query Task Set and Query Unit Attention. 26*4882a593Smuzhiyun * 03-03-08 02.00.04 Fixed name of struct _MPI2_SCSI_TASK_MANAGE_REPLY. 27*4882a593Smuzhiyun * 05-21-08 02.00.05 Fixed typo in name of Mpi2SepRequest_t. 28*4882a593Smuzhiyun * 10-02-08 02.00.06 Removed Untagged and No Disconnect values from SCSI IO 29*4882a593Smuzhiyun * Control field Task Attribute flags. 30*4882a593Smuzhiyun * Moved LUN field defines to mpi2.h becasue they are 31*4882a593Smuzhiyun * common to many structures. 32*4882a593Smuzhiyun * 05-06-09 02.00.07 Changed task management type of Query Unit Attention to 33*4882a593Smuzhiyun * Query Asynchronous Event. 34*4882a593Smuzhiyun * Defined two new bits in the SlotStatus field of the SCSI 35*4882a593Smuzhiyun * Enclosure Processor Request and Reply. 36*4882a593Smuzhiyun * 10-28-09 02.00.08 Added defines for decoding the ResponseInfo bytes for 37*4882a593Smuzhiyun * both SCSI IO Error Reply and SCSI Task Management Reply. 38*4882a593Smuzhiyun * Added ResponseInfo field to MPI2_SCSI_TASK_MANAGE_REPLY. 39*4882a593Smuzhiyun * Added MPI2_SCSITASKMGMT_RSP_TM_OVERLAPPED_TAG define. 40*4882a593Smuzhiyun * 02-10-10 02.00.09 Removed unused structure that had "#if 0" around it. 41*4882a593Smuzhiyun * 05-12-10 02.00.10 Added optional vendor-unique region to SCSI IO Request. 42*4882a593Smuzhiyun * 11-10-10 02.00.11 Added MPI2_SCSIIO_NUM_SGLOFFSETS define. 43*4882a593Smuzhiyun * 11-18-11 02.00.12 Incorporating additions for MPI v2.5. 44*4882a593Smuzhiyun * 02-06-12 02.00.13 Added alternate defines for Task Priority / Command 45*4882a593Smuzhiyun * Priority to match SAM-4. 46*4882a593Smuzhiyun * Added EEDPErrorOffset to MPI2_SCSI_IO_REPLY. 47*4882a593Smuzhiyun * 07-10-12 02.00.14 Added MPI2_SCSIIO_CONTROL_SHIFT_DATADIRECTION. 48*4882a593Smuzhiyun * 04-09-13 02.00.15 Added SCSIStatusQualifier field to MPI2_SCSI_IO_REPLY, 49*4882a593Smuzhiyun * replacing the Reserved4 field. 50*4882a593Smuzhiyun * 11-18-14 02.00.16 Updated copyright information. 51*4882a593Smuzhiyun * 03-16-15 02.00.17 Updated for MPI v2.6. 52*4882a593Smuzhiyun * Added MPI26_SCSIIO_IOFLAGS_ESCAPE_PASSTHROUGH. 53*4882a593Smuzhiyun * Added MPI2_SEP_REQ_SLOTSTATUS_DEV_OFF and 54*4882a593Smuzhiyun * MPI2_SEP_REPLY_SLOTSTATUS_DEV_OFF. 55*4882a593Smuzhiyun * 08-26-15 02.00.18 Added SCSITASKMGMT_MSGFLAGS for Target Reset. 56*4882a593Smuzhiyun * 12-18-15 02.00.19 Added EEDPObservedValue added to SCSI IO Reply message. 57*4882a593Smuzhiyun * 01-04-16 02.00.20 Modified EEDP reported values in SCSI IO Reply message. 58*4882a593Smuzhiyun * 01-21-16 02.00.21 Modified MPI26_SCSITASKMGMT_MSGFLAGS_PCIE* defines to 59*4882a593Smuzhiyun * be unique within first 32 characters. 60*4882a593Smuzhiyun * -------------------------------------------------------------------------- 61*4882a593Smuzhiyun */ 62*4882a593Smuzhiyun 63*4882a593Smuzhiyun #ifndef MPI2_INIT_H 64*4882a593Smuzhiyun #define MPI2_INIT_H 65*4882a593Smuzhiyun 66*4882a593Smuzhiyun /***************************************************************************** 67*4882a593Smuzhiyun * 68*4882a593Smuzhiyun * SCSI Initiator Messages 69*4882a593Smuzhiyun * 70*4882a593Smuzhiyun *****************************************************************************/ 71*4882a593Smuzhiyun 72*4882a593Smuzhiyun /**************************************************************************** 73*4882a593Smuzhiyun * SCSI IO messages and associated structures 74*4882a593Smuzhiyun ****************************************************************************/ 75*4882a593Smuzhiyun 76*4882a593Smuzhiyun typedef struct _MPI2_SCSI_IO_CDB_EEDP32 { 77*4882a593Smuzhiyun U8 CDB[20]; /*0x00 */ 78*4882a593Smuzhiyun __be32 PrimaryReferenceTag; /*0x14 */ 79*4882a593Smuzhiyun U16 PrimaryApplicationTag; /*0x18 */ 80*4882a593Smuzhiyun U16 PrimaryApplicationTagMask; /*0x1A */ 81*4882a593Smuzhiyun U32 TransferLength; /*0x1C */ 82*4882a593Smuzhiyun } MPI2_SCSI_IO_CDB_EEDP32, *PTR_MPI2_SCSI_IO_CDB_EEDP32, 83*4882a593Smuzhiyun Mpi2ScsiIoCdbEedp32_t, *pMpi2ScsiIoCdbEedp32_t; 84*4882a593Smuzhiyun 85*4882a593Smuzhiyun /*MPI v2.0 CDB field */ 86*4882a593Smuzhiyun typedef union _MPI2_SCSI_IO_CDB_UNION { 87*4882a593Smuzhiyun U8 CDB32[32]; 88*4882a593Smuzhiyun MPI2_SCSI_IO_CDB_EEDP32 EEDP32; 89*4882a593Smuzhiyun MPI2_SGE_SIMPLE_UNION SGE; 90*4882a593Smuzhiyun } MPI2_SCSI_IO_CDB_UNION, *PTR_MPI2_SCSI_IO_CDB_UNION, 91*4882a593Smuzhiyun Mpi2ScsiIoCdb_t, *pMpi2ScsiIoCdb_t; 92*4882a593Smuzhiyun 93*4882a593Smuzhiyun /*MPI v2.0 SCSI IO Request Message */ 94*4882a593Smuzhiyun typedef struct _MPI2_SCSI_IO_REQUEST { 95*4882a593Smuzhiyun U16 DevHandle; /*0x00 */ 96*4882a593Smuzhiyun U8 ChainOffset; /*0x02 */ 97*4882a593Smuzhiyun U8 Function; /*0x03 */ 98*4882a593Smuzhiyun U16 Reserved1; /*0x04 */ 99*4882a593Smuzhiyun U8 Reserved2; /*0x06 */ 100*4882a593Smuzhiyun U8 MsgFlags; /*0x07 */ 101*4882a593Smuzhiyun U8 VP_ID; /*0x08 */ 102*4882a593Smuzhiyun U8 VF_ID; /*0x09 */ 103*4882a593Smuzhiyun U16 Reserved3; /*0x0A */ 104*4882a593Smuzhiyun U32 SenseBufferLowAddress; /*0x0C */ 105*4882a593Smuzhiyun U16 SGLFlags; /*0x10 */ 106*4882a593Smuzhiyun U8 SenseBufferLength; /*0x12 */ 107*4882a593Smuzhiyun U8 Reserved4; /*0x13 */ 108*4882a593Smuzhiyun U8 SGLOffset0; /*0x14 */ 109*4882a593Smuzhiyun U8 SGLOffset1; /*0x15 */ 110*4882a593Smuzhiyun U8 SGLOffset2; /*0x16 */ 111*4882a593Smuzhiyun U8 SGLOffset3; /*0x17 */ 112*4882a593Smuzhiyun U32 SkipCount; /*0x18 */ 113*4882a593Smuzhiyun U32 DataLength; /*0x1C */ 114*4882a593Smuzhiyun U32 BidirectionalDataLength; /*0x20 */ 115*4882a593Smuzhiyun U16 IoFlags; /*0x24 */ 116*4882a593Smuzhiyun U16 EEDPFlags; /*0x26 */ 117*4882a593Smuzhiyun U32 EEDPBlockSize; /*0x28 */ 118*4882a593Smuzhiyun U32 SecondaryReferenceTag; /*0x2C */ 119*4882a593Smuzhiyun U16 SecondaryApplicationTag; /*0x30 */ 120*4882a593Smuzhiyun U16 ApplicationTagTranslationMask; /*0x32 */ 121*4882a593Smuzhiyun U8 LUN[8]; /*0x34 */ 122*4882a593Smuzhiyun U32 Control; /*0x3C */ 123*4882a593Smuzhiyun MPI2_SCSI_IO_CDB_UNION CDB; /*0x40 */ 124*4882a593Smuzhiyun 125*4882a593Smuzhiyun #ifdef MPI2_SCSI_IO_VENDOR_UNIQUE_REGION /*typically this is left undefined */ 126*4882a593Smuzhiyun MPI2_SCSI_IO_VENDOR_UNIQUE VendorRegion; 127*4882a593Smuzhiyun #endif 128*4882a593Smuzhiyun 129*4882a593Smuzhiyun MPI2_SGE_IO_UNION SGL; /*0x60 */ 130*4882a593Smuzhiyun 131*4882a593Smuzhiyun } MPI2_SCSI_IO_REQUEST, *PTR_MPI2_SCSI_IO_REQUEST, 132*4882a593Smuzhiyun Mpi2SCSIIORequest_t, *pMpi2SCSIIORequest_t; 133*4882a593Smuzhiyun 134*4882a593Smuzhiyun /*SCSI IO MsgFlags bits */ 135*4882a593Smuzhiyun 136*4882a593Smuzhiyun /*MsgFlags for SenseBufferAddressSpace */ 137*4882a593Smuzhiyun #define MPI2_SCSIIO_MSGFLAGS_MASK_SENSE_ADDR (0x0C) 138*4882a593Smuzhiyun #define MPI2_SCSIIO_MSGFLAGS_SYSTEM_SENSE_ADDR (0x00) 139*4882a593Smuzhiyun #define MPI2_SCSIIO_MSGFLAGS_IOCDDR_SENSE_ADDR (0x04) 140*4882a593Smuzhiyun #define MPI2_SCSIIO_MSGFLAGS_IOCPLB_SENSE_ADDR (0x08) 141*4882a593Smuzhiyun #define MPI2_SCSIIO_MSGFLAGS_IOCPLBNTA_SENSE_ADDR (0x0C) 142*4882a593Smuzhiyun #define MPI26_SCSIIO_MSGFLAGS_IOCCTL_SENSE_ADDR (0x08) 143*4882a593Smuzhiyun 144*4882a593Smuzhiyun /*SCSI IO SGLFlags bits */ 145*4882a593Smuzhiyun 146*4882a593Smuzhiyun /*base values for Data Location Address Space */ 147*4882a593Smuzhiyun #define MPI2_SCSIIO_SGLFLAGS_ADDR_MASK (0x0C) 148*4882a593Smuzhiyun #define MPI2_SCSIIO_SGLFLAGS_SYSTEM_ADDR (0x00) 149*4882a593Smuzhiyun #define MPI2_SCSIIO_SGLFLAGS_IOCDDR_ADDR (0x04) 150*4882a593Smuzhiyun #define MPI2_SCSIIO_SGLFLAGS_IOCPLB_ADDR (0x08) 151*4882a593Smuzhiyun #define MPI2_SCSIIO_SGLFLAGS_IOCPLBNTA_ADDR (0x0C) 152*4882a593Smuzhiyun 153*4882a593Smuzhiyun /*base values for Type */ 154*4882a593Smuzhiyun #define MPI2_SCSIIO_SGLFLAGS_TYPE_MASK (0x03) 155*4882a593Smuzhiyun #define MPI2_SCSIIO_SGLFLAGS_TYPE_MPI (0x00) 156*4882a593Smuzhiyun #define MPI2_SCSIIO_SGLFLAGS_TYPE_IEEE32 (0x01) 157*4882a593Smuzhiyun #define MPI2_SCSIIO_SGLFLAGS_TYPE_IEEE64 (0x02) 158*4882a593Smuzhiyun 159*4882a593Smuzhiyun /*shift values for each sub-field */ 160*4882a593Smuzhiyun #define MPI2_SCSIIO_SGLFLAGS_SGL3_SHIFT (12) 161*4882a593Smuzhiyun #define MPI2_SCSIIO_SGLFLAGS_SGL2_SHIFT (8) 162*4882a593Smuzhiyun #define MPI2_SCSIIO_SGLFLAGS_SGL1_SHIFT (4) 163*4882a593Smuzhiyun #define MPI2_SCSIIO_SGLFLAGS_SGL0_SHIFT (0) 164*4882a593Smuzhiyun 165*4882a593Smuzhiyun /*number of SGLOffset fields */ 166*4882a593Smuzhiyun #define MPI2_SCSIIO_NUM_SGLOFFSETS (4) 167*4882a593Smuzhiyun 168*4882a593Smuzhiyun /*SCSI IO IoFlags bits */ 169*4882a593Smuzhiyun 170*4882a593Smuzhiyun /*Large CDB Address Space */ 171*4882a593Smuzhiyun #define MPI2_SCSIIO_CDB_ADDR_MASK (0x6000) 172*4882a593Smuzhiyun #define MPI2_SCSIIO_CDB_ADDR_SYSTEM (0x0000) 173*4882a593Smuzhiyun #define MPI2_SCSIIO_CDB_ADDR_IOCDDR (0x2000) 174*4882a593Smuzhiyun #define MPI2_SCSIIO_CDB_ADDR_IOCPLB (0x4000) 175*4882a593Smuzhiyun #define MPI2_SCSIIO_CDB_ADDR_IOCPLBNTA (0x6000) 176*4882a593Smuzhiyun 177*4882a593Smuzhiyun #define MPI2_SCSIIO_IOFLAGS_LARGE_CDB (0x1000) 178*4882a593Smuzhiyun #define MPI2_SCSIIO_IOFLAGS_BIDIRECTIONAL (0x0800) 179*4882a593Smuzhiyun #define MPI2_SCSIIO_IOFLAGS_MULTICAST (0x0400) 180*4882a593Smuzhiyun #define MPI2_SCSIIO_IOFLAGS_CMD_DETERMINES_DATA_DIR (0x0200) 181*4882a593Smuzhiyun #define MPI2_SCSIIO_IOFLAGS_CDBLENGTH_MASK (0x01FF) 182*4882a593Smuzhiyun 183*4882a593Smuzhiyun /*SCSI IO EEDPFlags bits */ 184*4882a593Smuzhiyun 185*4882a593Smuzhiyun #define MPI2_SCSIIO_EEDPFLAGS_INC_PRI_REFTAG (0x8000) 186*4882a593Smuzhiyun #define MPI2_SCSIIO_EEDPFLAGS_INC_SEC_REFTAG (0x4000) 187*4882a593Smuzhiyun #define MPI2_SCSIIO_EEDPFLAGS_INC_PRI_APPTAG (0x2000) 188*4882a593Smuzhiyun #define MPI2_SCSIIO_EEDPFLAGS_INC_SEC_APPTAG (0x1000) 189*4882a593Smuzhiyun 190*4882a593Smuzhiyun #define MPI2_SCSIIO_EEDPFLAGS_CHECK_REFTAG (0x0400) 191*4882a593Smuzhiyun #define MPI2_SCSIIO_EEDPFLAGS_CHECK_APPTAG (0x0200) 192*4882a593Smuzhiyun #define MPI2_SCSIIO_EEDPFLAGS_CHECK_GUARD (0x0100) 193*4882a593Smuzhiyun 194*4882a593Smuzhiyun #define MPI2_SCSIIO_EEDPFLAGS_PASSTHRU_REFTAG (0x0008) 195*4882a593Smuzhiyun 196*4882a593Smuzhiyun #define MPI2_SCSIIO_EEDPFLAGS_MASK_OP (0x0007) 197*4882a593Smuzhiyun #define MPI2_SCSIIO_EEDPFLAGS_NOOP_OP (0x0000) 198*4882a593Smuzhiyun #define MPI2_SCSIIO_EEDPFLAGS_CHECK_OP (0x0001) 199*4882a593Smuzhiyun #define MPI2_SCSIIO_EEDPFLAGS_STRIP_OP (0x0002) 200*4882a593Smuzhiyun #define MPI2_SCSIIO_EEDPFLAGS_CHECK_REMOVE_OP (0x0003) 201*4882a593Smuzhiyun #define MPI2_SCSIIO_EEDPFLAGS_INSERT_OP (0x0004) 202*4882a593Smuzhiyun #define MPI2_SCSIIO_EEDPFLAGS_REPLACE_OP (0x0006) 203*4882a593Smuzhiyun #define MPI2_SCSIIO_EEDPFLAGS_CHECK_REGEN_OP (0x0007) 204*4882a593Smuzhiyun 205*4882a593Smuzhiyun /*SCSI IO LUN fields: use MPI2_LUN_ from mpi2.h */ 206*4882a593Smuzhiyun 207*4882a593Smuzhiyun /*SCSI IO Control bits */ 208*4882a593Smuzhiyun #define MPI2_SCSIIO_CONTROL_ADDCDBLEN_MASK (0xFC000000) 209*4882a593Smuzhiyun #define MPI2_SCSIIO_CONTROL_ADDCDBLEN_SHIFT (26) 210*4882a593Smuzhiyun 211*4882a593Smuzhiyun #define MPI2_SCSIIO_CONTROL_DATADIRECTION_MASK (0x03000000) 212*4882a593Smuzhiyun #define MPI2_SCSIIO_CONTROL_SHIFT_DATADIRECTION (24) 213*4882a593Smuzhiyun #define MPI2_SCSIIO_CONTROL_NODATATRANSFER (0x00000000) 214*4882a593Smuzhiyun #define MPI2_SCSIIO_CONTROL_WRITE (0x01000000) 215*4882a593Smuzhiyun #define MPI2_SCSIIO_CONTROL_READ (0x02000000) 216*4882a593Smuzhiyun #define MPI2_SCSIIO_CONTROL_BIDIRECTIONAL (0x03000000) 217*4882a593Smuzhiyun 218*4882a593Smuzhiyun #define MPI2_SCSIIO_CONTROL_TASKPRI_MASK (0x00007800) 219*4882a593Smuzhiyun #define MPI2_SCSIIO_CONTROL_TASKPRI_SHIFT (11) 220*4882a593Smuzhiyun /*alternate name for the previous field; called Command Priority in SAM-4 */ 221*4882a593Smuzhiyun #define MPI2_SCSIIO_CONTROL_CMDPRI_MASK (0x00007800) 222*4882a593Smuzhiyun #define MPI2_SCSIIO_CONTROL_CMDPRI_SHIFT (11) 223*4882a593Smuzhiyun 224*4882a593Smuzhiyun #define MPI2_SCSIIO_CONTROL_TASKATTRIBUTE_MASK (0x00000700) 225*4882a593Smuzhiyun #define MPI2_SCSIIO_CONTROL_SIMPLEQ (0x00000000) 226*4882a593Smuzhiyun #define MPI2_SCSIIO_CONTROL_HEADOFQ (0x00000100) 227*4882a593Smuzhiyun #define MPI2_SCSIIO_CONTROL_ORDEREDQ (0x00000200) 228*4882a593Smuzhiyun #define MPI2_SCSIIO_CONTROL_ACAQ (0x00000400) 229*4882a593Smuzhiyun 230*4882a593Smuzhiyun #define MPI2_SCSIIO_CONTROL_TLR_MASK (0x000000C0) 231*4882a593Smuzhiyun #define MPI2_SCSIIO_CONTROL_NO_TLR (0x00000000) 232*4882a593Smuzhiyun #define MPI2_SCSIIO_CONTROL_TLR_ON (0x00000040) 233*4882a593Smuzhiyun #define MPI2_SCSIIO_CONTROL_TLR_OFF (0x00000080) 234*4882a593Smuzhiyun 235*4882a593Smuzhiyun /*MPI v2.5 CDB field */ 236*4882a593Smuzhiyun typedef union _MPI25_SCSI_IO_CDB_UNION { 237*4882a593Smuzhiyun U8 CDB32[32]; 238*4882a593Smuzhiyun MPI2_SCSI_IO_CDB_EEDP32 EEDP32; 239*4882a593Smuzhiyun MPI2_IEEE_SGE_SIMPLE64 SGE; 240*4882a593Smuzhiyun } MPI25_SCSI_IO_CDB_UNION, *PTR_MPI25_SCSI_IO_CDB_UNION, 241*4882a593Smuzhiyun Mpi25ScsiIoCdb_t, *pMpi25ScsiIoCdb_t; 242*4882a593Smuzhiyun 243*4882a593Smuzhiyun /*MPI v2.5/2.6 SCSI IO Request Message */ 244*4882a593Smuzhiyun typedef struct _MPI25_SCSI_IO_REQUEST { 245*4882a593Smuzhiyun U16 DevHandle; /*0x00 */ 246*4882a593Smuzhiyun U8 ChainOffset; /*0x02 */ 247*4882a593Smuzhiyun U8 Function; /*0x03 */ 248*4882a593Smuzhiyun U16 Reserved1; /*0x04 */ 249*4882a593Smuzhiyun U8 Reserved2; /*0x06 */ 250*4882a593Smuzhiyun U8 MsgFlags; /*0x07 */ 251*4882a593Smuzhiyun U8 VP_ID; /*0x08 */ 252*4882a593Smuzhiyun U8 VF_ID; /*0x09 */ 253*4882a593Smuzhiyun U16 Reserved3; /*0x0A */ 254*4882a593Smuzhiyun U32 SenseBufferLowAddress; /*0x0C */ 255*4882a593Smuzhiyun U8 DMAFlags; /*0x10 */ 256*4882a593Smuzhiyun U8 Reserved5; /*0x11 */ 257*4882a593Smuzhiyun U8 SenseBufferLength; /*0x12 */ 258*4882a593Smuzhiyun U8 Reserved4; /*0x13 */ 259*4882a593Smuzhiyun U8 SGLOffset0; /*0x14 */ 260*4882a593Smuzhiyun U8 SGLOffset1; /*0x15 */ 261*4882a593Smuzhiyun U8 SGLOffset2; /*0x16 */ 262*4882a593Smuzhiyun U8 SGLOffset3; /*0x17 */ 263*4882a593Smuzhiyun U32 SkipCount; /*0x18 */ 264*4882a593Smuzhiyun U32 DataLength; /*0x1C */ 265*4882a593Smuzhiyun U32 BidirectionalDataLength; /*0x20 */ 266*4882a593Smuzhiyun U16 IoFlags; /*0x24 */ 267*4882a593Smuzhiyun U16 EEDPFlags; /*0x26 */ 268*4882a593Smuzhiyun U16 EEDPBlockSize; /*0x28 */ 269*4882a593Smuzhiyun U16 Reserved6; /*0x2A */ 270*4882a593Smuzhiyun U32 SecondaryReferenceTag; /*0x2C */ 271*4882a593Smuzhiyun U16 SecondaryApplicationTag; /*0x30 */ 272*4882a593Smuzhiyun U16 ApplicationTagTranslationMask; /*0x32 */ 273*4882a593Smuzhiyun U8 LUN[8]; /*0x34 */ 274*4882a593Smuzhiyun U32 Control; /*0x3C */ 275*4882a593Smuzhiyun MPI25_SCSI_IO_CDB_UNION CDB; /*0x40 */ 276*4882a593Smuzhiyun 277*4882a593Smuzhiyun #ifdef MPI25_SCSI_IO_VENDOR_UNIQUE_REGION /*typically this is left undefined */ 278*4882a593Smuzhiyun MPI25_SCSI_IO_VENDOR_UNIQUE VendorRegion; 279*4882a593Smuzhiyun #endif 280*4882a593Smuzhiyun 281*4882a593Smuzhiyun MPI25_SGE_IO_UNION SGL; /*0x60 */ 282*4882a593Smuzhiyun 283*4882a593Smuzhiyun } MPI25_SCSI_IO_REQUEST, *PTR_MPI25_SCSI_IO_REQUEST, 284*4882a593Smuzhiyun Mpi25SCSIIORequest_t, *pMpi25SCSIIORequest_t; 285*4882a593Smuzhiyun 286*4882a593Smuzhiyun /*use MPI2_SCSIIO_MSGFLAGS_ defines for the MsgFlags field */ 287*4882a593Smuzhiyun 288*4882a593Smuzhiyun /*Defines for the DMAFlags field 289*4882a593Smuzhiyun * Each setting affects 4 SGLS, from SGL0 to SGL3. 290*4882a593Smuzhiyun * D = Data 291*4882a593Smuzhiyun * C = Cache DIF 292*4882a593Smuzhiyun * I = Interleaved 293*4882a593Smuzhiyun * H = Host DIF 294*4882a593Smuzhiyun */ 295*4882a593Smuzhiyun #define MPI25_SCSIIO_DMAFLAGS_OP_MASK (0x0F) 296*4882a593Smuzhiyun #define MPI25_SCSIIO_DMAFLAGS_OP_D_D_D_D (0x00) 297*4882a593Smuzhiyun #define MPI25_SCSIIO_DMAFLAGS_OP_D_D_D_C (0x01) 298*4882a593Smuzhiyun #define MPI25_SCSIIO_DMAFLAGS_OP_D_D_D_I (0x02) 299*4882a593Smuzhiyun #define MPI25_SCSIIO_DMAFLAGS_OP_D_D_C_C (0x03) 300*4882a593Smuzhiyun #define MPI25_SCSIIO_DMAFLAGS_OP_D_D_C_I (0x04) 301*4882a593Smuzhiyun #define MPI25_SCSIIO_DMAFLAGS_OP_D_D_I_I (0x05) 302*4882a593Smuzhiyun #define MPI25_SCSIIO_DMAFLAGS_OP_D_C_C_C (0x06) 303*4882a593Smuzhiyun #define MPI25_SCSIIO_DMAFLAGS_OP_D_C_C_I (0x07) 304*4882a593Smuzhiyun #define MPI25_SCSIIO_DMAFLAGS_OP_D_C_I_I (0x08) 305*4882a593Smuzhiyun #define MPI25_SCSIIO_DMAFLAGS_OP_D_I_I_I (0x09) 306*4882a593Smuzhiyun #define MPI25_SCSIIO_DMAFLAGS_OP_D_H_D_D (0x0A) 307*4882a593Smuzhiyun #define MPI25_SCSIIO_DMAFLAGS_OP_D_H_D_C (0x0B) 308*4882a593Smuzhiyun #define MPI25_SCSIIO_DMAFLAGS_OP_D_H_D_I (0x0C) 309*4882a593Smuzhiyun #define MPI25_SCSIIO_DMAFLAGS_OP_D_H_C_C (0x0D) 310*4882a593Smuzhiyun #define MPI25_SCSIIO_DMAFLAGS_OP_D_H_C_I (0x0E) 311*4882a593Smuzhiyun #define MPI25_SCSIIO_DMAFLAGS_OP_D_H_I_I (0x0F) 312*4882a593Smuzhiyun 313*4882a593Smuzhiyun /*number of SGLOffset fields */ 314*4882a593Smuzhiyun #define MPI25_SCSIIO_NUM_SGLOFFSETS (4) 315*4882a593Smuzhiyun 316*4882a593Smuzhiyun /*defines for the IoFlags field */ 317*4882a593Smuzhiyun #define MPI25_SCSIIO_IOFLAGS_IO_PATH_MASK (0xC000) 318*4882a593Smuzhiyun #define MPI25_SCSIIO_IOFLAGS_NORMAL_PATH (0x0000) 319*4882a593Smuzhiyun #define MPI25_SCSIIO_IOFLAGS_FAST_PATH (0x4000) 320*4882a593Smuzhiyun 321*4882a593Smuzhiyun #define MPI26_SCSIIO_IOFLAGS_ESCAPE_PASSTHROUGH (0x2000) 322*4882a593Smuzhiyun #define MPI25_SCSIIO_IOFLAGS_LARGE_CDB (0x1000) 323*4882a593Smuzhiyun #define MPI25_SCSIIO_IOFLAGS_BIDIRECTIONAL (0x0800) 324*4882a593Smuzhiyun #define MPI26_SCSIIO_IOFLAGS_PORT_REQUEST (0x0400) 325*4882a593Smuzhiyun #define MPI25_SCSIIO_IOFLAGS_CDBLENGTH_MASK (0x01FF) 326*4882a593Smuzhiyun 327*4882a593Smuzhiyun /*MPI v2.5 defines for the EEDPFlags bits */ 328*4882a593Smuzhiyun /*use MPI2_SCSIIO_EEDPFLAGS_ defines for the other EEDPFlags bits */ 329*4882a593Smuzhiyun #define MPI25_SCSIIO_EEDPFLAGS_ESCAPE_MODE_MASK (0x00C0) 330*4882a593Smuzhiyun #define MPI25_SCSIIO_EEDPFLAGS_COMPATIBLE_MODE (0x0000) 331*4882a593Smuzhiyun #define MPI25_SCSIIO_EEDPFLAGS_DO_NOT_DISABLE_MODE (0x0040) 332*4882a593Smuzhiyun #define MPI25_SCSIIO_EEDPFLAGS_APPTAG_DISABLE_MODE (0x0080) 333*4882a593Smuzhiyun #define MPI25_SCSIIO_EEDPFLAGS_APPTAG_REFTAG_DISABLE_MODE (0x00C0) 334*4882a593Smuzhiyun 335*4882a593Smuzhiyun #define MPI25_SCSIIO_EEDPFLAGS_HOST_GUARD_METHOD_MASK (0x0030) 336*4882a593Smuzhiyun #define MPI25_SCSIIO_EEDPFLAGS_T10_CRC_HOST_GUARD (0x0000) 337*4882a593Smuzhiyun #define MPI25_SCSIIO_EEDPFLAGS_IP_CHKSUM_HOST_GUARD (0x0010) 338*4882a593Smuzhiyun 339*4882a593Smuzhiyun /*use MPI2_LUN_ defines from mpi2.h for the LUN field */ 340*4882a593Smuzhiyun 341*4882a593Smuzhiyun /*use MPI2_SCSIIO_CONTROL_ defines for the Control field */ 342*4882a593Smuzhiyun 343*4882a593Smuzhiyun /*NOTE: The SCSI IO Reply is nearly the same for MPI 2.0 and MPI 2.5, so 344*4882a593Smuzhiyun * MPI2_SCSI_IO_REPLY is used for both. 345*4882a593Smuzhiyun */ 346*4882a593Smuzhiyun 347*4882a593Smuzhiyun /*SCSI IO Error Reply Message */ 348*4882a593Smuzhiyun typedef struct _MPI2_SCSI_IO_REPLY { 349*4882a593Smuzhiyun U16 DevHandle; /*0x00 */ 350*4882a593Smuzhiyun U8 MsgLength; /*0x02 */ 351*4882a593Smuzhiyun U8 Function; /*0x03 */ 352*4882a593Smuzhiyun U16 Reserved1; /*0x04 */ 353*4882a593Smuzhiyun U8 Reserved2; /*0x06 */ 354*4882a593Smuzhiyun U8 MsgFlags; /*0x07 */ 355*4882a593Smuzhiyun U8 VP_ID; /*0x08 */ 356*4882a593Smuzhiyun U8 VF_ID; /*0x09 */ 357*4882a593Smuzhiyun U16 Reserved3; /*0x0A */ 358*4882a593Smuzhiyun U8 SCSIStatus; /*0x0C */ 359*4882a593Smuzhiyun U8 SCSIState; /*0x0D */ 360*4882a593Smuzhiyun U16 IOCStatus; /*0x0E */ 361*4882a593Smuzhiyun U32 IOCLogInfo; /*0x10 */ 362*4882a593Smuzhiyun U32 TransferCount; /*0x14 */ 363*4882a593Smuzhiyun U32 SenseCount; /*0x18 */ 364*4882a593Smuzhiyun U32 ResponseInfo; /*0x1C */ 365*4882a593Smuzhiyun U16 TaskTag; /*0x20 */ 366*4882a593Smuzhiyun U16 SCSIStatusQualifier; /* 0x22 */ 367*4882a593Smuzhiyun U32 BidirectionalTransferCount; /*0x24 */ 368*4882a593Smuzhiyun /* MPI 2.5+ only; Reserved in MPI 2.0 */ 369*4882a593Smuzhiyun U32 EEDPErrorOffset; /* 0x28 */ 370*4882a593Smuzhiyun /* MPI 2.5+ only; Reserved in MPI 2.0 */ 371*4882a593Smuzhiyun U16 EEDPObservedAppTag; /* 0x2C */ 372*4882a593Smuzhiyun /* MPI 2.5+ only; Reserved in MPI 2.0 */ 373*4882a593Smuzhiyun U16 EEDPObservedGuard; /* 0x2E */ 374*4882a593Smuzhiyun /* MPI 2.5+ only; Reserved in MPI 2.0 */ 375*4882a593Smuzhiyun U32 EEDPObservedRefTag; /* 0x30 */ 376*4882a593Smuzhiyun } MPI2_SCSI_IO_REPLY, *PTR_MPI2_SCSI_IO_REPLY, 377*4882a593Smuzhiyun Mpi2SCSIIOReply_t, *pMpi2SCSIIOReply_t; 378*4882a593Smuzhiyun 379*4882a593Smuzhiyun /*SCSI IO Reply MsgFlags bits */ 380*4882a593Smuzhiyun #define MPI26_SCSIIO_REPLY_MSGFLAGS_REFTAG_OBSERVED_VALID (0x01) 381*4882a593Smuzhiyun #define MPI26_SCSIIO_REPLY_MSGFLAGS_GUARD_OBSERVED_VALID (0x02) 382*4882a593Smuzhiyun #define MPI26_SCSIIO_REPLY_MSGFLAGS_APPTAG_OBSERVED_VALID (0x04) 383*4882a593Smuzhiyun 384*4882a593Smuzhiyun /*SCSI IO Reply SCSIStatus values (SAM-4 status codes) */ 385*4882a593Smuzhiyun 386*4882a593Smuzhiyun #define MPI2_SCSI_STATUS_GOOD (0x00) 387*4882a593Smuzhiyun #define MPI2_SCSI_STATUS_CHECK_CONDITION (0x02) 388*4882a593Smuzhiyun #define MPI2_SCSI_STATUS_CONDITION_MET (0x04) 389*4882a593Smuzhiyun #define MPI2_SCSI_STATUS_BUSY (0x08) 390*4882a593Smuzhiyun #define MPI2_SCSI_STATUS_INTERMEDIATE (0x10) 391*4882a593Smuzhiyun #define MPI2_SCSI_STATUS_INTERMEDIATE_CONDMET (0x14) 392*4882a593Smuzhiyun #define MPI2_SCSI_STATUS_RESERVATION_CONFLICT (0x18) 393*4882a593Smuzhiyun #define MPI2_SCSI_STATUS_COMMAND_TERMINATED (0x22) /*obsolete */ 394*4882a593Smuzhiyun #define MPI2_SCSI_STATUS_TASK_SET_FULL (0x28) 395*4882a593Smuzhiyun #define MPI2_SCSI_STATUS_ACA_ACTIVE (0x30) 396*4882a593Smuzhiyun #define MPI2_SCSI_STATUS_TASK_ABORTED (0x40) 397*4882a593Smuzhiyun 398*4882a593Smuzhiyun /*SCSI IO Reply SCSIState flags */ 399*4882a593Smuzhiyun 400*4882a593Smuzhiyun #define MPI2_SCSI_STATE_RESPONSE_INFO_VALID (0x10) 401*4882a593Smuzhiyun #define MPI2_SCSI_STATE_TERMINATED (0x08) 402*4882a593Smuzhiyun #define MPI2_SCSI_STATE_NO_SCSI_STATUS (0x04) 403*4882a593Smuzhiyun #define MPI2_SCSI_STATE_AUTOSENSE_FAILED (0x02) 404*4882a593Smuzhiyun #define MPI2_SCSI_STATE_AUTOSENSE_VALID (0x01) 405*4882a593Smuzhiyun 406*4882a593Smuzhiyun /*masks and shifts for the ResponseInfo field */ 407*4882a593Smuzhiyun 408*4882a593Smuzhiyun #define MPI2_SCSI_RI_MASK_REASONCODE (0x000000FF) 409*4882a593Smuzhiyun #define MPI2_SCSI_RI_SHIFT_REASONCODE (0) 410*4882a593Smuzhiyun 411*4882a593Smuzhiyun #define MPI2_SCSI_TASKTAG_UNKNOWN (0xFFFF) 412*4882a593Smuzhiyun 413*4882a593Smuzhiyun /**************************************************************************** 414*4882a593Smuzhiyun * SCSI Task Management messages 415*4882a593Smuzhiyun ****************************************************************************/ 416*4882a593Smuzhiyun 417*4882a593Smuzhiyun /*SCSI Task Management Request Message */ 418*4882a593Smuzhiyun typedef struct _MPI2_SCSI_TASK_MANAGE_REQUEST { 419*4882a593Smuzhiyun U16 DevHandle; /*0x00 */ 420*4882a593Smuzhiyun U8 ChainOffset; /*0x02 */ 421*4882a593Smuzhiyun U8 Function; /*0x03 */ 422*4882a593Smuzhiyun U8 Reserved1; /*0x04 */ 423*4882a593Smuzhiyun U8 TaskType; /*0x05 */ 424*4882a593Smuzhiyun U8 Reserved2; /*0x06 */ 425*4882a593Smuzhiyun U8 MsgFlags; /*0x07 */ 426*4882a593Smuzhiyun U8 VP_ID; /*0x08 */ 427*4882a593Smuzhiyun U8 VF_ID; /*0x09 */ 428*4882a593Smuzhiyun U16 Reserved3; /*0x0A */ 429*4882a593Smuzhiyun U8 LUN[8]; /*0x0C */ 430*4882a593Smuzhiyun U32 Reserved4[7]; /*0x14 */ 431*4882a593Smuzhiyun U16 TaskMID; /*0x30 */ 432*4882a593Smuzhiyun U16 Reserved5; /*0x32 */ 433*4882a593Smuzhiyun } MPI2_SCSI_TASK_MANAGE_REQUEST, 434*4882a593Smuzhiyun *PTR_MPI2_SCSI_TASK_MANAGE_REQUEST, 435*4882a593Smuzhiyun Mpi2SCSITaskManagementRequest_t, 436*4882a593Smuzhiyun *pMpi2SCSITaskManagementRequest_t; 437*4882a593Smuzhiyun 438*4882a593Smuzhiyun /*TaskType values */ 439*4882a593Smuzhiyun 440*4882a593Smuzhiyun #define MPI2_SCSITASKMGMT_TASKTYPE_ABORT_TASK (0x01) 441*4882a593Smuzhiyun #define MPI2_SCSITASKMGMT_TASKTYPE_ABRT_TASK_SET (0x02) 442*4882a593Smuzhiyun #define MPI2_SCSITASKMGMT_TASKTYPE_TARGET_RESET (0x03) 443*4882a593Smuzhiyun #define MPI2_SCSITASKMGMT_TASKTYPE_LOGICAL_UNIT_RESET (0x05) 444*4882a593Smuzhiyun #define MPI2_SCSITASKMGMT_TASKTYPE_CLEAR_TASK_SET (0x06) 445*4882a593Smuzhiyun #define MPI2_SCSITASKMGMT_TASKTYPE_QUERY_TASK (0x07) 446*4882a593Smuzhiyun #define MPI2_SCSITASKMGMT_TASKTYPE_CLR_ACA (0x08) 447*4882a593Smuzhiyun #define MPI2_SCSITASKMGMT_TASKTYPE_QRY_TASK_SET (0x09) 448*4882a593Smuzhiyun #define MPI2_SCSITASKMGMT_TASKTYPE_QRY_ASYNC_EVENT (0x0A) 449*4882a593Smuzhiyun 450*4882a593Smuzhiyun /*obsolete TaskType name */ 451*4882a593Smuzhiyun #define MPI2_SCSITASKMGMT_TASKTYPE_QRY_UNIT_ATTENTION \ 452*4882a593Smuzhiyun (MPI2_SCSITASKMGMT_TASKTYPE_QRY_ASYNC_EVENT) 453*4882a593Smuzhiyun 454*4882a593Smuzhiyun /*MsgFlags bits */ 455*4882a593Smuzhiyun 456*4882a593Smuzhiyun #define MPI2_SCSITASKMGMT_MSGFLAGS_MASK_TARGET_RESET (0x18) 457*4882a593Smuzhiyun #define MPI26_SCSITASKMGMT_MSGFLAGS_HOT_RESET_PCIE (0x00) 458*4882a593Smuzhiyun #define MPI2_SCSITASKMGMT_MSGFLAGS_LINK_RESET (0x00) 459*4882a593Smuzhiyun #define MPI2_SCSITASKMGMT_MSGFLAGS_NEXUS_RESET_SRST (0x08) 460*4882a593Smuzhiyun #define MPI2_SCSITASKMGMT_MSGFLAGS_SAS_HARD_LINK_RESET (0x10) 461*4882a593Smuzhiyun 462*4882a593Smuzhiyun #define MPI2_SCSITASKMGMT_MSGFLAGS_DO_NOT_SEND_TASK_IU (0x01) 463*4882a593Smuzhiyun #define MPI26_SCSITASKMGMT_MSGFLAGS_PROTOCOL_LVL_RST_PCIE (0x18) 464*4882a593Smuzhiyun 465*4882a593Smuzhiyun /*SCSI Task Management Reply Message */ 466*4882a593Smuzhiyun typedef struct _MPI2_SCSI_TASK_MANAGE_REPLY { 467*4882a593Smuzhiyun U16 DevHandle; /*0x00 */ 468*4882a593Smuzhiyun U8 MsgLength; /*0x02 */ 469*4882a593Smuzhiyun U8 Function; /*0x03 */ 470*4882a593Smuzhiyun U8 ResponseCode; /*0x04 */ 471*4882a593Smuzhiyun U8 TaskType; /*0x05 */ 472*4882a593Smuzhiyun U8 Reserved1; /*0x06 */ 473*4882a593Smuzhiyun U8 MsgFlags; /*0x07 */ 474*4882a593Smuzhiyun U8 VP_ID; /*0x08 */ 475*4882a593Smuzhiyun U8 VF_ID; /*0x09 */ 476*4882a593Smuzhiyun U16 Reserved2; /*0x0A */ 477*4882a593Smuzhiyun U16 Reserved3; /*0x0C */ 478*4882a593Smuzhiyun U16 IOCStatus; /*0x0E */ 479*4882a593Smuzhiyun U32 IOCLogInfo; /*0x10 */ 480*4882a593Smuzhiyun U32 TerminationCount; /*0x14 */ 481*4882a593Smuzhiyun U32 ResponseInfo; /*0x18 */ 482*4882a593Smuzhiyun } MPI2_SCSI_TASK_MANAGE_REPLY, 483*4882a593Smuzhiyun *PTR_MPI2_SCSI_TASK_MANAGE_REPLY, 484*4882a593Smuzhiyun Mpi2SCSITaskManagementReply_t, *pMpi2SCSIManagementReply_t; 485*4882a593Smuzhiyun 486*4882a593Smuzhiyun /*ResponseCode values */ 487*4882a593Smuzhiyun 488*4882a593Smuzhiyun #define MPI2_SCSITASKMGMT_RSP_TM_COMPLETE (0x00) 489*4882a593Smuzhiyun #define MPI2_SCSITASKMGMT_RSP_INVALID_FRAME (0x02) 490*4882a593Smuzhiyun #define MPI2_SCSITASKMGMT_RSP_TM_NOT_SUPPORTED (0x04) 491*4882a593Smuzhiyun #define MPI2_SCSITASKMGMT_RSP_TM_FAILED (0x05) 492*4882a593Smuzhiyun #define MPI2_SCSITASKMGMT_RSP_TM_SUCCEEDED (0x08) 493*4882a593Smuzhiyun #define MPI2_SCSITASKMGMT_RSP_TM_INVALID_LUN (0x09) 494*4882a593Smuzhiyun #define MPI2_SCSITASKMGMT_RSP_TM_OVERLAPPED_TAG (0x0A) 495*4882a593Smuzhiyun #define MPI2_SCSITASKMGMT_RSP_IO_QUEUED_ON_IOC (0x80) 496*4882a593Smuzhiyun 497*4882a593Smuzhiyun /*masks and shifts for the ResponseInfo field */ 498*4882a593Smuzhiyun 499*4882a593Smuzhiyun #define MPI2_SCSITASKMGMT_RI_MASK_REASONCODE (0x000000FF) 500*4882a593Smuzhiyun #define MPI2_SCSITASKMGMT_RI_SHIFT_REASONCODE (0) 501*4882a593Smuzhiyun #define MPI2_SCSITASKMGMT_RI_MASK_ARI2 (0x0000FF00) 502*4882a593Smuzhiyun #define MPI2_SCSITASKMGMT_RI_SHIFT_ARI2 (8) 503*4882a593Smuzhiyun #define MPI2_SCSITASKMGMT_RI_MASK_ARI1 (0x00FF0000) 504*4882a593Smuzhiyun #define MPI2_SCSITASKMGMT_RI_SHIFT_ARI1 (16) 505*4882a593Smuzhiyun #define MPI2_SCSITASKMGMT_RI_MASK_ARI0 (0xFF000000) 506*4882a593Smuzhiyun #define MPI2_SCSITASKMGMT_RI_SHIFT_ARI0 (24) 507*4882a593Smuzhiyun 508*4882a593Smuzhiyun /**************************************************************************** 509*4882a593Smuzhiyun * SCSI Enclosure Processor messages 510*4882a593Smuzhiyun ****************************************************************************/ 511*4882a593Smuzhiyun 512*4882a593Smuzhiyun /*SCSI Enclosure Processor Request Message */ 513*4882a593Smuzhiyun typedef struct _MPI2_SEP_REQUEST { 514*4882a593Smuzhiyun U16 DevHandle; /*0x00 */ 515*4882a593Smuzhiyun U8 ChainOffset; /*0x02 */ 516*4882a593Smuzhiyun U8 Function; /*0x03 */ 517*4882a593Smuzhiyun U8 Action; /*0x04 */ 518*4882a593Smuzhiyun U8 Flags; /*0x05 */ 519*4882a593Smuzhiyun U8 Reserved1; /*0x06 */ 520*4882a593Smuzhiyun U8 MsgFlags; /*0x07 */ 521*4882a593Smuzhiyun U8 VP_ID; /*0x08 */ 522*4882a593Smuzhiyun U8 VF_ID; /*0x09 */ 523*4882a593Smuzhiyun U16 Reserved2; /*0x0A */ 524*4882a593Smuzhiyun U32 SlotStatus; /*0x0C */ 525*4882a593Smuzhiyun U32 Reserved3; /*0x10 */ 526*4882a593Smuzhiyun U32 Reserved4; /*0x14 */ 527*4882a593Smuzhiyun U32 Reserved5; /*0x18 */ 528*4882a593Smuzhiyun U16 Slot; /*0x1C */ 529*4882a593Smuzhiyun U16 EnclosureHandle; /*0x1E */ 530*4882a593Smuzhiyun } MPI2_SEP_REQUEST, *PTR_MPI2_SEP_REQUEST, 531*4882a593Smuzhiyun Mpi2SepRequest_t, *pMpi2SepRequest_t; 532*4882a593Smuzhiyun 533*4882a593Smuzhiyun /*Action defines */ 534*4882a593Smuzhiyun #define MPI2_SEP_REQ_ACTION_WRITE_STATUS (0x00) 535*4882a593Smuzhiyun #define MPI2_SEP_REQ_ACTION_READ_STATUS (0x01) 536*4882a593Smuzhiyun 537*4882a593Smuzhiyun /*Flags defines */ 538*4882a593Smuzhiyun #define MPI2_SEP_REQ_FLAGS_DEVHANDLE_ADDRESS (0x00) 539*4882a593Smuzhiyun #define MPI2_SEP_REQ_FLAGS_ENCLOSURE_SLOT_ADDRESS (0x01) 540*4882a593Smuzhiyun 541*4882a593Smuzhiyun /*SlotStatus defines */ 542*4882a593Smuzhiyun #define MPI2_SEP_REQ_SLOTSTATUS_DEV_OFF (0x00080000) 543*4882a593Smuzhiyun #define MPI2_SEP_REQ_SLOTSTATUS_REQUEST_REMOVE (0x00040000) 544*4882a593Smuzhiyun #define MPI2_SEP_REQ_SLOTSTATUS_IDENTIFY_REQUEST (0x00020000) 545*4882a593Smuzhiyun #define MPI2_SEP_REQ_SLOTSTATUS_REBUILD_STOPPED (0x00000200) 546*4882a593Smuzhiyun #define MPI2_SEP_REQ_SLOTSTATUS_HOT_SPARE (0x00000100) 547*4882a593Smuzhiyun #define MPI2_SEP_REQ_SLOTSTATUS_UNCONFIGURED (0x00000080) 548*4882a593Smuzhiyun #define MPI2_SEP_REQ_SLOTSTATUS_PREDICTED_FAULT (0x00000040) 549*4882a593Smuzhiyun #define MPI2_SEP_REQ_SLOTSTATUS_IN_CRITICAL_ARRAY (0x00000010) 550*4882a593Smuzhiyun #define MPI2_SEP_REQ_SLOTSTATUS_IN_FAILED_ARRAY (0x00000008) 551*4882a593Smuzhiyun #define MPI2_SEP_REQ_SLOTSTATUS_DEV_REBUILDING (0x00000004) 552*4882a593Smuzhiyun #define MPI2_SEP_REQ_SLOTSTATUS_DEV_FAULTY (0x00000002) 553*4882a593Smuzhiyun #define MPI2_SEP_REQ_SLOTSTATUS_NO_ERROR (0x00000001) 554*4882a593Smuzhiyun 555*4882a593Smuzhiyun /*SCSI Enclosure Processor Reply Message */ 556*4882a593Smuzhiyun typedef struct _MPI2_SEP_REPLY { 557*4882a593Smuzhiyun U16 DevHandle; /*0x00 */ 558*4882a593Smuzhiyun U8 MsgLength; /*0x02 */ 559*4882a593Smuzhiyun U8 Function; /*0x03 */ 560*4882a593Smuzhiyun U8 Action; /*0x04 */ 561*4882a593Smuzhiyun U8 Flags; /*0x05 */ 562*4882a593Smuzhiyun U8 Reserved1; /*0x06 */ 563*4882a593Smuzhiyun U8 MsgFlags; /*0x07 */ 564*4882a593Smuzhiyun U8 VP_ID; /*0x08 */ 565*4882a593Smuzhiyun U8 VF_ID; /*0x09 */ 566*4882a593Smuzhiyun U16 Reserved2; /*0x0A */ 567*4882a593Smuzhiyun U16 Reserved3; /*0x0C */ 568*4882a593Smuzhiyun U16 IOCStatus; /*0x0E */ 569*4882a593Smuzhiyun U32 IOCLogInfo; /*0x10 */ 570*4882a593Smuzhiyun U32 SlotStatus; /*0x14 */ 571*4882a593Smuzhiyun U32 Reserved4; /*0x18 */ 572*4882a593Smuzhiyun U16 Slot; /*0x1C */ 573*4882a593Smuzhiyun U16 EnclosureHandle; /*0x1E */ 574*4882a593Smuzhiyun } MPI2_SEP_REPLY, *PTR_MPI2_SEP_REPLY, 575*4882a593Smuzhiyun Mpi2SepReply_t, *pMpi2SepReply_t; 576*4882a593Smuzhiyun 577*4882a593Smuzhiyun /*SlotStatus defines */ 578*4882a593Smuzhiyun #define MPI2_SEP_REPLY_SLOTSTATUS_DEV_OFF (0x00080000) 579*4882a593Smuzhiyun #define MPI2_SEP_REPLY_SLOTSTATUS_REMOVE_READY (0x00040000) 580*4882a593Smuzhiyun #define MPI2_SEP_REPLY_SLOTSTATUS_IDENTIFY_REQUEST (0x00020000) 581*4882a593Smuzhiyun #define MPI2_SEP_REPLY_SLOTSTATUS_REBUILD_STOPPED (0x00000200) 582*4882a593Smuzhiyun #define MPI2_SEP_REPLY_SLOTSTATUS_HOT_SPARE (0x00000100) 583*4882a593Smuzhiyun #define MPI2_SEP_REPLY_SLOTSTATUS_UNCONFIGURED (0x00000080) 584*4882a593Smuzhiyun #define MPI2_SEP_REPLY_SLOTSTATUS_PREDICTED_FAULT (0x00000040) 585*4882a593Smuzhiyun #define MPI2_SEP_REPLY_SLOTSTATUS_IN_CRITICAL_ARRAY (0x00000010) 586*4882a593Smuzhiyun #define MPI2_SEP_REPLY_SLOTSTATUS_IN_FAILED_ARRAY (0x00000008) 587*4882a593Smuzhiyun #define MPI2_SEP_REPLY_SLOTSTATUS_DEV_REBUILDING (0x00000004) 588*4882a593Smuzhiyun #define MPI2_SEP_REPLY_SLOTSTATUS_DEV_FAULTY (0x00000002) 589*4882a593Smuzhiyun #define MPI2_SEP_REPLY_SLOTSTATUS_NO_ERROR (0x00000001) 590*4882a593Smuzhiyun 591*4882a593Smuzhiyun #endif 592