1*4882a593Smuzhiyun /* SPDX-License-Identifier: GPL-2.0 */ 2*4882a593Smuzhiyun #ifndef __MEGARAID_H__ 3*4882a593Smuzhiyun #define __MEGARAID_H__ 4*4882a593Smuzhiyun 5*4882a593Smuzhiyun #include <linux/spinlock.h> 6*4882a593Smuzhiyun #include <linux/mutex.h> 7*4882a593Smuzhiyun 8*4882a593Smuzhiyun #define MEGARAID_VERSION \ 9*4882a593Smuzhiyun "v2.00.4 (Release Date: Thu Feb 9 08:51:30 EST 2006)\n" 10*4882a593Smuzhiyun 11*4882a593Smuzhiyun /* 12*4882a593Smuzhiyun * Driver features - change the values to enable or disable features in the 13*4882a593Smuzhiyun * driver. 14*4882a593Smuzhiyun */ 15*4882a593Smuzhiyun 16*4882a593Smuzhiyun /* 17*4882a593Smuzhiyun * Command coalescing - This feature allows the driver to be able to combine 18*4882a593Smuzhiyun * two or more commands and issue as one command in order to boost I/O 19*4882a593Smuzhiyun * performance. Useful if the nature of the I/O is sequential. It is not very 20*4882a593Smuzhiyun * useful for random natured I/Os. 21*4882a593Smuzhiyun */ 22*4882a593Smuzhiyun #define MEGA_HAVE_COALESCING 0 23*4882a593Smuzhiyun 24*4882a593Smuzhiyun /* 25*4882a593Smuzhiyun * Clustering support - Set this flag if you are planning to use the 26*4882a593Smuzhiyun * clustering services provided by the megaraid controllers and planning to 27*4882a593Smuzhiyun * setup a cluster 28*4882a593Smuzhiyun */ 29*4882a593Smuzhiyun #define MEGA_HAVE_CLUSTERING 1 30*4882a593Smuzhiyun 31*4882a593Smuzhiyun /* 32*4882a593Smuzhiyun * Driver statistics - Set this flag if you are interested in statics about 33*4882a593Smuzhiyun * number of I/O completed on each logical drive and how many interrupts 34*4882a593Smuzhiyun * generated. If enabled, this information is available through /proc 35*4882a593Smuzhiyun * interface and through the private ioctl. Setting this flag has a 36*4882a593Smuzhiyun * performance penalty. 37*4882a593Smuzhiyun */ 38*4882a593Smuzhiyun #define MEGA_HAVE_STATS 0 39*4882a593Smuzhiyun 40*4882a593Smuzhiyun /* 41*4882a593Smuzhiyun * Enhanced /proc interface - This feature will allow you to have a more 42*4882a593Smuzhiyun * detailed /proc interface for megaraid driver. E.g., a real time update of 43*4882a593Smuzhiyun * the status of the logical drives, battery status, physical drives etc. 44*4882a593Smuzhiyun */ 45*4882a593Smuzhiyun #define MEGA_HAVE_ENH_PROC 1 46*4882a593Smuzhiyun 47*4882a593Smuzhiyun #define MAX_DEV_TYPE 32 48*4882a593Smuzhiyun 49*4882a593Smuzhiyun #define PCI_DEVICE_ID_DISCOVERY 0x000E 50*4882a593Smuzhiyun #define PCI_DEVICE_ID_PERC4_DI 0x000F 51*4882a593Smuzhiyun #define PCI_DEVICE_ID_PERC4_QC_VERDE 0x0407 52*4882a593Smuzhiyun 53*4882a593Smuzhiyun #define HBA_SIGNATURE 0x3344 54*4882a593Smuzhiyun #define HBA_SIGNATURE_471 0xCCCC 55*4882a593Smuzhiyun #define HBA_SIGNATURE_64BIT 0x0299 56*4882a593Smuzhiyun 57*4882a593Smuzhiyun #define MBOX_BUSY_WAIT 10 /* wait for up to 10 usec for 58*4882a593Smuzhiyun mailbox to be free */ 59*4882a593Smuzhiyun #define DEFAULT_INITIATOR_ID 7 60*4882a593Smuzhiyun 61*4882a593Smuzhiyun #define MAX_SGLIST 64 /* max supported in f/w */ 62*4882a593Smuzhiyun #define MIN_SGLIST 26 /* guaranteed to support these many */ 63*4882a593Smuzhiyun #define MAX_COMMANDS 126 64*4882a593Smuzhiyun #define CMDID_INT_CMDS MAX_COMMANDS+1 /* make sure CMDID_INT_CMDS 65*4882a593Smuzhiyun is less than max commands 66*4882a593Smuzhiyun supported by any f/w */ 67*4882a593Smuzhiyun 68*4882a593Smuzhiyun #define MAX_CDB_LEN 10 69*4882a593Smuzhiyun #define MAX_EXT_CDB_LEN 16 /* we support cdb length up to 16 */ 70*4882a593Smuzhiyun 71*4882a593Smuzhiyun #define DEF_CMD_PER_LUN 63 72*4882a593Smuzhiyun #define MAX_CMD_PER_LUN MAX_COMMANDS 73*4882a593Smuzhiyun #define MAX_FIRMWARE_STATUS 46 74*4882a593Smuzhiyun #define MAX_XFER_PER_CMD (64*1024) 75*4882a593Smuzhiyun #define MAX_SECTORS_PER_IO 128 76*4882a593Smuzhiyun 77*4882a593Smuzhiyun #define MAX_LOGICAL_DRIVES_40LD 40 78*4882a593Smuzhiyun #define FC_MAX_PHYSICAL_DEVICES 256 79*4882a593Smuzhiyun #define MAX_LOGICAL_DRIVES_8LD 8 80*4882a593Smuzhiyun #define MAX_CHANNELS 5 81*4882a593Smuzhiyun #define MAX_TARGET 15 82*4882a593Smuzhiyun #define MAX_PHYSICAL_DRIVES MAX_CHANNELS*MAX_TARGET 83*4882a593Smuzhiyun #define MAX_ROW_SIZE_40LD 32 84*4882a593Smuzhiyun #define MAX_ROW_SIZE_8LD 8 85*4882a593Smuzhiyun #define MAX_SPAN_DEPTH 8 86*4882a593Smuzhiyun 87*4882a593Smuzhiyun #define NVIRT_CHAN 4 /* # of virtual channels to represent 88*4882a593Smuzhiyun up to 60 logical drives */ 89*4882a593Smuzhiyun struct mbox_out { 90*4882a593Smuzhiyun /* 0x0 */ u8 cmd; 91*4882a593Smuzhiyun /* 0x1 */ u8 cmdid; 92*4882a593Smuzhiyun /* 0x2 */ u16 numsectors; 93*4882a593Smuzhiyun /* 0x4 */ u32 lba; 94*4882a593Smuzhiyun /* 0x8 */ u32 xferaddr; 95*4882a593Smuzhiyun /* 0xC */ u8 logdrv; 96*4882a593Smuzhiyun /* 0xD */ u8 numsgelements; 97*4882a593Smuzhiyun /* 0xE */ u8 resvd; 98*4882a593Smuzhiyun } __attribute__ ((packed)); 99*4882a593Smuzhiyun 100*4882a593Smuzhiyun struct mbox_in { 101*4882a593Smuzhiyun /* 0xF */ volatile u8 busy; 102*4882a593Smuzhiyun /* 0x10 */ volatile u8 numstatus; 103*4882a593Smuzhiyun /* 0x11 */ volatile u8 status; 104*4882a593Smuzhiyun /* 0x12 */ volatile u8 completed[MAX_FIRMWARE_STATUS]; 105*4882a593Smuzhiyun volatile u8 poll; 106*4882a593Smuzhiyun volatile u8 ack; 107*4882a593Smuzhiyun } __attribute__ ((packed)); 108*4882a593Smuzhiyun 109*4882a593Smuzhiyun typedef struct { 110*4882a593Smuzhiyun struct mbox_out m_out; 111*4882a593Smuzhiyun struct mbox_in m_in; 112*4882a593Smuzhiyun } __attribute__ ((packed)) mbox_t; 113*4882a593Smuzhiyun 114*4882a593Smuzhiyun typedef struct { 115*4882a593Smuzhiyun u32 xfer_segment_lo; 116*4882a593Smuzhiyun u32 xfer_segment_hi; 117*4882a593Smuzhiyun mbox_t mbox; 118*4882a593Smuzhiyun } __attribute__ ((packed)) mbox64_t; 119*4882a593Smuzhiyun 120*4882a593Smuzhiyun 121*4882a593Smuzhiyun /* 122*4882a593Smuzhiyun * Passthru definitions 123*4882a593Smuzhiyun */ 124*4882a593Smuzhiyun #define MAX_REQ_SENSE_LEN 0x20 125*4882a593Smuzhiyun 126*4882a593Smuzhiyun typedef struct { 127*4882a593Smuzhiyun u8 timeout:3; /* 0=6sec/1=60sec/2=10min/3=3hrs */ 128*4882a593Smuzhiyun u8 ars:1; 129*4882a593Smuzhiyun u8 reserved:3; 130*4882a593Smuzhiyun u8 islogical:1; 131*4882a593Smuzhiyun u8 logdrv; /* if islogical == 1 */ 132*4882a593Smuzhiyun u8 channel; /* if islogical == 0 */ 133*4882a593Smuzhiyun u8 target; /* if islogical == 0 */ 134*4882a593Smuzhiyun u8 queuetag; /* unused */ 135*4882a593Smuzhiyun u8 queueaction; /* unused */ 136*4882a593Smuzhiyun u8 cdb[MAX_CDB_LEN]; 137*4882a593Smuzhiyun u8 cdblen; 138*4882a593Smuzhiyun u8 reqsenselen; 139*4882a593Smuzhiyun u8 reqsensearea[MAX_REQ_SENSE_LEN]; 140*4882a593Smuzhiyun u8 numsgelements; 141*4882a593Smuzhiyun u8 scsistatus; 142*4882a593Smuzhiyun u32 dataxferaddr; 143*4882a593Smuzhiyun u32 dataxferlen; 144*4882a593Smuzhiyun } __attribute__ ((packed)) mega_passthru; 145*4882a593Smuzhiyun 146*4882a593Smuzhiyun 147*4882a593Smuzhiyun /* 148*4882a593Smuzhiyun * Extended passthru: support CDB > 10 bytes 149*4882a593Smuzhiyun */ 150*4882a593Smuzhiyun typedef struct { 151*4882a593Smuzhiyun u8 timeout:3; /* 0=6sec/1=60sec/2=10min/3=3hrs */ 152*4882a593Smuzhiyun u8 ars:1; 153*4882a593Smuzhiyun u8 rsvd1:1; 154*4882a593Smuzhiyun u8 cd_rom:1; 155*4882a593Smuzhiyun u8 rsvd2:1; 156*4882a593Smuzhiyun u8 islogical:1; 157*4882a593Smuzhiyun u8 logdrv; /* if islogical == 1 */ 158*4882a593Smuzhiyun u8 channel; /* if islogical == 0 */ 159*4882a593Smuzhiyun u8 target; /* if islogical == 0 */ 160*4882a593Smuzhiyun u8 queuetag; /* unused */ 161*4882a593Smuzhiyun u8 queueaction; /* unused */ 162*4882a593Smuzhiyun u8 cdblen; 163*4882a593Smuzhiyun u8 rsvd3; 164*4882a593Smuzhiyun u8 cdb[MAX_EXT_CDB_LEN]; 165*4882a593Smuzhiyun u8 numsgelements; 166*4882a593Smuzhiyun u8 status; 167*4882a593Smuzhiyun u8 reqsenselen; 168*4882a593Smuzhiyun u8 reqsensearea[MAX_REQ_SENSE_LEN]; 169*4882a593Smuzhiyun u8 rsvd4; 170*4882a593Smuzhiyun u32 dataxferaddr; 171*4882a593Smuzhiyun u32 dataxferlen; 172*4882a593Smuzhiyun } __attribute__ ((packed)) mega_ext_passthru; 173*4882a593Smuzhiyun 174*4882a593Smuzhiyun typedef struct { 175*4882a593Smuzhiyun u64 address; 176*4882a593Smuzhiyun u32 length; 177*4882a593Smuzhiyun } __attribute__ ((packed)) mega_sgl64; 178*4882a593Smuzhiyun 179*4882a593Smuzhiyun typedef struct { 180*4882a593Smuzhiyun u32 address; 181*4882a593Smuzhiyun u32 length; 182*4882a593Smuzhiyun } __attribute__ ((packed)) mega_sglist; 183*4882a593Smuzhiyun 184*4882a593Smuzhiyun 185*4882a593Smuzhiyun /* Queued command data */ 186*4882a593Smuzhiyun typedef struct { 187*4882a593Smuzhiyun int idx; 188*4882a593Smuzhiyun u32 state; 189*4882a593Smuzhiyun struct list_head list; 190*4882a593Smuzhiyun u8 raw_mbox[66]; 191*4882a593Smuzhiyun u32 dma_type; 192*4882a593Smuzhiyun u32 dma_direction; 193*4882a593Smuzhiyun 194*4882a593Smuzhiyun struct scsi_cmnd *cmd; 195*4882a593Smuzhiyun dma_addr_t dma_h_bulkdata; 196*4882a593Smuzhiyun dma_addr_t dma_h_sgdata; 197*4882a593Smuzhiyun 198*4882a593Smuzhiyun mega_sglist *sgl; 199*4882a593Smuzhiyun mega_sgl64 *sgl64; 200*4882a593Smuzhiyun dma_addr_t sgl_dma_addr; 201*4882a593Smuzhiyun 202*4882a593Smuzhiyun mega_passthru *pthru; 203*4882a593Smuzhiyun dma_addr_t pthru_dma_addr; 204*4882a593Smuzhiyun mega_ext_passthru *epthru; 205*4882a593Smuzhiyun dma_addr_t epthru_dma_addr; 206*4882a593Smuzhiyun } scb_t; 207*4882a593Smuzhiyun 208*4882a593Smuzhiyun /* 209*4882a593Smuzhiyun * Flags to follow the scb as it transitions between various stages 210*4882a593Smuzhiyun */ 211*4882a593Smuzhiyun #define SCB_FREE 0x0000 /* on the free list */ 212*4882a593Smuzhiyun #define SCB_ACTIVE 0x0001 /* off the free list */ 213*4882a593Smuzhiyun #define SCB_PENDQ 0x0002 /* on the pending queue */ 214*4882a593Smuzhiyun #define SCB_ISSUED 0x0004 /* issued - owner f/w */ 215*4882a593Smuzhiyun #define SCB_ABORT 0x0008 /* Got an abort for this one */ 216*4882a593Smuzhiyun #define SCB_RESET 0x0010 /* Got a reset for this one */ 217*4882a593Smuzhiyun 218*4882a593Smuzhiyun /* 219*4882a593Smuzhiyun * Utilities declare this strcture size as 1024 bytes. So more fields can 220*4882a593Smuzhiyun * be added in future. 221*4882a593Smuzhiyun */ 222*4882a593Smuzhiyun typedef struct { 223*4882a593Smuzhiyun u32 data_size; /* current size in bytes (not including resvd) */ 224*4882a593Smuzhiyun 225*4882a593Smuzhiyun u32 config_signature; 226*4882a593Smuzhiyun /* Current value is 0x00282008 227*4882a593Smuzhiyun * 0x28=MAX_LOGICAL_DRIVES, 228*4882a593Smuzhiyun * 0x20=Number of stripes and 229*4882a593Smuzhiyun * 0x08=Number of spans */ 230*4882a593Smuzhiyun 231*4882a593Smuzhiyun u8 fw_version[16]; /* printable ASCI string */ 232*4882a593Smuzhiyun u8 bios_version[16]; /* printable ASCI string */ 233*4882a593Smuzhiyun u8 product_name[80]; /* printable ASCI string */ 234*4882a593Smuzhiyun 235*4882a593Smuzhiyun u8 max_commands; /* Max. concurrent commands supported */ 236*4882a593Smuzhiyun u8 nchannels; /* Number of SCSI Channels detected */ 237*4882a593Smuzhiyun u8 fc_loop_present; /* Number of Fibre Loops detected */ 238*4882a593Smuzhiyun u8 mem_type; /* EDO, FPM, SDRAM etc */ 239*4882a593Smuzhiyun 240*4882a593Smuzhiyun u32 signature; 241*4882a593Smuzhiyun u16 dram_size; /* In terms of MB */ 242*4882a593Smuzhiyun u16 subsysid; 243*4882a593Smuzhiyun 244*4882a593Smuzhiyun u16 subsysvid; 245*4882a593Smuzhiyun u8 notify_counters; 246*4882a593Smuzhiyun u8 pad1k[889]; /* 135 + 889 resvd = 1024 total size */ 247*4882a593Smuzhiyun } __attribute__ ((packed)) mega_product_info; 248*4882a593Smuzhiyun 249*4882a593Smuzhiyun struct notify { 250*4882a593Smuzhiyun u32 global_counter; /* Any change increments this counter */ 251*4882a593Smuzhiyun 252*4882a593Smuzhiyun u8 param_counter; /* Indicates any params changed */ 253*4882a593Smuzhiyun u8 param_id; /* Param modified - defined below */ 254*4882a593Smuzhiyun u16 param_val; /* New val of last param modified */ 255*4882a593Smuzhiyun 256*4882a593Smuzhiyun u8 write_config_counter; /* write config occurred */ 257*4882a593Smuzhiyun u8 write_config_rsvd[3]; 258*4882a593Smuzhiyun 259*4882a593Smuzhiyun u8 ldrv_op_counter; /* Indicates ldrv op started/completed */ 260*4882a593Smuzhiyun u8 ldrv_opid; /* ldrv num */ 261*4882a593Smuzhiyun u8 ldrv_opcmd; /* ldrv operation - defined below */ 262*4882a593Smuzhiyun u8 ldrv_opstatus; /* status of the operation */ 263*4882a593Smuzhiyun 264*4882a593Smuzhiyun u8 ldrv_state_counter; /* Indicates change of ldrv state */ 265*4882a593Smuzhiyun u8 ldrv_state_id; /* ldrv num */ 266*4882a593Smuzhiyun u8 ldrv_state_new; /* New state */ 267*4882a593Smuzhiyun u8 ldrv_state_old; /* old state */ 268*4882a593Smuzhiyun 269*4882a593Smuzhiyun u8 pdrv_state_counter; /* Indicates change of ldrv state */ 270*4882a593Smuzhiyun u8 pdrv_state_id; /* pdrv id */ 271*4882a593Smuzhiyun u8 pdrv_state_new; /* New state */ 272*4882a593Smuzhiyun u8 pdrv_state_old; /* old state */ 273*4882a593Smuzhiyun 274*4882a593Smuzhiyun u8 pdrv_fmt_counter; /* Indicates pdrv format started/over */ 275*4882a593Smuzhiyun u8 pdrv_fmt_id; /* pdrv id */ 276*4882a593Smuzhiyun u8 pdrv_fmt_val; /* format started/over */ 277*4882a593Smuzhiyun u8 pdrv_fmt_rsvd; 278*4882a593Smuzhiyun 279*4882a593Smuzhiyun u8 targ_xfer_counter; /* Indicates SCSI-2 Xfer rate change */ 280*4882a593Smuzhiyun u8 targ_xfer_id; /* pdrv Id */ 281*4882a593Smuzhiyun u8 targ_xfer_val; /* new Xfer params of last pdrv */ 282*4882a593Smuzhiyun u8 targ_xfer_rsvd; 283*4882a593Smuzhiyun 284*4882a593Smuzhiyun u8 fcloop_id_chg_counter; /* Indicates loopid changed */ 285*4882a593Smuzhiyun u8 fcloopid_pdrvid; /* pdrv id */ 286*4882a593Smuzhiyun u8 fcloop_id0; /* loopid on fc loop 0 */ 287*4882a593Smuzhiyun u8 fcloop_id1; /* loopid on fc loop 1 */ 288*4882a593Smuzhiyun 289*4882a593Smuzhiyun u8 fcloop_state_counter; /* Indicates loop state changed */ 290*4882a593Smuzhiyun u8 fcloop_state0; /* state of fc loop 0 */ 291*4882a593Smuzhiyun u8 fcloop_state1; /* state of fc loop 1 */ 292*4882a593Smuzhiyun u8 fcloop_state_rsvd; 293*4882a593Smuzhiyun } __attribute__ ((packed)); 294*4882a593Smuzhiyun 295*4882a593Smuzhiyun #define MAX_NOTIFY_SIZE 0x80 296*4882a593Smuzhiyun #define CUR_NOTIFY_SIZE sizeof(struct notify) 297*4882a593Smuzhiyun 298*4882a593Smuzhiyun typedef struct { 299*4882a593Smuzhiyun u32 data_size; /* current size in bytes (not including resvd) */ 300*4882a593Smuzhiyun 301*4882a593Smuzhiyun struct notify notify; 302*4882a593Smuzhiyun 303*4882a593Smuzhiyun u8 notify_rsvd[MAX_NOTIFY_SIZE - CUR_NOTIFY_SIZE]; 304*4882a593Smuzhiyun 305*4882a593Smuzhiyun u8 rebuild_rate; /* Rebuild rate (0% - 100%) */ 306*4882a593Smuzhiyun u8 cache_flush_interval; /* In terms of Seconds */ 307*4882a593Smuzhiyun u8 sense_alert; 308*4882a593Smuzhiyun u8 drive_insert_count; /* drive insertion count */ 309*4882a593Smuzhiyun 310*4882a593Smuzhiyun u8 battery_status; 311*4882a593Smuzhiyun u8 num_ldrv; /* No. of Log Drives configured */ 312*4882a593Smuzhiyun u8 recon_state[MAX_LOGICAL_DRIVES_40LD / 8]; /* State of 313*4882a593Smuzhiyun reconstruct */ 314*4882a593Smuzhiyun u16 ldrv_op_status[MAX_LOGICAL_DRIVES_40LD / 8]; /* logdrv 315*4882a593Smuzhiyun Status */ 316*4882a593Smuzhiyun 317*4882a593Smuzhiyun u32 ldrv_size[MAX_LOGICAL_DRIVES_40LD];/* Size of each log drv */ 318*4882a593Smuzhiyun u8 ldrv_prop[MAX_LOGICAL_DRIVES_40LD]; 319*4882a593Smuzhiyun u8 ldrv_state[MAX_LOGICAL_DRIVES_40LD];/* State of log drives */ 320*4882a593Smuzhiyun u8 pdrv_state[FC_MAX_PHYSICAL_DEVICES];/* State of phys drvs. */ 321*4882a593Smuzhiyun u16 pdrv_format[FC_MAX_PHYSICAL_DEVICES / 16]; 322*4882a593Smuzhiyun 323*4882a593Smuzhiyun u8 targ_xfer[80]; /* phys device transfer rate */ 324*4882a593Smuzhiyun u8 pad1k[263]; /* 761 + 263reserved = 1024 bytes total size */ 325*4882a593Smuzhiyun } __attribute__ ((packed)) mega_inquiry3; 326*4882a593Smuzhiyun 327*4882a593Smuzhiyun 328*4882a593Smuzhiyun /* Structures */ 329*4882a593Smuzhiyun typedef struct { 330*4882a593Smuzhiyun u8 max_commands; /* Max concurrent commands supported */ 331*4882a593Smuzhiyun u8 rebuild_rate; /* Rebuild rate - 0% thru 100% */ 332*4882a593Smuzhiyun u8 max_targ_per_chan; /* Max targ per channel */ 333*4882a593Smuzhiyun u8 nchannels; /* Number of channels on HBA */ 334*4882a593Smuzhiyun u8 fw_version[4]; /* Firmware version */ 335*4882a593Smuzhiyun u16 age_of_flash; /* Number of times FW has been flashed */ 336*4882a593Smuzhiyun u8 chip_set_value; /* Contents of 0xC0000832 */ 337*4882a593Smuzhiyun u8 dram_size; /* In MB */ 338*4882a593Smuzhiyun u8 cache_flush_interval; /* in seconds */ 339*4882a593Smuzhiyun u8 bios_version[4]; 340*4882a593Smuzhiyun u8 board_type; 341*4882a593Smuzhiyun u8 sense_alert; 342*4882a593Smuzhiyun u8 write_config_count; /* Increase with every configuration 343*4882a593Smuzhiyun change */ 344*4882a593Smuzhiyun u8 drive_inserted_count; /* Increase with every drive inserted 345*4882a593Smuzhiyun */ 346*4882a593Smuzhiyun u8 inserted_drive; /* Channel:Id of inserted drive */ 347*4882a593Smuzhiyun u8 battery_status; /* 348*4882a593Smuzhiyun * BIT 0: battery module missing 349*4882a593Smuzhiyun * BIT 1: VBAD 350*4882a593Smuzhiyun * BIT 2: temperature high 351*4882a593Smuzhiyun * BIT 3: battery pack missing 352*4882a593Smuzhiyun * BIT 4,5: 353*4882a593Smuzhiyun * 00 - charge complete 354*4882a593Smuzhiyun * 01 - fast charge in progress 355*4882a593Smuzhiyun * 10 - fast charge fail 356*4882a593Smuzhiyun * 11 - undefined 357*4882a593Smuzhiyun * Bit 6: counter > 1000 358*4882a593Smuzhiyun * Bit 7: Undefined 359*4882a593Smuzhiyun */ 360*4882a593Smuzhiyun u8 dec_fault_bus_info; 361*4882a593Smuzhiyun } __attribute__ ((packed)) mega_adp_info; 362*4882a593Smuzhiyun 363*4882a593Smuzhiyun 364*4882a593Smuzhiyun typedef struct { 365*4882a593Smuzhiyun u8 num_ldrv; /* Number of logical drives configured */ 366*4882a593Smuzhiyun u8 rsvd[3]; 367*4882a593Smuzhiyun u32 ldrv_size[MAX_LOGICAL_DRIVES_8LD]; 368*4882a593Smuzhiyun u8 ldrv_prop[MAX_LOGICAL_DRIVES_8LD]; 369*4882a593Smuzhiyun u8 ldrv_state[MAX_LOGICAL_DRIVES_8LD]; 370*4882a593Smuzhiyun } __attribute__ ((packed)) mega_ldrv_info; 371*4882a593Smuzhiyun 372*4882a593Smuzhiyun typedef struct { 373*4882a593Smuzhiyun u8 pdrv_state[MAX_PHYSICAL_DRIVES]; 374*4882a593Smuzhiyun u8 rsvd; 375*4882a593Smuzhiyun } __attribute__ ((packed)) mega_pdrv_info; 376*4882a593Smuzhiyun 377*4882a593Smuzhiyun /* RAID inquiry: Mailbox command 0x05*/ 378*4882a593Smuzhiyun typedef struct { 379*4882a593Smuzhiyun mega_adp_info adapter_info; 380*4882a593Smuzhiyun mega_ldrv_info logdrv_info; 381*4882a593Smuzhiyun mega_pdrv_info pdrv_info; 382*4882a593Smuzhiyun } __attribute__ ((packed)) mraid_inquiry; 383*4882a593Smuzhiyun 384*4882a593Smuzhiyun 385*4882a593Smuzhiyun /* RAID extended inquiry: Mailbox command 0x04*/ 386*4882a593Smuzhiyun typedef struct { 387*4882a593Smuzhiyun mraid_inquiry raid_inq; 388*4882a593Smuzhiyun u16 phys_drv_format[MAX_CHANNELS]; 389*4882a593Smuzhiyun u8 stack_attn; 390*4882a593Smuzhiyun u8 modem_status; 391*4882a593Smuzhiyun u8 rsvd[2]; 392*4882a593Smuzhiyun } __attribute__ ((packed)) mraid_ext_inquiry; 393*4882a593Smuzhiyun 394*4882a593Smuzhiyun 395*4882a593Smuzhiyun typedef struct { 396*4882a593Smuzhiyun u8 channel; 397*4882a593Smuzhiyun u8 target; 398*4882a593Smuzhiyun }__attribute__ ((packed)) adp_device; 399*4882a593Smuzhiyun 400*4882a593Smuzhiyun typedef struct { 401*4882a593Smuzhiyun u32 start_blk; /* starting block */ 402*4882a593Smuzhiyun u32 num_blks; /* # of blocks */ 403*4882a593Smuzhiyun adp_device device[MAX_ROW_SIZE_40LD]; 404*4882a593Smuzhiyun }__attribute__ ((packed)) adp_span_40ld; 405*4882a593Smuzhiyun 406*4882a593Smuzhiyun typedef struct { 407*4882a593Smuzhiyun u32 start_blk; /* starting block */ 408*4882a593Smuzhiyun u32 num_blks; /* # of blocks */ 409*4882a593Smuzhiyun adp_device device[MAX_ROW_SIZE_8LD]; 410*4882a593Smuzhiyun }__attribute__ ((packed)) adp_span_8ld; 411*4882a593Smuzhiyun 412*4882a593Smuzhiyun typedef struct { 413*4882a593Smuzhiyun u8 span_depth; /* Total # of spans */ 414*4882a593Smuzhiyun u8 level; /* RAID level */ 415*4882a593Smuzhiyun u8 read_ahead; /* read ahead, no read ahead, adaptive read 416*4882a593Smuzhiyun ahead */ 417*4882a593Smuzhiyun u8 stripe_sz; /* Encoded stripe size */ 418*4882a593Smuzhiyun u8 status; /* Status of the logical drive */ 419*4882a593Smuzhiyun u8 write_mode; /* write mode, write_through/write_back */ 420*4882a593Smuzhiyun u8 direct_io; /* direct io or through cache */ 421*4882a593Smuzhiyun u8 row_size; /* Number of stripes in a row */ 422*4882a593Smuzhiyun } __attribute__ ((packed)) logdrv_param; 423*4882a593Smuzhiyun 424*4882a593Smuzhiyun typedef struct { 425*4882a593Smuzhiyun logdrv_param lparam; 426*4882a593Smuzhiyun adp_span_40ld span[MAX_SPAN_DEPTH]; 427*4882a593Smuzhiyun }__attribute__ ((packed)) logdrv_40ld; 428*4882a593Smuzhiyun 429*4882a593Smuzhiyun typedef struct { 430*4882a593Smuzhiyun logdrv_param lparam; 431*4882a593Smuzhiyun adp_span_8ld span[MAX_SPAN_DEPTH]; 432*4882a593Smuzhiyun }__attribute__ ((packed)) logdrv_8ld; 433*4882a593Smuzhiyun 434*4882a593Smuzhiyun typedef struct { 435*4882a593Smuzhiyun u8 type; /* Type of the device */ 436*4882a593Smuzhiyun u8 cur_status; /* current status of the device */ 437*4882a593Smuzhiyun u8 tag_depth; /* Level of tagging */ 438*4882a593Smuzhiyun u8 sync_neg; /* sync negotiation - ENABLE or DISABLE */ 439*4882a593Smuzhiyun u32 size; /* configurable size in terms of 512 byte 440*4882a593Smuzhiyun blocks */ 441*4882a593Smuzhiyun }__attribute__ ((packed)) phys_drv; 442*4882a593Smuzhiyun 443*4882a593Smuzhiyun typedef struct { 444*4882a593Smuzhiyun u8 nlog_drives; /* number of logical drives */ 445*4882a593Smuzhiyun u8 resvd[3]; 446*4882a593Smuzhiyun logdrv_40ld ldrv[MAX_LOGICAL_DRIVES_40LD]; 447*4882a593Smuzhiyun phys_drv pdrv[MAX_PHYSICAL_DRIVES]; 448*4882a593Smuzhiyun }__attribute__ ((packed)) disk_array_40ld; 449*4882a593Smuzhiyun 450*4882a593Smuzhiyun typedef struct { 451*4882a593Smuzhiyun u8 nlog_drives; /* number of logical drives */ 452*4882a593Smuzhiyun u8 resvd[3]; 453*4882a593Smuzhiyun logdrv_8ld ldrv[MAX_LOGICAL_DRIVES_8LD]; 454*4882a593Smuzhiyun phys_drv pdrv[MAX_PHYSICAL_DRIVES]; 455*4882a593Smuzhiyun }__attribute__ ((packed)) disk_array_8ld; 456*4882a593Smuzhiyun 457*4882a593Smuzhiyun 458*4882a593Smuzhiyun /* 459*4882a593Smuzhiyun * User ioctl structure. 460*4882a593Smuzhiyun * This structure will be used for Traditional Method ioctl interface 461*4882a593Smuzhiyun * commands (0x80),Alternate Buffer Method (0x81) ioctl commands and the 462*4882a593Smuzhiyun * Driver ioctls. 463*4882a593Smuzhiyun * The Driver ioctl interface handles the commands at the driver level, 464*4882a593Smuzhiyun * without being sent to the card. 465*4882a593Smuzhiyun */ 466*4882a593Smuzhiyun /* system call imposed limit. Change accordingly */ 467*4882a593Smuzhiyun #define IOCTL_MAX_DATALEN 4096 468*4882a593Smuzhiyun 469*4882a593Smuzhiyun struct uioctl_t { 470*4882a593Smuzhiyun u32 inlen; 471*4882a593Smuzhiyun u32 outlen; 472*4882a593Smuzhiyun union { 473*4882a593Smuzhiyun u8 fca[16]; 474*4882a593Smuzhiyun struct { 475*4882a593Smuzhiyun u8 opcode; 476*4882a593Smuzhiyun u8 subopcode; 477*4882a593Smuzhiyun u16 adapno; 478*4882a593Smuzhiyun #if BITS_PER_LONG == 32 479*4882a593Smuzhiyun u8 *buffer; 480*4882a593Smuzhiyun u8 pad[4]; 481*4882a593Smuzhiyun #endif 482*4882a593Smuzhiyun #if BITS_PER_LONG == 64 483*4882a593Smuzhiyun u8 *buffer; 484*4882a593Smuzhiyun #endif 485*4882a593Smuzhiyun u32 length; 486*4882a593Smuzhiyun } __attribute__ ((packed)) fcs; 487*4882a593Smuzhiyun } __attribute__ ((packed)) ui; 488*4882a593Smuzhiyun u8 mbox[18]; /* 16 bytes + 2 status bytes */ 489*4882a593Smuzhiyun mega_passthru pthru; 490*4882a593Smuzhiyun #if BITS_PER_LONG == 32 491*4882a593Smuzhiyun char __user *data; /* buffer <= 4096 for 0x80 commands */ 492*4882a593Smuzhiyun char pad[4]; 493*4882a593Smuzhiyun #endif 494*4882a593Smuzhiyun #if BITS_PER_LONG == 64 495*4882a593Smuzhiyun char __user *data; 496*4882a593Smuzhiyun #endif 497*4882a593Smuzhiyun } __attribute__ ((packed)); 498*4882a593Smuzhiyun 499*4882a593Smuzhiyun /* 500*4882a593Smuzhiyun * struct mcontroller is used to pass information about the controllers in the 501*4882a593Smuzhiyun * system. Its up to the application how to use the information. We are passing 502*4882a593Smuzhiyun * as much info about the cards as possible and useful. Before issuing the 503*4882a593Smuzhiyun * call to find information about the cards, the application needs to issue a 504*4882a593Smuzhiyun * ioctl first to find out the number of controllers in the system. 505*4882a593Smuzhiyun */ 506*4882a593Smuzhiyun #define MAX_CONTROLLERS 32 507*4882a593Smuzhiyun 508*4882a593Smuzhiyun struct mcontroller { 509*4882a593Smuzhiyun u64 base; 510*4882a593Smuzhiyun u8 irq; 511*4882a593Smuzhiyun u8 numldrv; 512*4882a593Smuzhiyun u8 pcibus; 513*4882a593Smuzhiyun u16 pcidev; 514*4882a593Smuzhiyun u8 pcifun; 515*4882a593Smuzhiyun u16 pciid; 516*4882a593Smuzhiyun u16 pcivendor; 517*4882a593Smuzhiyun u8 pcislot; 518*4882a593Smuzhiyun u32 uid; 519*4882a593Smuzhiyun }; 520*4882a593Smuzhiyun 521*4882a593Smuzhiyun /* 522*4882a593Smuzhiyun * mailbox structure used for internal commands 523*4882a593Smuzhiyun */ 524*4882a593Smuzhiyun typedef struct { 525*4882a593Smuzhiyun u8 cmd; 526*4882a593Smuzhiyun u8 cmdid; 527*4882a593Smuzhiyun u8 opcode; 528*4882a593Smuzhiyun u8 subopcode; 529*4882a593Smuzhiyun u32 lba; 530*4882a593Smuzhiyun u32 xferaddr; 531*4882a593Smuzhiyun u8 logdrv; 532*4882a593Smuzhiyun u8 rsvd[3]; 533*4882a593Smuzhiyun u8 numstatus; 534*4882a593Smuzhiyun u8 status; 535*4882a593Smuzhiyun } __attribute__ ((packed)) megacmd_t; 536*4882a593Smuzhiyun 537*4882a593Smuzhiyun /* 538*4882a593Smuzhiyun * Defines for Driver IOCTL interface 539*4882a593Smuzhiyun */ 540*4882a593Smuzhiyun #define MEGAIOC_MAGIC 'm' 541*4882a593Smuzhiyun 542*4882a593Smuzhiyun #define MEGAIOC_QNADAP 'm' /* Query # of adapters */ 543*4882a593Smuzhiyun #define MEGAIOC_QDRVRVER 'e' /* Query driver version */ 544*4882a593Smuzhiyun #define MEGAIOC_QADAPINFO 'g' /* Query adapter information */ 545*4882a593Smuzhiyun #define MKADAP(adapno) (MEGAIOC_MAGIC << 8 | (adapno) ) 546*4882a593Smuzhiyun #define GETADAP(mkadap) ( (mkadap) ^ MEGAIOC_MAGIC << 8 ) 547*4882a593Smuzhiyun 548*4882a593Smuzhiyun /* 549*4882a593Smuzhiyun * Definition for the new ioctl interface (NIT) 550*4882a593Smuzhiyun */ 551*4882a593Smuzhiyun 552*4882a593Smuzhiyun /* 553*4882a593Smuzhiyun * Vendor specific Group-7 commands 554*4882a593Smuzhiyun */ 555*4882a593Smuzhiyun #define VENDOR_SPECIFIC_COMMANDS 0xE0 556*4882a593Smuzhiyun #define MEGA_INTERNAL_CMD VENDOR_SPECIFIC_COMMANDS + 0x01 557*4882a593Smuzhiyun 558*4882a593Smuzhiyun /* 559*4882a593Smuzhiyun * The ioctl command. No other command shall be used for this interface 560*4882a593Smuzhiyun */ 561*4882a593Smuzhiyun #define USCSICMD VENDOR_SPECIFIC_COMMANDS 562*4882a593Smuzhiyun 563*4882a593Smuzhiyun /* 564*4882a593Smuzhiyun * Data direction flags 565*4882a593Smuzhiyun */ 566*4882a593Smuzhiyun #define UIOC_RD 0x00001 567*4882a593Smuzhiyun #define UIOC_WR 0x00002 568*4882a593Smuzhiyun 569*4882a593Smuzhiyun /* 570*4882a593Smuzhiyun * ioctl opcodes 571*4882a593Smuzhiyun */ 572*4882a593Smuzhiyun #define MBOX_CMD 0x00000 /* DCMD or passthru command */ 573*4882a593Smuzhiyun #define GET_DRIVER_VER 0x10000 /* Get driver version */ 574*4882a593Smuzhiyun #define GET_N_ADAP 0x20000 /* Get number of adapters */ 575*4882a593Smuzhiyun #define GET_ADAP_INFO 0x30000 /* Get information about a adapter */ 576*4882a593Smuzhiyun #define GET_CAP 0x40000 /* Get ioctl capabilities */ 577*4882a593Smuzhiyun #define GET_STATS 0x50000 /* Get statistics, including error info */ 578*4882a593Smuzhiyun 579*4882a593Smuzhiyun 580*4882a593Smuzhiyun /* 581*4882a593Smuzhiyun * The ioctl structure. 582*4882a593Smuzhiyun * MBOX macro converts a nitioctl_t structure to megacmd_t pointer and 583*4882a593Smuzhiyun * MBOX_P macro converts a nitioctl_t pointer to megacmd_t pointer. 584*4882a593Smuzhiyun */ 585*4882a593Smuzhiyun typedef struct { 586*4882a593Smuzhiyun char signature[8]; /* Must contain "MEGANIT" */ 587*4882a593Smuzhiyun u32 opcode; /* opcode for the command */ 588*4882a593Smuzhiyun u32 adapno; /* adapter number */ 589*4882a593Smuzhiyun union { 590*4882a593Smuzhiyun u8 __raw_mbox[18]; 591*4882a593Smuzhiyun void __user *__uaddr; /* xferaddr for non-mbox cmds */ 592*4882a593Smuzhiyun }__ua; 593*4882a593Smuzhiyun 594*4882a593Smuzhiyun #define uioc_rmbox __ua.__raw_mbox 595*4882a593Smuzhiyun #define MBOX(uioc) ((megacmd_t *)&((uioc).__ua.__raw_mbox[0])) 596*4882a593Smuzhiyun #define MBOX_P(uioc) ((megacmd_t __user *)&((uioc)->__ua.__raw_mbox[0])) 597*4882a593Smuzhiyun #define uioc_uaddr __ua.__uaddr 598*4882a593Smuzhiyun 599*4882a593Smuzhiyun u32 xferlen; /* xferlen for DCMD and non-mbox 600*4882a593Smuzhiyun commands */ 601*4882a593Smuzhiyun u32 flags; /* data direction flags */ 602*4882a593Smuzhiyun }nitioctl_t; 603*4882a593Smuzhiyun 604*4882a593Smuzhiyun 605*4882a593Smuzhiyun /* 606*4882a593Smuzhiyun * I/O statistics for some applications like SNMP agent. The caller must 607*4882a593Smuzhiyun * provide the number of logical drives for which status should be reported. 608*4882a593Smuzhiyun */ 609*4882a593Smuzhiyun typedef struct { 610*4882a593Smuzhiyun int num_ldrv; /* Number for logical drives for which the 611*4882a593Smuzhiyun status should be reported. */ 612*4882a593Smuzhiyun u32 nreads[MAX_LOGICAL_DRIVES_40LD]; /* number of reads for 613*4882a593Smuzhiyun each logical drive */ 614*4882a593Smuzhiyun u32 nreadblocks[MAX_LOGICAL_DRIVES_40LD]; /* number of blocks 615*4882a593Smuzhiyun read for each logical 616*4882a593Smuzhiyun drive */ 617*4882a593Smuzhiyun u32 nwrites[MAX_LOGICAL_DRIVES_40LD]; /* number of writes 618*4882a593Smuzhiyun for each logical 619*4882a593Smuzhiyun drive */ 620*4882a593Smuzhiyun u32 nwriteblocks[MAX_LOGICAL_DRIVES_40LD]; /* number of blocks 621*4882a593Smuzhiyun writes for each 622*4882a593Smuzhiyun logical drive */ 623*4882a593Smuzhiyun u32 rd_errors[MAX_LOGICAL_DRIVES_40LD]; /* number of read 624*4882a593Smuzhiyun errors for each 625*4882a593Smuzhiyun logical drive */ 626*4882a593Smuzhiyun u32 wr_errors[MAX_LOGICAL_DRIVES_40LD]; /* number of write 627*4882a593Smuzhiyun errors for each 628*4882a593Smuzhiyun logical drive */ 629*4882a593Smuzhiyun }megastat_t; 630*4882a593Smuzhiyun 631*4882a593Smuzhiyun 632*4882a593Smuzhiyun struct private_bios_data { 633*4882a593Smuzhiyun u8 geometry:4; /* 634*4882a593Smuzhiyun * bits 0-3 - BIOS geometry 635*4882a593Smuzhiyun * 0x0001 - 1GB 636*4882a593Smuzhiyun * 0x0010 - 2GB 637*4882a593Smuzhiyun * 0x1000 - 8GB 638*4882a593Smuzhiyun * Others values are invalid 639*4882a593Smuzhiyun */ 640*4882a593Smuzhiyun u8 unused:4; /* bits 4-7 are unused */ 641*4882a593Smuzhiyun u8 boot_drv; /* 642*4882a593Smuzhiyun * logical drive set as boot drive 643*4882a593Smuzhiyun * 0..7 - for 8LD cards 644*4882a593Smuzhiyun * 0..39 - for 40LD cards 645*4882a593Smuzhiyun */ 646*4882a593Smuzhiyun u8 rsvd[12]; 647*4882a593Smuzhiyun u16 cksum; /* 0-(sum of first 13 bytes of this structure) */ 648*4882a593Smuzhiyun } __attribute__ ((packed)); 649*4882a593Smuzhiyun 650*4882a593Smuzhiyun 651*4882a593Smuzhiyun 652*4882a593Smuzhiyun 653*4882a593Smuzhiyun /* 654*4882a593Smuzhiyun * Mailbox and firmware commands and subopcodes used in this driver. 655*4882a593Smuzhiyun */ 656*4882a593Smuzhiyun 657*4882a593Smuzhiyun #define MEGA_MBOXCMD_LREAD 0x01 658*4882a593Smuzhiyun #define MEGA_MBOXCMD_LWRITE 0x02 659*4882a593Smuzhiyun #define MEGA_MBOXCMD_PASSTHRU 0x03 660*4882a593Smuzhiyun #define MEGA_MBOXCMD_ADPEXTINQ 0x04 661*4882a593Smuzhiyun #define MEGA_MBOXCMD_ADAPTERINQ 0x05 662*4882a593Smuzhiyun #define MEGA_MBOXCMD_LREAD64 0xA7 663*4882a593Smuzhiyun #define MEGA_MBOXCMD_LWRITE64 0xA8 664*4882a593Smuzhiyun #define MEGA_MBOXCMD_PASSTHRU64 0xC3 665*4882a593Smuzhiyun #define MEGA_MBOXCMD_EXTPTHRU 0xE3 666*4882a593Smuzhiyun 667*4882a593Smuzhiyun #define MAIN_MISC_OPCODE 0xA4 /* f/w misc opcode */ 668*4882a593Smuzhiyun #define GET_MAX_SG_SUPPORT 0x01 /* get max sg len supported by f/w */ 669*4882a593Smuzhiyun 670*4882a593Smuzhiyun #define FC_NEW_CONFIG 0xA1 671*4882a593Smuzhiyun #define NC_SUBOP_PRODUCT_INFO 0x0E 672*4882a593Smuzhiyun #define NC_SUBOP_ENQUIRY3 0x0F 673*4882a593Smuzhiyun #define ENQ3_GET_SOLICITED_FULL 0x02 674*4882a593Smuzhiyun #define OP_DCMD_READ_CONFIG 0x04 675*4882a593Smuzhiyun #define NEW_READ_CONFIG_8LD 0x67 676*4882a593Smuzhiyun #define READ_CONFIG_8LD 0x07 677*4882a593Smuzhiyun #define FLUSH_ADAPTER 0x0A 678*4882a593Smuzhiyun #define FLUSH_SYSTEM 0xFE 679*4882a593Smuzhiyun 680*4882a593Smuzhiyun /* 681*4882a593Smuzhiyun * Command for random deletion of logical drives 682*4882a593Smuzhiyun */ 683*4882a593Smuzhiyun #define FC_DEL_LOGDRV 0xA4 /* f/w command */ 684*4882a593Smuzhiyun #define OP_SUP_DEL_LOGDRV 0x2A /* is feature supported */ 685*4882a593Smuzhiyun #define OP_GET_LDID_MAP 0x18 /* get ldid and logdrv number map */ 686*4882a593Smuzhiyun #define OP_DEL_LOGDRV 0x1C /* delete logical drive */ 687*4882a593Smuzhiyun 688*4882a593Smuzhiyun /* 689*4882a593Smuzhiyun * BIOS commands 690*4882a593Smuzhiyun */ 691*4882a593Smuzhiyun #define IS_BIOS_ENABLED 0x62 692*4882a593Smuzhiyun #define GET_BIOS 0x01 693*4882a593Smuzhiyun #define CHNL_CLASS 0xA9 694*4882a593Smuzhiyun #define GET_CHNL_CLASS 0x00 695*4882a593Smuzhiyun #define SET_CHNL_CLASS 0x01 696*4882a593Smuzhiyun #define CH_RAID 0x01 697*4882a593Smuzhiyun #define CH_SCSI 0x00 698*4882a593Smuzhiyun #define BIOS_PVT_DATA 0x40 699*4882a593Smuzhiyun #define GET_BIOS_PVT_DATA 0x00 700*4882a593Smuzhiyun 701*4882a593Smuzhiyun 702*4882a593Smuzhiyun /* 703*4882a593Smuzhiyun * Commands to support clustering 704*4882a593Smuzhiyun */ 705*4882a593Smuzhiyun #define MEGA_GET_TARGET_ID 0x7D 706*4882a593Smuzhiyun #define MEGA_CLUSTER_OP 0x70 707*4882a593Smuzhiyun #define MEGA_GET_CLUSTER_MODE 0x02 708*4882a593Smuzhiyun #define MEGA_CLUSTER_CMD 0x6E 709*4882a593Smuzhiyun #define MEGA_RESERVE_LD 0x01 710*4882a593Smuzhiyun #define MEGA_RELEASE_LD 0x02 711*4882a593Smuzhiyun #define MEGA_RESET_RESERVATIONS 0x03 712*4882a593Smuzhiyun #define MEGA_RESERVATION_STATUS 0x04 713*4882a593Smuzhiyun #define MEGA_RESERVE_PD 0x05 714*4882a593Smuzhiyun #define MEGA_RELEASE_PD 0x06 715*4882a593Smuzhiyun 716*4882a593Smuzhiyun 717*4882a593Smuzhiyun /* 718*4882a593Smuzhiyun * Module battery status 719*4882a593Smuzhiyun */ 720*4882a593Smuzhiyun #define MEGA_BATT_MODULE_MISSING 0x01 721*4882a593Smuzhiyun #define MEGA_BATT_LOW_VOLTAGE 0x02 722*4882a593Smuzhiyun #define MEGA_BATT_TEMP_HIGH 0x04 723*4882a593Smuzhiyun #define MEGA_BATT_PACK_MISSING 0x08 724*4882a593Smuzhiyun #define MEGA_BATT_CHARGE_MASK 0x30 725*4882a593Smuzhiyun #define MEGA_BATT_CHARGE_DONE 0x00 726*4882a593Smuzhiyun #define MEGA_BATT_CHARGE_INPROG 0x10 727*4882a593Smuzhiyun #define MEGA_BATT_CHARGE_FAIL 0x20 728*4882a593Smuzhiyun #define MEGA_BATT_CYCLES_EXCEEDED 0x40 729*4882a593Smuzhiyun 730*4882a593Smuzhiyun /* 731*4882a593Smuzhiyun * Physical drive states. 732*4882a593Smuzhiyun */ 733*4882a593Smuzhiyun #define PDRV_UNCNF 0 734*4882a593Smuzhiyun #define PDRV_ONLINE 3 735*4882a593Smuzhiyun #define PDRV_FAILED 4 736*4882a593Smuzhiyun #define PDRV_RBLD 5 737*4882a593Smuzhiyun #define PDRV_HOTSPARE 6 738*4882a593Smuzhiyun 739*4882a593Smuzhiyun 740*4882a593Smuzhiyun /* 741*4882a593Smuzhiyun * Raid logical drive states. 742*4882a593Smuzhiyun */ 743*4882a593Smuzhiyun #define RDRV_OFFLINE 0 744*4882a593Smuzhiyun #define RDRV_DEGRADED 1 745*4882a593Smuzhiyun #define RDRV_OPTIMAL 2 746*4882a593Smuzhiyun #define RDRV_DELETED 3 747*4882a593Smuzhiyun 748*4882a593Smuzhiyun /* 749*4882a593Smuzhiyun * Read, write and cache policies 750*4882a593Smuzhiyun */ 751*4882a593Smuzhiyun #define NO_READ_AHEAD 0 752*4882a593Smuzhiyun #define READ_AHEAD 1 753*4882a593Smuzhiyun #define ADAP_READ_AHEAD 2 754*4882a593Smuzhiyun #define WRMODE_WRITE_THRU 0 755*4882a593Smuzhiyun #define WRMODE_WRITE_BACK 1 756*4882a593Smuzhiyun #define CACHED_IO 0 757*4882a593Smuzhiyun #define DIRECT_IO 1 758*4882a593Smuzhiyun 759*4882a593Smuzhiyun 760*4882a593Smuzhiyun #define SCSI_LIST(scp) ((struct list_head *)(&(scp)->SCp)) 761*4882a593Smuzhiyun 762*4882a593Smuzhiyun /* 763*4882a593Smuzhiyun * Each controller's soft state 764*4882a593Smuzhiyun */ 765*4882a593Smuzhiyun typedef struct { 766*4882a593Smuzhiyun int this_id; /* our id, may set to different than 7 if 767*4882a593Smuzhiyun clustering is available */ 768*4882a593Smuzhiyun u32 flag; 769*4882a593Smuzhiyun 770*4882a593Smuzhiyun unsigned long base; 771*4882a593Smuzhiyun void __iomem *mmio_base; 772*4882a593Smuzhiyun 773*4882a593Smuzhiyun /* mbox64 with mbox not aligned on 16-byte boundary */ 774*4882a593Smuzhiyun mbox64_t *una_mbox64; 775*4882a593Smuzhiyun dma_addr_t una_mbox64_dma; 776*4882a593Smuzhiyun 777*4882a593Smuzhiyun volatile mbox64_t *mbox64;/* ptr to 64-bit mailbox */ 778*4882a593Smuzhiyun volatile mbox_t *mbox; /* ptr to standard mailbox */ 779*4882a593Smuzhiyun dma_addr_t mbox_dma; 780*4882a593Smuzhiyun 781*4882a593Smuzhiyun struct pci_dev *dev; 782*4882a593Smuzhiyun 783*4882a593Smuzhiyun struct list_head free_list; 784*4882a593Smuzhiyun struct list_head pending_list; 785*4882a593Smuzhiyun struct list_head completed_list; 786*4882a593Smuzhiyun 787*4882a593Smuzhiyun struct Scsi_Host *host; 788*4882a593Smuzhiyun 789*4882a593Smuzhiyun #define MEGA_BUFFER_SIZE (2*1024) 790*4882a593Smuzhiyun u8 *mega_buffer; 791*4882a593Smuzhiyun dma_addr_t buf_dma_handle; 792*4882a593Smuzhiyun 793*4882a593Smuzhiyun mega_product_info product_info; 794*4882a593Smuzhiyun 795*4882a593Smuzhiyun u8 max_cmds; 796*4882a593Smuzhiyun scb_t *scb_list; 797*4882a593Smuzhiyun 798*4882a593Smuzhiyun atomic_t pend_cmds; /* maintain a counter for pending 799*4882a593Smuzhiyun commands in firmware */ 800*4882a593Smuzhiyun 801*4882a593Smuzhiyun #if MEGA_HAVE_STATS 802*4882a593Smuzhiyun u32 nreads[MAX_LOGICAL_DRIVES_40LD]; 803*4882a593Smuzhiyun u32 nreadblocks[MAX_LOGICAL_DRIVES_40LD]; 804*4882a593Smuzhiyun u32 nwrites[MAX_LOGICAL_DRIVES_40LD]; 805*4882a593Smuzhiyun u32 nwriteblocks[MAX_LOGICAL_DRIVES_40LD]; 806*4882a593Smuzhiyun u32 rd_errors[MAX_LOGICAL_DRIVES_40LD]; 807*4882a593Smuzhiyun u32 wr_errors[MAX_LOGICAL_DRIVES_40LD]; 808*4882a593Smuzhiyun #endif 809*4882a593Smuzhiyun 810*4882a593Smuzhiyun /* Host adapter parameters */ 811*4882a593Smuzhiyun u8 numldrv; 812*4882a593Smuzhiyun u8 fw_version[7]; 813*4882a593Smuzhiyun u8 bios_version[7]; 814*4882a593Smuzhiyun 815*4882a593Smuzhiyun #ifdef CONFIG_PROC_FS 816*4882a593Smuzhiyun struct proc_dir_entry *controller_proc_dir_entry; 817*4882a593Smuzhiyun #endif 818*4882a593Smuzhiyun 819*4882a593Smuzhiyun int has_64bit_addr; /* are we using 64-bit addressing */ 820*4882a593Smuzhiyun int support_ext_cdb; 821*4882a593Smuzhiyun int boot_ldrv_enabled; 822*4882a593Smuzhiyun int boot_ldrv; 823*4882a593Smuzhiyun int boot_pdrv_enabled; /* boot from physical drive */ 824*4882a593Smuzhiyun int boot_pdrv_ch; /* boot physical drive channel */ 825*4882a593Smuzhiyun int boot_pdrv_tgt; /* boot physical drive target */ 826*4882a593Smuzhiyun 827*4882a593Smuzhiyun 828*4882a593Smuzhiyun int support_random_del; /* Do we support random deletion of 829*4882a593Smuzhiyun logdrvs */ 830*4882a593Smuzhiyun int read_ldidmap; /* set after logical drive deltion. The 831*4882a593Smuzhiyun logical drive number must be read from the 832*4882a593Smuzhiyun map */ 833*4882a593Smuzhiyun atomic_t quiescent; /* a stage reached when delete logical 834*4882a593Smuzhiyun drive needs to be done. Stop 835*4882a593Smuzhiyun sending requests to the hba till 836*4882a593Smuzhiyun delete operation is completed */ 837*4882a593Smuzhiyun spinlock_t lock; 838*4882a593Smuzhiyun 839*4882a593Smuzhiyun u8 logdrv_chan[MAX_CHANNELS+NVIRT_CHAN]; /* logical drive are on 840*4882a593Smuzhiyun what channels. */ 841*4882a593Smuzhiyun int mega_ch_class; 842*4882a593Smuzhiyun 843*4882a593Smuzhiyun u8 sglen; /* f/w supported scatter-gather list length */ 844*4882a593Smuzhiyun 845*4882a593Smuzhiyun scb_t int_scb; 846*4882a593Smuzhiyun struct mutex int_mtx; /* To synchronize the internal 847*4882a593Smuzhiyun commands */ 848*4882a593Smuzhiyun int int_status; /* status of internal cmd */ 849*4882a593Smuzhiyun struct completion int_waitq; /* wait queue for internal 850*4882a593Smuzhiyun cmds */ 851*4882a593Smuzhiyun 852*4882a593Smuzhiyun int has_cluster; /* cluster support on this HBA */ 853*4882a593Smuzhiyun }adapter_t; 854*4882a593Smuzhiyun 855*4882a593Smuzhiyun 856*4882a593Smuzhiyun struct mega_hbas { 857*4882a593Smuzhiyun int is_bios_enabled; 858*4882a593Smuzhiyun adapter_t *hostdata_addr; 859*4882a593Smuzhiyun }; 860*4882a593Smuzhiyun 861*4882a593Smuzhiyun 862*4882a593Smuzhiyun /* 863*4882a593Smuzhiyun * For state flag. Do not use LSB(8 bits) which are 864*4882a593Smuzhiyun * reserved for storing info about channels. 865*4882a593Smuzhiyun */ 866*4882a593Smuzhiyun #define IN_ABORT 0x80000000L 867*4882a593Smuzhiyun #define IN_RESET 0x40000000L 868*4882a593Smuzhiyun #define BOARD_MEMMAP 0x20000000L 869*4882a593Smuzhiyun #define BOARD_IOMAP 0x10000000L 870*4882a593Smuzhiyun #define BOARD_40LD 0x08000000L 871*4882a593Smuzhiyun #define BOARD_64BIT 0x04000000L 872*4882a593Smuzhiyun 873*4882a593Smuzhiyun #define INTR_VALID 0x40 874*4882a593Smuzhiyun 875*4882a593Smuzhiyun #define PCI_CONF_AMISIG 0xa0 876*4882a593Smuzhiyun #define PCI_CONF_AMISIG64 0xa4 877*4882a593Smuzhiyun 878*4882a593Smuzhiyun 879*4882a593Smuzhiyun #define MEGA_DMA_TYPE_NONE 0xFFFF 880*4882a593Smuzhiyun #define MEGA_BULK_DATA 0x0001 881*4882a593Smuzhiyun #define MEGA_SGLIST 0x0002 882*4882a593Smuzhiyun 883*4882a593Smuzhiyun /* 884*4882a593Smuzhiyun * Parameters for the io-mapped controllers 885*4882a593Smuzhiyun */ 886*4882a593Smuzhiyun 887*4882a593Smuzhiyun /* I/O Port offsets */ 888*4882a593Smuzhiyun #define CMD_PORT 0x00 889*4882a593Smuzhiyun #define ACK_PORT 0x00 890*4882a593Smuzhiyun #define TOGGLE_PORT 0x01 891*4882a593Smuzhiyun #define INTR_PORT 0x0a 892*4882a593Smuzhiyun 893*4882a593Smuzhiyun #define MBOX_BUSY_PORT 0x00 894*4882a593Smuzhiyun #define MBOX_PORT0 0x04 895*4882a593Smuzhiyun #define MBOX_PORT1 0x05 896*4882a593Smuzhiyun #define MBOX_PORT2 0x06 897*4882a593Smuzhiyun #define MBOX_PORT3 0x07 898*4882a593Smuzhiyun #define ENABLE_MBOX_REGION 0x0B 899*4882a593Smuzhiyun 900*4882a593Smuzhiyun /* I/O Port Values */ 901*4882a593Smuzhiyun #define ISSUE_BYTE 0x10 902*4882a593Smuzhiyun #define ACK_BYTE 0x08 903*4882a593Smuzhiyun #define ENABLE_INTR_BYTE 0xc0 904*4882a593Smuzhiyun #define DISABLE_INTR_BYTE 0x00 905*4882a593Smuzhiyun #define VALID_INTR_BYTE 0x40 906*4882a593Smuzhiyun #define MBOX_BUSY_BYTE 0x10 907*4882a593Smuzhiyun #define ENABLE_MBOX_BYTE 0x00 908*4882a593Smuzhiyun 909*4882a593Smuzhiyun 910*4882a593Smuzhiyun /* Setup some port macros here */ 911*4882a593Smuzhiyun #define issue_command(adapter) \ 912*4882a593Smuzhiyun outb_p(ISSUE_BYTE, (adapter)->base + CMD_PORT) 913*4882a593Smuzhiyun 914*4882a593Smuzhiyun #define irq_state(adapter) inb_p((adapter)->base + INTR_PORT) 915*4882a593Smuzhiyun 916*4882a593Smuzhiyun #define set_irq_state(adapter, value) \ 917*4882a593Smuzhiyun outb_p((value), (adapter)->base + INTR_PORT) 918*4882a593Smuzhiyun 919*4882a593Smuzhiyun #define irq_ack(adapter) \ 920*4882a593Smuzhiyun outb_p(ACK_BYTE, (adapter)->base + ACK_PORT) 921*4882a593Smuzhiyun 922*4882a593Smuzhiyun #define irq_enable(adapter) \ 923*4882a593Smuzhiyun outb_p(ENABLE_INTR_BYTE, (adapter)->base + TOGGLE_PORT) 924*4882a593Smuzhiyun 925*4882a593Smuzhiyun #define irq_disable(adapter) \ 926*4882a593Smuzhiyun outb_p(DISABLE_INTR_BYTE, (adapter)->base + TOGGLE_PORT) 927*4882a593Smuzhiyun 928*4882a593Smuzhiyun 929*4882a593Smuzhiyun /* 930*4882a593Smuzhiyun * This is our SYSDEP area. All kernel specific detail should be placed here - 931*4882a593Smuzhiyun * as much as possible 932*4882a593Smuzhiyun */ 933*4882a593Smuzhiyun 934*4882a593Smuzhiyun /* 935*4882a593Smuzhiyun * End of SYSDEP area 936*4882a593Smuzhiyun */ 937*4882a593Smuzhiyun 938*4882a593Smuzhiyun const char *megaraid_info (struct Scsi_Host *); 939*4882a593Smuzhiyun 940*4882a593Smuzhiyun static int mega_query_adapter(adapter_t *); 941*4882a593Smuzhiyun static int issue_scb(adapter_t *, scb_t *); 942*4882a593Smuzhiyun static int mega_setup_mailbox(adapter_t *); 943*4882a593Smuzhiyun 944*4882a593Smuzhiyun static int megaraid_queue (struct Scsi_Host *, struct scsi_cmnd *); 945*4882a593Smuzhiyun static scb_t * mega_build_cmd(adapter_t *, struct scsi_cmnd *, int *); 946*4882a593Smuzhiyun static void __mega_runpendq(adapter_t *); 947*4882a593Smuzhiyun static int issue_scb_block(adapter_t *, u_char *); 948*4882a593Smuzhiyun 949*4882a593Smuzhiyun static irqreturn_t megaraid_isr_memmapped(int, void *); 950*4882a593Smuzhiyun static irqreturn_t megaraid_isr_iomapped(int, void *); 951*4882a593Smuzhiyun 952*4882a593Smuzhiyun static void mega_free_scb(adapter_t *, scb_t *); 953*4882a593Smuzhiyun 954*4882a593Smuzhiyun static int megaraid_abort(struct scsi_cmnd *); 955*4882a593Smuzhiyun static int megaraid_reset(struct scsi_cmnd *); 956*4882a593Smuzhiyun static int megaraid_abort_and_reset(adapter_t *, struct scsi_cmnd *, int); 957*4882a593Smuzhiyun static int megaraid_biosparam(struct scsi_device *, struct block_device *, 958*4882a593Smuzhiyun sector_t, int []); 959*4882a593Smuzhiyun 960*4882a593Smuzhiyun static int mega_build_sglist (adapter_t *adapter, scb_t *scb, 961*4882a593Smuzhiyun u32 *buffer, u32 *length); 962*4882a593Smuzhiyun static int __mega_busywait_mbox (adapter_t *); 963*4882a593Smuzhiyun static void mega_rundoneq (adapter_t *); 964*4882a593Smuzhiyun static void mega_cmd_done(adapter_t *, u8 [], int, int); 965*4882a593Smuzhiyun static inline void mega_free_sgl (adapter_t *adapter); 966*4882a593Smuzhiyun static void mega_8_to_40ld (mraid_inquiry *inquiry, 967*4882a593Smuzhiyun mega_inquiry3 *enquiry3, mega_product_info *); 968*4882a593Smuzhiyun 969*4882a593Smuzhiyun static int megadev_open (struct inode *, struct file *); 970*4882a593Smuzhiyun static int megadev_ioctl (struct file *, unsigned int, unsigned long); 971*4882a593Smuzhiyun static int mega_m_to_n(void __user *, nitioctl_t *); 972*4882a593Smuzhiyun static int mega_n_to_m(void __user *, megacmd_t *); 973*4882a593Smuzhiyun 974*4882a593Smuzhiyun static int mega_init_scb (adapter_t *); 975*4882a593Smuzhiyun 976*4882a593Smuzhiyun static int mega_is_bios_enabled (adapter_t *); 977*4882a593Smuzhiyun 978*4882a593Smuzhiyun #ifdef CONFIG_PROC_FS 979*4882a593Smuzhiyun static void mega_create_proc_entry(int, struct proc_dir_entry *); 980*4882a593Smuzhiyun static int mega_adapinq(adapter_t *, dma_addr_t); 981*4882a593Smuzhiyun static int mega_internal_dev_inquiry(adapter_t *, u8, u8, dma_addr_t); 982*4882a593Smuzhiyun #endif 983*4882a593Smuzhiyun 984*4882a593Smuzhiyun static int mega_support_ext_cdb(adapter_t *); 985*4882a593Smuzhiyun static mega_passthru* mega_prepare_passthru(adapter_t *, scb_t *, 986*4882a593Smuzhiyun struct scsi_cmnd *, int, int); 987*4882a593Smuzhiyun static mega_ext_passthru* mega_prepare_extpassthru(adapter_t *, 988*4882a593Smuzhiyun scb_t *, struct scsi_cmnd *, int, int); 989*4882a593Smuzhiyun static void mega_enum_raid_scsi(adapter_t *); 990*4882a593Smuzhiyun static void mega_get_boot_drv(adapter_t *); 991*4882a593Smuzhiyun static int mega_support_random_del(adapter_t *); 992*4882a593Smuzhiyun static int mega_del_logdrv(adapter_t *, int); 993*4882a593Smuzhiyun static int mega_do_del_logdrv(adapter_t *, int); 994*4882a593Smuzhiyun static void mega_get_max_sgl(adapter_t *); 995*4882a593Smuzhiyun static int mega_internal_command(adapter_t *, megacmd_t *, mega_passthru *); 996*4882a593Smuzhiyun static int mega_support_cluster(adapter_t *); 997*4882a593Smuzhiyun #endif 998*4882a593Smuzhiyun 999*4882a593Smuzhiyun /* vi: set ts=8 sw=8 tw=78: */ 1000