1*4882a593Smuzhiyun /******************************************************************* 2*4882a593Smuzhiyun * This file is part of the Emulex Linux Device Driver for * 3*4882a593Smuzhiyun * Fibre Channel Host Bus Adapters. * 4*4882a593Smuzhiyun * Copyright (C) 2017-2019 Broadcom. All Rights Reserved. The term * 5*4882a593Smuzhiyun * “Broadcom” refers to Broadcom Inc. and/or its subsidiaries. * 6*4882a593Smuzhiyun * Copyright (C) 2010-2015 Emulex. All rights reserved. * 7*4882a593Smuzhiyun * EMULEX and SLI are trademarks of Emulex. * 8*4882a593Smuzhiyun * www.broadcom.com * 9*4882a593Smuzhiyun * * 10*4882a593Smuzhiyun * This program is free software; you can redistribute it and/or * 11*4882a593Smuzhiyun * modify it under the terms of version 2 of the GNU General * 12*4882a593Smuzhiyun * Public License as published by the Free Software Foundation. * 13*4882a593Smuzhiyun * This program is distributed in the hope that it will be useful. * 14*4882a593Smuzhiyun * ALL EXPRESS OR IMPLIED CONDITIONS, REPRESENTATIONS AND * 15*4882a593Smuzhiyun * WARRANTIES, INCLUDING ANY IMPLIED WARRANTY OF MERCHANTABILITY, * 16*4882a593Smuzhiyun * FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT, ARE * 17*4882a593Smuzhiyun * DISCLAIMED, EXCEPT TO THE EXTENT THAT SUCH DISCLAIMERS ARE HELD * 18*4882a593Smuzhiyun * TO BE LEGALLY INVALID. See the GNU General Public License for * 19*4882a593Smuzhiyun * more details, a copy of which can be found in the file COPYING * 20*4882a593Smuzhiyun * included with this package. * 21*4882a593Smuzhiyun *******************************************************************/ 22*4882a593Smuzhiyun /* bsg definitions 23*4882a593Smuzhiyun * No pointers to user data are allowed, all application buffers and sizes will 24*4882a593Smuzhiyun * derived through the bsg interface. 25*4882a593Smuzhiyun * 26*4882a593Smuzhiyun * These are the vendor unique structures passed in using the bsg 27*4882a593Smuzhiyun * FC_BSG_HST_VENDOR message code type. 28*4882a593Smuzhiyun */ 29*4882a593Smuzhiyun #define LPFC_BSG_VENDOR_SET_CT_EVENT 1 30*4882a593Smuzhiyun #define LPFC_BSG_VENDOR_GET_CT_EVENT 2 31*4882a593Smuzhiyun #define LPFC_BSG_VENDOR_SEND_MGMT_RESP 3 32*4882a593Smuzhiyun #define LPFC_BSG_VENDOR_DIAG_MODE 4 33*4882a593Smuzhiyun #define LPFC_BSG_VENDOR_DIAG_RUN_LOOPBACK 5 34*4882a593Smuzhiyun #define LPFC_BSG_VENDOR_GET_MGMT_REV 6 35*4882a593Smuzhiyun #define LPFC_BSG_VENDOR_MBOX 7 36*4882a593Smuzhiyun #define LPFC_BSG_VENDOR_MENLO_CMD 8 37*4882a593Smuzhiyun #define LPFC_BSG_VENDOR_MENLO_DATA 9 38*4882a593Smuzhiyun #define LPFC_BSG_VENDOR_DIAG_MODE_END 10 39*4882a593Smuzhiyun #define LPFC_BSG_VENDOR_LINK_DIAG_TEST 11 40*4882a593Smuzhiyun #define LPFC_BSG_VENDOR_FORCED_LINK_SPEED 14 41*4882a593Smuzhiyun #define LPFC_BSG_VENDOR_RAS_GET_LWPD 16 42*4882a593Smuzhiyun #define LPFC_BSG_VENDOR_RAS_GET_FWLOG 17 43*4882a593Smuzhiyun #define LPFC_BSG_VENDOR_RAS_GET_CONFIG 18 44*4882a593Smuzhiyun #define LPFC_BSG_VENDOR_RAS_SET_CONFIG 19 45*4882a593Smuzhiyun #define LPFC_BSG_VENDOR_GET_TRUNK_INFO 20 46*4882a593Smuzhiyun 47*4882a593Smuzhiyun struct set_ct_event { 48*4882a593Smuzhiyun uint32_t command; 49*4882a593Smuzhiyun uint32_t type_mask; 50*4882a593Smuzhiyun uint32_t ev_req_id; 51*4882a593Smuzhiyun uint32_t ev_reg_id; 52*4882a593Smuzhiyun }; 53*4882a593Smuzhiyun 54*4882a593Smuzhiyun struct get_ct_event { 55*4882a593Smuzhiyun uint32_t command; 56*4882a593Smuzhiyun uint32_t ev_reg_id; 57*4882a593Smuzhiyun uint32_t ev_req_id; 58*4882a593Smuzhiyun }; 59*4882a593Smuzhiyun 60*4882a593Smuzhiyun struct get_ct_event_reply { 61*4882a593Smuzhiyun uint32_t immed_data; 62*4882a593Smuzhiyun uint32_t type; 63*4882a593Smuzhiyun }; 64*4882a593Smuzhiyun 65*4882a593Smuzhiyun struct send_mgmt_resp { 66*4882a593Smuzhiyun uint32_t command; 67*4882a593Smuzhiyun uint32_t tag; 68*4882a593Smuzhiyun }; 69*4882a593Smuzhiyun 70*4882a593Smuzhiyun 71*4882a593Smuzhiyun #define DISABLE_LOOP_BACK 0x0 /* disables loop back */ 72*4882a593Smuzhiyun #define INTERNAL_LOOP_BACK 0x1 /* adapter short cuts the loop internally */ 73*4882a593Smuzhiyun #define EXTERNAL_LOOP_BACK 0x2 /* requires an external loopback plug */ 74*4882a593Smuzhiyun 75*4882a593Smuzhiyun struct diag_mode_set { 76*4882a593Smuzhiyun uint32_t command; 77*4882a593Smuzhiyun uint32_t type; 78*4882a593Smuzhiyun uint32_t timeout; 79*4882a593Smuzhiyun uint32_t physical_link; 80*4882a593Smuzhiyun }; 81*4882a593Smuzhiyun 82*4882a593Smuzhiyun struct sli4_link_diag { 83*4882a593Smuzhiyun uint32_t command; 84*4882a593Smuzhiyun uint32_t timeout; 85*4882a593Smuzhiyun uint32_t test_id; 86*4882a593Smuzhiyun uint32_t loops; 87*4882a593Smuzhiyun uint32_t test_version; 88*4882a593Smuzhiyun uint32_t error_action; 89*4882a593Smuzhiyun }; 90*4882a593Smuzhiyun 91*4882a593Smuzhiyun struct diag_mode_test { 92*4882a593Smuzhiyun uint32_t command; 93*4882a593Smuzhiyun }; 94*4882a593Smuzhiyun 95*4882a593Smuzhiyun struct diag_status { 96*4882a593Smuzhiyun uint32_t mbox_status; 97*4882a593Smuzhiyun uint32_t shdr_status; 98*4882a593Smuzhiyun uint32_t shdr_add_status; 99*4882a593Smuzhiyun }; 100*4882a593Smuzhiyun 101*4882a593Smuzhiyun #define LPFC_WWNN_TYPE 0 102*4882a593Smuzhiyun #define LPFC_WWPN_TYPE 1 103*4882a593Smuzhiyun 104*4882a593Smuzhiyun struct get_mgmt_rev { 105*4882a593Smuzhiyun uint32_t command; 106*4882a593Smuzhiyun }; 107*4882a593Smuzhiyun 108*4882a593Smuzhiyun #define MANAGEMENT_MAJOR_REV 1 109*4882a593Smuzhiyun #define MANAGEMENT_MINOR_REV 1 110*4882a593Smuzhiyun 111*4882a593Smuzhiyun /* the MgmtRevInfo structure */ 112*4882a593Smuzhiyun struct MgmtRevInfo { 113*4882a593Smuzhiyun uint32_t a_Major; 114*4882a593Smuzhiyun uint32_t a_Minor; 115*4882a593Smuzhiyun }; 116*4882a593Smuzhiyun 117*4882a593Smuzhiyun struct get_mgmt_rev_reply { 118*4882a593Smuzhiyun struct MgmtRevInfo info; 119*4882a593Smuzhiyun }; 120*4882a593Smuzhiyun 121*4882a593Smuzhiyun #define BSG_MBOX_SIZE 4096 /* mailbox command plus extended data */ 122*4882a593Smuzhiyun 123*4882a593Smuzhiyun /* BSG mailbox request header */ 124*4882a593Smuzhiyun struct dfc_mbox_req { 125*4882a593Smuzhiyun uint32_t command; 126*4882a593Smuzhiyun uint32_t mbOffset; 127*4882a593Smuzhiyun uint32_t inExtWLen; 128*4882a593Smuzhiyun uint32_t outExtWLen; 129*4882a593Smuzhiyun uint32_t extMboxTag; 130*4882a593Smuzhiyun uint32_t extSeqNum; 131*4882a593Smuzhiyun }; 132*4882a593Smuzhiyun 133*4882a593Smuzhiyun /* Used for menlo command or menlo data. The xri is only used for menlo data */ 134*4882a593Smuzhiyun struct menlo_command { 135*4882a593Smuzhiyun uint32_t cmd; 136*4882a593Smuzhiyun uint32_t xri; 137*4882a593Smuzhiyun }; 138*4882a593Smuzhiyun 139*4882a593Smuzhiyun struct menlo_response { 140*4882a593Smuzhiyun uint32_t xri; /* return the xri of the iocb exchange */ 141*4882a593Smuzhiyun }; 142*4882a593Smuzhiyun 143*4882a593Smuzhiyun /* 144*4882a593Smuzhiyun * macros and data structures for handling sli-config mailbox command 145*4882a593Smuzhiyun * pass-through support, this header file is shared between user and 146*4882a593Smuzhiyun * kernel spaces, note the set of macros are duplicates from lpfc_hw4.h, 147*4882a593Smuzhiyun * with macro names prefixed with bsg_, as the macros defined in 148*4882a593Smuzhiyun * lpfc_hw4.h are not accessible from user space. 149*4882a593Smuzhiyun */ 150*4882a593Smuzhiyun 151*4882a593Smuzhiyun /* Macros to deal with bit fields. Each bit field must have 3 #defines 152*4882a593Smuzhiyun * associated with it (_SHIFT, _MASK, and _WORD). 153*4882a593Smuzhiyun * EG. For a bit field that is in the 7th bit of the "field4" field of a 154*4882a593Smuzhiyun * structure and is 2 bits in size the following #defines must exist: 155*4882a593Smuzhiyun * struct temp { 156*4882a593Smuzhiyun * uint32_t field1; 157*4882a593Smuzhiyun * uint32_t field2; 158*4882a593Smuzhiyun * uint32_t field3; 159*4882a593Smuzhiyun * uint32_t field4; 160*4882a593Smuzhiyun * #define example_bit_field_SHIFT 7 161*4882a593Smuzhiyun * #define example_bit_field_MASK 0x03 162*4882a593Smuzhiyun * #define example_bit_field_WORD field4 163*4882a593Smuzhiyun * uint32_t field5; 164*4882a593Smuzhiyun * }; 165*4882a593Smuzhiyun * Then the macros below may be used to get or set the value of that field. 166*4882a593Smuzhiyun * EG. To get the value of the bit field from the above example: 167*4882a593Smuzhiyun * struct temp t1; 168*4882a593Smuzhiyun * value = bsg_bf_get(example_bit_field, &t1); 169*4882a593Smuzhiyun * And then to set that bit field: 170*4882a593Smuzhiyun * bsg_bf_set(example_bit_field, &t1, 2); 171*4882a593Smuzhiyun * Or clear that bit field: 172*4882a593Smuzhiyun * bsg_bf_set(example_bit_field, &t1, 0); 173*4882a593Smuzhiyun */ 174*4882a593Smuzhiyun #define bsg_bf_get_le32(name, ptr) \ 175*4882a593Smuzhiyun ((le32_to_cpu((ptr)->name##_WORD) >> name##_SHIFT) & name##_MASK) 176*4882a593Smuzhiyun #define bsg_bf_get(name, ptr) \ 177*4882a593Smuzhiyun (((ptr)->name##_WORD >> name##_SHIFT) & name##_MASK) 178*4882a593Smuzhiyun #define bsg_bf_set_le32(name, ptr, value) \ 179*4882a593Smuzhiyun ((ptr)->name##_WORD = cpu_to_le32(((((value) & \ 180*4882a593Smuzhiyun name##_MASK) << name##_SHIFT) | (le32_to_cpu((ptr)->name##_WORD) & \ 181*4882a593Smuzhiyun ~(name##_MASK << name##_SHIFT))))) 182*4882a593Smuzhiyun #define bsg_bf_set(name, ptr, value) \ 183*4882a593Smuzhiyun ((ptr)->name##_WORD = ((((value) & name##_MASK) << name##_SHIFT) | \ 184*4882a593Smuzhiyun ((ptr)->name##_WORD & ~(name##_MASK << name##_SHIFT)))) 185*4882a593Smuzhiyun 186*4882a593Smuzhiyun /* 187*4882a593Smuzhiyun * The sli_config structure specified here is based on the following 188*4882a593Smuzhiyun * restriction: 189*4882a593Smuzhiyun * 190*4882a593Smuzhiyun * -- SLI_CONFIG EMB=0, carrying MSEs, will carry subcommands without 191*4882a593Smuzhiyun * carrying HBD. 192*4882a593Smuzhiyun * -- SLI_CONFIG EMB=1, not carrying MSE, will carry subcommands with or 193*4882a593Smuzhiyun * without carrying HBDs. 194*4882a593Smuzhiyun */ 195*4882a593Smuzhiyun 196*4882a593Smuzhiyun struct lpfc_sli_config_mse { 197*4882a593Smuzhiyun uint32_t pa_lo; 198*4882a593Smuzhiyun uint32_t pa_hi; 199*4882a593Smuzhiyun uint32_t buf_len; 200*4882a593Smuzhiyun #define lpfc_mbox_sli_config_mse_len_SHIFT 0 201*4882a593Smuzhiyun #define lpfc_mbox_sli_config_mse_len_MASK 0xffffff 202*4882a593Smuzhiyun #define lpfc_mbox_sli_config_mse_len_WORD buf_len 203*4882a593Smuzhiyun }; 204*4882a593Smuzhiyun 205*4882a593Smuzhiyun struct lpfc_sli_config_hbd { 206*4882a593Smuzhiyun uint32_t buf_len; 207*4882a593Smuzhiyun #define lpfc_mbox_sli_config_ecmn_hbd_len_SHIFT 0 208*4882a593Smuzhiyun #define lpfc_mbox_sli_config_ecmn_hbd_len_MASK 0xffffff 209*4882a593Smuzhiyun #define lpfc_mbox_sli_config_ecmn_hbd_len_WORD buf_len 210*4882a593Smuzhiyun uint32_t pa_lo; 211*4882a593Smuzhiyun uint32_t pa_hi; 212*4882a593Smuzhiyun }; 213*4882a593Smuzhiyun 214*4882a593Smuzhiyun struct lpfc_sli_config_hdr { 215*4882a593Smuzhiyun uint32_t word1; 216*4882a593Smuzhiyun #define lpfc_mbox_hdr_emb_SHIFT 0 217*4882a593Smuzhiyun #define lpfc_mbox_hdr_emb_MASK 0x00000001 218*4882a593Smuzhiyun #define lpfc_mbox_hdr_emb_WORD word1 219*4882a593Smuzhiyun #define lpfc_mbox_hdr_mse_cnt_SHIFT 3 220*4882a593Smuzhiyun #define lpfc_mbox_hdr_mse_cnt_MASK 0x0000001f 221*4882a593Smuzhiyun #define lpfc_mbox_hdr_mse_cnt_WORD word1 222*4882a593Smuzhiyun uint32_t payload_length; 223*4882a593Smuzhiyun uint32_t tag_lo; 224*4882a593Smuzhiyun uint32_t tag_hi; 225*4882a593Smuzhiyun uint32_t reserved5; 226*4882a593Smuzhiyun }; 227*4882a593Smuzhiyun 228*4882a593Smuzhiyun #define LPFC_CSF_BOOT_DEV 0x1D 229*4882a593Smuzhiyun #define LPFC_CSF_QUERY 0 230*4882a593Smuzhiyun #define LPFC_CSF_SAVE 1 231*4882a593Smuzhiyun 232*4882a593Smuzhiyun struct lpfc_sli_config_emb0_subsys { 233*4882a593Smuzhiyun struct lpfc_sli_config_hdr sli_config_hdr; 234*4882a593Smuzhiyun #define LPFC_MBX_SLI_CONFIG_MAX_MSE 19 235*4882a593Smuzhiyun struct lpfc_sli_config_mse mse[LPFC_MBX_SLI_CONFIG_MAX_MSE]; 236*4882a593Smuzhiyun uint32_t padding; 237*4882a593Smuzhiyun uint32_t word64; 238*4882a593Smuzhiyun #define lpfc_emb0_subcmnd_opcode_SHIFT 0 239*4882a593Smuzhiyun #define lpfc_emb0_subcmnd_opcode_MASK 0xff 240*4882a593Smuzhiyun #define lpfc_emb0_subcmnd_opcode_WORD word64 241*4882a593Smuzhiyun #define lpfc_emb0_subcmnd_subsys_SHIFT 8 242*4882a593Smuzhiyun #define lpfc_emb0_subcmnd_subsys_MASK 0xff 243*4882a593Smuzhiyun #define lpfc_emb0_subcmnd_subsys_WORD word64 244*4882a593Smuzhiyun /* Subsystem FCOE (0x0C) OpCodes */ 245*4882a593Smuzhiyun #define SLI_CONFIG_SUBSYS_FCOE 0x0C 246*4882a593Smuzhiyun #define FCOE_OPCODE_READ_FCF 0x08 247*4882a593Smuzhiyun #define FCOE_OPCODE_ADD_FCF 0x09 248*4882a593Smuzhiyun #define FCOE_OPCODE_SET_DPORT_MODE 0x27 249*4882a593Smuzhiyun #define FCOE_OPCODE_GET_DPORT_RESULTS 0x28 250*4882a593Smuzhiyun uint32_t timeout; /* comn_set_feature timeout */ 251*4882a593Smuzhiyun uint32_t request_length; /* comn_set_feature request len */ 252*4882a593Smuzhiyun uint32_t version; /* comn_set_feature version */ 253*4882a593Smuzhiyun uint32_t csf_feature; /* comn_set_feature feature */ 254*4882a593Smuzhiyun uint32_t word69; /* comn_set_feature parameter len */ 255*4882a593Smuzhiyun uint32_t word70; /* comn_set_feature parameter val0 */ 256*4882a593Smuzhiyun #define lpfc_emb0_subcmnd_csf_p0_SHIFT 0 257*4882a593Smuzhiyun #define lpfc_emb0_subcmnd_csf_p0_MASK 0x3 258*4882a593Smuzhiyun #define lpfc_emb0_subcmnd_csf_p0_WORD word70 259*4882a593Smuzhiyun }; 260*4882a593Smuzhiyun 261*4882a593Smuzhiyun struct lpfc_sli_config_emb1_subsys { 262*4882a593Smuzhiyun struct lpfc_sli_config_hdr sli_config_hdr; 263*4882a593Smuzhiyun uint32_t word6; 264*4882a593Smuzhiyun #define lpfc_emb1_subcmnd_opcode_SHIFT 0 265*4882a593Smuzhiyun #define lpfc_emb1_subcmnd_opcode_MASK 0xff 266*4882a593Smuzhiyun #define lpfc_emb1_subcmnd_opcode_WORD word6 267*4882a593Smuzhiyun #define lpfc_emb1_subcmnd_subsys_SHIFT 8 268*4882a593Smuzhiyun #define lpfc_emb1_subcmnd_subsys_MASK 0xff 269*4882a593Smuzhiyun #define lpfc_emb1_subcmnd_subsys_WORD word6 270*4882a593Smuzhiyun /* Subsystem COMN (0x01) OpCodes */ 271*4882a593Smuzhiyun #define SLI_CONFIG_SUBSYS_COMN 0x01 272*4882a593Smuzhiyun #define COMN_OPCODE_GET_PROFILE_CONFIG 0xA4 273*4882a593Smuzhiyun #define COMN_OPCODE_READ_OBJECT 0xAB 274*4882a593Smuzhiyun #define COMN_OPCODE_WRITE_OBJECT 0xAC 275*4882a593Smuzhiyun #define COMN_OPCODE_READ_OBJECT_LIST 0xAD 276*4882a593Smuzhiyun #define COMN_OPCODE_DELETE_OBJECT 0xAE 277*4882a593Smuzhiyun #define COMN_OPCODE_SET_FEATURES 0xBF 278*4882a593Smuzhiyun #define COMN_OPCODE_GET_CNTL_ADDL_ATTRIBUTES 0x79 279*4882a593Smuzhiyun #define COMN_OPCODE_GET_CNTL_ATTRIBUTES 0x20 280*4882a593Smuzhiyun uint32_t timeout; 281*4882a593Smuzhiyun uint32_t request_length; 282*4882a593Smuzhiyun uint32_t word9; 283*4882a593Smuzhiyun #define lpfc_subcmnd_version_SHIFT 0 284*4882a593Smuzhiyun #define lpfc_subcmnd_version_MASK 0xff 285*4882a593Smuzhiyun #define lpfc_subcmnd_version_WORD word9 286*4882a593Smuzhiyun uint32_t word10; 287*4882a593Smuzhiyun #define lpfc_subcmnd_ask_rd_len_SHIFT 0 288*4882a593Smuzhiyun #define lpfc_subcmnd_ask_rd_len_MASK 0xffffff 289*4882a593Smuzhiyun #define lpfc_subcmnd_ask_rd_len_WORD word10 290*4882a593Smuzhiyun uint32_t rd_offset; 291*4882a593Smuzhiyun uint32_t obj_name[26]; 292*4882a593Smuzhiyun uint32_t hbd_count; 293*4882a593Smuzhiyun #define LPFC_MBX_SLI_CONFIG_MAX_HBD 8 294*4882a593Smuzhiyun struct lpfc_sli_config_hbd hbd[LPFC_MBX_SLI_CONFIG_MAX_HBD]; 295*4882a593Smuzhiyun }; 296*4882a593Smuzhiyun 297*4882a593Smuzhiyun struct lpfc_sli_config_mbox { 298*4882a593Smuzhiyun uint32_t word0; 299*4882a593Smuzhiyun #define lpfc_mqe_status_SHIFT 16 300*4882a593Smuzhiyun #define lpfc_mqe_status_MASK 0x0000FFFF 301*4882a593Smuzhiyun #define lpfc_mqe_status_WORD word0 302*4882a593Smuzhiyun #define lpfc_mqe_command_SHIFT 8 303*4882a593Smuzhiyun #define lpfc_mqe_command_MASK 0x000000FF 304*4882a593Smuzhiyun #define lpfc_mqe_command_WORD word0 305*4882a593Smuzhiyun union { 306*4882a593Smuzhiyun struct lpfc_sli_config_emb0_subsys sli_config_emb0_subsys; 307*4882a593Smuzhiyun struct lpfc_sli_config_emb1_subsys sli_config_emb1_subsys; 308*4882a593Smuzhiyun } un; 309*4882a593Smuzhiyun }; 310*4882a593Smuzhiyun 311*4882a593Smuzhiyun #define LPFC_FORCED_LINK_SPEED_NOT_SUPPORTED 0 312*4882a593Smuzhiyun #define LPFC_FORCED_LINK_SPEED_SUPPORTED 1 313*4882a593Smuzhiyun struct get_forced_link_speed_support { 314*4882a593Smuzhiyun uint32_t command; 315*4882a593Smuzhiyun }; 316*4882a593Smuzhiyun struct forced_link_speed_support_reply { 317*4882a593Smuzhiyun uint8_t supported; 318*4882a593Smuzhiyun }; 319*4882a593Smuzhiyun 320*4882a593Smuzhiyun struct lpfc_bsg_ras_req { 321*4882a593Smuzhiyun uint32_t command; 322*4882a593Smuzhiyun }; 323*4882a593Smuzhiyun 324*4882a593Smuzhiyun struct lpfc_bsg_get_fwlog_req { 325*4882a593Smuzhiyun uint32_t command; 326*4882a593Smuzhiyun uint32_t read_size; 327*4882a593Smuzhiyun uint32_t read_offset; 328*4882a593Smuzhiyun }; 329*4882a593Smuzhiyun 330*4882a593Smuzhiyun struct lpfc_bsg_get_ras_lwpd { 331*4882a593Smuzhiyun uint32_t offset; 332*4882a593Smuzhiyun uint32_t wrap_count; 333*4882a593Smuzhiyun }; 334*4882a593Smuzhiyun 335*4882a593Smuzhiyun struct lpfc_bsg_set_ras_config_req { 336*4882a593Smuzhiyun uint32_t command; 337*4882a593Smuzhiyun uint8_t action; 338*4882a593Smuzhiyun #define LPFC_RASACTION_STOP_LOGGING 0x00 339*4882a593Smuzhiyun #define LPFC_RASACTION_START_LOGGING 0x01 340*4882a593Smuzhiyun uint8_t log_level; 341*4882a593Smuzhiyun }; 342*4882a593Smuzhiyun 343*4882a593Smuzhiyun struct lpfc_bsg_get_ras_config_reply { 344*4882a593Smuzhiyun uint8_t state; 345*4882a593Smuzhiyun #define LPFC_RASLOG_STATE_STOPPED 0x00 346*4882a593Smuzhiyun #define LPFC_RASLOG_STATE_RUNNING 0x01 347*4882a593Smuzhiyun uint8_t log_level; 348*4882a593Smuzhiyun uint32_t log_buff_sz; 349*4882a593Smuzhiyun }; 350*4882a593Smuzhiyun 351*4882a593Smuzhiyun struct lpfc_trunk_info { 352*4882a593Smuzhiyun uint32_t word0; 353*4882a593Smuzhiyun #define lpfc_trunk_info_link_status_SHIFT 0 354*4882a593Smuzhiyun #define lpfc_trunk_info_link_status_MASK 1 355*4882a593Smuzhiyun #define lpfc_trunk_info_link_status_WORD word0 356*4882a593Smuzhiyun #define lpfc_trunk_info_trunk_active0_SHIFT 8 357*4882a593Smuzhiyun #define lpfc_trunk_info_trunk_active0_MASK 1 358*4882a593Smuzhiyun #define lpfc_trunk_info_trunk_active0_WORD word0 359*4882a593Smuzhiyun #define lpfc_trunk_info_trunk_active1_SHIFT 9 360*4882a593Smuzhiyun #define lpfc_trunk_info_trunk_active1_MASK 1 361*4882a593Smuzhiyun #define lpfc_trunk_info_trunk_active1_WORD word0 362*4882a593Smuzhiyun #define lpfc_trunk_info_trunk_active2_SHIFT 10 363*4882a593Smuzhiyun #define lpfc_trunk_info_trunk_active2_MASK 1 364*4882a593Smuzhiyun #define lpfc_trunk_info_trunk_active2_WORD word0 365*4882a593Smuzhiyun #define lpfc_trunk_info_trunk_active3_SHIFT 11 366*4882a593Smuzhiyun #define lpfc_trunk_info_trunk_active3_MASK 1 367*4882a593Smuzhiyun #define lpfc_trunk_info_trunk_active3_WORD word0 368*4882a593Smuzhiyun #define lpfc_trunk_info_trunk_config0_SHIFT 12 369*4882a593Smuzhiyun #define lpfc_trunk_info_trunk_config0_MASK 1 370*4882a593Smuzhiyun #define lpfc_trunk_info_trunk_config0_WORD word0 371*4882a593Smuzhiyun #define lpfc_trunk_info_trunk_config1_SHIFT 13 372*4882a593Smuzhiyun #define lpfc_trunk_info_trunk_config1_MASK 1 373*4882a593Smuzhiyun #define lpfc_trunk_info_trunk_config1_WORD word0 374*4882a593Smuzhiyun #define lpfc_trunk_info_trunk_config2_SHIFT 14 375*4882a593Smuzhiyun #define lpfc_trunk_info_trunk_config2_MASK 1 376*4882a593Smuzhiyun #define lpfc_trunk_info_trunk_config2_WORD word0 377*4882a593Smuzhiyun #define lpfc_trunk_info_trunk_config3_SHIFT 15 378*4882a593Smuzhiyun #define lpfc_trunk_info_trunk_config3_MASK 1 379*4882a593Smuzhiyun #define lpfc_trunk_info_trunk_config3_WORD word0 380*4882a593Smuzhiyun uint16_t port_speed; 381*4882a593Smuzhiyun uint16_t logical_speed; 382*4882a593Smuzhiyun uint32_t reserved3; 383*4882a593Smuzhiyun }; 384*4882a593Smuzhiyun 385*4882a593Smuzhiyun struct get_trunk_info_req { 386*4882a593Smuzhiyun uint32_t command; 387*4882a593Smuzhiyun }; 388*4882a593Smuzhiyun 389*4882a593Smuzhiyun /* driver only */ 390*4882a593Smuzhiyun #define SLI_CONFIG_NOT_HANDLED 0 391*4882a593Smuzhiyun #define SLI_CONFIG_HANDLED 1 392