1*4882a593Smuzhiyun /* 2*4882a593Smuzhiyun * This file is provided under a dual BSD/GPLv2 license. When using or 3*4882a593Smuzhiyun * redistributing this file, you may do so under either license. 4*4882a593Smuzhiyun * 5*4882a593Smuzhiyun * GPL LICENSE SUMMARY 6*4882a593Smuzhiyun * 7*4882a593Smuzhiyun * Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved. 8*4882a593Smuzhiyun * 9*4882a593Smuzhiyun * This program is free software; you can redistribute it and/or modify 10*4882a593Smuzhiyun * it under the terms of version 2 of the GNU General Public License as 11*4882a593Smuzhiyun * published by the Free Software Foundation. 12*4882a593Smuzhiyun * 13*4882a593Smuzhiyun * This program is distributed in the hope that it will be useful, but 14*4882a593Smuzhiyun * WITHOUT ANY WARRANTY; without even the implied warranty of 15*4882a593Smuzhiyun * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU 16*4882a593Smuzhiyun * General Public License for more details. 17*4882a593Smuzhiyun * 18*4882a593Smuzhiyun * You should have received a copy of the GNU General Public License 19*4882a593Smuzhiyun * along with this program; if not, write to the Free Software 20*4882a593Smuzhiyun * Foundation, Inc., 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA. 21*4882a593Smuzhiyun * The full GNU General Public License is included in this distribution 22*4882a593Smuzhiyun * in the file called LICENSE.GPL. 23*4882a593Smuzhiyun * 24*4882a593Smuzhiyun * BSD LICENSE 25*4882a593Smuzhiyun * 26*4882a593Smuzhiyun * Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved. 27*4882a593Smuzhiyun * All rights reserved. 28*4882a593Smuzhiyun * 29*4882a593Smuzhiyun * Redistribution and use in source and binary forms, with or without 30*4882a593Smuzhiyun * modification, are permitted provided that the following conditions 31*4882a593Smuzhiyun * are met: 32*4882a593Smuzhiyun * 33*4882a593Smuzhiyun * * Redistributions of source code must retain the above copyright 34*4882a593Smuzhiyun * notice, this list of conditions and the following disclaimer. 35*4882a593Smuzhiyun * * Redistributions in binary form must reproduce the above copyright 36*4882a593Smuzhiyun * notice, this list of conditions and the following disclaimer in 37*4882a593Smuzhiyun * the documentation and/or other materials provided with the 38*4882a593Smuzhiyun * distribution. 39*4882a593Smuzhiyun * * Neither the name of Intel Corporation nor the names of its 40*4882a593Smuzhiyun * contributors may be used to endorse or promote products derived 41*4882a593Smuzhiyun * from this software without specific prior written permission. 42*4882a593Smuzhiyun * 43*4882a593Smuzhiyun * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 44*4882a593Smuzhiyun * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 45*4882a593Smuzhiyun * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 46*4882a593Smuzhiyun * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 47*4882a593Smuzhiyun * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 48*4882a593Smuzhiyun * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 49*4882a593Smuzhiyun * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 50*4882a593Smuzhiyun * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 51*4882a593Smuzhiyun * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 52*4882a593Smuzhiyun * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 53*4882a593Smuzhiyun * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 54*4882a593Smuzhiyun */ 55*4882a593Smuzhiyun 56*4882a593Smuzhiyun #ifndef __SCU_EVENT_CODES_HEADER__ 57*4882a593Smuzhiyun #define __SCU_EVENT_CODES_HEADER__ 58*4882a593Smuzhiyun 59*4882a593Smuzhiyun /** 60*4882a593Smuzhiyun * This file contains the constants and macros for the SCU event codes. 61*4882a593Smuzhiyun * 62*4882a593Smuzhiyun * 63*4882a593Smuzhiyun */ 64*4882a593Smuzhiyun 65*4882a593Smuzhiyun #define SCU_EVENT_TYPE_CODE_SHIFT 24 66*4882a593Smuzhiyun #define SCU_EVENT_TYPE_CODE_MASK 0x0F000000 67*4882a593Smuzhiyun 68*4882a593Smuzhiyun #define SCU_EVENT_SPECIFIC_CODE_SHIFT 18 69*4882a593Smuzhiyun #define SCU_EVENT_SPECIFIC_CODE_MASK 0x00FC0000 70*4882a593Smuzhiyun 71*4882a593Smuzhiyun #define SCU_EVENT_CODE_MASK \ 72*4882a593Smuzhiyun (SCU_EVENT_TYPE_CODE_MASK | SCU_EVENT_SPECIFIC_CODE_MASK) 73*4882a593Smuzhiyun 74*4882a593Smuzhiyun /** 75*4882a593Smuzhiyun * SCU_EVENT_TYPE() - 76*4882a593Smuzhiyun * 77*4882a593Smuzhiyun * This macro constructs an SCU event type from the type value. 78*4882a593Smuzhiyun */ 79*4882a593Smuzhiyun #define SCU_EVENT_TYPE(type) \ 80*4882a593Smuzhiyun ((u32)(type) << SCU_EVENT_TYPE_CODE_SHIFT) 81*4882a593Smuzhiyun 82*4882a593Smuzhiyun /** 83*4882a593Smuzhiyun * SCU_EVENT_SPECIFIC() - 84*4882a593Smuzhiyun * 85*4882a593Smuzhiyun * This macro constructs an SCU event specifier from the code value. 86*4882a593Smuzhiyun */ 87*4882a593Smuzhiyun #define SCU_EVENT_SPECIFIC(code) \ 88*4882a593Smuzhiyun ((u32)(code) << SCU_EVENT_SPECIFIC_CODE_SHIFT) 89*4882a593Smuzhiyun 90*4882a593Smuzhiyun /** 91*4882a593Smuzhiyun * SCU_EVENT_MESSAGE() - 92*4882a593Smuzhiyun * 93*4882a593Smuzhiyun * This macro constructs a combines an SCU event type and SCU event specifier 94*4882a593Smuzhiyun * from the type and code values. 95*4882a593Smuzhiyun */ 96*4882a593Smuzhiyun #define SCU_EVENT_MESSAGE(type, code) \ 97*4882a593Smuzhiyun ((type) | SCU_EVENT_SPECIFIC(code)) 98*4882a593Smuzhiyun 99*4882a593Smuzhiyun /** 100*4882a593Smuzhiyun * SCU_EVENT_TYPE() - 101*4882a593Smuzhiyun * 102*4882a593Smuzhiyun * SCU_EVENT_TYPES 103*4882a593Smuzhiyun */ 104*4882a593Smuzhiyun #define SCU_EVENT_TYPE_SMU_COMMAND_ERROR SCU_EVENT_TYPE(0x08) 105*4882a593Smuzhiyun #define SCU_EVENT_TYPE_SMU_PCQ_ERROR SCU_EVENT_TYPE(0x09) 106*4882a593Smuzhiyun #define SCU_EVENT_TYPE_SMU_ERROR SCU_EVENT_TYPE(0x00) 107*4882a593Smuzhiyun #define SCU_EVENT_TYPE_TRANSPORT_ERROR SCU_EVENT_TYPE(0x01) 108*4882a593Smuzhiyun #define SCU_EVENT_TYPE_BROADCAST_CHANGE SCU_EVENT_TYPE(0x02) 109*4882a593Smuzhiyun #define SCU_EVENT_TYPE_OSSP_EVENT SCU_EVENT_TYPE(0x03) 110*4882a593Smuzhiyun #define SCU_EVENT_TYPE_FATAL_MEMORY_ERROR SCU_EVENT_TYPE(0x0F) 111*4882a593Smuzhiyun #define SCU_EVENT_TYPE_RNC_SUSPEND_TX SCU_EVENT_TYPE(0x04) 112*4882a593Smuzhiyun #define SCU_EVENT_TYPE_RNC_SUSPEND_TX_RX SCU_EVENT_TYPE(0x05) 113*4882a593Smuzhiyun #define SCU_EVENT_TYPE_RNC_OPS_MISC SCU_EVENT_TYPE(0x06) 114*4882a593Smuzhiyun #define SCU_EVENT_TYPE_PTX_SCHEDULE_EVENT SCU_EVENT_TYPE(0x07) 115*4882a593Smuzhiyun #define SCU_EVENT_TYPE_ERR_CNT_EVENT SCU_EVENT_TYPE(0x0A) 116*4882a593Smuzhiyun 117*4882a593Smuzhiyun /** 118*4882a593Smuzhiyun * 119*4882a593Smuzhiyun * 120*4882a593Smuzhiyun * SCU_EVENT_SPECIFIERS 121*4882a593Smuzhiyun */ 122*4882a593Smuzhiyun #define SCU_EVENT_SPECIFIER_DRIVER_SUSPEND 0x20 123*4882a593Smuzhiyun #define SCU_EVENT_SPECIFIER_RNC_RELEASE 0x00 124*4882a593Smuzhiyun 125*4882a593Smuzhiyun /** 126*4882a593Smuzhiyun * 127*4882a593Smuzhiyun * 128*4882a593Smuzhiyun * SMU_COMMAND_EVENTS 129*4882a593Smuzhiyun */ 130*4882a593Smuzhiyun #define SCU_EVENT_INVALID_CONTEXT_COMMAND \ 131*4882a593Smuzhiyun SCU_EVENT_MESSAGE(SCU_EVENT_TYPE_SMU_COMMAND_ERROR, 0x00) 132*4882a593Smuzhiyun 133*4882a593Smuzhiyun /** 134*4882a593Smuzhiyun * 135*4882a593Smuzhiyun * 136*4882a593Smuzhiyun * SMU_PCQ_EVENTS 137*4882a593Smuzhiyun */ 138*4882a593Smuzhiyun #define SCU_EVENT_UNCORRECTABLE_PCQ_ERROR \ 139*4882a593Smuzhiyun SCU_EVENT_MESSAGE(SCU_EVENT_TYPE_SMU_PCQ_ERROR, 0x00) 140*4882a593Smuzhiyun 141*4882a593Smuzhiyun /** 142*4882a593Smuzhiyun * 143*4882a593Smuzhiyun * 144*4882a593Smuzhiyun * SMU_EVENTS 145*4882a593Smuzhiyun */ 146*4882a593Smuzhiyun #define SCU_EVENT_UNCORRECTABLE_REGISTER_WRITE \ 147*4882a593Smuzhiyun SCU_EVENT_MESSAGE(SCU_EVENT_TYPE_SMU_ERROR, 0x02) 148*4882a593Smuzhiyun #define SCU_EVENT_UNCORRECTABLE_REGISTER_READ \ 149*4882a593Smuzhiyun SCU_EVENT_MESSAGE(SCU_EVENT_TYPE_SMU_ERROR, 0x03) 150*4882a593Smuzhiyun #define SCU_EVENT_PCIE_INTERFACE_ERROR \ 151*4882a593Smuzhiyun SCU_EVENT_MESSAGE(SCU_EVENT_TYPE_SMU_ERROR, 0x04) 152*4882a593Smuzhiyun #define SCU_EVENT_FUNCTION_LEVEL_RESET \ 153*4882a593Smuzhiyun SCU_EVENT_MESSAGE(SCU_EVENT_TYPE_SMU_ERROR, 0x05) 154*4882a593Smuzhiyun 155*4882a593Smuzhiyun /** 156*4882a593Smuzhiyun * 157*4882a593Smuzhiyun * 158*4882a593Smuzhiyun * TRANSPORT_LEVEL_ERRORS 159*4882a593Smuzhiyun */ 160*4882a593Smuzhiyun #define SCU_EVENT_ACK_NAK_TIMEOUT_ERROR \ 161*4882a593Smuzhiyun SCU_EVENT_MESSAGE(SCU_EVENT_TYPE_TRANSPORT_ERROR, 0x00) 162*4882a593Smuzhiyun 163*4882a593Smuzhiyun /** 164*4882a593Smuzhiyun * 165*4882a593Smuzhiyun * 166*4882a593Smuzhiyun * BROADCAST_CHANGE_EVENTS 167*4882a593Smuzhiyun */ 168*4882a593Smuzhiyun #define SCU_EVENT_BROADCAST_CHANGE \ 169*4882a593Smuzhiyun SCU_EVENT_MESSAGE(SCU_EVENT_TYPE_BROADCAST_CHANGE, 0x01) 170*4882a593Smuzhiyun #define SCU_EVENT_BROADCAST_RESERVED0 \ 171*4882a593Smuzhiyun SCU_EVENT_MESSAGE(SCU_EVENT_TYPE_BROADCAST_CHANGE, 0x02) 172*4882a593Smuzhiyun #define SCU_EVENT_BROADCAST_RESERVED1 \ 173*4882a593Smuzhiyun SCU_EVENT_MESSAGE(SCU_EVENT_TYPE_BROADCAST_CHANGE, 0x03) 174*4882a593Smuzhiyun #define SCU_EVENT_BROADCAST_SES \ 175*4882a593Smuzhiyun SCU_EVENT_MESSAGE(SCU_EVENT_TYPE_BROADCAST_CHANGE, 0x04) 176*4882a593Smuzhiyun #define SCU_EVENT_BROADCAST_EXPANDER \ 177*4882a593Smuzhiyun SCU_EVENT_MESSAGE(SCU_EVENT_TYPE_BROADCAST_CHANGE, 0x05) 178*4882a593Smuzhiyun #define SCU_EVENT_BROADCAST_AEN \ 179*4882a593Smuzhiyun SCU_EVENT_MESSAGE(SCU_EVENT_TYPE_BROADCAST_CHANGE, 0x06) 180*4882a593Smuzhiyun #define SCU_EVENT_BROADCAST_RESERVED3 \ 181*4882a593Smuzhiyun SCU_EVENT_MESSAGE(SCU_EVENT_TYPE_BROADCAST_CHANGE, 0x07) 182*4882a593Smuzhiyun #define SCU_EVENT_BROADCAST_RESERVED4 \ 183*4882a593Smuzhiyun SCU_EVENT_MESSAGE(SCU_EVENT_TYPE_BROADCAST_CHANGE, 0x08) 184*4882a593Smuzhiyun #define SCU_EVENT_PE_SUSPENDED \ 185*4882a593Smuzhiyun SCU_EVENT_MESSAGE(SCU_EVENT_TYPE_BROADCAST_CHANGE, 0x09) 186*4882a593Smuzhiyun 187*4882a593Smuzhiyun /** 188*4882a593Smuzhiyun * 189*4882a593Smuzhiyun * 190*4882a593Smuzhiyun * OSSP_EVENTS 191*4882a593Smuzhiyun */ 192*4882a593Smuzhiyun #define SCU_EVENT_PORT_SELECTOR_DETECTED \ 193*4882a593Smuzhiyun SCU_EVENT_MESSAGE(SCU_EVENT_TYPE_OSSP_EVENT, 0x10) 194*4882a593Smuzhiyun #define SCU_EVENT_SENT_PORT_SELECTION \ 195*4882a593Smuzhiyun SCU_EVENT_MESSAGE(SCU_EVENT_TYPE_OSSP_EVENT, 0x11) 196*4882a593Smuzhiyun #define SCU_EVENT_HARD_RESET_TRANSMITTED \ 197*4882a593Smuzhiyun SCU_EVENT_MESSAGE(SCU_EVENT_TYPE_OSSP_EVENT, 0x12) 198*4882a593Smuzhiyun #define SCU_EVENT_HARD_RESET_RECEIVED \ 199*4882a593Smuzhiyun SCU_EVENT_MESSAGE(SCU_EVENT_TYPE_OSSP_EVENT, 0x13) 200*4882a593Smuzhiyun #define SCU_EVENT_RECEIVED_IDENTIFY_TIMEOUT \ 201*4882a593Smuzhiyun SCU_EVENT_MESSAGE(SCU_EVENT_TYPE_OSSP_EVENT, 0x15) 202*4882a593Smuzhiyun #define SCU_EVENT_LINK_FAILURE \ 203*4882a593Smuzhiyun SCU_EVENT_MESSAGE(SCU_EVENT_TYPE_OSSP_EVENT, 0x16) 204*4882a593Smuzhiyun #define SCU_EVENT_SATA_SPINUP_HOLD \ 205*4882a593Smuzhiyun SCU_EVENT_MESSAGE(SCU_EVENT_TYPE_OSSP_EVENT, 0x17) 206*4882a593Smuzhiyun #define SCU_EVENT_SAS_15_SSC \ 207*4882a593Smuzhiyun SCU_EVENT_MESSAGE(SCU_EVENT_TYPE_OSSP_EVENT, 0x18) 208*4882a593Smuzhiyun #define SCU_EVENT_SAS_15 \ 209*4882a593Smuzhiyun SCU_EVENT_MESSAGE(SCU_EVENT_TYPE_OSSP_EVENT, 0x19) 210*4882a593Smuzhiyun #define SCU_EVENT_SAS_30_SSC \ 211*4882a593Smuzhiyun SCU_EVENT_MESSAGE(SCU_EVENT_TYPE_OSSP_EVENT, 0x1A) 212*4882a593Smuzhiyun #define SCU_EVENT_SAS_30 \ 213*4882a593Smuzhiyun SCU_EVENT_MESSAGE(SCU_EVENT_TYPE_OSSP_EVENT, 0x1B) 214*4882a593Smuzhiyun #define SCU_EVENT_SAS_60_SSC \ 215*4882a593Smuzhiyun SCU_EVENT_MESSAGE(SCU_EVENT_TYPE_OSSP_EVENT, 0x1C) 216*4882a593Smuzhiyun #define SCU_EVENT_SAS_60 \ 217*4882a593Smuzhiyun SCU_EVENT_MESSAGE(SCU_EVENT_TYPE_OSSP_EVENT, 0x1D) 218*4882a593Smuzhiyun #define SCU_EVENT_SATA_15_SSC \ 219*4882a593Smuzhiyun SCU_EVENT_MESSAGE(SCU_EVENT_TYPE_OSSP_EVENT, 0x1E) 220*4882a593Smuzhiyun #define SCU_EVENT_SATA_15 \ 221*4882a593Smuzhiyun SCU_EVENT_MESSAGE(SCU_EVENT_TYPE_OSSP_EVENT, 0x1F) 222*4882a593Smuzhiyun #define SCU_EVENT_SATA_30_SSC \ 223*4882a593Smuzhiyun SCU_EVENT_MESSAGE(SCU_EVENT_TYPE_OSSP_EVENT, 0x20) 224*4882a593Smuzhiyun #define SCU_EVENT_SATA_30 \ 225*4882a593Smuzhiyun SCU_EVENT_MESSAGE(SCU_EVENT_TYPE_OSSP_EVENT, 0x21) 226*4882a593Smuzhiyun #define SCU_EVENT_SATA_60_SSC \ 227*4882a593Smuzhiyun SCU_EVENT_MESSAGE(SCU_EVENT_TYPE_OSSP_EVENT, 0x22) 228*4882a593Smuzhiyun #define SCU_EVENT_SATA_60 \ 229*4882a593Smuzhiyun SCU_EVENT_MESSAGE(SCU_EVENT_TYPE_OSSP_EVENT, 0x23) 230*4882a593Smuzhiyun #define SCU_EVENT_SAS_PHY_DETECTED \ 231*4882a593Smuzhiyun SCU_EVENT_MESSAGE(SCU_EVENT_TYPE_OSSP_EVENT, 0x24) 232*4882a593Smuzhiyun #define SCU_EVENT_SATA_PHY_DETECTED \ 233*4882a593Smuzhiyun SCU_EVENT_MESSAGE(SCU_EVENT_TYPE_OSSP_EVENT, 0x25) 234*4882a593Smuzhiyun 235*4882a593Smuzhiyun /** 236*4882a593Smuzhiyun * 237*4882a593Smuzhiyun * 238*4882a593Smuzhiyun * FATAL_INTERNAL_MEMORY_ERROR_EVENTS 239*4882a593Smuzhiyun */ 240*4882a593Smuzhiyun #define SCU_EVENT_TSC_RNSC_UNCORRECTABLE_ERROR \ 241*4882a593Smuzhiyun SCU_EVENT_MESSAGE(SCU_EVENT_TYPE_FATAL_MEMORY_ERROR, 0x00) 242*4882a593Smuzhiyun #define SCU_EVENT_TC_RNC_UNCORRECTABLE_ERROR \ 243*4882a593Smuzhiyun SCU_EVENT_MESSAGE(SCU_EVENT_TYPE_FATAL_MEMORY_ERROR, 0x01) 244*4882a593Smuzhiyun #define SCU_EVENT_ZPT_UNCORRECTABLE_ERROR \ 245*4882a593Smuzhiyun SCU_EVENT_MESSAGE(SCU_EVENT_TYPE_FATAL_MEMORY_ERROR, 0x02) 246*4882a593Smuzhiyun 247*4882a593Smuzhiyun /** 248*4882a593Smuzhiyun * 249*4882a593Smuzhiyun * 250*4882a593Smuzhiyun * REMOTE_NODE_SUSPEND_EVENTS 251*4882a593Smuzhiyun */ 252*4882a593Smuzhiyun #define SCU_EVENT_TL_RNC_SUSPEND_TX \ 253*4882a593Smuzhiyun SCU_EVENT_MESSAGE(SCU_EVENT_TYPE_RNC_SUSPEND_TX, 0x00) 254*4882a593Smuzhiyun #define SCU_EVENT_TL_RNC_SUSPEND_TX_RX \ 255*4882a593Smuzhiyun SCU_EVENT_MESSAGE(SCU_EVENT_TYPE_RNC_SUSPEND_TX_RX, 0x00) 256*4882a593Smuzhiyun #define SCU_EVENT_DRIVER_POST_RNC_SUSPEND_TX \ 257*4882a593Smuzhiyun SCU_EVENT_MESSAGE(SCU_EVENT_TYPE_RNC_SUSPEND_TX, 0x20) 258*4882a593Smuzhiyun #define SCU_EVENT_DRIVER_POST_RNC_SUSPEND_TX_RX \ 259*4882a593Smuzhiyun SCU_EVENT_MESSAGE(SCU_EVENT_TYPE_RNC_SUSPEND_TX_RX, 0x20) 260*4882a593Smuzhiyun 261*4882a593Smuzhiyun /** 262*4882a593Smuzhiyun * 263*4882a593Smuzhiyun * 264*4882a593Smuzhiyun * REMOTE_NODE_MISC_EVENTS 265*4882a593Smuzhiyun */ 266*4882a593Smuzhiyun #define SCU_EVENT_POST_RCN_RELEASE \ 267*4882a593Smuzhiyun SCU_EVENT_MESSAGE(SCU_EVENT_TYPE_RNC_OPS_MISC, SCU_EVENT_SPECIFIER_RNC_RELEASE) 268*4882a593Smuzhiyun #define SCU_EVENT_POST_IT_NEXUS_LOSS_TIMER_ENABLE \ 269*4882a593Smuzhiyun SCU_EVENT_MESSAGE(SCU_EVENT_TYPE_RNC_OPS_MISC, 0x01) 270*4882a593Smuzhiyun #define SCU_EVENT_POST_IT_NEXUS_LOSS_TIMER_DISABLE \ 271*4882a593Smuzhiyun SCU_EVENT_MESSAGE(SCU_EVENT_TYPE_RNC_OPS_MISC, 0x02) 272*4882a593Smuzhiyun #define SCU_EVENT_POST_RNC_COMPLETE \ 273*4882a593Smuzhiyun SCU_EVENT_MESSAGE(SCU_EVENT_TYPE_RNC_OPS_MISC, 0x03) 274*4882a593Smuzhiyun #define SCU_EVENT_POST_RNC_INVALIDATE_COMPLETE \ 275*4882a593Smuzhiyun SCU_EVENT_MESSAGE(SCU_EVENT_TYPE_RNC_OPS_MISC, 0x04) 276*4882a593Smuzhiyun 277*4882a593Smuzhiyun /** 278*4882a593Smuzhiyun * 279*4882a593Smuzhiyun * 280*4882a593Smuzhiyun * ERROR_COUNT_EVENT 281*4882a593Smuzhiyun */ 282*4882a593Smuzhiyun #define SCU_EVENT_RX_CREDIT_BLOCKED_RECEIVED \ 283*4882a593Smuzhiyun SCU_EVENT_MESSAGE(SCU_EVENT_TYPE_ERR_CNT_EVENT, 0x00) 284*4882a593Smuzhiyun #define SCU_EVENT_TX_DONE_CREDIT_TIMEOUT \ 285*4882a593Smuzhiyun SCU_EVENT_MESSAGE(SCU_EVENT_TYPE_ERR_CNT_EVENT, 0x01) 286*4882a593Smuzhiyun #define SCU_EVENT_RX_DONE_CREDIT_TIMEOUT \ 287*4882a593Smuzhiyun SCU_EVENT_MESSAGE(SCU_EVENT_TYPE_ERR_CNT_EVENT, 0x02) 288*4882a593Smuzhiyun 289*4882a593Smuzhiyun /** 290*4882a593Smuzhiyun * scu_get_event_type() - 291*4882a593Smuzhiyun * 292*4882a593Smuzhiyun * This macro returns the SCU event type from the event code. 293*4882a593Smuzhiyun */ 294*4882a593Smuzhiyun #define scu_get_event_type(event_code) \ 295*4882a593Smuzhiyun ((event_code) & SCU_EVENT_TYPE_CODE_MASK) 296*4882a593Smuzhiyun 297*4882a593Smuzhiyun /** 298*4882a593Smuzhiyun * scu_get_event_specifier() - 299*4882a593Smuzhiyun * 300*4882a593Smuzhiyun * This macro returns the SCU event specifier from the event code. 301*4882a593Smuzhiyun */ 302*4882a593Smuzhiyun #define scu_get_event_specifier(event_code) \ 303*4882a593Smuzhiyun ((event_code) & SCU_EVENT_SPECIFIC_CODE_MASK) 304*4882a593Smuzhiyun 305*4882a593Smuzhiyun /** 306*4882a593Smuzhiyun * scu_get_event_code() - 307*4882a593Smuzhiyun * 308*4882a593Smuzhiyun * This macro returns the combined SCU event type and SCU event specifier from 309*4882a593Smuzhiyun * the event code. 310*4882a593Smuzhiyun */ 311*4882a593Smuzhiyun #define scu_get_event_code(event_code) \ 312*4882a593Smuzhiyun ((event_code) & SCU_EVENT_CODE_MASK) 313*4882a593Smuzhiyun 314*4882a593Smuzhiyun 315*4882a593Smuzhiyun /** 316*4882a593Smuzhiyun * 317*4882a593Smuzhiyun * 318*4882a593Smuzhiyun * PTS_SCHEDULE_EVENT 319*4882a593Smuzhiyun */ 320*4882a593Smuzhiyun #define SCU_EVENT_SMP_RESPONSE_NO_PE \ 321*4882a593Smuzhiyun SCU_EVENT_MESSAGE(SCU_EVENT_TYPE_PTX_SCHEDULE_EVENT, 0x00) 322*4882a593Smuzhiyun #define SCU_EVENT_SPECIFIC_SMP_RESPONSE_NO_PE \ 323*4882a593Smuzhiyun scu_get_event_specifier(SCU_EVENT_SMP_RESPONSE_NO_PE) 324*4882a593Smuzhiyun 325*4882a593Smuzhiyun #define SCU_EVENT_TASK_TIMEOUT \ 326*4882a593Smuzhiyun SCU_EVENT_MESSAGE(SCU_EVENT_TYPE_PTX_SCHEDULE_EVENT, 0x01) 327*4882a593Smuzhiyun #define SCU_EVENT_SPECIFIC_TASK_TIMEOUT \ 328*4882a593Smuzhiyun scu_get_event_specifier(SCU_EVENT_TASK_TIMEOUT) 329*4882a593Smuzhiyun 330*4882a593Smuzhiyun #define SCU_EVENT_IT_NEXUS_TIMEOUT \ 331*4882a593Smuzhiyun SCU_EVENT_MESSAGE(SCU_EVENT_TYPE_PTX_SCHEDULE_EVENT, 0x02) 332*4882a593Smuzhiyun #define SCU_EVENT_SPECIFIC_IT_NEXUS_TIMEOUT \ 333*4882a593Smuzhiyun scu_get_event_specifier(SCU_EVENT_IT_NEXUS_TIMEOUT) 334*4882a593Smuzhiyun 335*4882a593Smuzhiyun 336*4882a593Smuzhiyun #endif /* __SCU_EVENT_CODES_HEADER__ */ 337