1*4882a593Smuzhiyun /* 2*4882a593Smuzhiyun * This file is provided under a dual BSD/GPLv2 license. When using or 3*4882a593Smuzhiyun * redistributing this file, you may do so under either license. 4*4882a593Smuzhiyun * 5*4882a593Smuzhiyun * GPL LICENSE SUMMARY 6*4882a593Smuzhiyun * 7*4882a593Smuzhiyun * Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved. 8*4882a593Smuzhiyun * 9*4882a593Smuzhiyun * This program is free software; you can redistribute it and/or modify 10*4882a593Smuzhiyun * it under the terms of version 2 of the GNU General Public License as 11*4882a593Smuzhiyun * published by the Free Software Foundation. 12*4882a593Smuzhiyun * 13*4882a593Smuzhiyun * This program is distributed in the hope that it will be useful, but 14*4882a593Smuzhiyun * WITHOUT ANY WARRANTY; without even the implied warranty of 15*4882a593Smuzhiyun * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU 16*4882a593Smuzhiyun * General Public License for more details. 17*4882a593Smuzhiyun * 18*4882a593Smuzhiyun * You should have received a copy of the GNU General Public License 19*4882a593Smuzhiyun * along with this program; if not, write to the Free Software 20*4882a593Smuzhiyun * Foundation, Inc., 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA. 21*4882a593Smuzhiyun * The full GNU General Public License is included in this distribution 22*4882a593Smuzhiyun * in the file called LICENSE.GPL. 23*4882a593Smuzhiyun * 24*4882a593Smuzhiyun * BSD LICENSE 25*4882a593Smuzhiyun * 26*4882a593Smuzhiyun * Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved. 27*4882a593Smuzhiyun * All rights reserved. 28*4882a593Smuzhiyun * 29*4882a593Smuzhiyun * Redistribution and use in source and binary forms, with or without 30*4882a593Smuzhiyun * modification, are permitted provided that the following conditions 31*4882a593Smuzhiyun * are met: 32*4882a593Smuzhiyun * 33*4882a593Smuzhiyun * * Redistributions of source code must retain the above copyright 34*4882a593Smuzhiyun * notice, this list of conditions and the following disclaimer. 35*4882a593Smuzhiyun * * Redistributions in binary form must reproduce the above copyright 36*4882a593Smuzhiyun * notice, this list of conditions and the following disclaimer in 37*4882a593Smuzhiyun * the documentation and/or other materials provided with the 38*4882a593Smuzhiyun * distribution. 39*4882a593Smuzhiyun * * Neither the name of Intel Corporation nor the names of its 40*4882a593Smuzhiyun * contributors may be used to endorse or promote products derived 41*4882a593Smuzhiyun * from this software without specific prior written permission. 42*4882a593Smuzhiyun * 43*4882a593Smuzhiyun * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 44*4882a593Smuzhiyun * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 45*4882a593Smuzhiyun * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 46*4882a593Smuzhiyun * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 47*4882a593Smuzhiyun * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 48*4882a593Smuzhiyun * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 49*4882a593Smuzhiyun * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 50*4882a593Smuzhiyun * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 51*4882a593Smuzhiyun * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 52*4882a593Smuzhiyun * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 53*4882a593Smuzhiyun * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 54*4882a593Smuzhiyun */ 55*4882a593Smuzhiyun 56*4882a593Smuzhiyun #ifndef _SCU_COMPLETION_CODES_HEADER_ 57*4882a593Smuzhiyun #define _SCU_COMPLETION_CODES_HEADER_ 58*4882a593Smuzhiyun 59*4882a593Smuzhiyun /** 60*4882a593Smuzhiyun * This file contains the constants and macros for the SCU hardware completion 61*4882a593Smuzhiyun * codes. 62*4882a593Smuzhiyun * 63*4882a593Smuzhiyun * 64*4882a593Smuzhiyun */ 65*4882a593Smuzhiyun 66*4882a593Smuzhiyun #define SCU_COMPLETION_TYPE_SHIFT 28 67*4882a593Smuzhiyun #define SCU_COMPLETION_TYPE_MASK 0x70000000 68*4882a593Smuzhiyun 69*4882a593Smuzhiyun /** 70*4882a593Smuzhiyun * SCU_COMPLETION_TYPE() - 71*4882a593Smuzhiyun * 72*4882a593Smuzhiyun * This macro constructs an SCU completion type 73*4882a593Smuzhiyun */ 74*4882a593Smuzhiyun #define SCU_COMPLETION_TYPE(type) \ 75*4882a593Smuzhiyun ((u32)(type) << SCU_COMPLETION_TYPE_SHIFT) 76*4882a593Smuzhiyun 77*4882a593Smuzhiyun /** 78*4882a593Smuzhiyun * SCU_COMPLETION_TYPE() - 79*4882a593Smuzhiyun * 80*4882a593Smuzhiyun * These macros contain the SCU completion types SCU_COMPLETION_TYPE 81*4882a593Smuzhiyun */ 82*4882a593Smuzhiyun #define SCU_COMPLETION_TYPE_TASK SCU_COMPLETION_TYPE(0) 83*4882a593Smuzhiyun #define SCU_COMPLETION_TYPE_SDMA SCU_COMPLETION_TYPE(1) 84*4882a593Smuzhiyun #define SCU_COMPLETION_TYPE_UFI SCU_COMPLETION_TYPE(2) 85*4882a593Smuzhiyun #define SCU_COMPLETION_TYPE_EVENT SCU_COMPLETION_TYPE(3) 86*4882a593Smuzhiyun #define SCU_COMPLETION_TYPE_NOTIFY SCU_COMPLETION_TYPE(4) 87*4882a593Smuzhiyun 88*4882a593Smuzhiyun /** 89*4882a593Smuzhiyun * 90*4882a593Smuzhiyun * 91*4882a593Smuzhiyun * These constants provide the shift and mask values for the various parts of 92*4882a593Smuzhiyun * an SCU completion code. 93*4882a593Smuzhiyun */ 94*4882a593Smuzhiyun #define SCU_COMPLETION_STATUS_MASK 0x0FFC0000 95*4882a593Smuzhiyun #define SCU_COMPLETION_TL_STATUS_MASK 0x0FC00000 96*4882a593Smuzhiyun #define SCU_COMPLETION_TL_STATUS_SHIFT 22 97*4882a593Smuzhiyun #define SCU_COMPLETION_SDMA_STATUS_MASK 0x003C0000 98*4882a593Smuzhiyun #define SCU_COMPLETION_PEG_MASK 0x00010000 99*4882a593Smuzhiyun #define SCU_COMPLETION_PORT_MASK 0x00007000 100*4882a593Smuzhiyun #define SCU_COMPLETION_PE_MASK SCU_COMPLETION_PORT_MASK 101*4882a593Smuzhiyun #define SCU_COMPLETION_PE_SHIFT 12 102*4882a593Smuzhiyun #define SCU_COMPLETION_INDEX_MASK 0x00000FFF 103*4882a593Smuzhiyun 104*4882a593Smuzhiyun /** 105*4882a593Smuzhiyun * SCU_GET_COMPLETION_TYPE() - 106*4882a593Smuzhiyun * 107*4882a593Smuzhiyun * This macro returns the SCU completion type. 108*4882a593Smuzhiyun */ 109*4882a593Smuzhiyun #define SCU_GET_COMPLETION_TYPE(completion_code) \ 110*4882a593Smuzhiyun ((completion_code) & SCU_COMPLETION_TYPE_MASK) 111*4882a593Smuzhiyun 112*4882a593Smuzhiyun /** 113*4882a593Smuzhiyun * SCU_GET_COMPLETION_STATUS() - 114*4882a593Smuzhiyun * 115*4882a593Smuzhiyun * This macro returns the SCU completion status. 116*4882a593Smuzhiyun */ 117*4882a593Smuzhiyun #define SCU_GET_COMPLETION_STATUS(completion_code) \ 118*4882a593Smuzhiyun ((completion_code) & SCU_COMPLETION_STATUS_MASK) 119*4882a593Smuzhiyun 120*4882a593Smuzhiyun /** 121*4882a593Smuzhiyun * SCU_GET_COMPLETION_TL_STATUS() - 122*4882a593Smuzhiyun * 123*4882a593Smuzhiyun * This macro returns the transport layer completion status. 124*4882a593Smuzhiyun */ 125*4882a593Smuzhiyun #define SCU_GET_COMPLETION_TL_STATUS(completion_code) \ 126*4882a593Smuzhiyun ((completion_code) & SCU_COMPLETION_TL_STATUS_MASK) 127*4882a593Smuzhiyun 128*4882a593Smuzhiyun /** 129*4882a593Smuzhiyun * SCU_MAKE_COMPLETION_STATUS() - 130*4882a593Smuzhiyun * 131*4882a593Smuzhiyun * This macro takes a completion code and performs the shift and mask 132*4882a593Smuzhiyun * operations to turn it into a completion code that can be compared to a 133*4882a593Smuzhiyun * SCU_GET_COMPLETION_TL_STATUS. 134*4882a593Smuzhiyun */ 135*4882a593Smuzhiyun #define SCU_MAKE_COMPLETION_STATUS(completion_code) \ 136*4882a593Smuzhiyun ((u32)(completion_code) << SCU_COMPLETION_TL_STATUS_SHIFT) 137*4882a593Smuzhiyun 138*4882a593Smuzhiyun /** 139*4882a593Smuzhiyun * SCU_NORMALIZE_COMPLETION_STATUS() - 140*4882a593Smuzhiyun * 141*4882a593Smuzhiyun * This macro takes a SCU_GET_COMPLETION_TL_STATUS and normalizes it for a 142*4882a593Smuzhiyun * return code. 143*4882a593Smuzhiyun */ 144*4882a593Smuzhiyun #define SCU_NORMALIZE_COMPLETION_STATUS(completion_code) \ 145*4882a593Smuzhiyun (\ 146*4882a593Smuzhiyun ((completion_code) & SCU_COMPLETION_TL_STATUS_MASK) \ 147*4882a593Smuzhiyun >> SCU_COMPLETION_TL_STATUS_SHIFT \ 148*4882a593Smuzhiyun ) 149*4882a593Smuzhiyun 150*4882a593Smuzhiyun /** 151*4882a593Smuzhiyun * SCU_GET_COMPLETION_SDMA_STATUS() - 152*4882a593Smuzhiyun * 153*4882a593Smuzhiyun * This macro returns the SDMA completion status. 154*4882a593Smuzhiyun */ 155*4882a593Smuzhiyun #define SCU_GET_COMPLETION_SDMA_STATUS(completion_code) \ 156*4882a593Smuzhiyun ((completion_code) & SCU_COMPLETION_SDMA_STATUS_MASK) 157*4882a593Smuzhiyun 158*4882a593Smuzhiyun /** 159*4882a593Smuzhiyun * SCU_GET_COMPLETION_PEG() - 160*4882a593Smuzhiyun * 161*4882a593Smuzhiyun * This macro returns the Protocol Engine Group from the completion code. 162*4882a593Smuzhiyun */ 163*4882a593Smuzhiyun #define SCU_GET_COMPLETION_PEG(completion_code) \ 164*4882a593Smuzhiyun ((completion_code) & SCU_COMPLETION_PEG_MASK) 165*4882a593Smuzhiyun 166*4882a593Smuzhiyun /** 167*4882a593Smuzhiyun * SCU_GET_COMPLETION_PORT() - 168*4882a593Smuzhiyun * 169*4882a593Smuzhiyun * This macro reuturns the logical port index from the completion code. 170*4882a593Smuzhiyun */ 171*4882a593Smuzhiyun #define SCU_GET_COMPLETION_PORT(completion_code) \ 172*4882a593Smuzhiyun ((completion_code) & SCU_COMPLETION_PORT_MASK) 173*4882a593Smuzhiyun 174*4882a593Smuzhiyun /** 175*4882a593Smuzhiyun * SCU_GET_PROTOCOL_ENGINE_INDEX() - 176*4882a593Smuzhiyun * 177*4882a593Smuzhiyun * This macro returns the PE index from the completion code. 178*4882a593Smuzhiyun */ 179*4882a593Smuzhiyun #define SCU_GET_PROTOCOL_ENGINE_INDEX(completion_code) \ 180*4882a593Smuzhiyun (((completion_code) & SCU_COMPLETION_PE_MASK) >> SCU_COMPLETION_PE_SHIFT) 181*4882a593Smuzhiyun 182*4882a593Smuzhiyun /** 183*4882a593Smuzhiyun * SCU_GET_COMPLETION_INDEX() - 184*4882a593Smuzhiyun * 185*4882a593Smuzhiyun * This macro returns the index of the completion which is either a TCi or an 186*4882a593Smuzhiyun * RNi depending on the completion type. 187*4882a593Smuzhiyun */ 188*4882a593Smuzhiyun #define SCU_GET_COMPLETION_INDEX(completion_code) \ 189*4882a593Smuzhiyun ((completion_code) & SCU_COMPLETION_INDEX_MASK) 190*4882a593Smuzhiyun 191*4882a593Smuzhiyun #define SCU_UNSOLICITED_FRAME_MASK 0x0FFF0000 192*4882a593Smuzhiyun #define SCU_UNSOLICITED_FRAME_SHIFT 16 193*4882a593Smuzhiyun 194*4882a593Smuzhiyun /** 195*4882a593Smuzhiyun * SCU_GET_FRAME_INDEX() - 196*4882a593Smuzhiyun * 197*4882a593Smuzhiyun * This macro returns a normalized frame index from an unsolicited frame 198*4882a593Smuzhiyun * completion. 199*4882a593Smuzhiyun */ 200*4882a593Smuzhiyun #define SCU_GET_FRAME_INDEX(completion_code) \ 201*4882a593Smuzhiyun (\ 202*4882a593Smuzhiyun ((completion_code) & SCU_UNSOLICITED_FRAME_MASK) \ 203*4882a593Smuzhiyun >> SCU_UNSOLICITED_FRAME_SHIFT \ 204*4882a593Smuzhiyun ) 205*4882a593Smuzhiyun 206*4882a593Smuzhiyun #define SCU_UNSOLICITED_FRAME_ERROR_MASK 0x00008000 207*4882a593Smuzhiyun 208*4882a593Smuzhiyun /** 209*4882a593Smuzhiyun * SCU_GET_FRAME_ERROR() - 210*4882a593Smuzhiyun * 211*4882a593Smuzhiyun * This macro returns a zero (0) value if there is no frame error otherwise it 212*4882a593Smuzhiyun * returns non-zero (!0). 213*4882a593Smuzhiyun */ 214*4882a593Smuzhiyun #define SCU_GET_FRAME_ERROR(completion_code) \ 215*4882a593Smuzhiyun ((completion_code) & SCU_UNSOLICITED_FRAME_ERROR_MASK) 216*4882a593Smuzhiyun 217*4882a593Smuzhiyun /** 218*4882a593Smuzhiyun * 219*4882a593Smuzhiyun * 220*4882a593Smuzhiyun * These constants represent normalized completion codes which must be shifted 221*4882a593Smuzhiyun * 18 bits to match it with the hardware completion code. In a 16-bit compiler, 222*4882a593Smuzhiyun * immediate constants are 16-bit values (the size of an int). If we shift 223*4882a593Smuzhiyun * those by 18 bits, we completely lose the value. To ensure the value is a 224*4882a593Smuzhiyun * 32-bit value like we want, each immediate value must be cast to a u32. 225*4882a593Smuzhiyun */ 226*4882a593Smuzhiyun #define SCU_TASK_DONE_GOOD ((u32)0x00) 227*4882a593Smuzhiyun #define SCU_TASK_DONE_TX_RAW_CMD_ERR ((u32)0x08) 228*4882a593Smuzhiyun #define SCU_TASK_DONE_CRC_ERR ((u32)0x14) 229*4882a593Smuzhiyun #define SCU_TASK_DONE_CHECK_RESPONSE ((u32)0x14) 230*4882a593Smuzhiyun #define SCU_TASK_DONE_GEN_RESPONSE ((u32)0x15) 231*4882a593Smuzhiyun #define SCU_TASK_DONE_NAK_CMD_ERR ((u32)0x16) 232*4882a593Smuzhiyun #define SCU_TASK_DONE_CMD_LL_R_ERR ((u32)0x16) 233*4882a593Smuzhiyun #define SCU_TASK_DONE_LL_R_ERR ((u32)0x17) 234*4882a593Smuzhiyun #define SCU_TASK_DONE_ACK_NAK_TO ((u32)0x17) 235*4882a593Smuzhiyun #define SCU_TASK_DONE_LL_PERR ((u32)0x18) 236*4882a593Smuzhiyun #define SCU_TASK_DONE_LL_SY_TERM ((u32)0x19) 237*4882a593Smuzhiyun #define SCU_TASK_DONE_NAK_ERR ((u32)0x19) 238*4882a593Smuzhiyun #define SCU_TASK_DONE_LL_LF_TERM ((u32)0x1A) 239*4882a593Smuzhiyun #define SCU_TASK_DONE_DATA_LEN_ERR ((u32)0x1A) 240*4882a593Smuzhiyun #define SCU_TASK_DONE_LL_CL_TERM ((u32)0x1B) 241*4882a593Smuzhiyun #define SCU_TASK_DONE_BREAK_RCVD ((u32)0x1B) 242*4882a593Smuzhiyun #define SCU_TASK_DONE_LL_ABORT_ERR ((u32)0x1B) 243*4882a593Smuzhiyun #define SCU_TASK_DONE_SEQ_INV_TYPE ((u32)0x1C) 244*4882a593Smuzhiyun #define SCU_TASK_DONE_UNEXP_XR ((u32)0x1C) 245*4882a593Smuzhiyun #define SCU_TASK_DONE_INV_FIS_TYPE ((u32)0x1D) 246*4882a593Smuzhiyun #define SCU_TASK_DONE_XR_IU_LEN_ERR ((u32)0x1D) 247*4882a593Smuzhiyun #define SCU_TASK_DONE_INV_FIS_LEN ((u32)0x1E) 248*4882a593Smuzhiyun #define SCU_TASK_DONE_XR_WD_LEN ((u32)0x1E) 249*4882a593Smuzhiyun #define SCU_TASK_DONE_SDMA_ERR ((u32)0x1F) 250*4882a593Smuzhiyun #define SCU_TASK_DONE_OFFSET_ERR ((u32)0x20) 251*4882a593Smuzhiyun #define SCU_TASK_DONE_MAX_PLD_ERR ((u32)0x21) 252*4882a593Smuzhiyun #define SCU_TASK_DONE_EXCESS_DATA ((u32)0x22) 253*4882a593Smuzhiyun #define SCU_TASK_DONE_LF_ERR ((u32)0x23) 254*4882a593Smuzhiyun #define SCU_TASK_DONE_UNEXP_FIS ((u32)0x24) 255*4882a593Smuzhiyun #define SCU_TASK_DONE_UNEXP_RESP ((u32)0x24) 256*4882a593Smuzhiyun #define SCU_TASK_DONE_EARLY_RESP ((u32)0x25) 257*4882a593Smuzhiyun #define SCU_TASK_DONE_SMP_RESP_TO_ERR ((u32)0x26) 258*4882a593Smuzhiyun #define SCU_TASK_DONE_DMASETUP_DIRERR ((u32)0x27) 259*4882a593Smuzhiyun #define SCU_TASK_DONE_SMP_UFI_ERR ((u32)0x27) 260*4882a593Smuzhiyun #define SCU_TASK_DONE_XFERCNT_ERR ((u32)0x28) 261*4882a593Smuzhiyun #define SCU_TASK_DONE_SMP_FRM_TYPE_ERR ((u32)0x28) 262*4882a593Smuzhiyun #define SCU_TASK_DONE_SMP_LL_RX_ERR ((u32)0x29) 263*4882a593Smuzhiyun #define SCU_TASK_DONE_RESP_LEN_ERR ((u32)0x2A) 264*4882a593Smuzhiyun #define SCU_TASK_DONE_UNEXP_DATA ((u32)0x2B) 265*4882a593Smuzhiyun #define SCU_TASK_DONE_OPEN_FAIL ((u32)0x2C) 266*4882a593Smuzhiyun #define SCU_TASK_DONE_UNEXP_SDBFIS ((u32)0x2D) 267*4882a593Smuzhiyun #define SCU_TASK_DONE_REG_ERR ((u32)0x2E) 268*4882a593Smuzhiyun #define SCU_TASK_DONE_SDB_ERR ((u32)0x2F) 269*4882a593Smuzhiyun #define SCU_TASK_DONE_TASK_ABORT ((u32)0x30) 270*4882a593Smuzhiyun #define SCU_TASK_DONE_CMD_SDMA_ERR ((U32)0x32) 271*4882a593Smuzhiyun #define SCU_TASK_DONE_CMD_LL_ABORT_ERR ((U32)0x33) 272*4882a593Smuzhiyun #define SCU_TASK_OPEN_REJECT_WRONG_DESTINATION ((u32)0x34) 273*4882a593Smuzhiyun #define SCU_TASK_OPEN_REJECT_RESERVED_ABANDON_1 ((u32)0x35) 274*4882a593Smuzhiyun #define SCU_TASK_OPEN_REJECT_RESERVED_ABANDON_2 ((u32)0x36) 275*4882a593Smuzhiyun #define SCU_TASK_OPEN_REJECT_RESERVED_ABANDON_3 ((u32)0x37) 276*4882a593Smuzhiyun #define SCU_TASK_OPEN_REJECT_BAD_DESTINATION ((u32)0x38) 277*4882a593Smuzhiyun #define SCU_TASK_OPEN_REJECT_ZONE_VIOLATION ((u32)0x39) 278*4882a593Smuzhiyun #define SCU_TASK_DONE_VIIT_ENTRY_NV ((u32)0x3A) 279*4882a593Smuzhiyun #define SCU_TASK_DONE_IIT_ENTRY_NV ((u32)0x3B) 280*4882a593Smuzhiyun #define SCU_TASK_DONE_RNCNV_OUTBOUND ((u32)0x3C) 281*4882a593Smuzhiyun #define SCU_TASK_OPEN_REJECT_STP_RESOURCES_BUSY ((u32)0x3D) 282*4882a593Smuzhiyun #define SCU_TASK_OPEN_REJECT_PROTOCOL_NOT_SUPPORTED ((u32)0x3E) 283*4882a593Smuzhiyun #define SCU_TASK_OPEN_REJECT_CONNECTION_RATE_NOT_SUPPORTED ((u32)0x3F) 284*4882a593Smuzhiyun 285*4882a593Smuzhiyun #endif /* _SCU_COMPLETION_CODES_HEADER_ */ 286