xref: /OK3568_Linux_fs/kernel/drivers/scsi/isci/phy.h (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun /*
2*4882a593Smuzhiyun  * This file is provided under a dual BSD/GPLv2 license.  When using or
3*4882a593Smuzhiyun  * redistributing this file, you may do so under either license.
4*4882a593Smuzhiyun  *
5*4882a593Smuzhiyun  * GPL LICENSE SUMMARY
6*4882a593Smuzhiyun  *
7*4882a593Smuzhiyun  * Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved.
8*4882a593Smuzhiyun  *
9*4882a593Smuzhiyun  * This program is free software; you can redistribute it and/or modify
10*4882a593Smuzhiyun  * it under the terms of version 2 of the GNU General Public License as
11*4882a593Smuzhiyun  * published by the Free Software Foundation.
12*4882a593Smuzhiyun  *
13*4882a593Smuzhiyun  * This program is distributed in the hope that it will be useful, but
14*4882a593Smuzhiyun  * WITHOUT ANY WARRANTY; without even the implied warranty of
15*4882a593Smuzhiyun  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
16*4882a593Smuzhiyun  * General Public License for more details.
17*4882a593Smuzhiyun  *
18*4882a593Smuzhiyun  * You should have received a copy of the GNU General Public License
19*4882a593Smuzhiyun  * along with this program; if not, write to the Free Software
20*4882a593Smuzhiyun  * Foundation, Inc., 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
21*4882a593Smuzhiyun  * The full GNU General Public License is included in this distribution
22*4882a593Smuzhiyun  * in the file called LICENSE.GPL.
23*4882a593Smuzhiyun  *
24*4882a593Smuzhiyun  * BSD LICENSE
25*4882a593Smuzhiyun  *
26*4882a593Smuzhiyun  * Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved.
27*4882a593Smuzhiyun  * All rights reserved.
28*4882a593Smuzhiyun  *
29*4882a593Smuzhiyun  * Redistribution and use in source and binary forms, with or without
30*4882a593Smuzhiyun  * modification, are permitted provided that the following conditions
31*4882a593Smuzhiyun  * are met:
32*4882a593Smuzhiyun  *
33*4882a593Smuzhiyun  *   * Redistributions of source code must retain the above copyright
34*4882a593Smuzhiyun  *     notice, this list of conditions and the following disclaimer.
35*4882a593Smuzhiyun  *   * Redistributions in binary form must reproduce the above copyright
36*4882a593Smuzhiyun  *     notice, this list of conditions and the following disclaimer in
37*4882a593Smuzhiyun  *     the documentation and/or other materials provided with the
38*4882a593Smuzhiyun  *     distribution.
39*4882a593Smuzhiyun  *   * Neither the name of Intel Corporation nor the names of its
40*4882a593Smuzhiyun  *     contributors may be used to endorse or promote products derived
41*4882a593Smuzhiyun  *     from this software without specific prior written permission.
42*4882a593Smuzhiyun  *
43*4882a593Smuzhiyun  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
44*4882a593Smuzhiyun  * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
45*4882a593Smuzhiyun  * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
46*4882a593Smuzhiyun  * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
47*4882a593Smuzhiyun  * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
48*4882a593Smuzhiyun  * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
49*4882a593Smuzhiyun  * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
50*4882a593Smuzhiyun  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
51*4882a593Smuzhiyun  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
52*4882a593Smuzhiyun  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
53*4882a593Smuzhiyun  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
54*4882a593Smuzhiyun  */
55*4882a593Smuzhiyun #ifndef _ISCI_PHY_H_
56*4882a593Smuzhiyun #define _ISCI_PHY_H_
57*4882a593Smuzhiyun 
58*4882a593Smuzhiyun #include <scsi/sas.h>
59*4882a593Smuzhiyun #include <scsi/libsas.h>
60*4882a593Smuzhiyun #include "isci.h"
61*4882a593Smuzhiyun #include "sas.h"
62*4882a593Smuzhiyun 
63*4882a593Smuzhiyun /* This is the timeout value for the SATA phy to wait for a SIGNATURE FIS
64*4882a593Smuzhiyun  * before restarting the starting state machine.  Technically, the old parallel
65*4882a593Smuzhiyun  * ATA specification required up to 30 seconds for a device to issue its
66*4882a593Smuzhiyun  * signature FIS as a result of a soft reset.  Now we see that devices respond
67*4882a593Smuzhiyun  * generally within 15 seconds, but we'll use 25 for now.
68*4882a593Smuzhiyun  */
69*4882a593Smuzhiyun #define SCIC_SDS_SIGNATURE_FIS_TIMEOUT    25000
70*4882a593Smuzhiyun 
71*4882a593Smuzhiyun /* This is the timeout for the SATA OOB/SN because the hardware does not
72*4882a593Smuzhiyun  * recognize a hot plug after OOB signal but before the SN signals.  We need to
73*4882a593Smuzhiyun  * make sure after a hotplug timeout if we have not received the speed event
74*4882a593Smuzhiyun  * notification from the hardware that we restart the hardware OOB state
75*4882a593Smuzhiyun  * machine.
76*4882a593Smuzhiyun  */
77*4882a593Smuzhiyun #define SCIC_SDS_SATA_LINK_TRAINING_TIMEOUT  250
78*4882a593Smuzhiyun 
79*4882a593Smuzhiyun /**
80*4882a593Smuzhiyun  * isci_phy - hba local phy infrastructure
81*4882a593Smuzhiyun  * @sm:
82*4882a593Smuzhiyun  * @protocol: attached device protocol
83*4882a593Smuzhiyun  * @phy_index: physical index relative to the controller (0-3)
84*4882a593Smuzhiyun  * @bcn_received_while_port_unassigned: bcn to report after port association
85*4882a593Smuzhiyun  * @sata_timer: timeout SATA signature FIS arrival
86*4882a593Smuzhiyun  */
87*4882a593Smuzhiyun struct isci_phy {
88*4882a593Smuzhiyun 	struct sci_base_state_machine sm;
89*4882a593Smuzhiyun 	struct isci_port *owning_port;
90*4882a593Smuzhiyun 	enum sas_linkrate max_negotiated_speed;
91*4882a593Smuzhiyun 	enum sas_protocol protocol;
92*4882a593Smuzhiyun 	u8 phy_index;
93*4882a593Smuzhiyun 	bool bcn_received_while_port_unassigned;
94*4882a593Smuzhiyun 	bool is_in_link_training;
95*4882a593Smuzhiyun 	struct sci_timer sata_timer;
96*4882a593Smuzhiyun 	struct scu_transport_layer_registers __iomem *transport_layer_registers;
97*4882a593Smuzhiyun 	struct scu_link_layer_registers __iomem *link_layer_registers;
98*4882a593Smuzhiyun 	struct asd_sas_phy sas_phy;
99*4882a593Smuzhiyun 	u8 sas_addr[SAS_ADDR_SIZE];
100*4882a593Smuzhiyun 	union {
101*4882a593Smuzhiyun 		struct sas_identify_frame iaf;
102*4882a593Smuzhiyun 		struct dev_to_host_fis fis;
103*4882a593Smuzhiyun 	} frame_rcvd;
104*4882a593Smuzhiyun };
105*4882a593Smuzhiyun 
to_iphy(struct asd_sas_phy * sas_phy)106*4882a593Smuzhiyun static inline struct isci_phy *to_iphy(struct asd_sas_phy *sas_phy)
107*4882a593Smuzhiyun {
108*4882a593Smuzhiyun 	struct isci_phy *iphy = container_of(sas_phy, typeof(*iphy), sas_phy);
109*4882a593Smuzhiyun 
110*4882a593Smuzhiyun 	return iphy;
111*4882a593Smuzhiyun }
112*4882a593Smuzhiyun 
113*4882a593Smuzhiyun struct sci_phy_cap {
114*4882a593Smuzhiyun 	union {
115*4882a593Smuzhiyun 		struct {
116*4882a593Smuzhiyun 			/*
117*4882a593Smuzhiyun 			 * The SAS specification indicates the start bit shall
118*4882a593Smuzhiyun 			 * always be set to
119*4882a593Smuzhiyun 			 * 1.  This implementation will have the start bit set
120*4882a593Smuzhiyun 			 * to 0 if the PHY CAPABILITIES were either not
121*4882a593Smuzhiyun 			 * received or speed negotiation failed.
122*4882a593Smuzhiyun 			 */
123*4882a593Smuzhiyun 			u8 start:1;
124*4882a593Smuzhiyun 			u8 tx_ssc_type:1;
125*4882a593Smuzhiyun 			u8 res1:2;
126*4882a593Smuzhiyun 			u8 req_logical_linkrate:4;
127*4882a593Smuzhiyun 
128*4882a593Smuzhiyun 			u32 gen1_no_ssc:1;
129*4882a593Smuzhiyun 			u32 gen1_ssc:1;
130*4882a593Smuzhiyun 			u32 gen2_no_ssc:1;
131*4882a593Smuzhiyun 			u32 gen2_ssc:1;
132*4882a593Smuzhiyun 			u32 gen3_no_ssc:1;
133*4882a593Smuzhiyun 			u32 gen3_ssc:1;
134*4882a593Smuzhiyun 			u32 res2:17;
135*4882a593Smuzhiyun 			u32 parity:1;
136*4882a593Smuzhiyun 		};
137*4882a593Smuzhiyun 		u32 all;
138*4882a593Smuzhiyun 	};
139*4882a593Smuzhiyun }  __packed;
140*4882a593Smuzhiyun 
141*4882a593Smuzhiyun /* this data structure reflects the link layer transmit identification reg */
142*4882a593Smuzhiyun struct sci_phy_proto {
143*4882a593Smuzhiyun 	union {
144*4882a593Smuzhiyun 		struct {
145*4882a593Smuzhiyun 			u16 _r_a:1;
146*4882a593Smuzhiyun 			u16 smp_iport:1;
147*4882a593Smuzhiyun 			u16 stp_iport:1;
148*4882a593Smuzhiyun 			u16 ssp_iport:1;
149*4882a593Smuzhiyun 			u16 _r_b:4;
150*4882a593Smuzhiyun 			u16 _r_c:1;
151*4882a593Smuzhiyun 			u16 smp_tport:1;
152*4882a593Smuzhiyun 			u16 stp_tport:1;
153*4882a593Smuzhiyun 			u16 ssp_tport:1;
154*4882a593Smuzhiyun 			u16 _r_d:4;
155*4882a593Smuzhiyun 		};
156*4882a593Smuzhiyun 		u16 all;
157*4882a593Smuzhiyun 	};
158*4882a593Smuzhiyun } __packed;
159*4882a593Smuzhiyun 
160*4882a593Smuzhiyun 
161*4882a593Smuzhiyun /**
162*4882a593Smuzhiyun  * struct sci_phy_properties - This structure defines the properties common to
163*4882a593Smuzhiyun  *    all phys that can be retrieved.
164*4882a593Smuzhiyun  *
165*4882a593Smuzhiyun  *
166*4882a593Smuzhiyun  */
167*4882a593Smuzhiyun struct sci_phy_properties {
168*4882a593Smuzhiyun 	/**
169*4882a593Smuzhiyun 	 * This field specifies the port that currently contains the
170*4882a593Smuzhiyun 	 * supplied phy.  This field may be set to NULL
171*4882a593Smuzhiyun 	 * if the phy is not currently contained in a port.
172*4882a593Smuzhiyun 	 */
173*4882a593Smuzhiyun 	struct isci_port *iport;
174*4882a593Smuzhiyun 
175*4882a593Smuzhiyun 	/**
176*4882a593Smuzhiyun 	 * This field specifies the link rate at which the phy is
177*4882a593Smuzhiyun 	 * currently operating.
178*4882a593Smuzhiyun 	 */
179*4882a593Smuzhiyun 	enum sas_linkrate negotiated_link_rate;
180*4882a593Smuzhiyun 
181*4882a593Smuzhiyun 	/**
182*4882a593Smuzhiyun 	 * This field specifies the index of the phy in relation to other
183*4882a593Smuzhiyun 	 * phys within the controller.  This index is zero relative.
184*4882a593Smuzhiyun 	 */
185*4882a593Smuzhiyun 	u8 index;
186*4882a593Smuzhiyun };
187*4882a593Smuzhiyun 
188*4882a593Smuzhiyun /**
189*4882a593Smuzhiyun  * struct sci_sas_phy_properties - This structure defines the properties,
190*4882a593Smuzhiyun  *    specific to a SAS phy, that can be retrieved.
191*4882a593Smuzhiyun  *
192*4882a593Smuzhiyun  *
193*4882a593Smuzhiyun  */
194*4882a593Smuzhiyun struct sci_sas_phy_properties {
195*4882a593Smuzhiyun 	/**
196*4882a593Smuzhiyun 	 * This field delineates the Identify Address Frame received
197*4882a593Smuzhiyun 	 * from the remote end point.
198*4882a593Smuzhiyun 	 */
199*4882a593Smuzhiyun 	struct sas_identify_frame rcvd_iaf;
200*4882a593Smuzhiyun 
201*4882a593Smuzhiyun 	/**
202*4882a593Smuzhiyun 	 * This field delineates the Phy capabilities structure received
203*4882a593Smuzhiyun 	 * from the remote end point.
204*4882a593Smuzhiyun 	 */
205*4882a593Smuzhiyun 	struct sci_phy_cap rcvd_cap;
206*4882a593Smuzhiyun 
207*4882a593Smuzhiyun };
208*4882a593Smuzhiyun 
209*4882a593Smuzhiyun /**
210*4882a593Smuzhiyun  * struct sci_sata_phy_properties - This structure defines the properties,
211*4882a593Smuzhiyun  *    specific to a SATA phy, that can be retrieved.
212*4882a593Smuzhiyun  *
213*4882a593Smuzhiyun  *
214*4882a593Smuzhiyun  */
215*4882a593Smuzhiyun struct sci_sata_phy_properties {
216*4882a593Smuzhiyun 	/**
217*4882a593Smuzhiyun 	 * This field delineates the signature FIS received from the
218*4882a593Smuzhiyun 	 * attached target.
219*4882a593Smuzhiyun 	 */
220*4882a593Smuzhiyun 	struct dev_to_host_fis signature_fis;
221*4882a593Smuzhiyun 
222*4882a593Smuzhiyun 	/**
223*4882a593Smuzhiyun 	 * This field specifies to the user if a port selector is connected
224*4882a593Smuzhiyun 	 * on the specified phy.
225*4882a593Smuzhiyun 	 */
226*4882a593Smuzhiyun 	bool is_port_selector_present;
227*4882a593Smuzhiyun 
228*4882a593Smuzhiyun };
229*4882a593Smuzhiyun 
230*4882a593Smuzhiyun /**
231*4882a593Smuzhiyun  * enum sci_phy_counter_id - This enumeration depicts the various pieces of
232*4882a593Smuzhiyun  *    optional information that can be retrieved for a specific phy.
233*4882a593Smuzhiyun  *
234*4882a593Smuzhiyun  *
235*4882a593Smuzhiyun  */
236*4882a593Smuzhiyun enum sci_phy_counter_id {
237*4882a593Smuzhiyun 	/**
238*4882a593Smuzhiyun 	 * This PHY information field tracks the number of frames received.
239*4882a593Smuzhiyun 	 */
240*4882a593Smuzhiyun 	SCIC_PHY_COUNTER_RECEIVED_FRAME,
241*4882a593Smuzhiyun 
242*4882a593Smuzhiyun 	/**
243*4882a593Smuzhiyun 	 * This PHY information field tracks the number of frames transmitted.
244*4882a593Smuzhiyun 	 */
245*4882a593Smuzhiyun 	SCIC_PHY_COUNTER_TRANSMITTED_FRAME,
246*4882a593Smuzhiyun 
247*4882a593Smuzhiyun 	/**
248*4882a593Smuzhiyun 	 * This PHY information field tracks the number of DWORDs received.
249*4882a593Smuzhiyun 	 */
250*4882a593Smuzhiyun 	SCIC_PHY_COUNTER_RECEIVED_FRAME_WORD,
251*4882a593Smuzhiyun 
252*4882a593Smuzhiyun 	/**
253*4882a593Smuzhiyun 	 * This PHY information field tracks the number of DWORDs transmitted.
254*4882a593Smuzhiyun 	 */
255*4882a593Smuzhiyun 	SCIC_PHY_COUNTER_TRANSMITTED_FRAME_DWORD,
256*4882a593Smuzhiyun 
257*4882a593Smuzhiyun 	/**
258*4882a593Smuzhiyun 	 * This PHY information field tracks the number of times DWORD
259*4882a593Smuzhiyun 	 * synchronization was lost.
260*4882a593Smuzhiyun 	 */
261*4882a593Smuzhiyun 	SCIC_PHY_COUNTER_LOSS_OF_SYNC_ERROR,
262*4882a593Smuzhiyun 
263*4882a593Smuzhiyun 	/**
264*4882a593Smuzhiyun 	 * This PHY information field tracks the number of received DWORDs with
265*4882a593Smuzhiyun 	 * running disparity errors.
266*4882a593Smuzhiyun 	 */
267*4882a593Smuzhiyun 	SCIC_PHY_COUNTER_RECEIVED_DISPARITY_ERROR,
268*4882a593Smuzhiyun 
269*4882a593Smuzhiyun 	/**
270*4882a593Smuzhiyun 	 * This PHY information field tracks the number of received frames with a
271*4882a593Smuzhiyun 	 * CRC error (not including short or truncated frames).
272*4882a593Smuzhiyun 	 */
273*4882a593Smuzhiyun 	SCIC_PHY_COUNTER_RECEIVED_FRAME_CRC_ERROR,
274*4882a593Smuzhiyun 
275*4882a593Smuzhiyun 	/**
276*4882a593Smuzhiyun 	 * This PHY information field tracks the number of DONE (ACK/NAK TIMEOUT)
277*4882a593Smuzhiyun 	 * primitives received.
278*4882a593Smuzhiyun 	 */
279*4882a593Smuzhiyun 	SCIC_PHY_COUNTER_RECEIVED_DONE_ACK_NAK_TIMEOUT,
280*4882a593Smuzhiyun 
281*4882a593Smuzhiyun 	/**
282*4882a593Smuzhiyun 	 * This PHY information field tracks the number of DONE (ACK/NAK TIMEOUT)
283*4882a593Smuzhiyun 	 * primitives transmitted.
284*4882a593Smuzhiyun 	 */
285*4882a593Smuzhiyun 	SCIC_PHY_COUNTER_TRANSMITTED_DONE_ACK_NAK_TIMEOUT,
286*4882a593Smuzhiyun 
287*4882a593Smuzhiyun 	/**
288*4882a593Smuzhiyun 	 * This PHY information field tracks the number of times the inactivity
289*4882a593Smuzhiyun 	 * timer for connections on the phy has been utilized.
290*4882a593Smuzhiyun 	 */
291*4882a593Smuzhiyun 	SCIC_PHY_COUNTER_INACTIVITY_TIMER_EXPIRED,
292*4882a593Smuzhiyun 
293*4882a593Smuzhiyun 	/**
294*4882a593Smuzhiyun 	 * This PHY information field tracks the number of DONE (CREDIT TIMEOUT)
295*4882a593Smuzhiyun 	 * primitives received.
296*4882a593Smuzhiyun 	 */
297*4882a593Smuzhiyun 	SCIC_PHY_COUNTER_RECEIVED_DONE_CREDIT_TIMEOUT,
298*4882a593Smuzhiyun 
299*4882a593Smuzhiyun 	/**
300*4882a593Smuzhiyun 	 * This PHY information field tracks the number of DONE (CREDIT TIMEOUT)
301*4882a593Smuzhiyun 	 * primitives transmitted.
302*4882a593Smuzhiyun 	 */
303*4882a593Smuzhiyun 	SCIC_PHY_COUNTER_TRANSMITTED_DONE_CREDIT_TIMEOUT,
304*4882a593Smuzhiyun 
305*4882a593Smuzhiyun 	/**
306*4882a593Smuzhiyun 	 * This PHY information field tracks the number of CREDIT BLOCKED
307*4882a593Smuzhiyun 	 * primitives received.
308*4882a593Smuzhiyun 	 * @note Depending on remote device implementation, credit blocks
309*4882a593Smuzhiyun 	 *       may occur regularly.
310*4882a593Smuzhiyun 	 */
311*4882a593Smuzhiyun 	SCIC_PHY_COUNTER_RECEIVED_CREDIT_BLOCKED,
312*4882a593Smuzhiyun 
313*4882a593Smuzhiyun 	/**
314*4882a593Smuzhiyun 	 * This PHY information field contains the number of short frames
315*4882a593Smuzhiyun 	 * received.  A short frame is simply a frame smaller then what is
316*4882a593Smuzhiyun 	 * allowed by either the SAS or SATA specification.
317*4882a593Smuzhiyun 	 */
318*4882a593Smuzhiyun 	SCIC_PHY_COUNTER_RECEIVED_SHORT_FRAME,
319*4882a593Smuzhiyun 
320*4882a593Smuzhiyun 	/**
321*4882a593Smuzhiyun 	 * This PHY information field contains the number of frames received after
322*4882a593Smuzhiyun 	 * credit has been exhausted.
323*4882a593Smuzhiyun 	 */
324*4882a593Smuzhiyun 	SCIC_PHY_COUNTER_RECEIVED_FRAME_WITHOUT_CREDIT,
325*4882a593Smuzhiyun 
326*4882a593Smuzhiyun 	/**
327*4882a593Smuzhiyun 	 * This PHY information field contains the number of frames received after
328*4882a593Smuzhiyun 	 * a DONE has been received.
329*4882a593Smuzhiyun 	 */
330*4882a593Smuzhiyun 	SCIC_PHY_COUNTER_RECEIVED_FRAME_AFTER_DONE,
331*4882a593Smuzhiyun 
332*4882a593Smuzhiyun 	/**
333*4882a593Smuzhiyun 	 * This PHY information field contains the number of times the phy
334*4882a593Smuzhiyun 	 * failed to achieve DWORD synchronization during speed negotiation.
335*4882a593Smuzhiyun 	 */
336*4882a593Smuzhiyun 	SCIC_PHY_COUNTER_SN_DWORD_SYNC_ERROR
337*4882a593Smuzhiyun };
338*4882a593Smuzhiyun 
339*4882a593Smuzhiyun /**
340*4882a593Smuzhiyun  * enum sci_phy_states - phy state machine states
341*4882a593Smuzhiyun  * @SCI_PHY_INITIAL: Simply the initial state for the base domain state
342*4882a593Smuzhiyun  *		     machine.
343*4882a593Smuzhiyun  * @SCI_PHY_STOPPED: phy has successfully been stopped.  In this state
344*4882a593Smuzhiyun  *		     no new IO operations are permitted on this phy.
345*4882a593Smuzhiyun  * @SCI_PHY_STARTING: the phy is in the process of becomming ready.  In
346*4882a593Smuzhiyun  *		      this state no new IO operations are permitted on
347*4882a593Smuzhiyun  *		      this phy.
348*4882a593Smuzhiyun  * @SCI_PHY_SUB_INITIAL: Initial state
349*4882a593Smuzhiyun  * @SCI_PHY_SUB_AWAIT_OSSP_EN: Wait state for the hardware OSSP event
350*4882a593Smuzhiyun  *			       type notification
351*4882a593Smuzhiyun  * @SCI_PHY_SUB_AWAIT_SAS_SPEED_EN: Wait state for the PHY speed
352*4882a593Smuzhiyun  *				    notification
353*4882a593Smuzhiyun  * @SCI_PHY_SUB_AWAIT_IAF_UF: Wait state for the IAF Unsolicited frame
354*4882a593Smuzhiyun  *			      notification
355*4882a593Smuzhiyun  * @SCI_PHY_SUB_AWAIT_SAS_POWER: Wait state for the request to consume
356*4882a593Smuzhiyun  *				 power
357*4882a593Smuzhiyun  * @SCI_PHY_SUB_AWAIT_SATA_POWER: Wait state for request to consume
358*4882a593Smuzhiyun  *				  power
359*4882a593Smuzhiyun  * @SCI_PHY_SUB_AWAIT_SATA_PHY_EN: Wait state for the SATA PHY
360*4882a593Smuzhiyun  *				   notification
361*4882a593Smuzhiyun  * @SCI_PHY_SUB_AWAIT_SATA_SPEED_EN: Wait for the SATA PHY speed
362*4882a593Smuzhiyun  *				     notification
363*4882a593Smuzhiyun  * @SCI_PHY_SUB_AWAIT_SIG_FIS_UF: Wait state for the SIGNATURE FIS
364*4882a593Smuzhiyun  *				  unsolicited frame notification
365*4882a593Smuzhiyun  * @SCI_PHY_SUB_FINAL: Exit state for this state machine
366*4882a593Smuzhiyun  * @SCI_PHY_READY: phy is now ready.  Thus, the user is able to perform
367*4882a593Smuzhiyun  *		   IO operations utilizing this phy as long as it is
368*4882a593Smuzhiyun  *		   currently part of a valid port.  This state is
369*4882a593Smuzhiyun  *		   entered from the STARTING state.
370*4882a593Smuzhiyun  * @SCI_PHY_RESETTING: phy is in the process of being reset.  In this
371*4882a593Smuzhiyun  *		       state no new IO operations are permitted on this
372*4882a593Smuzhiyun  *		       phy.  This state is entered from the READY state.
373*4882a593Smuzhiyun  * @SCI_PHY_FINAL: Simply the final state for the base phy state
374*4882a593Smuzhiyun  *		   machine.
375*4882a593Smuzhiyun  */
376*4882a593Smuzhiyun #define PHY_STATES {\
377*4882a593Smuzhiyun 	C(PHY_INITIAL),\
378*4882a593Smuzhiyun 	C(PHY_STOPPED),\
379*4882a593Smuzhiyun 	C(PHY_STARTING),\
380*4882a593Smuzhiyun 	C(PHY_SUB_INITIAL),\
381*4882a593Smuzhiyun 	C(PHY_SUB_AWAIT_OSSP_EN),\
382*4882a593Smuzhiyun 	C(PHY_SUB_AWAIT_SAS_SPEED_EN),\
383*4882a593Smuzhiyun 	C(PHY_SUB_AWAIT_IAF_UF),\
384*4882a593Smuzhiyun 	C(PHY_SUB_AWAIT_SAS_POWER),\
385*4882a593Smuzhiyun 	C(PHY_SUB_AWAIT_SATA_POWER),\
386*4882a593Smuzhiyun 	C(PHY_SUB_AWAIT_SATA_PHY_EN),\
387*4882a593Smuzhiyun 	C(PHY_SUB_AWAIT_SATA_SPEED_EN),\
388*4882a593Smuzhiyun 	C(PHY_SUB_AWAIT_SIG_FIS_UF),\
389*4882a593Smuzhiyun 	C(PHY_SUB_FINAL),\
390*4882a593Smuzhiyun 	C(PHY_READY),\
391*4882a593Smuzhiyun 	C(PHY_RESETTING),\
392*4882a593Smuzhiyun 	C(PHY_FINAL),\
393*4882a593Smuzhiyun 	}
394*4882a593Smuzhiyun #undef C
395*4882a593Smuzhiyun #define C(a) SCI_##a
396*4882a593Smuzhiyun enum sci_phy_states PHY_STATES;
397*4882a593Smuzhiyun #undef C
398*4882a593Smuzhiyun 
399*4882a593Smuzhiyun void sci_phy_construct(
400*4882a593Smuzhiyun 	struct isci_phy *iphy,
401*4882a593Smuzhiyun 	struct isci_port *iport,
402*4882a593Smuzhiyun 	u8 phy_index);
403*4882a593Smuzhiyun 
404*4882a593Smuzhiyun struct isci_port *phy_get_non_dummy_port(struct isci_phy *iphy);
405*4882a593Smuzhiyun 
406*4882a593Smuzhiyun void sci_phy_set_port(
407*4882a593Smuzhiyun 	struct isci_phy *iphy,
408*4882a593Smuzhiyun 	struct isci_port *iport);
409*4882a593Smuzhiyun 
410*4882a593Smuzhiyun enum sci_status sci_phy_initialize(
411*4882a593Smuzhiyun 	struct isci_phy *iphy,
412*4882a593Smuzhiyun 	struct scu_transport_layer_registers __iomem *transport_layer_registers,
413*4882a593Smuzhiyun 	struct scu_link_layer_registers __iomem *link_layer_registers);
414*4882a593Smuzhiyun 
415*4882a593Smuzhiyun enum sci_status sci_phy_start(
416*4882a593Smuzhiyun 	struct isci_phy *iphy);
417*4882a593Smuzhiyun 
418*4882a593Smuzhiyun enum sci_status sci_phy_stop(
419*4882a593Smuzhiyun 	struct isci_phy *iphy);
420*4882a593Smuzhiyun 
421*4882a593Smuzhiyun enum sci_status sci_phy_reset(
422*4882a593Smuzhiyun 	struct isci_phy *iphy);
423*4882a593Smuzhiyun 
424*4882a593Smuzhiyun void sci_phy_resume(
425*4882a593Smuzhiyun 	struct isci_phy *iphy);
426*4882a593Smuzhiyun 
427*4882a593Smuzhiyun void sci_phy_setup_transport(
428*4882a593Smuzhiyun 	struct isci_phy *iphy,
429*4882a593Smuzhiyun 	u32 device_id);
430*4882a593Smuzhiyun 
431*4882a593Smuzhiyun enum sci_status sci_phy_event_handler(
432*4882a593Smuzhiyun 	struct isci_phy *iphy,
433*4882a593Smuzhiyun 	u32 event_code);
434*4882a593Smuzhiyun 
435*4882a593Smuzhiyun enum sci_status sci_phy_frame_handler(
436*4882a593Smuzhiyun 	struct isci_phy *iphy,
437*4882a593Smuzhiyun 	u32 frame_index);
438*4882a593Smuzhiyun 
439*4882a593Smuzhiyun enum sci_status sci_phy_consume_power_handler(
440*4882a593Smuzhiyun 	struct isci_phy *iphy);
441*4882a593Smuzhiyun 
442*4882a593Smuzhiyun void sci_phy_get_sas_address(
443*4882a593Smuzhiyun 	struct isci_phy *iphy,
444*4882a593Smuzhiyun 	struct sci_sas_address *sas_address);
445*4882a593Smuzhiyun 
446*4882a593Smuzhiyun void sci_phy_get_attached_sas_address(
447*4882a593Smuzhiyun 	struct isci_phy *iphy,
448*4882a593Smuzhiyun 	struct sci_sas_address *sas_address);
449*4882a593Smuzhiyun 
450*4882a593Smuzhiyun struct sci_phy_proto;
451*4882a593Smuzhiyun void sci_phy_get_protocols(
452*4882a593Smuzhiyun 	struct isci_phy *iphy,
453*4882a593Smuzhiyun 	struct sci_phy_proto *protocols);
454*4882a593Smuzhiyun enum sas_linkrate sci_phy_linkrate(struct isci_phy *iphy);
455*4882a593Smuzhiyun 
456*4882a593Smuzhiyun struct isci_host;
457*4882a593Smuzhiyun void isci_phy_init(struct isci_phy *iphy, struct isci_host *ihost, int index);
458*4882a593Smuzhiyun int isci_phy_control(struct asd_sas_phy *phy, enum phy_func func, void *buf);
459*4882a593Smuzhiyun 
460*4882a593Smuzhiyun #endif /* !defined(_ISCI_PHY_H_) */
461