1*4882a593Smuzhiyun /* SPDX-License-Identifier: GPL-2.0 */ 2*4882a593Smuzhiyun 3*4882a593Smuzhiyun /* Driver for the Iomega MatchMaker parallel port SCSI HBA embedded in 4*4882a593Smuzhiyun * the Iomega ZIP Plus drive 5*4882a593Smuzhiyun * 6*4882a593Smuzhiyun * (c) 1998 David Campbell 7*4882a593Smuzhiyun * 8*4882a593Smuzhiyun * Please note that I live in Perth, Western Australia. GMT+0800 9*4882a593Smuzhiyun */ 10*4882a593Smuzhiyun 11*4882a593Smuzhiyun #ifndef _IMM_H 12*4882a593Smuzhiyun #define _IMM_H 13*4882a593Smuzhiyun 14*4882a593Smuzhiyun #define IMM_VERSION "2.05 (for Linux 2.4.0)" 15*4882a593Smuzhiyun 16*4882a593Smuzhiyun /* 17*4882a593Smuzhiyun * 10 Apr 1998 (Good Friday) - Received EN144302 by email from Iomega. 18*4882a593Smuzhiyun * Scarry thing is the level of support from one of their managers. 19*4882a593Smuzhiyun * The onus is now on us (the developers) to shut up and start coding. 20*4882a593Smuzhiyun * 11Apr98 [ 0.10 ] 21*4882a593Smuzhiyun * 22*4882a593Smuzhiyun * --- SNIP --- 23*4882a593Smuzhiyun * 24*4882a593Smuzhiyun * It manages to find the drive which is a good start. Writing data during 25*4882a593Smuzhiyun * data phase is known to be broken (due to requirements of two byte writes). 26*4882a593Smuzhiyun * Removing "Phase" debug messages. 27*4882a593Smuzhiyun * 28*4882a593Smuzhiyun * PS: Took four hours of coding after I bought a drive. 29*4882a593Smuzhiyun * ANZAC Day (Aus "War Veterans Holiday") 25Apr98 [ 0.14 ] 30*4882a593Smuzhiyun * 31*4882a593Smuzhiyun * Ten minutes later after a few fixes.... (LITERALLY!!!) 32*4882a593Smuzhiyun * Have mounted disk, copied file, dismounted disk, remount disk, diff file 33*4882a593Smuzhiyun * ----- It actually works!!! ----- 34*4882a593Smuzhiyun * 25Apr98 [ 0.15 ] 35*4882a593Smuzhiyun * 36*4882a593Smuzhiyun * Twenty minutes of mucking around, rearanged the IEEE negotiate mechanism. 37*4882a593Smuzhiyun * Now have byte mode working (only EPP and ECP to go now... :=) 38*4882a593Smuzhiyun * 26Apr98 [ 0.16 ] 39*4882a593Smuzhiyun * 40*4882a593Smuzhiyun * Thirty minutes of further coding results in EPP working on my machine. 41*4882a593Smuzhiyun * 27Apr98 [ 0.17 ] 42*4882a593Smuzhiyun * 43*4882a593Smuzhiyun * Due to work commitments and inability to get a "true" ECP mode functioning 44*4882a593Smuzhiyun * I have decided to code the parport support into imm. 45*4882a593Smuzhiyun * 09Jun98 [ 0.18 ] 46*4882a593Smuzhiyun * 47*4882a593Smuzhiyun * Driver is now out of beta testing. 48*4882a593Smuzhiyun * Support for parport has been added. 49*4882a593Smuzhiyun * Now distributed with the ppa driver. 50*4882a593Smuzhiyun * 12Jun98 [ 2.00 ] 51*4882a593Smuzhiyun * 52*4882a593Smuzhiyun * Err.. It appears that imm-2.00 was broken.... 53*4882a593Smuzhiyun * 18Jun98 [ 2.01 ] 54*4882a593Smuzhiyun * 55*4882a593Smuzhiyun * Patch applied to sync this against the Linux 2.1.x kernel code 56*4882a593Smuzhiyun * Included qboot_zip.sh 57*4882a593Smuzhiyun * 21Jun98 [ 2.02 ] 58*4882a593Smuzhiyun * 59*4882a593Smuzhiyun * Other clean ups include the follow changes: 60*4882a593Smuzhiyun * CONFIG_SCSI_PPA_HAVE_PEDANTIC => CONFIG_SCSI_IZIP_EPP16 61*4882a593Smuzhiyun * added CONFIG_SCSI_IZIP_SLOW_CTR option 62*4882a593Smuzhiyun * [2.03] 63*4882a593Smuzhiyun * Fix kernel panic on scsi timeout. 20Aug00 [2.04] 64*4882a593Smuzhiyun * 65*4882a593Smuzhiyun * Avoid io_request_lock problems. 66*4882a593Smuzhiyun * John Cavan <johncavan@home.com> 16Nov00 [2.05] 67*4882a593Smuzhiyun */ 68*4882a593Smuzhiyun /* ------ END OF USER CONFIGURABLE PARAMETERS ----- */ 69*4882a593Smuzhiyun 70*4882a593Smuzhiyun #include <linux/stddef.h> 71*4882a593Smuzhiyun #include <linux/module.h> 72*4882a593Smuzhiyun #include <linux/kernel.h> 73*4882a593Smuzhiyun #include <linux/ioport.h> 74*4882a593Smuzhiyun #include <linux/delay.h> 75*4882a593Smuzhiyun #include <linux/proc_fs.h> 76*4882a593Smuzhiyun #include <linux/stat.h> 77*4882a593Smuzhiyun #include <linux/blkdev.h> 78*4882a593Smuzhiyun #include <linux/sched.h> 79*4882a593Smuzhiyun #include <linux/interrupt.h> 80*4882a593Smuzhiyun 81*4882a593Smuzhiyun #include <asm/io.h> 82*4882a593Smuzhiyun #include <scsi/scsi_host.h> 83*4882a593Smuzhiyun /* batteries not included :-) */ 84*4882a593Smuzhiyun 85*4882a593Smuzhiyun /* 86*4882a593Smuzhiyun * modes in which the driver can operate 87*4882a593Smuzhiyun */ 88*4882a593Smuzhiyun #define IMM_AUTODETECT 0 /* Autodetect mode */ 89*4882a593Smuzhiyun #define IMM_NIBBLE 1 /* work in standard 4 bit mode */ 90*4882a593Smuzhiyun #define IMM_PS2 2 /* PS/2 byte mode */ 91*4882a593Smuzhiyun #define IMM_EPP_8 3 /* EPP mode, 8 bit */ 92*4882a593Smuzhiyun #define IMM_EPP_16 4 /* EPP mode, 16 bit */ 93*4882a593Smuzhiyun #define IMM_EPP_32 5 /* EPP mode, 32 bit */ 94*4882a593Smuzhiyun #define IMM_UNKNOWN 6 /* Just in case... */ 95*4882a593Smuzhiyun 96*4882a593Smuzhiyun static char *IMM_MODE_STRING[] = 97*4882a593Smuzhiyun { 98*4882a593Smuzhiyun [IMM_AUTODETECT] = "Autodetect", 99*4882a593Smuzhiyun [IMM_NIBBLE] = "SPP", 100*4882a593Smuzhiyun [IMM_PS2] = "PS/2", 101*4882a593Smuzhiyun [IMM_EPP_8] = "EPP 8 bit", 102*4882a593Smuzhiyun [IMM_EPP_16] = "EPP 16 bit", 103*4882a593Smuzhiyun #ifdef CONFIG_SCSI_IZIP_EPP16 104*4882a593Smuzhiyun [IMM_EPP_32] = "EPP 16 bit", 105*4882a593Smuzhiyun #else 106*4882a593Smuzhiyun [IMM_EPP_32] = "EPP 32 bit", 107*4882a593Smuzhiyun #endif 108*4882a593Smuzhiyun [IMM_UNKNOWN] = "Unknown", 109*4882a593Smuzhiyun }; 110*4882a593Smuzhiyun 111*4882a593Smuzhiyun /* other options */ 112*4882a593Smuzhiyun #define IMM_BURST_SIZE 512 /* data burst size */ 113*4882a593Smuzhiyun #define IMM_SELECT_TMO 500 /* 500 how long to wait for target ? */ 114*4882a593Smuzhiyun #define IMM_SPIN_TMO 5000 /* 50000 imm_wait loop limiter */ 115*4882a593Smuzhiyun #define IMM_DEBUG 0 /* debugging option */ 116*4882a593Smuzhiyun #define IN_EPP_MODE(x) (x == IMM_EPP_8 || x == IMM_EPP_16 || x == IMM_EPP_32) 117*4882a593Smuzhiyun 118*4882a593Smuzhiyun /* args to imm_connect */ 119*4882a593Smuzhiyun #define CONNECT_EPP_MAYBE 1 120*4882a593Smuzhiyun #define CONNECT_NORMAL 0 121*4882a593Smuzhiyun 122*4882a593Smuzhiyun #define r_dtr(x) (unsigned char)inb((x)) 123*4882a593Smuzhiyun #define r_str(x) (unsigned char)inb((x)+1) 124*4882a593Smuzhiyun #define r_ctr(x) (unsigned char)inb((x)+2) 125*4882a593Smuzhiyun #define r_epp(x) (unsigned char)inb((x)+4) 126*4882a593Smuzhiyun #define r_fifo(x) (unsigned char)inb((x)) /* x must be base_hi */ 127*4882a593Smuzhiyun /* On PCI is: base+0x400 != base_hi */ 128*4882a593Smuzhiyun #define r_ecr(x) (unsigned char)inb((x)+2) /* x must be base_hi */ 129*4882a593Smuzhiyun 130*4882a593Smuzhiyun #define w_dtr(x,y) outb(y, (x)) 131*4882a593Smuzhiyun #define w_str(x,y) outb(y, (x)+1) 132*4882a593Smuzhiyun #define w_epp(x,y) outb(y, (x)+4) 133*4882a593Smuzhiyun #define w_fifo(x,y) outb(y, (x)) /* x must be base_hi */ 134*4882a593Smuzhiyun #define w_ecr(x,y) outb(y, (x)+0x2) /* x must be base_hi */ 135*4882a593Smuzhiyun 136*4882a593Smuzhiyun #ifdef CONFIG_SCSI_IZIP_SLOW_CTR 137*4882a593Smuzhiyun #define w_ctr(x,y) outb_p(y, (x)+2) 138*4882a593Smuzhiyun #else 139*4882a593Smuzhiyun #define w_ctr(x,y) outb(y, (x)+2) 140*4882a593Smuzhiyun #endif 141*4882a593Smuzhiyun 142*4882a593Smuzhiyun static int imm_engine(imm_struct *, struct scsi_cmnd *); 143*4882a593Smuzhiyun 144*4882a593Smuzhiyun #endif /* _IMM_H */ 145